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Philips Semiconductors Product specification

N-channel enhancement mode BSH105

MOS transistor

FEATURES SYMBOL QUICK REFERENCE DATA

• Very low threshold voltage d VDS = 20 V
• Fast switching
• Logic level compatible ID = 1.05 A
• Subminiature surface mount
package g RDS(ON) ≤ 250 mΩ (VGS = 2.5 V)

VGS(TO) ≥ 0.4 V
s

GENERAL DESCRIPTION PINNING SOT23

N-channel, enhancement mode, PIN DESCRIPTION
logic level, field-effect power
transistor. This device has very low 1 gate 3

threshold voltage and extremely Top view

fast switching making it ideal for 2 source

battery powered applications and
high speed digital interfacing. 3 drain

The BSH105 is supplied in the 1 2

SOT23 subminiature surface

mounting package.

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS Drain-source voltage - 20 V
VDGR Drain-gate voltage RGS = 20 kΩ - 20 V
VGS Gate-source voltage - ±8 V
ID Drain current (DC) Ta = 25 ˚C - 1.05 A
Ta = 100 ˚C - 0.67 A
IDM Drain current (pulse peak value) Ta = 25 ˚C - 4.2 A
Ptot Total power dissipation Ta = 25 ˚C - 0.417 W
Ta = 100 ˚C - 0.17 W
Tstg, Tj Storage & operating temperature - 55 150 ˚C

THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
Rth j-a Thermal resistance junction to FR4 board, minimum 300 - K/W
ambient footprint

August 1998 1 Rev 1.000

Philips Semiconductors Product specification

N-channel enhancement mode BSH105

MOS transistor

ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V(BR)DSS Drain-source breakdown VGS = 0 V; ID = 10 µA 20 - - V
voltage
VGS(TO) Gate threshold voltage VDS = VGS; ID = 1 mA 0.4 0.57 - V
Tj = 150˚C 0.1 - - V
RDS(ON) Drain-source on-state VGS = 4.5 V; ID = 0.6 A - 140 200 mΩ
resistance VGS = 2.5 V; ID = 0.6 A - 180 250 mΩ
VGS = 1.8 V; ID = 0.3 A - 240 300 mΩ
VGS = 2.5 V; ID = 0.6 A; Tj = 150˚C - 270 375 mΩ
gfs Forward transconductance VDS = 16 V; ID = 0.6 A 0.5 1.6 - S
IGSS Gate source leakage current VGS = ±8 V; VDS = 0 V - 10 100 nA
IDSS Zero gate voltage drain VDS = 16 V; VGS = 0 V; - 50 100 nA
current Tj = 150˚C - 1.3 10 µA
Qg(tot) Total gate charge ID = 1 A; VDD = 20 V; VGS = 4.5 V - 3.9 - nC
Qgs Gate-source charge - 0.4 - nC
Qgd Gate-drain (Miller) charge - 1.4 - nC
td on Turn-on delay time VDD = 20 V; ID = 1 A; - 2 - ns
tr Turn-on rise time VGS = 8 V; RG = 6 Ω - 4.5 - ns
td off Turn-off delay time Resistive load - 45 - ns
tf Turn-off fall time - 20 - ns
Ciss Input capacitance VGS = 0 V; VDS = 16 V; f = 1 MHz - 152 - pF
Coss Output capacitance - 71 - pF
Crss Feedback capacitance - 33 - pF

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
IDR Continuous reverse drain Ta = 25 ˚C - - 1.05 A
current
IDRM Pulsed reverse drain current - - 4.2 A
VSD Diode forward voltage IF = 0.5 A; VGS = 0 V - 0.74 1 V
trr Reverse recovery time IF = 0.5 A; -dIF/dt = 100 A/µs; - 27 - ns
Qrr Reverse recovery charge VGS = 0 V; VR = 16 V - 19 - nC

August 1998 2 Rev 1.000

Philips Semiconductors Product specification

N-channel enhancement mode BSH105

MOS transistor

Normalised Power Dissipation, PD (%) Peak Pulsed Drain Current, IDM (A) BSH105
120 1000

100
D = 0.5
100
80 0.2
0.1
0.05
60 10
0.02 P D = tp/T
D tp
40 single pulse
1
20
T
0 0.1
0 25 50 75 100 125 150 1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01
Ambient Temperature, Ta (C) Pulse width, tp (s)

Fig.1. Normalised power dissipation. Fig.4. Transient thermal impedance.

PD% = 100⋅PD/PD 25 ˚C = f(Ta) Zth j-a = f(t); parameter D = tp/T

Normalised Drain Current, ID (%) Drain Current, ID (A) BSH105

120 5
4.5V
4.5 2.5V
100
4
Tj = 25 C 2.1 V
80 3.5
3
60 VGS = 1.9 V
2.5
40 2 1.7 V
1.5
20 1.5 V
1
0.5 1.3 V
0 1.1 V
0 25 50 75 100 125 150 0
0 0.5 1 1.5 2
Ambient Temperature, Ta (C) Drain-Source Voltage, VDS (V)

Fig.2. Normalised continuous drain current. Fig.5. Typical output characteristics, Tj = 25 ˚C.
ID% = 100⋅ID/ID 25 ˚C = f(Ta); conditions: VGS ≥ 4.5 V ID = f(VDS); parameter VGS

Drain-Source On Resistance, RDS(on) (Ohms) BSH105

Peak Pulsed Drain Current, IDM (A) BSH105 0.5
1.5 V 1.7 V 1.9 V 2.1 V
100
0.45
0.4
10 RDS(on) = VDS/ ID 0.35
tp = 100 us 0.3
2.5 V
1 ms 0.25
1
10 ms 0.2
VGS = 4.5 V
100 ms 0.15
0.1 d.c. 0.1
0.05 Tj = 25 C
0.01 0
0.1 1 10 100 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Drain-Source Voltage, VDS (V) Drain Current, ID (A)

Fig.3. Safe operating area. Ta = 25 ˚C Fig.6. Typical on-state resistance, Tj = 25 ˚C.

ID & IDM = f(VDS); IDM single pulse; parameter tp RDS(ON) = f(ID); parameter VGS

August 1998 3 Rev 1.000

Philips Semiconductors Product specification

N-channel enhancement mode BSH105

MOS transistor

Drain Current, ID (A) BSH105

3 Threshold Voltage, VGS(to), (V)
1
VDS > ID X RDS(on)
2.5 0.9
0.8 typical
2 0.7
0.6
1.5 0.5
0.4
minimum
1 0.3
150 C
Tj = 25 C 0.2
0.5 0.1
0
0
0 25 50 75 100 125 150
0 0.5 1 1.5 2 2.5 3
Gate-Source Voltage, VGS (V) Junction Temperature, Tj (C)

Fig.7. Typical transfer characteristics. Fig.10. Gate threshold voltage.

ID = f(VGS) VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS

Drain Current, ID (A) BSH105

Transconductance, gfs (S) BSH105 1E+00
4 VDS = 5 V
1E-01 Tj = 25 C
3.5
3 1E-02

2.5 1E-03
2
1E-04
1.5
1 1E-05

0.5 1E-06
0
0 0.5 1 1.5 2 2.5 3 1E-07
0 0.2 0.4 0.6 0.8 1
Drain Current, ID (A) Gate-Source Voltage, VGS (V)

Fig.8. Typical transconductance, Tj = 25 ˚C. Fig.11. Sub-threshold drain current.

gfs = f(ID) ID = f(VGS); conditions: Tj = 25 ˚C

Normalised Drain-Source On Resistance Capacitances, Ciss, Coss, Crss (pF) BSH105

1.8 1000
1.7 RDS(ON) @ Tj
1.6 RDS(ON) @ 25C
1.5 2.5 V
1.4 VGS = 4.5 V Ciss
1.3 100
1.2 1.8 V
Coss
1.1
1 Crss
0.9
0.8
10
0 25 50 75 100 125 150
0.1 1 10 100
Junction Temperature, Tj (C) Drain-Source Voltage, VDS (V)

Fig.9. Normalised drain-source on-state resistance. Fig.12. Typical capacitances, Ciss, Coss, Crss.
RDS(ON)/RDS(ON)25 ˚C = f(Tj) C = f(VDS); conditions: VGS = 0 V; f = 1 MHz

August 1998 4 Rev 1.000

Philips Semiconductors Product specification

N-channel enhancement mode BSH105

MOS transistor

Gate-source voltage, VGS (V) BSH105 BSH105

Source-Drain Diode Current, IF (A)
10 -5
VDD = 20 V
9 -4.5
RD = 20 Ohms
8 Tj = 25 C -4
7 -3.5
6 -3
5 -2.5
150 C
4 -2
Tj = 25 C
-1.5
3
-1
2
-0.5
1
0
0
0 -0.2 -0.4 -0.6 -0.8 -1 -1.2
0 2 4 6 8
Gate charge, QG (nC) Drain-Source Voltage, VSDS (V)

Fig.13. Typical turn-on gate-charge characteristics. Fig.14. Typical reverse diode current.
VGS = f(QG) IF = f(VSDS); conditions: VGS = 0 V; parameter Tj

August 1998 5 Rev 1.000

Philips Semiconductors Product specification

N-channel enhancement mode BSH105

MOS transistor

MECHANICAL DATA
Plastic surface mounted package; 3 leads SOT23

D B E A X

HE v M A

A1

1 2 c

e1 bp w M B Lp

e
detail X

0 1 2 mm

scale

DIMENSIONS (mm are the original dimensions)

A1
UNIT A bp c D E e e1 HE Lp Q v w
max.
1.1 0.48 0.15 3.0 1.4 2.5 0.45 0.55
mm 0.1 1.9 0.95 0.2 0.1
0.9 0.38 0.09 2.8 1.2 2.1 0.15 0.45

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

SOT23 97-02-28

Fig.15. SOT23 surface mounting package.

Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8".

August 1998 6 Rev 1.000

Philips Semiconductors Product specification

N-channel enhancement mode BSH105

MOS transistor

DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
 Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.

August 1998 7 Rev 1.000