June 1997

NDS332P
P-Channel Logic Level Enhancement Mode Field Effect Transistor

General Description Features

These P-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance. These
devices are particularly suited for low voltage applications such as
notebook computer power management, portable electronics,
and other battery powered circuits where fast high-side
switching, and low in-line power loss are needed in a very small
outline surface mount package.
-1 A, -20 V, RDS(ON) = 0.41 Ω @ VGS= -2.7 V
RDS(ON) = 0.3 Ω @ VGS = -4.5 V.
Very low level gate drive requirements allowing direct
operation in 3V circuits. VGS(th) < 1.0V.
Proprietary package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface Mount
package.

________________________________________________________________________________

G S

Asolute Maximum Ratings T A = 25°C unless otherwise noted

Symbol Parameter NDS332P Units
VDSS Drain-Source Voltage -20 V
VGSS Gate-Source Voltage - Continuous ±8 V
ID Drain Current - Continuous (Note 1a) -1 A
- Pulsed -10
PD Maximum Power Dissipation (Note 1a) 0.5 W
(Note 1b) 0.46
TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 250 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W

© 1997 Fairchild Semiconductor Corporation NDS332P Rev. E

Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -20 V
IDSS Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V -1 µA
TJ = 55°C -10 µA
IGSS Gate - Body Leakage Current VGS = 8 V, VDS= 0 V 100 nA
IGSS Gate - Body Leakage Current VGS = -8 V, VDS= 0 V -100 nA
ON CHARACTERISTICS (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA -0.4 -0.6 -1 V
TJ =125°C -0.3 -0.45 -0.8
RDS(ON) Static Drain-Source On-Resistance VGS = -2.7 V, ID = -1 A 0.35 0.41 Ω
TJ =125°C 0.5 0.74
VGS = -4.5 V, ID = -1.1 A 0.26 0.3
ID(ON) On-State Drain Current VGS = -2.7 V, VDS = -5 V -1.5 A
VGS = -4.5 V, VDS = -5 V -2.5
gFS Forward Transconductance VDS = -5 V, ID= -1 A 2.2 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = -10 V, VGS = 0 V, 195 pF
f = 1.0 MHz
Coss Output Capacitance 105 pF
Crss Reverse Transfer Capacitance 40 pF
SWITCHING CHARACTERISTICS (Note 2)
tD(on) Turn - On Delay Time VDD = -6 V, ID = -1 A, 8 15 ns
tr Turn - On Rise Time VGS = -4.5 V, RGEN = 6 Ω 30 45 ns
tD(off) Turn - Off Delay Time 25 45 ns
tf Turn - Off Fall Time 27 45 ns
Qg Total Gate Charge VDS = -5 V, ID = -1 A, 3.7 5 nC
VGS = -4.5 V
Qgs Gate-Source Charge 0.5 nC
Qgd Gate-Drain Charge 0.9 nC

NDS332P Rev. E
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS Maximum Continuous Source Current -0.42 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.42 A (Note 2) -0.75 -1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by
design while RθCA is determined by the user's board design.

T J −T A T J −T A
PD (t) = R θJA (t)
= R θJC +R θCA (t)
= I 2D(t) × R DS(ON)@T J

Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:

a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper.

b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper.

1a 1b

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

NDS332P Rev. E
 Typical Electrical Characteristics

-2.5 1.8
VGS = -4.5V -2.5

DRAIN-SOURCE ON-RESISTANCE
I D , DRAIN-SOURCE CURRENT (A)

-3.5 1.6
-2 -3.0 -2.7

RDS(ON) , NORMALIZED
-2.0 1.4 VGS =-2.0V

-1.5 1.2
-2.5
-2.7
1 -3.0
-1
-3.5
-1.5 0.8 -4.5
-0.5
0.6

0.4
0 0 -0.5 -1 -1.5 -2 -2.5 -3
0 -0.5 -1 -1.5 -2 -2.5 -3
V , DRAIN-SOURCE VOLTAGE (V) I , DRAIN CURRENT (A)
DS D

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation

with Drain Current and Gate Voltage.

1.8 1.8
I D = -1A V GS = -2.7 V TJ = 125°C
DRAIN-SOURCE ON-RESISTANCE

DRAIN-SOURCE ON-RESISTANCE

1.6 V GS = -2.7 1.6

R DS(ON) , NORMALIZED

R DS(on), NORMALIZED

1.4 1.4

1.2 1.2
25°C
1 1

0.8 0.8 -55°C

0.6 0.6

0.4 0.4
-50 -25 0 25 50 75 100 125 150 0 -0.5 -1 -1.5 -2 -2.5 -3
T , JUNCTION TEMPERATURE (°C) I , DRAIN CURRENT (A)
J D

Figure 3. On-Resistance Variation Figure 4. On-Resistance Variation

with Temperature. with Drain Current and Temperature.

-1.5 1.15
GATE-SOURCE THRESHOLD VOLTAGE (V)

V DS = - 3V 25°C
T = -55°C V DS = VGS
J 125°C 1.1
-1.2 I D = -250µA
I D , DRAIN CURRENT (A)

1.05
Vth , NORMALIZED

-0.9
1

-0.6 0.95

0.9
-0.3
0.85

0 0.8
-0.5 -0.75 -1 -1.25 -1.5 -1.75 -2 -50 -25 0 25 50 75 100 125 150
V , GATE TO SOURCE VOLTAGE (V) TJ , JUNCTION TEMPERATURE (°C)
GS

Figure 5. Transfer Characteristics. Figure 6. Gate Threshold Variation

with Temperature.

NDS332P Rev.E
Typical Electrical Characteristics (continued)

1.12 1
VGS =0V
DRAIN-SOURCE BREAKDOWN VOLTAGE

-I , REVERSE DRAIN CURRENT (A)

I D = -250µA
1.08
0.1
BV DSS , NORMALIZED

0.05
1.04 TJ = 125°C

0.01
25°C
1
-55°C

0.001
0.96

S
0.92
-50 -25 0 25 50 75 100 125 150 0.0001
0 0.2 0.4 0.6 0.8 1
T , JUNCTION TEMPERATURE (°C)
J -V SD , BODY DIODE FORWARD VOLTAGE (V)

Figure 7. Breakdown Voltage Variation with Figure 8. Body Diode ForwardVoltageVariation with
Temperature. Source Current and Temperature.

500 5
-V GS , GATE-SOURCE VOLTAGE (V) I D = -1A VDS = -5V
300 -10V
4
Ciss -15V
CAPACITANCE (pF)

200

3
Coss
100
2

50
Crss
f = 1 MHz 1
30 VGS = 0V

20 0
0.1 0.2 0.5 1 2 5 10 20 0 1 2 3 4 5
-V , DRAIN TO SOURCE VOLTAGE (V) Q g , GATE CHARGE (nC)
DS

Figure 9. Capacitance Characteristics. Figure 10. Gate Charge Characteristics.

ton t off
VDD
t d(on) tr t d(off) tf
VIN RL 90% 90%

D V OUT
VOUT
VGS 10% 10%
R GEN DUT
G 90%

V IN 50% 50%
S
10%
INVERTED
PULSE WIDTH

Figure 11. Switching Test Circuit. Figure 12. Switching Waveforms.

NDS332PRev. E
 Typical Electrical Characteristics (continued)

4 20
, TRANSCONDUCTANCE (SIEMENS)

VDS =- 5V 10 1m
TJ = -55°C s
5
IT

-I D , DRAIN CURRENT (A)

LIM 10m
3 N) s
25°C 2 S(O
RD
1 100
ms
2 125°C 0.5
1s
10s
0.1 V GS = -2.7V
DC
1 SINGLE PULSE
RθJA = See Note 1b
0.03
TA = 25°C
FS
g

0 0.01
0 -0.5 -1 -1.5 -2 -2.5 -3 0.1 0.2 0.5 1 2 5 10 20 50
I D, DRAIN CURRENT (A) -VDS , DRAIN-SOURCE VOLTAGE (V)

Figure 13. Transconductance Variation with Figure 14. Maximum Safe Operating Area.
Drain Current and Temperature.

1 1.4
STEADY-STATE POWER DISSIPATION (W)

-ID , STEADY-STATE DRAIN CURRENT (A)

0.8
1.2

0.6
1a
1 1b
1b
0.4
1a
4.5"x5" FR-4 Board
0.8 TA = 25 oC
0.2
4.5"x5" FR-4 Board Still Air
TA = 25 oC VGS = -2.7V
Still Air
0 0.6
0 0.1 0.2 0.3 0.4 0 0.1 0.2 0.3 0.4
2
2oz COPPER MOUNTING PAD AREA (in 2) 2oz COPPER MOUNTING PAD AREA (in )

Figue 15. SuperSOTTM _ 3 Maximum Figure 16. Maximum Steady-State Drain

Steady-State Power Dissipation versus Current versus Copper Mounting Pad Area.
Copper Mounting Pad Area.

1
TRANSIENT THERMAL RESISTANCE

0.5 D = 0.5
r(t), NORMALIZED EFFECTIVE

R θJA (t) = r(t) * R θJA

0.2 0.2
R θJA = See Note 1b
0.1 0.1

0.05 0.05
P(pk)
0.02
0.02 t1
0.01 t2
0.01
Single Pulse TJ - TA = P * R θJA (t)
0.005
Duty Cycle, D = t1 /t2
0.002

0.001
0.0001 0.001 0.01 0.1 1 10 100 300
t 1 , TIME (sec)

Figure 17. Transient Thermal Response Curve.

Note : Characterization performed using the conditions described in note 1b. Transient thermal response will
change depending on the circuit board design.

NDS332PRev. E