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2G & 2.

5G
Cellular Systems
Cellular Technologies
• There are a number of different cellular technologies
in the world
– Different radio interfaces
– Different wireless generations
• Xilinx programmable devices have been used in
each generation of the cellular system
• Xilinx Virtex-E and Virtex-II FPGAs have been key in
the development and deployment of 3G systems

2G & 2.5G Cellular Networks 2


The Acronyms
FDMA Frequency Division Multiple Access
TDMA Time Division Multiple Access
CDMA Code Division Multiple Access
OFDM Orthogonal Frequency Division Multiplexing
COFDM Coded Orthogonal Frequency Division Multiplexing
W-CDMA Wideband CDMA
GSM Global System for Mobile Communications
PDC Personal Digital Cellular
D-AMPS Digital Advanced Mobile Phone Service
GPRS General Packet Radio Service
EDGE Enhanced Data Rates for Global Evolution
CMDA2000 1X 1xRTT (Radio Transmission Technology)
CDMA2000 1XEV 1x Evolution - DO (Data Only) and DV (Data and Voice)
CDMA2000 3X 3xRTT (Three times 1X channel bandwidth)
HSDPA High Speed Downlink Packet Access

Note : This list is not exhaustive - other standards exist

2G & 2.5G Cellular Networks 3


Mobile Technology
Generations
Analog 2G 2.5G 3G
• “First” generation • Mov e to digital • Intermediate technology • IMT-2000 standard
• Only voice serv ic es • Architecture and (no standard definition) • Data rates from 144Kbps
offered components radically • Modifications to 2G phone to 2Mbps
change architectures (e.g. GPRS • Enhanced multimedia
• Main serv ices remain from GSM) messaging
same (v oice) • More adv anced data • MPEG-4 v ideo
• SMS (Short Message serv ices (e.g. WAP, ring • Location based serv ices
Serv ic e/tex t messaging) tones and logos) (GPS enabled)
prov es popular in some • Radio architecture • Mobile computing w ith
countries changes to handle high speed Internet access
• Relativ ely slow modem increased bandw idth • Mobile commerce
capabilities for PC • Human Machine Interface
connection (7-14kbps) starting to change (e.g.
PDA sty les)
• Color dis play s appearing
• Bluetooth and Wireless
LAN

G = Generation, 2G = Second Generation, etc..


2G & 2.5G Cellular Networks 4
Cellular Technology Roadmap
Wireless
GSM GPRS EDGE HSDPA LANs

W-CDMA
TDMA 4G
TD-SCDMA

1xEV-DO
IS95a/b 1xRTT 3xRTT

1xEV-DV

Current Being Deployed Development Future

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Focusing on 2G & 2.5G
Wireless
GSM GPRS EDGE HSDPA LANs

W-CDMA
TDMA 4G
TD-SCDMA

1xEV-DO
IS95a/b 1xRTT 3xRTT

1xEV-DV

2G & 2.5G Cellular Networks 6


PDC
• Personal Digital Cellular (PDC) is a Japanese
standard developed by NTT DoCoMo
– Deployment limited to Japan
• Full Duplex (Different frequency bands are used
for the uplink and downlink)
– Each band can have multiple carriers each with a
25KHz spacing
• Can send packet data at 9.6Kbps with plans to
triple this by allocating 3 channels to a single user

2G & 2.5G Cellular Networks 7


TDMA IS-136 & GAIT
• 2G technology used in North American and Latin
America
– Limited data capability, designed for voice traffic
• Phones with GAIT (GSM / ANSI-136 Interoperability
Team) capability allow multimode and roaming between
GSM and TDMA IS-136 mobile networks
• Three manufacturers dominate TDMA infrastructure
– Ericsson, Nortel, and Lucent

2G & 2.5G Cellular Networks 8


GSM
• GSM is the dominant 2G mobile system worldwide
– Primarily due to its roaming capability, and early
standardization and deployment by European countries
– Sort Message Service (SMS) messaging or “Texting” rapidly
adopted by youth culture, creating new revenue streams and
highlighting the need for better data support
• 20 Billion SMS messages sent per month worldwide
• GSM uses TDMA technology in three different bands
900MHz & 1800 MHz in most countries, 1900MHz in
USA
– Air interface is not compatible with TDMA IS-136

2G & 2.5G Cellular Networks 9


GPRS
• GPRS is a 2.5G technology based on GSM
– 2.5G is term used for a 2G technology that has been modified
to give it 3G like packet data qualities
– Improved data rates but still not near the 2Mbps max of a
3G system
• GSM = 9.6kbps
• GPRS = 20 - 40Kbps (with 144 Kbps theoretical max.)
• Allocates up to 8 timeslots (which would normally have
been used for different users) to a single user
– Extra timeslots = more data capability
– However, more timeslots = more power dissipation, so battery
life becomes an issue

2G & 2.5G Cellular Networks 10


GPRS (continued)
• GPRS requires changes to the existing operator networks
• New network infrastructure gateways and routers need
– Server GPRS Support Node (SGSN)
• Routes data from the Radio Network Controllers to the Cellular operators
packet based network
– Gateay GPRS Support Node (GGSN)
• Provides a gateway between the Cellular Operator network and the Internet
– Gateway products may be developed in-house or be modified variant of
products supplied by the major IP network and router manufacturers
• e.g. Cisco, Juniper Networks
• GPRS network can be used as a backbone for 3G networks

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EDGE
• Enhanced Data for Global Evolution (EDGE) is essentially an
enhanced version of GPRS
• Uses enhanced modulation (8PSK) to squeeze more data into the
available radio bandwidth
• Data rates more comparable to 3G
– Intended to be used by operators who don’t have a 3G license, who wish to
deliver near-3G services
• Requires all the radio cards in the existing GSM/GPRS network to
be replaced
– Expensive solution to obtain similar data rates to lowest expected 3G
performance
– Many operators choosing to deploy 3G rather than EDGE

2G & 2.5G Cellular Networks 12


CDMA IS-95a (CDMAone)
• 2G cellular wireless technology and the first commercial
CDMA network
– Mainly deployed in USA and South Korea
• Developed by Qualcomm
– Qualcomm holds many fundamental CDMA patents and also
produces CDMA chipsets
• IS-95a supports data rates up to 14.4Kbps
• Uses GPS satellites for network system timing
– Simplifies code detection as one global reference

2G & 2.5G Cellular Networks 13


CDMA IS-95b
• 2.5G evolution of IS-95a
• Uses 8 extra scrambling codes allocated to each user
• Only requires a software upgrade in the basestation and
new terminal hardware
– Low deployment costs
• Theoretically provides data rates up to 115Kbps
however, in practice < 64Kbps
• Benefits of moving from 14.4Kbps to 64Kbps are limited.
Operators may choose to roll-out 3G instead

2G & 2.5G Cellular Networks 14


Evolved IS95 systems
2G or 3G?
• During the early stages of development 1xEV-DO (HDR
as it was then known) and 1xEV-DV standards were
considered to be 2.5G technology, in much the same
way GPRS is an evolution of GSM
• However, both have been acknowledged as meeting the
criteria set out in the IMT-2000 initiative which defines
3G data rates and requirements
• As a result 1xEV systems are now classified as 3G
networks by most market analysts

2G & 2.5G Cellular Networks 15


CDMA2000: 1xEV-DO
• Evolution of 1x-RTT concept
– Also referred to as IS-896
– High data rate service which is backward compatible to IS95a
• 1xEV-DO = “Evolution of the ‘1x’ system carrying data only”
– Is a 1x-RTT technology so utilizes one 1.25MHz band
• Based from Qualcomm’s proprietary High Data Rate (HDR)
technology
• System requires a separate carrier for the data channel
– Operator must give up a voice carrier solely to carry data traffic
– 2.4Mbps from basestation to handset, 153.3Kbps the other way

2G & 2.5G Cellular Networks 16


CDMA2000: 1xEV-DV
• 1xEV-DV = “Evolution of ‘1xRTT’ system carrying Data & Voice”
– Is a 1x-RTT technology so it utilizes one 1.25MHz band
– Also known as 1Xtreme
– Developed by manufacturers including Motorola and Nokia
• 5Mbps peak data rates theoretically possible in a 1.25MHz band
– Very spectrally efficient
– Voice and data allowed in the same band
• New modem cards and transceivers required in the basestation
• Xilinx FPGAs provide the perfect set of features needed for
baseband signal processing
– Fast development and deployment envisaged

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More information on
1xEV-DO and 1xEV-DV
• For more information on 1xEV-DO and 1xEV-DV
and where Xilinx devices fit in these systems
please view the separate CDMA2000
presentation

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Where Xilinx devices fit and
what issues they address?
Node B
3G Node B
User Equipment Local Loop
LMDS
ROI New add-o ns Emerging Standards
ASSP Fix
MMDS
Delivery time-scal es Flexibility
Uncertain uptake / roll-out RNC Time-to-market Uncertain market uptake
ASIC development costs Security Fixed Wireless
Technical chan ges Operator
4G technology

SGSN
SGSN
MSC

Cellular
Operator
Core PSTN

GSM & GPRS MSC


Backbone Wireless LAN
SGSN GGSN

Product Obsolesc ense Network 802.11?


Transition to 3G BSC Bluetooth
IP or ATM Access Hiperl an2
Remote Upgrad es and Support
New features and standards Controller
Security
QoS 4G
Time-scales
BTS
Roll-o ut costs

BTS 802.11
HiperLAN2

2G & 2.5G Cellular Networks 19


Virtex-II Pro FPGA
Platform for Programmable Systems

2G & 2.5G Cellular Networks 20


Virtex-II Series Expanded to
Include Virtex-II Pro FPGA
• Virtex-II Logic, Routing, Features
– Upward compatible, same design tools
– Embedded Multipliers, SelectIO-Ultra (with 840Mbps LVD S),
DCI/XCITE, DC M

• Up to 24, 3.125 Gbps serial transceivers


– Channel bonding, 8b/10b encoding
– Supports high-speed interfaces inc.
GbE, 10GbE (XAU I), PCI/PC I-X,
Infiniband, RapidIO, HyperTransport,
FlexBus 3/4, POS- PHY 3/4

• Up to four IBM 405 PowerPC®


– 32-bit RISC C PU: 420 DMIPS @ 300 MHz
– The leadin g embedded CPU
NOT TO SCALE architecture in telecom &
networking infrastructure
– IBM CoreConnect™ on-chip bus

2G & 2.5G Cellular Networks 21


Virtex-II Pro Enables Transition
from Parallel to Serial I/Fs
IOB
Input SelectI/O-Ultra™
Reg DDR m ux
OCK1 Reg technology for
IC K1
Reg parallel interfaces
OCK2 3-State Reg
IC K2
• 25 I/O Standards
Reg DDR m ux
OCK1 • XCITE Technology
PAD
Reg
OCK2 O utput • 840 M bps LVDS
• Dedicated DDR
Registers
Gb Serial Gb Serial DDR P
Transceiver Transceiver FF N
32b @ 32b @
78 MHz 78 MHz IOB

Rocket I/O Multi-Gigabit Serial Transceiv ers • Helps preserve investment in legacy designs
Up to Twenty Four 3.125 Gbps transceivers • Eases transition from parallel to serial technology
• Parallel interface designs will not go away

2G & 2.5G Cellular Networks 22


The Virtex-II Pro Family

2G & 2.5G Cellular Networks 23


Virtex-II Platform FPGA
The Winning Architecture
•• #1
#1 FPGA
FPGA architecture
architecture
•• 150
150 nm
nm 8-layer
8-layer metal
metal CMOS
CMOS
•• Advanced
Advanced logic
logic && routing
routing
•• Highest
Highest density
density inin the
the industry
industry
•• Embedded
Embedded Dual
Dual Port
Port RAM
RAM

•• BlockRAM
BlockRAM
•• XtremeDSP™™ -- multipliers
XtremeDSP multipliers

•• DCM
DCM ™
•• XCITE
XCITE technology
technology -- DCI
DCI

•• SelectIO-Ultra
SelectIO-Ultra™
•• Triple
Triple DES
DES security
security
•• IP-Immersion™™ technology
IP-Immersion technology
2G & 2.5G Cellular Networks 24
Virtex-II Features
50 ✷
50 ✷
BRAM
18 Bit
36 Bit
Impedance
18 Bit Controller

Embedded DSP Embedded Dual-Port RAM - XCITE Digitally-Controlled


functionality - up to for Data Buffering Impedance (DCI) for
500 billion MAC/s simpler PCB layout
4000

CLKIN CLK0 4000XL Virtex


CLK90 3500
CLKFB CLK180
CLK2X 3000
RST CLK270
Delay (ps)

DSSEN CLK2X180 2500

PSINCDEC CLKDV 2000


CLKFX180
PSEN CLKFX 1500 Virtex-II
PSCLK STATUS[7:0]
LOCKED 1000
PSDONE
500
Φαστεστ ΦΠΓΑ ον τηε
clock signal Πλανετ
control signal 0
0 200 400 600 800 1000

Digital Clock LUTs Reached


SelectIO™
Management (DCM) - Active Interconnect
Technology with a 300 MHz 25 IO types including
Precise Clock 840 Mbps LVDS
Generation System Clock

2G & 2.5G Cellular Networks 25


The Virtex-II Family
Virtex-II XC2V XC2V XC2V XC2V XC2V XC2V XC2V XC2V XC2V XC2V XC2V
Part Number 40 80 250 500 1000 1500 2000 3000 4000 6000 8000
Logic Cells 576 1152 3456 6912 11520 17280 24192 32256 51840 76032 104832
BRAM (Kb) 72 144 432 576 720 864 1008 1728 2160 2592 3024
Multipliers 4 8 24 32 40 48 68 96 120 144 168
DCM Units 4 4 8 8 8 8 8 12 12 12 12
FG256 88 120 172 172 172
FG456 200 264 324
FG676 392 456 484
FF896 432 528 624
FF1152 720 824 824 824
FF1517 912 1104
BG575 328 392 408
BG728 456 516
BF957 624 684 684 684

11 Devices, 10 Packages, 34 combinations

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Low Cost Spartan-IIE FPGA
Total Cost Management for Consumer Products
• Hardware software co- • No obsolete inventory
development • Extend product life
• Fewer engineering man
through design upgrades
hours
• No NRE charges

• Cost-optimized silicon and packaging


• System features reduce discrete parts on boards
2G & 2.5G Cellular Networks 27 • Stock one part for many applications ®
Spartan-IIE Family at a Glance
Core Voltage 1.8 Volts
Architecture Virtex-E Based
5V Tolerant I/O Yes*
I/O Performance >300 MHz
Differential I/O Performance Up to 400 Mbps
19 standards
I/O Standards Supported
(including LVDS, BLVDS, and LVPECL
DLL's 4
M emory Distributed RAM + Block RAM
Densities 50K – 300K
system gates
Speed Grades -6 and –7
Packages TQ144, PQ208, FT256, FG456

* When a series resistor is used

2G & 2.5G Cellular Networks 28


Spartan-IIE Capabilities
• Flexible Clocking • Cost-optimized DSP
– Delay Locked Loops (DLL): clock – Nearly one billions MAC/s/$
multiply, divide, de-skew, and phase – System Generator tool bridges directly to
shift MathWorks DSP tool suite
• On-chip Memory – Reed Solomon, Viterbi Decoder,
Convolution Encoder, Interleaver/
– Parameterizable block RAM and De-interleaver, Color Space Converters,
distributed RAM
Other DSP building blocks
• Advanced Interfacing • Soft Processors and Other IP
– Support for 19 I/O standards:
• Chip to Backplane: PCI, GTL, GTL+, AGP 2X
– Over 200 algorithms and cores
• Chip to Memory: HSTL-I, HSTL-III, HSTL-IV, • Interfacing: Cardbus, Ethernet, POS-
SSTL3-I, SSTL3-II, SSTL2-I, SSTL2-II, CTT PHY 3
• Chip to Chip : LVTTL, LVCMOS2/18 • Processors: Mic roBlaze, PicoBlaze
• Differential: LVDS, BusLVDS, LVPECL CoreConnect, ARC
• General purpose: CAM, FIFOs, memory

2G & 2.5G Cellular Networks 29


Spartan-IIE - System Integration
$15 $6
$10

$4
$6
$7/$2

$30
$7.50

$6

Spartan-IIE system features eliminate the need for many discrete components.
Discrete cost savings can more than pay for the FPGA itself.

2G & 2.5G Cellular Networks 30


Xilinx CPLD Devices
Feature CoolRunner-II XPLA3 9500XL/XV
Core Voltage 1.8 3.3 3.3/2.5
Low Power FZP plus DataGATE FZP Low power mode
Global Clock 3 4 3
P-Term Inputs 40 40 54
Divide, Doubler &
Clock Management None None
CoolCLOCK
LVTTL, LVCMOS,
I/O Standards LVTTL, LVCMOS LVTTL, LVCMOS
HSTL, SSTL

I/O Banks 1 to 4 1 1 to 4 (XV) , 1 (XL)

Macrocells 32-512 32-512 36-288


tPD / Fmax 3.5 / 303 5 / 200 4.0 / 250
Security Multiple levels 1 level 1 level
Process Technology 0.18u 0.35u 0.35u / 0.25u

2G & 2.5G Cellular Networks 31


Xilinx Devices in
2G & 2.5G Systems
• Replacement of obsolete components and old ASICs
– Many 2G and 2.5G systems used discrete FIFOs,
FPGA memory is an attractive alternative in many cases
• System interfacing and glue-logic functions
– Enabling different devices such as ASICs, ASSPs, DSPs and
memories to be connected together
• Consolidation
– Smaller PALs and CPLDs used as glue logic in older designs
– Manufacturers consolidating into larger devices when boards
get revised

2G & 2.5G Cellular Networks 32


Xilinx Devices in
2G & 2.5G Systems
• New designs to replace obsolescent dedicated
DSP chips
– Exploit the enormous DSP processing capabilities
within a Platform-FPGA
• Digital Pre-distortion
– Reduce costs in the RF and power amplifiers by using
less, well-specified components
– Use high-speed DSP processing in a FPGA to
compensate for poor linearity in the RF stages

2G & 2.5G Cellular Networks 33


Digital Down Conversion
GSM Example

The GSM Spectral Mask


2G & 2.5G Cellular Networks 34
Digital Down Conversion
LogiCore Solution

• Input sample rate chosen to be 52 MHz


• The GSM channel can be supported with an output
sample rate of 270.8333 kHz
• Resulting sample rate change = 192

2G & 2.5G Cellular Networks 35


Digital Down Conversion
Results
• Resulting Output
– Easily meets Spectral Mask
• FPGA Resources Required
– 1,373 Logic Slices
– 1 Embedded Multiplier
– 1 Block RAM

For more details please visit:


http://www.xilinx.com/ipcenter/catalog/search/logicore/xilinx_digital_down_converter.htm

2G & 2.5G Cellular Networks 36


Xilinx IP/Cores
Time-to-Market Advantage

ASIC Design Cycle

FPGA Design Cycle Reduce design implementation / verification time

Complex designs optimized and verified


IP / Cores Reduce implementation and customization time

System Platforms: e.g prototyping boards further reduce design time

2G & 2.5G Cellular Networks 37


IP Center
http://www.xilinx.com/ipcenter
• Keep up-to-date with the
latest cores and reference
designs available from Xilinx
and our AllianceCore
partners

2G & 2.5G Cellular Networks 38


Wireless IP
Currently Available
• Reed Solomon • Viterbi Encoder/Decoder
• FIR Filter Generator • Turbo Convolutional
Encoder/Decoder
– Polyphase decimator
– Polyphase interpolator
• 3GPP Interleaver/De-interleaver
• Digital Down Converter
– Halfband filters
• PN Sequence Generator
– Hilbert transform
– Gold code support
• FFTs • Correlators
• Direct Digital Synthesizer • High Speed Viterbi (>150MHz)
(NCO) • Turbo Product Codecs
– Includes quadrature output

Many more under development


2G & 2.5G Cellular Networks 39
Xilinx Design Services
Expertise
• Design case studies and evaluations
can be undertaken for customers
• Xilinx Design Services have already
done designs for W-CDMA base-band
processing
• Can offer software and hardware
support/development for the customer

2G & 2.5G Cellular Networks 40


Summary
• Xilinx devices have an established track record
across the range of cellular technologies
• Xilinx devices offer the best way of mitigating
obsolescence issues in existing 2G network
systems
• Virtex-II & Virtex-II Pro FPGAs have all the
features needed to meet the challenge of future
wireless basestation signal processing
requirements

2G & 2.5G Cellular Networks 41


Questions?

espteam@xilinx.com

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