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5 4 3 2 1

PAGE
1
CONTENTS
COVER
A78LK-M3S ( RS780&SB710 )
2 BLOCK DIAGRAM
D D
3 POWER DELIVERY
4
5
CLOCK DISTRIBUTION
REVISION HISTROY
REV 7.0
6-10 SKT 941 K8 AM3 CPU
11 CPU DECOUPLING
12 DDR CLK BYPASS
13 DDR3 DIMM A1 DDR3 X 2 Dual channel , PCI-Ex16 X 1 , PCI X 1 ,
14 DDR3 DIMM B1
15 ADO FUNCTION Realtek 10/100 PCI-E Lan , AMD AM3
16 RS780-HT LINK
17 RS780-PCIE
18 RS780-SYSTEM
19 RS780-PWOER&SBD_MEM
C 20 CLOCK GEN
C
21
22
SB710-PCIE/PCI/CPU/LPC
SB710-ACPI/GPIO/USB/AUD DATE :2012/07/17
23 SB710-SATA/IDE/HWM/SPI
24 SB710-POWER&DECOUPLING
25 SB710-STRAPS
26 CRT
27 PCI-E 16X SLOT
28 PCI SLOT
29 IDE
30 USB CONN
31 CODEC VT1708B/ALC662
32 AUDIO CONNECTOR
B 33 SUPER I/O ITE8728 B
34 FAN CONTROL
35 PS2 CONN 『BIOSTAR'S PROPRIETARY INFORMATION』
36 COM&LPT CONNECTOR
37
38
ATX PWR / FRONT PANEL / LED
OVER VOLTAGE IC
『Any unauthorized use, reproduction, duplication,
39 FRONT USB or disclosure of this document will be subject to
40 PWRGD / MISC DC-DC
41 VCC_CORE DC-DC CONVER
the applicable civil and/or criminal penalties.』
42 MEMORY POWER
43 NB/SB CORE POWER
44 Realtek RTL8105T
45 BOM
A A

Title
COVER
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 1 of 45

5 4 3 2 1
5 4 3 2 1
DDRIII 800-1333 UNBUFFERED
AMD DDRIII

128bit
DIMM1
AM3/AM2+
AM3 DDRIII 800-1333 UNBUFFERED
SOCKET DDRIII
Clock Generator
D RTM880N-793
DIMM2 D
HyperTransport 16x16 DDRIII FIRST LOGICAL DIMM

OUT
LINK

IN
DVI/TMDS CON TMDS
AMD NB
RS740G
HyperTransport LINK0 CPU I/F
VGA CON
INTEGRATED GRAPHICS
LVTM
PCIE 1 16X PCIE VIDEO I/F
16X 16X
SLOT1 1 1X PCIE I/F

C C
4X
GIGABIT PCIE
Realtek 4 1X PCIE PCIE GPP0
INTERFACE X1
RTL8111C SPI I/F SPI ROM

ATI SB
USB-5 USB-4 USB-3 USB-2 USB-1 USB-0 USB 2.0
SB710
AZILIA
USB2.0 (12) HD AUDIO I/F
CODEC
SATA II (6)
AC97 2.3/ AZALIA
SATA#0 SATA#1 SATA#2 SATA#3 SATA#4 SATA#5
ATA 66/100/133 SATA II I/F
USB-6 USB-7 USB-8 USB-9 USB-10 USB-11
ACPI
LPC I/F
BOOTSTRAPS I2C I/F INT RTC ATA 66/100/133 I/F IDE1
B ROM (SB) B
HW MONITOR

PCI BUS
HW
MONITOR

PCI SLOT #1 PCI SLOT #2 PCI SLOT #3

ITE LPC SIO 8716/8718


DESKTOP M2 POWER

A RS760G
CORE &
A
PCIE FLOPPY KBD HW
POWER MOUSE MONITOR
Title
DDR MEMORY POWER BLOCK DIAGRAM
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 2 of 45

5 4 3 2 1
5 CPU
4 2.5V SHUNT 3 2 CPU_VDDA_RUN (S0, S1) AM3 1
VDDA 2.5V 0.2A
ATX P/S WITH 1A STBY CURRENT PW REGULATOR
VDD_CPUCORE_RUN (S0, S1)/VDD_CPUNB_RUN (S0, S1) VDDCORE
5VSB 5V 3.3V 12V -12V 12V 0.8-1.55V 110A
+/-5% +/-5% +/-5% +/-5% +/-5% +/-5% CPU_VTT_SUS (S0,S1,S3)
DDRIII MEM I/F
CPU_VDDIO_SUS(S0,S1,S3)
VTT 2A, VDD 10A
VRM SW VLDT 1.2V 0.5A
REGULATOR
DDRII DIMMs
0.9V VTT_DDR
RS780
D +5VDUAL_MEM (S0,S5)
REGULATOR VTT_DDR 2A
VDDHT/RX 1.1V 1.2A
D
1.8V VDD SW
REGULATOR VDD MEM 12A VDDHTTX 1.2V 0.5A
VCC 1.1V SW +1.1V RX780/RS780; +1.2V RS740 (S0, S1) VDDPCIE 1.1V 2A
REGULATOR NB CORE VDDC
VCC 1.1V SW +1.1V RX780/RS780; +1.2V RS740 (S0, S1) 1.1V 7A
REGULATOR VDDA18PCIE 1.8V 0.9A
+1.8V(S0, S1) PLLs 1.8V 0.1A
1.8V LINEAR
REGULATOR 1.5V LINEAR +1.5V(S0, S1) VDD18/VDD18_MEM
REGULATOR 1.8V 0.01A
VCC 1.2V SW +1.2V(S0, S1)
REGULATOR VDD_MEM 1.8V/1.5V 0.5A
AVDD 3.3V 0.135A
+3.3VSB (S0, S1, S3, S4, S5)
+3.3VDUAL (S0, S1, S3, S4, S5) SB700
+3.3VSB REGULATOR X4 PCI-E 0.8A
ACPI CONTROLLER
C +5VDUAL (S0, S1, S3, S4, S5) ATA I/O 0.5A C
ATA PLL 0.01A
PCI-E PVDD 80mA
SB CORE 0.6A
CLOCK
1.2V STB LDO +1.2VSB (S5) 1.2V S5 PW 0.22A
REGULATOR
3.3V S5 PW 0.01A
USB CORE I/O 0.2A
3.3V I/O 0.45A

AZALIA CODEC CON


B 3.3V CORE 0.3A B
5V ANALOG 0.1A
12V 0.1A

PCI Slot (per slot) X1 PCIE per X16 PCIE X16 PCIE USB X6 FR USB X6 RL 2XPS/2 GBE

A 5V 5.0A 3.3V 3.0A 3.3V 3.0A 3.3V 3.0A VDD VDD 5VDual 3.3V 0.5A (S0, S1) A
3.3V 7.6A 5VDual 5VDual 3.3V 0.1A (S3)
12V 0.5A 12V 5.5A 12V 5.5A 1.0A
12V 0.5A 2.0A 2.0A
3.3Vaux 0.1A
3.3Vaux 0.375A Title

-12V 0.1A
POWER DELIVERY
Size Document Number Rev
+3.3VDUAL (S0, S1, S3) Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 3 of 45

5 4 3 2 1
5 4 3 2 1

1 PAIR CPU CLK CPU_HT_CLK


DIMM1 DIMM2 200MHZ PCI CLK0
HT ref clock PCI SLOT 0
NB_HT_CLK 33MHZ
100MHZ DIFF(RX780/RS780)

PCI CLK1
D D
3 PAIR MEM CLK

3 PAIR MEM CLK


PCI SLOT 1
3 PAIR MEM CLK

3 PAIR MEM CLK


HT REFCLK 25M_48M_66M_OSC 33MHZ
66MHz SE(RS740)

14.318MHZ OSC AMD SB PCI CLK2


PCI SLOT 2
SB700 33MHZ
(RS740/RX780)
HT REFCLK AMD NB NB Disp clock NB_DISP_CLK LPC_CLK0
TPM
66MHz SE(RS740) RS780 100MHZ DIFF(RS780) 33MHZ
AM3/AM2g2 CPU 1 PAIR CPU CLK 100MHz
200MHZ DIFF(RX780/RS780)
LPC CLK1
AM3 SOCKET LPC BIOS
NB-OSCIN GPP Ref clock
GPP_CLK3 33MHZ
14.318MHZ 100MHZ
NB PCIE Ref clock PCIE_RCLK/ PCI CLK3
PCIE GPP CLK DEBUG POST TPM (BCM5755/5761)
NB_LNK_CLK 33MHZ
100MHZ 100MHZ
PCI CLK4
PCIE GPP CLK
33MHZ SUPER IO
100MHZ
IT8728
C EXTERNAL
C
CLK GEN. NB GFX PCIE CLK
100MHZ SB_BITCLK
NB GPP PCIE CLK HD AUDIO CON
48MHZ
100MHZ (RX780)

PCIE GFX CLK GFX Ref clock SLT_GFX_CLK


100MHZ PCIE GFX SLOT 1 - 16 LANES 100MHZ

PCIE GPP CLK GPP Ref clock GPP_CLK0


100MHZ PCIE GPP SLOT 1 - 1 LANE 100MHZ

PCIE GPP CLK GPP Ref clock GPP_CLK1


100MHZ PCIE GPP SLOT 2 - 4 LANES 100MHZ

25MHz
PCIE GPP CLK GPP Ref clock GPP_CLK2
100MHZ PCIE GBE 100MHZ

25MHZ OSC INPUT


USB CLK
B 48MHZ
USB_CLK B

32.768KHz
SATA
25MHz
SIO CLK
48MHZ

A External clock mode A


Internal clock mode
Title
CLOCK DISTRIBUTION
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 4 of 45

5 4 3 2 1
5 4 3 2 1
1.Change NB to RS780
2.Change SUPER IO to IT8728
3.Change Codec to VT1708B
4.Change Lan Chip to RTL8105T
D 5.Remove Floppy Connector D
6.Remove SPDIF Out Connector
7.Modify BAT Socket

C C

B B

A A

Title
REVISION HISTORY
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 5 of 45

5 4 3 2 1
5 4 3 2 1

D D

HyperTransport
CPU1A

HTCPU_UPCLK1 N6 AD5 HTCPU_DWNCLK1


16 HTCPU_UPCLK1 L0_CLKIN_H1 L0_CLKOUT_H1 HTCPU_DWNCLK1 16
HTCPU_UPCLK1_ P6 AD4 HTCPU_DWNCLK1_
16 HTCPU_UPCLK1_ L0_CLKIN_L1 L0_CLKOUT_L1 HTCPU_DWNCLK1_ 16
HTCPU_UPCLK0 N3 AD1 HTCPU_DWNCLK0
16 HTCPU_UPCLK0 L0_CLKIN_H0 L0_CLKOUT_H0 HTCPU_DWNCLK0 16
HTCPU_UPCLK0_ N2 AC1 HTCPU_DWNCLK0_
16 HTCPU_UPCLK0_ L0_CLKIN_L0 L0_CLKOUT_L0 HTCPU_DWNCLK0_ 16
HTCPU_UPCNTL1 V4 Y6 HTCPU_DWNCNTL1
16 HTCPU_UPCNTL1 L0_CTLIN_H1 L0_CTLOUT_H1 HTCPU_DWNCNTL1 16
HTCPU_UPCNTL1_ V5 W6 HTCPU_DWNCNTL1_
16 HTCPU_UPCNTL1_ L0_CTLIN_L1 L0_CTLOUT_L1 HTCPU_DWNCNTL1_ 16
HTCPU_UPCNTL U1 W2 HTCPU_DWNCNTL
16 HTCPU_UPCNTL HTCPU_UPCNTL_ L0_CTLIN_H0 L0_CTLOUT_H0 HTCPU_DWNCNTL_ HTCPU_DWNCNTL 16
16 HTCPU_UPCNTL_ V1 W3 HTCPU_DWNCNTL_ 16
L0_CTLIN_L0 L0_CTLOUT_L0

HTCPU_UP15 U6 Y5 HTCPU_DWN15
HTCPU_UP_15 L0_CADIN_H15 L0_CADOUT_H15 HTCPU_DWN_15
V6 Y4
C HTCPU_UP14
HTCPU_UP_14
T4
L0_CADIN_L15
L0_CADIN_H14
L0_CADOUT_L15
L0_CADOUT_H14
AB6 HTCPU_DWN14
HTCPU_DWN_14
C
T5 AA6
HTCPU_UP13 L0_CADIN_L14 L0_CADOUT_L14 HTCPU_DWN13
R6 AB5
HTCPU_UP_13 L0_CADIN_H13 L0_CADOUT_H13 HTCPU_DWN_13
T6 AB4
HTCPU_UP12 L0_CADIN_L13 L0_CADOUT_L13 HTCPU_DWN12
P4 AD6
HTCPU_UP_12 L0_CADIN_H12 L0_CADOUT_H12 HTCPU_DWN_12
P5 AC6
HTCPU_UP11 L0_CADIN_L12 L0_CADOUT_L12 HTCPU_DWN11
M4 AF6
HTCPU_UP_11 L0_CADIN_H11 L0_CADOUT_H11 HTCPU_DWN_11
M5 AE6
HTCPU_UP10 L0_CADIN_L11 L0_CADOUT_L11 HTCPU_DWN10
L6 AF5
HTCPU_UP_10 L0_CADIN_H10 L0_CADOUT_H10 HTCPU_DWN_10
M6 AF4
HTCPU_UP9 L0_CADIN_L10 L0_CADOUT_L10 HTCPU_DWN9
K4 AH6
HTCPU_UP_9 L0_CADIN_H9 L0_CADOUT_H9 HTCPU_DWN_9
K5 AG6
HTCPU_UP8 L0_CADIN_L9 L0_CADOUT_L9 HTCPU_DWN8
J6 AH5
HTCPU_UP_8 L0_CADIN_H8 L0_CADOUT_H8 HTCPU_DWN_8
K6 AH4

HT LINK
L0_CADIN_L8 L0_CADOUT_L8
HTCPU_UP7 U3 Y1 HTCPU_DWN7
HTCPU_UP_7 L0_CADIN_H7 L0_CADOUT_H7 HTCPU_DWN_7
U2 W1
HTCPU_UP6 L0_CADIN_L7 L0_CADOUT_L7 HTCPU_DWN6
R1 AA2
HTCPU_UP_6 L0_CADIN_H6 L0_CADOUT_H6 HTCPU_DWN_6
T1 AA3
HTCPU_UP5 L0_CADIN_L6 L0_CADOUT_L6 HTCPU_DWN5
R3 AB1
HTCPU_UP_5 L0_CADIN_H5 L0_CADOUT_H5 HTCPU_DWN_5
R2 AA1
HTCPU_UP4 L0_CADIN_L5 L0_CADOUT_L5 HTCPU_DWN4
N1 AC2
HTCPU_UP_4 L0_CADIN_H4 L0_CADOUT_H4 HTCPU_DWN_4
P1 AC3
L0_CADIN_L4 L0_CADOUT_L4
B HTCPU_UP3
HTCPU_UP_3
L1
M1
L0_CADIN_H3 L0_CADOUT_H3
AE2
AE3
HTCPU_DWN3
HTCPU_DWN_3 B
HTCPU_UP2 L0_CADIN_L3 L0_CADOUT_L3 HTCPU_DWN2
L3 AF1
HTCPU_UP_2 L0_CADIN_H2 L0_CADOUT_H2 HTCPU_DWN_2
L2 AE1
HTCPU_UP1 L0_CADIN_L2 L0_CADOUT_L2 HTCPU_DWN1
J1 AG2
HTCPU_UP_1 L0_CADIN_H1 L0_CADOUT_H1 HTCPU_DWN_1
K1 AG3
HTCPU_UP0 L0_CADIN_L1 L0_CADOUT_L1 HTCPU_DWN0
J3 AH1
HTCPU_UP_0 L0_CADIN_H0 L0_CADOUT_H0 HTCPU_DWN_0
J2 AG1
L0_CADIN_L0 L0_CADOUT_L0
HTCPU_UP[15..0] HTCPU_DWN[15..0]
16 HTCPU_UP[15..0] HTCPU_DWN[15..0] 16
SOCKET AM3 941 SMD
HTCPU_UP_[15..0] HTCPU_DWN_[15..0]
16 HTCPU_UP_[15..0] HTCPU_DWN_[15..0] 16

A A
Title
K8 CPU HT
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 6 of 45

5 4 3 2 1
5 4 3 CQ1
2 1
B
C CPU_THERMTRIP# 22
Vout=Vref (1.25V) X ( 1+R2/R1 ) CPU_THERMTRIP E
+1.5V_SUS
=2.5V 2.5VDDA 2N3904 SOT23
CRN1 CRN6
CC1 +5V 1K 8P4R 0402 1K 8P4R 0402

1
1 2

2
4
6
8
2
4
6
8
+1.5V_SUS CQ2 CR3 + CCT1 CC2
1UF 16V 0805 Y5V
R1 49.9 1% 0402 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V
I
+1.5V_SUS
D O
D

2
A

1
3
5
7
1
3
5
7
R567
300 0402 AZ1117H-ADJ SOT-223
K8_VID5 41

2
4
6
8
CR6
CPU1D K8_VID4 41
CPU_DBREQ# R2 49.9 1% 0402 RN1
K8_VID3 41
330 8P4R 0402
K8_VID2 41
C10 K8_VID1 41 PVI PWM-->VID1-->HI

1
3
5
7
D10 VDDA_1
20 CPU_CLK
CPU_CLK CC3 3900P 50V X7R 0402 VDDA_2 MISC. K8_VID0 41
CPU_CORE_FB CR13 169 1% 0402 A8
CLKIN_H
CLOSE TO CPU B8 G5 PVI PWM-->FLOATING
2

CPU_CLK_ CC4 3900P 50V X7R 0402 CLKIN_L CORE_TYPE


20 CPU_CLK_
CC5 HTCPU_PWRGD C9 D2
PWROK VID5 K8_VID5 41
0.1UF 16V Y5V 0402 /NI HTCPU_STOP_ D8 D1
LDTSTOP_L VID4 K8_VID4 41
LDT_RST# C7 C1 K8_VID3 41
1

CPU_CORE_FB_ RESET_L SVC/VID3


E3 K8_VID2 41
SVD/VID2
22 CPU_PRESENT# AL3 E2 K8_VID1 41
CPU_PRESENT_L PVIEN/VID1 E1
VID0 K8_VID0 41
CR8 10K 0402
+1.5V_SUS
8 7 SIO_SID AL6 AG9 CPU_THERMDCC CR15 0 0402 /NI
+1.5V_SUS 33 SIO_SIC SIC THERMDC CPU_THERMDC 33
6 5 SIO_SIC AK6 AG8 CPU_THERMDAA CR9 0 0402 /NI
33 SIO_SID SID THERMDA CPU_THERMDA 33
4 3 ALERT SA0 AK4 AK7 CPU_THERMTRIP
+1.5V_SUS ALERT SA0 THERMTRIP_L CPU_PROCHOT#
2 1 AL4 AL7 CPU_PROCHOT# 21
ALERT_L PROCHOT_L
RN64 AL10 AK10
1K 8P4R 0402 TDI TDO
AJ10
CR17 TRST_L
C 16.9 1% 0402
AH10
AL9
TCK
TMS
C
CPU_M_VREFF CPU_DBREQ# A5 B6
DBREQ_L DBRDY
CPU_CORE_FB G2 AK11
41 CPU_CORE_FB
1

CPU_CORE_FB- G1 VDD_FB_H VDDIO_FB_H AL11


CR21 CC29 CC30 41 CPU_CORE_FB_ VDD_FB_L VDDIO_FB_L
G4
16.9 1% 0402 1UF 10V Y5V 0402 1000P 50V X7R 0402 VDDNB_FB_H
F3 G3
M_VDDIO_PWRGD VDDNB_FB_L
2

E12 F1
VDDR_SENSE PSI_L
CPU_M_VREFF F12 V8 CR18 44.2 1% 0402
M_VREF HTREF1 +1.2V_HT
CR19 39.2 1% 0402 AH11 V7 CR20 44.2 1% 0402
+1.5V_SUS M_ZN HTREF0
CR22 39.2 1% 0402 AJ11
M_ZP
+1.5V_SUS CR23 510 1% 0402 A10 C11 FBCLKOUT CR24 80.6 1% 0402
CR25 510 1% 0402 TEST25_H TEST29_H FBCLKOUT*
B10 D11
TEST19 TEST25_L TEST29_L
F10
TEST19
8/5/8/20
8 7 TEST18 TEST18 E9 LAYOUT: ROUTE 80 OHM DIFF IMPEDENCE
2
4
6
8

TEST15 TEST18
6 5 AJ7
TEST13
LAYOUT: PLACE WITHIN 1 INCH OF CPU
CRN3 4 3 TEST14 F6 AK8 TEST24
330 8P4R 0402 TEST26 TEST9 TEST24 CRN2
2 1 AH8
TEST23 TEST22
D6 AJ9 8 7
1
3
5
7

CRN5 TEST17 TEST22 TEST21 TEST27


E7 AL8 6 5
330 8P4R 0402 TEST15 TEST16 TEST21 TEST20 TEST21
F8 AJ8 4 3
LDT_RST# TEST14 TEST15 TEST20 TEST19
18,21 LDT_RST# C5 2 1
HTCPU_STOP_ TEST12 TEST14
AH9 J10
B 18,21 LDT_STOP#
21 HTCPU_PWRGD
HTCPU_PWRGD
E5
TEST12 TEST28_H
TEST28_L
H9
AK9 TEST27
330 8P4R 0402
B
CPUCLKP TEST7 TEST27 TEST26 CRN4
20 CPU_CLK AJ5 AK5
CPUCLKN AH7 TEST6 TEST26 G7 TEST22 8 7
20 CPU_CLK_ TEST3 TEST10
AJ6 D4 TEST12 6 5 +1.5V_SUS
HTCPUPWRGD TEST2 TEST8 TEST24
21 HTCPU_PWRGD 4 3
TEST20 2 1
18,21 LDT_RST# LDTRST C18 L30
C20 RSVD1 RSVD9 L31 1K 8P4R 0402
2V5VDDA RSVD2 RSVD10
2.5VDDA F2 AD25
RSVD3 RSVD11
G24 AE24
1P5SUS RSVD4 RSVD12
G25 AE25
+1.5V_SUS
H25
RSVD5
RSVD6
INT. MISC. RSVD13
RSVD14
AJ18
+V_CPU VCPU L25 AJ20
RSVD7 RSVD15
L26 AK3
RSVD8 RSVD16

Near CPU

SOCKET AM3 941 SMD

A A

Title
K8 CPU MISC
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 7 of 45

5 4 3 2 1
5 4 3 2 1

CPU1B
MEM_MA_DATA[0..63]
MEM_MA_DATA[0..63] 13
AG21 AE14 MEM_MA_DATA63
MA_CLK_H7 MA_DATA63 MEM_MA_DATA62
AG20 AG14
AE20 MA_CLK_L7 MA_DATA62 AG16 MEM_MA_DATA61
MA_CLK_H6 MA_DATA61 MEM_MA_DATA60
AE19 AD17
MA_CLK_L6 MA_DATA60
D U27
U26
MA_CLK_H5
MA_CLK_L5
MA_DATA59
MA_DATA58
AD13
AE13
MEM_MA_DATA59
MEM_MA_DATA58 D
V27 AG15 MEM_MA_DATA57
13 MEM_MA0_CLK_H0 MA_CLK_H4 MA_DATA57
W27 AE16 MEM_MA_DATA56
13 MEM_MA0_CLK_L0 MA_CLK_L4 MA_DATA56
W26 AG17 MEM_MA_DATA55
MA_CLK_H3 MA_DATA55 MEM_MA_DATA54
W25 AE18
MA_CLK_L3 MA_DATA54 MEM_MA_DATA53
13 MEM_MA0_CLK_H1 U24 AD21
MA_CLK_H2 MA_DATA53 MEM_MA_DATA52
13 MEM_MA0_CLK_L1 V24 AG22
G19 MA_CLK_L2 MA_DATA52 AE17 MEM_MA_DATA51
MA_CLK_H1 MA_DATA51 MEM_MA_DATA50
H19 AF17
MA_CLK_L1 MA_DATA50 MEM_MA_DATA49
G20 AF21
MA_CLK_H0 MA_DATA49 MEM_MA_DATA48
G21 AE21
MA_CLK_L0 MA_DATA48 MEM_MA_DATA47
AF23
MA_DATA47 MEM_MA_DATA46
AE23
MA_DATA46 MEM_MA_DATA45
AJ26
MA_DATA45 MEM_MA_DATA44
13 MEM_MA0_CS_L1 AC25 AG26
MA0_CS_L1 MA_DATA44 MEM_MA_DATA43
13 MEM_MA0_CS_L0 AA24 AE22
MA0_CS_L0 MA_DATA43 MEM_MA_DATA42
AG23
AE28 MA_DATA42 AH25 MEM_MA_DATA41
13 MEM_MA0_ODT1 MA0_ODT1 MA_DATA41
AC28 AF25 MEM_MA_DATA40
13 MEM_MA0_ODT0 MA0_ODT0 MA_DATA40
AJ28 MEM_MA_DATA39
MA_DATA39 MEM_MA_DATA38
AD27 AJ29
MA1_CS_L1 MA_DATA38 MEM_MA_DATA37
AA25 AF29
MA1_CS_L0 MA_DATA37 MEM_MA_DATA36
AE26
MA_DATA36 MEM_MA_DATA35
AE27 AJ27
MA1_ODT1 MA_DATA35 MEM_MA_DATA34
AC27 AH27
MA1_ODT0 MA_DATA34 MEM_MA_DATA33
AG29
MA_DATA33 MEM_MA_DATA32
C 13 MEM_MA_RESET_L E20

AB25
MA_RESET_L MA_DATA32
MA_DATA31
AF27
E29
E28
MEM_MA_DATA31
MEM_MA_DATA30
C
13 MEM_MA_CAS_L MA_CAS_L MA_DATA30
AB27 D27 MEM_MA_DATA29
13 MEM_MA_WE_L MA_WE_L MA_DATA29
AA26 C27 MEM_MA_DATA28
13 MEM_MA_RAS_L MA_RAS_L MA_DATA28
G26 MEM_MA_DATA27
N25 MA_DATA27 F27 MEM_MA_DATA26
13 MEM_MA_BANK2 MA_BANK2 MA_DATA26
Y27 C28 MEM_MA_DATA25
13 MEM_MA_BANK1 MA_BANK1 MA_DATA25
AA27 E27 MEM_MA_DATA24
13 MEM_MA_BANK0 MA_BANK0 MA_DATA24
F25 MEM_MA_DATA23
MA_DATA23 MEM_MA_DATA22
13 MEM_MA_CKE1 L27 E25
MA_CKE1 MA_DATA22 MEM_MA_DATA21
13 MEM_MA_CKE0 M25 E23
MA_CKE0 MA_DATA21 MEM_MA_DATA20
D23
MA_DATA20

MEM CHA
MEM_MA_ADD[15..0] E26 MEM_MA_DATA19
13 MEM_MA_ADD[15..0] MA_DATA19
MEM_MA_ADD15 M27 C26 MEM_MA_DATA18
MEM_MA_ADD14 MA_ADD15 MA_DATA18 MEM_MA_DATA17
N24 G23
MEM_MA_ADD13 AC26 MA_ADD14 MA_DATA17 F23 MEM_MA_DATA16
MEM_MA_ADD12 MA_ADD13 MA_DATA16 MEM_MA_DATA15
N26 E22
MEM_MA_ADD11 MA_ADD12 MA_DATA15 MEM_MA_DATA14
P25 E21
MEM_MA_ADD10 MA_ADD11 MA_DATA14 MEM_MA_DATA13
Y25 F17
MEM_MA_ADD9 MA_ADD10 MA_DATA13 MEM_MA_DATA12
N27 G17
MEM_MA_ADD8 MA_ADD9 MA_DATA12 MEM_MA_DATA11
R24 G22
MEM_MA_ADD7 MA_ADD8 MA_DATA11 MEM_MA_DATA10
P27 F21
MEM_MA_ADD6 MA_ADD7 MA_DATA10 MEM_MA_DATA9
R25 G18
MEM_MA_ADD5 MA_ADD6 MA_DATA9 MEM_MA_DATA8
R26 E17
MEM_MA_ADD4 MA_ADD5 MA_DATA8 MEM_MA_DATA7
R27 G16
MEM_MA_ADD3 MA_ADD4 MA_DATA7 MEM_MA_DATA6
T25 E15
MEM_MA_ADD2 MA_ADD3 MA_DATA6 MEM_MA_DATA5
U25 G13
B MEM_MA_ADD1
MEM_MA_ADD0
T27
W24
MA_ADD2
MA_ADD1
MA_DATA5
MA_DATA4
H13
H17
MEM_MA_DATA4
MEM_MA_DATA3
B
MEM_MA_DQS_H[8..0] MA_ADD0 MA_DATA3 MEM_MA_DATA2
13 MEM_MA_DQS_H[8..0] E16
MEM_MA_DQS_H7 AD15 MA_DATA2 E14 MEM_MA_DATA1
MEM_MA_DQS_L7 MA_DQS_H7 MA_DATA1 MEM_MA_DATA0
AE15 G14
MEM_MA_DQS_H6 MA_DQS_L7 MA_DATA0
AG18
MEM_MA_DQS_L6 MA_DQS_H6 MEM_MA_DQS_H8
AG19 J28
MEM_MA_DQS_H5 MA_DQS_L6 MA_DQS_H8 MEM_MA_DQS_L8
AG24 J27
MEM_MA_DQS_L5 AG25 MA_DQS_H5 MA_DQS_L8
MEM_MA_DQS_H4 MA_DQS_L5 MEM_MA_DM8
AG27 J25
MEM_MA_DQS_L4 MA_DQS_H4 MA_DM8 MEM_MA_CHECK[7..0]
AG28 MEM_MA_CHECK[7..0] 13
MEM_MA_DQS_H3 MA_DQS_L4 MEM_MA_CHECK7
D29 K25
MEM_MA_DQS_L3 MA_DQS_H3 MA_CHECK7 MEM_MA_CHECK6
C29 J26
MEM_MA_DQS_H2 MA_DQS_L3 MA_CHECK6 MEM_MA_CHECK5
C25 G28
MEM_MA_DQS_L2 MA_DQS_H2 MA_CHECK5 MEM_MA_CHECK4
D25 G27
MEM_MA_DQS_H1 MA_DQS_L2 MA_CHECK4 MEM_MA_CHECK3
E19 L24
MEM_MA_DQS_L1 MA_DQS_H1 MA_CHECK3 MEM_MA_CHECK2
F19 K27
MEM_MA_DQS_H0 MA_DQS_L1 MA_CHECK2 MEM_MA_CHECK1
F15 H29
MEM_MA_DQS_L0 MA_DQS_H0 MA_CHECK1 MEM_MA_CHECK0
G15 H27
MEM_MA_DQS_L[8..0] MA_DQS_L0 MA_CHECK0
13 MEM_MA_DQS_L[8..0]
MEM_MA_DM7 AF15 W30
MA_DM7 MA_EVENT_L MEM_MA_EVENT_L 13
MEM_MA_DM6 AF19
MEM_MA_DM5 MA_DM6 CR41 1K 0402
AJ25 +1.5V_SUS
MEM_MA_DM4 MA_DM5
AH29
MEM_MA_DM3 MA_DM4
B29
MEM_MA_DM2 MA_DM3
E24
MEM_MA_DM1 MA_DM2
E18
MA_DM1
A 13 MEM_MA_DM[8..0]
MEM_MA_DM0
MEM_MA_DM[8..0]
H15
MA_DM0 A
SOCKET AM3 941 SMD

Title
K8 CPU MEMORY-1
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 8 of 45

5 4 3 2 1
5 4 3 2 1
CPU1C
MEM_MB_DATA[0..63]
MEM_MB_DATA[0..63] 14
AJ19 AH13 MEM_MB_DATA63
MB_CLK_H7 MB_DATA63 MEM_MB_DATA62
AK19 AL13
MB_CLK_L7 MB_DATA62 MEM_MB_DATA61
AL19 AL15
MB_CLK_H6 MB_DATA61 MEM_MB_DATA60
AL18 AJ15
MB_CLK_L6 MB_DATA60 MEM_MB_DATA59
U31 AF13
MB_CLK_H5 MB_DATA59 MEM_MB_DATA58
U30 AG13
W29 MB_CLK_L5 MB_DATA58 AL14 MEM_MB_DATA57
14 MEM_MB0_CLK_H0 MB_CLK_H4 MB_DATA57
W28 AK15 MEM_MB_DATA56
14 MEM_MB0_CLK_L0 MB_CLK_L4 MB_DATA56
D Y31
Y30
MB_CLK_H3
MB_CLK_L3
MB_DATA55
MB_DATA54
AL16
AL17
MEM_MB_DATA55
MEM_MB_DATA54 D
V31 AK21 MEM_MB_DATA53
14 MEM_MB0_CLK_H1 MB_CLK_H2 MB_DATA53
W31 AL21 MEM_MB_DATA52
14 MEM_MB0_CLK_L1 MB_CLK_L2 MB_DATA52
A18 AH15 MEM_MB_DATA51
MB_CLK_H1 MB_DATA51 MEM_MB_DATA50
A19 AJ16
MB_CLK_L1 MB_DATA50 MEM_MB_DATA49
C19 AH19
MB_CLK_H0 MB_DATA49 MEM_MB_DATA48
D19 AL20
MB_CLK_L0 MB_DATA48 AJ22 MEM_MB_DATA47
MB_DATA47 MEM_MB_DATA46
AL22
MB_DATA46 MEM_MB_DATA45
AL24
MB_DATA45 MEM_MB_DATA44
14 MEM_MB0_CS_L1 AE30 AK25
MB0_CS_L1 MB_DATA44 MEM_MB_DATA43
14 MEM_MB0_CS_L0 AC31 AJ21
MB0_CS_L0 MB_DATA43 MEM_MB_DATA42
AH21
MB_DATA42 MEM_MB_DATA41
14 MEM_MB0_ODT1 AF31 AH23
MB0_ODT1 MB_DATA41 MEM_MB_DATA40
14 MEM_MB0_ODT0 AD29 AJ24
MB0_ODT0 MB_DATA40 MEM_MB_DATA39
AL27
MB_DATA39 MEM_MB_DATA38
AE29 AK27
AB31 MB1_CS_L1 MB_DATA38 AH31 MEM_MB_DATA37
MB1_CS_L0 MB_DATA37 MEM_MB_DATA36
AG30
MB_DATA36 MEM_MB_DATA35
AG31 AL25
MB1_ODT1 MB_DATA35 MEM_MB_DATA34
AD31 AL26
MB1_ODT0 MB_DATA34 MEM_MB_DATA33
AJ30
MB_DATA33 MEM_MB_DATA32
14 MEM_MB_RESET_L B19 AJ31
MB_RESET_L MB_DATA32 MEM_MB_DATA31
E31
MB_DATA31 MEM_MB_DATA30
14 MEM_MB_CAS_L AC29 E30
MB_CAS_L MB_DATA30 MEM_MB_DATA29
14 MEM_MB_WE_L AC30 B27
MB_WE_L MB_DATA29 MEM_MB_DATA28
C 14 MEM_MB_RAS_L AB29

N31
MB_RAS_L MB_DATA28
MB_DATA27
A27
F29
F31
MEM_MB_DATA27
MEM_MB_DATA26
C
14 MEM_MB_BANK2 MB_BANK2 MB_DATA26
AA31 A29 MEM_MB_DATA25
14 MEM_MB_BANK1 MB_BANK1 MB_DATA25
AA28 A28 MEM_MB_DATA24
14 MEM_MB_BANK0 MB_BANK0 MB_DATA24
A25 MEM_MB_DATA23
M31 MB_DATA23 A24 MEM_MB_DATA22
14 MEM_MB_CKE1 MB_CKE1 MB_DATA22
M29 C22 MEM_MB_DATA21
14 MEM_MB_CKE0 MB_CKE0 MB_DATA21
D21 MEM_MB_DATA20
MEM_MB_ADD[15..0] MB_DATA20 MEM_MB_DATA19
A26

MEM CHB
14 MEM_MB_ADD[15..0] MB_DATA19
MEM_MB_ADD15 N28 B25 MEM_MB_DATA18
MEM_MB_ADD14 MB_ADD15 MB_DATA18 MEM_MB_DATA17
N29 B23
MEM_MB_ADD13 MB_ADD14 MB_DATA17 MEM_MB_DATA16
AE31 A22
MEM_MB_ADD12 MB_ADD13 MB_DATA16 MEM_MB_DATA15
N30 B21
MEM_MB_ADD11 MB_ADD12 MB_DATA15 MEM_MB_DATA14
P29 A20
MEM_MB_ADD10 MB_ADD11 MB_DATA14 MEM_MB_DATA13
AA29 C16
MEM_MB_ADD9 P31 MB_ADD10 MB_DATA13 D15 MEM_MB_DATA12
MEM_MB_ADD8 MB_ADD9 MB_DATA12 MEM_MB_DATA11
R29 C21
MEM_MB_ADD7 MB_ADD8 MB_DATA11 MEM_MB_DATA10
R28 A21
MEM_MB_ADD6 MB_ADD7 MB_DATA10 MEM_MB_DATA9
R31 A17
MEM_MB_ADD5 MB_ADD6 MB_DATA9 MEM_MB_DATA8
R30 A16
MEM_MB_ADD4 MB_ADD5 MB_DATA8 MEM_MB_DATA7
T31 B15
MEM_MB_ADD3 MB_ADD4 MB_DATA7 MEM_MB_DATA6
T29 A14
MEM_MB_ADD2 MB_ADD3 MB_DATA6 MEM_MB_DATA5
U29 E13
MEM_MB_ADD1 MB_ADD2 MB_DATA5 MEM_MB_DATA4
U28 F13
MEM_MB_ADD0 MB_ADD1 MB_DATA4 MEM_MB_DATA3
AA30 C15
MEM_MB_DQS_H[8..0] MB_ADD0 MB_DATA3 MEM_MB_DATA2
14 MEM_MB_DQS_H[8..0] A15
MEM_MB_DQS_H7 MB_DATA2 MEM_MB_DATA1
AK13 A13
B MEM_MB_DQS_L7
MEM_MB_DQS_H6
AJ13
AK17
MB_DQS_H7
MB_DQS_L7
MB_DATA1
MB_DATA0
D13 MEM_MB_DATA0
B
MEM_MB_DQS_L6 MB_DQS_H6 MEM_MB_DQS_H8
AJ17 J31
MEM_MB_DQS_H5 AK23 MB_DQS_L6 MB_DQS_H8 J30 MEM_MB_DQS_L8
MEM_MB_DQS_L5 MB_DQS_H5 MB_DQS_L8
AL23
MEM_MB_DQS_H4 MB_DQS_L5 MEM_MB_DM8
AL28 J29
MEM_MB_DQS_L4 MB_DQS_H4 MB_DM8 MEM_MB_CHECK[7..0]
AL29 MEM_MB_CHECK[7..0] 14
MEM_MB_DQS_H3 MB_DQS_L4 MEM_MB_CHECK7
D31 K29
MEM_MB_DQS_L3 C31 MB_DQS_H3 MB_CHECK7 K31 MEM_MB_CHECK6
MEM_MB_DQS_H2 MB_DQS_L3 MB_CHECK6 MEM_MB_CHECK5
C24 G30
MEM_MB_DQS_L2 MB_DQS_H2 MB_CHECK5 MEM_MB_CHECK4
C23 G29
MEM_MB_DQS_H1 MB_DQS_L2 MB_CHECK4 MEM_MB_CHECK3
D17 L29
MEM_MB_DQS_L1 MB_DQS_H1 MB_CHECK3 MEM_MB_CHECK2
C17 L28
MEM_MB_DQS_H0 MB_DQS_L1 MB_CHECK2 MEM_MB_CHECK1
C14 H31
MEM_MB_DQS_L0 MB_DQS_H0 MB_CHECK1 MEM_MB_CHECK0
C13 G31
MEM_MB_DQS_L[8..0] MB_DQS_L0 MB_CHECK0
14 MEM_MB_DQS_L[8..0]
MEM_MB_DM7 AJ14 V29
MB_DM7 MB_EVENT_L MEM_MB_EVENT_L 14
MEM_MB_DM6 AH17
MEM_MB_DM5 MB_DM6 CR42 1K 0402
AJ23 +1.5V_SUS
MEM_MB_DM4 MB_DM5
AK29
MEM_MB_DM3 MB_DM4
C30
MEM_MB_DM2 MB_DM3
A23
MEM_MB_DM1 MB_DM2
B17
MEM_MB_DM0 MB_DM1
B13
MEM_MB_DM[8..0] MB_DM0
14 MEM_MB_DM[8..0]

SOCKET AM3 941 SMD


A A

Title
K8 CPU MEMORY-2
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 9 of 45

5 4 3 2 1
5 4 3 2 1

+V_CPU +V_CPU +V_CPU


CPU1E +1.2V_HT +1.2V_HT
CPU1F CPU1G
CPU1H
B3 A3
C2 VDD_1 VSS_1 A7 T15 M12 A4 AA11
VDD_2 VSS_2 VDD_86 VSS_86 VDDNB_1 VSS_171
C4 A9 T17 M14 A6 AA13 AJ1 H1
VDD_3 VSS_3 VDD_87 VSS_87 VDDNB_2 VSS_172 VLDT_A_1 VLDT_B_1
D D3
D5
VDD_4
VDD_5
VSS_4
VSS_5
A11
B4
T19
T21
VDD_88
VDD_89
VSS_88
VSS_89
M16
M18
B5
B7
VDDNB_3
VDDNB_4
VSS_173
VSS_174
AA15
AA17
AJ2
AJ3
VLDT_A_2
VLDT_A_3
VLDT_B_2
VLDT_B_3
H2
H5 D
E4 B9 T23 M20 C6 AA19 AJ4 H6
VDD_6 VSS_6 VDD_90 VSS_90 VDDNB_5 VSS_175 VLDT_A_4 VLDT_B_4
E6 B11 U8 M22 C8 AA21
VDD_7 VSS_7 VDD_91 VSS_91 VDDNB_6 VSS_176 +1.2V_HT
F5 B14 U10 N4 D7 AA23
VDD_8 VSS_8 VDD_92 VSS_92 VDDNB_7 VSS_177 +1.2V_HT
F7 B16 U12 N5 D9 AB2 A12 AG12
VDD_9 VSS_9 VDD_93 VSS_93 VDDNB_8 VSS_178 VDDR_1 VDDR_5
G6 B18 U14 N7 E8 AB3 B12 AH12
VDD_10 VSS_10 VDD_94 VSS_94 VDDNB_9 VSS_179 VDDR_2 VDDR_6
G8 B20 U16 N9 E10 AB8 C12 AJ12
H7 VDD_11 VSS_11 B22 U18 VDD_95 VSS_95 N11 F9 VDDNB_10 VSS_180 AB10 D12 VDDR_3 VDDR_7 AK12
VDD_12 VSS_12 VDD_96 VSS_96 VDDNB_11 VSS_181 VDDR_4 VDDR_8
H11 B24 U20 N13 F11 AB12 AL12
VDD_13 VSS_13 VDD_97 VSS_97 VDDNB_12 VSS_182 VDDR_9
H23 B26 U22 N15 G10 AB14
VDD_14 VSS_14 VDD_98 VSS_98 VDDNB_13 VSS_183
J8 B28 V9 N17 G12 AB16 +1.5V_SUS M24
VDD_15 VSS_15 VDD_99 VSS_99 VDDNB_14 VSS_184 VDDIO_1
J12 B30 V11 N19 AB18 M26 AF18
VDD_16 VSS_16 VDD_100 VSS_100 VSS_185 VDDIO_2 VSS_215
J14 C3 V13 N21 AB20 M28 AF20
VDD_17 VSS_17 VDD_101 VSS_101 VSS_186 VDDIO_3 VSS_216
J16 D14 V15 N23 AB22 M30 AF22
VDD_18 VSS_18 VDD_102 VSS_102 VSS_187 VDDIO_4 VSS_217
J18 D16 V17 P2 AC7 P24 AF24

POWER/GND4
VDD_19 VSS_19 VDD_103 VSS_103 VSS_188 VDDIO_5 VSS_218
J20 D18 V19 P3 AC9 P26 AF26
VDD_20 VSS_20 VDD_104 VSS_104 VSS_189 VDDIO_6 VSS_219
J22 D20 V21 P8 AC11 P28 AF28

POWER/GND3
J24 VDD_21 VSS_21 D22 V23 VDD_105 VSS_105 P10 VSS_190 AC13 P30 VDDIO_7 VSS_220 AG10
VDD_22 VSS_22 VDD_106 VSS_106 VSS_191 VDDIO_8 VSS_221
K7 D24 W4 P12 AC15 T24 AG11
VDD_23 VSS_23 VDD_107 VSS_107 VSS_192 VDDIO_9 VSS_222
K9 D26 W5 P14 AC17 T26 AH14
VDD_24 VSS_24 VDD_108 VSS_108 VSS_193 VDDIO_10 VSS_223
K11 D28 W8 P16 AC19 T28 AH16
VDD_25 VSS_25 VDD_109 VSS_109 VSS_194 VDDIO_11 VSS_224
K13 D30 W10 P18 AC21 T30 AH18
VDD_26 VSS_26 VDD_110 VSS_110 VSS_195 VDDIO_12 VSS_225
K15 E11 W12 P20 AC23 V25 AH20
VDD_27 VSS_27 VDD_111 VSS_111 VSS_196 VDDIO_13 VSS_226
K17 F4 W14 P22 AD8 V26 AH22
VDD_28 VSS_28 VDD_112 VSS_112 VSS_197 VDDIO_14 VSS_227
K19 F14 W16 R7 AD10 V28 AH24
VDD_29 VSS_29 VDD_113 VSS_113 VSS_198 VDDIO_15 VSS_228
K21 F16 W18 R9 AD12 V30 AH26
VDD_30 VSS_30 VDD_114 VSS_114 VSS_199 VDDIO_16 VSS_229
C K23
L4
L5
VDD_31
VDD_32
VSS_31
VSS_32
F18
F20
F22
W20
W22
Y2
VDD_115
VDD_116
VSS_115
VSS_116
R11
R13
R15
VSS_200
VSS_201
AD14
AD16
AD20
Y24
Y26
Y28
VDDIO_17
VDDIO_18
VSS_230
VSS_231
AH28
AH30
AK2
C
VDD_33 VSS_33 VDD_117 VSS_117 VSS_202 VDDIO_19 VSS_232
L8 F24 Y3 R17 B2 AD22 Y29 AK14
VDD_34 VSS_34 VDD_118 VSS_118 NP/RSVD VSS_203 VDDIO_20 VSS_233
L10 F26 Y7 R19 AD24 AB24 AK16
VDD_35 VSS_35 VDD_119 VSS_119 VSS_204 VDDIO_21 VSS_234
L12 F28 Y9 R21 AE4 AB26 AK18
L14 VDD_36 VSS_36 F30 Y11 VDD_120 VSS_120 R23 H20 VSS_205 AE5 AB28 VDDIO_22 VSS_235 AK20
VDD_37 VSS_37 VDD_121 VSS_121 NP/VSS1 VSS_206 VDDIO_23 VSS_236
L16 G9 Y13 T8 AE7 AE11 AB30 AK22
VDD_38 VSS_38 VDD_122 VSS_122 NP/VSS2 VSS_207 VDDIO_24 VSS_237
L18 G11 Y15 T10 AF2 AC24 AK24
POWER/GND1

POWER/GND2
VDD_39 VSS_39 VDD_123 VSS_123 VSS_208 VDDIO_25 VSS_238
L20 H8 Y17 T12 AF3 AD26 AK26
VDD_40 VSS_40 VDD_124 VSS_124 VSS_209 VDDIO_26 VSS_239
L22 H10 Y19 T14 AF8 AD28 AK28
VDD_41 VSS_41 VDD_125 VSS_125 VSS_210 VDDIO_27 VSS_240
M2 H12 Y21 T16 AF10 AD30 AK30
VDD_42 VSS_42 VDD_126 VSS_126 VSS_211 VDDIO_28 VSS_241
M3 H14 Y23 T18 AF12 AF30 AL5
VDD_43 VSS_43 VDD_127 VSS_127 VSS_212 VDDIO_29 VSS_242
M7 H16 AA8 T20 AF14
VDD_44 VSS_44 VDD_128 VSS_128 VSS_213
M9 H18 AA10 T22 AF16
VDD_45 VSS_45 VDD_129 VSS_129 VSS_214
M11 H24 AA12 U4 SOCKET AM3 941 SMD
M13 VDD_46 VSS_46 H26 AA14 VDD_130 VSS_130 U5
VDD_47 VSS_47 VDD_131 VSS_131
M15 H28 AA16 U7 SOCKET AM3 941 SMD
VDD_48 VSS_48 VDD_132 VSS_132
M17 H30 AA18 U9
VDD_49 VSS_49 VDD_133 VSS_133
M19 J4 AA20 U11
VDD_50 VSS_50 VDD_134 VSS_134
M21 J5 AA22 U13
VDD_51 VSS_51 VDD_135 VSS_135
M23 J7 AB7 U15
VDD_52 VSS_52 VDD_136 VSS_136
N8 J9 AB9 U17
VDD_53 VSS_53 VDD_137 VSS_137 +1.2V_HT +1.2V_HT
N10 J11 AB11 U19
VDD_54 VSS_54 VDD_138 VSS_138
N12 J13 AB13 U21
VDD_55 VSS_55 VDD_139 VSS_139
N14 J15 AB15 U23
VDD_56 VSS_56 VDD_140 VSS_140
N16 J17 AB17 V2

2
VDD_57 VSS_57 VDD_141 VSS_141
N18 J19 AB19 V3
B N20
N22
VDD_58
VDD_59
VSS_58
VSS_59
J21
J23
AB21
AB23
VDD_142
VDD_143
VSS_142
VSS_143
V10
V12
CC7
1UF 16V 0805 Y5V /NI
CC9
1UF 16V 0805 Y5V
CC10
1UF 16V 0805 Y5V
CC8
1UF 16V 0805 Y5V
B
VDD_60 VSS_60 VDD_144 VSS_144
P7 K2 AC4 V14

1
P9 VDD_61 VSS_61 K3 AC5 VDD_145 VSS_145 V16
VDD_62 VSS_62 VDD_146 VSS_146
P11 K8 AC8 V18
VDD_63 VSS_63 VDD_147 VSS_147
P13 K10 AC10 V20
VDD_64 VSS_64 VDD_148 VSS_148
P15 K12 AC12 V22
VDD_65 VSS_65 VDD_149 VSS_149
P17 K14 AC14 W7
P19 VDD_66 VSS_66 K16 AC16 VDD_150 VSS_150 W9
VDD_67 VSS_67 VDD_151 VSS_151
P21 K18 AC18 W11
VDD_68 VSS_68 VDD_152 VSS_152 +1.2V_HT
P23 K20 AC20 W13
VDD_69 VSS_69 VDD_153 VSS_153
R4 K22 AC22 W15
VDD_70 VSS_70 VDD_154 VSS_154
R5 K24 AD2 W17
VDD_71 VSS_71 VDD_155 VSS_155
R8 K26 AD3 W19
1

1
VDD_72 VSS_72 VDD_156 VSS_156
R10 K28 AD7 W21
VDD_73 VSS_73 VDD_157 VSS_157 CC12 CC13 C2
R12 K30 AD9 W23
VDD_74 VSS_74 VDD_158 VSS_158 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V
R14 L7 AD11 Y8
VDD_75 VSS_75 VDD_159 VSS_159
R16 L9 AD23 Y10
2

2
VDD_76 VSS_76 VDD_160 VSS_160
R18 L11 AE10 Y12
VDD_77 VSS_77 VDD_161 VSS_161
R20 L13 AE12 Y14
VDD_78 VSS_78 VDD_162 VSS_162
R22 L15 AF7 Y16
VDD_79 VSS_79 VDD_163 VSS_163
T2 L17 AF9 Y18
VDD_80 VSS_80 VDD_164 VSS_164
T3 L19 AF11 Y20
VDD_81 VSS_81 VDD_165 VSS_165
T7 L21 AG4 Y22
VDD_82 VSS_82 VDD_166 VSS_166
T9 L23 AG5 AA4
VDD_83 VSS_83 VDD_167 VSS_167
T11 M8 AG7 AA5
VDD_84 VSS_84 VDD_168 VSS_168
T13 M10 AH2 AA7
VDD_85 VSS_85 VDD_169 VSS_169
A AH3
VDD_170 VSS_170
AA9
A
SOCKET AM3 941 SMD
SOCKET AM3 941 SMD

Title
K8 CPU POWER
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 10 of 45

5 4 3 2 1
5 4 3 2 1
+1.5V_SUS

1
CC35 CC36 CC37
1UF 10V Y5V 0402 1UF 16V 0805 Y5V 1UF 10V Y5V 0402
2

2
D D
+1.5V_SUS PLACE BOTTOM SIDE
1

1
CC15 CC16 CC19
1UF 16V 0805 Y5V 1UF 10V Y5V 0402 1UF 10V Y5V 0402
2

2
+1.5V_SUS DECOUPLING BETWEEN PROCESSOR AND DIMMS
1

CC21 CC51 CC53


1UF 10V Y5V 0402 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V
2

C C

+1.5V_SUS
1

C143 CC25 CC47


1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI
2

Bottom side
+V_CPU
1

1
CC38 CC39 CC40 CC41 CC42 CC43 CC44 CC45 CC46
1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI
B B
2

2
+V_CPU
1

CC24 CC26 CC48 CC49 CC50 CC54


1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V
2

+V_CPU
1

A CC55 CC56 CC57 CC58 CC59 A


1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V
2

Title
CPU DECPOULING CAP
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 11 of 45

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A Title A
DDR CAP BYPASS
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 12 of 45

5 4 3 2 1
5 4 3 2 1

8 MEM_MA_DQS_L[8..0]
MEM_MA_DQS_L[8..0]
DDR3_A1 +1.5V_SUS
MEM_MA_DQS_H[8..0] DDR3_A1A MEM_MA_DATA[0..63] DDR3_A1B
8 MEM_MA_DQS_H[8..0] MEM_MA_DATA[0..63] 8
MEM_MA_DQS_L0 6 234 MEM_MA_DATA63 51 2
MEM_MA_DQS_H0 DQS0- DQ63 MEM_MA_DATA62 VDDQ1 (P) VSS1(P)
7 233 54 5
MEM_MA_DQS_L1 DQS0 DQ62 MEM_MA_DATA61 VDDQ2 (P) VSS2(P)
15 228 57 8
MEM_MA_DQS_H1 DQS1- DQ61 MEM_MA_DATA60 VDDQ3 (P) VSS3(P)
16 227 60 11
MEM_MA_DQS_L2 DQS1 DQ60 MEM_MA_DATA59 VDDQ4 (P) VSS4(P)
24 115 62 14
MEM_MA_DQS_H2 DQS2- DQ59 MEM_MA_DATA58 VDDQ5 (P) VSS5(P)
25 114 65 17
D MEM_MA_DQS_L3
MEM_MA_DQS_H3
33
34
DQS2
DQS3-
DQ58
DQ57
109
108
MEM_MA_DATA57
MEM_MA_DATA56
66
69
VDDQ6 (P)
VDDQ7 (P)
VSS6(P)
VSS7(P)
20
23
D
MEM_MA_DQS_L4 DQS3 DQ56 MEM_MA_DATA55 VDDQ8 (P) VSS8(P)
84 225 72 26
MEM_MA_DQS_H4 DQS4- DQ55 MEM_MA_DATA54 VDDQ9 (P) VSS9(P)
85 224 75 29
MEM_MA_DQS_L5 DQS4 DQ54 MEM_MA_DATA53 VDDQ10 (P) VSS10(P)
93 219 78 32
MEM_MA_DQS_H5 DQS5- DQ53 MEM_MA_DATA52 VDDQ11 (P) VSS11(P)
94 218 170 35
MEM_MA_DQS_L6 DQS5 DQ52 MEM_MA_DATA51 VDD1 (P) VSS12(P)
102 106 173 38
MEM_MA_DQS_H6 DQS6- DQ51 MEM_MA_DATA50 VDD2 (P) VSS13(P)
103 105 176 41
MEM_MA_DQS_L7 DQS6 DQ50 MEM_MA_DATA49 VDD3 (P) VSS60(P)
111 100 179 44
MEM_MA_DQS_H7 DQS7- DQ49 MEM_MA_DATA48 VDD4 (P) VSS14(P)
112 99 182 47
MEM_MA_DQS_L8 DQS7 DQ48 MEM_MA_DATA47 VDD5 (P) VSS15(P)
42 216 183 80
MEM_MA_DQS_H8 DQS8- DQ47 MEM_MA_DATA46 VDD6 (P) VSS16(P)
43 215 186 83
DQS8 DQ46 MEM_MA_DATA45 VDD7(P) VSS17(P)
210 189 86
DQ45 MEM_MA_DATA44 VDD8(P) VSS18(P)
209 191 92
DQ44 MEM_MA_DATA43 VDD9(P) VSS19(P)
97 194 95
MEM_MA_DM[8..0] DQ43 MEM_MA_DATA42 VDD10(P) VSS20(P)
8 MEM_MA_DM[8..0] 96 197 98
MEM_MA_DM0 DQ42 MEM_MA_DATA41 VDD11(P) VSS21(P)
125 91 +3.3V 236 101
DM0/DQS9 DQ41 MEM_MA_DATA40 VDDSPD(P) VSS22(P)
126 90 104
MEM_MA_DM1 DQS9- DQ40 MEM_MA_DATA39 DIMM_CA_VREF VSS23(P)
134 207 14 DIMM_CA_VREF 67 107
DM1/DQS10 DQ39 MEM_MA_DATA38 DIMM_DQ_VREF VREFCA VSS24(P)
135 206 14 DIMM_DQ_VREF 1 110
MEM_MA_DM2 DQS10- DQ38 MEM_MA_DATA37 VREFDQ VSS25(P)
143 201 113
DM2/DQS11 DQ37 MEM_MA_DATA36 VSS26(P)
144 200 117 116
MEM_MA_DM3 DQS11- DQ36 MEM_MA_DATA35 SA0 VSS27(P)
152 88 237 119
DM3/DQS12 DQ35 MEM_MA_DATA34 SA1 SA2
153 87 121
MEM_MA_DM4 DQS12- DQ34 MEM_MA_DATA33 VSS29(P)
203 82 124
DM4/DQS13 DQ33 MEM_MA_DATA32 VSS30(P)
204 81 8 MEM_MA_CKE0 50 127
DQS13- DQ32 CKE0 VSS31(P)
C MEM_MA_DM5 212
213
DM5/DQS14
DQS14-
DQ31
DQ30
156
155
MEM_MA_DATA31
MEM_MA_DATA30
8 MEM_MA_CKE1 169
CKE1 VSS32(P)
VSS33(P)
130
133 C
MEM_MA_DM6 221 150 MEM_MA_DATA29 71 136
DM6/DQS15 DQ29 MEM_MA_DATA28 8 MEM_MA_BANK0 BA0 VSS34(P)
222 149 190 139
MEM_MA_DM7 DQS15- DQ28 MEM_MA_DATA27 8 MEM_MA_BANK1 BA1 VSS35(P)
230 37 8 MEM_MA_BANK2
52 142
DM7/DQS16 DQ27 MEM_MA_DATA26 A16/BA2 VSS36(P)
231 36 145
MEM_MA_DM8 DQS16- DQ26 MEM_MA_DATA25 VSS37(P)
161 31 8 MEM_MA_RESET_L 168 148
DM8/DQS17 DQ25 MEM_MA_DATA24 RESET VSS38(P)
162 30 8 MEM_MA_WE_L 73 151
DQS17- DQ24 MEM_MA_DATA23 WE- VSS39(P)
147 8 MEM_MA_RAS_L 192 154
MEM_MA_CHECK[7..0] DQ23 MEM_MA_DATA22 RAS- VSS40(P)
8 MEM_MA_CHECK[7..0] 146 8 MEM_MA_CAS_L 74 157
MEM_MA_CHECK0 DQ22 MEM_MA_DATA21 CAS- VSS41(P)
39 141 8 MEM_MA0_CS_L0 193 160
MEM_MA_CHECK1 CB0 DQ21 MEM_MA_DATA20 S-0 VSS42(P)
40 140 8 MEM_MA0_CS_L1 76 163
MEM_MA_CHECK2 CB1 DQ20 MEM_MA_DATA19 S-1 VSS43(P)
45 28 166
MEM_MA_CHECK3 CB2 DQ19 MEM_MA_DATA18 VSS44(P)
46 27 199
MEM_MA_CHECK4 CB3 DQ18 MEM_MA_DATA17 VSS45(P)
158 22 202
MEM_MA_CHECK5 CB4 DQ17 MEM_MA_DATA16 VSS46(P)
159 21 8 MEM_MA0_ODT0 195 205
MEM_MA_CHECK6 CB5 DQ16 MEM_MA_DATA15 ODT0 VSS47(P)
164 138 8 MEM_MA0_ODT1 77 208
MEM_MA_CHECK7 CB6 DQ15 MEM_MA_DATA14 ODT1 VSS48(P)
165 137 211
CB7 DQ14 MEM_MA_DATA13 VSS49(P)
132 214
DQ13 MEM_MA_DATA12 VSS50(P)
131 217
DQ12 MEM_MA_DATA11 VSS51(P)
79 19 8 MEM_MA0_CLK_L1 64 220
RSVD DQ11 MEM_MA_DATA10 CK-1 VSS52(P)
238 18 8 MEM_MA0_CLK_H1 63 223
14,20,22 SDATA SDA DQ10 MEM_MA_DATA9 CK1 VSS53(P)
118 13 8 MEM_MA0_CLK_L0 185 226
14,20,22 SCLK SCL DQ9 MEM_MA_DATA8 CK-0 VSS54(P)
12 8 MEM_MA0_CLK_H0 184 229
MEM_MA_ADD[15..0] DQ8 MEM_MA_DATA7 CK0 VSS55(P)
8 MEM_MA_ADD[15..0] 129 232
MEM_MA_ADD0 DQ7 MEM_MA_DATA6 VSS56(P)
188 128 235
MEM_MA_ADD1 A0 DQ6 MEM_MA_DATA5 VSS57(P)
181 123 239
B MEM_MA_ADD2
MEM_MA_ADD3
61
180
A1
A2
DQ5
DQ4
122
10
MEM_MA_DATA4
MEM_MA_DATA3 48
VSS58(P)
VSS59(P)
89 B
MEM_MA_ADD4 A3 DQ3 MEM_MA_DATA2 FREE1
59 9 49 120
MEM_MA_ADD5 A4 DQ2 MEM_MA_DATA1 FREE2 VTT
58 4 8 MEM_MA_EVENT_L 187 240 MEM_VTT
MEM_MA_ADD6 A5 DQ1 MEM_MA_DATA0 FREE3 VTT
178 3 198
A6 DQ0 FREE4

2
MEM_MA_ADD7 56
MEM_MA_ADD8 A7 DDR3-240 PIN-R DC1
177
MEM_MA_ADD9 A8 0.1UF 16V Y5V 0402 /NI
175
MEM_MA_ADD10 A9 BLACK
70

1
MEM_MA_ADD11 A10
55 68
MEM_MA_ADD12 A11 NC/PAR_IN
174 53
MEM_MA_ADD13 A12 NC/ERR_OUT
196 167
MEM_MA_ADD14 A13 NC/TEST4
172
MEM_MA_ADD15 A14
171
A15
DDR3-240 PIN-R

+1.5V_SUS +1.5V_SUS

MEM_VTT

DR2 DR4
16.9 1% 0402 16.9 1% 0402
2

DC2 DIMM_DQ_VREF DIMM_CA_VREF


A 1UF 16V 0805 Y5V
A
1

DR6 DC3 DC4 DC5 DR8 DC6 DC7 DC8


16.9 1% 0402 1UF 10V Y5V 0402 0.1UF 16V Y5V 0402 /NI 1UF 10V Y5V 0402 16.9 1% 0402 1UF 10V Y5V 0402 0.1UF 16V Y5V 0402 /NI 1UF 10V Y5V 0402

Title
DDR DIMM-1
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 13 of 45

5 4 3 2 1
5 4 3 2 1

9 MEM_MB_DQS_L[8..0]
MEM_MB_DQS_L[8..0]
DDR3_B1 +1.5V_SUS
MEM_MB_DQS_H[8..0] DDR3_B1A MEM_MB_DATA[0..63] DDR3_B1B
9 MEM_MB_DQS_H[8..0] MEM_MB_DATA[0..63] 9
MEM_MB_DQS_L0 6 234 MEM_MB_DATA63 51 2
MEM_MB_DQS_H0 DQS0- DQ63 MEM_MB_DATA62 VDDQ1 (P) VSS1(P)
7 233 54 5
MEM_MB_DQS_L1 DQS0 DQ62 MEM_MB_DATA61 VDDQ2 (P) VSS2(P)
15 228 57 8
MEM_MB_DQS_H1 DQS1- DQ61 MEM_MB_DATA60 VDDQ3 (P) VSS3(P)
16 227 60 11
MEM_MB_DQS_L2 DQS1 DQ60 MEM_MB_DATA59 VDDQ4 (P) VSS4(P)
24 115 62 14
MEM_MB_DQS_H2 DQS2- DQ59 MEM_MB_DATA58 VDDQ5 (P) VSS5(P)
25 114 65 17
D MEM_MB_DQS_L3
MEM_MB_DQS_H3
33
34
DQS2
DQS3-
DQ58
DQ57
109
108
MEM_MB_DATA57
MEM_MB_DATA56
66
69
VDDQ6 (P)
VDDQ7 (P)
VSS6(P)
VSS7(P)
20
23
D
MEM_MB_DQS_L4 DQS3 DQ56 MEM_MB_DATA55 VDDQ8 (P) VSS8(P)
84 225 72 26
MEM_MB_DQS_H4 DQS4- DQ55 MEM_MB_DATA54 VDDQ9 (P) VSS9(P)
85 224 75 29
MEM_MB_DQS_L5 DQS4 DQ54 MEM_MB_DATA53 VDDQ10 (P) VSS10(P)
93 219 78 32
MEM_MB_DQS_H5 DQS5- DQ53 MEM_MB_DATA52 VDDQ11 (P) VSS11(P)
94 218 170 35
MEM_MB_DQS_L6 DQS5 DQ52 MEM_MB_DATA51 VDD1 (P) VSS12(P)
102 106 173 38
MEM_MB_DQS_H6 DQS6- DQ51 MEM_MB_DATA50 VDD2 (P) VSS13(P)
103 105 176 41
MEM_MB_DQS_L7 DQS6 DQ50 MEM_MB_DATA49 VDD3 (P) VSS60(P)
111 100 179 44
MEM_MB_DQS_H7 DQS7- DQ49 MEM_MB_DATA48 VDD4 (P) VSS14(P)
112 99 182 47
MEM_MB_DQS_L8 DQS7 DQ48 MEM_MB_DATA47 VDD5 (P) VSS15(P)
42 216 183 80
MEM_MB_DQS_H8 DQS8- DQ47 MEM_MB_DATA46 VDD6 (P) VSS16(P)
43 215 186 83
DQS8 DQ46 MEM_MB_DATA45 VDD7(P) VSS17(P)
210 189 86
DQ45 MEM_MB_DATA44 VDD8(P) VSS18(P)
209 191 92
DQ44 MEM_MB_DATA43 VDD9(P) VSS19(P)
97 194 95
MEM_MB_DM[8..0] DQ43 MEM_MB_DATA42 VDD10(P) VSS20(P)
9 MEM_MB_DM[8..0] 96 197 98
MEM_MB_DM0 DQ42 MEM_MB_DATA41 VDD11(P) VSS21(P)
125 91 +3.3V 236 101
DM0/DQS9 DQ41 MEM_MB_DATA40 VDDSPD(P) VSS22(P)
126 90 104
MEM_MB_DM1 DQS9- DQ40 MEM_MB_DATA39 DIMM_CA_VREF VSS23(P)
134 207 13 DIMM_CA_VREF 67 107
DM1/DQS10 DQ39 MEM_MB_DATA38 DIMM_DQ_VREF VREFCA VSS24(P)
135 206 13 DIMM_DQ_VREF 1 110
MEM_MB_DM2 DQS10- DQ38 MEM_MB_DATA37 VREFDQ VSS25(P)
143 201 113
DM2/DQS11 DQ37 MEM_MB_DATA36 VSS26(P)
144 200 +3.3V 117 116
MEM_MB_DM3 DQS11- DQ36 MEM_MB_DATA35 SA0 VSS27(P)
152 88 237 119
DM3/DQS12 DQ35 MEM_MB_DATA34 SA1 SA2
153 87 121
MEM_MB_DM4 DQS12- DQ34 MEM_MB_DATA33 VSS29(P)
203 82 124
DM4/DQS13 DQ33 MEM_MB_DATA32 VSS30(P)
204 81 9 MEM_MB_CKE0 50 127
DQS13- DQ32 CKE0 VSS31(P)
C MEM_MB_DM5 212
213
DM5/DQS14
DQS14-
DQ31
DQ30
156
155
MEM_MB_DATA31
MEM_MB_DATA30
9 MEM_MB_CKE1 169
CKE1 VSS32(P)
VSS33(P)
130
133 C
MEM_MB_DM6 221 150 MEM_MB_DATA29 71 136
DM6/DQS15 DQ29 9 MEM_MB_BANK0 BA0 VSS34(P)
222 149 MEM_MB_DATA28 190 139
DQS15- DQ28 9 MEM_MB_BANK1 BA1 VSS35(P)
MEM_MB_DM7 230 37 MEM_MB_DATA27 52 142
DM7/DQS16 DQ27 9 MEM_MB_BANK2 A16/BA2 VSS36(P)
231 36 MEM_MB_DATA26 145
MEM_MB_DM8 DQS16- DQ26 MEM_MB_DATA25 VSS37(P)
161 31 9 MEM_MB_RESET_L 168 148
DM8/DQS17 DQ25 MEM_MB_DATA24 RESET VSS38(P)
162 30 9 MEM_MB_WE_L 73 151
DQS17- DQ24 MEM_MB_DATA23 WE- VSS39(P)
147 9 MEM_MB_RAS_L 192 154
MEM_MB_CHECK[7..0] DQ23 MEM_MB_DATA22 RAS- VSS40(P)
9 MEM_MB_CHECK[7..0] 146 9 MEM_MB_CAS_L 74 157
MEM_MB_CHECK0 DQ22 MEM_MB_DATA21 CAS- VSS41(P)
39 141 9 MEM_MB0_CS_L0 193 160
MEM_MB_CHECK1 CB0 DQ21 MEM_MB_DATA20 S-0 VSS42(P)
40 140 9 MEM_MB0_CS_L1 76 163
MEM_MB_CHECK2 CB1 DQ20 MEM_MB_DATA19 S-1 VSS43(P)
45 28 166
MEM_MB_CHECK3 CB2 DQ19 MEM_MB_DATA18 VSS44(P)
46 27 199
MEM_MB_CHECK4 CB3 DQ18 MEM_MB_DATA17 VSS45(P)
158 22 202
MEM_MB_CHECK5 CB4 DQ17 MEM_MB_DATA16 VSS46(P)
159 21 9 MEM_MB0_ODT0 195 205
MEM_MB_CHECK6 CB5 DQ16 MEM_MB_DATA15 ODT0 VSS47(P)
164 138 9 MEM_MB0_ODT1 77 208
MEM_MB_CHECK7 CB6 DQ15 MEM_MB_DATA14 ODT1 VSS48(P)
165 137 211
CB7 DQ14 MEM_MB_DATA13 VSS49(P)
132 214
DQ13 MEM_MB_DATA12 VSS50(P)
131 217
DQ12 MEM_MB_DATA11 VSS51(P)
79 19 9 MEM_MB0_CLK_L1 64 220
RSVD DQ11 MEM_MB_DATA10 CK-1 VSS52(P)
238 18 9 MEM_MB0_CLK_H1 63 223
13,20,22 SDATA SDA DQ10 MEM_MB_DATA9 CK1 VSS53(P)
118 13 9 MEM_MB0_CLK_L0 185 226
13,20,22 SCLK SCL DQ9 MEM_MB_DATA8 CK-0 VSS54(P)
12 9 MEM_MB0_CLK_H0 184 229
MEM_MB_ADD[15..0] DQ8 MEM_MB_DATA7 CK0 VSS55(P)
9 MEM_MB_ADD[15..0] 129 232
MEM_MB_ADD0 DQ7 MEM_MB_DATA6 VSS56(P)
188 128 235
MEM_MB_ADD1 A0 DQ6 MEM_MB_DATA5 VSS57(P)
181 123 239
B MEM_MB_ADD2
MEM_MB_ADD3
61
180
A1
A2
DQ5
DQ4
122
10
MEM_MB_DATA4
MEM_MB_DATA3 48
VSS58(P)
VSS59(P)
89 B
MEM_MB_ADD4 A3 DQ3 MEM_MB_DATA2 FREE1
59 9 49 120
MEM_MB_ADD5 A4 DQ2 MEM_MB_DATA1 FREE2 VTT
58 4 9 MEM_MB_EVENT_L 187 240 MEM_VTT
MEM_MB_ADD6 A5 DQ1 MEM_MB_DATA0 FREE3 VTT
178 3 198
A6 DQ0 FREE4

2
MEM_MB_ADD7 56
MEM_MB_ADD8 A7 DDR3-240 PIN-R DC9
177
MEM_MB_ADD9 A8 1UF 10V Y5V 0402
175
MEM_MB_ADD10 A9 BLACK
70

1
MEM_MB_ADD11 A10
55 68
MEM_MB_ADD12 A11 NC/PAR_IN
174 53
MEM_MB_ADD13 A12 NC/ERR_OUT
196 167
MEM_MB_ADD14 A13 NC/TEST4
172
MEM_MB_ADD15 A14
171
A15
DDR3-240 PIN-R

MEM_VTT
2

A DC10
1UF 16V 0805 Y5V
DC11
1UF 16V 0805 Y5V
A
1

Title
DDR DIMM-2
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 14 of 45

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A
Title
NONE
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 15 of 45

5 4 3 2 1
5 4 3 2 1

HTCPU_DWN[15..0] HTCPU_UP[15..0]
6 HTCPU_DWN[15..0] HTCPU_UP[15..0] 6

D 6 HTCPU_DWN_[15..0]
HTCPU_DWN_[15..0]
U1A
HTCPU_UP_[15..0]
HTCPU_UP_[15..0] 6 D
HTCPU_DWN0 Y25 D24 HTCPU_UP0
HTCPU_DWN_0 HT_RXCAD0P HT_TXCAD0P HTCPU_UP_0
HTCPU_DWN1
Y24
HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N
D25
HTCPU_UP1
V22 E24
HTCPU_DWN_1 HT_RXCAD1P HT_TXCAD1P HTCPU_UP_1
V23 E25
HTCPU_DWN2 HT_RXCAD1N HT_TXCAD1N HTCPU_UP2
V25 F24
HTCPU_DWN_2 HT_RXCAD2P HT_TXCAD2P HTCPU_UP_2
V24 F25
HTCPU_DWN3 HT_RXCAD2N HT_TXCAD2N HTCPU_UP3
U24 F23
HTCPU_DWN_3 HT_RXCAD3P HT_TXCAD3P HTCPU_UP_3
U25 F22
HTCPU_DWN4 HT_RXCAD3N HT_TXCAD3N HTCPU_UP4
T25 H23

HYPER TRANSPORT CPU I/F


HTCPU_DWN_4 HT_RXCAD4P HT_TXCAD4P HTCPU_UP_4
T24 H22
HTCPU_DWN5 HT_RXCAD4N HT_TXCAD4N HTCPU_UP5
P22 J25
HTCPU_DWN_5 HT_RXCAD5P HT_TXCAD5P HTCPU_UP_5
P23 J24
HTCPU_DWN6 HT_RXCAD5N HT_TXCAD5N HTCPU_UP6
P25 K24
HTCPU_DWN_6 HT_RXCAD6P HT_TXCAD6P HTCPU_UP_6
P24 K25
HTCPU_DWN7 HT_RXCAD6N HT_TXCAD6N HTCPU_UP7
N24 K23
HTCPU_DWN_7 HT_RXCAD7P HT_TXCAD7P HTCPU_UP_7
N25 K22
HT_RXCAD7N HT_TXCAD7N
HTCPU_DWN8 AC24 F21 HTCPU_UP8
HTCPU_DWN_8 HT_RXCAD8P HT_TXCAD8P HTCPU_UP_8
AC25 G21
HT_RXCAD8N HT_TXCAD8N
C HTCPU_DWN9
HTCPU_DWN_9
AB25
AB24
HT_RXCAD9P HT_TXCAD9P
G20
H21
HTCPU_UP9
HTCPU_UP_9
C
HTCPU_DWN10 HT_RXCAD9N HT_TXCAD9N HTCPU_UP10
AA24 J20
HTCPU_DWN_10 HT_RXCAD10P HT_TXCAD10P HTCPU_UP_10
AA25 J21
HTCPU_DWN11 HT_RXCAD10N HT_TXCAD10N HTCPU_UP11
Y22 J18
HTCPU_DWN_11 HT_RXCAD11P HT_TXCAD11P HTCPU_UP_11
Y23 K17
HTCPU_DWN12 HT_RXCAD11N HT_TXCAD11N HTCPU_UP12
W21 L19
HTCPU_DWN_12 HT_RXCAD12P HT_TXCAD12P HTCPU_UP_12
W20 J19
HTCPU_DWN13 HT_RXCAD12N HT_TXCAD12N HTCPU_UP13
V21 M19
HTCPU_DWN_13 HT_RXCAD13P HT_TXCAD13P HTCPU_UP_13
V20 L18
HTCPU_DWN14 HT_RXCAD13N HT_TXCAD13N HTCPU_UP14
U20 M21
HTCPU_DWN_14 HT_RXCAD14P HT_TXCAD14P HTCPU_UP_14
U21 P21
HTCPU_DWN15 HT_RXCAD14N HT_TXCAD14N HTCPU_UP15
U19 P18
HTCPU_DWN_15 HT_RXCAD15P HT_TXCAD15P HTCPU_UP_15
U18 M18
HT_RXCAD15N HT_TXCAD15N
HTCPU_DWNCLK0 T22 H24 HTCPU_UPCLK0
6 HTCPU_DWNCLK0 HT_RXCLK0P HT_TXCLK0P HTCPU_UPCLK0 6
HTCPU_DWNCLK0_ T23 H25 HTCPU_UPCLK0_
6 HTCPU_DWNCLK0_ HT_RXCLK0N HT_TXCLK0N HTCPU_UPCLK0_ 6
HTCPU_DWNCLK1 AB23 L21 HTCPU_UPCLK1
6 HTCPU_DWNCLK1 HT_RXCLK1P HT_TXCLK1P HTCPU_UPCLK1 6
HTCPU_DWNCLK1_ AA22 L20 HTCPU_UPCLK1_
6 HTCPU_DWNCLK1_ HT_RXCLK1N HT_TXCLK1N HTCPU_UPCLK1_ 6
HTCPU_DWNCNTL M22 M24 HTCPU_UPCNTL
6 HTCPU_DWNCNTL HT_RXCTL0P HT_TXCTL0P HTCPU_UPCNTL 6
HTCPU_DWNCNTL_ HTCPU_UPCNTL_
B 6
6
HTCPU_DWNCNTL_
HTCPU_DWNCNTL1
HTCPU_DWNCNTL1
M23
R21
HT_RXCTL0N HT_TXCTL0N
M25
P19 HTCPU_UPCNTL1
HTCPU_UPCNTL_ 6
HTCPU_UPCNTL1 6
B
HTCPU_DWNCNTL1_ HT_RXCTL1P HT_TXCTL1P HTCPU_UPCNTL1_
6 HTCPU_DWNCNTL1_ R20 R18 HTCPU_UPCNTL1_ 6
HT_RXCTL1N HT_TXCTL1N
R590 301 1% 0402 HT_RXCALP C23 B24 HT_TXCALP R22 301 1% 0402
HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
A24 B25
HT_RXCALN HT_TXCALN
760G

A A
Title
RS780 PCI-E
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 16 of 45

5 4 3 2 1
5 4 3 2 1

U1B
27 GFX_RX0P D4 A5 GFX_TX0P_C C146 0.1UF 16V X7R 0402
GFX_RX0P GFX_TX0P GFX_TX0N_C GFX_TX0P 27
27 GFX_RX0N C4 PART 2 OF 6 B5 C147 0.1UF 16V X7R 0402
GFX_RX0N GFX_TX0N GFX_TX1P_C GFX_TX0N 27
27 GFX_RX1P A3 A4 C148 0.1UF 16V X7R 0402
GFX_RX1P GFX_TX1P GFX_TX1P 27
B3 B4 GFX_TX1N_C C149 0.1UF 16V X7R 0402
27 GFX_RX1N GFX_RX1N GFX_TX1N GFX_TX1N 27
27 GFX_RX2P C2 C3 GFX_TX2P_C C150 0.1UF 16V X7R 0402
D 27 GFX_RX2N C1
GFX_RX2P
GFX_RX2N
GFX_TX2P
GFX_TX2N
B2 GFX_TX2N_C C151 0.1UF 16V X7R 0402
GFX_TX2P 27
GFX_TX2N 27
D
27 GFX_RX3P E5 D1 GFX_TX3P_C C152 0.1UF 16V X7R 0402
GFX_RX3P GFX_TX3P GFX_TX3P 27
27 GFX_RX3N F5 D2 GFX_TX3N_C C153 0.1UF 16V X7R 0402
GFX_RX3N GFX_TX3N GFX_TX3N 27
27 GFX_RX4P G5 E2 GFX_TX4P_C C154 0.1UF 16V X7R 0402
GFX_RX4P GFX_TX4P GFX_TX4P 27
27 GFX_RX4N G6 E1 GFX_TX4N_C C155 0.1UF 16V X7R 0402
GFX_RX4N GFX_TX4N GFX_TX4N 27
27 GFX_RX5P H5 F4 GFX_TX5P_C C156 0.1UF 16V X7R 0402
GFX_RX5P GFX_TX5P GFX_TX5N_C GFX_TX5P 27
27 GFX_RX5N H6 F3 C157 0.1UF 16V X7R 0402
GFX_RX5N GFX_TX5N GFX_TX6P_C GFX_TX5N 27
27 GFX_RX6P J6 F1 C158 0.1UF 16V X7R 0402
GFX_RX6P GFX_TX6P GFX_TX6P 27
J5 F2 GFX_TX6N_C C159 0.1UF 16V X7R 0402
27 GFX_RX6N GFX_RX6N GFX_TX6N GFX_TX6N 27
27 GFX_RX7P J7 H4 GFX_TX7P_C C160 0.1UF 16V X7R 0402
GFX_RX7P GFX_TX7P GFX_TX7P 27
27 GFX_RX7N J8 H3 GFX_TX7N_C C161 0.1UF 16V X7R 0402
GFX_TX7N 27

PCIE I/F GFX


GFX_RX7N GFX_TX7N GFX_TX8P_C C162 0.1UF 16V X7R 0402
27 GFX_RX8P L5 H1 GFX_TX8P 27
GFX_RX8P GFX_TX8P GFX_TX8N_C C163 0.1UF 16V X7R 0402
27 GFX_RX8N L6 H2 GFX_TX8N 27
GFX_RX8N GFX_TX8N GFX_TX9P_C C164 0.1UF 16V X7R 0402
27 GFX_RX9P M8 J2 GFX_TX9P 27
GFX_RX9P GFX_TX9P GFX_TX9N_C C165 0.1UF 16V X7R 0402
27 GFX_RX9N L8 J1 GFX_TX9N 27
GFX_RX9N GFX_TX9N GFX_TX10P_C C166 0.1UF 16V X7R 0402
27 GFX_RX10P P7 K4 GFX_TX10P 27
GFX_RX10P GFX_TX10P GFX_TX10N_C C167 0.1UF 16V X7R 0402
27 GFX_RX10N M7 K3 GFX_TX10N 27
GFX_RX10N GFX_TX10N GFX_TX11P_C C168 0.1UF 16V X7R 0402
27 GFX_RX11P P5 K1 GFX_TX11P 27
GFX_RX11P GFX_TX11P GFX_TX11N_C C169 0.1UF 16V X7R 0402
27 GFX_RX11N M5 K2 GFX_TX11N 27
GFX_RX11N GFX_TX11N
C 27 GFX_RX12P R8
P8
GFX_RX12P GFX_TX12P
M4
M3
GFX_TX12P_C
GFX_TX12N_C
C170 0.1UF 16V X7R 0402
C171 0.1UF 16V X7R 0402
GFX_TX12P 27 C
27 GFX_RX12N GFX_RX12N GFX_TX12N GFX_TX12N 27
27 GFX_RX13P R6 M1 GFX_TX13P_C C172 0.1UF 16V X7R 0402
GFX_RX13P GFX_TX13P GFX_TX13P 27
27 GFX_RX13N R5 M2 GFX_TX13N_C C173 0.1UF 16V X7R 0402
GFX_RX13N GFX_TX13N GFX_TX13N 27
27 GFX_RX14P P4 N2 GFX_TX14P_C C174 0.1UF 16V X7R 0402
GFX_RX14P GFX_TX14P GFX_TX14P 27
27 GFX_RX14N P3 N1 GFX_TX14N_C C175 0.1UF 16V X7R 0402
GFX_RX14N GFX_TX14N GFX_TX14N 27
27 GFX_RX15P T4 P1 GFX_TX15P_C C176 0.1UF 16V X7R 0402
GFX_RX15P GFX_TX15P GFX_TX15N_C GFX_TX15P 27
27 GFX_RX15N T3 P2 C177 0.1UF 16V X7R 0402
GFX_RX15N GFX_TX15N GFX_TX15N 27
AE3 AC1
GPP_RX0P GPP_TX0P
AD4 AC2
GPP_RX0N GPP_TX0N
AE2 AB4
GPP_RX1P GPP_TX1P
AD3 AB3
GPP_RX1N GPP_TX1N
AD1 AA2
GPP_RX2P GPP_TX2P
AD2
GPP_RX2N PCIE I/F GPP GPP_TX2N
AA1
GPP_TX3P_C LC1 0.1UF 16V X7R 0402
V5 Y1 GBE_TXP 44
44 GBE_RXP GPP_RX3P GPP_TX3P GPP_TX3N_C LC2 0.1UF 16V X7R 0402
44 GBE_RXN W6 Y2 GBE_TXN 44
GPP_RX3N GPP_TX3N
U5 Y4
GPP_RX4P GPP_TX4P
U6 Y3
GPP_RX4N GPP_TX4N
U8 V1
B U7
GPP_RX5P
GPP_RX5N
GPP_TX5P
GPP_TX5N
V2 B
21 A_RX0P AA8 AD7 A_TX0P_C C180 0.1UF 16V X7R 0402
SB_RX0P SB_TX0P A_TX0P 21
21 A_RX0N Y8 AE7 A_TX0N_C C181 0.1UF 16V X7R 0402
SB_RX0N SB_TX0N A_TX0N 21
21 A_RX1P AA7 AE6 A_TX1P_C C182 0.1UF 16V X7R 0402
SB_RX1P SB_TX1P A_TX1P 21
21 A_RX1N Y7 AD6 A_TX1N_C C183 0.1UF 16V X7R 0402
SB_RX1N SB_TX1N A_TX1N 21
21 A_RX2P AA5 PCIE I/F SB AB6 A_TX2P_C C184 0.1UF 16V X7R 0402
SB_RX2P SB_TX2P A_TX2N_C A_TX2P 21
21 A_RX2N AA6 AC6 C185 0.1UF 16V X7R 0402
SB_RX2N SB_TX2N A_TX3P_C A_TX2N 21
21 A_RX3P W5 AD5 C186 0.1UF 16V X7R 0402
SB_RX3P SB_TX3P A_TX3P 21
Y5 AE5 A_TX3N_C C187 0.1UF 16V X7R 0402
21 A_RX3N SB_RX3N SB_TX3N A_TX3N 21
R +1.1V
AC8 R23 1.27K 1% 0402
PCE_CALRP(PCE_BCALRP) R24 2K 1% 0402
AB8
PCE_CALRN(PCE_BCALRN)
760G

A A
Title
RS780 PCI-E
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 17 of 45

5 4 3 2 1
5 4 3 2 1
+3.3V

AVDD.

C189
1UF 10V Y5V 0402
+1.8V

C190
+1.8V 1UF 10V Y5V 0402

D AVDDQ
D
C191 U1C
1UF 10V Y5V 0402 F12 A22
AVDD1(NC) TXOUT_L0P(NC)
E12
AVDD2(NC)
PART 3 OF 6 TXOUT_L0N(NC)
B22
F14 A21
AVDDDI(NC) TXOUT_L1P(NC)
G15 B21
AVSSDI(NC) TXOUT_L1N(NC)
H15 B20
C571 10P 50V NPO 0402 AVDDQ(NC) TXOUT_L2P(NC)
H14 A20
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0)
A19
C572 10P 50V NPO 0402 TXOUT_L3P(NC)
E17 B19
C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2)
F17

CRT/TVOUT
C573 10P 50V NPO 0402 Y(DFT_GPIO2)
F15 B18
COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC)
A18
L1 INDUCTOR 68NH 300MA 0805 TXOUT_U0N(NC)
26 R G18 A17
R35 140 1% 0402 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3)
G17 B17
L3 INDUCTOR 68NH 300MA 0805 REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
26 G E18 D20
R36 150 1% 0402 GREEN(DFT_GPIO1) TXOUT_U2P(NC)
F18 D21
L5 INDUCTOR 68NH 300MA 0805 GREENb(NC) TXOUT_U2N(NC)
26 B E19 D18
R37 150 1% 0402 BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5)
F19 D19
BLUEb(NC) TXOUT_U3N(NC)

26 HSYNC# A11 B16


DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1)
26 VSYNC# B11 A16
DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) FB32 BEAD 60 0805 1A
26 DAC_SCL F8 D16 +1.8V
DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4)
26 DAC_SDA E8 D17
DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
+1.1V R38 DAC_RSET G14 C192 C193
715 1% 0402 DAC_RSET(PWM_GPIO1) VDDLTP18 0.1UF 16V Y5V 0402 /NI 1UF 10V Y5V 0402 Q4
A13
FB21 BEAD 60 0805 1A PLLVDD VDDLTP18(NC) APM2300AAC SOT23
A12 B13
FB22 BEAD 60 0805 1A PLLVDD18 PLLVDD(NC) VSSLTP18(NC)
D14 S +1.8V
+1.8V PLLVDD18(NC) VDDLT18 FB34 BEAD 60 0805 1A

LVTM
B12 A15 D
PLLVSS(NC) VDDLT18_1(NC)
B15 G R39 4.7K 0402

PLL PWR
VDDLT18_2(NC) +12V
FB23 BEAD 60 0805 1A VDDA18HTPLL H17 A14
VDDA18HTPLL VDDLT33_1(NC) C203 C196
B14
FB41 BEAD 60 0805 1A VDDA18PCIEPLL VDDLT33_2(NC) 0.1UF 16V Y5V 0402 /NI 1UF 10V Y5V 0402
D7
VDDA18PCIEPLL1
E7 C14
VDDA18PCIEPLL2 VSSLT1(VSS)
D15
C C195
1UF 10V Y5V 0402
C197
1UF 10V Y5V 0402
C198
1UF 10V Y5V 0402
C199
1UF 10V Y5V 0402
C200
1UF 10V Y5V 0402
NB_RST#_IN
NB_PWRGD_IN
NB_LDT_STOP#
D8
A10
C10
SYSRESETb
POWERGOOD
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
C16
C18
C20
C
LDTSTOPb VSSLT5(VSS)

PM
21 ALLOW_LDTSTOP C12 E20
ALLOW_LDTSTOP VSSLT6(VSS)
C22
VSSLT7(VSS)
20 NBHT_REFCLKP C25
HT_REFCLKP
20 NBHT_REFCLKN C24
+1.1V HT_REFCLKN
R610 E11
20 OSC_14M_NB

CLOCKs
REF_CLKN REFCLK_P/OSCIN(OSCIN)
F11 E9 COMM_EN 27
REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP)
F7
150 1% 0402 LVDS_BLON(PCE_RCALRP)
20 NBSRC_CLKP T2 G12
R611 GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2)
20 NBSRC_CLKN T1
GFX_REFCLKN

20 NBGPP_CLKP U1
150 1% 0402 GPP_REFCLKP
20 NBGPP_CLKN U2
GPP_REFCLKN

20 SBLINK_CLKP V4
GPPSB_REFCLKP(SB_REFCLKP)
20 SBLINK_CLKN V3
GPPSB_REFCLKN(SB_REFCLKN)
+3.3V R458 4.7K 0402 I2C_CLK B9
R457 4.7K 0402 I2C_DATA I2C_CLK
A9 D9
B8
I2C_DATA MIS. TMDS_HPD(NC)
D10
DDC_CLK0/AUX0P(NC) HPD(NC)
A8
DDC_DATA0/AUX0N(NC)
B7 D12
DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5) SUS_STAT# 22
RS780-->10K /NI A7
+3.3V DDC_DATA1/AUX1N(NC)
AE8
THERMALDIODE_P NB_THERMDA 33
R459 10K 1% 0402 /NI STRP_DATA B10 AD8
STRP_DATA THERMALDIODE_N NB_THERMDC 33
G11 D13 TEST_EN
RSVD TESTMODE
R454 150 1% 0402 RS740_DFT_GPIO1 C8
AUX_CAL(NC) R46
760G 1.8K 1% 0402

B +3.3V
B
R455 3K 0402 HSYNC#
+1.8V
R592 301 1% 0402
Disable Side port memory
NB_PWRGD_IN
22 NB_PWRGD_IN

R593 0 0402 NB_RST#_IN


21,27,33 A_RST#

20 NBSRC_CLKP NBSRCCLKP
NBSRCCLKN +3.3V
20 NBSRC_CLKN
+3.3V
20 NBGPP_CLKP NBGPPCLKP
20 NBGPP_CLKN NBGPPCLKN
R594
SBLINKCLKP R595 4.7K 0402
20 SBLINK_CLKP
20 SBLINK_CLKN SBLINKCLKN 10K 0402 /NI

20 OSC_14M_NB OSC14MNB R596 10K 0402 /NI

NB_PWRGD_IN NBPWRGDIN
22 NB_PWRGD_IN
NB_RST#_IN NBRSTIN Q95
B
C NB_RST#_IN
7,21 LDT_RST# E
1P1
+1.1V
2N3904 SOT23 /NI
1P8
+1.8V
Near NB
ACC FUNCTION

A A
+1.8V DDR3:NB_LDT_STOP#-->+1.8V
G

Q82 R483
FDV301N SOT23 1K 0402
S D NB_LDT_STOP#
7,21 LDT_STOP#
Title
NB_LDT_STOP# LEVEL SHIFT
RS780 SYSTEM
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 18 of 45

5 4 3 2 1
5 4 3 2 1
U1D
PAR 4 OF 6
AB12 AA18
MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC)

AE14
AE16 AA20

AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC)

W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
A2
B1

E4

P6

V7

V8
V6

Y6
L1
L2
L4
L7
J4
V11 AA19
MEM_A2(NC) MEM_DQ2/DVO_DE(NC)
AE15 Y19
U1F MEM_A3(NC) MEM_DQ3/DVO_D0(NC)
AA12 V17

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
MEM_A4(NC) MEM_DQ4(NC)
AB16 AA17
MEM_A5(NC) MEM_DQ5/DVO_D1(NC)
760G AB14 AA15
MEM_A6(NC) MEM_DQ6/DVO_D2(NC)
D AD14
AD13
MEM_A7(NC)
MEM_A8(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
Y15
AC20 D
AD15 AD19

SBD_MEM/DVO_I/F
MEM_A9(NC) MEM_DQ9/DVO_D5(NC)
AC16 AE22
MEM_A10(NC) MEM_DQ10/DVO_D6(NC)

PART 6/6
AE13 AC18
GROUND MEM_A11(NC) MEM_DQ11/DVO_D7(NC)
AC14 AB20
MEM_A12(NC) MEM_DQ12(NC)
Y14 AD22
MEM_A13(NC) MEM_DQ13/DVO_D9(NC)
AC22
MEM_DQ14/DVO_D10(NC)
AD16 AD21
MEM_BA0(NC) MEM_DQ15/DVO_D11(NC)
AE17

VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
MEM_BA1(NC)

VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
AD17 Y17
MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC)
W18

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
MEM_DQS0N/DVO_IDCKN(NC)
W12 AD20
MEM_RASb(NC) MEM_DQS1P(NC)
Y12 AE21
MEM_CASb(NC) MEM_DQS1N(NC)
AD18
MEM_WEb(NC)
AB13 W17
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25

N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

L12

N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
M20

M14
MEM_CSb(NC) MEM_DM0(NC) +1.8V
AB18 AE19
MEM_CKE(NC) MEM_DM1/DVO_D8(NC)
V14
MEM_ODT(NC) +1.1V
AE23
IOPLLVDD18(NC)
V15 AE24
MEM_CKP(NC) IOPLLVDD(NC)
W14
MEM_CKN(NC)
AD23
IOPLLVSS(NC)
AE12
MEM_COMPP(NC)
AD12 AE18
MEM_COMPN(NC) MEM_VREF(NC)
760G
C C
+1.1V +1.1V
U1E
J17 A6
VDDHT_1 VDDPCIE_1
K16
VDDHT_2 PART 5/6 VDDPCIE_2
B6
L16 C6
C574 VDDHT_3 VDDPCIE_3 C210 C583
M16 D6
1UF 10V Y5V 0402 VDDHT_4 VDDPCIE_4 1UF 10V Y5V 0402 /NI 1UF 10V Y5V 0402
P16 E6
VDDHT_5 VDDPCIE_5
R16 F6
VDDHT_6 VDDPCIE_6
T16 G7
VDDHT_7 VDDPCIE_7
H8
VDDPCIE_8
H18 J9
VDDHTRX_1 VDDPCIE_9
G19 K9
VDDHTRX_2 VDDPCIE_10
F20 M9
C575 VDDHTRX_3 VDDPCIE_11 C225 C231
E21 L9
+1.2V_HT 1UF 10V Y5V 0402 VDDHTRX_4 VDDPCIE_12 1UF 10V Y5V 0402 /NI 1UF 10V Y5V 0402
D22 P9
VDDHTRX_5 VDDPCIE_13
B23 R9
VDDHTRX_6 VDDPCIE_14
A23 T9
VDDHTRX_7 VDDPCIE_15
V9
VDDPCIE_16
AE25 U9
VDDHTTX_1 VDDPCIE_17
AD24
VDDHTTX_2
AC23 K12
C218 C220 VDDHTTX_3 VDDC_1
AB22 J14
1UF 10V Y5V 0402 /NI 1UF 10V Y5V 0402 VDDHTTX_4 VDDC_2
AA21 U16
VDDHTTX_5 VDDC_3
B Y20
W19
VDDHTTX_6
VDDHTTX_7
VDDC_4
VDDC_5
J11
K15 B
POWER
V18 M12
VDDHTTX_8 VDDC_6 +1.1V +1.1V +1.1V +1.1V
U17 L14
VDDHTTX_9 VDDC_7
T17 L11
+1.8V VDDHTTX_10 VDDC_8
R17 M13
VDDHTTX_11 VDDC_9
P17 M15 BNC1 BNC2 BNC3 BNC4
VDDHTTX_12 VDDC_10
M17 N12 10UF 10V 0805 Y5V /NI 10UF 10V 0805 Y5V /NI 10UF 10V 0805 Y5V /NI 10UF 10V 0805 Y5V /NI
VDDHTTX_13 VDDC_11
N14
VDDC_12
J10 P11
VDDA18PCIE_1 VDDC_13
P10 P13
VDDA18PCIE_2 VDDC_14
K10 P14
C586 C585 VDDA18PCIE_3 VDDC_15 +1.8V +1.8V
M10 R12
1UF 10V Y5V 0402 1UF 10V Y5V 0402 VDDA18PCIE_4 VDDC_16
L10 R15
VDDA18PCIE_5 VDDC_17
W9 T11
VDDA18PCIE_6 VDDC_18
H9 T15 BNC5 BNC6 BOTTOM
VDDA18PCIE_7 VDDC_19
T10 U12 10UF 10V 0805 Y5V /NI 10UF 10V 0805 Y5V /NI
VDDA18PCIE_8 VDDC_20
R10 T14
VDDA18PCIE_9 VDDC_21
Y9 J16
VDDA18PCIE_10 VDDC_22
AA9
C241 VDDA18PCIE_11
AB9 AE10
1UF 10V Y5V 0402 /NI VDDA18PCIE_12 VDD_MEM1(NC)
AD9 AA11
VDDA18PCIE_13 VDD_MEM2(NC)
AE9 Y11
VDDA18PCIE_14 VDD_MEM3(NC)
U10 AD10
VDDA18PCIE_15 VDD_MEM4(NC)
AB10
VDD_MEM5(NC) +3.3V
F9 AC10
A G9
AE11
VDD18_1
VDD18_2
VDD_MEM6(NC)
H11
A
VDD18_MEM1(NC) VDD33_1(NC)
AD11 H12
VDD18_MEM2(NC) VDD33_2(NC)
760G C244 Title
1UF 10V Y5V 0402
RS780 PWOER&SBD_MEM
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 19 of 45

5 4 3 2 1
5 4 3 2 1

1 66MHz 3.3V single ended HTT clock


+3.3V SEL_HTT66
CLK_3V3
CLK_3V3 CLK_VDD 0* 100MHz differential HTT clock

FB27 BEAD 60 0805 1A


1 100MHz non-spreading differential SATA clock
D C245 C247 C248 C249 C250 C251 C545 +
SEL_SATA D
0.1UF 16V X7R 0402 0.1UF 16V X7R 0402 0.1UF 16V X7R 0402 0.1UF 16V X7R 0402 0.1UF 16V X7R 0402 0.1UF 16V X7R 0402 10UF 10V 0805 Y5V 0* 100MHz differential spreading SRC clock
CT2
1000UF 6.3V 8X12 6.3X9
* default
+5V

2- ROUTE ALL SRCCLKTx AND SRCCLKCx


1- PLACE ALL THE SERIES TERMINATION AS DIFFERENT PAIR RULE EC14
RESISTORS AS CLOSE TO U800 AS 0.1UF 16V X7R 0402
POSSIBLE
EMI
3- PUT DECOUPLING CAPS CLOSE TO U800
POWER PIN Place R800/801 less than 500 mils away from U800
R851 less than 100 mils away from R800/801
route CPU clock as 100ohm differential pair
CLK_3V3 CLK_VDDA
U3A
C254 C255
CLK_3V3 1UF 10V Y5V 0402 0.1UF 16V X7R 0402 44 50
VDDA CPUKG0T_LPRS CPU_CLK 7
43 49 CPU_CLK_ 7
C256 GNDA CPUKG0C_LPRS
46
CPUKG1T_LPRS
C 0.1UF 16V X7R 0402 CLK_VDDREF 60
61
VDDREF
GNDREF
CPUKG1C_LPRS
45
C
38
CLK_3V3 ATIG0T_LPRS
39 37
VDDSATA ATIG0C_LPRS
42 36 NBSRC_CLKP 18
C257 GNDSATA ATIG1T_LPRS
35 NBSRC_CLKN 18
0.1UF 16V X7R 0402 CLK_VDD48 ATIG1C_LPRS
64 32 GFX_CLKP 27
VDD48 ATIG2T_LPRS
3 31 GFX_CLKN 27
GND48 ATIG2C_LPRS
30
ATIG3T_LPRS
48 29
VDDCPU ATIG3C_LPRS
47
GNDCPU
27
SB_SRC0T_LPRS
CLK_VDD 56 26
VDDHTT SB_SRC0C_LPRS
53 23
GNDHTT SB_SRC1T_LPRS
Parallel Resonance 34
SB_SRC1C_LPRS
22
VDDATIG
Crystal SRC0T_LPRS
21 NBGPP_CLKP 18
11 20 NBGPP_CLKN 18
VDDSRC1 SRC0C_LPRS
16 19
VDDSRC2 SRC1T_LPRS
25 18
VDDSB_SRC SRC1C_LPRS
15
SRC2T_LPRS
28 14
GNDATIG1 SRC2C_LPRS
33 13 GBE_CLKP 44
C258 22P 50V NPO 0402 GNDATIG2 SRC3T_LPRS
12 GBE_CLKN 44
SRC3C_LPRS
10 9 SBLINK_CLKP 18
GNDSRC1 SRC4T_LPRS
2

17 8 SBLINK_CLKN 18
Y1 GNDSRC2 SRC4C_LPRS
24 7
B 14.318MHZ 16PF 20PPM
62
GNDSB_SRC SRC5T_LPRS
SRC5C_LPRS
6
41
B
1

X1 SRC6T/SATAT_LPRS SBSRC_CLKP 21,22


C259 22P 50V NPO 0402 63 40
X2 SRC6C/SATAC_LPRS SBSRC_CLKN 21,22

22,37,40 MASTER_RST# 52 55 NBHT_REFCLKP 18


RESTORE# HTT0T/66M_LPRS
54 NBHT_REFCLKN 18
HTT0C/66M_LPRS
13,14,22 SCLK 4
SMBCLK 48M_SIO R62 33 0402
13,14,22 SDATA 5 2 CLK_48M_SIO 33
SMBDAT 48MHz_0 48M_USB R63 33 0402
1 CLK_48M_USB 22
R64 1K 1% 0402 48MHz_1
51
CLK_VDD PD# EC11 EC12
R65 8.2K 0402 59 10P 50V NPO 0402 /NI 10P 50V NPO 0402 /NI
REF0/SEL_HTT66
58 65
REF1/SEL_SATA GND
57
R68 8.2K 0402 REF2

RTM880N-793 QFN 64P +5V

EMI
18 OSC_14M_NB
R69 150 1% 0402 Clock chip has internal serial terminations
C580
R70 for differencial pairs, external resistors are 0.1UF 16V Y5V 0402
90.9 1% 0402 reserved for debug purpose.

A +5V
A
EMI
C594 Title
0.1UF 16V Y5V 0402 CLOCK GEN
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 20 of 45

5 4 3 2 1
5 4 3 2 1

U4A

R516 33 0402 A_RST1# N2


SB700 P4 PCICLK0
18,27,33 A_RST# A_RST# PCICLK0
Part 1 of 5 P3 PCICLK1

PCI CLKS
C261 0.1UF 16V X7R 0402 PCICLK1 PCICLK2
17 A_RX0P V23 P1
C262 0.1UF 16V X7R 0402 PCIE_TX0P PCICLK2 PCICLK3
17 A_RX0N V22 P2
C263 0.1UF 16V X7R 0402 PCIE_TX0N PCICLK3 PCICLK4
17 A_RX1P V24 T4
C264 0.1UF 16V X7R 0402 PCIE_TX1P PCICLK4
V25 T3
D 17
17
17
A_RX1N
A_RX2P
A_RX2N
C265 0.1UF 16V X7R 0402
C266 0.1UF 16V X7R 0402
U25
U24
PCIE_TX1N
PCIE_TX2P
PCICLK5/GPIO41
D
C267 0.1UF 16V X7R 0402 PCIE_TX2N
17 A_RX3P T23
C268 0.1UF 16V X7R 0402 PCIE_TX3P PCI_RST#A
17 A_RX3N T22 N1
PCIE_TX3N PCIRST#

PCI EXPRESS INTERFACE


U22 PCI_AD[31..0]
17 A_TX0P PCIE_RX0P PCI_AD[31..0] 28
17 A_TX0N U21 U2 PCI_AD0
PCIE_RX0N AD0 PCI_AD1
17 A_TX1P U19 P7
PCIE_RX1P AD1 PCI_AD2
17 A_TX1N V19 V4
PCIE_RX1N AD2 PCI_AD3 RN21
17 A_TX2P R20 T1
PCIE_RX2P AD3 PCI_AD4 PCICLK0
17 A_TX2N R21 V3 2 1
PCIE_RX2N AD4 PCI_AD5 PCICLK2
17 A_TX3P R18 U1 4 3 PCI_CLK2 25
PCIE_RX3P AD5 PCI_AD6 PCICLK3
17 A_TX3N R17 V1 6 5 PCI_CLK3 25,33
+1.1V PCIE_RX3N AD6 PCI_AD7 PCICLK4
V2 8 7
R74 562 1% 0402 AD7 PCI_AD8
T25 T2
R75 2.05K 1% 0402 PCIE_CALRP AD8 PCI_AD9 22 8P4R 0402
T24 W1
PCIE_CALRN AD9 PCI_AD10 RN74
T9
AD10 PCI_AD11
P24 R6 2 1
PCIE_PVDD AD11 PCI_AD12
R7 4 3
AD12 PCI_AD13 PCI_RST#A
P25 R5 6 5 PCI_RST# 28
C269 PCIE_PVSS AD13 PCI_AD14 PCICLK1
U8 8 7 PCI_CLK1 28
1UF 16V 0805 Y5V AD14 PCI_AD15
U5
AD15 PCI_AD16 22 8P4R 0402
Y7
AD16 PCI_AD17 RN75
W8
AD17 PCI_AD18 LPC_CLK0A
V9 2 1 LPC_CLK0 25
AD18 PCI_AD19 LPC_CLK1A
Y8 4 3 LPC_CLK1 25
AD19 PCI_AD20
AA8 6 5
AD20 PCI_AD21
Y4 8 7
C AD21
AD22
AD23
Y3
Y2
PCI_AD22
PCI_AD23 22 8P4R 0402
C
AA2 PCI_AD24
AD24 PCI_AD25
AB4
AD25 PCI_AD26
20,22 SBSRC_CLKP N25 AA1
PCIE_RCLKP/NB_LNK_CLKP AD26 PCI_AD27
20,22 SBSRC_CLKN N24 AB3
PCIE_RCLKN/NB_LNK_CLKN AD27 PCI_AD28
AB2
AD28 PCI_AD29
K23 AC1
NB_DISP_CLKP AD29

PCI INTERFACE
K22 AC2 PCI_AD30
NB_DISP_CLKN AD30 PCI_AD31 PCI_CBE#[3..0]
AD1 PCI_CBE#[3..0] 28
AD31 PCI_CBE#0
M24 W2
D2 NB_HT_CLKP CBE0# PCI_CBE#1
M25 U7
SS12/5817 SMA NB_HT_CLKN CBE1# PCI_CBE#2
AA7
+3V3_STBY CBE2# PCI_CBE#3
P17 Y1
A K VBAT CPU_HT_CLKP CBE3#
M18 AA6 PCI_FRAME# 28
CPU_HT_CLKN FRAME#
W5 PCI_DEVSEL# 28
A_VBAT R87 1K 1% 0402 VBATREF DEVSEL#
M23 AA5 PCI_IRDY# 28
A K SLT_GFX_CLKP IRDY#
M22 Y5 PCI_TRDY# 28
SLT_GFX_CLKN TRDY#
1

D3 +3.3V_VBAT U6
PAR PCI_PAR 28
SS12/5817 SMA C274 J19 W6
GPP_CLK0P STOP# PCI_STOP# 28
BAT1 1UF 16V 0805 Y5V 2 J18 W4
GPP_CLK0N PERR# PCI_PERR# 28
BATTERY HOLDER-1 V7
SERR# PCI_SERR# 28
JCMOS1 L20 AC3 +3.3V
GPP_CLK1P REQ0# PCI_REQ#0 28
HEADER 1X3 L19 AD4
3

GPP_CLK1N REQ1# RN105


AB7
REQ2#

CLOCK GENERATOR
M19 AE6 2 1 LPC_AD0 33
GPP_CLK2P REQ3#/GPIO70
M20 AB6 4 3 LPC_AD1 33
GPP_CLK2N REQ4#/GPIO71
AD2 PCI_GNT#0 28 6 5 LPC_AD2 33
GNT0#
B 1-2: NORMAL
N22
P22
GPP_CLK3P
GPP_CLK3N
GNT1#
GNT2#
AE4
AD5
8 7 LPC_AD3 33 B
AC6 10K 8P4R 0402
GNT3#/GPIO72
2-3: CMOS CLEAR L18
25M_48M_66M_OSC GNT4#/GPIO73
AE5
CLKRUN#
AD6 SB700 ONLY
V5 PCI_LOCK# 28
LOCK#
J21
32K_X1 25M_X1
AD3 PCI_INTA# 28
INTE#/GPIO33 R617 300 0402
AC4 PCI_INTB# 28 LPC_FRAME_ 33
INTF#/GPIO34
AE2 PCI_INTC# 28
INTG#/GPIO35
J20 AE3 PCI_INTD# 28
25M_X2 INTH#/GPIO36
Y2 2 1 32.768KHZ 12.5PF 20PPM 32K_X2
G22 LPC_CLK0A
LPCCLK0 LPC_CLK1A
E22
R80 10M 0402 R385 10M 0402 32K_X1 LPCCLK1
A3 H24 LPC_AD0 33
X1 LAD0
RTC XTAL

H23 LPC_AD1 33
LAD1
J25 LPC_AD2 33
C270 C271 LAD2
J24
LPC

32K_X2 LAD3 LPC_AD3 33


18P 50V NPO 0402 18P 50V NPO 0402 B3 H25
X2 LFRAME# LPC_FRAME_ 33
H22 LDRQ# 33
LDRQ0# +3.3V
AB8
LDRQ1#/GNT5#/GPIO68 BMREQ# R84 10K 1% 0402 /NI
AD7
BMREQ#/REQ5#/GPIO65
V15 LPC_SERIRQ 33
+1.8V R85 1K 1% 0402 SERIRQ

18 ALLOW_LDTSTOP F23
ALLOW_LDTSTP
7 CPU_PROCHOT# F24 C3
PROCHOT# RTCCLK +3.3V_VBAT
7 HTCPU_PWRGD F22 C2
LDT_PG INTRUDER_ALERT#
CPU

A A
RTC

7,18 LDT_STOP# G25 B2 R527 510 1% 0402


LDT_STP# VBAT
7,18 LDT_RST# G24
LDT_RST#
C272 C273
SB710 A14 1UF 10V Y5V 0402 0.1UF 16V Y5V 0402

Title
SB710 PCIE/PCI/CPU/LPC
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 21 of 45

5 4 3 2 1
5 4 3 2 1
U4D

SB700 Part 4 of 5
28 PCI_PME# E1
EXT_EVNT0# PCI_PME#/GEVENT4#
36 EXT_EVNT0# E2 C8 CLK_48M_USB 20
RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC
27,33,44 PCIE_RST#_RR H7
F5 SLP_S2/GPM9# G8 R88 11.8K 1% 0402
33,40 SLP_S3# SLP_S3# USB_RCOMP
G1

USB MISC
33 SLP_S5# SLP_S5#
33 SB_PWRON# H2
PWR_BTN#

ACPI / WAKE UP EVENTS


40,43 SB_PWRGD H1
K3 PWR_GOOD
18 SUS_STAT# SUS_STAT#
D RSMRST#
H5
H4
TEST2
TEST1
USB_FSD13P
USB_FSD13N
E6
E7 D
H3
TEST0
Y15 F7

USB 1.1
33 A20GATE GA20IN/GEVENT0# USB_FSD12P
C275 W15 E8
33 SIO_KBRST_ KBRST#/GEVENT1# USB_FSD12N
1UF 16V 0805 Y5V /NI K4
33 IO_PME_ LPC_PME#/GEVENT3#
33 LPC_SMI# K24 H11
LPC_SMI#/EXTEVNT1# USB_HSD11P
F1 J10
40 S3_STATE S3_STATE/GEVENT5# USB_HSD11N
20,37,40 MASTER_RST# J2
+3.3V_DUAL H6 SYS_RESET#/GPM7# E11
27,44 PCIE_WAKE WAKE#/GEVENT8# USB_HSD10P
F2 F11
BLINK/GPM6# USB_HSD10N
7 CPU_THERMTRIP# J6
RN76 NB_PWRGD_IN SMBALERT#/THRMTRIP#/GEVENT2#
W14 A11 USBP9 39
SDATA1 18 NB_PWRGD_IN NB_PWRGD USB_HSD9P
2 1 B11 USBN9 39
USB_HSD9N
4 3 33 RSMRST# D3
RSMRST#
6 5 C10 USBP8 39
SCLK1 USB_HSD8P
8 7 D10 USBN8 39
USB_HSD8N
2.2K 8P4R 0402 AE18 G11
32 FPAUD_PRESENCE# SATA_IS0#/GPIO10 USB_HSD7P
AD18 H12
+3.3V 28 ROMCS# CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N
7 CPU_PRESENT# AA19
RN106 SMATVOLT1/SATA_IS2#/GPIO4
W17 E12
SDATA 2 1 V17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E14
SCLK CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N
4 3 W20
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
6 5 37 SPKR
W21 C12 USBP5 39
SPKR/GPIO2 USB_HSD5P

USB 2.0
8 7 13,14,20 SCLK AA18 D12 USBN5 39
SCL0/GPOC0# USB_HSD5N
13,14,20 SDATA W18
2.2K 8P4R 0402 SDA0/GPOC1#
27,28,41 SCLK1 K1 B12 USBP4 39
SCL1/GPOC2# USB_HSD4P
27,28,41 SDATA1 K2 A12 USBN4 39
SDA1/GPOC3# USB_HSD4N

GPIO
29 PDMA66 AA20
DDC1_SCL/GPIO9
Y18 G12
C +3.3V C1
Y19
DDC1_SDA/GPIO8
LLB#/GPIO66
SMARTVOLT2/SHUTDOWN#/GPIO5
USB_HSD3P
USB_HSD3N
G14
USBP3
USBN3
30
30 C
G5 H14 USBP2 30
SUS_STAT# R551 4.7K 0402 DDR3_RST#/GEVENT7# USB_HSD2P
H15 USBN2 30
USB_HSD2N
A13 USBP1 30
USB_HSD1P
B13 USBN1 30
USB_HSD1N
+3.3V B14
USB_HSD0P USBP0 30
B9 A14 USBN0 30
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N
B8
39 USB_OCP234# USB_OC5#/IR_TX0/GPM5#
A8 A18
USB_OC4#/IR_RX0/GPM4# IMC_GPIO8

USB OC
EC16 A9 B18
0.1UF 16V X7R 0402 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
30 USB_OCP1# E5 F21
F8 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 D21
30 USB_OCP1# USB_OC1#/GPM1# SCL2/IMC_GPIO11
EMI E4
USB_OC0#/GPM0# SDA2/IMC_GPIO12
F19
E20
R94 22 0402 AZ_BIT_CLK_R SCL3_LV/IMC_GPIO13
31 AZ_BIT_CLK M1 E21
AZ_SDATA_OUT_R AZ_BITCLK SDA3_LV/IMC_GPIO14
2 1 M2 E19
AZ_SDATA_OUT_R AZ_SDOUT IMC_PWM1/IMC_GPIO15
4 3 31 ACZ_SDATA_IN2 J7 D19 IMC_GPIO16 25
31 AZ_SDATA_OUT AZ_SYNC_ AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16
6 5 J8 E18 IMC_GPIO17 25
31 AZ_SYNC AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17

HD AUDIO
8 7 AZ_RST_R# L8
25,31 AZ_RST# AZ_SDIN2/GPIO44
M3 G20
RN25 22 8P4R 0402 AZ_SYNC_ AZ_SDIN3/GPIO46 IMC_GPIO18
L6 G21
AZ_RST_R# M4 AZ_SYNC IMC_GPIO19 D25
AZ_RST# IMC_GPIO20
L5 D24
AZ_DOCK_RST#/GPM8# IMC_GPIO21

INTEGRATED uC
C25
+3.3V_DUAL +3.3V_DUAL IMC_GPIO22
C24
IMC_GPIO23 B25
IMC_GPIO24
C23
IMC_GPIO25
B B24 B
K

IMC_GPIO26
B23
Q10 Q11 IMC_GPIO27
A23
IMC_GPIO28
C22
IMC_GPIO29
A22
KA

KA

IMC_GPIO30
B22
BAV99 SOT23 /NI BAV99 SOT23 /NI IMC_GPIO31
B21
IMC_GPIO32 A21
SDATA1 SCLK1 +3.3V IMC_GPIO33
H19 D20
IMC_GPIO0 IMC_GPIO34 GPIO35
H20 C20
IMC_GPIO1 IMC_GPIO35

INTEGRATED uC
IDE_RST# R550 10K 1% 0402 H21 A20 GPIO36 +3.3V_DUAL
IDE_RST# SPI_CS2#/IMC_GPIO2 IMC_GPIO36 GPIO37
F25 B20
29 IDE_RST# IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 GPIO38 R519 4.7K 0402 /NI
B19
IMC_GPIO38 GPIO39 R520 4.7K 0402 /NI
D22 A19
IMC_GPIO4 IMC_GPIO39 GPIO40 R521 4.7K 0402 /NI
E24 D18
IMC_GPIO5 IMC_GPIO40 GPIO41 R522 4.7K 0402 /NI
E25 C18
SBSRCCLKP IMC_GPIO6 IMC_GPIO41
20,21 SBSRC_CLKP D23
SBSRCCLKN IMC_GPIO7 R523 4.7K 0402 /NI
20,21 SBSRC_CLKN
R524 4.7K 0402 /NI
20 CLK_48M_USB CLK48MUSB R525 4.7K 0402 /NI
SB710 A14 R526 4.7K 0402 /NI
33 RSMRST# RSMRST R01P : 111(EUP /NI)
40,43 SB_PWRGD SBPWRGD R02P : 110(ADD EUP)
+3.3V_DUAL

Near SB
A R8
4.7K 0402
R9
4.7K 0402
R2
4.7K 0402 A
GPIO35
GPIO36
GPIO37

R25 R18 R3 Title


4.7K 0402 /NI 4.7K 0402 /NI 4.7K 0402 /NI SB710 ACPI/GPIO/USB/AUD
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 22 of 45

5 4 3 2 1
SATA1
2
5 4 3 2 1
TX+
3
TX-

5
RX-
6
RX+

1
GND
4
GND#4
7
D GND#7
SATA CONNECTOR-R
D
U4B

2 SATA2 SB700
TX+ SATA_TX0+_C C276 0.01UF 25V X7R 0402 SATA_TX0+ AD9 AA24 PDIORDY#_R 29
SATA_TX0-_C C277 0.01UF 25V X7R 0402 SATA_TX0- SATA_TX0P IDE_IORDY
TX-
3 AE9
SATA_TX0N Part 2 of 5 IDE_IRQ
AA25 SIRQI 29
Y22 PDA_R0
SATA_RX0-_C C278 0.01UF 25V X7R 0402 SATA_RX0- IDE_A0 PDA_R1
AB10 AB23 PDA_R[2..0] 29
SATA_RX0+_C C279 0.01UF 25V X7R 0402 SATA_RX0+ SATA_RX0N IDE_A1 PDA_R2
5 AC10 Y23
RX- SATA_RX0P IDE_A2
AB24 PDACK#_R 29
SATA_TX1+_C C280 0.01UF 25V X7R 0402 SATA_TX1+ IDE_DACK#
6 AE10 AD25 PDREQ_R 29
RX+ SATA_TX1-_C C281 0.01UF 25V X7R 0402 SATA_TX1- SATA_TX1P IDE_DRQ
AD10 AC25 PDIOR#_R 29
SATA_TX1N IDE_IOR#
AC24 PDIOW#_R 29
SATA_RX1-_C C282 0.01UF 25V X7R 0402 SATA_RX1- IDE_IOW#
1 AD11 Y25 PDCS1#_R 29
GND SATA_RX1+_C C283 0.01UF 25V X7R 0402 SATA_RX1+ SATA_RX1N IDE_CS1#
4 AE11 Y24 PDCS3#_R 29
GND#4 SATA_RX1P IDE_CS3#
7 PDD_R[15..0] 29
GND#7 SATA_TX2+_C C284 0.01UF 25V X7R 0402 SATA_TX2+ PDD_R0
AB12 AD24
SATA CONNECTOR-R SATA_TX2-_C C285 0.01UF 25V X7R 0402 SATA_TX2- SATA_TX2P IDE_D0/GPIO15 PDD_R1
AC12 AD23
SATA_TX2N IDE_D1/GPIO16 PDD_R2
AE22

ATA 66/100/133
SATA3 SATA_RX2-_C C286 0.01UF 25V X7R 0402 SATA_RX2- IDE_D2/GPIO17 PDD_R3
AE12 AC22
SATA_RX2+_C C287 0.01UF 25V X7R 0402 SATA_RX2+ SATA_RX2N IDE_D3/GPIO18 PDD_R4
2 AD12 AD21
TX+ SATA_RX2P IDE_D4/GPIO19 PDD_R5
AE20
SATA_TX3+_C C288 0.01UF 25V X7R 0402 SATA_TX3+ IDE_D5/GPIO20 PDD_R6
3 AD13 AB20
TX- SATA_TX3-_C SATA_TX3- SATA_TX3P IDE_D6/GPIO21

SERIAL ATA
C289 0.01UF 25V X7R 0402 AE13 AD19 PDD_R7
SATA_TX3N IDE_D7/GPIO22 PDD_R8
AE19
SATA_RX3-_C C290 0.01UF 25V X7R 0402 SATA_RX3- IDE_D8/GPIO23 PDD_R9
5 AB14 AC20
RX- SATA_RX3+_C C291 0.01UF 25V X7R 0402 SATA_RX3+ SATA_RX3N IDE_D9/GPIO24 PDD_R10
AC14 AD20
C RX+
6
AE14
SATA_RX3P

SATA_TX4P
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
AE21
AB22
PDD_R11
PDD_R12
C
AD14 AD22 PDD_R13
SATA_TX4N IDE_D13/GPIO28 PDD_R14
1 AE23
GND IDE_D14/GPIO29 PDD_R15
4 AD15 AC23
GND#4 SATA_RX4N IDE_D15/GPIO30
7 AE15
GND#7 SATA_RX4P
SATA CONNECTOR-R AB16
SATA_TX5P
AC16
SATA4 SATA_TX5N SPI_DATAIN
G6
SPI_DI/GPIO12 SPI_DATAOUT
2 AE16 D2
TX+ SATA_RX5N SPI_DO/GPIO11 SPI_CLK
AD16 D1
SATA_RX5P SPI_CLK/GPIO47
3 F4

SPI ROM
TX- R107 1% 1K 1% 0402 SATA_CAL SPI_HOLD#/GPIO31 SPI_CS#
V12 F3
SATA_CAL SPI_CS1#/GPIO32
5 SATA_X1 Y12 U15
RX- SATA_X1 LAN_RST#/GPIO13
J1
SATA_X2 ROM_RST#/GPIO14
6 AA12
RX+ SATA_X2
M8
SATA_ACT# FANOUT0/GPIO3
37 SATA_ACT# W11 M5
SATA_ACT#/GPIO67 FANOUT1/GPIO48
1 M7
GND FANOUT2/GPIO49
4
GND#4
7 AA11 P5
GND#7 PLLVDD_SATA PLLVDD_SATA FANIN0/GPIO50

SATA PWR
P8
SATA CONNECTOR-R FANIN1/GPIO51
XTLVDD_SATA W12 R8
XTLVDD_SATA FANIN2/GPIO52
C6 TEMP_COMM R108 10K 1% 0402
TEMP_COMM
B6
TEMPIN0/GPIO61
B SATA_X1 C301 33P 50V NPO 0402
TEMPIN1/GPIO62
A6
A5
B

HW MONITOR
TEMPIN2/GPIO63
1

B5 CHIP_THERM_ 33
R110 Y3 TEMPIN3/TALERT#/GPIO64
10M 0402 25MHZ 20PF 30PPM A4
VIN0/GPIO53
B4
2

SATA_X2 C302 33P 50V NPO 0402 VIN1/GPIO54


C4
VIN2/GPIO55
D4
VIN3/GPIO56
D5
VIN4/GPIO57 +3.3V_DUAL
D6
VIN5/GPIO58
A7
VIN6/GPIO59
B7
+1.1V PLLVDD_SATA +3.3V XTLVDD_SATA VIN7/GPIO60 FB33 BEAD 60 0805 1A

FB1 SHORT 0805 /NI FB2 SHORT 0805 /NI


F6 C558
AVDD 0.1UF 16V Y5V 0402
C306 +3.3V_DUAL C304 G7
10UF 10V 0805 Y5V 1UF 16V 0805 Y5V AVSS

SB710 A14
C298
0.1UF 16V Y5V 0402 /NI

U5
SPI_CS# 1 8
SPI_DATAIN CE# VDD SPI_HOLD
2 7
SO HOLD#
A SPI_WP# 3
4
WP#
GND
SCK
SI
6
5
SPI_CLK
SPI_DATAOUT A
SPI SOCKET 8PIN
C

Q94 +3.3V_DUAL
2N3904 SOT23 RN29 Title

SPI_WP#
1
3
2
4
SB710 SATA/IDE/SPI
B

SPI_CS# 5 6 Size Document Number Rev


33 SPI_WP
R585 10K 1% 0402 SPI_HOLD 7 8 Custom
A78LK-M3S 7.0

1K 8P4R 0402 Date: Wednesday, July 25, 2012 Sheet 23 of 45

5 4 3 2 1
5 4 3 2 1
U4E

+3.3V U4C +1.1V


SB700 A2
L9
SB700 L15
VSS_1
A25
VDDQ_1 VDD_1 VSS_2
M9
VDDQ_2
Part 3 of 5 VDD_2
M12
VSS_3
B1
T15 M14 D7
C309 U9 VDDQ_3 VDD_3 N13 C318 C319 T10 VSS_4 F20
VDDQ_4 VDD_4 AVSS_SATA_1 VSS_5

CORE S0
+ 0.1UF 16V Y5V 0402 /NI U16 P12 1UF 10V Y5V 0402 1UF 10V Y5V 0402 U10 G19
VDDQ_5 VDD_5 AVSS_SATA_2 VSS_6
D D

PCI/GPIO I/O
U17 P14 U11 H8
C370 VDDQ_6 VDD_6 AVSS_SATA_3 VSS_7
V8 R11 U12 K9
1000UF 6.3V 8X12 6.3X9 VDDQ_7 VDD_7 AVSS_SATA_4 VSS_8
W7 R15 V11 K11
VDDQ_8 VDD_8 AVSS_SATA_5 VSS_9
Y6 T16 V14 K16
VDDQ_9 VDD_9 AVSS_SATA_6 VSS_10
AA4 W9 L4
VDDQ_10 AVSS_SATA_7 VSS_11
AB5 Y9 L7
VDDQ_11 AVSS_SATA_8 VSS_12
AB21 Y11 L10
VDDQ_12 AVSS_SATA_9 VSS_13
Y14 L11
+1.1V Y17 AVSS_SATA_10 VSS_14 L12
+3.3V AVSS_SATA_11 VSS_15
AA9 L14
AVSS_SATA_12 VSS_16
AB9 L16
AVSS_SATA_13 VSS_17
Y20 L21 AB11 M6
VDD33_18_1 CKVDD_1.2V_1 AVSS_SATA_14 VSS_18
AA21 L22 AB13 M10
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_15 VSS_19

CLKGEN I/O
IDE/FLSH I/O
AA22 L24 AB15 M11
C314 C315 VDD33_18_3 CKVDD_1.2V_3 C320 AVSS_SATA_16 VSS_20
AE25 L25 AB17 M13
1UF 10V Y5V 0402 1UF 10V Y5V 0402 VDD33_18_4 CKVDD_1.2V_4 1UF 10V Y5V 0402 /NI AVSS_SATA_17 VSS_21
AC8 M15
AVSS_SATA_18 VSS_22
AD8 N4
AVSS_SATA_19 VSS_23
AE8 N12
AVSS_SATA_20 VSS_24 N14
VSS_25
P6
VSS_26
P9
VSS_27
P10
POWER A15
AVSS_USB_1
VSS_28
VSS_29
P11
+1.1V B15 P13
AVSS_USB_2 VSS_30
C14 P15
AVSS_USB_3 VSS_31
P18 D8 R1
PCIE_VDDR_1 +3.3V_DUAL AVSS_USB_4 VSS_32
P19 D9 R2
PCIE_VDDR_2 AVSS_USB_5 VSS_33
C P20 D11 R4
C

A-LINK I/O
C322 C323 PCIE_VDDR_3 AVSS_USB_6 VSS_34
P21 A17 D13 R9
1UF 10V Y5V 0402 1UF 16V 0805 Y5V PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_7 VSS_35
R22 A24 D14 R10

GROUND
PCIE_VDDR_5 S5_3.3V_2 AVSS_USB_8 VSS_36
R24 B17 D15 R12
PCIE_VDDR_6 S5_3.3V_3 C326 C327 AVSS_USB_9 VSS_37
R25 J4 E15 R14

3.3V_S5 I/O
PCIE_VDDR_7 S5_3.3V_4 0.1UF 16V Y5V 0402 /NI 1UF 10V Y5V 0402 /NI AVSS_USB_10 VSS_38
J5 F12 T11
S5_3.3V_5 L1 F14 AVSS_USB_11 VSS_39 T12
S5_3.3V_6 AVSS_USB_12 VSS_40
L2 G9 T14
+1.1V S5_3.3V_7 AVSS_USB_13 VSS_41
H9 U4
AVSS_USB_14 VSS_42
H17 U14
AVSS_USB_15 VSS_43
AA14 J9 V6
AVDD_SATA_1 +1.2VSB AVSS_USB_16 VSS_44
AB18 J11 Y21
AVDD_SATA_4 AVSS_USB_17 VSS_45
AA15 J12 AB1
AVDD_SATA_2 AVSS_USB_18 VSS_46

SATA I/O
C330 C324 AA17 G2 J14 AB19
AVDD_SATA_3 S5_1.2V_1 AVSS_USB_19 VSS_47

CORE S5
1UF 10V Y5V 0402 /NI 1UF 10V Y5V 0402 AC18 G4 J15 AB25
AVDD_SATA_5 S5_1.2V_2 C334 AVSS_USB_20 VSS_48
AD17 K10 AE1
AE17 AVDD_SATA_6 1UF 10V Y5V 0402 /NI K12 AVSS_USB_21 VSS_49 AE24
AVDD_SATA_7 AVSS_USB_22 VSS_50
K14
AVSS_USB_23
A10 K15
USB_PHY_1.2V_1 AVSS_USB_24
B10 P23
USB_PHY_1.2V_2 PCIE_CK_VSS_9
R16
USB_PHY PCIE_CK_VSS_10
R19
PCIE_CK_VSS_11
T17
PCIE_CK_VSS_12
U18
+3.3V_DUAL PCIE_CK_VSS_13
H18 U20
PCIE_CK_VSS_1 PCIE_CK_VSS_14
J17 V18
V5_VREF C342 PCIE_CK_VSS_2 PCIE_CK_VSS_15
A16 AE7 J22 V20
AVDDTX_0 V5_VREF 1UF 10V Y5V 0402 PCIE_CK_VSS_3 PCIE_CK_VSS_16
B16 K25 V21
B C337 C339 C340
C16
D16
AVDDTX_1
AVDDTX_2 AVDDCK_3.3V
J16 AVDDCK_3.3V M16
M17
PCIE_CK_VSS_4
PCIE_CK_VSS_5
PCIE_CK_VSS_17
PCIE_CK_VSS_18
W19
W22
B
1UF 16V 0805 Y5V /NI 1UF 10V Y5V 0402 1UF 10V Y5V 0402 AVDDTX_3 PCIE_CK_VSS_6 PCIE_CK_VSS_19
D17 K17 M21 W24
PLL

AVDDTX_4 AVDDCK_1.2V AVDDCK_1.2V PCIE_CK_VSS_7 PCIE_CK_VSS_20


E17 P16 W25
AVDDTX_5 PCIE_CK_VSS_8 PCIE_CK_VSS_21
USB I/O

F15 E9 +3.3V_AVDDC
AVDDRX_0 AVDDC
F17 F9 L17
AVDDRX_1 AVSSC AVSSCK
F18
AVDDRX_2
Part 5 of 5
G15
G17 AVDDRX_3 SB710 A14
AVDDRX_4
G18
AVDDRX_5

SB710 A14

Vout=Vref (1.25V) X ( 1+R2/R1 )=1.2V R111 1K 1% 0402 V5_VREF


+5V
+1.1V AVDDCK_1.2V
+3.3V_DUAL +1.2VSB USB_PHY
+3.3V
KA

C344 FB29 BEAD 60 0603


1UF 10V Y5V 0402
A K
C343
R112 1UF 10V Y5V 0402
O
A
I

100 1% 0402 Q12


BAV99 SOT23

A R1 + CT4
100UF 16V 6.3X5 2.5mm +3.3V_AVDDC
+3.3V_DUAL +3.3V
A
Q13 AVDDCK_3.3V
AZ1117H-ADJ SOT-223
FB31 BEAD 60 0603 FB30 BEAD 60 0603

Title
R2
C346 C536 C535 C345 SB710 POWER
1UF 10V Y5V 0402 1UF 10V Y5V 0402 1UF 10V Y5V 0402 1UF 10V Y5V 0402
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 24 of 45

5 4 3 2 1
5 4 3 2 1

21,33 PCI_CLK3 +3.3V_DUAL


RN79
21 PCI_CLK2
2 1
21 LPC_CLK0

1
3
5
7
4 3
RN80 21 LPC_CLK1
22 IMC_GPIO16 6 5
2.2K 8P4R 0402 22 IMC_GPIO17 8 7
D +3.3V D

2
4
6
8
2.2K 8P4R 0402 22,31 AZ_RST#
R125
2.2K 0402 EC15
0.1UF 16V X7R 0402

EMI

REQUIRED STRAPS NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 LPC_CLK0 LPC_CLK1 AZ_RST# IMC_GPIO17 IMC_GPIO16


ROM TYPE:
WATCHDOG TIMER USE RESERVED RESERVED ENABLE PCI CLKGEN IMC
PULL H, L = SPI ROM DEFAULT
ON NB_PWRGD DEBUG MEM BOOT ENABLED ENABLED
HIGH ENABLED STRAPS
C C
PULL WATCHDOG TIMER IGNORE DISABLE PCI CLKGEN IMC
LOW ON NB_PWRGD DEBUG MEM BOOT DISABLED DISABLED
DISABLED STRAPS DEFAULT DEFAULT DEFAULT
DEFAULT DEFAULT

OVERLAP COMMON PADS WHERE


B POSSIBLE FOR DUAL-OP
B
RESISTORS.

DEBUG STRAPS SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]


PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

A A
PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM
LOW SHORT PCI PLL ACPI PLL PCIE Title
RESET BCLK STRAPS SB710 STRAP
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 25 of 45

5 4 3 2 1
5 4 3 2 1

D D

+3.3V

K
Q14 Q15 Q16
BAV99 SOT23 /NI BAV99 SOT23 /NI BAV99 SOT23 /NI
KA KA KA +5V
PLACE L2,L4,L6
90 DEGREE FROM

A
EACH OTHER

1
+5V FS1 R616
POLY FUSE 1.1A /NI 0 0805

2
L2 INDUCTOR 68NH 300MA 0805 R_FILTER
18 R G_FILTER
R134 L4 INDUCTOR 68NH 300MA 0805
18 G B_FILTER
4.7K 0402 L6 INDUCTOR 68NH 300MA 0805
18 B
R129 33 0402 VGA_SDATA
18 DAC_SDA
VGA PWR
R130 33 0402 VGA_SCLK
VGA PWR
C +5V
R131
R132
27 0402
27 0402
VGA_HSYNC
VGA_VSYNC
C
C348 100P 50V NPO 0402 /NI
C349 5P 50V NPO 0402 /NI R135 R136 R137 C350 5P 50V NPO 0402 /NI C351
R140 150 1% 0402 150 1% 0402 140 1% 0402 C352 22P 50V NPO 0402 C353 100P 50V NPO 0402 /NI 0.1UF 16V Y5V 0402
4.7K 0402 C354 5P 50V NPO 0402 /NI C355 5P 50V NPO 0402 /NI
C356 22P 50V NPO 0402 C357 100P 50V NPO 0402 /NI
C358 5P 50V NPO 0402 /NI C359 5P 50V NPO 0402 /NI
C360 22P 50V NPO 0402 C361 100P 50V NPO 0402 /NI IO_GND
18 DAC_SCL

IO_GND
R139 SHORT 0805 /NI +5V IO_GND
VQ2
+5V
R142 SHORT 0805 /NI VGA_HSYNC 1 6 VGA_SDATA

B1

A1
C363 0.1UF 16V Y5V 0402

CM1293
USB5V_LAN R143 SHORT 0805 /NI C365 2 5 VGA1
VGA PWR

+
B2 -
0.1UF 16V Y5V 0402 VGA CONN PC99 SHORT
U7A C362 0.1UF 16V Y5V 0402 VGA_VSYNC VGA_SCLK
14

3 4 6

A2
74AHC08D R_FILTER 1
18 HSYNC# 1 11
CM1293 SOT23-6 /NI
3 7
2 IO_GND G_FILTER 2
VGA_SDATA 12
8
7

B_FILTER 3
VGA_HSYNC 13
VGA PWR
B VGA_VSYNC
9
4
14
B
10
+5V 5
VGA_SCLK 15

G1
G2
U7B
14

74AHC08D
18 VSYNC# 4
6
5
IO_GND
7

VGA CONNECTOR

A A

Title
CRT
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 26 of 45

5 4 3 2 1
5 4 3 2 1

+3.3V +12V +12V +3.3V +3.3V_DUAL


PCIE_RST#
PEX16_1 20 GFX_CLKP
18 COMM_EN A1
PRSNT1# +12V#B1
B1 20 GFX_CLKN Near PCI_E Slot
A2 B2
+12V#A2 +12V#B2
A3 B3
+12V#A3 RSVD#B3
A4 B4
GND#A4 GND#B4
A5 B5 SCLK1 22,28,41
D TCK SMCLK D
A6 B6 SDATA1 22,28,41
TDI SMDAT
A7 B7
TDO GND#B7
A8 B8
TMS +3.3V#B8
A9 B9
+3.3V#A9 TRST#
A10 B10
PCIE_RST# +3.3V#A10 3.3Vaux
33,44 PCIE_RST# A11 B11 PCIE_WAKE 22,44
PERST# WAKE#
A12 Mechanical Key B12
GND#A12 RSVD#B12 +5V
20 GFX_CLKP A13 B13
REFCLK+ GND#B13
20 GFX_CLKN A14 B14 GFX_TX0P 17
REFCLK- PETp0
A15 B15 GFX_TX0N 17
GND#A15 PETn0 U7C
17 GFX_RX0P A16 B16
PERp0 GND#B16 74AHC08D
A17 B17

14
17 GFX_RX0N PERn0 PRSNT2#B17
A18 B18
GND#A18 GND#B18 R538
18,21,33 A_RST# 9
End of the x1 Connector 8 PCIEX16_RESTA PCIE_RST#
A19 B19 GFX_TX1P 17 22,33,44 PCIE_RST#_RR 10
RSVD#A19 PETp1 1K 0402 /NI
A20 B20 GFX_TX1N 17
GND#A20 PETn1 R539
17 GFX_RX1P A21 B21

7
PERp1 GND#B21 2K 0402 /NI
17 GFX_RX1N A22 B22
PERn1 GND#B22
A23 B23 GFX_TX2P 17
GND#A23 PETp2
A24 B24 GFX_TX2N 17
GND#A24 PETn2
17 GFX_RX2P A25 B25
PERp2 GND#B25
17 GFX_RX2N A26 B26
PERn2 GND#B26
A27 B27 GFX_TX3P 17
GND#A27 PETp3
A28 B28 GFX_TX3N 17
C GND#A28 PETn3 +3.3V_DUAL C
17 GFX_RX3P A29 B29
PERp3 GND#B29 +5V +12V
17 GFX_RX3N A30 B30
PERn3 RSVD#B30
A31 B31
GND#A31 PRSNT2#B31
A32 B32
RSVD#A32 GND#B32
End of the x4 Connector C367 C368 C374 C369
A33 B33 GFX_TX4P 17 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402 /NI
RSVD#A33 PETp4
A34 B34 GFX_TX4N 17
GND#A34 PETn4
17 GFX_RX4P A35 B35
PERp4 GND#B35
17 GFX_RX4N A36 B36
PERn4 GND#B36
A37 B37 GFX_TX5P 17
GND#A37 PETp5
A38 B38 GFX_TX5N 17
GND#A38 PETn5 +12V
17 GFX_RX5P A39 B39
PERp5 GND#B39
17 GFX_RX5N A40 B40
PERn5 GND#B40
A41 B41 GFX_TX6P 17
GND#A41 PETp6
A42 B42 GFX_TX6N 17
GND#A42 PETn6
17 GFX_RX6P A43 B43
PERp6 GND#B43 C375 C376 C377
17 GFX_RX6N A44 B44
PERn6 GND#B44 470UF 16V 8X11.5 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402 /NI
A45 B45 GFX_TX7P 17
GND#A45 PETp7
A46 B46 GFX_TX7N 17
GND#A46 PETn7
17 GFX_RX7P A47 B47
PERp7 GND#B47
17 GFX_RX7N A48 B48
PERn7 PRSNT2#B48
A49 B49
GND#A49 GND#B49 +3.3V
End of the x8 Connector
A50 B50 GFX_TX8P 17
B RSVD#A50 PETp8 B
A51 B51 GFX_TX8N 17
GND#A51 PETn8
17 GFX_RX8P A52 B52
PERp8 GND#B52 C371 C372 C373
17 GFX_RX8N A53 B53
PERn8 GND#B53 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402
A54 B54 GFX_TX9P 17
GND#A54 PETp9
A55 B55 GFX_TX9N 17
GND#A55 PETn9
17 GFX_RX9P A56 B56
PERp9 GND#B56
17 GFX_RX9N A57 B57
PERn9 GND#B57
A58 B58 GFX_TX10P 17
GND#A58 PETp10 +3.3V
A59 B59 GFX_TX10N 17
GND#A59 PETn10
17 GFX_RX10P A60 B60
PERp10 GND#B60
17 GFX_RX10N A61 B61
PERn10 GND#B61
A62 B62 GFX_TX11P 17
GND#A62 PETp11
A63 B63 GFX_TX11N 17
GND#A63 PETn11 C378 C379 C380
17 GFX_RX11P A64 B64
PERp11 GND#B64 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402 /NI
17 GFX_RX11N A65 B65
PERn11 GND#B65
A66 B66 GFX_TX12P 17
GND#A66 PETp12
A67 B67 GFX_TX12N 17
GND#A67 PETn12
17 GFX_RX12P A68 B68
PERp12 GND#B68
17 GFX_RX12N A69 B69
PERn12 GND#B69
A70 B70 GFX_TX13P 17
GND#A70 PETp13
A71 B71 GFX_TX13N 17
GND#A71 PETn13
17 GFX_RX13P A72 B72
PERp13 GND#B72
17 GFX_RX13N A73 B73
PERn13 GND#B73
A74 B74 GFX_TX14P 17
GND#A74 PETp14
A75 B75 GFX_TX14N 17
GND#A75 PETn14
17 GFX_RX14P A76 B76
A PERp14 GND#B76 A
17 GFX_RX14N A77 B77
PERn14 GND#B77
A78 B78 GFX_TX15P 17
GND#A78 PETp15
A79 B79 GFX_TX15N 17
GND#A79 PETn15
17 GFX_RX15P A80 B80
PERp15 GND#B80
17 GFX_RX15N A81 B81
PERn15 PRSNT2#B81
A82 B82
GND#A82 RSVD#B82 Title
PCI-E SLOT
Size Document Number Rev
PCIEX16-164 PIN-B
Custom A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 27 of 45


5 4 3 2 1
5 4 3 2 1

IDSEL:AD21 , INT:ABCD , REQ0 & GNT0 , PCI_CLK3 +5V


+5V IDSEL:AD22 , INT:BCDA , REQ1 & GNT1 , PCI_CLK4
RN31

+3.3V +3.3V 1 2 PCI_TRST#


3 4 PCI_TCK
5 6 PCI_TMS
+ +5V +5V +3.3V_DUAL 7 8 PCI_TDI

CT34
1000UF 6.3V 8X12 6.3X9 -12V PCI_SLOT 1 +12V
4.7K 8P4R 0402

PCI1
D PCI_TRST# D
B1 A1
PCI_TCK -12V TRST#
B2 A2
TCK +12V PCI_TMS
B3 A3
GND#B3 TMS PCI_TDI
B4 A4
TDO TDI
B5 A5
+5V#B5 +5V#A5
B6 A6 PCI_INTA# 21
+5V#B6 INTA#
21 PCI_INTB# B7 A7 PCI_INTC# 21
INTB# INTC#
21 PCI_INTD# B8 A8
PRSNT1#1 B9 INTD# +5V#A8 A9
PRSNT1# RESERVED#A9
B10 A10
PRSNT1#2 RESERVED#B10 +5Vi/o#A10
B11 A11
B12 PRSNT2# RESERVED#A11 A12
GND#B12 GND#A12
B13 A13
ROMCS# R182 0 0402 /NI GND#B13 GND#A13
22 ROMCS# B14 A14
RESERVED#B14 3.3Vaux
B15 A15 PCI_RST# 21
GND#B15 RESET#
21 PCI_CLK1 B16 A16
CLK +5Vi/o#A16
B17 A17 PCI_GNT#0 21
GND#B17 GNT#
21 PCI_REQ#0 B18 A18
REQ# GND#A18
B19 A19 PCI_PME# 22
PCI_AD31 +5Vi/o#B19 PME# PCI_AD30
B20 A20
PCI_AD29 AD31 AD30
B21 A21
B22 AD29 +3.3V#A21 A22 PCI_AD28
PCI_AD27 GND#B22 AD28 PCI_AD26
B23 A23
PCI_AD25 AD27 AD26
B24 A24
AD25 GND#A24 PCI_AD24
B25 A25
B26 +3.3V#B25 AD24 A26 IDSEL_0
21 PCI_CBE#3 C/BE#3 IDSEL
PCI_AD23 B27 A27
AD23 +3.3V#A27 PCI_AD22
B28 A28
PCI_AD21 GND#B28 AD22 PCI_AD20
B29 A29
PCI_AD19 AD21 AD20
B30 A30
AD19 GND#A30 PCI_AD18
C B31 A31 C
PCI_AD17 B32 +3.3V#B31 AD18 A32 PCI_AD16
AD17 AD16
B33 A33
C/BE#2 +3.3V#A33
21 PCI_CBE#2 B34 A34 PCI_FRAME# 21
GND#B34 FRAME#
21 PCI_IRDY# B35 A35
B36 IRDY# GND#A35 A36
+3.3V#B36 TRDY# PCI_TRDY# 21
21 PCI_DEVSEL# B37 A37
DEVSEL# GND#A37
B38 A38 PCI_STOP# 21
B39 GND#B38 STOP# A39
21 PCI_LOCK# LOCK# +3.3V#A39
21 PCI_PERR# B40 A40 SCLK1 22,27,41
PERR# RESERVED#A40
B41 A41 SDATA1 22,27,41
B42 +3.3V#B41 RESERVED A42
21 PCI_SERR# SERR# GND#A42
B43 A43 PCI_PAR 21
+3.3V#B43 PAR PCI_AD15
21 PCI_CBE#1 B44 A44
PCI_AD14 C/BE#1 AD15
B45 A45
B46 AD14 +3.3V#A45 A46 PCI_AD13
PCI_AD12 GND#B46 AD13 PCI_AD11
B47 A47
PCI_AD10 AD12 AD11
B48 A48
B49 AD10 GND#A48 A49 PCI_AD9
GND#B49 AD9

PCI_AD8 B52 A52


AD8 C/BE#0 PCI_CBE#0 21
PCI_AD7 B53 A53
AD7 +3.3V PCI_AD6
B54 A54
PCI_AD5 +3.3V#B54 AD6 PCI_AD4
B55 A55
PCI_AD3 B56 AD5 AD4 A56
AD3 GND PCI_AD2
B57 A57
PCI_AD1 GND#B57 AD2 PCI_AD0
B58 A58
B59 AD1 AD0 A59
PU1_A64J +5Vi/o#B59 +5Vi/o PU1_R64J
B60 A60
ACK64# REQ64#
B B61 A61 B
+5V#B61 +5V#A61
B62 A62
+5V#B62 +5V
PCI-120 PIN-R

21 PCI_AD[31..0]

FOR EMI NEAR C382 FOR EMI NEAR RN32


IDSEL_0 PCI_AD21 +12V +3.3V
R185 100 1% 0402

C382 EC7 EC8


PRSNT1#1 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402 /NI 0.1UF 16V Y5V 0402 /NI

C384
PRSNT1#2 0.1UF 16V Y5V 0402 /NI

+3.3V RN33 21 PCI_CLK1

1 2 PU1_R64J FOR EMI NEAR C409


3 4 PU1_A64J 21 PCI_RST# Near PCI Slot
5 6
A +5V A
7 8

8.2K 8P4R 0402


EC1

21 PCI_CBE#[3..0]
PCI_CBE#0 0.1UF 16V Y5V 0402
PCI_CBE#1 Title
PCI_CBE#2
PCI_CBE#3
PCI SLOT
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 28 of 45


5 4 3 2 1
5 4 3 2 1

IDE1

D PDDR7 3 4 PDDR8 D
DD7 DD8
PDDR6 5 6 PDDR9
DD6 DD9
PDDR5 7 8 PDDR10
DD5 DD10
PDDR4 9 10 PDDR11
DD4 DD11
PDDR3 11 12 PDDR12
DD3 DD12
PDDR2 13 14 PDDR13
DD2 DD13
PDDR1 15 16 PDDR14
DD1 DD14
PDDR0 17 18 PDDR15
DD0 DD15
IDE_RST# 1
22 IDE_RST# RESET*
PCSEL
CSEL 28
PDREQ 21 DMARQ
PDIOW# 23 DIOW*
PDIOR# 25 34 PDMA66
PDIORDY#
DIOR* PDIAG* PDMA66 22
27 IORDY DA2 36
PDACK# 29 DMACK* CS1* 38
SIRQI_ 31 INTRQ
PDAR1 33 DA1 GND 2 R618 100K 0402
PDAR0 35 DA0 GND 19
PDCS1# 37 CS0* GND 22 C593
P_HDLED* 39 24 0.1UF 16V Y5V 0402 /NI
37 P_HDLED* DASP* GND
GND 26
GND 30
32 NC GND 40

BOX 2X20 N20-R

PDCS3#

C C
PDAR2

PDD_R[15..0]
23 PDD_R[15..0]
PDREQ
23 PDREQ_R
PDIOW#
23 PDIOW#_R
PDIOR#
23 PDIOR#_R PDD_R7 PDDR7
PDD_R8 PDDR8
PDD_R6 PDDR6
PDD_R5 PDDR5
PDD_R9 PDDR9
PDD_R10 PDDR10
PDD_R4 PDDR4
PDD_R11 PDDR11
PDD_R12 PDDR12
B B
PDD_R3 PDDR3
PDD_R2 PDDR2
PDD_R0 PDDR0
PDA_R[2..0]
23 PDA_R[2..0]
PDA_R1 PDAR1
PDIORDY#
23 PDIORDY#_R PDACK#
23 PDACK#_R
PDA_R0 PDAR0
SIRQI_
23 SIRQI
PDA_R2 PDAR2
PDCS1#
23 PDCS1#_R PDCS3#
23 PDCS3#_R
PDD_R13 PDDR13
PDD_R1 PDDR1
PDD_R14 PDDR14
PDD_R15 PDDR15

1) MATCH WHOLE IDE LINES (BEFORE AND


AFTER DAMPING RESISTORS) WITHIN 0.5"
2) ALL DAMPING RESISTORS CLOSE TO
IDE CONNECTORS.

A A

Title
IDE
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 29 of 45


5 4 3 2 1
5 4 3 2 1

D D

BACK PANEL USB


+5V_DUAL PLACE NEAR CONN
USB5V_LAN RJ45USB1A

C386 0.1UF 16V Y5V 0402 USB5V LAN B1


VCC0
B2
R193 PS1 DATA0-
0 0805 /NI POLY FUSE 1.1A B3
USB5V_LAN DATA0+
USB5V LAN R194 27K 0402 B4
USB_OCP1# 22 GND0
G3
C570 C387 0.1UF 16V Y5V 0402 R195 GND2
22 USBN0
C 0.1UF 16V Y5V 0402 + G4 C
51K 0402 22 USBP0 GND3
22 USBN1 A1
CT6 VCC1
22 USBP1 G5
1000UF 6.3V 8X12 6.3X9 GND4
G3 G1 A2
DATA1-
1 5 G6
USBN2 GND5
22 USBN2 2 6 A3
USBP2 DATA1+
22 USBP2 3 7
USBN3 4 8 A4 IO_GND
22 USBN3 GND1
USBP3 G4 G2
22 USBP3
RJ45USBA CONN
USB1
USB CONN

BACK PANEL USB

B B

Q98 Q97
CM1293 SOT23-6 /NI USB5V_LAN CM1293 SOT23-6 /NI USB5V_LAN

USBP2 1 6 USBN2 R196 SHORT 0805 /NI USBN0 1 6 USBP0


B1

B1
A2 + A1

A2 + A1
CM1293

CM1293
2 5 2 5
B2 -

B2 -
USBP3 3 4 USBN3 USBN1 3 4 USBP1

A A

Title
USB CONN
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 30 of 45


5 4 3 2 1
5 4 3 2 1

22,25 AZ_RST#
22 AZ_SYNC
22 AZ_SDATA_OUT AR23 22 0402
22 ACZ_SDATA_IN2
22 AZ_BIT_CLK
ACT1 100UF 16V 6.3X5 2.5mm AR24 75 0402

+
CONNECT TO SB LINEOUT_L 32
D EC13 0.1UF 16V Y5V 0402 AC1 D

+5V 10P 50V NPO 0402 /NI ACT2 100UF 16V 6.3X5 2.5mm AR25 75 0402

+
LINEOUT_R 32
for EMI V0.90 AU1
11 35 PORT-D-L
RESET# (I) FRONT_OUT_L (B) PORT-D-R
10 36
SYNC (I) FRONT_OUT_R (B) PORT-C-L AC2 10UF 10V 0805 Y5V AR26 75 0402
5 23 LINE1_L 32
SDOUT (I) LINE_IN1_L (B)

+
AR2 75 0402 ACT3 100UF 16V 6.3X5 2.5mm 8 24 PORT-C-R AC3 10UF 10V 0805 Y5V AR27 75 0402
32 LINE2_L SDIN (O) LINE_IN1_R (B) LINE1_R 32
6 21 PORT-B-L AC4 10UF 10V 0805 Y5V AR28 75 0402
BITCLK (I) MIC1_L (B) MIC1_L 32

+
AR3 75 0402 ACT4 100UF 16V 6.3X5 2.5mm PORT-E-L 14 22 PORT-B-R AC5 10UF 10V 0805 Y5V AR29 75 0402
32 LINE2_R PORT-E-R LINE_IN2_L (B) MIC1_R (B) MIC1_R 32
15 43
LINE_IN2_R (B) CENTER_OUT (O)
18
CD_L (I) LFE_OUT (O)
44 FOR VT1708B:ADD 5.1K 1%
19
CD_GND (I) SURR_L (B)
39 FOR ALC662:ADD 20K 1%
20 41
AR30 75 0402 AC9 10UF 10V 0805 Y5V PORT-F-L CD_R (I) SURR_R (B)
32 MIC2_L 16 34 FRONT_IO_SENSE 32
AR31 75 0402 AC10 10UF 10V 0805 Y5V PORT-F-R MIC2_L (B) SENSE_B (I)
32 MIC2_R 17 33
AR5 5.1K 1% 0402 SENSE_A MIC2_R (B) DCVOL (I) JDREF AR6 5.1K 1% 0402 GND_AUD
32 FRONT_JD 13 40
AR7 20K 1% 0402 SENSE_A (I) JDREF
32 MIC1_JD 37 48
AR8 10K 1% 0402 LINE1_VREFO_R (O) SPDIFO (O) AC26 0.1UF 16V Y5V 0402
32 LINE1_JD 45 47
SIDESURR_L (O) SPDIFI/EAPD (B) AC11 10UF 10V 0805 Y5V GND_AUD
46 27
SIDESURR_R (O) VREF (O) MIC1_VREFO
12 28
PC_BEEP (I) MIC1_VREFO_L (O)
C
2 29 C
GPIO0 (B) LINE1_VREFO-L (O) MIC2_VREFO
3 30
GPIO1 (B) MIC2_VREFO (O)
4 31
GND1 (P) LINE2_VREFO (O)
7 32
GND2 (P) MIC1_VREFO_R (O) VCC3_L AL1 2.7 0805
1 +3.3V
VCC3_1 (P)
9
VCC3_2 (P) +5VA
26 25
EC2 0.1UF 16V Y5V 0402 AGND1 (P) AVCC_1 (P)
42 38
+5V AGND2 (P) AVCC_2 (P) AC13 AC12
VT1708B LQFP48 1UF 10V Y5V 0402 1UF 10V Y5V 0402
for EMI V0.90 AC15 AC14
GND_AUD 1UF 10V Y5V 0402
1UF 10V Y5V 0402 /NI
32,35 GND_AUD
EC3 0.1UF 16V Y5V 0402 /NI
+5V MIC1_VREFO MIC2_VREFO AR11 0 0402

KA

KA
for EMI

IO_GND GND_AUD

B AQ1 AQ2 B

ER6 0 0402 /NI BAT54A SOT23 BAT54A SOT23 AC16 1000P 50V X7R 0402 /NI

GND_AUD for EMI GND_AUD


K

A
AR12 AR13 AR14 AR15
2.2K 0402 2.2K 0402 2.2K 0402 2.2K 0402

EC4 0 0402
32 MIC1_L 32 MIC2_R
32 MIC1_R 32 MIC2_L
GND_AUD

AR34 22K 0402


32 LINE2_L
A AR32 22K 0402 A
32 LINE2_R
AR33 22K 0402
32 LINEOUT_L
AR35 22K 0402
32 LINEOUT_R
Title
GND_AUD CODEC VT1708B/ALC 662
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 31 of 45


5 4 3 2 1
5 4 3 2 1

D D

ER1 1 2 0 0805 EMI Rear Panel Onboard Analog I/O


GND_AUD

+3.3V

AR16
AL2 BEAD 60 0603 32 AUDIO1D 10K 1% 0402
31 LINE1_L
31 LINE1_JD 33 PORT-E F_AUDIO1 CONNECT TO SB
34 31 MIC2_L 1 2
AL3 BEAD 60 0603 35 3 4
31 LINE1_R 31 MIC2_R FPAUD_PRESENCE# 22
1 5 6 AR17 20K 1% 0402
31 LINE2_R
AUDIO JACK 3HD 7
31 FRONT_IO_SENSE
AC18 AC19 9 10 AR18 39.2K 1% 0402
31 LINE2_L
100P 50V NPO 0402 100P 50V NPO 0402 BLUE JACK 0: INTEL HD AUDIO DONGLE CONNECTED
HEADER 2X5 N8 R
PORT-F GND_AUD 1: INTEL HD AUDIO DONGLE UNCONNECTED
PORT-C
AUDIO ANALOG POWER
C C

AL4 BEAD 60 0603 22 AUDIO1C


31 LINEOUT_L
31 FRONT_JD 23
24
AL5 BEAD 60 0603 25 +5V_STBY +5VA
31 LINEOUT_R
1
AUDIO JACK 3HD AFB1 BEAD 60 0805 1A
AC21 AC22
100P 50V NPO 0402 100P 50V NPO 0402 GREEN JACK

PORT-D

1
+
ACT5 AC20
100UF 16V 6.3X5 2.5mm 1UF 10V Y5V 0402

2
AL7 BEAD 60 0603 2 AUDIO1B
31 MIC1_L
31 MIC1_JD 3 GND_AUD 31,35
4
AL8 BEAD 60 0603 5
31 MIC1_R
1 Vout=Vref (1.25V) X ( 1+R2/R1 )
AUDIO JACK 3HD
AC24 AC25 =5V
100P 50V NPO 0402 100P 50V NPO 0402 PINK JACK
31,35 GND_AUD
B
PORT-B B

GND_AUD
G1

G1 G2 G2

G3 H1

G5 G4
G3

G4

AUDIO1A
AUDIO JACK 3HD

A A

Title
AUDIO CONNECTOR
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 32 of 45


5 4 3 2 1
5 4 3 2 1

PDR7 36 TMPIN1
PDR6 36 CPU_THERMDA 7
SR246 4.7K 0402

SUPERIO PART: S+Reference +3.3V_DUAL


2/26
EXT_SPI#
PDR5 36
PDR4 36
PDR3 36
SC187
2200P 50V X7R 0402
CPU TEMPERATURE
PDR2 36 TS_D- SR313
+3.3V PDR1 36 CPU_THERMDC 7
SHORT 0402 /NI
SRN19 4.7K 8P4R 0402 RTS1#_IO PDR0 36 TMPIN2
36 RTS1# STROBEJ 36 NB_THERMDA 18
7 8 DTR1#_IO JP4 DSR1#_IO
36 DSR1# ALFJ 36
5 6 36 SOUT1
SOUTA_IO
ERRORJ 36 From NB
3 4 RTS1#_IO JP2
36 SIN1
SINA_IO
DTR1#_IO PARINITJ 36
SC188
2200P 50V X7R 0402 /NI
Routed by differential
1 2 36 DTR1# SLCTINJ 36
SR253 680 0402 SOUTA_IO JP3 DCD1#_IO TS_D- SR247 0 0402 /NI
36 DCD1# ACKJ 36 NB_THERMDC 18
D RI1#_IO D
36 RI1# BUSY 36 TMPIN3
SR248 1K 0402 /NI PCIE_RST#_RR CTS1#_IO
36 CTS1# PE 36

B
SR249 1K 0402 PWRGD_30 SLCTJ 36
SR250 1K 0402 PWRGD_50 SQ17

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
SR251 1K 0402 PWRGD_150 SC189 2N3906 SOT23
SU1
SYSTEM TEMPERATURE 2200P 50V X7R 0402
SR252 4.7K 0402 SPI_WP

GNDD
RI1#
DCD1#
DTR1#/JP4
SIN1
SOUT1/JP3
DSR1#
RTS1#/JP2
VCORE_EN/PCH_C0/FAN_CTL4
VLDT_EN/PCH_D0/GP65
GP66
GP67

PD7/GP77/BUSSO2
PD6/GP76/BUSSO1
PD5/GP75/BUSSO0
PD4/GP74/BUSSI2
PD3/GP73/BUSSI1
PD2/GP72/BUSSI0
PD1/GP71
PD0/GP70
STB#/GP87/SMBC_M1
AFD#/GP86/SMBC_R1
ERR#
INIT#/GP85/SMBD_M1
SLIN#/GP84/SMBD_R1
ACK#/GP83

C
TS_D-

+3V3_STBY +3.3V

SR303 4.7K 0402 PWRBTN_ 1 102


CTS1# BUSY/GP82 SFB18
2 101
SR254 1K 0402 5VSB_CTRL PCIE_RST#_RR FAN_CTL5/CIRRX2/GP16 PE/GP81 BEAD 60 0805 1A
22,27,44 PCIE_RST#_RR 3 100
PCIRSTIN#/CIRTX2/GP15 SLCT/GP80 VCC3_SIO
+3V3_STBY 4 99
+3.3V_DUAL 3VSB AVCC3 VIN0
5 98
38 OV_NB_1P1_FB1 GP64 VIN0/VCORE(1.1V) VIN1
6 97
SR255 4.7K 0402 RI1#_IO 38 OV_NB_1P1_FB0 GP63 VIN1/VDIMM_STR(1.5V) VIN2 SC190 SR258
34 FAN1 7 96
8 FAN_TAC1 VIN2(+12V_SEN) 95 VIN3 330 0402 /NI
34 FAN_CTL1 1UF 16V 0805 Y5V
FAN_CTL1 VIN3(+5V_SEN)
34 FAN2 9 94
SR256 10K 0402 RSMRST# FAN_TAC2/GP52 VIN4/VLDT_12
10 93

D
11 FAN_CTL2/GP51 VIN5 92 VIN6
FAN_TAC3/GP37 VIN6 VREF SC191 1UF 10V Y5V 0402 SFB19 BEAD 60 0805 1A SQ18
34 FAN_CTL3 12 91
SR257 10K 0402 PWRON# JP8 FAN_CTL3/GP36 VREF TMPIN1 2N7002 SOT23 /NI
13 90
14
15
RSTCONOUT/GP35
RSTCONIN/GP34
IT8728FBX TMPIN1
TMPIN2
89
88
TMPIN2
TMPIN3

G
S
5VSB_CTRL GNDD TMPIN3 TS_D- SR259 0 0402 /NI PS_ON_
42 5VSB_CTRL 16 87
5VSB_CTRL TS_D- SIO_GNDA
SUPERIO PULLS SR260 33 0402 PWRGD_50
17
5VAUX_SW GNDA
86
RSMRST#
C 40,43 PWRGD50ms
18 85 RSMRST# 22 C
SPI_WP PWRGD2 RSMRST#/CIRRX1/GP55
23 SPI_WP 19 84
ATXPG/GP30 PCIRST3#/GP10 MCLK
42 OV_1P35_FB1 20 83
SIN2/GP27 MCLK/GP56 MDAT MCLK 35
21 82
42 OV_1P35_FB0 SOUT2/GP26 MDAT/GP57 KCLK MDAT 35
SU1_VCORE VCC CAPS 22 LPC_SMI# 22
FAN_TAC4/DSR2#/GP25 KCLK/GP60
81
KDAT KCLK 35
23 80
38 OV_HT_1P2_FB1 FAN_TAC5/RTS2#/GP24 KDAT/GP61 KDAT 35
24 79
SC192 1UF 10V Y5V 0402 38 OV_HT_1P2_FB0 GP23 3VSBSW#/GP40 PWRGD_150 SR262 33 0402 ACPI_LED 37
25 78
38 OV_1P5_FB2 GP22 PWRGD3 SLP_S5# PWRGD_PS 40,42 +3.3V
26 77 SLP_S5# 22
38 OV_1P5_FB1 DCD2#/GP21 SUSC#/GP53 PS_ON_
38 OV_1P5_FB0 27 76
CTS2#/GP20 PSON#/GP42 PWRBTN SR304 33 0402 PS_ON_ 37
28 75 PWRBTN_ 37
RI2#/GP17 PANSHW#/GP43
29 74
+3V3_STBY SR263 4.7K 0402 CIRTX DTR2# GNDD SR264
+5V_STBY 30 73
CIRTX PME#/GP54 PWRON# SR265 33 0402 IO_PME_ 22 10K 0402
31 72 SB_PWRON# 22

SST/AMDTSI_D/PECI_D1/MTRB#
SC196 1UF 16V 0805 Y5V SR266 33 0402 PWRGD_30 PECI_C1/GP14 PWRON#/GP44 SLP_S3#
32 71 SLP_S3# 22,40
40,42 PWRGD30ms PWRGD1 SUSB#
33 70
SC194 0.1UF 16V Y5V 0402 PCIE_RST# PCIRST1#/GP12 GP47 CHIP_THERM_ 23
27,44 PCIE_RST# 34 69 VBAT
PCIRST2#/GP11 VBAT SIO_COPEN# SR268 1K 0402
35 68

PECI/AMDTSI_C/DRVB#
+3V3_STBY 3VSB COPEN#
SU1_VCORE SU1_VCORE 36 67 +3V3_STBY
VCORE 3VSB

SMBD_M2/WGATE#
37 66 SIO_RSMRST_IN SC195

SMBD_R2/HDSEL#
18,21,27 A_RST# LRESET# SYS_3VSB

SMBC_M2/STEP#
38 65 1UF 10V Y5V 0402
21 LDRQ# LDRQ# DSKCHG# FOR 8728

SMBC_R2/DIR#
SC193

KRST#/GP62
1UF 16V 0805 Y5V

LFRAME#

GA20/JP5

DENSEL#

WDATA#

RDATA#
SERIRQ

INDEX#
PCICLK

MTRA#

DRVA#

TRK0#
CLKIN
GNDD

WPT#
GP50
SR269 100 0402

LAD0
LAD1
LAD2
LAD3
+3.3V_DUAL

+3V3_STBY +3.3V_DUAL SC197


39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
1UF 16V 0805 Y5V
7 8 MTP61 1 SIO_RSMRST_IN
B B
5 6
21 LPC_SERIRQ MTP62 SLP_S3#
3 4 1
21 LPC_FRAME_ MTP63 SLP_S5#
1 2 1
21 LPC_AD0
SRN21 21 LPC_AD1 MTP64 PWRON#
1
0 8P4R 0402 21 LPC_AD2
21 LPC_AD3
22 SIO_KBRST_ MTP66 PCIE_RST#
1
22 A20GATE PCI_CLK3
21,25 PCI_CLK3
CLK_48M_SIO MTP67 1 PCI_CLK3
20 CLK_48M_SIO SIO_SIC 7
MTP68 1 CLK_48M_SIO
SIO_SID 7

Energy-Using Product(EUP) NEAR CONTROLLER

+5V_STBY +3V3_STBY
+V_CPU +1.5V_SUS +12V +5V +1.1V
◇BIOSTAR'S PROPRIETARY INFORMATION◆

◇Any unauthorized use, reproduction,


O
A
I

R1 SR270 SR271 SR272 SR273 SR274 SR275


200 1% 0402 /NI SC198 1K 1% 0402 1K 1% 0402 30.1K 1% 0402 5.1K 1% 0402 1K 1% 0402 duplication, or disclosure of this
10UF 10V 0805 Y5V
SC199 0.1UF 16V Y5V 0402 VIN0 document will be subject to the
SQ19 SC200 0.1UF 16V Y5V 0402 VIN1 applicable civil and/or criminal
+ AZ1117H-ADJ SOT-223 /NI R2 SC201 0.1UF 16V Y5V 0402 VIN2
SCT9 SR277 SC202 0.1UF 16V Y5V 0402 VIN3 penalties.◆
100UF 16V 6.3X5 2.5mm /NI 340 1% 0402 /NI
A A
SC203 0.1UF 16V Y5V 0402 VIN6

SR279 SR280
HARDWARE MONITOR
Vout=Vref (1.25V) X ( 1+R2/R1 ) 9.1K 1% 0402 6.49K 1% 0402
=3.375V
SIO_GNDA
Title
SUPER I/O ITE 8728
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 33 of 45


5 4 3 2 1
5 4 3 2 1

D D

C C

+5V

R242
4.7K 0402

33 FAN_CTL3
R243
100 1% 0402
CPU +12V

+12V
+5V
R245 1K 1% 0402
R1
E

R244
4.7K 0402 B Q30 R247
+12V BCP69 SOT-223 4.7K 0402
C

33 FAN_CTL1
R246 CPU_FAN1
15K 0402
4
4

R249 27K 0402


3 FAN1 33
3 + 2 R2
B 1 R250 470 1% 0402 B
1 R251
2 -
U9A SC212 22K 0402 5 mil 60歐 姆 測 試 點
AS324MTR-G1 SO14P WAFER 1X4 2.54MM 1UF 16V 0805 Y5V R3
11

SC214 CT10
10UF 10V 0805 Y5V 1UF 16V 0805 Y5V R248
36K 1% 0402 +5V
JP2
R1->10K 1% R2-->1K 1% R3-->/NI NC1
1
2
R1-> /NI ADD R2-->27K R3-->22K
R252 HEADER 1X2 D 150 /NI
22K 0402 JP1

NC2 1
2
HEADER 1X2 D 150 /NI

SYSTEM
KA

KA

+12V +5V
D4 D5
BAV99 SOT23 BAV99 SOT23
A

R258
10K 1% 0402
A A
SYS_FAN1
+5V +12V
3 R259 1K 1% 0402 FAN2 33
2
1
WAFER 1X3 SC213
1UF 16V 0805 Y5V Title
FAN CONTROL
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 34 of 45

5 4 3 2 1
5 4 3 2 1

D D

USB5V_LAN
KEYBOARD & MOUSE
PWR_KBMS

1 2 C412
3 4 RN42 0.1UF 16V Y5V 0402 /NI KBMS1
5 6 2.2K 8P4R 0402 FOR EMI
7 8 MINI DIN CONN PC99

KDAT FB6 33 0402 FB_KDAT 1


33 KDAT
2
3
4
KCLK FB7 33 0402 FB_KCLK 5
C 33 KCLK C
6
MDAT FB8 33 0402 FB_MDAT 7
33 MDAT
8
9
10
MCLK FB9 33 0402 FB_MCLK 11
33 MCLK
12
MTH'S

C413 C414 C415 C416

G1
G2
G3
G4
G5
22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402 22P 50V NPO 0402

REF1 REF2 REF3


PAD200-8 /NI PAD200-8 /NI PAD200-8 /NI
B B
1 8 1 8 1 8
2 7 2 7 2 7
3 6 3 6 3 6
4 5 4 5 4 5
9

REF10 REF8
PAD200-8 /NI PAD200-8 /NI
1 8 1 8
2 7 2 7
3 6 3 6
4 5 4 5
9

REF9
PAD200-8 /NI
1 8
2 7
3 6
4 5
A A
9

GND_AUD Title
31,32 GND_AUD PS2 CONN
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 35 of 45


5 4 3 2 1
5 4 3 2 1

+3.3V_DUAL

-XRI1

COM1

2
4
6
8
D RN44 D
+5V +12V 10K 8P4R 0402 /NI

1
3
5
7
U10
20 1
VCC V+ RIN1
33 DCD1# 19 2 22 EXT_EVNT0#
ROUT1 RIN1 RIN2
18 3

C
33 DSR1# ROUT2 RIN2 RIN3
33 SIN1 17 4
ROUT3 RIN3 DOUT1 Q32 D6 1N4148 SMD /NI
16 5
33 RTS1# DIN1 DOUT1 DOUT2 2N3904 SOT23 /NI
15 6
33 SOUT1 DIN2 DOUT2 RIN4
14 7
33 CTS1# ROUT4 RIN4 DOUT3
13 8

B
33 DTR1# DIN3 DOUT3 -XRI1
12 9
33 RI1# ROUT5 RIN5
11 10
GND V-
AZ75232GTR-G1 TSSOP20P /NI C418
C419
220P 50V X7R 0402 /NI
220P 50V X7R 0402 /NI
WAKE ON LAN
-12V C420 220P 50V X7R 0402 /NI
C421 220P 50V X7R 0402 /NI
C422 220P 50V X7R 0402 /NI
C423 220P 50V X7R 0402 /NI
C424 220P 50V X7R 0402 /NI
C425 220P 50V X7R 0402 /NI
C C
J_COM1
RIN1 1 2 RIN3
DOUT2 3 4 DOUT3
5 6 RIN2
DOUT1 7 8 RIN4
-XRI1 9 10

HEADER 2X5 N10 G /NI

+5V COM PORT PIN


COM PORT ASSIGNMENT
RN45
22 8P4R 0402 +5V
STROBEJ 1 2 -STB D7 FOR EMI near R265
33 STROBEJ
K A

ALFJ 3 4 AFD SS12/5817 SMA


33 ALFJ
PARINITJ 5 6 -INIT R265 SHORT 0805 /NI EC10
33 PARINITJ
SLCTINJ 7 8 -SLIN RN47 RN48 RN49 1000P 50V X7R 0402 /NI
33 SLCTINJ
2.2K 8P4R 0402 2.2K 8P4R 0402 2.2K 8P4R 0402 IO_GND
RN46
22 8P4R 0402 R266 SHORT 0805 /NI
2
4
6
8

8
6
4
2

2
4
6
8

2
4
6
8
PDR7 1 2 P_PRD7 C426
33 PDR7
PDR6 3 4 P_PRD6 0.1UF 16V Y5V 0402 /NI R264 RN50
B 33 PDR6 PDR5 P_PRD5
B
5 6 FOR EMI 2.2K 0402 2.2K 8P4R 0402 IO_GND
33 PDR5 PDR4 P_PRD4
33 PDR4 7 8
1
3
5
7

7
5
3
1

1
3
5
7

1
3
5
7
SLCTJ
PDR3 P_PRD3 33 SLCTJ P_PRD7
33 PDR3 1 2
PDR2 3 4 P_PRD2 ACKJ
33 PDR2 PDR1 P_PRD1 33 ACKJ BUSY
33 PDR1 5 6 33 BUSY
PDR0 7 8 P_PRD0 PE
33 PDR0 33 PE
P_PRD4
RN51 P_PRD5
22 8P4R 0402 P_PRD6
P_PRD3
-STB
P_PRD2
P_PRD1
P_PRD0
ERRORJ
33 ERRORJ AFD
-INIT J_PRINT1
-SLIN -STB AFD
1 2
P_PRD0 3 4 ERRORJ
P_PRD1 5 6 -INIT
P_PRD2 7 8 -SLIN
A P_PRD3 9 10 A
P_PRD4 11 12
P_PRD5 13 14
P_PRD6 15 16
P_PRD7 17 18 Title
ACKJ 19 20
BUSY 21 22 COM & PRINTER CONNECTOR
PE 23 24 Size Document Number Rev
SLCTJ 25 Custom 7.0

HEADER 2X13 N26 Date:


A78LK-M3S
Wednesday, July 25, 2012 Sheet 36 of 45

5 4 3 2 1
5 4 3 2 1

+5V_STBY +5V -12V +3.3V +3.3V +5V +5V_STBY +12V LED_D2 LED_D1 MESSAGE
ATXPWR1
13
3.3V 3.3V
1 OFF OFF ABNORMAL
R612 14 2 OFF ON MEMORY ERROR
10K 0402 -12V 3.3V

D 15 3 +5V ON OFF VGA ERROR D


GND GND

33 PS_ON_ 16
PSON 5V
4 ON ON NORMAL
17 5
C444 GND GND
1000P 50V X7R 0402 18 6 R268
GND 5V 10K 0402
19 7
GND GND
20 8 ATX_PGD
NC POK
21 9
+5V 5V 5VSB
22 10
5V 12V
EC6 23 11
0.1UF 16V Y5V 0402 /NI 5V 12V
24 12
GND DET
POWER CONN ATX 24P
FOR EMI NEAR ATXPWR

PWR_LED-
SPK_DAT
C C

C
FPR2 2.87K 1% 0402 Q35
22 SPKR
Q33 2N3904 SOT23
2N3904 SOT23 +3.3V_DUAL +3.3V_DUAL
+3.3V_DUAL ACPI_LED 33
B

B
MASTER_RST#AFPR3 10K 0402 SPK1 RN90 RN55 SIO Pin79
SATA_ACT# FPR4 10K 0402 +3.3V PWR_LED+ 1 2 PWR_LED-E 1 2
FPR5 10K 0402 +5V 3 4 3 4 +1.5V_SUS
SPKR FPR6 10K 0402 5 6 5 6

C
22 SPKR
7 8 BASE_PNP_TR 7 8 DDR_VDD
+5V Q34
680 8P4R 0402 2N3904 SOT23 10K 8P4R 0402

B
7
5
3
1

PANEL1 S3 ON
RN54 HEADER 2X8 N_P11 BASE_NPN_TR
100 8P4R 0402 1 9
D8 2 10
8
6
4
2

3
23 SATA_ACT# K SPK_VCC 4 12
CRNT_LMT_HDDLED1 5 13 PWR_LED+
KA HDD_LED- 6 14 PWR_LED-
7 15 PWRBTN_ 33
A MASTER_RST#A 8 16
B 29 P_HDLED* B

C445
BAT54A SOT23 0.1UF 16V Y5V 0402
C551 R273
0.1UF 16V Y5V 0402 56 0402

+3.3V_DUAL FPR1 10K 0402 /NI

R276 33 0402
20,22,40 MASTER_RST#

A A

Title
ATX PWR / FRONT PANEL
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 37 of 45

5 4 3 2 1
5 4 3 2 1

33 OV_NB_1P1_FB0 R284 1.6K 1% 0402


OV_CHIP 43
CORE VOLTAGE OV_NB_1P1_FB1 OV_NB_1P1_FB0
33 OV_NB_1P1_FB1 R285 806 1% 0402
+1.240V 1 1
+1.295V 1 0
D D
+1.349V 0 1
+3.3V 0 0
+1.404V

C450
DUAL +3.3V
1UF 16V 0805 Y5V /NI +1.5VDIMM_FB VDIMM0 VDIMM1 VDIMM2
Default
1.509V 1 1 1

1.547V 0 1 1

33 OV_1P5_FB0 R286 4.64K 1% 0402


1.605V 1 0 1
C 33 OV_1P5_FB1 R287 1.87K 1% 0402 C

33 OV_1P5_FB2 R288 931 1% 0402 1.644V 0 0 1


+1.8VDIMM_FB 42

1.703V 1 1 0

1.742V 0 1 0

1.799V 1 0 0

1.838V 0 0 0

B 0V_VCORE OV_VCORE0 OV_VCORE1 B

Default
V_CPU 1 1
33 OV_HT_1P2_FB0 R386 3K 1% 0402
OV_VCORE 41

33 OV_HT_1P2_FB1 R387 1.5K 1% 0402 +3.3% 0 1

+6.6% 1 0

+10% 0 0

A A

Title

OVER VOLTAGE
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 38 of 45


5 4 3 2 1
5 4 3 2 1

D +5V_DUAL D

1
FS4
THERM R290
FRONT PANEL USB
0 0805 /NI
POLY FUSE 1.1A

2
USBPWR_FNTPNL1_2 R291 USB_OCP234#
USB_OCP234# 22
27K 0402

1
C452
470P 50V X7R 0402 /NI R294
+ 51K 0402

2
CT14

1000UF 6.3V 8X12 6.3X9

C F_USB1 Q99 C
1 2 CM1293 SOT23-6 /NI USBPWR_FNTPNL1_2
USBN4 3 4 USBN5
22 USBN4 USBP4 USBN5 22 USBN4
5 6 USBP5 USBP4 1 6

B1

A2 + A1
22 USBP4 USBP5 22
7 8

CM1293
10 2 5

B2 -
USBP5 3 4 USBN5

HEADER 2X5 N9 R-USB

B FRONT PANEL USB B


USBPWR_FNTPNL1_2

USBPWR_FNTPNL1_2 Q100
CM1293 SOT23-6 /NI USBPWR_FNTPNL1_2
C462
470P 50V X7R 0402 /NI USBP8 1 6 USBN8

B1

A1
CM1293
2 5

A2 +
B2 -
USBP9 3 4 USBN9

F_USB2
1 2
22 USBN8 3 4 USBN9 22
22 USBP8 5 6 USBP9 22
7 8
10

A A

HEADER 2X5 N9 R-USB


Title
FRONT USB
Size Document Number Rev
Custom A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 39 of 45


5 4 3 2 1
5 4 3 2 1
ATHLON64 POWER GOOD & ENABLES CIRCUIT +3.3V_DUAL

+5V_STBY
R624 10K 0402
22,43 SB_PWRGD

22 S3_STATE 22,43 SB_PWRGD SB_PWRGD 22,43


D D
R619 R620
10K 0402 10K 0402 MASTER_RST# K
20,22,37 MASTER_RST#
KA

Q39 Q40 A
ASIC8M_VDIMM_DUAL_EN 42 22,33 SLP_S3#
2N3904 SOT23 2N3904 SOT23
33,42 PWRGD30ms

D
AQ5 BAT54A SOT23
R621 Q41
10K 0402 2N7002 SOT23
33,42 PWRGD_PS K

G
B

S
KA

C Q83 BAT54A SOT23 C

PWM_EN 41
C

+3.3V +1.5V_SUS +5V_STBY


Q68
2N3904 SOT23
R626 10K 0402
R627 10K 0402
B

R628 10K 0402


B R629 10K 0402 B
C

Q69
2N3904 SOT23
B

C532
1UF 16V 0805 Y5V /NI

C
A R613 10K 0402 PWRGD50ms_B B Q106 A
33,43 PWRGD50ms
2N3904 SOT23 Title

C591
E PWR GD / MISC POWER
0.1UF 16V Y5V 0402 /NI Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 40 of 45

5 4 3 2 1
5 4 3 2 1

+12V_P
D JATXPWR2 D
1 4
2 1 4 3
2 3
5 6
H1 H2

+5V POWER CONN ATX12V 2X2

+12V_P
PC10
1UF 10V Y5V 0402 VIN
+3.3V +5V +5V
PR13
V_6312 PR1

D
2.7 0805 2.7 0805 PQ1
PR38 PR16 PR22 PC25
1K 1% 0402 1K 1% 0402 1K 1% 0402 4.7UF 16V Y5V 0805
UG1 PR28 1 0805 G PL2
PC11 PR26 100K 0402 +V_CPU
APM2518NU TO252

S
PH1 1 2
PC19 1UF 16V 0805 Y5V PC9

D
10
0.1UF 16V Y5V 0402 PU1 4.7UF 16V Y5V 0805 C79 220P 50V X7R 0402 INDUCTOR 1UH 32A 13X10
ISL6312CRZ PR27
37 29 2.7 0805

VCC
43 VRM_PWRGD 36 PGOOD PVCC1_2 PR17 PC12 LG1 PR29 0 0805 LG1A G
40 PWM_EN EN
46 31
VID7 BOOT1 PQ2 APM2558NU TO252
47

S
48 VID6 32 2.7 0805 0.1UF 16V X7R 0402 PC22
7 K8_VID5 VID5 UGATE1 1000P 50V X7R 0402
1 33
7 K8_VID4 2 VID4 PHASE1 30
7 K8_VID3 VID3 LGATE1 PR18
3
7 K8_VID2 VID2 169 1% 0402 PHASE1
4
7 K8_VID1 5 VID1 35 ISEN1 VIN
C 7 K8_VID0 VID0 ISEN1+ PC14 C
6 34
PR7 PC8 VRSEL ISEN1- PHASE1 PC13 0.1UF 16V X7R 0402 ISEN1
PR12 5.1K 1% 0402 3900P 50V X7R 0402 PR19

D
PR9 PC3 12.1K 1% 0402 PQ3
13 27 0.1UF 16V X7R 0402 PC21
511 1% 0402 PC7 COMP BOOT2 4.7UF 16V Y5V 0805
14 26 2.7 0805 0.1UF 16V X7R 0402 UG2 PR32 1 0805 G PL3
100P 50V NPO 0402 FB UGATE2 PR31 100K 0402
15 25
IDROOP PHASE2 APM2518NU TO252
28

S
LGATE2 PR10 PH2 1 2
16 169 1% 0402

D
PC6 PR6 VDIFF 19 ISEN2 C88 220P 50V X7R 0402 INDUCTOR 1UH 32A 13X10
470P 50V X7R 0402 /NI 750 1% 0402 /NI ISEN2+ PC1 PR30
20
ISEN2- PHASE2 0.1UF 16V X7R 0402 2.7 0805
PR2 PC4 LG2 PR33 0 0805 LG2A G
+V_CPU 12.1K 1% 0402
42 PR25 2.7 0805 +12V 0.1UF 16V X7R 0402 PQ4 APM2558NU TO252

S
38 OV_VCORE PVCC3 PC24
PC16 1000P 50V X7R 0402
PR3 4.7UF 16V Y5V 0805
100 1% 0402 PC15
PR4 0 0402 PR45 100 1% 0402 PWM_OFSET 18 40 0.1UF 16V X7R 0402 PHASE2
7 CPU_CORE_FB VSEN BOOT3 VIN
PC5 39 PR20 2.7 0805
PR5 0 0402 17 UGATE3 38 ISEN2
7 CPU_CORE_FB_ RGND PHASE3
41

D
0.01UF 25V X7R 0402 /NI LGATE3 PR21 PQ5
PR11 169 1% 0402 PC23
100 1% 0402 44 ISEN3 4.7UF 16V Y5V 0805
ISEN3+ 43 PC20 UG3 PR35 1 0805 G PL4
ISEN3- PC17 0.1UF 16V X7R 0402 PR34 100K 0402
V_6312 APM2518NU TO252

S
PR29:-15mV offset PHASE3 PH3 1 2
PR39 42.2K 1% 0402 /NI 12 PR23 0.1UF 16V X7R 0402

D
OFS 12.1K 1% 0402 C135 220P 50V X7R 0402 INDUCTOR 1UH 32A 13X10
PR46 5.1K 0402 /NI 7 21 PR36
B DRSEL/SCL ISEN4+ 22 2.7 0805 B
PR42 1K 1% 0402 /NI ISEN4- LG3 PR37 0 0805 LG3A
8 G
OVPSEL/SDA
PR43 0 0402 /NI 11 24 PQ6 APM2558NU TO252

S
22,27,28 SCLK1 REF PWM4
45 PC26
GND

PR44 0 0402 /NI FS 1000P 50V X7R 0402


22,27,28 SDATA1
9 23 V_6312
SS/RST/A0 EN_PH4
49

PHASE3
PR40 PR15 PR24 PR14
PC36 PC2 249K 1% 0402
0.1UF 16V Y5V 0402 /NI 0.01UF 25V X7R 0402 ISEN3
0 0402 /NI 121K 1% 0402
0 0402 +V_CPU
BOTTOM PAD
CONNECT TO GND
Through 8 VIAs
+ + + + +
PCT2 PCT3 PCT5 PCT8 PCT9
820UF-S 3V 6.3X9 APAQ 820UF-S 3V 6.3X9 APAQ 820UF-S 3V 6.3X9 APAQ 820UF-S 3V 6.3X9 APAQ 820UF-S 3V 6.3X9 APAQ

PL5
1.2UH 30A 11X10.5 CARVE
1 2 VIN
+12V_P

+ PC37 PC38 + + +
PCT13 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V PCT4 PCT6 PCT7
100UF 16V 5X11 2mm LR /NI 270UF-S 16V 8X12 APAQ /NI 270UF-S 16V 8X12 APAQ 270UF-S 16V 8X12 APAQ
A A

Title
VCORE POWER SUPPLY
Size Document Number Rev
Custom 7.0
A78LK-M3S
Date: Wednesday, July 25, 2012 Sheet 41 of 45
5 4 3 2 1
5 4 3 2 1

+1.5V_SUS +3.3V_DUAL
DR_BOOT
+5V_STBY
D16 +5V_DUAL

7
5
3
1
K
+ + RN93
+12V KA 1K 8P4R 0402
CT22 CT19

8
6
4
2
A D11 1000UF 6.3V 8X12 6.3X9 820UF-S 3V 6.3X9 8X12

K A
R305 L7
BAT54C SOT23 2.7 0805 1N4148 SMD RH TYPE BEAD
OV_1P35_FB1 33 OV_1P35_FB0 33
D1 +1.5V_SUS +1.5V_SUS
DDR_VIN
D D

G
S

S
C467
1UF 16V 0805 Y5V C468 + CT35 Q101 Q102
1UF 16V 0805 Y5V 270UF-S 16V 8X12 APAQ SI2301BDS SOT23 SI2301BDS SOT23
U12 DDRBOOT R614 1 0805 DDR_BOOT
+1.50V

5
R308

D
1 DDRUG

VCC
BOOT DDR_UG Q46 C469 L8 +1.5V_SUS
7
REFIN R309 100K 0402 APM2518NU TO252 0.1UF 16V X7R 0402 1.2UH 30A 11X10.5 CARVE R603 R604
2
UGATE 1 0805 DDR_PH 1.21K 1% 0402 2.4K 1% 0402
2 1
8 PC35
PHASE DDRLG Q48
GND

DDR_LG +1.8VDIMM_FB 38
6 4 APM2518NU TO252 R3
FB LGATE 220P 50V X7R 0402 /NI R311 NO EUP/NO S3 : ADD 0 8P4R
R312 2.7 0805
3

uP1514 SOP8 0 0805 +5V +5V_DUAL


R313 DDR_SN RN102
10K 1% 0402 /NI 8 7
C473 6 5
1000P 50V X7R 0402 4 3
R315 C1 R314 +5V 2 1
R2 30K 1% 0402 226 1% 0402
EMI 0 8P4R 0402
R1 +1.8VDIMM_FB 38
RN103
C581 8 7
uP6103-->ADD-->R4,R1,REMOVE-->R2,R3,C1,D1 0.1UF 16V Y5V 0402 6 5
ASIC8M_VDIMM_DUAL_EN 40 RT9214-->REMOVE-->R4,R1,ADD-->R2,R3,C1,D1 Vout=0.8(1+R1/R2)----for FP6321 4 3
R255 2 1
WEAK P/D SITE ADDED IN CASE OF SEQUENCING PROBS 255 1% 0402
R1 , R2 阻值不要選超過 K ohm
C 0 8P4R 0402 C

+5V_DUAL R2
R605 10 0805
S
+12V NO EUP/NO S3 : /NI D

D
R630 10K 0402 /NI 5V_DUAL_CTL G

G
8
7

6
5

Q45

D
R606 APM2518NU TO252 /NI
VCTL
VCTL

VCTL
VCTL

Q55 Q47 200 0402 /NI NO EUP/NO S3 : /NI


uP0109 PSOP8 C476 2N7002 SOT23 /NI
9 10UF 10V 0805 Y5V
GND_PAD

S
5V_DUAL_GATE#
VOUT

+5V_STBY R631 10K 0402 /NI


GND

+1.5V_SUS
Ref

C592 SQ28
Vin

C
0.1UF 16V Y5V 0402 /NI 5VSB_GATE# G
MEM_VTT NO EUP/NO S3 : /NI Q49 D +5V_DUAL
1
2

3
4

2N3904 SOT23 /NI +5V_STBY S

D17 SI2301BDS SOT23 /NI

E
R530 A K
1K 1% 0402 CT24 R632 10K 0402 /NI PWRGD_PS_ SS12/5817 SMA /NI
33,40 PWRGD30ms
100UF 16V 6.3X5 2.5mm NO EUP/NO S3 : /NI

R531 C477
1K 1% 0402 0.1UF 16V Y5V 0402 5VSB_GATE#-->LOW : NO EUP
B
MEM_VTT +5V_STBY
B

+5V_STBY 5VSB_GATE#-->HIGHT : EUP ON


+5V_STBY
Q103
2N3906 SOT23 /NI
EUP ONLY R561 C576
10K 0402 /NI C577 E 10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI C R607 0 0402 /NI
5VSB_GATE_L R608 10K 0402 /NI B

D
5VSB_CTRL-->LOW : NO EUP R609
Q104 10K 0402 /NI
5VSB_CTRL-->HIGHT : EUP ON 2N7002 SOT23 /NI

S
5VSB_GATE_L-->HIGHT : NO EUP
33,40 PWRGD_PS ATXPWRGD
33 5VSB_CTRL
5VSB_GATE_L-->LOW : EUP ON
+5V_DUAL 5VDUAL
C578
+3.3V_DUAL 3V3DUAL 10UF 10V 0805 Y5V /NI

MEM_VTT MEMVTT

A A

Title
MEMORY POWER
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 42 of 45


5 4 3 2 1
5 4 3 2 1

CORE VOLTAGE OV_NB_1P1_FB1 OV_NB_1P1_FB0


+5V
+1.240V 1 1
EMI +1.295V 1 0
C582
0.1UF 16V Y5V 0402 +1.349V 0 1
+1.404V 0 0
D D

+12V R320 10 0805


+1.1V +3.3V_DUAL

+12V +5V NB/SB +1.1V/+1.2V POWER 1.1V @3A FOR RX780/RS780


NB CORE POWER 1.1V @8A FOR RX780/RS780
DA1
NB

1
3
5
7
D12 RN59

K A
1N4148 SMD L9 4.7K 8P4R 0402 /NI
RH TYPE BEAD
+1.260V @ 8A AMPS MAX

2
4
6
8
R321 30K 1% 0402

C
SB_PWRGD 22,40
C478
Q62

C
2N3904 SOT23 /NI
1UF 16V 0805 Y5V 1.1VBOOT R615 1 0805 1.1V_BOOT C479 + CT36
U13 C480 270UF-S 16V 8X12 APAQ

E
5

0.1UF 16V X7R 0402 1UF 16V 0805 Y5V


7 1 Q56 L10 Q63
VCC

E
COMP BOOT +1.1VUG R324 1 0805 +1.1V_UG APM2518NU TO252 1.2UH 30A 11X10.5 CARVE 2N3904 SOT23 /NI
2
UGATE +1.1V_PH +1.1V
8 2 1
PHASE R331 100K 0402
C579 Q57
R1
GND

6 4 +1.1VLG R327 0 0805 +1.1V_LG APM2518NU TO252 R328 C494


FB LGATE 220P 50V X7R 0402 /NI 2.7 0805 1UF 10V Y5V 0402 /NI
uP1514 SOP8 R329
3

R330 +1.1V_SN 110 1% 0402


10K 1% 0402 /NI
C +1.240V C
C485
1000P 50V X7R 0402
+1.1V +1.2V_HT

OV_CHIP 38 Vout=0.8(1+R1/R2)----for FP6321


R1 , R2 阻值不要選超過 K ohm
+5V R332 C493
200 1% 0402 +1.1V 1UF 10V Y5V 0402

R2
R633
D

10K 0402
+ + +
G
CT28 CT29 C537
S

Q60 1000UF 6.3V 8X12 6.3X9 1000UF 6.3V 8X12 6.3X9 1000UF 6.3V 8X12 6.3X9 +5V_DUAL +5V_STBY
C

2N7002 SOT23
Q61
2N3904 SOT23

2
4
6
8

2
4
6
8
LRN1 LRN2
E

R634 0 8P4R 0402 /NI 0 8P4R 0402

1
3
5
7

1
3
5
7
VRM_PWRGD 41
EUP : ADD 0 8P4R NO EUP : ADD 0 8P4R
10K 0402
+5V
B B
+3.3V LC25 1UF 16V 0805 Y5V

R440 +12V
100 1% 0402

D
+2.5V
+3.3V_DUAL +3.3V_DUAL
D Q64
C

APM2518NU TO252
U16 C560 C487 G
S
0.01UF 25V X7R 0402 /NI 0.1UF 16V Y5V 0402
AM431 SOT23 LQ1 R1 LR2
I 200 1% 0402 +
A

O
+1.818V
4

A CT33

S
+2.5V R343 1.1K 1% 0402 12 1000UF 6.3V 8X12 6.3X9
+
14 AZ1117H-ADJ SOT-223
13 LR3
- U9D 340 1% 0402
R2
R344 C481 AS324MTR-G1 SO14P COLAY
11

3K 1% 0402 1UF 10V Y5V 0402 Vout=Vref (1.25V) X ( 1+R2/R1 )


+1.8V
=3.375V

R345 20 1% 0402

33,40 PWRGD50ms K
C496 +
KA 0.1UF 16V Y5V 0402 /NI
A CT32 A
A 1000UF 6.3V 8X12 6.3X9

Q107
BAT54A SOT23

Title
NB/SB CORE POWER
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Wednesday, July 25, 2012 Sheet 43 of 45


5 4 3 2 1
5 4 3 2 1

LC11 LY1
25MHZ 20PF 30PPM
1UF 16V 0805 Y5V XTAL1 XTAL2

D +3.3V_DUAL LC4
33P 50V NPO 0402
LC5
33P 50V NPO 0402
D
LR1
+ 2.49K 1% 0402
LCT1 +3.3V_DUAL
10UF 10V 0805 Y5V
GPO LR8 1K 0402

+3.3V_DUAL
LED-LINK-A

LED-100-A
VDD10
+3.3V_DUAL

XTAL2
XTAL1
+3.3V_DUAL

RSET
VDD10 DVDD10
27,33 PCIE_RST# LAN_RST
LU1
20 GBE_CLKP GBE_CLKP
LC6 LC7 LC22 RTL8105T-VC-CG QFN32 GBE_CLKN Near Lan Chip

32
31

28
27
26
25
30
29
20 GBE_CLKN
0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402
33

EESK/LED1
GPO
LED0
CTRL12
RSET

CKXTAL2
CKXTAL1

DVD33-2
GND

VDD10 EVDD10 LC23


C VDD10
+3.3V_DUAL
MDI0+
1
2
HV
MDIP0
EEDI
EEDO/LED3
24
23
EEDI LR4 10K 0402
C
1UF 16V 0805 Y5V MDI0- 3 22 EECS LR5 10K 0402
MDI1+ MDIN0 EECS VDD10
4 21
LC9 LC10 MDI1- MDIP1 DVDD10-2 PCIE_WAKE
5 20
1UF 16V 0805 Y5V 1UF 10V Y5V 0402 +3.3V_DUAL MDIN1 LANWAKEB +3.3V_DUAL LR6 1K 1% 0402
6 19 +3.3V
VDD10 NC VDD33-1 ISOLATEB
7 18
LR9 10K 0402 CLKREQB DVDD10-1 ISOLATEB PCIE_RST#_RR LR7 15K 0402
8 17
CLKREQB PERSTB

REFCLK_N
REFCLK_P
VDD10

GNDTX
VDDTX

HSON
HSOP
HSIN
HSIP
LC12 LC24 LC26 LED-100-A

9
10
11
12
13
14
15
16
1UF 10V Y5V 0402 1UF 16V 0805 Y5V 1UF 10V Y5V 0402
+3.3V_DUAL

GBE_RXNN
GBE_RXPP
GBE_CLKN
GBE_CLKP
GBE_TXN
GBE_TXP
LED-LINK-A

GND
RJ45USB1B LR10 LR11 LR12 LR13
220 0402 220 0402 220 0402 220 0402
EVDD10 MDI0+ 2
TX+ LED-LINK-A+
11
B MDI0- 3
TX-
GLED-
12 LED_G+
B
MDI1+ GLED+
4
LC14 LC15 RX+ LED-100-A-
13
1UF 16V 0805 Y5V 1UF 10V Y5V 0402 MDI1- YLED-
5
N/C1 LED_Y+
14
YLED+
6
PCIE_WAKE N/C2
22,27 PCIE_WAKE
7
RX-
G1
GBE_TXP GND1
17 GBE_TXP 8 G2
GBE_TXN N/C3 GND2
G7
17 GBE_TXN GBE_CLKP GND3
20 GBE_CLKP 9 G8
GBE_CLKN N/C4 GND4
20 GBE_CLKN 1
LC16 0.1UF 16V X7R 0402 GBE_RXPP V_DAC
17 GBE_RXP 10
LC17 0.1UF 16V X7R 0402 GBE_RXNN GNDP IO_GND
17 GBE_RXN
LC18 LC19 RJ45USBA CONN
0.01UF 25V X7R 0402 0.01UF 25V X7R 0402

PCIE_RST#_RR
22,27,33 PCIE_RST#_RR

A A

Title
RTL8105T
Size Document Number Rev
Custom 7.0
A78LK-M3S
Date: Wednesday, July 25, 2012 Sheet 44 of 45

5 4 3 2 1
5 4 3 2 1

(BAT1)
D D
電池

3V BATTERY SONY
New JPANEL1
JUSBV1(1_2) JCMOS1(1_2)
(U5) JPANEL1 2*8
PANEL1(9_10) PANEL1(15_16)
JUMPER 2P R /NI JUMPER 2P B HEADER 1X2 /NI HEADER 1X2 /NI
FLASH ROM PANEL1(11_14)
PLED /NI
JUSBV2(1_2)
JUMPER 2P R /NI (Y2)
X'TAL WIRE W25Q80BVDA SO8
C (CPU1) PANEL1(1_4) PANEL1(7_8) C
SPK /NI RST /NI
PANEL1(5_6)
HLED /NI

LB1 PCB

LB1
PCB
A780L M2G+-LB1 /NI

AM2RM-B

A78LK-M3S VER7.0 (U1) (U4)

(PCB)
B B
北橋散熱片 南橋散熱片
泡棉

POLON 235X182 /NI NBHS-A74GC SB SMALL-AMD

A A
Title
BOM
Size Document Number Rev
Custom
A78LK-M3S 7.0

Date: Tuesday, July 17, 2012 Sheet 45 of 45


5 4 3 2 1

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