THE DESIGN AND EVALUATION OF A HARMONIC MIXER USING AN
ANTI-PARALLEL DIODE PAIR
M van der Merwe, JB de Swardt
Dept. of Electronic Engineering, University of Stellenbosch
Stellenbosch, 7600, South Africa
Abstract – Harmonic Mixers are used in receivers
at higher microwave frequencies where it is often
inconvenient to realise a fundamental frequency
LO due to excessive noise and lack of power.
Design considerations and various topologies
incorporating an anti-parallel diode pair are
discussed. Performance is evaluated with
comparison to conventional mixers, and the
effect of diode mismatch is also investigated.
I. INTRODUCTION
F requency conversion is essentially performed by
modulating a non-linear element with one signal
(the LO), and then applying a second signal (the RF)
to this time-varying non-linear element.
Traditionally the non-linear element has been the
diode junction(s) of a single diode, two diodes
(balanced mixer), or four diodes (double balanced
mixer). The output spectrums of these
configurations are generally crowded by the
harmonics of the LO, and the various mixing
products. Unless care is taken when considering the
embedding network for these mixers (the
combination of matching structures and filters), IF
power is lost in these unwanted frequencies, thereby
degrading conversion efficiency. At higher
microwave and millimeter frequencies it also
becomes difficult to realise stable, low-noise
oscillators with enough power to drive the LO at an
adequate level.
A configuration that would permit mixing of the
RF with a harmonic of the LO (thus utilising a
stable, lower frequency LO), while also sustaining a
reduced spectrum of frequency components (thereby
reducing power lost in unwanted sidebands), was
first introduced by Cohn [1]. Subsequent designs
comparing favourably with conventional mixers,
had a conversion loss of typically 3.5 dB with 2nd
harmonic mixing, and 6.5 dB with 4th harmonic
mixing at microwave frequencies [2]. At millimeter
wavelengths a conversion loss of 6 dB for 2nd
harmonic mixing has been recorded [3]. In addition
to a competitive conversion loss, the spectrum at the
ports of the harmonic mixer contained substantially
less frequency content that the typical single diode
mixer. The specifications on the surrounding
matching networks and output filters are
subsequently relaxed (eg. the RF and LO are now
located farther from each other, and isolation requires a
less complicated filter design).
The performance of the harmonic mixer depends on
both controllable factors (such as matching of the mixer
ports, frequency selection, applied power) and inherent
properties (such as diode mismatch, diode parameters).
Once the anti-parallel pair is analysed, an embedding
network can be designed to maximise factors such as
conversion gain and port isolation.
II. ANALYSIS
In the analysis of diode mixers, the aim is to find the
currents and voltages at the diode’s ports as functions of
the various frequencies of interest. From this the
diode’s input impedance (large signal) can be
computed, which is used for the design of the
surrounding network. The analysis can be characterised
by two sets of equations (refer to Figure 1) :
1) The equations for the diode junction, consisting of
the non-linear elements Cj and Rj. These elements
are best characterised in the time-domain.
2) The equations for the embedding structure,
including the diode’s series resistance Rs and lead
inductance (1.3nH), the package parasitics (the
1nH inductor and 0.08pF capacitor), and the
surrounding matching networks and filters. These
elements are best described in the frequency
domain.
A numerical solution is found simultaneously for these
equations via the harmonic balance method [4] [5].
Figure 1: Schottky Diode Model – Includes
packaging reactances
The non-linear junction creates the characteristic V-
I curve of the diode. The bias point (established on this
curve by the LO) will determine the small signal
parameters at the RF and IF frequencies. At this point,
and at these frequencies, the junction is modulated as a
time-invariant capacitor and resistor.
The current flowing through Rs is given by This results in the diode current $ containing all
frequencies mfLO ± nfS. In the anti-parallel
[
iG = I S eαVJ − 1 ] (1) configuration, the currents and voltages are defined as
shown in Figure 3. The instantaneous current through

  

  
  "!# V −1
the HSMS8102 diode used).
conductance is now given by
= α (iG + I S )
diG
g=
dVJ
and the junction capacitance is described by
−
1 loss.
 V  2
C = C0 1 − J 
 ϕ  conductance for each diode can be calculated
These equations are used by the harmonic balance
simulator to calculate the relevant currents and
voltages.
The anti-parallel diode pair generates a
frequency spectrum that is different from
conventional diode mixers. In a conventional single
diode mixer, the application of voltage
V = VLO sin ω LO t + VS sin ω S t
causes the junction conductance g to take on a single
maximum value per cycle of the LO, resulting in the
conductance waveform shown in Figure 2.
Figure 2: Junction conductance g for a single
diode over two LO cycles.
Figure 3: Junction conductance g for the anti-
parallel pair over two LO cycles.
for
the diode pair is given by
The junction i = i1 + i2 = I S (eαV − e −αV ) (5)
Note that for the ideal case, RS=0, causing VS to be
applied completely over the junction. For RS %'&(*)+*,.-/
(2)
is lost in the diode’s inherent series resistance. This loss
is insignificant with respect to the LO (it can usually be
compensated for by simply applying a slightly larger
LO signal), but RF power lost in RS adds to conversion
From the known voltage and current, the
(3)
di1 di 2
g1 = = αI S e −αV g2 = = αI S e αV
dV dV
and the conductance for the diode pair is found by
summing the conductances of the individual diodes.
g = g1 + g 2 = 2αI S cosh(αV ) (6)
(4) From evaluation of the above expression, it follows that
the conductance of the anti-parallel diode pair takes on
two maximum values for every cycle of the LO.
In order to evaluate the harmonic content of the
current through the diode, it is necessary to find 0 S. By
assuming that VS is sufficiently small, so that the
junction conductance g is modulated only by LO, (4)
reduces to
V = VLO cosω LO t (7)
Substituting (7) into (6) gives
g = 2αiS cosh(αVLO cosω LO t ) (8)
which expands into the following series :
g = 2αi [I 0 (αVLO ) + 2 I 2 (αVLO )cos 2ω LO t + ...] (9)
The functions In(1 2 LO) are modified Bessel functions of
the second kind. The current flowing into the loop can
now be calculated by noting that
i = gV = g (V LO cos ω LO t + VS cos ω S t )
= A cos ω LO t + B cos ω S t + C cos 3ω LO t
+ D cos 5ω LO t + E cos(2ω LO + ω S )t
+ F cos(2ω LO − ω S )t + G cos(4ω LO + ω S )t + ...
where the coefficients A, B, C… can be calculated if
needed. The total current flowing into the loop has
the following important characteristics:
1) There is no DC term. In the ideal case where
the diodes are identical, no DC current flows
into, or out of the loop.
2) The current contains the LO and RF
frequencies. This is expected, since these
frequencies are fundamentally required for
mixing.
3) The current contains only mixing products with
the frequencies mfLO ± nfS, where m+n is an
odd integer; i.e. only odd order mixing
products (but not including the fundamental
mixing products).
The current C flowing only in the loop originates
from the fact that the Fourier expansions of the
individual currents 1 en 2 containing certain
components that are of opposite phase. These
currents circulate only in the loop to make up C, and
can be expressed as
III. DIODE PAIR UNBALANCE
In the previous section it was assumed that the two
diodes of the anti-parallel pair are identical. Any
unbalance in the diode parameters lessens the
previously mentioned suppression of frequency
components to a certain degree. Irrespective of the
nature, the unbalance has the same effect on the anti-
parallel pair: the total conductance between the ports of
the individual diodes differs (this includes the effects of
the junction conductance g1 and g2, and the series
resistance RS1 and RS2), and this causes  1   2. Eq. (5) is
now augmented with unwanted frequencies mfLO ± nfS
(m+n even), and likewise Eq. (10) now contains
frequencies mfLO ± nfS (m+n odd) and also even
harmonics of the LO.
The three main reasons for diode unbalance can be
categorised as follows:
1) Difference in the saturation currents IS: The
saturation current is a function of junction area W,
 !"# "$B.$%&')( *,+.-/01 2!3"/
and
 


also
of
barrier

height
parameter is a function of 465 B/dV, which implies a
(i − i )
iC = 2 1 = iS [cosh αV − 1] (10) lowering of the effective barrier height of the
2 diode due to the applied voltage.
3) Difference in the series resistance RS: The series
which expands into resistance is a function of the undepleted epitaxial
layer under the junction.
V LO 2 + VS 2 V LO 2  798;: < =
 + cos 2ω LO t  _ a >@? ABCED"FHG6I JFAK'L MNI OQP"L FO&FC;K'FG)I C;K'R Eq.
SUT!VWYX[Z\ S] ^`and
 2 2  S is implemented by substituting
i S  VS 2 
i S = + cos 2ω S t + VLOVS {cos(ω LO − ω S )t  V → (V − i∆RS )
2 2 
 
  in Eq. (5) [7]. Using the HSMS8102 Schottky diodes,
+ cos(ω LO + ω S )t }+
 the following simulations (Figures 4-6) illustrate the
effect of unbalance in anti-parallel diodes due to the
The current flowing only in the loop thus has the variation in parameters. The maximum deviation from
following properties : the nominal parameter values is specified by the
datasheets as 16%.
1) There is a DC term It is this term that specifies
at what point of the I-V curve the working of
the diode can be linearised.
2) The loop current contains only mixing products
of frequency mfLO ± nfS, where m+n is an even
integer; i.e. only even order mixing products.

From the above it is clear that the anti-parallel pair

suppresses not only the fundamental mixing
products and other odd harmonic mixing products,
but also the even harmonics of the LO. The
suppression of the fundamental mixing products
adds to the conversion efficiency, while the Figure 4: Decrease in IF due to IS unbalance (5%,
suppression of the even harmonics of the LO is 10% and 20%)
favourable when the embedding network is
designed.
 A number of typical structures is employed for use in
harmonic mixers. The most common structure is shown
in Figure 7, where the LO is applied to port 1, the RF is
applied at port 2, and the IF is drawn from port 2. This
layout has the advantage of providing greater ease of
design for the RF-IF diplexer, as it is more difficult to
provide good isolation if the RF and LO frequencies
were applied at the same port. The circuit’s main
drawback is that it needs a return path for any DC
current flowing as a result of diode unbalance. This
Figure 5 
 

 
  ! "#$&%('*) design was chosen, since its layout is very suitable for
10% and 20%)
Figure 6: Decrease in IF due to RS unbalance
(5%, 10% and 20%)
From the graphs it can be seen that the effect of
diode unbalance is a strong function of LO power,
and that the negative effect becomes most profound
when either inadequate LO power is applied (diode
operated under “starved” conditions), or when the
diode is overdriven by the LO.
IV. DESIGN CONSIDERATIONS
As with conventional mixers, the designing of a
harmonic mixer is reduced to essentially two main
considerations :
1) Providing the anti-parallel pair with the correct
frequency components (including correct
amplitude) in order to achieve an optimum IF.
2) Embedding the pair of diodes in a network that
offers either optimum terminations or isolation
at the frequencies of interest.
The design procedure sets off with the choice of an
appropriate pair of diodes. It is important here to
minimise the diodes’ series resistance RS and the
junction capacitance CJ0, and also diode unbalance
by choosing a suitable packaged pair of diodes. The
characteristics of the selected HSMS8102 anti-
parallel pair of diodes are as follows :
C j 0 = 0.18 pF
RS = 6Ω
∆C j 0 = 0.03 pF (max)
∆RS = 1Ω(max)
microstrip realisation.
Figure 7: Two-port Structure
Another common structure is shown in Figure 8. This
circuit has the advantage that it does not need a return
path for any DC current that might flow. It does
however require a somewhat more complicated network
of filters and resonating structures, as all the signals are
essentially connected to the same port. The electrical
distances from the port to the various filters play an
important role in the overall functioning of the system.
This topology is frequently realised using waveguides,
since many of the filtering actions are performed
naturally by the inherent waveguide properties.
Figure 8: One-port Structure
Harmonic mixing has also been done using a single
diode [6], but the main drawbacks of higher conversion
loss and a more complex frequency spectrum have
made this technique less popular.
As an example it is desired to convert a 2.45 GHz
RF to 250 MHz IF. This is most effectively done by
choosing to implement second harmonic mixing using
an 1.1GHz LO (it is common to use higher even
harmonics with a higher RF frequency, typically using
the 4th harmonic of a 2.5GHz LO to down-convert a
10.525 GHz RF signal). As soon as the LO frequency is
established, the optimum LO power is determined. This
is done by finding the point on the I-V curve where
optimum conversion loss takes place. Practically this
point is established by applying an LO and RF
signal to the unmatched pair, and sweeping through
LO power. The following result is typically
obtained:
: ;<>=/?@ <
?A @ =BC29=DAEF;HG I J KFLM-M N OPQSRT
OUV OW XYZ[
ik j `^]Fl` kmcHnop q\`
Figure 9: IF vs LO Power
The LO applied to the V-I curves effectively causes
currents at the LO harmonics to flow, including a
DC current. It is this DC current that biases the
diodes’ junctions at a specific point on the V-I
curves. The small-signal port impedances can now
be calculated by considering the junction as a time-
invariant capacitor (typically ~0.25 pF at optimum

 
amounted to the following (refer to Figure 11 for
layout):
- A 9
\]H]H^]_\`bacd>`feg&\h ]2\hFca^hFij d
the LO frequency is added to port 2. This
configuration isolates port 2 from the LO by
creating an open circuit for the LO at port 1, and a
short to ground for the LO at port 2.
- Transmission lines of 4.9 rtsHu vxwy z|{} {r~uH{v€w
the LO is added between port 2 and the BDF, and
‚
port 2 and the LPF, respectively. This matches port
ƒ„-{uv …‡†ˆŠ‰†‹ Œ‹ Œ tŽF‘’ “”‡–•
- The microstrip BPF with f0 = 2.45 GHz is realised
using two coupled sections.
- The LPF is realised using lumped elements, and has
a cutoff frequency of 0.4 GHz.
- Port 1’s reactance is resonated out using a line of
77 —™˜š ›œž Ÿ¡ ¢£¤
¥§¦/¨ ©ª«­¬D®t¯±°²³´¨ ©µ±²¶F·¸¹ º»¼ ½ ¾2¿ÀÁ‡Âà ´ı½HŊÆ´ÇÈ
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- The DC return path is via the short circuited stub.

   "!$#&%' ( )+*-,/. 021304
567 18
of the RF and IF signals is now effectively
linearised at this point on the V-I curve.
In order to maximise power transfer to and from
the diode, it is necessary to conjugately match the
diode ports at the RF and IF frequencies. Figure 10
shows both the input impedance for a unbiased pair,
and the input impedance for a anti-parallel pair
driven at optimum LO (~ +1 dBm).
Figure 10: Input Impedances
For the chosen layout and diodes (including package
reactances), the port impedances are shown above
(at the optimum LO of +2 dBm). The anti-parallel
pair is conjugately matched to the LO impedance at
port 1, and to both the RF en IF impedances at port
2. A diplexer consisting of a BPF and a LPF is then
added to port 2, creating the RF port and the IF port.
For the current design example, this process
Figure 11: The final microstrip circuit
The design is synthesised using microstrip, optimised,
and fully simulated using the harmonic balance
simulator. Finally a microstrip realisation is produced.
V. RESULTS
The complete realised circuit is shown in Figure 12.
The IF port is marked 1, the RF port 2, and the LO is
applied at port 3. The various sub-structures described
in the previous section can also be identified.
The performance of the mixer is shown in Figure 13.
The measured results differs only slightly from the
simulated results :
- Larger conversion loss : The conversion loss is
measured as 10 dB (compared to the simulated 4.5
dB). This difference is attributed to variation in the
package characteristics of the diode. The
simulations was done again using 2 nH inductances
instead of 1 nH, and a conversion loss of 9.5 dB was
obtained.
- Lower LO needed for optimum IF. The LO drive
needed for an optimum IF was slightly lower (~ -
0.5 dBm) than anticipated (~ +1 dBm).
From Figure 14 it can be seen that the mixer has a 3dB
bandwidth of 9.1%.

Figure 12 : The Realised Circuit
Figure 13 : IF as function of LO power
Figure 14 : 3dB Bandwidth
The measured results are summarised as follows :
RF : -20 dBm
LO : -0.5 dBm
IF : -30 dBm
Conversion Loss : 10 dB
LO – RF Isolation : 60 dB (sim = 62 dB)
LO – IF Isolation : 55 dB (sim = 60 dB)
RF – IF Isolation : 77 dB (sim = 70dB)
All other mixing products : < -90 dBm
VI. CONCLUSION
Harmonic mixers compare favourably to
conventional diode mixer circuits (e.g. conversion
loss). They also have additional features (such as
inherent frequency filtering) that make them a very
attractive option. The fundamental working was
describes and then the effect of diode pair unbalance
was investigated for the anti-parallel diode pair. Finally
a general design procedure was presented, illustrated
with the design of a microstrip harmonic mixer.
ACKNOWEDGEMENTS
All simulations were done and all output graphs were
created using “Microwave Office 2000” from Applied
Wave Research, Inc.
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