ADDRESSING MODES OF 8086:

 Addressing mode tells where and how to locate data to be accessed.

 In essence, they are different ways used to specify the operands.
 There are 7 addressing modes divided into 3 categories in 8086 :
i. Register operand addressing-Register addressing mode
ii.Immediate operand addressing-Immediate addressing mode
iii.Memory operand addressing
 Direct addressing mode
 Register indirect addressing mode
 Based addressing mode
 Indexed addressing mode
 Based-indexed addressing mode

Register Operand Addressing:

• With the register addressing mode, the operand to be accessed is inside an
internal register of the 8088/8086
• Internal registers that can be used as source / destination:

Operand sizes
Register Byte (Reg 8) Word

Accumulator AL, AH (Reg

AX 16)
Base BL, BH BX
Count CL, CH CX
Data DL, DH DX
Stack pointer - SP
Base pointer - BP
Source index - SI
Destinati - DI
on index
Code - CS
segment
Data - DS
segment
Stack - SS
segment
Extra - ES
segment
  An example of instruction using this addressing mode is
MOV AX, BX
 This stands for “move the contents of BX (source operand) to AX (destination
operand)”
 E.g. what is the destination operand in the following instruction? How large is this
operand?
MOV CH, AH
 The destination operand is register CH and it specifies an 8-bit operand.

1.5.2) Immediate Operand Addressing:

• If an operand is part of an instruction instead of the contents of a register or

memory location, it is called an immediate operand
• This operand is accessed using the immediate addressing mode
• The operand can either be an 8-bit or 16-bit data
• Immediate operands normally represent constant data
• This addressing mode can only be used to specify a source operand
• Consider the instruction: MOV AL, 15H
• In this instruction, the source operand is 15H, while the destination operand is
register AL
• Thus these instructions use both the immediate and register addressing modes.
E.g. Write an instruction that will move the immediate value 1234H into the CX
register
Solution:
• The instruction must use immediate addressing mode for the source operand and
register addressing mode for the destination operand, i.e.
MOV CX, 1234H

1.5.3) Memory Operand Addressing:

• In this categories, the operands are inside the memory

• To access an operand in memory, 8086 must calculate the physical address (PA)
of the memory location before it can read or write the operand
• The physical address is computed from a segment based address (SBA) and an
effective address (EA)
• SBA identifies the starting location of the segment in memory, and EA represents
the offset of the operand from the beginning of this segment of memory
• The value of EA can be specified in a variety of ways
 • EA can be made up from as many as 3 elements: base, index and displacement

PA = SBA:EA
PA = Segment base: Base + Index + Displacement
CS
SS BX SI
PA = + + 8-bit displacement
DS : BP DI 16-bit displacement
ES

• Not all elements are always used in the effective address calculation
• In fact, three addressing modes are defined by using various combination of these
elements:
i. Register indirect addressing mode
ii. Based addressing mode
iii. Indexed addressing mode
iv. Based-indexed addressing mode
• For e.g. in based addressing mode, the EA calculation only includes the base

Direct Addressing Mode:

• In this addressing mode, the effective address (EA) of the operand is specify
directly in the instruction
• The effective address is used directly as the 16-bit offset of the memory location
of the operand from the segment base address specified by the selected segment
register.
PA = Segment base: Direct address
CS
SS
PA =
DS : Direct address
ES

• The default segment register is DS

• Thus the 20-bit physical address of the operand in memory is normally given by
DS:EA
• However, by using a segment over-ride prefix, any of the four segment registers
can be used.
• Consider the instruction: MOV CX, [1234H]
• This stands for “move the contents of the memory location with offset 1234H in
the current data segment into register CX”
Memory
Address Instruction
8088/8086 MPU content
 IP 01000 8B MOV CX, [1234H]
0000
01001 0E
CS DS SS ES 0100 01002 34
0200 01003 12
AX 01004 XX Next instruction
BX
.
.
PA = 02000H + 1234H .
XXXX CX = 03234H

DX 02000 XX
02000 XX
.
SP
.
BP
.
SI
03234 ED Source operand
DI
03235 BE

 After calculating the physical address of the operand, the 8086 reads the word of
data starting at that address (which is BEEDH) and loads it into the CS register.

Memory
Address Instruction
8088/8086 content
MPU 01000
0004 8B MOV CX, [1234H]
01001
0E
01002
0100 CS 34
01003
0200 DS 12
SS 01004
XX Next instruction
ES
.

AX .
BX .

BEED CX
DX 02000 XX
02001 XX
.
.

SI .

DI 03234 ED Source
03235 operand BE
 Register Indirect Addressing Mode:
• In this addressing mode, the effective address is specified either in a base register
(BX or BP) or index register (SI or DI)
• This effective address will be combined with a segment base address in a segment
register (default is DS register) to form a physical address

M e m o ry
80 8 8 /8 0 86 M A d d re ss
In stru ctio n
PU co n te n t
00 0 2 0 1 00 0 8 B M O V A X , [S I]
0 1 00 1 04
01 0 0 CS 0 1 00 2 XX N e x t in stru ctio n
02 0 0 DS
SS
ES .
.
AX .
BEED
BX
CX 0 2 00 0 X
DX 0 2 00 1 X
. X
SP . X
BP .
SI 0 3 23 4
12 3 4
DI 0 3 23 5
ED S o u rc e o p e ra
ndBE

8088/8086 MPU Address Instruction

content
0000 I 01000 8B MOV AX, [SI]
P 01001 04
0100 C 01002 XX Next
0200 S
D instruction
S
SS
.
ES
.
PA = 02000H + 1234H
.
AX XXXX = 03234H
BX
02000 XX
CX
02001 XX
DX
.
SP
BP .
03234 ED Source operand
1234 SI
03235 BE
DI
 • Consider the instruction: MOV AX, [SI]
• This instruction will move the contents of the memory location at the physical
address given by the combination of the current data segment and the effective
address in register SI into AX register.
• The result of executing this instruction and the instruction using direct address
mode are the same.
• Using direct addressing, the EA is fixed; using register indirect addressing, the EA
can be changed.

Based Addressing Mode:

• In this addressing mode, the effective address is obtained by adding a direct or

indirect displacement to the contents of either BX or BP register.

Segment base Effective address

CS
SS BX
PA = + 8-bit displacement
DS : BP 16-bit displacement
ES

Base Element 0
register Element 1
+ Element 2
. Array of
Displaceme . data
nt .
Element n-
2Element n-
1

• The value in the base register defines the beginning of a data structure (e.g. array)
in memory, and the displacement selects an element of data within the structure
• To access a different element in the array, the programmer simply changes the
value of the displacement
• To access the same element in another similar array, the programmer can change
the value in the base register so that it points to the beginning of the new array
• Consider the instruction: MOV [BX]+1234H, AL
• This instruction uses base register BX and direct displacement 1234H to derive
the destination operand.
 • The based addressing mode is implemented by specifying the base register in
brackets followed by a + sign and direct displacement

Memory
8088/8086 Address Instruction
MPU content
0000 88 MOV [BX]+1234H, AL
01000
01001 87
0100 CS 01002 34
0200 DS 01003 12
01004
XX SS Next instruction
ES .
.
B E AX .
E 1000D BX
02000 XX
CX
02001 XX
DX
.
PA = 0H + 1000H +
0200 1234H .
.
BP 04234 XX Destination operand
SI 04235
XX
DI

Memory
8088/8086 Address
Instruction
MPU content
0004 01000 88 MOV [BX]+1234H, AL
01001 87
0100 CS 01002 34
0200 DS 01003 12
SS
01004 XX Next instruction
ES
.
.
AX
B E .
E 1000D BX
CX 02000 XX
DX 02001 XX
.

BP .
SI 04234 ED Destination operand
DI 04235 XX
  The microprocessor calculates the physical address of the destination operand
from the contents of DS, BX and the direct displacement, and then moves the
contents of AL into memory location at 04234H.
 The default segment register for physical address calculation is DS register, but it
can be changed to other segment register with the segment-override prefix
 If BP is used instead of BX, the calculation of the physical address is performed
using the contents of the stack segment (SS) register instead of DS register.
Indexed Addressing Mode:
 Indexed addressing mode uses the value of the displacement as a pointer to the
starting point of an array of data in memory and the contents of the specified register
as an index that selects the specific element in the array to be accessed

Segment base Effective address

Displacemen Element 0
t Element 1
CS
SS + Element 2
PA = : SI .
+ 8- bit displacement
DS DI 16-bit displacement . Array of
ES Index data
register
.
Element n-2
Element n-1

8088/8086 MPU Address Memory

Instruction
content
0000 IP 01000 8A MOV AL, [SI]+1234H
01001 84
CS 0100 01002 34
DS 0200 01003 12
SS 01004 XX Next instruction
ES .
.
AX X X .
BX X X
02000 XX
CX
02001 XX
DX PA = 0200 0H + 2000H +.1234H
= 0523 4H
.
SP
BP .
05234 BE Source operand
2000 SI
05235 XX
DI
 • The physical address of the source operand is first calculated from the contents of
DS, SI and the direct displacement
• The data byte stored at 05234H is then moved to AL

M em ory
8088 /8086 M A ddress
Instruction
PU content
0004 01 00 0 8A M O V AL, [SI]+ 1234 H
01 00 1 84
0100 CS 01 00 2 34
0200 DS 01 00 3 12
SS
0 1 00 4 XX N ext instruction
ES
.
.
AX
X BE .
X BX
CX 02 00 0
XX
DX 02 00 1
XX
.
SP .
BP .
SI 05 23 4
2000 BE Source operand
DI 05 23 5
XX

Based-Indexed Addressing Mode:

• This addressing mode is a combination of the based addressing mode and the
indexed addressing mode
• The effective address is formed by three elements: base register, index register
and a displacement

Segment base Effective address

CS
SS BX SI
PA = + + 8-bit
DS : BP DI displacement
ES 16-bit
displacement

• It can be used to accessed complex data structures such as two-dimensional arrays

• In this case, the displacement locates the starting point of the array in memory, the
base register specifies the x-coordinate of the array, and the index register
specifies the y-coordinate.
 12131414

8 91011
2D array
of data
4 5 6 7 Index register

0 1 2 3
+

Displacement + Base register

• Changing the values in the base and index registers permits access to other
elements in the array
• Consider the instruction: MOV AH, [BX][SI]+1234H
• Before the source operand can be moved to the destination, the 8086 calculates its
physical address
• The effective address is formed by BX and SI registers with 16-bit displacement
• The physical address is then computed from the current contents of DS register
and the effective address.

8088/8086 MPU Address Memory

Instruction
content
0000 IP 01000 8A MOV AH, [BX][SI]+1234H
01001 A0
CS 0100 01002 34
DS 0200 01003 12
SS 01004 XX Next instruction
ES .
.
AX X X .
X 1000X BX
02000 XX
CX
02001 XX
DX
EA = 1000H + 2000H +1234H PA = 02000H + EA
SP = 06234H
BP .
SI .
2000
DI .
06234
BE Source operand
06235
XX

 Execution of the instruction moves the value stored at the physical address into AH
 Memory
8088/8086 Address
Instruction
MPU content
0004 01000 8A MOV AH, [BX][SI]+1234H
01001 A0
0100 CS 01002 34
0200 DS 01003 12
SS
01004 XX Next instruction
ES
.
.
AX
B X .
E 1000X BX
CX 02000 XX
DX 02001 XX

SP
BP
.
SI
2000 .
DI
.
06234 BE Source operand
06235 XX
Instruction set of 8086:
Quick reference:

CMPS MOV
AA B
CMPS JA JNB JPO MOVS RCR SCAS
A
AA WCWD EJB EJNC JS B
MOVS REP B
SCAS
D
AA DAA JB JNE JZ WMUL REPE WSHL
M
AAS DAS EJC JNG LAHF NEG REPN SHR
AD DEC JCX JNG LDS NOP E
REPN STC
C
AD DIV Z JE EJNL LEA NOT ZREPZ STD
D
AN HLT JG JNL LES OR RET STI
D
CAL IDIV JG EJNO LODSB OUT RETF STOS
LCB IMUL EJL JNP LODSW POP ROL B
STOS
W
CL IN JL JNS LOOP POPA ROR WSUB
C
CL INC E
JM JNZ LOOPE POPF SAHF TES
D
CLI INT P
JN JO LOOPN PUSH SAL T
XCH
CM INTO A
JNA JP E
LOOPN PUSHA SAR G
XLAT
C
CM IRET EJN JPE ZLOOPZ PUSHF SBB BXOR
P JA B RCL

Operand types:

REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP.

SREG: DS, ES, SS, and only as second operand: CS.

Memory: [BX], [BX+SI+7], variable, etc...(See Memory Access).

Immediate: 5, -24, 3Fh, 10001101b, etc...

Notes:

 When two operands are required for an instruction they are separated by comma.
For example:
REG, memory

 When there are two operands, both operands must have the same size (except shift
and rotate instructions). For example:

AL, DL
DX, AX
m1 DB ?
AL, m1
 m2 DW?
AX, m2

 Some instructions allow several operand combinations. For example:

memory, immediate
REG, immediate

memory, REG
REG, SREG

 Some examples contain macros, so it is advisable to use Shift + F8 hot key to Step
Over (to make macro code execute at maximum speed set step delay to zero),
otherwise emulator will step through each instruction of a macro. Here is an
example that uses PRINTN macro:
 include 'emu8086.inc'
 ORG 100h
 MOV AL, 1
 MOV BL, 2
 PRINTN 'Hello World!' ; macro.
 MOV CL, 3
 PRINTN 'Welcome!' ; macro.
RET

These marks are used to show the state of the flags:

1 - instruction sets this flag to 1.

0 - instruction sets this flag to 0.
r - flag value depends on result of the instruction.
? - flag value is undefined (maybe 1 or 0).
Some instructions generate exactly the same machine code, so disassembler may have a
problem decoding to your original code. This is especially important for Conditional
Jump instructions (see "Program Flow Control" in Tutorials for more information).

Instructions in alphabetical order:

Instructio Operands Description
n
ASCII Adjust after Addition.
Corrects result in AH and AL after addition when
No working with BCD values.
AAA
operan
ds It works according to the following Algorithm:
 if low nibble of AL > 9 or AF = 1 then:

 AL = AL + 6
 AH = AH + 1
 AF = 1
 CF = 1

else

 AF = 0
 CF = 0

in both cases:
clear the high nibble of AL.

Example:
MOV AX, 15 ; AH = 00, AL =
0Fh AAA ; AH = 01, AL = 05
RET
CZS OP A
r ? ? ? ? r

ASCII Adjust before Division.

Prepares two BCD values for
division.

Algorithm:

 AL = (AH * 10) + AL
No  AH = 0
AAD
operan
ds
Example:
MOV AX, 0105h ; AH = 01, AL =
05 AAD ; AH = 00, AL = 0Fh
(15)
C Z RET
S OP A
? r r ? r ?

ASCII Adjust after Multiplication.

No
AAM Corrects the result of multiplication of two BCD values.
operan
ds
 Algorithm:

 AH = AL / 10
 AL = remainder

Example:
MOV AL, 15 ; AL = 0Fh
AAM ; AH = 01, AL =
05 RET
CZS OP A
? r r ? r ?

ASCII Adjust after Subtraction.

Corrects result in AH and AL after subtraction
when working with BCD values.

Algorithm:

if low nibble of AL > 9 or AF = 1 then:

 AL = AL - 6
 AH = AH - 1
 AF = 1
 CF = 1

No else
AAS
operan
ds  AF = 0
 CF = 0

in both cases:
clear the high nibble of AL.

Example:
MOV AX, 02FFh ; AH = 02, AL =
0FFh AAS ; AH = 01, AL = 09
RET
CZS OP A
r ? ? ? ? r
 Add with Carry.

REG, Algorithm:
memor
y operand1 = operand1 + operand2 +
memor
ADC y, CF Example:
REG STC ; set CF =
REG, REG 1 MOV AL, 5 ; AL
memory = 5 ADC AL, 1 ;
, AL = 7 RET
immedia CZS OP A
te REG, r r r r r r
immediate

Add.

REG, Algorithm:
memor
y operand1 = operand1 +
memor
ADD y, operand2 Example:
REG MOV AL, 5 ; AL =
REG, REG 5 ADD AL, -3 ; AL
memory = 2 RET
, CZS OP A
immedia
te REG, r r r r r r
immediate

Logical AND between all bits of two operands. Result

is stored in operand1.
REG,
memor
These rules
y
memor
apply: 1 AND 1
AND y,
REG
=1
REG, REG
1 AND 0 = 0
memory
0 AND 1 = 0
,
0 AND 0 = 0
immedia
te REG,
immediate
 MOV AL, 'a' ; AL = 01100001b
AND AL, 11011111b ; AL = 01000001b
('A') RET
CZS OP
0 r r 0 r

Transfers control to procedure, return address is (IP) is

pushed to stack. 4-byte address may be entered in this
form: 1234h:5678h, first value is a segment second value
is an offset (this is a far call, so CS is also pushed to
stack).

Example:

procedu ORG 100h ; directive to make simple .com

re name
label file. CALL p1
CALL
4-
byte ADD AX, 1
addre
ss RET ; return to OS.

p1 PROC ; procedure declaration.

MOV AX, 1234h
RET ; return to
caller.
C Z S p1O ENDP
PA
unchanged

Convert byte into

word. Algorithm:

No if high bit of AL = 1 then:

CBW
operan
ds  AH = 255 (0FFh)

else
  AH = 0

Example:
MOV AX, 0 ; AH = 0, AL = 0
MOV AL, -5 ; AX = 000FBh
(251) CBW ; AX = 0FFFBh (-5)
RET
CZS OP A
unchanged

Clear Carry

flag.

No Algorithm:
CLC
operan
ds CF = 0

Clear Direction flag. SI and DI will be incremented by

chain instructions: CMPSB, CMPSW, LODSB,
LODSW, MOVSB, MOVSW, STOSB, STOSW.

Algorith
No
CLD
operan m: DF =
ds
0

Clear Interrupt enable flag. This disables

hardware interrupts.
No
CLI Algorith
operan
ds
m: IF =

0
 I

Complement Carry flag. Inverts value of

CF. Algorithm:

if CF = 1 then CF =
No 0 if CF = 0 then CF
CMC
operan =1
ds

C
r

Compare.

Algorithm:

REG, operand1 -
memor
y operand2
memor
CMP y, result is not stored anywhere, flags are set (OF, SF,
REG ZF, AF, PF, CF) according to result.
REG, REG
memory Example:
, MOV AL,
immedia 5
te REG, MOV
C Z SBL,O P5 A
immediate CMP AL, BL ; AL = 5, ZF = 1 (so
r r r r r r
equal!) RET

Compare bytes: ES:[DI] from DS:

[SI]. Algorithm:
No
CMPSB
operan  DS:[SI] - ES:[DI]
ds  set flags according to
result: OF, SF, ZF, AF,
PF, CF
 if DF = 0 then
 o SI = SI + 1
o DI = DI + 1

else

o SI = SI - 1
o DI = DI - 1

Example:
see cmpsb.asm in c:\emu8086\examples\.

CZS OP A
r r r r r r

Compare words: ES:[DI] from DS:

[SI]. Algorithm:

 DS:[SI] - ES:[DI]
 set flags according to
result: OF, SF, ZF, AF,
PF, CF
 if DF = 0 then
o SI = SI + 2
No o DI = DI + 2
CMPSW
operan
ds else

o SI = SI - 2
o DI = DI - 2

Example:
see cmpsw.asm in c:\emu8086\examples\.
CZS OP A
r r r r r r

Convert Word to Double

No
CWD word. Algorithm:
operan
ds
if high bit of AX = 1 then:
  DX = 65535 (0FFFFh)

else

 DX = 0

Example:
MOV DX, 0 ; DX =
0 MOV AX, 0 ; AX
=0
MOV AX, -5 ; DX AX =
00000h:0FFFBh CWD ; DX AX =
0FFFFh:0FFFBh
C Z S O P A RET
unchanged

Decimal adjust After Addition.

Corrects the result of addition of two packed BCD

values. Algorithm:

if low nibble of AL > 9 or AF = 1 then:

 AL = AL + 6
 AF = 1

if AL > 9Fh or CF = 1 then:

No
DAA
operan  AL = AL + 60h
ds  CF = 1

Example:
MOV AL, 0Fh ; AL = 0Fh
(15) DAA ; AL = 15h
RET
CZS OP A
r r r r r r
 Decimal adjust After Subtraction.
Corrects the result of subtraction of two packed
BCD values.

Algorithm:

if low nibble of AL > 9 or AF = 1 then:

 AL = AL - 6
 AF = 1

No if AL > 9Fh or CF = 1 then:

DAS
operan
ds  AL = AL - 60h
 CF = 1

Example:
MOV AL, 0FFh ; AL = 0FFh (-
1) DAS ; AL = 99h, CF = 1
RET
CZS OP A
r r r r r r

Decreme

nt.

Algorith

REG m:
DEC memory
operand = operand - 1

Example:
ZS OP A
MOV AL, 255 ; AL = 0FFh (255 or
r r r r r
-1) DEC AL ; AL = 0FEh (254 or -2)
RET

REG
Unsigned divide.
DIV memory
 Algorithm:

when operand is a
byte: AL = AX /
operand
AH = remainder
(modulus) when operand
is a word: AX = (DX
AX) / operand DX =
remainder (modulus)
Example:
MOV AX, 203 ; AX =
00CBh MOV BL, 4
DIV
C Z BLS O P A; AL = 50 (32h), AH =
3 RET
? ? ? ? ? ?

Halt the System.

Example:
No MOV AX,
HLT 5 HLT
operan
ds CZS OP A
unchanged

Signed

divide.

Algorithm:

when operand is a byte:

REG AL = AX / operand
IDIV memory AH = remainder
(modulus) when operand
is a word: AX = (DX
AX) / operand DX =
remainder (modulus)
Example:
MOV AX, -203 ; AX =
0FF35h
C Z S OMOVP A BL, 4
IDIV BL ; AL = -50 (0CEh), AH = -3
? ? ? ? ? ?
(0FDh) RET
 Signed

multiply.

Algorithm:

when operand is a byte:

REG AX = AL * operand.
IMUL memory when operand is a
word:
(DX AX) = AX *
operand. Example:
MOV AL, -2
MOV
C Z SBL,
O P-4A
IMUL BL ; AX =
r ? ? r ? ?
8 RET

Input from port into AL or AX.

Second operand is a port number. If required to access
AL, port number over 255 - DX register should be used.
im.byt Example:
e AL, IN AX, 4 ; get status of traffic lights.
IN
DX IN AL, 7 ; get status of stepper-
AX, motor.
CZS OP A
im.byt
e AX, unchanged
DX

Incremen

t.

Algorith
REG
INC memory m:

operand = operand + 1

Example:
ZS OP A
MOV AL,
r r r r r
4
INC AL ; AL =
5 RET
 Interrupt numbered by immediate byte

(0..255). Algorithm:

Push to stack:

o flags register
o CS
o IP
 IF = 0
immedia  Transfer control to interrupt procedure
INT
te byte

Example:
MOV AH, 0Eh ;
teletype. MOV AL, 'A'
INT 10h ; BIOS
interrupt. RET
CZS OPAI
unchanged 0

Interrupt 4 if Overflow flag is

1. Algorithm:

if OF = 1 then INT 4

Example:
No
INTO ; -5 - 127 = -132 (not in -128..127)
operan
; the result of SUB is wrong (124),
ds
; so OF = 1 is
set: MOV AL,
-5
SUB AL, 127 ; AL = 7Ch (124)
INTO ; process
error. RET

Interrupt
No
IRET Return.
operan
ds
Algorithm:
 o IP
o CS
o flags register

CZS OP A
popped

Short Jump if first operand is Above second operand (as

set by CMP instruction). Unsigned.

Algorithm:

if (CF = 0) and (ZF = 0) then

jump Example:
include 'emu8086.inc'

ORG 100h
MOV AL,
JA label 250
CMP AL, 5
JA label1
PRINT 'AL is not above 5'
JMP
exit
label1:
PRINT 'AL is above
5'C exit:
ZS OP A
RET
unchanged

Short Jump if first operand is Above or Equal to

second operand (as set by CMP instruction).
Unsigned.

Algorithm:
JAE label
if CF = 0 then
jump Example:
include 'emu8086.inc'

ORG
100h
 CMP AL, 5
JAE label1
PRINT 'AL is not above or equal to 5'
JMP
exit
label1:
PRINT 'AL is above or equal to
5' exit:
CRET
ZS OP A
unchanged

Short Jump if first operand is Below second operand (as

set by CMP instruction). Unsigned.

Algorithm:

if CF = 1 then
jump Example:
include 'emu8086.inc'

ORG
100h
JB label MOV AL,
1
CMP AL, 5
JB label1
PRINT 'AL is not below 5'
JMP
exit
label1:
CPRINT
Z S O 'AL
P Ais below
5' exit:
unchanged
RET

Short Jump if first operand is Below or Equal to

second operand (as set by CMP instruction).
Unsigned.
JBE label
Algorithm:

if CF = 1 or ZF = 1 then
jump Example:
include 'emu8086.inc'
 ORG
100h
MOV AL,
5
CMP AL, 5
JBE label1
PRINT 'AL is not below or equal to 5'
JMP
exit
label1:
CPRINT
Z S O 'AL
P Ais below or equal to
5' exit:
unchanged
RET

Short Jump if Carry flag is set to

1. Algorithm:

if CF = 1 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL,
JC label 255
ADD AL, 1
JC label1
PRINT 'no
carry.'
JMP
exit
label1:
CPRINT
Z S O 'has
PA
carry.' exit:
unchanged
RET

Short Jump if CX register is

0. Algorithm:
JCXZ label
if CX = 0 then jump
Example:
 include 'emu8086.inc'

ORG
100h
MOV CX,
0
JCXZ label1
PRINT 'CX is not zero.'
JMP
exit
label1:
CPRINT
Z S O'CX P Ais
zero.' exit:
unchanged
RET

Short Jump if first operand is Equal to second operand

(as set by CMP instruction). Signed/Unsigned.

Algorithm:

if ZF = 1 then
jump Example:
include 'emu8086.inc'

ORG
100h
JE label MOV AL,
5
CMP AL, 5
JE label1
PRINT 'AL is not equal to 5.'
JMP
exit
label1:
CPRINT
Z S O'AL
P Ais equal to
5.' exit:
unchanged
RET

Short Jump if first operand is Greater then second

operand (as set by CMP instruction). Signed.
JG label
Algorithm: