Bui Quoc Bao

IC Designer and IC Verifier

Date of birth: January 29, 1999
Gender: Male
Phone: 0976873685
Email: bao.bui39@hcmut.edu.vn
Address: Ho Chi Minh, Vietnam
Website: https://www.facebook.com/profile.php?
id=100025202444339&fref=comp
OBJECTIVE

Learn and gain experience for yourself to become a good engineer, and try and devote to the development of
the company.

EDUCATION

August 2017 3nd year of Bach Khoa UniversityTelecommunication - Electronics

Engineering Technology
Major: Electronic
GPA: 6.77/10

ACTIVITIES

Jan 2018 - June 2019 Blood Donation

SKILLS

Language English, I can speak English just enough in the job.

Tools - Basic knowledge about Linux

- Basic knowledge about Synopsys, Cadence, and ModelSim tool.
- Basic knowledge about Quartus

INTERESTS

-Feeling you sipping a cup of coffee and reading is great. I love it.
- I really like traveling and exploring new places

REFERENCES

-Mr Tran Hoang Linh tell me about your company

-I found company information on the internet and then contacted the recruiting office email

PROJECTS

Rubik cube solver on FPGA

(2020 - 2020)

Customer -Assignment
-We tasked ourselves with designing a mechanical Rubik’s cube solver. The
mechanical arms rotate the cube to show each cube face of the cube to the
camera. After each face is scanned, the cube faces are passed into the Rubik’s
Description cube solving algorithm. The algorithm computes the moves that will be needed to
solve the cube using a Nios II processor. The instructions are then fed to the
FPGA, which in turn sends PWM signals to the servos to rotate the cube
accordingly in order to solve the cube.
Team size 2
My position Developer
- Analysis and design
- Development
My responsibilities - Review code
- Optimize code
- Bug Fixing
Technologies used -Quartus 18.1

32 bit floating point adder, subtraction, multiplier and division

(2020 - 2020)

Customer Assignment
- Conducting algorithm for calculations on the IEEE-754 floating-point (
Description
Verilogcode for RTL Hardware).
Team size 2
My position Developer
- Analysis and design
- Development
My responsibilities - Review code
- Optimize code
- Bug Fixing
Technologies used - VM Ware, Synopsys

Vending machine
(2020 - 2020)

Customer -Assignment
Description - Design hardware for vending machine using Verilog code.
Team size 2
My position Developer
- Analysis and design
- Development
My responsibilities - Review code
- Optimize code
- Bug Fixing
Technologies used - VM Ware, Synopsys

Risc v 32 bit single cycle

(2020 - 2020)

Customer -Assignment
Description - Design risc v 32 bit single cycle and five-stage pipeline.
Team size 2
My position Developer
 - Analysis and design
- Development
My responsibilities - Review code
- Optimize code
- Bug Fixing
Technologies used - VM Ware, Synopsys

© topcv.vn