National Conference on Recent Trends in Engineering & Technology

Simulation and Design of an Integrated Flyback

Converter for D.C UPS
1
Raju Bhabhor, 2Baria Nitesh
Department of Electrical Engineering, L.D. College of Engineering, Ahmedabad, Gujrat, INDIA
1e-mail: bhabhor_rajsneh@yahoo.com 2 e-mail: nitesh_baria1988@yahoo.com


Abstract - Due increasingly demand of power in each II. CIRCUIT OPERATION
area, power cut is regular phenomena not only in India but The circuit of the proposed integrated flyback
also in abroad. Even a interruption for new cycles of power converter is shown in Fig.2.1. The switch SW1 is used to
supply, results in losses of data storage, mal functioning of select the mode of operation.The converter can also be
various sensitive equipment. Various methods have been extended to give multiple outputs by including additional
reported in literatures to provide continuous power supply secondary windings and output rectifiers.
such as uninterrupted power supply, battery system and
others non conventional source of energy (Solar and Wind
system).
In proposed dissertation work a model is developed to
maintain regular power to consumers even interruption in
power supply occurs for few cycles. Mathematical model of
under different modes such as normal, back-up and
charging is developed.
Three winding high frequency transformer is
designed to interface utility and battery back-up system with
load. A 50 Watts integrated fly back converter for DC
uninterruptible power supply is designed and tested.

I. INTRODUCTION
The traditional way to protect computers against power
failure is to add an uninterruptible power supply (UPS)
preceding the input of the switching power supply.
However, The UPS is often large and bulky due to the use
of main frequency inverter and due to multiple voltage
conversions the system conversion efficiency, from AC
input of UPS to DC output of a computer. So it would be
desirable to integrate the external UPS into the computer
switching power supply to form of DC Uninterruptible
power supply. So far only a few designs of such high
frequency dc UPS had been reported in All these designs
have a common feature that a single power transistor is
used for current switching in both normal and backup
operations, while another transistor is used for battery
charging. While this feature enables full utilization of the
power transistor, the conversion efficiency in backup
operation will be unacceptably low when the voltage of
backup battery is much lower than the voltage of the main
input, because the high voltage MOSFET will have on-
resistance too large for low-voltage, high-current
switching.
Fig.2.1 Circuit of proposed integrated flyback converter
The converter has three modes of operation,
namely normal mode, backup mode, and charging mode.
When the main power input VAC is functioning properly,
the switch SW1 will be closed and MOSFET Q2 turned off
to operate the converter in normal mode. The equivalent
circuit of the converter in normal mode is shown in Fig
2.1(a). The circuit functions as a flyback converter
delivering power from the main inputVC1 to the load, with
power flow controlled by the duty cycle Dl of MOSFET
Q1. The battery voltage VB should be chosen to be higher
than Vc1n2/n1 to prevent diode D2 from conducting when
Q1 is turned on. Such choice will make the backup
converter (VB, Q2, D2 and n2) idle, thus disappearing from
the equivalent circuit during normal-mode operation.
Note that if the converter is used for universal ac input
voltage, VCl may range from 120 to 380 V. In this case VB

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 National Conference on Recent Trends in Engineering & Technology
and the turn ratio n2/n1 should be determined with VCl at
its maximum of 380V.
When input power failure is detected, MOSFET
Q1 will be switched off and switch SW1 will be closed to
operate the converter in backup mode. The equivalent
circuit of the converter in backup mode is shown in
Fig.2.1(b).
Fig.2.1(a) Normal operating mode
Fig.2.1(b) Backup operating mode
Fig.2.1(c) Charging operating mode
Power flow is now from the backup battery VB to
the load and is controlled by the duty cycle D2 of
MOSFET Q2. As the battery voltage VB is much lower
than main input voltage VCl, the switch current iQ2 in
backup mode will be much higher than the switch current
iQ1 in normal mode. Therefore a low-voltage, low-RDs(on)
MOSFET should be chosen for Q2. The number of turn’s
n2 in the primary of backup converter should be chosen to
be much smaller than n1 in the main converter and with
much higher current winding used. Diode Dl in Fig 2.1 is
used to prevent the floating input capacitor C1 from being
charged up by the positive peak of Vp1 during turn on
transition of Q2 through the body diode of Q1 in backup
mode. The capacitor CB in Fig. 2.1 is used to decouple the
13-14 May 2011 B.V.M. Engineering College, V.V.Nagar,Gujarat,India
interconnection inductance of VB, which can lead to large
vDS2 overshoot when large current is being switched off in
backup mode if not bypassed.
When the main power input VAC is functioning properly,
SW1 can be opened to operate the converter in the
charging mode. The equivalent circuit of the converter in
the charging mode is another flyback converter as shown
in Fig2.1(c). As VCl and VB and the windings n1 and n2
are in opposite polarities, the input voltage is effectively
VCl - VB and the effective number of turns of the primary
winding is n2-n1. The magnetizing inductance of the
primary L1-2 is Ll[(n1-n2)/n1]2, where L1 is the inductance
of winding n1. Input current iQ2 will then flow through Dl
and the body diode D2 of Q2 and will be switched by Q1.
As Q2 is shunted by its body diode D2, the input current
can flow whether Q2 is on or off. Power to the output is
controlled by the duty cycle Dl of MOSFET Q1. As the
battery VB is in series with the main input VCl, the battery
charging current -IB will be equal to the averaged input
current IQ1 from VCl. A disadvantage of the proposed
converter is that the charging current is load-dependent
and cannot be controlled independently. The converter
thus cannot provide battery charging when there is no
load. Battery charging is instead controlled by charging
time, i.e. the duration the converter operates in charging
mode. Charging can be stopped by closing SW1 to switch
the converter back to normal mode. Note that although the
primaries of transformer T1 are in opposite polarities
during charging mode operation, the increase of copper
loss will be insignificant because the number of turns n2 is
much smaller than n1 and the copper area per turn of n2 is
much larger than n1.
Normal Mode Back-Up Charging Mode
Mode
Q1 PWM OFF PWM
Q2 OFF PWM Don’t Care
SW ON ON OFF
Table2.1: Operation overview of the circuit
The states of MOSFET's Q1, Q2, and SW1 in
different modes of operation are summarized in Table 1.
The table indicates that while there are two MOSFET's in
the converter, only one PWM controller is required for
control because in any mode of operation there is only
one MOSFET being switched. The output of the PWM
controller can be diverted to either one of' the two
MOSFET's according to the mode of operation.
III. STEADY-STATE ANALYSIS
The steady-state analysis of the converter is
performed with the following assumptions.
1) The converter operates in the continuous conduction.
2) D1 and D2 have slow reverse recoveries.
 National Conference on Recent Trends in Engineering & Technology

3) Power losses and stray capacitances and inductances

are ignored.
4) Capacitor voltages are constant within a switching
cycle.
Referring to the equivalent circuits in Fig. 2.1, the
expressions for the steady-state waveforms of the
converter in different modes of operation can be written
as follows.

In normal mode :
0 < t < D1T D1T < t < T Where D' = 1 - D. It can be shown from (24) and
VP1 = VCl -nlVo/n3 (1) (25) that, given
VP2 = n2VC1/n1 -n2Vo/n3 (2) n2 / n1 < VB/VCl (26)
Vs =n3VC1/n1 - V0 (3) As a design requirement, the duty cycles in different
mode of operations are related by
VDSl = 0 VCl + nlV0/n3 (4)
D2(Backup) < Dl(Norma1) < Dl(Charging) (27)
VDS2 =VB - n2VCl/nl VB + n2V0/n3 (5)
In order to keep the output voltage V0 constant.
VD1 = 0 0 (6)
Using equations (5), (12), (19), and (26), the
VD3 = n3Vcl/nl+ V0 0 (7)
voltage stress on Q2 during turn off in different operating
Vsw = 0 0 (8) modes can be shown to be related by
VDS2(Norma1) = VDS2(Backup) > VDS2(Charging). (28)
In backup mode :
0 < t < D2T D2T < t < T The voltage rating of Q2 should thus be chosen
VP1 = nlVB/n2 -nlVo/n3 (9) according to equations (5) or (12).
VP2 =VB - n2 Vo /n3 (10) Using equations (7), (13), (21), and (26), the
VS = n3VB/n2 - V0 (11) voltage stress on D3 during turn off in different operating
VDS2 = 0 VB + n2V0/n3 (12) modes can be shown to be related by
VD3 = nsVB/n2 + V0 0 (13) VD3(Backup) > VD3(Normal) > VD3(Charging). (29)
Vsw = 0 0 (14)
The voltage rating of D3 should thus be chosen
In charging mode : according to (13).
0 < t < D1T D1T < t < T The averaged currents in Q1, Q2 and D3 during
VP1 = n1(VCl-VB)/(n1-n2) -nlV0/n3 (15) turn on, denoted as IQ1on, IQ2on and ID3on, respectively, in
VP2 = n2(VC1-VB/(n1-n2) - n2V0/n3 (16) different modes of operation are given by (30) - (32). The
Vs = (VC1-VB/(n1-n2) - V0 (17) conduction losses of Q1, Q2, and D3 can be determined
VDS = 0 (VCl –VB) + (nl-n2)V0/n3 (18) from (24) and (2.25), and (30) - (32) after the component
VDS2= 0 0 (19) choices are made. Note that the negative sign of IQ2on in
the charging mode indicates that current is flowing
VD1 = 0 0 (20)
through the body diode of Q2.
VD3 = n3(VCl-VB)/(nl-n2)+VO 0 (21)
Vsw = (n1VB-n2VC1)/(n1-n2) VB+n2V0/n3 (22)
Normal mode Backup mode Charging mode
Applying volt-second balance to equations (l), IQ1on = I0n3/n1D1' 0 I0n3/[(n1-n2)D1'] (30)
(9), and (15) gives the output voltage V0 and duty cycles IQ2on = 0 I0n3/n2D2' -I0n3/[(n1-n2)D1'] (31)
D1 and D2 of MOSFET Q1 and Q2 in different modes of ID3on = I0/D1' I0/D2' I0/D1' (32)
operation.
The averaged battery current IB and switch
current ISW in different modes are given by (33) and (34),
where a positive sign indicates discharging current and a
negative sign indicates charging current for IB. As (34)
indicates that ISw will be maximum in the backup mode,
the current rating of SW1 should be selected according to
(34) in the backup mode.

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 National Conference on Recent Trends in Engineering & Technology

Using the results of the analysis The steady-state

waveforms of the converter in different modes of
operation are plotted in Fig.3.1.

IV. TRANSFORMER CONSTRUCTION

The use of two primary windings n, and n2 in the
integrated converter requires special considerations in the
design of the transformer TI.

Fig . 4.1 (a)Winding arrangements of T, to reduce leakage inductances.

Fig 3.1 Waveforms of the integrated flyback converter,
(a )Normal mode, (b) Backup mode, (c) Charging mode.
The peak current in D3, denoted as iD3PK, is given by
Normal mode : iD3PK= (I0/D1') + (V0D1'T/2L3)
Back up mode : (I0/D2')+(V0D2'T/2L3)
Charging mode : (I0/D1')+(V0D1'T/2L3)
The peak MMF in transformer TI is given by
MMFPK= n3iD3PK
Equation (36), together with the maximum value
of the expressions in (35a), (35b) ,(35c), is used to
determine the air gap length of the transformer core of TI.
Leakage magnetic field patterns in windings : (b) In normal mode : (c) in
back up mode : (d) In charging mode.
When the converter is operated in normal mode,
winding n, will be idle, while winding n, will be idled in
backup mode operation. If the magnetic field in the
transformer passes through the idle winding, energy will
be stored in the space occupied by the idle winding and
appears as extra leakage inductance and causes additional
switching loss. Therefore, the idle winding should be
placed in region where there is no magnetic field. The
windings sequences that satisfy such requirement are
either n1-n3-n2, or n2-n3-n1, i.e. where the secondary is
sandwiched by the primaries. Fig.4.1 shows the leakage
magnetic field patterns for the transformer with the
windings sequences n2-n3-n1, where the windings are split
into multiple layers to further reduce leakage inductances.
In normal mode operation, the field in the idle primary
winding n1 is zero because the negative field of secondary
(35a)
winding n3 has been canceled by the positive field of
(35b) primary winding n1. Similarly in backup mode, the field
(35c) in the idle primary winding n1 is zero because the positive
field of primary winding n2 has been canceled by the
negative field of secondary winding n3.
(36)
V. EXPERIMENTAL RESULTS
5.1 Simulink Model of Integrated Fly back Converter:

13-14 May 2011 B.V.M. Engineering College, V.V.Nagar,Gujarat,India

 National Conference on Recent Trends in Engineering & Technology

Fig 5.1 (a) Normal mode

Fig 3.4 Load current and load voltage versus time in Back Up Mode

CONCLUSION
The operation, design and analysis of an
Fig 5.1 (b) back up mode integrated flyback converter for high frequency dc UPS
5.2 simulation results application are mentioned in detailed. The converter is
powered by a high- voltage main power input and a low-
voltage backup battery. The converter features a simple
circuit, high efficiency, small size, and low cost compared
with the conventional cascade of a UPS and switching
power supply. This converter should find applications in
personal computers and workstations.

REFERENCES
[1]. J. Perkinson, “UPS systems: A review,” in Proc.
Third IEEE Appl. Power Electron.Con$
Exposition 1988 (APEC ’88), 1988, pp. 151-154.
[2]. P. Hunter, “Battery backed switcher provides UPS
capability,” Power- conversion and Intelligent
Motion. Oct. 1989, pp. 56-59.
[3]. P. W. Clarke, “Reserve battery back-up (RBB)
systems employing current-mode feedback for wide
Fig 3.3 Load current and load voltage versus time in Normal Mode bandwidth and large dynamic re- sponse,” in Proc.
PCZ, Intertec. Int., Inc., Apr. 1984, pp. 34-51
[4]. L.Umanand, S.R Bhat New Age International (p)
Limited,Publishers.“Design of Magnetic components
for Switched Mode Power Converters “Wiley
Eastern,New Delhi.

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