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LTC3440

Micropower Synchronous
Buck-Boost DC/DC Converter
Features Description
nn Single Inductor The LTC®3440 is a high efficiency, fixed frequency, Buck-
nn Fixed Frequency Operation with Battery Voltages Boost DC/DC converter that operates from input voltages
Above, Below or Equal to the Output above, below or equal to the output voltage. The topology
nn Synchronous Rectification: Up to 96% Efficiency incorporated in the IC provides a continuous transfer
nn 25µA Quiescent Current in Burst Mode® Operation function through all operating modes, making the prod-
nn Up to 600mA Continuous Output Current uct ideal for single lithium-ion, multicell alkaline or NiMH
nn No Schottky Diodes Required (V
OUT < 4.3V) applications where the output voltage is within the battery
nn V
OUT Disconnected from VIN During Shutdown voltage range.
nn 2.5V to 5.5V Input and Output Range
The device includes two 0.19Ω N-channel MOSFET
nn Programmable Oscillator Frequency
switches and two 0.22Ω P-channel switches. Switch-
from 300kHz to 2MHz ing frequencies up to 2MHz are programmed with an
nn Synchronizable Oscillator
external resistor and the oscillator can be synchronized
nn Burst Mode Enable Control
to an external clock. Quiescent current is only 25µA in
nn <1µA Shutdown Current
Burst Mode operation, maximizing battery life in portable
nn Small Thermally Enhanced 10-Pin MSOP and
applications. Burst Mode operation is user controlled and
(3mm × 3mm) DFN Packages can be enabled by driving the MODE/SYNC pin high. If the
MODE/SYNC pin has either a clock or is driven low, then
fixed frequency switching is enabled.
Applications
nn Palmtop Computers Other features include a 1µA shutdown, soft-start con-
nn Handheld Instruments trol, thermal shutdown and current limit. The LTC3440
nn MP3 Players is available in the 10-pin thermally enhanced MSOP and
nn Digital Cameras (3mm × 3mm) DFN packages.
L, LT, LTC, LTM, Linear Technology, Burst Mode and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.

Typical Application
Li-Ion to 3.3V at 600mA Buck-Boost Converter Efficiency vs V­IN
L1 100
10µH VOUT VOUT = 3.3V
98 IOUT = 100mA
3.3V
600mA 96 fOSC = 1MHz
3 4
SW1 SW2
94
VIN = 2.7V TO 4.2V LTC3440
EFFICIENCY (%)

7 6 R1
VIN VOUT 92
340k
8 9 90
SHDN/SS FB C2
C5 1.5nF 88
2 10 22µF
+ C1 * MODE/SYNC VC 86
Li-Ion R3
10µF 1 5
RT GND 15k R2 84
RT 200k
82
60.4k
80
2.5 3.0 3.5 4.0 4.5 5.0 5.5
*1 = Burst Mode OPERATION C1: TAIYO YUDEN JMK212BJ106MG 3440 TA01
0 = FIXED FREQUENCY C2: TAIYO YUDEN JMK325BJ226MM VIN (V)
L1: SUMIDA CDRH6D38-100 3440 TA02

3440fd

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LTC3440
Absolute Maximum Ratings (Note 1)

VIN, VOUT Voltage ........................................ – 0.3V to 6V Operating Temperature Range (Note 2)....–40°C to 85°C
SW1, SW2 Voltage....................................... –0.3V to 6V Storage Temperature Range................... –65°C to 125°C
VC, RT, FB, SHDN/SS, Lead Temperature (Soldering, 10 sec).................... 300°C
MODE/SYNC Voltage................................... –0.3V to 6V

Pin Configuration
TOP VIEW
TOP VIEW

RT 1 10 VC RT 1 10 VC
MODE/SYNC 2 9 FB
MODE/SYNC 2 9 FB SW1 3 8 SHDN/SS
SW1 3 11 8 SHDN/SS SW2 4 7 VIN
SW2 4 7 VIN GND 5 6 VOUT
GND 5 6 VOUT MS PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE TJMAX = 125°C,
10-LEAD (3mm × 3mm) PLASTIC DFN θJA = 130°C/W 1 layer board
EXPOSED PAD (PIN 11) IS GND θJA = 100°C/W 4 layer board
MUST BE SOLDERED TO PCB θJC = 45°C/W
TJMAX = 125°C, θJA = 43°C/W, θJC = 3°C/W

Order Information http://www.linear.com/product/LTC3440#orderinfo


LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3440EDD#PBF LTC3440EDD#TRPBF LBKT 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC3440EMS#PBF LTC3440EMS#TRPBF LTNP 10-Lead Plastic MSOP –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.

Electrical Characteristics
The ● denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VIN = VOUT = 3.6V, RT = 60k, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Start-Up Voltage l 2.4 2.5 V
Input Operating Range l 2.5 5.5 V
Output Voltage Adjust Range l 2.5 5.5 V
Feedback Voltage l 1.196 1.22 1.244 V
Feedback Input Current VFB = 1.22V 1 50 nA
Quiescent Current, Burst Mode Operation VC = 0V, MODE/SYNC = 3V (Note 3) 25 40 µA
Quiescent Current, Shutdown SHDN = 0V, Not Including Switch Leakage 0.1 1 µA
Quiescent Current, Active VC = 0V, MODE/SYNC = 0V (Note 3) 600 1000 µA
NMOS Switch Leakage Switches B and C 0.1 5 µA
3440fd

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LTC3440
ELECTRICAL
The CHARACTERISTICS ● denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VIN = VOUT = 3.6V, RT = 60k, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
PMOS Switch Leakage Switches A and D 0.1 10 µA
NMOS Switch On Resistance Switches B and C 0.19 Ω
PMOS Switch On Resistance Switches A and D 0.22 Ω
Input Current Limit l 1 A
Maximum Duty Cycle Boost (% Switch C On) l 55 75 %
Buck (% Switch A On) l 100 %
Minimum Duty Cycle l 0 %
Frequency Accuracy l 0.8 1 1.2 MHz
MODE/SYNC Threshold 0.4 2 V
MODE/SYNC Input Current VMODE/SYNC = 5.5V 0.01 1 µA
Error Amp AVOL 90 dB
Error Amp Source Current 15 µA
Error Amp Sink Current 380 µA
SHDN/SS Threshold When IC is Enabled l 0.4 1 1.5 V
When EA is at Maximum Boost Duty Cycle 2.2 V
SHDN/SS Input Current VSHDN = 5.5V 0.01 1 µA

Note 1: Absolute Maximum Ratings are those values beyond which the temperature range are assured by design, characterization and
life of the device may be impaired. correlation with statistical process controls.
Note 2: The LTC3440E is guaranteed to meet performance specifications Note 3: Current measurements are performed when the outputs are not
from 0°C to 70°C. Specifications over the – 40°C to 85°C operating switching.

Typical Performance Characteristics


Li-Ion to 3.3V Efficiency Li-Ion to 3.3V Efficiency, Li-Ion to 3.3V Efficiency
(fOSC = 300kHz) Power Loss (fOSC = 1MHz) (fOSC = 2MHz)
100 100 1000 100

90 Burst Mode 90 Burst Mode 90 Burst Mode


OPERATION OPERATION OPERATION
80 80 100 80
VIN = 4.2V
POWER LOSS (mW)

VIN = 4.2V
EFFICIENCY (%)

EFFICIENCY (%)

EFFICIENCY (%)

70 70 70
VIN = 2.5V
VIN = 2.5V VIN = 3.3V VIN = 3.3V
VIN = 4.2V
60 60 10 60 VIN = 2.5V

50 50 50 VIN = 3.3V
VIN = 3.3V
40 40 1 40
30 30 30
fOSC = 300kHz fOSC = 1MHz
20 fOSC = 2MHz
20 0.1 20
0.1 1 10 100 1000 0.1 1 10 100 1000 0.1 1 10 100 1000
OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) OUTPUT CURRENT (mA)
3440 G01
3440 G02 3440 G03

3440fd

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LTC3440
Typical Performance Characteristics
Switch Pins on the Edge of Switch Pins on the Edge of
Switch Pins During Buck/Boost Buck/Boost and Approaching Boost Buck/Boost and Approaching Buck

SW1 SW1 SW1


2V/DIV 2V/DIV 2V/DIV

SW2 SW2 SW2


2V/DIV 2V/DIV 2V/DIV

VIN = 3.78V 50ns/DIV 3440 G04


VIN = 3.42V 50ns/DIV 3440 G05 VIN = 4.15V 50ns/DIV 3440 G06

VOUT = 3.3V VOUT = 3.3V VOUT = 3.3V


IOUT = 250mA IOUT = 250mA IOUT = 250mA

VOUT Ripple During Buck,


Switch Pins in Buck Mode Switch Pins in Boost Mode Buck/Boost and Boost Modes

Buck
SW1 SW1 VIN = 5V
2V/DIV 2V/DIV
VOUT
Buck/Boost
10mV/DIV
VIN = 3.78V
AC Coupled
Boost
SW2 SW2 VIN = 2.5V
2V/DIV 2V/DIV

VIN = 5V 250ns/DIV 3440 G07


VIN = 2.5V 250ns/DIV 3440 G08 L = 10µH 1µs/DIV 3440 G09

VOUT = 3.3V VOUT = 3.3V COUT = 22µF


IOUT = 250mA IOUT = 250mA IOUT = 250mA
fOSC = 1MHz

Active Quiescent Current Burst Mode Quiescent Current Error Amp Source Current
550 40 20
VIN = VOUT = 3.6V VIN = VOUT = 3.6V VIN = VOUT = 3.6V
E/A SOURCE CURRENT (µA)
VIN + VOUT CURRENT (µA)

VIN + VOUT CURRENT (µA)

500 30 15

450 20 10

400 10 5
–55 –25 5 35 65 95 125 –55 –25 5 35 65 95 125 –55 –25 5 35 65 95 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
3440 G10 3440 G11 3440 G12

3440fd

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LTC3440
Typical Performance Characteristics

Output Frequency NMOS RDS(ON) Feedback Voltage


1.10 0.30 1.236
VIN = VOUT = 3.6V VIN = VOUT = 3.6V VIN = VOUT = 3V
SWITCHES B AND C

1.05 0.25

FEEDBACK VOLTAGE (V)


FREQUENCY (MHz)

NMOS RDS(ON) (Ω)


1.00 0.20 1.216

0.95 0.15

0.90 0.10 1.196


–55 –25 5 35 65 95 125 –55 –25 5 35 65 95 125 –55 –25 5 35 65 95 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
3440 G13 3440 G14 3440 G15

Feedback Voltage Line Regulation Error Amp Sink Current PMOS RDS(ON)
90 430 0.30
VIN = VOUT = 2.5V TO 5.5V VIN = VOUT = 3.6V VIN = VOUT = 3.6V
SWITCHES A AND D

410 0.25
E/A SINK CURRENT (µA)
LINE REGULATION (dB)

80
PMOS RDS(ON) (Ω)
390 0.20

70
370 0.15

60 350 0.10
–55 –25 5 35 65 95 125 –55 –25 5 35 65 95 125 –55 –25 5 35 65 95 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
3440 G16 3440 G17 3440 G18

Boost Max Duty Cycle Minimum Start Voltage Current Limit


90 2.40 3000
VIN = VOUT = 3.6V VIN = VOUT = 3.6V
RT = 60k
PEAK SWITCH
MINIMUM START VOLTAGE (V)

85 2500
CURRENT LIMIT (A)

2.35
DUTY CYCLE (%)

80 2000

2.30 AVERAGE INPUT


75 1500

70 2.25 1000
–55 –25 5 35 65 95 125 –55 –25 5 35 65 95 125 –55 –25 5 35 65 95 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
3440 G19 3440 G20 3440 G21

3440fd

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LTC3440
Pin Functions
RT (Pin 1): Timing Resistor to Program the Oscillator GND (Pin 5): Signal and Power Ground for the IC.
Frequency. The programming frequency range is 300kHz VOUT (Pin 6): Output of the Synchronous Rectifier. A filter
to 2MHz. capacitor is placed from VOUT to GND.
6 • 1010 VIN (Pin 7): Input Supply Pin. Internal VCC for the IC. A
fOSC = Hz
RT ceramic bypass capacitor as close to the VIN pin and GND
(Pin 5) is required.
MODE/SYNC (Pin 2): MODE/SYNC = External CLK : Syn-
chronization of the internal oscillator. A clock frequency SHDN/SS (Pin 8): Combined Soft-Start and Shutdown.
of twice the desired switching frequency and with a pulse Grounding this pin shuts down the IC. Tie to >1.5V to
width between 100ns and 2µs is applied. The oscillator enable the IC and >2.5V to ensure the error amp is not
free running frequency is set slower than the desired clamped from soft-start. An RC from the shutdown com-
synchronized switching frequency to guarantee sync. mand signal to this pin will provide a soft-start function
The oscillator RT component value required is given by: by limiting the rise time of the VC pin.
FB (Pin 9): Feedback Pin. Connect resistor divider tap
8 • 1010 here. The output voltage can be adjusted from 2.5V to
RT =
fSW 5.5V. The feedback reference voltage is typically 1.22V.

where fSW = desired synchronized switching frequency. ⎛ R1 ⎞
VOUT = 1.22V • ⎜1+ ⎟
⎝ R2 ⎠
SW1 (Pin 3): Switch Pin Where the Internal Switches
A and B are Connected. Connect inductor from SW1 to VC (Pin 10): Error Amp Output. A frequency compensa-
SW2. An optional Schottky diode can be connected from tion network is connected from this pin to the FB pin to
SW1 to ground. Minimize trace length to keep EMI down. compensate the loop. See the section “Compensating the
SW2 (Pin 4): Switch Pin Where the Internal Switches C Feedback Loop” for guidelines.
and D are Connected. For applications with output voltages Exposed Pad (Pin 11, DFN Package Only): Ground. This
over 4.3V, a Schottky diode is required from SW2 to VOUT pin must be soldered to the PCB and electrically connected
to ensure the SW pin does not exhibit excess voltage. to ground.

3440fd

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LTC3440
Block Diagram
SW1 SW2
3 4 VOUT
VIN 2.5V TO 5.5V
2.5V TO 5.5V SW A SW D VOUT
7 6

+ GATE
DRIVERS
AND –0.4A
SW B ANTICROSS SW C – +
CONDUCTION
ISENSE REVERSE
AMP CURRENT
LIMIT

SUPPLY
CURRENT
LIMIT
+

ERROR
AMP
+ 1.22V

– R1
+
2.7A PWM
LOGIC FB
AND
PWM – 9
UVLO COMPARATORS
OUTPUT
PHASING CLAMP
+


+
2.4V

VC
RT RT 10
1 OSC
R2
SYNC
Burst Mode
SLEEP OPERATION
CONTROL RSS
SHDN/SS
SHUTDOWN 8 VIN

5µs DELAY

MODE/SYNC 2 CSS

1 = Burst Mode
5
OPERATION GND
0 = FIXED FREQUENCY

3440 BD

3440fd

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LTC3440
Operation
The LTC3440 provides high efficiency, low noise power Error Amp
for applications such as portable instrumentation. The
The error amplifier is a voltage mode amplifier. The loop
LTC proprietary topology allows input voltages above,
compensation components are configured around the
below or equal to the output voltage by properly phasing
amplifier to provide loop compensation for the converter.
the output switches. The error amp output voltage on the
The SHDN/SS pin will clamp the error amp output, VC, to
VC pin determines the output duty cycle of the switches. provide a soft-start function.
Since the VC pin is a filtered signal, it provides rejection
of frequencies from well below the switching frequency. Supply Current Limit
The low RDS(ON), low gate charge synchronous switches
provide high frequency pulse width modulation control at The current limit amplifier will shut PMOS switch A off
high efficiency. Schottky diodes across the synchronous once the current exceeds 2.7A typical. The current ampli-
switch D and synchronous switch B are not required, but fier delay to output is typically 50ns.
provide a lower drop during the break-before-make time
Reverse Current Limit
(typically 15ns). The addition of the Schottky diodes will
improve peak efficiency by typically 1% to 2% at 600kHz. The reverse current limit amplifier monitors the inductor
High efficiency is achieved at light loads when Burst Mode current from the output through switch D. Once a nega-
operation is entered and when the IC’s quiescent current tive inductor current exceeds – 400mA typical, the IC will
is a low 25µA. shut off switch D.

Low Noise Fixed Frequency Operation Output Switch Control


Figure 1 shows a simplified diagram of how the four internal
Oscillator switches are connected to the inductor, VIN, VOUT and GND.
The frequency of operation is user programmable and is Figure 2 shows the regions of operation for the LTC3440
set through a resistor from the RT pin to ground where: as a function of the internal control voltage, VCI. The VCI
voltage is a level shifted voltage from the output of the
⎛ 6e10 ⎞
f=⎜ ⎟Hz error amp (VC pin) (see Figure 5). The output switches are
⎝ RT ⎠ properly phased so the transfer between operation modes

is continuous, filtered and transparent to the user. When
An internally trimmed timing capacitor resides inside the VIN approaches VOUT the Buck/Boost region is reached
IC. The oscillator can be synchronized with an external where the conduction time of the four switch region is
clock applied to the MODE/SYNC pin. A clock frequency typically 150ns. Referring to Figures 1 and 2, the various
of twice the desired switching frequency and with a pulse regions of operation will now be described.
width between 100ns and 2µs is applied. The oscillator
RT component value required is given by:
8 • 1010 VIN VOUT
RT = 7 6 VOUT
fSW

PMOS A PMOS D
where fSW = desired synchronized switching frequency. SW1 SW2
3 4
For example to achieve a 1.2MHz synchronized switching
frequency the applied clock frequency to the MODE/SYNC NMOS B NMOS C

pin is set to 2.4MHz and the timing resistor, RT, is set to


66.5k (closest 1% value).
3440 F01

Figure 1. Simplified Diagram of Output Switches


3440fd

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LTC3440
Operation
75%
The input voltage, VIN, where the four switch region begins
DMAX V4 (≈2.05V) is given by:
BOOST
A ON, B OFF
BOOST REGION VOUT
PWM CD SWITCHES VIN = V
DMIN
BOOST
V3 (≈1.65V) 1– (150ns • f)
FOUR SWITCH PWM BUCK/BOOST REGION
DMAX
BUCK
V2 (≈1.55V)
The point at which the four switch region ends is given by:
D ON, C OFF
PWM AB SWITCHES BUCK REGION VIN = VOUT(1 – D) = VOUT(1 – 150ns • f) V
0% V1 (≈0.9V)
Boost Region (VIN < VOUT)
DUTY INTERNAL
3440 F02
CYCLE CONTROL
VOLTAGE, VCI Switch A is always on and switch B is always off during
this mode. When the internal control voltage, VCI, is
Figure 2. Switch Control vs Internal Control Voltage, VCI above voltage V3, switch pair CD will alternately switch
to provide a boosted output voltage. This operation is
Buck Region (VIN > VOUT) typical to a synchronous boost regulator. The maximum
Switch D is always on and switch C is always off during duty cycle of the converter is limited to 75% typical and
this mode. When the internal control voltage, VCI, is above is reached when VCI is above V4.
voltage V1, output A begins to switch. During the off time of
Burst Mode Operation
switch A, synchronous switch B turns on for the remainder
of the time. Switches A and B will alternate similar to a Burst Mode operation is when the IC delivers energy to
typical synchronous buck regulator. As the control volt- the output until it is regulated and then goes into a sleep
age increases, the duty cycle of switch A increases until mode where the outputs are off and the IC is consuming
the maximum duty cycle of the converter in Buck mode only 25µA. In this mode the output ripple has a variable
reaches DMAX_BUCK, given by: frequency component that depends upon load current.
DMAX_BUCK = 100 – D4SW % During the period where the device is delivering energy to
the output, the peak current will be equal to 400mA typical
where D4SW = duty cycle % of the four switch range.
and the inductor current will terminate at zero current for
D4SW = (150ns • f) • 100 % each cycle. In this mode the maximum average output
where f = operating frequency, Hz. current is given by:

Beyond this point the “four switch,” or Buck/Boost region 0.1• VIN
IOUT(MAX)BURST ≈ A
is reached. VOUT + VIN

Buck/Boost or Four Switch (VIN ~ VOUT) Burst Mode operation is user controlled, by driving the
MODE/SYNC pin high to enable and low to disable.
When the internal control voltage, VCI, is above voltage V2,
switch pair AD remain on for duty cycle DMAX_BUCK, and The peak efficiency during Burst Mode operation is less
the switch pair AC begins to phase in. As switch pair AC than the peak efficiency during fixed frequency because
phases in, switch pair BD phases out accordingly. When the part enters full-time 4-switch mode (when servicing
the VCI voltage reaches the edge of the Buck/Boost range, the output) with discontinuous inductor current as illus-
at voltage V3, the AC switch pair completely phase out the trated in Figures 3 and 4. During Burst Mode operation,
BD pair, and the boost phase begins at duty cycle D4SW. the control loop is nonlinear and cannot utilize the control
voltage from the error amp to determine the control mode,

3440fd

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LTC3440
Operation
therefore full-time 4-switch mode is required to main- Burst Mode Operation to Fixed Frequency Transient
tain the Buck/Boost function. The efficiency below 1mA Response
becomes dominated primarily by the quiescent current and
When transitioning from Burst Mode operation to fixed
not the peak efficiency. The equation is given by:
frequency, the system exhibits a transient since the modes
(ηbm) • ILOAD of operation have changed. For most systems this transient
Efficiency Burst ≈
25µA +ILOAD is acceptable, but the application may have stringent input
current and/or output voltage requirements that dictate a
where (ηbm) is typically 79% during Burst Mode opera- broad-band voltage loop to minimize the transient. Low-
tion for an ESR of the inductor of 50mΩ. For 200mΩ of ering the DC gain of the loop will facilitate the task (10M
inductor ESR, the peak efficiency (ηbm) drops to 75%. FB to VC) at the expense of DC load regulation. Type 3
compensation is also recommended to broad band the
loop and roll off past the two pole response of the LC of
the converter (see Closing the Feedback Loop).

VIN VOUT
7 6

A dI ≈ VIN D
dT L
+ – 400mA
3 4
IINDUCTOR

L
SW1 SW2
B C
0mA 3440 F03
T1

5
GND

Figure 3. Inductor Charge Cycle During Burst Mode Operation

VIN VOUT
7 6

A dI ≈ – VOUT D
dT L
3
– + 4 400mA
IINDUCTOR

L
SW1 SW2
B C
0mA
3440 F04
T2

5
GND

Figure 4. Inductor Discharge Cycle During Burst Mode Operation

3440fd

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LTC3440
Operation
Soft-Start the VC pin. A detailed diagram of this function is shown
in Figure 5. The components RSS and CSS provide a
The soft-start function is combined with shutdown.
slow ramping voltage on the SHDN/SS pin to provide a
When the SHDN/SS pin is brought above typically 1V,
soft-start function.
the IC is enabled but the EA duty cycle is clamped from

ERROR AMP
VIN
15µA
VOUT
+ 1.22V

FB R1

– 9

R2
VC CP1
SOFT-START
CLAMP 10

TO PWM VCI
COMPARATORS

SHDN/SS RSS
8 ENABLE SIGNAL
3440 F05
CSS

+
CHIP
ENABLE
– 1V

Figure 5. Soft-Start Circuitry

3440fd

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LTC3440
Applications Information
COMPONENT SELECTION For high efficiency, choose an inductor with a high fre-
quency core material, such as ferrite, to reduce core loses.
The inductor should have low ESR (equivalent series
resistance) to reduce the I2R losses, and must be able to
1 RT LTC3440 VC 10 handle the peak inductor current without saturating. Molded
2 MODE/SYNC FB 9 chokes or chip inductors usually do not have enough core
L1 3 SW1
D2 SHDN/SS 8 R1 R2 to support the peak inductor currents in the 1A to 2A
4
SW2
VIN 7 VIN region. To minimize radiated noise, use a toroid, pot core
D1
5 GND VOUT 6
or shielded bobbin inductor. See Table 1 for suggested
C1 components and Table 2 for a list of component suppliers.
MULTIPLE
VIAS Table 1. Inductor Vendor Information
C2
VOUT SUPPLIER PHONE FAX WEB SITE
Coilcraft (847) 639-6400 (847) 639-1469 www.coilcraft.com
GND
3440 F06 Coiltronics (561) 241-7876 (561) 241-9339 www.coiltronics.com
Murata USA: USA: www.murata.com
(814) 237-1431 (814) 238-0490
Figure 6. Recommended Component Placement. Traces Carrying (800) 831-9172
High Current are Direct. Trace Area at FB and VC Pins are Kept
Low. Lead Length to Battery Should be Kept Short Sumida USA: www.japanlink.com/
(847) 956-0666 (847) 956-0702 sumida
Japan:
Inductor Selection 81(3) 3607-5111 81(3) 3607-5144
The high frequency operation of the LTC3440 allows the
use of small surface mount inductors. The inductor cur- Output Capacitor Selection
rent ripple is typically set to 20% to 40% of the maximum The bulk value of the capacitor is set to reduce the ripple
inductor current. For a given ripple the inductance terms due to charge into the capacitor each cycle. The steady
are given as follows: state ripple due to charge is given by:
VIN(MIN) • ( VOUT − VIN(MIN) )
L> µH IOUT(MAX) • ( VOUT – VIN(MIN) ) • 100
f •IOUT(MAX) • Ripple • VOUT %Ripple _Boost = %
COUT • VOUT2 • f
VOUT • ( VIN(MAX) − VOUT )
L> µH IOUT(MAX) • ( VIN(MAX) – VOUT ) • 100
f •IOUT(MAX) • Ripple • VIN(MAX) %Ripple _Buck = %
COUT • VIN(MAX) • VOUT • f
where f = operating frequency, MHz
where COUT = output filter capacitor, F
Ripple = allowable inductor current ripple
(e.g., 0.2 = 20%) The output capacitance is usually many times larger in
VIN(MIN) = minimum input voltage, V order to handle the transient response of the converter. For
a rule of thumb, the ratio of the operating frequency to the
VIN(MAX) = maximum input voltage, V unity-gain bandwidth of the converter is the amount the
VOUT = output voltage, V output capacitance will have to increase from the above
IOUT(MAX) = maximum output load current calculations in order to maintain the desired transient
response.

3440fd

12 For more information www.linear.com/LTC3440


LTC3440
APPLICATIONS INFORMATION
The other component of ripple is due to the ESR (equiva- Input Voltage > 4.5V
lent series resistance) of the output capacitor. Low ESR
For applications with input voltages above 4.5V which could
capacitors should be used to minimize output voltage
exhibit an overload or short-circuit condition, a 2Ω/1nF
ripple. For surface mount applications, Taiyo Yuden ceramic
series snubber is required between the SW1 pin and GND.
capacitors, AVX TPS series tantalum capacitors or Sanyo
A Schottky diode such as the Phillips PMEG2010EA or
POSCAP are recommended.
equivalent from SW1 to VIN should also be added as close
to the pins as possible. For the higher input voltages VIN
Input Capacitor Selection
bypassing becomes more critical, therefore, a ceramic
Since the VIN pin is the supply voltage for the IC it is bypass capacitor as close to the VIN and GND pins as
recommended to place at least a 4.7µF, low ESR bypass possible is also required.
capacitor.
Operating Frequency Selection
Table 2. Capacitor Vendor Information
SUPPLIER PHONE FAX WEB SITE There are several considerations in selecting the operat-
AVX (803) 448-9411 (803) 448-1943 www.avxcorp.com ing frequency of the converter. The first is, what are the
Sanyo (619) 661-6322 (619) 661-1055 www.sanyovideo.com sensitive frequency bands that cannot tolerate any spec-
Taiyo Yuden (408) 573-4150 (408) 573-4159 www.t-yuden.com tral noise? For example, in products incorporating RF
communications, the 455kHz IF frequency is sensitive to
Optional Schottky Diodes any noise, therefore switching above 600kHz is desired.
Some communications have sensitivity to 1.1MHz and in
To achieve a 1%-2% efficiency improvement above
that case a 2MHz converter frequency may be employed.
50mW, Schottky diodes can be added across synchronous
switches B (SW1 to GND) and D (SW2 to VOUT). The Other considerations are the physical size of the converter
Schottky diodes will provide a lower voltage drop during and efficiency. As the operating frequency goes up, the
the break-before-make time (typically 15ns) of the NMOS to inductor and filter capacitors go down in value and size.
PMOS transition. General purpose diodes such as a 1N914 The trade off is in efficiency since the switching losses due
are not recommended due to the slow recovery times and to gate charge are going up proportional with frequency.
will compromise efficiency. If desired a large Schottky Additional quiescent current due to the output switches
diode, such as an MBRM120T3, can be used from SW2 to GATE charge is given by:
VOUT. A low capacitance Schottky diode is recommended
from GND to SW1 such as a Phillips PMEG2010EA or Buck: (0.5 • VIN • f ) mA
equivalent. Boost: [0.25 • (VIN + VOUT) • f ] mA
Output Voltage > 4.3V Buck/Boost: f • (0.75 • VIN + 0.25 • VOUT) mA
A Schottky diode from SW to VOUT is required for output where f = switching frequency in MHz
voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage
on SW2 due to the parasitic lead and trace inductance.

3440fd

For more information www.linear.com/LTC3440 13


LTC3440
APPLICATIONS INFORMATION
Closing the Feedback Loop Most applications demand an improved transient response
to allow a smaller output filter capacitor. To achieve a higher
The LTC3440 incorporates voltage mode PWM control. The
bandwidth, Type III compensation is required. Two zeros
control to output gain varies with operation region (Buck,
are required to compensate for the double-pole response.
Boost, Buck-Boost), but is usually no greater than 15. The
1
output filter exhibits a double pole response is given by: fPOLE1 ≈ Hz
2 • π •32e3 •R1• CP1
1
fFILTER _ POLE = Hz(in Buck mode) Which is extremely close to DC
2 • π • L • COUT
1
fZERO1 = Hz
VIN 2 • π •RZ • CP1
fFILTER_POLE = Hz (in Boost mode)
2 • VOUT • π • L •COUT 1
fZERO2 = Hz
2 • π •R1 • CZ 1
where L is in Henries and COUT is the output filter capaci-
tor in Farads. 1
fPOLE2 = Hz
The output filter zero is given by: 2 • π •RZ • CP2

1
fFILTER _ ZERO = Hz
2 • π • RESR • COUT
VOUT

where RESR is the capacitor equivalent series resistance. + 1.22V


ERROR R1
FB
A troublesome feature in Boost mode is the right-half AMP
– 9
plane zero (RHP), and is given by: CP1 R2
VC

VIN 2 10
3440 F07
fRHPZ = Hz
2 • π •IOUT • L • VOUT
Figure 7. Error Amplifier with Type I Compensation
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network can be incorporated VOUT

to stabilize the loop but at a cost of reduced bandwidth


and slower transient response. To ensure proper phase + 1.22V
R1 CZ1
margin, the loop requires to be crossed over a decade ERROR
AMP FB
before the LC double pole. – 9

CP1 R2
The unity-gain frequency of the error amplifier with the VC RZ
10
Type I compensation is given by: CP2

1 3440 F08

fUG = Hz
2 • π • R1• CP1
Figure 8. Error Amplifier with Type III Compensation

3440fd

14 For more information www.linear.com/LTC3440


LTC3440
APPLICATIONS INFORMATION
Short-Circuit Improvements Simple Average Input Current Control
The LTC3440 is current limited to 2.7A peak to protect A simple average current limit circuit is shown in
the IC from damage. At input voltages above 4.5V a cur- Figure 10. Once the input current of the IC is above ap-
rent limit condition may produce undesirable voltages proximately 1A, Q1 will start sourcing current into the FB
to the IC due to the series inductance of the package, as pin and lower the output voltage to maintain the average
well as the traces and external components. Following input current. Since the voltage loop is utilized to perform
the recommendations for output voltage >4.3V and input average current limit, the voltage control loop is main-
voltage >4.5V will improve this condition. Additional tained and the VC voltage does not slam. The averaging
short-circuit protection can be accomplished with some function of current comes from the fact that voltage loop
external circuitry. compensation is also used with this circuit.
In an overload or short-circuit condition the LTC3440 volt- VIN
age loop opens and the error amp control voltage on the VC
pin slams to the upper clamp level. This condition forces R1
boost mode operation in order to attempt to provide more 1M
D1
R2
output voltage and the IC hits a peak switch current limit of 1N4148
1M

2.7A. When switch current limit is reached switches B and SOFT-START


M2
NMOS
SO/SS
D turn on for the remainder of the cycle to reverse the volts VN2222 M1
C1 C2 NMOS VOUT
• seconds on the inductor. Although this prevents current 4.7nF 10nF VN2222
run away, this condition produces four switch operation
producing a current foldback characteristic and the aver- 3440 F09

age input current drops. The IC is trimmed to guarantee


greater than 1A average input current to meet the maximum Figure 9. Soft-Start Reset Circuitry for a Sustained Short-Circuit
load demand, but in a short-circuit or overload condition
the foldback characteristic will occur producing higher
peak switch currents. To minimize this affect during this
condition the following circuits can be utilized. INPUT_VOLTAGE
C1
V1
10µF R1
Restart Circuit 0.5Ω
Q1
For a sustained short-circuit the circuit in Figure 9 will force 2N3906
VIN_PIN

a soft-start condition. The only design constraint is that FB_PIN


R2/C2 time constant must be longer than the soft-start
components R1/C1 to ensure start-up. Figure 10. Simple Input Current Control
Utilizing the Voltage Loop

3440fd

For more information www.linear.com/LTC3440 15


LTC3440
Typical Applications

3-Cell to 3.3V at 600mA Converter

L1
D2
4.7µH VOUT
3.3V
D1 C3 600mA
3 4 33pF
SW1 SW2
VIN = 2.7V TO 4.5V LTC3440 R1 R5
7 6
VIN VOUT 340k 10k

8 9
SHDN/SS FB C2
C4 150pF
+ 2
MODE/SYNC VC
10 R3 15k 22µF
C1 *
3 CELLS
10µF 1 5
RT GND R2
RT f 200k
OSC = 1.5MHz C5 10pF
45.3k

*1 = Burst Mode OPERATION C1: TAIYO YUDEN JMK212BJ106MG 3440 TA03a


0 = FIXED FREQUENCY C2: TAIYO YUDEN JMK325BJ226MM
D1, D2: CENTRAL SEMICONDUCTOR CMDSH2-3
L1: SUMIDA CDR43-4R7M

3-Cell to 3.3V Efficiency


100
90 Burst Mode
80 OPERATION

70
VIN = 2.7V
EFFICIENCY (%)

60
VIN = 4.5V
50
VIN = 3.3V
40
30
20
10
fOSC = 1.5MHz
0
0.1 1 10 100 1000
OUTPUT CURRENT (mA)
3440 TA03b

3440fd

16 For more information www.linear.com/LTC3440


LTC3440
TYPICAL APPLICATIONS
3-Cell to 5V Boost Converter with Output Disconnect 3-Cell to 5V Boost Efficiency
L1 100
D1** VIN = 4.5V
10µH VOUT
5V 90
Burst Mode
300mA 80 OPERATION
3 4
SW1 SW2
70 VIN = 3.6V VIN = 2.7V
VIN = 2.7V TO 4.5V 7 LTC3440 6 R1

EFFICIENCY (%)
VIN VOUT 619k 60
R4 1M 8 9
SHDN/SS FB
50
C2**
+ 2 10 15k 22µF 40
3 C1 C3 * MODE/SYNC VC
CELLS 30
10µF 0.1µF 1 5 C4
RT GND R2 20
1.5nF
RT 200k
SD 10
f = 1MHz
60.4k OSC fOSC = 1MHz
0
*1 = Burst Mode OPERATION C1: TAIYO YUDEN JMK212BJ106MG 3440 TA06a
0.1 1 10 100 1000
0 = FIXED FREQUENCY C2: TAIYO YUDEN JMK325BJ226MM OUTPUT CURRENT (mA)
** LOCATE COMPONENTS AS D1: ON SEMICONDUCTOR MBRM120T3 3440 TA06b
CLOSE TO IC AS POSSIBLE L1: SUMIDA CDRH4D28-100

Low Profile (<1.1mm) Li-Ion to 3.3V at 200mA Converter


L1
4.7µH VOUT
3.3V
200mA
3 4
SW1 SW2
VIN = 2.5V TO 4.2V LTC3440 R1
7 6 340k
VIN VOUT
8 9
SHDN/SS FB C2
2 10 4.7µF
+ C1 * MODE/SYNC VC
Li-Ion R3
4.7µF 1 5 C4
RT GND 15k R2
1.5nF
RT 200k
30.1k

*1 = Burst Mode OPERATION C1: TAIYO YUDEN JMK212BJ475MG 3440 TA04a


0 = FIXED FREQUENCY C2: TAIYO YUDEN JMK212BJ475MG
fOSC = 2MHz L1: COILCRAFT LPO1704-472M

Efficiency
100
90
Burst Mode
80 OPERATION
70
EFFICIENCY (%)

60
VIN = 2.5V VIN = 4.2V
50
VIN = 3.3V
40
30
20
10
0
0.1 1 10 100 1000
OUTPUT CURRENT (mA)
3440 TA04b

3440fd

For more information www.linear.com/LTC3440 17


LTC3440
TYPICAL APPLICATIONS
WCDMA Power Amp Power Supply with Dynamic Voltage Control Efficiency of the WCDMA
Power Amp Power Supply
VOUT = 3.3V – 1.7V • (VDAC – 1.22V) 100
VOUT = 3.4V
DAC
L1 98
D1**
3.3µH
VOUT 96 IOUT = 100mA
0.4V TO 5V
3 4 C3 94

EFFICIENCY (%)
SW1 SW2 33pF
92
VIN = 2.5V TO 4.2V LTC3440 R1 R5 IOUT = 250mA
7 6
VIN VOUT 340k 10k 90
8 9 R6 88
SHDN/SS FB 200k IOUT = 600mA
C4 150pF 86
R3 15k
+ C1 *
2
MODE/SYNC VC
10
Li-Ion 84
10µF
1 5
RT GND R2 C2** 82
C5 10pF 200k 10µF
RT 80
30.1k fOSC = 2MHz 2.5 3 3.5 4 4.5 5
INPUT VOLTAGE (V)
*1 = Burst Mode OPERATION C1, C2: TAIYO YUDEN JMK212BJ106MM 3440 TA07a 3440 TA07b
0 = FIXED FREQUENCY D1: ON SEMICONDUCTOR MBRM120T3
** LOCATE COMPONENTS AS L1: SUMIDA CDRH4D28-3R3
CLOSE TO IC AS POSSIBLE

GSM Modem Powered from USB or PCMCIA with 500mA Input Current Limit
L1
10µH VOUT
3.6V
2A
3 4 (PULSED)
RS SW1 SW2
VIN R1
0.1Ω 7 LTC3440 6 392k
2.5V TO 5.5V
VIN VOUT
USB/PCMCIA POWER R6
1N914 + C6 TO C9
500mA MAX 8 9 130k
SHDN/SS FB 1/2 LT1490A 470µF
×4
2
MODE/SYNC VC
10 –
C1 * R2
10µF 1 5 200k
C5
RT GND
10nF
RT R5
60.4k 24k

+ C1: TAIYO YUDEN JMK212BJ106MG


3440 TA08

C2: TAIYO YUDEN JMK325BJ226MM


R4 1/2 LT1490A 2N3906 L1: SUMIDA CDRH-4D28-100
1k – *1 = Burst Mode OPERATION
ICURRENTLIMIT = 1.22 • R4 0 = FIXED FREQUENCY
R5 • RS

3440fd

18 For more information www.linear.com/LTC3440


LTC3440
Package Description
Please refer to http://www.linear.com/product/LTC3440#packaging for the most recent package drawings.

DD Package
DD Package
10-Lead10-Lead
Plastic DFN (3mm
Plastic × 3mm)
DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
(Reference LTC DWG # 05-08-1699 Rev C)

0.70 ±0.05

3.55 ±0.05 1.65 ±0.05


2.15 ±0.05 (2 SIDES)

PACKAGE
OUTLINE

0.25 ±0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS


R = 0.125 0.40 ±0.10
TYP
6 10

3.00 ±0.10 1.65 ±0.10


(4 SIDES) (2 SIDES) PIN 1 NOTCH
PIN 1 R = 0.20 OR
TOP MARK 0.35 × 45°
(SEE NOTE 6) CHAMFER
(DD) DFN REV C 0310

5 1
0.200 REF 0.75 ±0.05 0.25 ±0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE

3440fd

For more information www.linear.com/LTC3440 19


LTC3440
Package Description
Please refer to http://www.linear.com/product/LTC3440#packaging for the most recent package drawings.

MS Package
MS Package
10-Lead Plastic MSOP
10-Lead
(Reference Plastic
LTC DWG MSOP Rev F)
# 05-08-1661
(Reference LTC DWG # 05-08-1661 Rev F)

0.889 ±0.127
(.035 ±.005)

5.10
(.201) 3.20 – 3.45
MIN (.126 – .136)

3.00 ±0.102
0.50 (.118 ±.004) 0.497 ±0.076
0.305 ±0.038
(.0120 ±.0015) (.0197) (NOTE 3) (.0196 ±.003)
10 9 8 7 6
TYP BSC REF
RECOMMENDED SOLDER PAD LAYOUT

4.90 ±0.152 3.00 ±0.102


DETAIL “A” (.193 ±.006) (.118 ±.004)
0.254 (NOTE 4)
(.010)
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ±0.152
(.021 ±.006) 1.10 0.86
(.043) (.034)
DETAIL “A” REF
MAX
0.18
(.007)
SEATING
PLANE 0.17 – 0.27 0.1016 ±0.0508
(.007 – .011) (.004 ±.002)
0.50
TYP MSOP (MS) 0213 REV F
NOTE: (.0197)
1. DIMENSIONS IN MILLIMETER/(INCH) BSC
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

3440fd

20 For more information www.linear.com/LTC3440


LTC3440
Revision History (Revision history begins at Rev C)

REV DATE DESCRIPTION PAGE NUMBER


C 8/14 Modified filter pole equation in Closing the Feedback Loop section 13
D 10/16 Added equation to calculate VOUT 6
Modified Operating Frequency Selection section 13

3440fd

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.


However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
For more
tion that the interconnection information
of its circuits www.linear.com/LTC3440
as described herein will not infringe on existing patent rights. 21
LTC3440
Typical Application
Li-Ion to 3.3V at 600mA Buck-Boost Converter Efficiency
L1 100
10µH VOUT
90 Burst Mode
3.3V
600mA 80 OPERATION
3 4
SW1 SW2
70
VIN = 2.7V TO 4.2V LTC3440 VIN = 4.2V

EFFICIENCY (%)
7 6 R1
VIN VOUT 340k 60
VIN = 3.3V
8 9 50
SHDN/SS FB C2
C5 1.5nF 40
2 10 22µF
+ C1 * MODE/SYNC VC
Li-Ion 30
10µF R3
1 5 15k
RT GND R2 20
RT 200k
10
60.4k
0
0.1 1.0 10 100 1000
*1 = Burst Mode OPERATION C1: TAIYO YUDEN JMK212BJ106MG 3440 TA01
0 = FIXED FREQUENCY C2: TAIYO YUDEN JMK325BJ226MM OUTPUT CURRENT (mA)
L1: SUMIDA CDRH6D38-100 3440 TA05

Related Parts
PART NUMBER DESCRIPTION COMMENTS
LT1613 550mA(ISW), 1.4MHz, High Efficiency Step-Up DC/DC 90% Efficiency, VIN: 0.9V to 10V, VOUT(MIN) = 34V, IQ = 3mA,
Converter ISD = <1µA, ThinSOT™ Package
LT1618 1.5A(ISW), 1.25MHz, High Efficiency Step-Up DC/DC 90% Efficiency, VIN: 1.6V to 18V, VOUT(MIN) = 35V, IQ = 1.8mA,
Converter ISD = <1µA, MS10 Package
LTC1877 600mA(IOUT), 550kHz, Synchronous Step-Down DC/DC 95% Efficiency, VIN: 2.7V to 10V, VOUT(MIN) = 0.8V, IQ = 10µA,
Converter ISD = <1µA, MS8 Package
LTC1878 600mA(IOUT), 550kHz, Synchronous Step-Down DC/DC 95% Efficiency, VIN: 2.7V to 6V, VOUT(MIN) = 0.8V, IQ = 10µA,
Converter ISD = <1µA, MS8 Package
LTC1879 1.2A(IOUT), 550kHz, Synchronous Step-Down DC/DC 95% Efficiency, VIN: 2.7V to 10V, VOUT(MIN) = 0.8V, IQ = 15µA,
Converter ISD = <1µA, TSSOP16 Package
LT1961 1.5A(ISW), 1.25MHz, High Efficiency Step-Up DC/DC 90% Efficiency, VIN: 3V to 25V, VOUT(MIN) = 35V, IQ = 0.9mA,
Converter ISD = 6µA, MS8E Package
LTC3400/LTC3400B 600mA(ISW), 1.2MHz, Synchronous Step-Up DC/DC 92% Efficiency, VIN: 0.85V to 5V, VOUT(MIN) = 5V, IQ = 19µA/300µA,
Converter ISD = <1µA, ThinSOT Package
LTC3401 1A(ISW), 3MHz, Synchronous Step-Up DC/DC Converter 97% Efficiency, VIN: 0.5V to 5V, VOUT(MIN) = 6V, IQ = 38µA,
ISD = <1µA, MS10 Package
LTC3402 2A(ISW), 3MHz, Synchronous Step-Up DC/DC Converter 97% Efficiency, VIN: 0.5V to 5V, VOUT(MIN) = 6V, IQ = 38µA,
ISD = <1µA, MS10 Package
LTC3405/LTC3405A 300mA(IOUT), 1.5MHz, Synchronous Step-Down DC/DC 95% Efficiency, VIN: 2.7V to 6V, VOUT(MIN) = 0.8V, IQ = 20µA,
Converter ISD = <1µA, ThinSOT Package
LTC3406/LTC3406B 600mA(IOUT), 1.5MHz, Synchronous Step-Down DC/DC 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20µA,
Converter ISD = <1µA, ThinSOT Package
LTC3411 1.25A(IOUT), 4MHz, Synchronous Step-Down DC/DC 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60µA,
Converter ISD = <1µA, MS10 Package
LTC3412 2.5A(IOUT), 4MHz, Synchronous Step-Down DC/DC 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60µA,
Converter ISD = <1µA, TSSOP16E Package
LTC3441/LTC3443 1.2A(IOUT), 1MHz/0.6MHz, Micropower Synchronous 95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 25µA,
Buck-Boost DC/DC Converter ISD = <1µA, DFN Package

3440fd

22 Linear Technology Corporation


LT 1016 REV D • PRINTED IN USA

1630 McCarthy Blvd., Milpitas, CA 95035-7417


For more information www.linear.com/LTC3440
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC3440  LINEAR TECHNOLOGY CORPORATION 2001

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