First year class (IT) Evening study Logic Design

Number Systems
I. DECIMAL NUMBERS

 It contains ten symbols (digits) 0 to 9.

 Decimal number characteristics:
[1] It has base of ten (radix).
(3)10 , (484)10 , (86.904) 10
[2] Each digit position has an associated weight. The weights for whole-
numbers are positive powers of ten that increase from right to left,
beginning with 100 = 1 .
..…... 105 104 103 102 101 100

[3] For fractional numbers, the weights are negative powers of ten that
decrease from left to right beginning with 10−1 = 0.1
10−1 10−2 10−3 ………….
 The value of a decimal number is the sum of the digits after each digit
has been multiplied by its weight.
Example 1:
 Express the number (2014)10 as a sum of the values of each digit

(2014)10 = 2 ∗ 103 + 0 ∗ 102 + 1 ∗ 101 + 4 ∗ 100

= 2000 + 0 + 10 + 4 = 2014
 Express the number (568.23)10 as a sum of the values of each
digit
(568.23)10 = 5 ∗ 102 + 6 ∗ 101 + 8 ∗ 100 + 2 ∗ 10−1
+3 ∗ 10− 2
= 500 + 60 + 8 + 0.2 + 0.03 = 568.23

H.W

1. Express the numbers below as a sum of the values of each digit

(a) (137)10 (b)(106.58)10

2. What weight does the digital 7 have in each of the following

numbers

(a) (1370)10 (b) (6725)10 (c) 58.7210

1
First year class (IT) Evening study Logic Design

II. Binary Numbers

 The binary number system is another way to represent quantities. It is

less complicated than the decimal system because it has only two digits
(bit) 1 and 0.
 The base of the binary system is 2. This means that only the numbers 0
and 1 are used to denote specific numbers.
(1011010)2
MSB LSB
 Binary count
 With n bits you can count up to a number equal to ( 2𝑛 − 1 ).
For example

If n = 4, we can count from zero to sixteen

Largest decimal number = 24 − 1 = 15

 The weighting of binary numbers

 The position of a 1 or 0 in a binary number indicates its weight.

 The right-most bit is the LSB (least significant bit) in a binary whole
number and has a weight of 20 = 1. The weights increase from right to

2
First year class (IT) Evening study Logic Design

left by a power of two for each bit. The left-most bit is the MSB (most
significant bit); its weight depends on the size of the binary number.
 Fractional numbers can also be represented in binary by placing bits to
the right of the binary point, just as fractional decimal digits are placed
to the right of the decimal point. The left-most bit is the MSB in a
binary fractional number and has a weight of 2−1 = 0.5. The fractional
weights decrease from left to right by a negative power of two for each
bit. The weight structure of a binary number is:

Where, n is the number of bits from the binary.

Example: Explain all bits weight in the fallowing numbers:

(100010)2 , (101.001)2 , (0.1101)2
Solution
(100010)2
25 24 23 22 21 20

(101.001)2

22 21 20 . 2−1 2−2 2−3

 Binary-to-Decimal Conversion

To convert any binary number to decimal, we should add the weights of

all 1s in a binary number to get the decimal value.

Example 1: Convert the binary whole number 1101101 to decimal.

Solution:

Determine the weight of each bit that is a1, and then find the sum of the
weights to get the decimal number.

3
First year class (IT) Evening study Logic Design

Binary number: ( 1 0 1 1 0 1 )2 Multiply each bit with its

Corresponding weight
𝑊𝑒𝑖𝑔ℎ𝑡 = 25 24 23 22 21 20

25 +23 + 22 + 20

= 32 + 8 + 4 + 1 = (45)10

Example 2: Convert the fractional number (0.1011)2 to decimal.

Solution:

Binary number: (0.1 0 1 1)2

Weight= 2−1 2−2 2−3 2−4

2−1 + 2−3 + 2−4

= 0.5+ 0.125+ 0.0625 = (0.6875)10

H.W:

1 Convert the number (10.111)2 to decimal.

2 Convert the binary number 10010001 to decimal.
3 Convert the binary number 1101101.1011 to decimal.
4 Determine the weight of the 1 in the number(10000)2 .

 Decimal –To-Binary conversion

We use repeated division-by-2 method to convert any number from
decimal system to binary

Repeated division-by-Two

To get the binary number for a given decimal number, divide the
decimal number by 2 until the quotient is 0 and the remainders will
form the binary number.

Quotient Remainders

𝐴
=𝑄 , 𝑅
𝐵

4
First year class (IT) Evening study Logic Design

Example

Convert (30)10 to binary fashion using repeated division method.

Example:

Convert (45)10 to binary fashion using repeated division method

Solution

1 2 5 11 22 45
÷
2 2 2 2 2 2

0 1 2 .5 5 .5 11 22 .5 Q
Stopped When
whole number 0.5 0 0.5 0.5 0 0.5
equal to Zero
× R
2 2 2 2 2 2

1 0 1 1 0 1

MSB (101101)2 LSB

5
First year class (IT) Evening study Logic Design

H.W

Convert the fallowing numbers to binary fashion using repeated

division method.

(a) (19)10 (b)(367)10 (c)(1000)10

III. HEXADECIMAL NUMBERS

 Hexadecimal is widely used in computer and microprocessor
applications because it easy to convert to binary number.
 The hexadecimal number system has sixteen characters. So that has a
base of sixteen.
 For example (453)16 𝑜𝑟 0X675 𝑜𝑟 879ℎ𝑒𝑥.
 The hexadecimal number system consists of digits 0-9 (numeric) and
letters A-F (alphabetic).As shown in the following table:

 Binary-to-Hexadecimal Conversion
Converting a binary number to hexadecimal is a straightforward
procedure. Simply break the binary number into 4-bit groups,
starting at the right-most bit (LSB) and replaces each 4-bit group
with the equivalent hexadecimal symbol.

6
First year class (IT) Evening study Logic Design

Example:
Convert the following binary number to hexadecimal
(1100101001010111)2 , (111111000101101001)2

Solution

1100 1010 0101 0111

C A 5 7

(𝐶𝐴57)16

0011 1111 0001 0110 1001

3 F 1 6 9
6
(3𝐹169)16

Note: Two Leading zeros have been added in part (b) to complete
a 4-bit group at the left.

H.W: Convert the number (1001111 01111 0011100)2 to

hexadecimal.

 Hexadecimal-to-Binary Conversion
To convert from a hexadecimal number to a binary number,
reverse the process and replace each hexadecimal symbol with the
appropriate four bits.

Example:
Determine the binary number for the following hexadecimal
numbers:
(10𝐴4)16
Solution
1 0 A 4

0001 0000 1010 0100

0 0 0

7
First year class (IT) Evening study Logic Design

H.W: Convert the numbers (6𝐵𝐷3)16 , (𝐶𝐹8𝐸)16 , (9742)16 to

binary.

 Hexadecimal-to-Decimal Conversion

Another way to convert a hexadecimal number to its decimal

equivalent is to multiply the decimal value of each hexadecimal
digit by its weight and then take the sum of these products.

Example: Convert the following hexadecimal number to decimal

(𝐸5)16 , (𝐵2𝐹8)16

Solution:

Recall from table 2-3 that letters A through F represent decimal

numbers 10 through 15, respectively.

(𝐸5)16 = (𝐸 × 16) + (5 × 1) = (14 × 16) + (5 × 1) = (299)10

(𝐵2𝐹8)16 = (𝐵 × 163 ) + (2 × 162 ) + (𝐹 × 161 ) + (8 × 160 )

= (11 × 4096) + (2 × 256) + (15 × 16) + (8 × 1)

= (45816)10

H.W: Convert the fallowing numbers to decimal.

(6𝐵𝐷)16 , (𝐶𝐴𝐹𝐸)16 , (𝐵𝐸𝐸)16

 Decimal-to-Hexadecimal Conversion
Repeated division of a decimal number by 16 will produce the
equivalent hexadecimal number, formed by the remainders of the
divisions. The first remainder produced is the least significant digit
(LSD). Each successive division by 16 yields a remainder that
becomes a digit in the equivalent hexadecimal number. This
procedure is similar to repeated division by 2 for decimal-to-
binary conversion.

Example: Convert the decimal number 650 to hexadecimal by

division by 16.

8
First year class (IT) Evening study Logic Design

Solution

2 40 650
÷
16 16 16

0 2.5 40.625 Q
Stopped When
whole number 0.625
0.125 0.5
equal to Zero
× R
16 16 16

2 8 10

2 8 A

MSD LSD
(28𝐴)16

H.W Convert the number (2591)10 to hexadecimal.

IV. OCTAL NUMBERS

 Like the hexadecimal number system, the octal number system
provides a convenient way to express binary numbers and codes.
However, it is used less frequently than hexadecimal in
conjunction with computers and microprocessors to express binary
quantities for input and output purposes.
 The octal number system is composed of eight digits, which are
0, 1, 2, 3, 4, 5, 6, 7
So that, the octal number system has a base of 8.

 Octal-to-Decimal Conversion
The evaluation of an octal number in terms of its decimal
equivalent is accomplished by multiplying each digit by its weight
and summing the products.

9
First year class (IT) Evening study Logic Design

Example: Convert the number (2374)8 to decimal.

Octal number: (2 3 7 4 )8 Multiply each Digit with its

Corresponding weight
𝑊𝑒𝑖𝑔ℎ𝑡 = 83 82 81 80

(2 × 83 ) + (3 × 82 ) + (7 × 81 ) + (4 × 80 )

= 1024+ 192 + 56 + 4 = (1276)10

 Decimal-to-Octal Conversion
A method of converting a decimal number to an octal number is
the repeated division-by 8 methods, which is similar to the method
used in the conversion of decimal numbers to binary or to
hexadecimal. The first remainder generated is the least significant
digit (LSD).

Example: Convert the decimal number (359)10 to octal.

Solution

5 44 359
÷
8 8 8

0 5.5 44.875 Q
Stopped When
whole number 0.875
0.625 0.5
equal to Zero
× R
8 8 8

5 4 7

MSD LSD
(547)8

10
First year class (IT) Evening study Logic Design

 Octal-to-Binary Conversion
Because each octal digit can be represented by a 3-bit binary
number, it is very easy to convert from octal to binary. Each octal
digit is represented by three bits as shown in Table below.

To convert an octal number to a binary number, simply replace

each octal digit with the appropriate three bits.

Example

H.W Convert each of the binary numbers in the previous example

to decimal and verify that each value agrees with the decimal
value of the corresponding octal number.

 Binary-to-Octal Conversion
Start with the right-most group of three bits and, moving from
right to left, convert each 3-bit group to the equivalent octal digit.
If there are not three bits available for the left-most group; add
either zeros to make a complete group. These leading zeros do not
affect the value of the binary number.
Example

H.W: Convert the number (1010101000111110010)2 to octal.

11
First year class (IT) Evening study Logic Design

Help Paper

Decimal
Number

it
Repeated division-by 2
Hexadecimal Octal

by
digit

Step2: Sum the results

each
Multiply
weights.
Step1:

Represent each Hex.digit by four bits Represent each Octal digit by three bits
Binary
System
Grouping each 4 bits starting from right to left Grouping each 3 bits starting from right to left
and convert then to the equivalent Hex digit and convert then to the equivalent octal digit

Convert Hexadecimal to binary then convert

binary to Octal

Hexadecimal Octal

Convert Octal to binary then convert binary to

hexadecimal

 When converting from octal to hex [or vice versa], first convert to binary; then convert
the binary into the desired number system.5. When converting from octal to hex [or vice
versa], first convert to binary; then convert the binary into the desired number system

12
First year class (IT) Evening study Logic Design

V. BINARY-CODED-DECIMAL (BCD)

 Binary coded decimal means that each decimal digit, 0 through 9, is

represented by a binary code of four bits.

 The ease of conversion between BCD code numbers and the familiar
decimal numbers is the main advantage of this code. All you have to
remember are the ten binary combinations that represent the ten decimal
digits.
 Invalid Codes You should realize that, with four bits. Sixteen numbers
(0000 through 1111) can be represented but BCD code, only ten of these
are used. The six code combinations that are not used (1010) to (1111).
 To express any decimal number in BCD, simply replace each decimal
digit with the appropriate 4-bit code.
Example: Convert each of the following decimal numbers to BCD:
(35)10 , (170)10

Solution:

H.W: Convert the decimal numbers to BCD number.

(9673 )10 , (98)10, (2469)10

Example: Convert each of the following BCD codes to decimal

(a) 10000110 (b) 001101010001 (c) 1001010001110000

Solution:

It is equally easy to determine a decimal number from a BCD code. Start

at the rightmost bit and break the code into groups of four bits. Then write
the decimal digit represented by each 4-bit group.

13
First year class (IT) Evening study Logic Design

( )10 ( )10 ( )10

14
First year class (IT) Evening study Logic Design

Logic Gates
I. General concepts
 Truth Table
1. A truth table is a means for describing how a logic circuit's output
depends on the logic levels present at the circuit's inputs. For example,
figure bellow illustrates a truth table for two-input logic circuit.

Table entry
Or
Combination

2. The truth table lists all possible combinations of logic levels present at
input A and B along with the corresponding output level X. The first
entry in the table shows that when A and B are both at the 0 level, the
output x is at the 1 level or, equivalently, in the 1 state. In a similar
way, the table shows what happen to the output state for any set of input
conditions.
3. The number of input combinations will equal 2𝑛 for an n-input truth
table.
4. The list of all possible input combinations follows the binary counting
sequence and so it is an easy matter to write down all of combinations
without missing any.

 Digital signal and Timing diagram

Digital signal is a graph of voltage (v) versus time (t). When the waveform is
HIGH, a binary 1is present; when the waveform is LOW, a binary 0 is
present. Each bit in a sequence occupies a defined time interval called
a bit time.
The horizontal time scale is marked off at regular intervals (bit time)
beginning at 𝑡0 and proceeding to𝑡1 ,𝑡2 , and so on. On the other hand vertical
axis represents logic levels (logic 1 = HIGH, logic 0 = LOW).
15
First year class (IT) Evening study Logic Design

Example: Draw the Digital signal (digital waveform) of the number

(11010)2
Solution:

Rising Edge Falling Edge

One Bit Interval

A timing diagram is a graph of digital waveforms showing the actual time

relationship of two or more waveforms and how each waveform changes in
relation to the others. By looking at a timing diagram, you can determine the
states (HIGH or LOW) of all the waveforms at any specified point in time and
the exact time that a waveform changes state relative to the other waveforms.

Figure bellow is an example of a timing diagram made up of four waveforms.

From this timing diagram you can see, for example, that the three waveforms
A, B, and C are HIGH only during bit time 7 and they all change back LOW
at the end of bit time 7 (shaded area).

16
First year class (IT) Evening study Logic Design

II. Not Gate (The Inverter)

 Standard logic symbols for the inverter are shown in following figure.

 NOT gate operation:

When the input is LOW, the output is HIGH; when the input is HIGH,
the output is LOW.

Input digital signal Output digital signal

 NOT gate Truth Table

 Time diagram of NOT gate.

The time relationship of the output digital signal to the input digital
signal in the above Figure can be shown with a simple timing diagram
by aligning the two signals so that the occurrences of the signal edges
appear in the proper time relationship. The rising edge of the input
signal and the falling edge of the output signal occur at the same time
(ideally). Similarly ,the falling edge of the input digital signal and the
rising edge of the output digital signal occur at the same time (ideally).
This timing relationship is shown in Figure bellow.

17
First year class (IT) Evening study Logic Design

H.W: A waveform (digital signal) is applied to an inverter. Determine the

output waveform corresponding to the input and show the timing diagram..

 Logic expression for an Inverter

If the input variable is called A and the output variable is called X, then

𝑋=𝐴 Boolean algebra

This expression states that the output is the complement of the input.

The OR Gate
 Standard logic symbols for OR Gate are shown in following figure:-

 OR gate operation
An OR gate produces a HIGH (logic 1) on the output when any of the inputs
is HIGH (logic 1). The output is LOW (logic zero) only when all of the inputs
are LOW (logic zero).

18
First year class (IT) Evening study Logic Design

 OR gate truth table

 Operation with Waveform Inputs

Now let's look at the operation of an OR gate with digital waveform inputs,
keeping in mind its logical operation (truth table). Again, the important thing
in the analysis of gate operation with digital waveform is the time relationship
of all the waveforms involved. For example, in Figure below, inputs A and B
are both HIGH (1) during time interval 𝑡1 making output X HIGH (1).
During time interval 𝑡2 input A is LOW (0), but because input B is HIGH (1),
the output is HIGH (1). Both inputs are LOW (0) during time interval𝑡3 , so
there is a LOW (0) output during this time. During time interval 𝑡4 , the output
is HIGH (1) because input A is HIGH (1).

19
First year class (IT) Evening study Logic Design

Example:

If the two input waveforms (Digital signals), A and B are applied to the OR
gate, what is the resulting output waveform?

H.W: Determine the output waveform and show the timing diagram if the
middle pulse of input A is replaced by a LOW level.

 logic Expressions for an OR Gate

Boolean addition is the same as the OR function. The basic rules for
Boolean addition are as follows:

Notice that Boolean addition differs from binary addition in the case where
two 1s are added. There is no carry in Boolean addition.

20
First year class (IT) Evening study Logic Design

The AND Gate

 Standard logic symbols for AND Gate are shown below:

 AND gate Operation

An AND gate produces a HIGH output only when all of the inputs are HIGH.
When any of the inputs is LOW, the output is LOW.
 AND truth table

 Operation with Waveform Inputs

Now let's look at the operation of AND gates with digital waveform inputs,
keeping in mind that an AND gate obeys the truth table. Let's examine the
waveform operation of an AND gate by looking at the inputs with respect to
each other in order to determine the output level at any given time. In Figure
bellow, inputs A and B are both HIGH (1) during the time interval, t1 making
output X HIGH (1) during this interval. During time interval t2 input A is
LOW (0) and input B is HIGH (1), so the output is LOW (0). During time
interval t 3, both inputs are HIGH (1) again, and therefore the output is HIGH
(1). During time interval t4, input A is HIGH (1) and input B is LOW (0),
resulting in a LOW (0) output. Finally, during time interval t5, input A is
LOW (0), input B is LOW (0), and the output is therefore LOW (0). As you
know, a diagram of input and output waveforms showing time relationships is
called a timing diagram.
21
First year class (IT) Evening study Logic Design

Example: If two waveforms, A and B, are applied to the AND gate inputs,
what is the resulting output waveform?

H.W: Determine the output waveform and show a timing diagram if the
second and fourth pulses in waveform A of the above example are replaced
by LOW levels.

 Logic Expressions for an AND Gate

Boolean multiplication is the same as the AND function. Boolean
multiplication follows the same basic rules governing binary multiplication.
These rules are:

22
First year class (IT) Evening study Logic Design

Exclusive-OR Gate (XOR Gate)

 Standard logic symbol for AND Gate are shown below:

 XOR operation
For an exclusive-OR gate. output X is HIGH when input A is LOW and input
B is HIGH, or when input A is HIGH and input B is LOW . X is LOW when
A and B are either HIGH or both LOW.

 XOR Truth table will be :-

 Operation with Waveform Inputs

As before, we apply the truth table operation during each distinct time interval
of the digital waveform inputs, as illustrated in Figure below for an XOR gate.
You can see that the input waveforms A and B are at opposite levels during
time intervals t 2 and t 4. Therefore, the output X is HIGH during these two
times. Since both inputs are at the same level, either both HIGH or both
LOW, during time intervals t l and t 3, the output is LOW during those times as
shown in the timing diagram.

23
First year class (IT) Evening study Logic Design

H.W: For the set of input waveforms in Figure bellow. Determine the output
for the XOR gate shown and draw the timing diagram.

 Logic Expressions for an XOR Gate

If A and B are two inputs for XOR gate and X is the output from this gate then
XOR can represent in Boolean algebra by the following by

𝑋 =𝐴⊕𝐵

24
First year class (IT) Evening study Logic Design

NOR Gate
 Standard logic symbol for 2-inputs NOR Gate is shown below:

NOR Gate NOR Gate = OR + NOT

 NOR Gate operation

A NOR gate produces a LOW output when any of its inputs is HIGH. Only
when all of its inputs are LOW is the output HIGH.
 NOR Gate truth table

 Operation with waveform inputs

The next two examples illustrate the operation of a NOR gate with digital
signal inputs (pulse waveform inputs). Again, as with the other types of gates.
We will simply follow the truth table operation to determine the output
waveforms in the proper time relationship to the inputs.
Example
If the two waveforms shown in Figure bellow are applied to a NOR gate, what
is the resulting output waveform?

25
First year class (IT) Evening study Logic Design

Solution
Whenever any input of the NOR gate is HIGH, the output is LOW as shown
by the output waveform X in the timing diagram.

Example
Show the output waveform for the 3-input NOR gate in Figure below with the
proper time relation to the inputs.

Solution
The output X is LOW when any input is HIGH as shown by the output
waveform X in the timing diagram.

26
First year class (IT) Evening study Logic Design

H.W :

1 Invert input B in the first example and determines the output waveform
in relation to the inputs.
2 With the Band C inputs inverted in the second example, determine the
output and show the timing diagram.
 Logic Expressions for a NOR Gate
The Boolean expression for the output of a 2-input NOR gate can be written
as:

This equation says that the two input variables are first ORed and then
complemented, as indicated by the bar over the OR expression.

NAND Gate
 Standard logic symbol for 2-inputs NAND Gate is shown below:

NAND Gate NAND Gate = AND + NOT

27
First year class (IT) Evening study Logic Design

 NAND Gate operation

A NAND gate produces a LOW output only when all the inputs are HIGH.
When any of the inputs is LOW, the output will be HIGH.
 NAND Gate truth table (2 input)

 Operation with Waveform Inputs

Now let's look at the pulse waveform (digital waveform) operation of a
NAND gate. Remember from the truth table that the only time a LOW output
occurs is when all of the inputs are HIGH.

Example
If the two waveforms A and B shown in Figure bellow are applied to the
NAND gate inputs, determine the resulting output waveform.

Solution
Output waveform X is LOW only during the four time intervals when both
input waveforms A and B are HIGH as shown in the timing diagram.

28
First year class (IT) Evening study Logic Design

Example
Show the output waveform for the 3-input NAND gate in Figure bellow with
its proper time relationship to the inputs.

Solution
The output waveform X is LOW only when all three input waveforms are
HIGH as shown in the timing diagram.

29
First year class (IT) Evening study Logic Design

H.W.
1 Determine the output waveform and show the timing diagram if input
waveform B is inverted in the first example.
2 Determine the output waveform and show the timing diagram if input
waveform A is inverted for the second example.

 Logic Expressions for a NAND Gate

Logic Expressions for a NAND Gate

This expression says that the two input variables. A and B, are first ANDed
and then complemented, as indicated by the bar over the AND expression.

EXCLUSIVE-NOR GATE (XNOR)

 Standard logic symbol for 2-inputs XNOR Gate is shown below:

30
First year class (IT) Evening study Logic Design

 XNOR Gate operation

For an exclusive-NOR gate, output X is LOW when input A is LOW and
input B is HIGH, or when A is HIGH and B is LOW; X is HIGH when A
and B are both HIGH or both LOW.
 XNOR truth table

 Operation with Waveform Inputs

Example
Determine the output waveforms for the XOR gate and for the XNOR gate,
given the input waveforms, A and B, in Figure bellow.

Solution
The output waveforms are shown in Figure. Notice that the XOR output is
HIGH only when both inputs are at opposite levels. Notice that the XNOR
output is HIGH only when both inputs are the same.

31
First year class (IT) Evening study Logic Design

H.W

Determine the output waveforms if the two input waveforms, A and B, in

the above example are inverted.

 Logic Expressions for a NAND Gate

Logic Expressions for a XNOR Gate

32
First year class (IT) Evening study Logic Design

Logic Gates Boolean Expression Summery

1- AND gate

𝑿 = 𝑨. 𝑩

2- NAND gate

𝑿 = ̅̅̅̅̅
𝑨. 𝑩

3- OR gate

𝑿=A+B

4- NOR gate

𝑿 = ̅̅̅̅̅̅̅̅
𝑨+𝑩

5- XOR Gate

𝑿 = 𝑨⨁𝑩

33
First year class (IT) Evening study Logic Design

6- XNOR Gate

̅̅̅̅̅̅̅
𝑿 = 𝑨⨁𝑩

7- NOT Gate

̅
𝑿=𝑨

Describing Logic Circuits Algebraically

 OR gate, AND gate, XOR gate and NOT gate are the basic building blocks of
digital systems.
 We can easily determine the expression for the output X by utilizing the
Boolean expression for each gate. As it explained in the following examples

𝑿 = 𝑨. 𝑩 + 𝑪

𝑿 = (𝑨 + 𝑩). 𝑪

34
First year class (IT) Evening study Logic Design

Example: Write the expression of the output X to the following circuits

H.W
1. In the first figure above change each AND gate to an OR gate, and change
the OR gate to an AND gate. Then write the expression for output X.
2. In the second figure above change each AND gate to an OR gate, and each
OR gate to AND gate. Then write the expression for x.

Determining Output Level from a Diagram

 The output logic level for given input levels can be determined
directly from the circuit diagram

Example: Determine the output from the following circuit if input

variables are
A=0, B=1, C=1, and D=1

35
First year class (IT) Evening study Logic Design

Example: Determine the output from the following circuit if input

variables are
A=1, B=1, C=0

36