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Pradeep
Karra
Masters in VLSI System Design with over 8 years of industrial experience in IC Layout Design. IC Layout Engineer
Sound knowledge in CMOS,FinFET Analog and SRAM Memory Layout design and verification. Lingaraju Complex,2nd floor, Gandhibazar,
Good problem solving, communication and organizational skills. Bangalore,India.
kpradeep.vlsi@gmail.com
Seeking a challenging position in which my expertise and experience can be effectively utilized. Mobile :+918520822880.
EDUCATION ...continued
Senior Technical Analyst
M.Tech in VLSI System Design UST Global Sdn Bhd,Bayan Lepas,Malaysia
JNTU,Hyderabad,Andhra Pradesh May 2018 - June 2019
2007-2013
Worked on Analog layouts for buffers,Vref,Comparator functional blocks.
Hands on experience in Intel 10nm Finfet technology.
B.Tech with Electronics and ECO implementation,metal replanning,complete PV clean up.
Communications Engineering EM,IR,DFM,LUP,Antenna.
JNTU,Hyderabad,Andhra Pradesh Lead a team of five members ,resource planning,on time completion of tasks.
2000-2004 Review meetings with US team.
TOOLS : Cadence Virtuoso, Synopsys IC Validator, Cadence Voltus-Fi.
EM,IR
AMS Layout Engineer
ECO implementation
Synopsys India Pvt Ltd,Hyderabad,India
Extraction and SPEF delivery June 2013 – October 2016
IC Layout Engineer
Pradeep Lingaraju Complex,2nd floor, Gandhibazar,
Bangalore,India.
Karra kpradeep.vlsi@gmail.com
Mobile :+918520822880.
Curious to learn
IC Layout Engineer
Solitaire Softech Pvt Ltd,Pune,India
August 2010 – May 2013
Project Reward
Assistant Professor
2015
Newtons Engineering College,Guntur,India 2006 - 2007
A cash bonus was awarded for good
SRR Engineering College,Khammam,India 2005 - 2006
contribution and successful completion of
10nm memory compiler.
Started working as Assistant professor in ECE dept in Engineering College.
Handled multiple engineering subjects and relevant practical laboratories.
Conducted internal examinations and awarded marks.
English
Proficient (IELTS 6.5)
Hindi
Intermediate