SREE SOWDAMBIKA COLLEGE OF ENGINEERING

Chettikurichi, Aruppukottai
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING
INTERNAL TEST - I
Course Name & Code : EC8351 EC-I Date: Branch/Year/Semester:ECE/II/III
Time: 09.15AM – 10.45 AM Course Instructor Name & Department: Mrs.P.STELLA MARY, AP/ECE
Part A 7 X 2 = 14 marks
1) What is DC operating point / Quiescent / Q point? R,CO1
2) How BJT is used as a switch? U,CO1
3) What is the difference between n-channel and p-channel enhancement type of MOSFET? A,CO1
4) Find CMRR of differential amplifier with differential gain of 300 and common mode gain Az,CO2
of 0.2.
5) How are amplifiers classified according to the input? C,CO2
6) State Miller’s theorem. R,CO1
7) Draw a cascade amplifier and its equivalent circuit. E,CO2
Part B 1X8 = 8 marks and 1X13=13 marks
8)a) Write in detail about diode bias compensation techniques. U,CO1
OR
b) Explain the biasing methods of enhancement type MOSFET. U,CO1
9)a) Draw the a.c equivalent of a CE amplifier with voltage divider bias and derive the A,CO2
OR
expression for current gain, voltage gain , input impedance and output impedance and
overall current gain.
b) Analyze a basic common base amplifier circuit and derive the expressions for its small A,CO2
signal voltage gain, current gain, input impedance and output impedance
Part C ( 1 X 15 = 15 marks)
OR
10)a) Derive expressions for operating point in a voltage divider biased BJT and calculate the E,CO1
same for the data given: vcc=10V,R1=10KΩ, R2=5KΩ, RC=1KΩ, RE=500Ω,β=100.

b) Derive expressions for voltage divider biasing for JFET. Design a JFET circuit with voltage divider E,CO1
bias for the following parameters.I DSS=8mA , VP=-4V.Assume R1+R2 =200KΩ ,RS=500Ω,ID=4Ma
and VDS=5V.

Faculty Member HoD/ECE

Course Instructor SREE SOWDAMBIKA COLLEGE OF ENGINEERING HoD-CSE

Chettikurichi,
Note : Either or Questions are Covered with SameAruppukottai
CO & Same Blooms Taxonomy Level
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING
INTERNAL TEST - I

Course Name & Code : EC8351 EC-I Date: Branch/Year/Semester:ECE/II/III

Time: 09.15AM – 10.45 AM Course Instructor Name & Department: Mrs.P.STELLA MARY, AP/ECE
Part A 7 X 2 = 14 marks
1) What is DC operating point / Quiescent / Q point? R,CO1
2) How BJT is used as a switch? U,CO1
3) What is the difference between n-channel and p-channel enhancement type of MOSFET? A,CO1
4) Find CMRR of differential amplifier with differential gain of 300 and common mode gain of Az,CO2
0.2.
5) How are amplifiers classified according to the input? U,CO2
6) State Miller’s theorem. R,CO1
7) Draw a cascade amplifier and its equivalent circuit. C,CO2
Part B 1X8 = 8 marks and 1X13=13 marks
8)a) Write in detail about diode bias compensation techniques. U,CO1
OR
1
 b) Explain the biasing methods of enhancement type MOSFET. U,CO1
9)a) Draw the a.c equivalent of a CE amplifier with voltage divider bias and derive the expression A,CO2
OR
for current gain, voltage gain , input impedance and output impedance and overall current
gain.
b) Analyze a basic common base amplifier circuit and derive the expressions for its small signal A,CO2
voltage gain, current gain, input impedance and output impedance
Part C ( 1 X 15 = 15 marks)
10)a) Derive expressions for operating point in a voltage divider biased BJT and calculate the same E,CO1
OR
for the data given: vcc=10V,R1=10KΩ, R2=5KΩ, RC=1KΩ, RE=500Ω,β=100.

b) Derive expressions for voltage divider biasing for JFET. Design a JFET circuit with voltage divider E,CO1
bias for the following parameters.I DSS=8mA , VP=-4V.Assume R1+R2 =200KΩ ,RS=500Ω,ID=4Ma and
VDS=5V.

Faculty Member HoD/ECE

CO No. Remember Understand Apply Analyze Evaluate Create Total

(R) (U) (A) (Az) (E) (C)

1 4 10 2 15 31

2 2 13 2 2 19

Total 4 12 15 2 15 2 50
Maximum 20%
Minimum 40%
Maximum 60%

Note : Part B and CEither or Questions are Covered with Same CO & Same Blooms Taxonomy Level

2
 Blooms Taxonomy Level

Remember R Maximum 20% R<=10 marks

Remember R+ Understand U Maximum 60% R+U<=30 marks

Apply A+ Analyze Az+ Minimum 40% A+Az+E+C>=20marks

Evaluate E+ Create C