A Short Guide to Written Exam 1 Computer Architecture

Computer Architecture

Very Very Important Questons

1. Write down the Computer architecture characteristics. Write down the stage of
DLX pipelines. [BB(AME)-2019]
2. Write down four common rules of Assembaly language .Different type of hazard
[Officer(IT/ICT)-2019]
3. Given an instruction in an8086 based Assembly language program, Mov BL,AL.
Now convert this assembly language instruction in to the machine code in HEX.
[Uttara Bank(AP)-2019]
4. Computer A has 3.2 GHz processing Speed and it has 2.0 clock speed in a
program, and at the same program Computer B has 2.4 GHz processing Speed
with 1.2 clock speed. Which computer will run faster and how much faster. [Desco-
2019]
5. Describe addressing mode of 8086 microprocessor. [BB-AME-2017]
6. Explain the functions of ALU & Control Unit of a computer. [Multi. Ministry-2017]
7. Explain URL, FTP, ASCII& BIOS. [Multi. Ministry-2017]
8. How many subnets and hosts per subnet can you get from the network
172.20.0.0/27? [BB-AME-2017]
9. Difference between microprocessor and micro-controller. [Multi. Ministry-2017]
10. “Pentium processor has a superscalar architecture.” Explain the meaning of the
statement. [Multi. Ministry-2017]

1. What is computer Architecture? Whare are the feature of computer Architecture?

Computer architecture is a specification detailing how a set of software and hardware technology
standards interact to form a computer system or platform. In short, computer architecture refers to
how a computer system is designed and what technologies it is compatible with.

Feature of computer Architecture: Computer architecture consists of an Instruction set,

Memory, Arithmetic and logic units (ALUs), and a control unit.

The Instruction set defines what operations you can make on data. The machine consists of
binary encodings of instructions from this set and are located in memory. The control unit reads
instructions from memory, decodes them and instructs the ALUs to perform the operation (which
may involve more memory accesses to load and/or store data). Then the control unit decides
which is the next instruction to fetch (in most cases the next instruction in sequence after the
current).
A Short Guide to Written Exam 2 Computer
uter Architecture
A
Note that the control unit used
sed to be a central unit a long time ago, but now the control
contro is typically
distributed in the processor for pi
pipelined implementations.
So mainly Computer system m has five basic units that help the computer to perform
orm operations,
op
which are given below:
1. Input Unit
2. Output Unit
3. Storage Unit
4. Arithmetic Logic Unit
5. Control Unit

2. Show the block diagram

am of computer Architecture?

3. Show the diagram of adder

adder, instruction memory,ALU.

4. What are the function of AL

ALU and control unit of a computer?
A Short Guide to Written Exam 3 Computer Architecture
ALU or Arithmetic Logic Unit is responsible to perform the operation in the computer. The
basic operations are implemented in hardware level. ALU is having collection of two types of
operations:

1. Arithmetic operations
2. Logic operations

Consider an ALU having 4 arithmetic operations and 4 logical operation. To identify any one of
these four logical operations or four arithmetic operations, two control lines are needed. Also to
identify the any one of these two groups- arithmetic or logical, another control line is needed. So,
with the help of three control lines, any one of these eight operations can be identified.

A CU or control unit is circuitry that directs operations within a computer's processor. It lets the
computer's logic unit, memory, as well as both input and output devices know how to respond to
instructions received from a program. Examples of devices that utilize control units include CPUs
and GPUs.

5. What is program counter?

A program counter is a register in a computer processor that contains the address (location) of the
instruction being executed at the current time. As each instruction gets fetched, the program
counter increases its stored value by 1. After each instruction is fetched, the program counter
points to the next instruction in the sequence. When the computer restarts or is reset, the program
counter normally reverts to 0.

6. Write down four common rules of Assembaly language

a. In assembly language the label field can be either empty or may specify a symbolic address.
b. Instruction fields can specify pseudo or machine instructions.
c. Comment fields can be left empty or can be commented with.
d. Up to 4 characters are only allowed in the case of symbolic addresses.
e. The symbolic addresses field are terminated by a comma whereas the comment field begins
with a forward slash.

7. Explain the components of the Ven Neumann architecture.

The main components of the Ven Nuemann architecture were as follows:

a. It consisted of a main memory which would be used to store all the data and instructions.
b. It would consist of an arithmetic logical unit also known as the ALU. This part was to be able
to work with binary data.
c. It also comprised of a control unit which would be responsible for the interpretation of
instructions and their execution.
d. The control unit would also be controlled by the control unit itself.
A Short Guide to Written Exam 4 Computer Architecture

8. What are the different types of fields that are part of an instruction. Explain.

An instruction can be considered to be a command that has been issued to a computer to perform
a particular operation. The instruction format contains various field in them such as:

a. Operation Code Field: Also known as the op code field, this field is used to specify the
operation to be performed for the instruction.

b. Address Field: This field as its name specifies is used to designate the various addresses such
as register address and memory address.
c. Mode field: This field specifies as to how effective address is derives or how an operand is to
perform.
For ex. ADD R0, R1. In this case the ADD is the operand whereas the R1, ans R0 are the address
fields.

9. What are the different types of mappings used in cache memory.

The three different types of mapping used for the purpose of cache memory are as follow,
Associative mapping, Direct mapping and Set-Associative mapping.
a. Associative mapping: In this type of mapping the associative memory is used to store content
and addresses both of the memory word. This enables the placement of the any word at any place
A Short Guide to Written Exam 5 Computer Architecture
in the cache memory. It is considered to be the fastest and the most flexible mapping form.
b. Direct mapping: In direct mapping the RAM is made use of to store data and some is stored in
the cache. An address space is split into two parts index field and tag field. The cache is used to
store the tag field whereas the rest is stored in the main memory. Direct mapping`s performance
is directly proportional to the Hit ratio.
c. Set-associative mapping: This form of mapping is a modified form of the direct mapping where
the disadvantage of direct mapping is removed. Set-associative mapping allows that each word
that is present in the cache can have two or more words in the main memory for the same index
address.

10. What is pipelining? Describe all pipeline hazards?

Pipelining
Pipelining an implementation technique in which multiple instructions are overlapped in
execution, much like an assembly line.

MIPS instructions classically take five steps when pipeline instruction execution.

1. Fetch instruction from memory.

2. Read registers while decoding the instruction. The regular format of MIPS
Instructions allow reading and decoding to occur simultaneously.
3. Execute the operation or calculate an address.
4. Access an operand in data memory.
5. Write the result into a register.

Let us see a real life example that works on the concept of pipelined operation. Consider a water
bottle packaging plant. Let there be 3 stages that a bottle should pass through, Inserting the
bottle(I), Filling water in the bottle(F), and Sealing the bottle(S). Let us consider these stages as
stage 1, stage 2 and stage 3 respectively. Let each stage take 1 minute to complete its operation.
Now, in a non pipelined operation, a bottle is first inserted in the plant, after 1 minute it is moved
to stage 2 where water is filled. Now, in stage 1 nothing is happening. Similarly, when the bottle
moves to stage 3, both stage 1 and stage 2 are idle. But in pipelined operation, when the bottle is
in stage 2, another bottle can be loaded at stage 1. Similarly, when the bottle is in stage 3, there
can be one bottle each in stage 1 and stage 2. So, after each minute, we get a new bottle at the end
of stage 3. Hence, the average time taken to manufacture 1 bottle is :

Without pipelining = 9/3 minutes = 3m

IFS||||||
|||IFS|||
| | | | | | I F S (9 minutes)
With pipelining = 5/3 minutes = 1.67m
IFS||
A Short Guide to Written Exam 6 Computer Architecture
|IFS|
| | I F S (5 minutes)
Thus, pipelined operation increases the efficiency of a system.

Pipeline Hazards
There are situations in pipelining when the next instruction cannot execute in the following clock
cycle. These events are called hazards, and there are three different types.
 Structural Hazards
 Data Hazards
 Control Hazards
Structural Hazards
The first hazard is called a structural hazard. It means that the hardware cannot support the
combination of instructions that we want to execute in the same clock cycle. A structural hazard
in the laundry room would occur if we used a washerdryer combination instead of a separate
washer and dryer or if our roommate was busy doing something else and wouldn't put clothes
away. Our carefully scheduled pipeline plans would then be foiled.

As we said above, the MIPS instruction set was designed to be pipelined, making it fairly easy for
designers to avoid structural hazards when designing a pipeline. Suppose, however, that we had a
single memory instead of two memories. If the pipeline had a fourth instruction, we would see
that in the same clock cycle the first instruction is accessing data from memory while the fourth
instruction is fetching an instruction from that same memory. Without two memories, our
pipeline could have a structural hazard. So, in single word structural hazard when a planned
instruction cannot execute in the proper clock cycle because the hardware does not support
the combination of instructions that are set to execute.

Data Hazards
Data hazards occur when the pipeline must be stalled because one step must wait for another to
complete. In a computer pipeline, data hazards arise from the dependence of one instruction on an
earlier one that is still in the pipeline. For example, suppose we have an add instruction followed
immediately by a subtract instruction that uses the sum ($s0):
add $s0, $t0, Stl
sub $12 , SsO , St3
Without intervention, a data hazard could severely stall the pipeline. The add instruction doesn't
write its result until the fifth stage, meaning that we would have to waste three clock cycles in the
pipeline. So, in single word data hazard also called a pipeline data hazard when a planned
instruction cannot execute in the proper clock cycle because data that is needed to execute the
instruction is not yet available.
Solve: forwarding Also called bypassing. A method of resolving a data hazard by retrieving the
missing data element from internal buffers rather than waiting for it to arrive from
programmervisible registers or memory.

Control Hazards
A Short Guide to Written Exam 7 Computer Architecture
The third type of hazard is called a control hazard, arising from the need to make a
Decision based on the results of one instruction while others are executing.
Control hazard also called branch hazard. When the proper instruction cannot execute in the
proper pipeline clock cycle because the instruction that was fetched is not the one that is needed;
that is, the flow of instruction addresses is not what the pipeline expected.