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ELECTRONICS &
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COMPUTER ORGANIZATION & ARCHITECTURE
Study Material with Classroom Practice Questions
Processor
Common Bus ( address, Data & Control )

Control Unit
Datapath
Arithmetic
Logic Unit
Memory
Output Input
Registers Program Data Units Units
Storage Storage
1

Chapter Computer Arithmetic

(Solutions for Text Book Practice Questions)
Objective Practice Solutions Conventional Practice Solutions
01. Ans: (a) 01.

Sol: E = e + Bias Sol:
S E M value
03. Ans: (a) 1 8 23
Sol: X = –14.25, S =1, e = original exponent 0 / 1 000000000 000...0 0
E = biased Exponent, E0 M0
b = biasing amount 0 /1 11111111 000....0 
14.25 = 1110.01  2 0 E  255 M0
= 1.11001  2 3
e = 3, E = 3 + 127
S E M Value
= 130  0/1 E  0 & E  255 xxx Implicit number
130 = 10000010 M = 1100100…0 (23 bits) 1 E  254
0/1 E=0 M 0 Fractional number
0/1 E = 255 M0 NAN
32 bits
(Not A Number)
1100 0001 0110 0100 00........0

S=1 E=8 M = 23 bits
C 1 6 4 00......
C1640000H
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Memory Organization
Chapter
2
& Secondary Memory
Objective Practice Solutions Data transfer 512 sectors

2MB 2 21
01. Ans: (c)  12  29
4KB 2
Sol: T = 200 ns Tfile = Tseek time+Trotational latency+ Data Transfer time
 word frequency (512 + 12) sectors are to be covered
1
= 9
 5  106 words / sec 20 ms  2048 sectors
200  10
?  524 sectors
Sectors requires = 5.117 ms
02. Ans:
Tfile = 10 ms + 5.117 ms = 15.117 ms
Sol: (a) Capacity = T  S B
= 512 20484096 B
03. Ans: (a)
= 29 211 212 B
= 232 B = 4 GB Sol: ROM is used for function table with large
(b) Data Transfer rate size because after program; ROM content is
1- Revolution disk covers = 211. 212 not possible to destroy and design cost is
cheap.
= 8 MB
Disk speed 3000 rpm
04. Ans: (d)
= 3000 revolutions in one minute
One minute = 60 sec = 60 1000ms Sol: Cache memory - A special very high speed
= 60,000 ms memory called a cache is sometimes used to
increase the speed of processing by making
3000 revolutions  60,000 ms
current programs and data available to the
1 revolution ? CPU at a rapid rate. The cache memory is
60000m employed in computer systems to
=  20 ms
3000 compensate for the speed deferential
20 ms  8 MB between main memory access time and
1000 ms ? processor Logic.
8000 M  m
=  400 MB
20 m 05. Ans: (c)
Data Transfer rate = 400 MB /Sec Sol: The use of a cache in a computer system
= 400 MBPS increases the Average speed of memory
(c) Seek time access.
3 B
08. Ans: (b)
4 Rotational latency Sol: Average Latency time= ½ rotation time
Data transfer = 16 -4 = 12 sector
512 sector Speed = 7200 rpm  120 rps
4KB For 1 rotation = 1/120 = 8.33ms
16
For ½ rotation = 4.166 ms
2MB

4 Computer Organization
09. Ans: (a) 13. Ans: (a)

Sol: LIFO: Last In First Out Sol: Access time = Seek time + Average rotation
delay
1 rotation time = 33.3 ms
10. Ans: (d)
 Average rotation time = 16.7 ms
Sol: Hit ratio is defined as the number of hits Total access time = 46.7  47 ms
divided by the total number of CPU
references to the memory (hits plus misses)
14. Ans: (c)
Tavg = H C + (1  H)M Sol: Cache memory is used to improve the
overall system performance.
Where H = hit ratio of cache memory
C = time to access information in cache
memory 15. Ans: (a)
Sol: Word size = 16-bit
M = Miss penalty
= main memory access time Access time = 80-ns
+ cache memory access time. No of bytes to be transferred = 1024-B
= 512 Words.
11. Ans: (c)
Total time = 512 × 80ns 96µs
Sol: DRAM access much slower than
SRAM = 40.96 µs
 More bits  longer wires
 Buffered access with two level addressing 16. Ans: (c)
 SRAM access latency : 2 - 3 ns Sol: 212 × 8 = 4096 × 8
 DRAM access latency: 20 - 35 ns = 32768.
 Static RAM -10 ns
 Hard disk for personal computers boast 17. Ans: (c)
access times of about a to 15ms Sol: Remain same because it is non-volatile
 200 times slower than average DRAM. memory.
12. Ans: (d) 18. Ans: (d)

Sol: Cache size = 4 K word Sol: Hit Rate = 80%
One set has 4 blocks
Total number of blocks TCM = 10ns, TMM = 100ns
 Number of sets 
4 TAvg = HTCM + (1–H)TMM
6
Number of words = 2 = (0.810ns) + 0.2100ns
W = 6
4K 212 = 8ns + 20ns
Number of cache blocks   6  26
64 2 = 28 ns
6
2
Number of cache sets   16  2 4
4
S=4

5 Postal Coaching Solutions
Conventional Practice Solutions  If again there is a miss in L2 cache memory;

then immediately a block is transferred from
01. main memory to L2 cache and then L2 cache
Sol:
to L1 cache
Buses
CPU
L1 L2 Main Performance of the cache memory is
cache cache memory
memory memory measured in terms of Hit rate
Number of Hits given in the cache
Hit Rate 
 Always L1 is the fastest memory and L2 is Total number of memory visits by CPU
slower memory  More Hit Rate gives more performance
 While executing a program, the CPU tries to  When the searched word is available in
read the instruction from L1 cache first; if searched memory, then operation is Hit,
the searched word is available then otherwise miss.
operation is Hit, otherwise operation is miss.
 If there is Hit in 2nd level memory then a
block is transferred from L2 cache to L1
cache and then a word is transferred from L1
cache to CPU.

3 Pipeline Organization

Chapter

02. Ans: (b) 01.
Sol: First task will be completed after n clocks Sol: Speed Up:
(because there are n segments) and the
remaining m-1 tasks are shipped out at the The Speed Up of a pipeline processing over
rate of one task per pipeline clock. an equivalent non pipeline processing is
Therefore, n + (n1) clock periods are
defined by the ratio
required to complete m tasks using an
n-segment pipeline. If all m tasks are time without pipeline n tn
S 
executed without any overlap, mn clock time with pipeline K  n  1 t p
periods are needed because each task has to
pass through all n segments. Thus speed Where ‘tn’ is the time taken to complete an
gained by an n segment pipeline can be
instruction without pipeline.
shown as follows:
Speed up P(n) = ‘tp’ is the time taken for a stage, which is
number of clocks required when there is no overlap maximum of all stages.
number of clocks required when tasks are overlapped in time
Speed Up factor can also given by
mn
= Pipeline depth
n  m 1 S
1  Pipeline stall cycles / instruction
03. Ans: (c)
For ideal case,
Sol: Max. stage delay = 160 s
Buffer delay = 5 s Pipeline stall cycles / instruction is zero.
Pipeline clock = 165 s S = Pipeline depth = number of stages
T1000 = (K + n – 1) Tp clock
 165 495 
= (4+999) * 165 =   s
 1000 
= 165.5 s
04. Ans: (b)

Sol: For D1 processor, maximum Tseg = 4 ns,
n = 100, k = 5
Time = 104  4 ns = 416 ns
For D2 processor,
n = 100, k = 8, Tseg = 2 ns
Time = 107  2 ns = 214 ns
Hence, 202 ns time will be saved

4 I/O Organization

Chapter
05. Ans: (b)

Objective Practice Solutions Sol: An I/O processor controls the flow of
information between main memory and I/O
devices. It is the extension of concept of
01. Ans: (b)
DMA.
Sol: External interrupts comes from input-output
devices, from a timing device, from a circuit 06. Ans: (b)
monitoring the power supply or internal Sol: For vectored hardware interrupt, the
from other external source. interrupting device supplies the respective
Example: I/O devices requesting transfer of address with additional hardware.
data
07. Ans: (a)
 A DMA controller manages the data Sol: In a microprocessor based system, isolated
transfer I/O method is similar to “I/O mapped I/O”
 A DMA controller can be implemented where the memory and I/O devices are
as separated controller from the provided with separate address space and
processor or integrated controller in the address decoders.
processor.
 Based on the request length, the DMA 08. Ans: (b)
controller optimizes transfer Sol: Internal interrupts in a microprocessor
performance between source and based system are initiated by error
destination with different external data conditions (Ex. Divide by zero overflow
by widths conditions). External interrupts are
produced by external hardware which may
occur at any point of time.
02. Ans: (d)
Sol: The DMA is the most suitable for Hard
disk. Conventional Practice Solutions
03. Ans: (b) 01.

Sol: On receiving an interrupt from an I/O Sol: Cycle Stealing Mode:
device, the CPU branches off to the An alternative technique called cycle
interrupt service routine after completion of stealing allows the DMA controller to
the current instruction. transfer one data word at a time, after which
it must return control of the buses to the
04. Ans: (c) CPU. The CPU merely delays its operation
Sol: In microprocessor based systems DMA
facility is required to increase the speed of for one memory cycle to allow the direct
data transfer between memory and the I/O memory I/O transfer to “steal” one memory
devices. cycle.

5

Chapter Instruction Set

& Addressing Modes
01. Ans: (a) 01.

Sol: (a) MAR: It is a memory address register
Sol: 1. Direct y = z[I] that holds the Address of the memory
2. Immediate x=5 Register
3. Index x=z+m  In Basic processor, it is connected to the
address Bus and it’s size is equal to the
4. Auto k = c+ +
address Bus size
 p places the memory address in this
02. Ans: (c) register while performing memory read
Sol: Register indirect addressing lets you and memory write operation.
generate lots of different addresses when a  During instruction fetch; MAR is used to
program is executed. Address register hold program address and during data
indirect addressing is so called because it read or Data write operations MAR holds
uses an address register to point at the the Data memory Register Address.
location of the operand in memory; that is,
(b) MDR: It is used to hold the content of
the address of an operand is obtained
the memory Register while performing
indirectly via an address register. Instead of
Read/write operation from memory
telling the computer where the operand is,
 It is connected to Data Bus.
you tell it where the address of the operand
 It’s size is equal to the Data bus size
can be found. while fetching the instruction, initially
opcode of the instruction is placed in
03. Ans: (c) MDR
Sol: Relative Addressing mode: Relative
(c) PC: It is program counter that holds the
Addressing mode is used in intra segment
address of the next instruction to be
branching.
fetched; It’s size is equal to the address
Effective Address = Program Counter + bus size of the processor. After fetching
Displacement an instruction, PC content is
Relative Base Addressing Mode: Effective automatically incremented to point the
Address = PC + BR + displacement . Where address of the next instruction to be
PC stands for program counter and BR fetched.
stands for base register.
“The code is dependent means the option is (d) IR: It is an instruction Register that
direct addressing mode”. holds the opcode of the instruction after
it’s fetching
04. Ans: (b) After fetching an instruction, opcode
Sol: Base register addressing mode is used to will be placed in IR (from MDR). later it
relocate the program from one segment to sends to control Register for completing
other segment. it’s Decode and execution.
Size of the IR equal to the MDR size

6 C Language

Chapter
Objective Practice Solutions 09. Ans: (b)

Sol: Except option (b) remaining all expressions
having different precedence levels but in
01. Ans: (a) option (b) ‘*’, ‘/’ operators are having same
Sol: A program that translates a high-level precedence levels, so for evaluation we
language program into a object module is need associativity. Here associativity is ‘left
called a complier. to right’.
02. Ans: (b) 10. Ans: (a)

Sol: double is used to define BIG floating point Sol: Option (b), (c), (d) are logical operators.
numbers. It reserves twice the storage for Where as option (a) is a statement.
the number.
11. Ans: (a)
03. Ans: (a) Sol: Option (b), (c), (d) are relational operators
Sol: Characters are assigned variables by using which compare the two variables and gives
single quotes, where strings we use double result in the form of boolean data type i.e.
quotes. true (or) false.
Where as option (a) is assignment operators
04. Ans: (c) which assign the value to variable.
Sol: #define SALES_TAX_RATE 0.0825 is a
valid constant 12. Ans: (d)
Sol: The complement of equal (= =) operator is
05. Ans: (c) not equal (! = )
Sol: printf (“%d%c%f”, 23, ‘z’, 4.1);
13. Ans: (b)
07. Ans: (b) Sol: for, while and do……while are looping
Sol: The value of x is decremented by one after constructs but switch case is a statement.
the print statement.
14. Ans: (c)
08. Ans: (c) Sol: Before entering into the loop while checks
Sol: Left side of assignment operator allows the condition i.e., while is pre-test loop,
only one variable, not a expression where ‘do-while’ is post test loop.
In option (b) the meaning of
a * = b gives a = a * b 15. Ans: (a)
Sol: The address of (&) operator is used to
In option (d) b = 0 is first evaluate the result extract the address for a variable.
is assign to ‘a’ because ‘=’ operator is right
16. Ans: (c)
to left associativity.
Sol: The syntax int *p; is used to declare a
Finally option (c) is invalid pointer variable to an integer.

17. Ans: (c) Conventional Practice Solutions

Sol: For creating a pointer we use ‘*’ and
address of variable we use ‘&’. 01.
Sol: Program to find biggest of ‘n’ integers.
18. Ans: (c)
Sol: We can increment the pointer value and (Input the numbers continuously until the
comparing but we can’t divide prt + 5 is the user requests to stop.)
pointes value 5 elements away. ++ ptr pre- #include<stdio.h>
increment of pointer & that points to next void main()
address.
{
19. Ans: (b) int n, b = 0;
Sol: A variable length string can be controlled do /* start of do-while loop*/
by a length or a delimiter. The C language {
uses a null to terminate variable length printf(“\n enter a number:”);
strings.
scanf(“%d”, &n);
20. Ans: (c) if(b ==0)
Sol: The statement employee.name is used to /* if this is 1st number */
declare the name of the employee. b=n;
/* consider it as biggest */
21. Ans: (b)
else
Sol: for loop iterate 10 times because every time
‘i’ value getting to double, means ‘i’ /* from 2nd number onwards */
initially 1, then 2, 4, 8, 16, 32, 64, 128, 256, if(n>b)
512 finally 1024 give false value to for /* if the number is bigger than biggest*/
loop. So total 10 times of iteration. b=n;
22. Ans: (c) /*then only consider it as biggest */
Sol: For every ‘i’ value ‘j’ loop iterates 10 times printf(“\n Do you want to enter another
and ‘i’ will iterate 10 times, So number (Y/N)?”);
10 × 10 = 100 iterations possible.
} while (getchar () = = ‘Y’);
23. Ans: (b) /* get choice & repeat if YES */
Sol: Both statements are the definitions of break printf(“The biggest number is %d\n”,
and continue respectively. b);
}/* end of main */
24. Ans: (b)
In the above program, the loop is used to
Sol: Loop: In computer programming, a loop is
a sequence of instructions that is accept numbers continuously until the user
continually repeated until a certain says NO (choice other than ‘Y’). We know
condition is reached. that asking the choice for next number
should be done only after taking a number.
Therefore, in this situation the do-while loop
is more suitable than the while loop.

02. to ‘c’. Whereas, while jumping into printf( )

Sol: Function is a sub-program as it also stored function, the string constant “the result =
separately in the memory and executed %d” & ‘c’ are passed as input, later printf
wherever it is called. Here main( ) is treated prints this input on the screen. It won’t
as a boss function and other functions are return any value, because its job is simply
subordinates to main( ). The main function printing message on screen.
is called by operating system, which is
indirectly by the user. 03.
Sol: Expressions
Let us see the following example
An expression is a systematic combination
#include<stdio.h>
of operands and operators to specify certain
#include<math.h> calculations. However, any single constant,
void main ( ) variable, or any valued single item is also
{ int a,b,c; called expression.
a = 3; b = 5; C language allows us to use complex
c = pow (b, a); expressions, where such expressions should
printf (“the result = %d”, c); be cared, otherwise it lead to logical errors.
} Let us see, how expression should be typed
The execution of functions (jumping & in language syntax.
returning) is as follows. (this pow & printf
are library functions they attached at For example:
compile time from C-software (*.lib) files.)
1. ax3 + bx2 + cx + d
#include<stdio.h> pow( ) Ans: a * x * x * x + b * x * x + c * x + d
#include<math.h> {
void main() --------
{ --------  b  b 2  4ac
int a,b,c; -------- 2.
a=3; } 2a
b=5; Ans: (–b + sqrt (b*b–4*a*c)) / (2*c)
c=pow(b,a);
Here sqrt () is a function, finds square
printf(“the result=%d”,c); Printf( ) root of given value.
} {
--------
--------
--------
ax 45  6 x 5
3.
} cx  7
Ans: (a*pow (x, 45) + 6*pow (x, 5)) / (c*x +5)
While jumping control to pow( ) function,
the values b&a are passed as input, later
returns calculated power value and assigned

7 Basics of Operating Systems

Chapter
Objective Practice Solutions 08. Ans: (c)

Sol: Processes are generally swapped out from
memory to Disk when they are decided to be
01. Ans: (a)
suspended.
Sol: Multi programming by definition is ability of
OS to manage multiple ready to run program 09. Ans: (b)
in memory. Remaining all other options are Sol: Suppose a Processor does not have any
not correct/ Invalid. Stack Pointer Register It can have
subroutine call instruction, but no nested
02. Ans: (d) subroutine calls.
Sol: Programmers can access OS resources
10. Ans: (d)
through system call routines.. Sol: When an Interrupt occurs, an Operating
System May change state of interrupted
03. Ans: (d) process to ‘blocked’ and schedule another
Sol: Presence of multiple CPU’s is multiprocessor process.
OS, where as multiprogramming can be
possible with only one CPU.
04. Ans: (d)

Sol: Interrupts are used for Invoking system calls,
Indicating complication of I/O, Sometimes
pre-empting running process from CPU.
05. Ans: (c)

Sol: A processor in the context of computing a
piece of hardware that executes a set of
instructions.
06. Ans: (d)
Sol: The basic goal of multiprogramming is to
keep the devices along with the CPU busy.
07. Ans: (b)

Sol: Zombie implies the process entry still exists
in the process table maintained by OS.

Conventional Practice Solutions 02.

Sol: An operating system is the most important
software that runs on a computer. It manages
the computer's memory and processes, as
01.
well as all of its software and hardware. It
Sol: An Operating System (OS) is an interface
also allows you to communicate with the
between a computer user and computer
computer without knowing how to speak the
hardware. An operating system is a software
computer's language. Without an operating
which performs all the basic tasks like file
system, a computer is useless.
management, memory management, process
management, handling input and output, and Your computer's operating system (OS)
controlling peripheral devices such as disk manages all of the software and hardware on
drives and printers. the computer. Most of the time, there are
Some popular Operating Systems include several different computer programs running
Linux Operating System, Windows at the same time, and they all need to access
Operating System, VMS, OS/400, AIX, your computer's central processing unit
z/OS, etc. (CPU), memory, and storage. The operating
system coordinates all of this to make sure
Definition: each program gets what it needs.
An operating system is a program that acts
as an interface between the user and the
computer hardware and controls the
execution of all kinds of programs.
Following are some of important functions
of an operating System.
 Memory Management
 Processor Management
 Device Management
 File Management
 Security
 Control over system performance
 Job accounting
 Error detecting aids
 Coordination between other software
and users


Chapter
8 Process Characteristics
& Applications
Objective Practice Solutions 10. Ans: (d)

Sol: Generally if multithreading is done at user
01. Ans: (d) level then the whole process gets blocked
Sol: Process gets blocked when it requires I/O or otherwise only the respective thread gets
request any resource. Remaining are done blocked.
by OS.
11. Ans: (a)
02. Ans: (d)
Sol: Block initiated by process and Ready by OS. Sol: CPU efficiency is a measure of useful
computation over total computational work.
03. Ans: (a) Total work includes the time for context
Sol: Whenever an interrupt occurs, while process switching.
is running on CPU, it gets preempted and
goes to ready once. 12. Ans: (b)
Sol: Round Robin being preemptive, with time
04. Ans: (a) quantum can result in reducing prolonged
Sol: Process running in user mode has to increase waiting of processes and thereby improves
the PC Contents. inter-activeness.
05. Ans: (b)
Sol: Round Robin scheduling algorithm is 13. Ans: (b)
especially used for time sharing system. It is Sol: Real time environments are constrained by
similar to FCFS but preemption is added to strict Deadlines. Hence priority based
switch between processes small unit of time scheduling is required to challenge the
called time Quantum or time slice is defined. deadlines.
06. Ans: (d)

Sol: A critical region (section) is the portion of 14. Ans: (d)
program text that involves shared variables. Sol: Round Robin Scheduling is based on Time
Quantum and arrival times of process.
07. Ans: (a)
Sol: Time of submitting a request to the time at 15. Ans: (c)
which initial response is generated. Sol: Cycle stealing is used for DMA operation
08. Ans: (a)
Sol: If the system is non-preemptive, then if a 16. Ans: (a)
long process is running it will cause Sol: Race condition implies that multiple
starvation to longer process. processes are contending competitively or
cooperatively to access critical resources.
09. Ans: (c)
Sol: Round Robin is non-priority based and does 17. Ans: (c)
not need any knowledge of service times of Sol: Semaphores always satisfy all the conditions
processes. of synchronization requirements.

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18. Ans: (c) 26. Ans: (c)

Sol: Processes are generally swapped out from Sol: If the time-slice used in the round-robin
memory to Disk when they are decided to be scheduling policy is more than the maximum
suspended. time required to execute any process, then
the policy will Degenerate to first come first
19. Ans: (c) serve.
Sol: RR is a pre-emptive scheduler, which is
designed especially for time-sharing 27. Ans: (a)
systems. In other words, it does not wait for Sol: As given process scenario
a process to finish or give up control. In RR, Process_id Arrival Burst Complete
each process is given a time slot to run. If time time time
the process does not finish, it will “get back
P1 0 8 14
in line” and receive another time slot until it
has completed. P2 0 4 10
P3 0 2 6
20. Ans: (b)
Sol: Total number of jobs executed per unit time Preparing Gantt chart for Round-Robin
(also called throughput)is maximum in SJF. scheduling, Q = 2
Since shorter jobs are executed first and Complete time of processes P1, P2 and P3 as
more number of jobs will be executed per 14, 10, 6.
unit time.
P1 P2 P3 P1 P2 P1 P1
21. Ans: (b) 0 2 4 6 8 10 12 14
Sol: FCFS/FIFO is non-preemptive as Turnaround time of a process
preemption takes place only after completion = Complete time – Arrival time.
of the process. Remaining algorithms are P_id Turnaround time
preemptive.
P1 14
22. Ans: (b) P2 10
Sol: Once every process got scheduled one time P3 6
each (for T time units).
All processes have now the same waiting 14  10  6
Average turnaround time 
time = (n–1) T (n = number of processes). 3
Till now, the scheduling was Round Robin  10 ms .
with pre-emption at periods of T. The same
analysis can be extended for further 28. Ans: (a)
scheduling as all the processes have the Sol: Given scenario of the processes
same priority = (n – 1)T. Process Burst time
P1 10
23. Ans: (c)
Sol: A CPU generally handles an interrupt by P2 29
executing an interrupt service routine by P3 3
checking the interrupt register after P4 7
finishing the execution of the current
P5 12
instruction.

FCFS: Conventional Practice Solutions

P1 P2 P3 P4 P5
0 10 39 42 49 61 01.
Sol: (a) Ready  Run  Transition is possible,
Non-Preemptive SJF
when a process is scheduled and
displaces to run in CPU.
P3 P4 P1 P5 P2
(b) Ready  Blocked  Not possible A
0 3 10 20 32 61
process can go into blocked state from
Round-Robin: running state only.
(c) Blocked  Ready  Transition is
P1 P2 P3 P4 P5 P2 P5 P2 possible when a process completes the
0 10 20 23 30 40 50 52 61 I/O or event, then it makes this
transition.
Average waiting times for FCFS, SJF and
(d) Running  Terminate  Transition is
RR are 28 ms, 13 ms and 23 ms
possible. When the execution of process
respectively.
is finished.
(e) Ready  Terminate  Transition not
possible. A process can go to terminated
state only from running state.
02.
Sol: The process will run twice as of many times
it should run.
03.
Sol: Deadlock: Two or more processes wait for
such an event which is never going to occur.
Deadlocked processes can never execute
further but a process in starvation may
further after indefinite time-waiting.

9

Chapter Memory Management
Objective Practice Solutions can’t get placed and hence the total left over
free memory is 120 K.
01. Ans: (b)
Sol: Number of Memory Chips required = 08. Ans: (c)
Memory Required/Chip Size; Each Row
Sol: L.A.S = 4K × 512 = 221  L.A = 21 bits.
having 2 chips of dimension 256×4 will get
P.A.S = 1K×512 = 219  P.A = 19 bits.
memory of capacity 256 B; 128 rows each
having 2 chips will organize memory of
09. Ans: (b)
capacity 32 KB.
Sol: Use the equation:
02. Ans: (d) Emat= x(c+m) + (1x) (c+2m)
Sol: In board memory is like RAM and out board
memory is like Hard-Disk and off-time
10. Ans: (c)
storage is like magnetic tape.
Sol: Larger pages leads to less number of pages
and less number of entries in page table.
03. Ans: (a)
Sol: The number of allocation units
11. Ans: (a)
= 1GB/64 KB = 214.
1 bit is required for each allocation unit. Sol: The formula for optimal page size is 2.S.e
values of S = 32 MB; e = 4B
04. Ans: (a)
Sol: The size of the page = 232-(9+11) 13. Ans: (c)
= 212bytes = 4 KB Sol: Larger Pages implies less number of pages.
The number of pages
= Top level pages + second level pages
14. Ans: (a)
= 220/212 (Top level pages) Sol: Smaller Pages will involve less internal
+ 220(second level pages) fragmentation.
 220 = 1M
05. Ans: (d) 17. Ans: (a)

Sol: Using Best fit the request for 120 K gets Sol: Fixed partitioning technique limits or restrict
placed in 150 K and 10 K in 30 K and 250 K the degree of multiprogramming to the
gets placed in 300 K; at this juncture 60 K number of partitions.

18. Ans: (a) 24. Ans: (a)

Sol: Using the equation Sol: It’s the work of addressing modes to provide
Emat = (1P) m +P*S ; minimum required pages, OS has the work
to provide more pages.
Here m = 5 s; S = 50 ms;
1P = 0.9999 & P = 0.0001
25.
Substituting in the above equation Sol: Logical Address = 13 bits
Emat = 10 s Physical Address = 15 bits
19. Ans: (b)

26. Ans: (c)
Sol: Due to Belady’s anomaly, sometimes page
Sol: Threads refer to the execution of different
fault increases with the increase in page fault
processes simultaneously in the CPU.
rate.
Virtual address space is implemented in
Memory.
20. Ans: (b)
The File system in the way in which data in
Sol: The Number of page faults using optimal
a disk is organized.
replacement is 11, giving a page fault rate of
A signal is acted upon using the mechanism
50%, using the equation.
of interrupts.
Emat = P*s + (1p)*m;
Where P = 50%; m = 1 ms; s = 30 ms;
29. Ans: (a)
Sol: Both statements are true and statement II is
21. Ans: (a) the correct explanation for statement I.
Sol: Apply optimal replacement
22. Ans: (d)

Sol: All will not follow locality of reference.
23. Ans: (b)

Sol: High page fault rate implies thrashing which
can be controlled by decreasing degree of
multiprogramming and addition of more
main memory.

Conventional Practice Solutions Concept/Principle of Locality

Locality model states that a Process
01. migrates from one locality to another (w.r.t
Sol: EMAT = p*s + (1–p)*m generated addresses) while it executes and
p is page fault rate, s is page fault service localities may overlap.
 Program and data references within a
time, m is memory access time. In the
process tend to cluster.
question s = 5ms ; m = 120 ns; EMAT =
 Only a few pages/pieces of a process will be
1 micro sec. p = 0.0176 %
needed over a short period of time.
 Possible to make intelligent guesses about
02.
which pages/pieces will be needed in the
Sol: Thrashing: future.
It’s a phenomenon where a process is busy  This suggests that virtual memory may
swapping pages in and out. OR high paging work efficiently.
activity is observed.  Locality of reference of a process refers to
 Exhibits swapping out a piece of a process its most recent/active pages.
just before that piece is needed. Using working-set model Trashing can be
 The processor spends most of its time prevented.
swapping pieces rather than executing user
Instructions. 03.
 How thrashing occurs: Sol: When a page fault occurs, there is a trap to a
If a process does not have “enough” pages, OS to service it. Following are the steps
the page-fault rate is very high. This leads to performed for service:
low CPU utilization; operating system 1. Find a free frame in physical memory
thinks that it needs to increase the degree of
2. Schedule a disk operation to read the
Multiprogramming another process added to
desired page into newly allocated frame.
the system (as depicted below)
3. When the disk read is complete, modify
the page table entry of newly brought
thrashing page.
4. Restart the instruction that was interrupt
CPU
due to page fault.

Degree of multi-programming

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10 File System Implementation

Chapter
Objective Practice Solutions 13. Ans: (b)

Sol: Mounting: Before your computer can use
01. Ans: (a) any kind of storage device (HDD, CD-
Sol: Convert the Hex value to binary stream ROM) your OS must make it accessible
calculate the % of ‘0’s to the total Binary through the computer's file system. This
length of string. process is called mounting.
If mounting is automatically done by OS,
02. Ans: (a)
then it is known as implicit mounting.
Sol: Surface capacity = 512 * 1K * 4 KB
If mounting is done by user (line in Linux),
= 231 = 2 GB
it is known as explicit mounting.
 Disk capacity = 32 * surface capacity
= 32×2 GB = 64 GB
03. Ans: (d)

Sol: All peripherals (External devices) require
device driver.
05. Ans: (a)

Conventional Practice Solutions
Sol: Seek time is the dominating time in most of
the IO operations.
01.
09. Ans: (d) Sol: File with 2 copies can not reside in the same
Sol: Maximum file size directory, so those are kept on two different
= 8×2KB+1K×2KB+1K×1K×2KB =2.2 GB locations.
Keeping two names of the same file can
10. Ans: (b) resolve the above problem as both files of
40MB different names can be kept in same
Sol: Number of Blocks on Disk =  20 K
2 KB directory.
1 Block can store 16 K bits;
Hence 20 K bits can be stored in 2 Blocks. 02.
Sol: If important file system data are cached then
12. Ans: (a)
before power off, computer system shutting
1024K
Sol:  256 K down helps the cached data to be stored in
4B
disk and saved before power off.
256 K  4 = 1024 K = 1M

11

Chapter Protection & Security
02. Ans: (c) 01.

Sol: The unique name in capabilities can be Sol: 1. Trojan Horse: A code segment the
reused, but only if it can be guaranteed that misuses its environment is called a
no references remain to the old use of the Trojan horse.
name. 2. Trap door: The designer of a program a
system might leave a hole in the
software that only he/she is capable of
using. That is called as trap door.
3. Warms: It is a process that uses the
spawn mechanism to clobber system
performance. This worm spawns copies
of itself using up system resources and
perhaps locking out system use by all
other processes.
4. Viruses: Like worms, viruses are
designed to spread into other programs
and can cause havoc in a system,
including modifying or destroying files
and causing system crashes and program
malfunctions.
5. Denial of service: It does not involve
gaining information or stealing
resources, but rather disabling legitimate
use of a system as facility.

12

Chapter Introduction to Database

12
Objective Practice Solutions 08. Ans: (a)
Sol: Record stores the data items that are
01. Ans: (c) grouped together.
Sol: DBMS is a collection of program that
enables user to create and maintain a 09. Ans: (d)
database. Sol: NULL indicates that there is no value.
02. Ans: (b) 10. Ans: (c)

Sol: Physical database design is the process of
Sol: Architecture of a database is viewed as
selecting the data storage and data access
three levels.
characteristics of the database.
03. Ans: (c) 11. Ans: (d)

Sol: A database is a collection of related data Sol: Tree is used to organize the records in
necessary to manage an organization. hierarchical model.
04. Ans: (b) 13. Ans: (c)

Sol: The database environment has Users, Sol: Conceptual design involves modeling
Database and Database administration independent of the DBMS.
except Separate files.
14. Ans: (d)
05. Ans: (b) Sol: DBMS helps to achieve data independence
Sol: In Relational model of database, data is and centralized control of data.
stored in tables.
07. Ans: (a)

Sol: Data redundancy is not the feature of
database.

13 ER & Relational Model

Chapter
07. Ans: (b)

Objective Practice Solutions
Sol: When a tuple from the dominant is deleted
01. Ans: (c) the related tuple from the subordinate also
Sol: If two students hold joint account then be deleted.
BankAccount_Num is not a candidate key
and will not uniquely determine other 08. Ans: (b)
attribute. Sol:
Student Register Course
03. Ans: (b)
Sol: Derived attribute is an attribute that 09. Ans: (c)
represents a value that is derivable from Sol: The tuples present at a particular moment is
two or more attributes in an entity called relation instance.
04. Ans: (d)
Sol: On removal of row (2,4), row (5,2) and (7,2) 10. Ans: (c)
must also be deleted as they depend on value Sol: Cardinality is the number of tuples in a
2. On removal of row (5,2), row (9,5) must relation instance.
also be deleted as it depends on value 5.
11. Ans: (b)
05. Ans: (b) Sol: In an E-R diagram, entities are represented
Sol: Entity type - Relation by rectangles
Key attributes - Primary key
12. Ans: (c)
Composite attributes - Set of simple
Sol: In an E-R, diagram relationship is
attributes
represented by diamond shaped box
Weak Entity set - Child table
Value set - Domain
13. Ans: (a)
Sol: Rows of a relation are called tuples
06. Ans: (b)
Sol: Name of the dependent : Discriminator
14. Ans: (a)
attribute
Salary of a person: Composite attribute Sol: The employee salary should not be greater
than Rs.2000, comes under integrity
Telephone number : Multi valued attribute
constraint
Date of birth: Stored attribute

15. Ans: (d) 4

cid
Sol: Students and courses enrolled is an example ssn
of many-to-many relationship.
Professor Teachers course
16. Ans: (a)
Sol: An attribute of one table matching the
semester
primary key of another table, is called as
foreign key. 5
ssn cid
17. Ans:
Sol:
1 Professor Teachers course
ss ci
6
Professor Teacher course
ss gi
Semester Professor Member of Group
semid
Teacher semester
2
ss ci
course
Professo Teacher course ci
semester 18. Ans: (b)

Sol: Strong entities E1 and E2 are represented as
separate tables, in addition to that many to
3
many relationship (R2) must be converted as
ss ci
separate table by having primary keys of E1
and E2 as foreign keys. One to many
Professor Teaches course relationship must be transferred to ‘many’
side table by having primary key of one side
semester
as foreign key. Hence we will have

minimum of 3 tables.
19. Ans: (c) Conventional Practice Solutions

Sol:
01.
a11 a12 a 21 a22
M:N Sol:
1
E1 R12 E2
ssn cid
R13 1:N
Professor Teaches course
E3
semester
a 31 a32
2
cid
ssn
If we convert into Relational model, the
following relations will result. Professor Teaches course
1) E1( a11 , a12)
2) E2( a 21 , a22)
semester
3) R12( a11 a 21 )
3
4) E3R13( a 31 , a32, a11) ssn cid
20. Ans: (b) Professor Teaches course

Sol: Strong entities E1 and E2 are represented as
4
separate tables, in addition to that many to
many relationship (R2) must be converted as ssn gid
separate table by having primary keys of E1

and E2 as foreign keys. One to many Professor Memberof Group
relationship must be transferred to ‘many’

side table by having primary key of one side
Teaches semester
as foreign key. Hence we will have
minimum of 3 tables.
course
cid

02. Ans: (c) 03. Ans: 3

Sol: Sol: Strong entities E1 and E2 are converted as
1:M
separate tables. Since A23 is a multi valued
Person Have Loan
attribute it should also be converted as
separate table. Relationship R is transferred
In Relational mode we represent the above
situation with only two relations person and to ‘m’ side (E2).
(Loan, Have).

14 Functional Dependencies

Chapter
Objective Practice Solutions (FDs) = BCDEA, it includes RHS attributes

CD, so it can be derived from FDs AC+ from
01. Ans: (b) functional dependencies
Sol: From the given schema we conclude that (FDs) = ACBDE, it includes RHS attributes
“A functionally determines B and B does BC so it can be derived from FDs
not functionally determine C’.
11. Ans: (b)
02. Ans: (d) Sol: ACEH+ contains all the attributes of R.
Sol: The FD BC → A holds good
03. Ans: (d) 12. Ans: (d)

Sol: The FD C → B doesn’t hold over Relation Sol: Closure of AEH + = BEH+= DEH += A, B,
R. C, D, E, H. If any closure includes all
attributes of a table then it can become
04. Ans: (d) candidate key of the table. Closure of AEH,
Sol: The FD BC → A holds good. BEH, DEH includes all attributes of table
hence they are candidate keys.
06. Ans: (c)
Sol: Trivial FDs are satisfied by all relations in a
Database 13.
Sol: CK: ACD, BCD, ECD.
08. Ans: (c)
Sol: AF+ = AFDE not ACDEFG as given.
14. Ans: (d)
09. Ans: (d) Sol: ck: ABF, EBF, CBF, ADF, EDF, CDF.
Sol: AB+ = {ABCDEF}
16. Ans: (a)
10. Ans: (b)
Sol: G not covers the dependency D  E of F.
Sol: CD + from functional dependencies
(FDs) = CDEAB, it includes RHS attributes
AC so it can be derived from FDs BD+ from 18.
functional dependencies
Sol: AD  CF
(FDs) = BD only, RHS attributes CD are not
C B Canonical set
included in the closure hence it cannot be
BE
derived BC + from functional dependencies

AD  C Conventional Practice Solutions

CB
Minimal set
AB  F 01.
BE Sol: CF+ = {C, F, G, E, A, D}
BG+ = {B, G, A, C, D}
19. AF+ = {A, F, E, D}
Sol: In AB → C; B is redundant as A determines AB+ = {A, B, C, D, G}
B and in D → AC; C is redundant as D
determines C. Therefore the minimal set: 02.
A → BC and D → AC. Sol: AC+ = {ABCDE}
03.
Sol: CK: AB.

15

Chapter Normalizations
C+ {C, A} R1
D+ {D, B} R2
{C, D} R3
01.
Not D.P AB  CD lost.
Sol: (1) C  D
CA 02. Ans: (d)
BC Sol: Since R1  R 2   , R1 and R2 might have
C.K: B, 2NF but not 3NF two attributes each and no common
attribute. Any relation with 2 attributes
(2) 2NF but not 3NF as no partial
satisfies 2 NF and 3 NF.
dependency CK: BD.
03. Ans: (b)
(3) R is in 3NF but not in BCNF
Sol: 1 represents Partial FD and 2 represents T.D
D+ = {D, A} R1
R 04. Ans: (c)
{DBC} R2 Sol: In FD A → C, R in 1NF but not in 2NF
Not D.P ABC  D lost

05. Ans: (a)
(4) C.K = A Sol: In FD D → C, R is in 2NF but is in 3NF
No Partial Dependency
 2NF 06. Ans: (a)
R is in 2NF but not in BCNF & 3NF Sol: Every binary relation is in BCNF.
BC+ = {BCD} R1
= {ABC} R2 08. Ans: (a)
Sol: Relation contains PFD: B  F.
(5) AB  C
AB  D 09. Ans: (b)
CA Sol: Relation contains TD: C  E.
DB
Candidate Keys = AB, CD, BC, AD
10. Ans: (d)
R is in 3NF but not in BCNF. Sol: BC  D is Transitive FD.

11. Ans: (a) Conventional Practice Solutions

Sol: B  F is PFD.
01.
12. Ans: (d)
Sol: AB+ = ABCDE
Sol: 1 NF - Unique rows C+ = CDE
2 NF - Partial Dependencies A+= AE
BCNF - Candidate keys So Key is AB.
From A → E, attribute A is part of key so it
3 NF - Transitive dependencies
is in 1NF.
13. Ans: (b) 02.

Sol: R is in 1NF  decompose to 2NF
Sol: ACH is a key
A+ = {A, D, E, I, J} R1 = 2NF
B+ = {B, F, G, H} R2 = 2NF
14. Ans: (d) {A, B, C} R3 BCNF
Sol: E  G is Partial F.D. D+
R4 (D I J)
15. Ans: (b) R1 (A D E I J)
Sol: In 2 NF every non-prime attribute is fully R5 (A E D)
dependent functionally on the candidate key F+
R6 (F G H)
of relational schema R2 (B F G H)
R7 (B F)
16.
Sol: R1(CD) Then decompose into 2NF
R2(FG) R1 (ADEIJJ)
R3(AF) R2 (BFGH)
R4(ABCE) R3 (ABC)
3NF also in BCNF
R3 (ABC)
R4 (DIJ)
R5 (AED)
R6 (FGH)
R7 (BF)
AB+ is key.

03. But the relation R1 is not in 3NF because

Sol: Given relation R(ABCDE) with FD’s are attribute E is transitively depended on A.
{B → E, C → D, A → B}. The candidate Therefore relation R1 is not in 3NF. Relation
key for R is {AC} R1 is decomposed into
 The relation R is not in 2NF
R1(ABE)
R(ABCDE)
R11(AB) R12(BE)
R1(ABE) R2(CD)
 Total number of relation in 3NF is

But the decomposition relation of R into R1
R11(AB), R12(BE), R2(CD), R3(AC).
and R2 are lossy decomposition. To avoid
lossy decomposition, we add one more
relation R3(AC)
 Total relation in 2NF is R1(ABE), R2(CD),
R3(AC)


Chapter
16 Transaction

& Concurrency Control
06.
Sol: Not Conflict Serializable,
01. Ans: (c) Not View Serializable,
Sol: Atomocity : Recovery Manager Recoverable, Avoids Cascading aborts,
Isolation : Concurrency Control Sub system Not strict.
Durability: Transaction Manager
Consistency Preservation : User 07.
Sol: Conflict Serializable,
02. Ans: (d)
View Serializable,
Sol: Every strict schedule is both recoverable
Serializable,
and cascadeless.
Recoverable,
03. Ans: (c) Cascading aborts, Not strict
Sol: Precedence graph 1 2
08.
4 3 Sol: Conflict Serializable,
View serializable,
04. Ans: (b)
Sol: In S1 R2(x) and W1(x) conflicts hence Serializable,
T2 < T1. Also W1(y) and W2(y) conflicts Recoverable,
hence T1 < T2. There is no serial schedule Cascading aborts, Not strict
that satisfies both T2 < T1 and T1 < T2.
09.
In S4 R2(x) and W1(x) conflicts hence
Sol: Not Conflict Serializable,
T2 < T1. Also W1(y) and W2(y) conflicts
Not View Serializable,
hence T1 < T2. There is no serial schedule
Not avoids cascading aborts, not strict,
that satisfies both T2 < T1 and T1 < T2
Recoverable, cascading aborts
05. Ans: (d)
Sol: S1 and S2 are conflict equivalent to serial 10.
schedule T2, T3, T1. Sol: Conflict Serializable,
S3 is not conflict equivalent as 2RA, 3WA View serializable,
(T2 < T3) and 3WA, 2WA (T3 < T2) are the Serializable,
conflict operations. There is no serial Recoverable,
schedule that satisfies both T2 < T3 and Avoids cascading aborts,
T3 < T2. Not strict

11. 16.
Sol: Not Conflict Serializable, Views Sol: Conflict Serializable,
serializable through Thomas write rule, View Serializable,
Serializable, Recoverable, Avoids cascading Serializable,
aborts, Not strict Recoverable,
Avoid cascading aborts,
12.
Sol: Conflict Serializable, Strict
View Serializable,
Serializable, 17.
Recoverable, Sol: Not Conflict Serializable,
Avoids cascading aborts, View Serializable as per Thomas write rule,
Not strict Serializable,
Recoverable,
13. Cascading aborts,
Sol: Not Conflict Serializable, Not strict
Not View Serializable,
Not Serializable,
Not Recoverable,
No need cascading aborts,
Not strict
14.
View Serializable,
Serializable,
Not Recoverable,
No need cascading aborts,
Not strict
15.
View Serializable,
Serializable,
Recoverable,
Avoid cascading aborts,
Strict

Conventional Practice Solutions Hence ① shows that the transaction T2 reads

the data item which has previously written
01.
Sol: (i) Conflict serializable by transaction T3 ② shows that the
T3  T1 T2 transaction T3 writes the data item which has

previously written by T2.
T1 T2
(ii) Not Conflict serializable
T1 T2
T3
T3
(iii) Conflict serializable T1 T2
As there is presence of cycle the given

T3 schedule is not serializable.
(iv) Not Conflict serializable T1 T2

03.
Sol:
T3
S1
02.
Sol: T1 T2 T3
T1 T2 T3
R(X) R(X)
R(A)
R(B)
W(A) W(X)
R(A) R(X)
W(X)
W(B)
R(B)
W(A)
W(B)
R(C) T1 T2
W(C)
R(C) T3
W(C)
W(B)
Here cycle is present so it is not serializable

S2 04. Ans: (c)

Sol:
T1 T2 T3
T1 T2
R(X) R(A)
R(X)
W(A)
W(X) R(A)
R(X) W(B)
C
W(X)
W(C)
T1 T2
T3
Even though transaction T1 is roll backed,
T2 is committed before T1. So the total
Here, there is no presence of cycle.
schedule is non recoverable schedule.
So it is also serializable.
Serializable but not S1.


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ESE | GATE | PSUs

Common Bus ( address, Data & Control )

Chapter Computer Arithmetic

Objective Practice Solutions Conventional Practice Solutions

01. Ans: (a) 01.

1100 0001 0110 0100 00........0

& Secondary Memory

Objective Practice Solutions Data transfer 512 sectors

09. Ans: (a) 13. Ans: (a)

12. Ans: (d) 18. Ans: (d)

Conventional Practice Solutions  If again there is a miss in L2 cache memory;

Objective Practice Solutions Conventional Practice Solutions

04. Ans: (b)

05. Ans: (b)

03. Ans: (b) 01.

Chapter Instruction Set

01. Ans: (a) 01.

Objective Practice Solutions 09. Ans: (b)

02. Ans: (b) 10. Ans: (a)

17. Ans: (c) Conventional Practice Solutions

02. to ‘c’. Whereas, while jumping into printf( )

Objective Practice Solutions 08. Ans: (c)

04. Ans: (d)

05. Ans: (c)

07. Ans: (b)

Conventional Practice Solutions 02.

Objective Practice Solutions 10. Ans: (d)

06. Ans: (d)

18. Ans: (c) 26. Ans: (c)

FCFS: Conventional Practice Solutions

Chapter Memory Management

05. Ans: (d) 17. Ans: (a)

18. Ans: (a) 24. Ans: (a)

19. Ans: (b)

22. Ans: (d)

23. Ans: (b)

Conventional Practice Solutions Concept/Principle of Locality

due to page fault.

Objective Practice Solutions 13. Ans: (b)

03. Ans: (d)

05. Ans: (a)

Chapter Protection & Security

Objective Practice Solutions Conventional Practice Solutions

02. Ans: (c) 01.

Chapter Introduction to Database

02. Ans: (b) 10. Ans: (c)

03. Ans: (c) 11. Ans: (d)

04. Ans: (b) 13. Ans: (c)

07. Ans: (a)

07. Ans: (b)

15. Ans: (d) 4

Semester Professor Member of Group

Professo Teacher course ci

semester 18. Ans: (b)

19. Ans: (c) Conventional Practice Solutions

20. Ans: (b) Professor Teaches course

separate table by having primary keys of E1

relationship must be transferred to ‘many’

02. Ans: (c) 03. Ans: 3

Objective Practice Solutions (FDs) = BCDEA, it includes RHS attributes

03. Ans: (d) 12. Ans: (d)

AD  C Conventional Practice Solutions