© Sagar Pokhrel, Faculty - CSITA, Prime College

UNIT V: Central Processing Unit (CPU)

INTRODUCTION
TO BUS
ADDRESS BUS, DATA BUS, CONTROL BUS

Reference Notes for CSITA, BBA First SEMESTER, PRIME COLLEGE

 © Sagar Pokhrel, Faculty - CSITA, Prime College

CONTENTS

▪ Describe the operation of a computer at the functional

level
▪ Explain the function of the main components of a
computer system
▪ Detail the interaction of computer sub-systems
▪ Detail the organization of computer sub-systems
© Sagar Pokhrel, Faculty - CSITA, Prime College

COMPUTER ORGANIZATION

• Architecture provides a good understanding of what a

microprocessor can do; provides no information how to
use the processor in a bigger system.
• In order to design a computing system, more information is
needed than the instruction set and CPU Cycle
• Computer system subsystems:
• CPU
• Buses
• Memory
• Input/Output
© Sagar Pokhrel, Faculty - CSITA, Prime College

CPU

▪ The Central Processing Unit (CPU a.k.a. Processor) is the chip

which acts as a control center for all operations. It executes
instructions (a program) which are contained in the memory
section.
▪ Basic operations involve
▪ the transfer of data between itself and the memory section
▪ manipulation of data in the memory section or stored internally
▪ the transfer of data between itself and input/output devices

▪ The CPU is said to be the brains of any computer system. It

provides all the timing and control signals necessary to transfer
data from one point to another in the system.
 © Sagar Pokhrel, Faculty - CSITA, Prime College

INTRODUCTION TO BUS
▪ Collection of wires through which data is transmitted
from one part of a computer to another is known as bus.
▪ It is an electrical or digital pathway through which bits
are transmitted between the various computer
components.
▪ The term bus refers to the internal bus of a computer
system. It is also known as communication pathways.
▪ In other words, bus is the channel which lets the parts of
a computer communicates with each other.
© Sagar Pokhrel, Faculty - CSITA, Prime College

INTRODUCTION..
▪ It is a bus that connects all the internal components to the
CPU and main memory.
▪ The size of a bus, known as width is important because it
determines how much data can be transmitted at one time.
▪ Buses transfer data in parallel.
▪ In a 32 bit bus, data are sent over 32 wires simultaneously.
▪ Every bus has a clock speed measured in MHz.
 © Sagar Pokhrel, Faculty - CSITA, Prime College

SYSTEM BUSES

▪ Set of wires, that interconnects all the components

(subsystems) of a computer
▪ A source component sources out data onto the bus
▪ A destination component inputs data from the bus

▪ May have a hierarchy of buses

▪ Address, data and control buses to access memory and an I/O controller.
▪ Second set of buses from I/O controller to attached devices/peripherals
▪ Peripheral Component Interconnect(PCI) bus is an example of a very
common local bus
© Sagar Pokhrel, Faculty - CSITA, Prime College

Fig: System Bus (Data, Address and Control Bus)

© Sagar Pokhrel, Faculty - CSITA, Prime College

ADDRESS BUS

▪ It is a channel which transmits addresses of data (not the data) from

the CPU to memory.
▪ The address bus consists of 16,24, or 32 parallel signal lines.
▪ The number of lines (wires) determines the amount of memory that
can be directly addressed as each line carries one bit of the address.
▪ If the CPU has N address lines, then it can directly address 2N address
lines.
▪ For example, a computer with 32 bit address can address 4GB of
physical memory.
© Sagar Pokhrel, Faculty - CSITA, Prime College

ADDRESS BUS

▪ CPU reads/writes data from the memory by addressing a

unique location; outputs the location of the data (aka
address) on the address bus; memory uses this address to
access the proper data.
▪ Each I/O device (such as monitor, keypad, etc) has a
unique address as well (or a range of addresses); when
accessing a I/O device, CPU places its address on the
address bus. Each device will detect if it is its own address
and act accordingly
▪ Devices always receive data from the CPU; CPU never
reads the address buss (it is never addressed)
 © Sagar Pokhrel, Faculty - CSITA, Prime College

DATA BUS

▪ Data bus is a channel across which actual data are transferred

between the CPU, memory and I/O devices.
▪ The data bus consists of 8, 16, 32 or 64 parallel signal lines.
Because each wire can transfer 1 bit of data at a time, an 8 wire
bus can move 8 bits at a time which is a full byte.
▪ The number of wires in the bus affects the speed at which data
can travel between hardware components. The wider the data
bus, more data it can carry at one time.
▪ The data bus is bidirectional this means that the CPU can read
data in from memory or it can send data out to memory.
 © Sagar Pokhrel, Faculty - CSITA, Prime College

DATA BUS

▪ When the CPU fetches data from memory, it first outputs

the address on the address bus, then the memory outputs
the data onto the data bus; the CPU reads the data from
data bus
▪ When writing data onto the memory, the CPU outputs
first the address on the address bus, then outputs the data
onto the output bus; memory then reads and stores the
data at the proper location
▪ The process to read/write to a I/O device is similar
© Sagar Pokhrel, Faculty - CSITA, Prime College

CONTROL BUS

▪ The physical connections that carry control information between the

CPU and other devices within the computer. This bus is mostly a
collection of unidirectional signals.
▪ It is the path for all timing and controlling functions sent by the
control units to other units of the system.
▪ It carries signals that report the status of various devices.
▪ These signals indicate whether the data is to be read into or written out the CPU,
whether the CPU is accessing memory or an IO device, and whether the I/O device or
memory is ready for the data transfer

▪ For example, one line of the bus is used to indicate whether the CPU is
currently reading from or writing to main memory. Others are I/O
Read/Write