PIONEER DJM-750-k-s RRV4457 PDF

ORDER NO.
RRV4457
DJM-750-K
DJ MIXER
DJM-750-K
DJM-750-S
THIS MANUAL IS APPLICABLE TO THE FOLLOWING MODEL(S) AND TYPE(S).
Model Type Power Requirement Remarks
DJM-750-K, DJM-750-S SYXJ8 AC 220 V to 240 V

DJM-750-K, DJM-750-S UXJCB AC 120 V
DJM-750-K, DJM-750-S LXJ AC 110 V to 120 V or 220 V to 240 V
DJM-750-K, DJM-750-S KXJ5 AC 220 V

DJM-750-K, DJM-750-S XJCN5 AC 220 V to 240 V
PIONEER CORPORATION 1-1, Shin-ogura, Saiwai-ku, Kawasaki-shi, Kanagawa 212-0031, Japan

PIONEER ELECTRONICS (USA) INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A.
PIONEER EUROPE NV Haven 1087, Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE. LTD. 253 Alexandra Road, #04-01, Singapore 159936
PIONEER CORPORATION 2013
K-MZV MAY 2013 Printed in Japan
1 2 3 4
SAFETY INFORMATION
This service manual is intended for qualified service technicians; it is not meant for the casual do-it-
yourselfer. Qualified technicians have the necessary test equipment and tools, and have been trained
to properly and safely repair complex products such as those covered by this manual.
Improperly performed repairs can adversely affect the safety and reliability of the product and may
void the warranty. If you are not qualified to perform the repair of this product properly and safely, you
should not risk trying to do so and refer the repair to a qualified service technician.
WARNING
B This product may contain a chemical known to the State of California to cause cancer, or birth defects or other reproductive
harm.
Health & Safety Code Section 25249.6 - Proposition 65
(FOR USA MODEL ONLY)

ANY MEASUREMENTS NOT WITHIN THE LIMITS
1. SAFETY PRECAUTIONS
OUTLINED ABOVE ARE INDICATIVE OF A POTENTIAL
The following check should be performed for the
SHOCK HAZARD AND MUST BE CORRECTED BEFORE
continued protection of the customer and service
RETURNING THE APPLIANCE TO THE CUSTOMER.
technician.
C LEAKAGE CURRENT CHECK
Measure leakage current to a known earth ground 2. PRODUCT SAFETY NOTICE
(water pipe, conduit, etc.) by connecting a leakage Many electrical and mechanical parts in the appliance
current tester such as Simpson Model 229-2 or have special safety related characteristics. These are
equivalent between the earth ground and all exposed often not evident from visual inspection nor the protection
metal parts of the appliance (input/output terminals, afforded by them necessarily can be obtained by using
screwheads, metal overlays, control shaft, etc.). Plug replacement components rated for voltage, wattage, etc.
the AC line cord of the appliance directly into a 120 V Replacement parts which have these special safety
AC 60 Hz outlet and turn the AC power switch on. Any characteristics are identified in this Service Manual.
current measured must not exceed 0.5 mA. Electrical components having such features are
identified by marking with a > on the schematics and on
D
the parts list in this Service Manual.
Reading should The use of a substitute replacement component which
Leakage not be above does not have the same safety characteristics as the
Device current 0.5 mA
under tester PIONEER recommended replacement one, shown in the
test parts list in this Service Manual, may create shock, fire,
Test all or other hazards.
exposed metal
surfaces Product Safety is continuously under review and new
instructions are issued from time to time. For the latest
information, always consult the current PIONEER Service
Also test with Manual. A subscription to, or additional copies of,
plug reversed Earth PIONEER Service Manual may be obtained at a nominal
E (Using AC adapter ground
plug as required) charge from PIONEER.
AC Leakage Test
2 DJM-750-K
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5 6 7 8
CONTENTS
SAFETY INFORMATION.......................................................................................................................................................... 2
1. SERVICE PRECAUTIONS .................................................................................................................................................... 5
1.1 NOTES ON SOLDERING ............................................................................................................................................... 5 A
1.2 NOTES ON REPLACING ............................................................................................................................................... 5
1.3 NOTES ON SERVICING................................................................................................................................................. 5
2. SPECIFICATIONS................................................................................................................................................................. 6
3. BASIC ITEMS FOR SERVICE .............................................................................................................................................. 7
3.1 CHECK POINTS AFTER SERVICING ........................................................................................................................... 7
3.2 JIGS LIST ....................................................................................................................................................................... 7
3.3 PCB LOCATIONS ........................................................................................................................................................... 8
4. BLOCK DIAGRAM .............................................................................................................................................................. 10
4.1 OVERALL WIRING DIAGRAM ..................................................................................................................................... 10
4.2 SYSTEM BLOCK DIAGRAM ........................................................................................................................................ 12
4.3 DSP BLOCK DIAGRAM................................................................................................................................................ 14
4.4 CLOCK MAP................................................................................................................................................................. 16 B
4.5 LED, KEY, VR ASSIGNMENTS .................................................................................................................................... 18
4.6 POWER BLOCK DIAGRAM ......................................................................................................................................... 19
5. DIAGNOSIS ........................................................................................................................................................................ 20
5.1 POWER ON SEQUENCE............................................................................................................................................. 20
5.2 SIMPLIFIED DIAGNOSTIC PROCEDURE FOR AUDIO SIGNAL................................................................................ 24
5.3 TROUBLESHOOTING.................................................................................................................................................. 25
5.4 POWER SUPPLY DIAGNOSIS INFORMATION ........................................................................................................... 37
5.5 VOLTAGE MONITORING CIRCUIT .............................................................................................................................. 38
5.6 ABOUT POLYSWITCH ................................................................................................................................................. 40
5.7 ABOUT PROTECTOR .................................................................................................................................................. 40
5.8 V+34D DIAGNOSIS...................................................................................................................................................... 41
C
5.9 ERROR INDICATIONS ................................................................................................................................................. 42
5.10 CONNECTION CHECK WITH EACH INTERFACE .................................................................................................... 43
5.11 DVS CONFIRMATION METHOD................................................................................................................................ 44
6. SERVICE MODE ................................................................................................................................................................. 48
6.1 TEST MODE................................................................................................................................................................. 48
6.2 ABOUT THE DEVICE................................................................................................................................................... 63
7. DISASSEMBLY ................................................................................................................................................................... 64
8. EACH SETTING AND ADJUSTMENT ................................................................................................................................ 75
8.1 NECESSARY ITEMS TO BE NOTED........................................................................................................................... 75
8.2 UPDATING OF THE FIRMWARE ................................................................................................................................. 76
8.3 USER SETABLE ITEMS ............................................................................................................................................... 78
8.4 SHEET FOR CONFIRMATION OF THE USER SETTING ........................................................................................... 78 D
9. EXPLODED VIEWS AND PARTS LIST............................................................................................................................... 80
9.1 PACKING SECTION ..................................................................................................................................................... 80
9.2 EXTERIOR SECION..................................................................................................................................................... 82
9.3 BOTTOM SECTION...................................................................................................................................................... 84
9.4 CONTROL PANEL SECTION (1/2)............................................................................................................................... 86
9.5 CONTROL PANEL SECTION (2/2)............................................................................................................................... 88
10. SCHEMATIC DIAGRAM .................................................................................................................................................... 90
10.1 INPUT ASSY (1/5) ...................................................................................................................................................... 90
10.2 INPUT ASSY (2/5) ...................................................................................................................................................... 92
10.3 INPUT ASSY (3/5) ...................................................................................................................................................... 94
10.4 INPUT ASSY (4/5) ...................................................................................................................................................... 96
10.5 INPUT ASSY (5/5) ...................................................................................................................................................... 98 E
10.6 MIC1 and MTRM ASSYS ......................................................................................................................................... 100
10.7 MAIN ASSY (1/19).................................................................................................................................................... 102
10.8 MAIN ASSY (2/19).................................................................................................................................................... 104
10.9 MAIN ASSY (3/19).................................................................................................................................................... 106
10.10 MAIN ASSY (4/19).................................................................................................................................................. 108
DJM-750-K 3
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10.11 MAIN ASSY (5/19) ..................................................................................................................................................110

10.12 MAIN ASSY (6/19) ..................................................................................................................................................112
A 10.13 MAIN ASSY (7/19) ..................................................................................................................................................114
10.14 MAIN ASSY (8/19) ..................................................................................................................................................116
10.15 MAIN ASSY (9/19) ..................................................................................................................................................118
10.16 MAIN ASSY (10/19) ................................................................................................................................................120
10.17 MAIN ASSY (11/19) ................................................................................................................................................122
10.18 MAIN ASSY (12/19) ................................................................................................................................................124
10.19 MAIN ASSY (13/19) ................................................................................................................................................126
10.20 MAIN ASSY (14/19) ................................................................................................................................................128
10.21 MAIN ASSY (15/19) ................................................................................................................................................130
10.22 MAIN ASSY (16/19) ................................................................................................................................................132
10.23 MAIN ASSY (17/19) ................................................................................................................................................134
10.24 MAIN ASSY (18/19) ................................................................................................................................................136
B
10.25 MAIN ASSY (19/19) ................................................................................................................................................138
10.26 SEC/HP ASSY (1/2)................................................................................................................................................140
10.27 SEC/HP ASSY (2/2)................................................................................................................................................142
10.28 USBI and HPJK ASSYS..........................................................................................................................................144
10.29 PNLA ASSY (1/2)....................................................................................................................................................146
10.30 PNLA ASSY (2/2)....................................................................................................................................................148
10.31 PNLB and FADC ASSYS ........................................................................................................................................150
10.32 FAD1 to FAD4 ASSYS ............................................................................................................................................152
10.33 REG ASSY..............................................................................................................................................................153
10.34 TRANS, PRIMARY and ACSW ASSYS ..................................................................................................................154
10.35 WAVEFORMS .........................................................................................................................................................156
C 11. PCB CONNECTION DIAGRAM ......................................................................................................................................160
11.1 INPUT, MIC1 and MTRM ASSYS .............................................................................................................................160
11.2 MAIN ASSY...............................................................................................................................................................164
11.3 SEC/HP, USBI and HPJK ASSYS.............................................................................................................................170
11.4 PNLA ASSY ..............................................................................................................................................................174
11.5 PNLB and FADC ASSYS ..........................................................................................................................................178
11.6 FAD1 to FAD4 and REG ASSYS...............................................................................................................................182
11.7 TRANS, PRIMARY and ACSW ASSYS ....................................................................................................................184
12. PCB PARTS LIST ............................................................................................................................................................188
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5 6 7 8
1. SERVICE PRECAUTIONS
1.1 NOTES ON SOLDERING
• For environmental protection, lead-free solder is used on the printed circuit boards mounted in this unit. A
Be sure to use lead-free solder and a soldering iron that can meet specifications for use with lead-free solders for repairs
accompanied by reworking of soldering.
• Compared with conventional eutectic solders, lead-free solders have higher melting points, by approximately 40 ºC.
Therefore, for lead-free soldering, the tip temperature of a soldering iron must be set to around 373 ºC in general, although
the temperature depends on the heat capacity of the PC board on which reworking is required and the weight of the tip of
the soldering iron.
Do NOT use a soldering iron whose tip temperature cannot be controlled.
Compared with eutectic solders, lead-free solders have higher bond strengths but slower wetting times and higher melting
B
temperatures (hard to melt/easy to harden).
The following lead-free solders are available as service parts:

• Parts numbers of lead-free solder:
GYP1006 1.0 in dia.
GYP1007 0.6 in dia.
GYP1008 0.3 in dia.
1.2 NOTES ON REPLACING

The part listed below is difficult to replace as a discrete component part.
When the part listed in the table is defective, replace whole Assy.
Parts that is Diffcult to Replace
Assy Name PCB Assy Part No.
Ref No. Function Part No. Remarks
IC1405 13V → 3.3V DC/DC converter BD9328EFJ IC with heat-pad
IC1408 13V → 1.2V DC/DC converter BD9328EFJ IC with heat-pad
IC2603 USB UCOM ADSP-BF525BBCZ-5A BGA
MAIN Assy DWX3430
IC3007 FPGA XC3S50A-4FTG256C BGA D
IC3201 DSP D810K013BZKB400 BGA
IC201 DAC PCM1691DCA IC with heat-pad
1.3 NOTES ON SERVICING

VOLTAGE MONITORING E
This unit always monitors for power failure and will shut itself off immediately after an error is detected.
A power failure is indicated with flashing of the SETUP LED (Intervals: 250 ms [Lit 125 ms/Unlit 125 ms]).
All the LEDs other than SETUP LED will be unlit, and all the switches and VRs will be disabled.
Repair the unit according to the diagnostic procedures described in “5.4 INFORMATION ON POWER DIAGONOSTICS.”
CONFIRMATION OF USER-SETTING
This product has user- and club-setting data. Be sure to confirm those data before starting repair, although changing them
may not have a large effect. Use the Check Sheet in “8.4,” to which you can transcribe the settings, as required.
The settings are stored in Flash ROM (IC2802) on the MAIN Assy.
To display the [USER SETUP] screen, hold [SETUP (WAKE UP)] pressed for at least 1 sec. F
To display the [CLUB SETUP] screen, press [POWER] (ON) while holding [SETUP (WAKE UP)] pressed.
DJM-750-K 5
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2. SPECIFICATIONS
A General Crosstalk
Power requirements......... AC 220 V to 240 V, 50 Hz/60 Hz (SYXJ8) LINE......................................................................................82 dB
AC 120 V, 60 Hz (UXJCB) Channel equalizer characteristic
AC 110 V to 120 V or 220 V to 240 V, 50 Hz/60 Hz (LXJ) HI ...........................................................–26 dB to +6 dB (13 kHz)
AC 220 V, 60 Hz (KXJ5) MID..........................................................–26 dB to +6 dB (1 kHz)
AC 220 V to 240 V, 50 Hz/ 60 Hz (XJCN5) LOW ........................................................–26 dB to +6 dB (70 Hz)
Power consumption ....................................................32 W (SYXJ8) Microphone equalizer characteristic
30 W (UXJCB) HI .........................................................–12 dB to +12 dB (10 kHz)
32 W (LXJ) LOW ....................................................–12 dB to +12 dB (100 Hz)
29 W (KXJ5)
32 W (XJCN5) Input / Output terminals
Power consumption (standby) .............................................. 0.45 W PHONO input terminal
Main unit weight........................................................... 7.6 kg (17 lb) RCA pin jack.........................................................................2 sets
Max. dimensions............. 320 mm (W) × 108 mm (H) × 376 mm (D) CD/LINE input terminal
B
(12.6 in. (W) × 4.3 in. (H) × 14.8 in. (D)) RCA pin jacks .......................................................................4 sets
Tolerable operating temperature......+5 °C to +35 °C (+41 °F to +95 °F) LINE input terminal
Tolerable operating humidity............ 5 % to 85 % (no condensation) RCA pin jack.........................................................................2 sets
MIC input terminal
Audio Section XLR connector/phone jack (Ø 6.3 mm) ................................. 1 set
Sampling rate ........................................................................ 96 kHz RETURN Input terminals
MASTER D/A converter..........................................................24 bits Phone jack (Ø 6.3 mm).......................................................... 1 set
Other A/D and D/A converters................................................24 bits MASTER output terminal
Frequency characteristic XLR connector....................................................................... 1 set
CD/LINE ...............................................................20 Hz to 20 kHz RCA pin jacks ........................................................................ 1 set
S/N ratio (rated output, A-WEIGHTED) BOOTH output terminal
PHONO ................................................................................92 dB RCA pin jacks ........................................................................ 1 set
CD/LINE .............................................................................106 dB REC OUT output terminal
C MIC.......................................................................................84 dB RCA pin jacks ........................................................................ 1 set
Total harmonic distortion (20 kHzBW) SEND output terminal
CD/LINE — MASTER1..................................................... 0.004 % Phone jack (Ø 6.3 mm).......................................................... 1 set
Standard input level / Input impedance DIGITAL MASTER OUT coaxial output terminal
PHONO ................................................................. –52 dBu/47 kΩ RCA pin jacks ........................................................................ 1 set
CD/LINE ................................................................ –12 dBu/47 kΩ PHONES output terminal
MIC....................................................................... –52 dBu/8.5 kΩ Stereo phone jack (Ø 6.3 mm) .............................................. 1 set
RETURN................................................................ –12 dBu/49 kΩ USB terminal
Standard output level / Load impedance / Output impedance B type .................................................................................... 1 set
MASTER1........................................+6 dBu/10 kΩ/360 Ω or lower CONTROL terminal
MASTER2........................................+2 dBu/10 kΩ/390 Ω or lower Mini phone jack (Ø 3.5 mm) .................................................2 sets
REC OUT ..........................................–8 dBu/10 kΩ/22 Ω or lower
BOOTH............................................+2 dBu/10 kΩ/390 Ω or lower • The specifications and design of this product are subject to
D
SEND.............................................–12 dBu/10 kΩ/390 Ω or lower change without notice.
PHONES ..........................................+8.5 dBu/32 Ω/10 Ω or lower • Be sure to use the [MASTER1] terminals only for a balanced
Rated output level / Load impedance output. Connection with an unbalanced input (such as RCA)
MASTER1.............................................................. +24 dBu/10 kΩ using an XLR to RCA converter cable (or converter adapter), etc.,
MASTER2.............................................................. +20 dBu/10 kΩ may lower the sound quality and/or result in noise.
For connection with an unbalanced input (such as RCA), use the
[MASTER2] terminals.
E
Accessories
• Driver software/operating instructions CD-ROM
(DXX2726)
• USB cable
(DDE1128)
• Power cord
(SYXJ8, LXJ: ADG7062)
(UXJCB: DDG1108)
(KXJ5: ADG7115)
(XJCN5: ADG7105)
• Read Before Use (Important)/Quick Start Guide
(SYXJ8: DRH1205)
F (UXJCB: DRH1206)
(LXJ: DRH1216)
(KXJ5: DRH1219)
(XJCN5: DRH1218)
6 DJM-750-K
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3. BASIC ITEMS FOR SERVICE

3.1 CHECK POINTS AFTER SERVICING
A
Items to be checked after servicing / DJM
To keep the product quality after servicing, confirm recommended check points shown below.
No. Procedures Check points
The firmware version must be the latest one.
1 Check the firmware version in Test mode.
If it is not the latest one, be sure to update it.
Confirm whether the customer complain has been solved.
If the customer complain occurs with the specific source, such as The customer complain must not be reappeared.
2
Mic, each Input, Fader, Equalizer, and Trim, input that specific Audio and operations must be normal.
source for checking.
Check the analog audio input
3 (Check the MIC and RETURN.) (Make the analog connections Audio and operations must be normal. B
with CDJ player, analog player and MIC.)
Check the analog audio output (MASTER1, 2, REC, BOOTH and
4 Audio and operations must be normal.
SEND.) (Make the analog connection with CDJ player.)
5 Check the digital audio input/output Audio for each channel and operations must be normal.
6 Check DVS signal route. Make sure that PC applications function properly and that the
audio signals and operations of each channel are normal.
7 Check the headphones output. There must be no errors, such as noise, in the audio output.
Check playback, using the fader function.
There must be no errors in audio output and operations of each
8 (Select the fader function then check operations of each channel
channel.
with audio signals via the DSP.)
Check the connection of each interface.
9 C
USB B The device must be properly recognized by the PC.
Make sure that all buttons and controls on the main unit
10 Check the buttons and controls.
function properly.
11 Check the FL displays and LEDs. Check that all the FL displays and LEDs light in Test mode.
13 Check the user settings. They must be returned to those set before repair.
13 Check the appearance of the product. No scratches or dirt on its appearance after receiving it for service.
See the table below for the items to be checked regarding audio.
Item to be checked regarding audio
Distortion
D
Noise
Volume too low
Volume too high
Volume fluctuating
Sound interrupted
3.2 JIGS LIST E
Jigs List
Jig Name Part No. Purpose of use / Remarks
USB cable GGP1193 for PC connection
Lubricants and Glues List
Name Part No. Remarks

F
Silicon grease GEM1057 Refer to "9.3 BOTTOM SECTION".
Lubricating oil GYA1001 Refer to "9.4 CONTROL PANEL SECTION (1/2)".
DJM-750-K 7
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3.3 PCB LOCATIONS
A MIC1 ASSY B
MTRM ASSY C F USBI ASSY A INPUT ASSY
• Bottom view
R ACSW
ASSY
B PNLA H Q PRIMARY
ASSY ASSY
D MAIN
ASSY
PNLB I E SEC/HP
ASSY ASSY
FADC J
C ASSY
G HPJK ASSY O REG ASSY P TRANS ASSY

FAD1 ASSY K N FAD4 ASSY
SHADE2
ASSY
SHADE1
ASSY
D
FAD2 ASSY L M FAD3 ASSY
NOTES: - Parts marked by “NSP” are generally unavailable because they are not in our Master Spare Parts List.
- The > mark found on some component parts indicates the importance of the safety factor of the part.
Therefore, when replacing, be sure to use parts of identical designation.
Mark No. Description Part No. Mark No. Description Part No.
LIST OF ASSEMBLIES
NSP 1..MOTHER ASSY DWM2488 NSP 1..SUB ASSY (SYXJ8, KXJ5, XJCN5) DWM2492
2..MAIN ASSY DWX3430 NSP 1..SUB ASSY (UXJCB) DWM2493
E 2..USBI ASSY DWX3431 NSP 1..SUB ASSY (LXJ) DWM2490
2..ACSW ASSY DWR1532
NSP 1..AUDIO ASSY DWM2489 2..PRIMARY ASSY (SYXJ8, KXJ5, XJCN5) DWR1535
2..REG ASSY DWR1528
2..SEC/HP ASSY DWR1529 2..PRIMARY ASSY (UXJCB) DWR1537
2..INPUT ASSY DWX3432 2..PRIMARY ASSY (LXJ) DWR1530
2..HPJK ASSY DWX3433 2..TRANS ASSY (SYXJ8, KXJ5, XJCN5) DWR1536
2..TRANS ASSY (UXJCB) DWR1538
2..FAD1 ASSY DWX3434 2..TRANS ASSY (LXJ) DWR1531
2..FAD2 ASSY DWX3435
2..FAD3 ASSY DWX3436 2..PNLB ASSY DWX3440
2..FAD4 ASSY DWX3437 2..MIC1 ASSY DWX3441
2..FADC ASSY DWX3438 2..MTRM ASSY DWX3442
2..SHADE1 ASSY DWX3479
F
2..SHADE2 ASSY DWX3483
1..PNLA ASSY DWX3439
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4. BLOCK DIAGRAM
4.1 OVERALL WIRING DIAGRAM
A SCREW PLATE CH1
KN4601 JA4001
- When ordering service parts, be sure to refer to "EXPLODED VIEWS VNE1948-A DKB1083-
and PARTS LIST" or "PCB PARTS LIST".

- The > mark found on some component parts indicates the importance
MIC1
of the safety factor of the part. JA9001
MIC1_COLD
MIC1_COLD
DKB1108-A
MIC1_HOT
MIC1_HOT
Therefore, when replacing, be sure to use parts of identical designation. PHO
CKS3533-A
CD/LINE
GNDA
GNDA
- : The power supply is shown with the marked box.
CN9001
C B
1
6
2
6P BtoB
MIC1 ASSY
CKS3561-A
MTRM ASSY
CN4601
(DWX3441
2
6
1
PF03PP-B05 PF03PP2B05 PF03PP-B05 PF03PP2B05
(DWX3442)
MIC1_COLD
MIC1_COLD
MIC1_HOT
MIC1_HOT
1 V+3R3D_REFA
3 V+3R3D_REFA
1 V+3R3D_REFA
3 V+3R3D_REFA
GNDA
GNDA
3 GNDD_REFA
1 GNDD_REFA
1 GNDD_REFA
3 GNDD_REFA
2 VR_FADER1
2 2 VR_FADER2
2 2 VR_FADER3
2 2 VR_FADER4
L= 50mm L= 50mm L= 50mm L= 50mm
WHITE RED WHITE RED
KM200NA3R
KM200NA3R
KM200NA3
KM200NA3
CN8801 CN4602
B
CN6609
CN6612
CN6610
CKS3533-A CKS3561-A
CN6611
GND_PO
GND_PO
KM200NA4L
V+15A
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
V-15A
MIC1_TRIM_IN 6 6 MIC1_TRIM_IN
2
CN4801
1
3
1
3
1
6P BtoB
MIC1_TRIM_IN 5 5 MIC1_TRIM_IN
GND_MIC1 4 4 GND_MIC1
VKN1868-A
KM200NA3L
KM200NA3L
4
1
KM200NA3LR
CN4802
KM200NA3LR
CN7601
GND_MIC1 3 3 GND_MIC1
CN7801
CN7201
CN7401
2
2
3 V+3R3REF2 3
1 V+3R3REF2 1
3
3 V+3R3REF2 3
MIC1_TRIM_OUT 2 2 MIC1_TRIM_OUT
1 V+3R3REF2 1
3
MIC1_TRIM_OUT 1 1 MIC1_TRIM_OUT
3 GNDREF2
1 GNDREF2
1 GNDREF2
3 GNDREF2
2 VR_FD3
2 VR_FD4
2 VR_FD2
2 VR_FD1
CONTROL DIGITAL
SCREW PLATE
JA202 JA203
OUT
KN201 JA3401
K L M N VNE1948-A XKN3017-B XKN3017-B DKB1089-A
CH2 CH3
FAD1 ASSY FAD2 ASSY FAD3 ASSY FAD4 ASSY CN6601

VKN1839-A
VKN1428-A-TBB
CN1001
USBI ASSY
(DWX3434) (DWX3435) (DWX3436) (DWX3437) V+3R3D
GNDD
24
23
24
23
V+3R3D
GNDD
(DWX3431)
GNDD 22 22 GNDD
C
F
FPGA_CLK 21 21 FPGA_CLK
GNDD 20 20 GNDD
H H 1/2, H 2/2
VKN1429-A-TBB
FPGA_RX_DAT 19 19 FPGA_RX_DAT
GNDD 18 18 GNDD
CN1003
FPGA_TX_DAT 17 17 FPGA_TX_DAT JA3801
B Type DKN1237-A
3
GNDD 16 16 GNDD
PNLA ASSY
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
SUB_INT SUB_INT
GND_USB
GND_USB
15 15
V+5VBUS
SUB_CTRL DDD1628- SUB_CTRL
D+USB
14 14
D-USB
KM200NA5L
FPGA_SIGAL 13 13 FPGA_SIGNAL
24P FFC
(DWX3439)
CN3801
SUB_CPU_RESET 12 12 SUB_CPU_REST
GNDD 11 11 GNDD
L=264mm
5
CN6603 GNDD 10 10 GNDD
VKN1842-A P=1.0mm
GNDD 9 9 GNDD
27 LED_OUT15 V+R3D_REFA 8 8 V+3R3D_REFA
26 MTX_SEL7A GND_REFA 7 7 GND_REFA
25 GND_LED VR_FADER4 6 6 VR_FADER4
24 NC VR_FADER3 5 5 VR_FADER3
23 GNDD CROSS_FADER 4 4 CROSS_FADER
22 EFX_CH_SEL VR_FADER2 3 3 VR_FADER2
21 KEY_IN3 VR_FADER1 2 2 VR_FADER1
20 ENC1_1 GND_REFA 1 1 GND_REFA
DDA1043-
19 KEY_IN4 L=170mm PH
18 ENC1_0
SHIELDED
17 KEY_IN5 V+5D_LED 17
V+5D_LED
AKM1276-A-TBB
17
16 MTX_SEL5 GNDD_LED 16
16 GNDD_LED
D 15 V+5D_LED 15
CN2602
KEY_IN6 15 V+5D_LED
14 MTX_EL6 GNDD_LED 14
14 GNDD_LED
5
13 KEY_IN7 V+5D_LED 13
13 V+5D_LED
GND_USB
GND_USB
DDD1629-
V+5VBUS
D+USB
D-USB
12 MTX_SEL7 GNDD_LED 12
12 GNDD_LED
11 EFX_ON/OFF V+5D_LED 11
11 V+5D_LED
10 GNDD_REFB_PA GNDD_LED 10 17P FFC 10 GNDD_LED
GNDD 9
DDD1601- 9 GNDD
L=264mm 9 GNDD
HP_MIX V+34D 8
27P FFC 8
P=1.0mm
8 V+34D
7 V+R3_REFA_PA GNDD 7
7 GNDD
L=346mm 6 HP_LEVEL GNDD_34D 6
6 GNDD_34D
P=1.0mm 5 CROSS_FADER EFX_ON/OFF 5
5 EFX_ON/OFF
4 LEVEL_DEPTH MVR_MUTE 4
4 MVR_MUTE
3 GNDD_REFA_PA V+3R3E 3
3 V+3R3E
REVERSE 2 BOOTH_LEVEL STBY_KEY 2
2 STBY_KEY
1 V+3R3_REFB_PA STBY_LED 1
1 STBY_LED
CN6602 VKN1421-A-TBB
VKN1248-A
CN1002
CN7001
PNLB ASSY
GND_PO
VKN1842-A
I
V+15A
KM200NA4
E
(DWX3440)
LED_OUT15 27
CN2
LED_MTX_SEL7A 26
PF04PP-S17
2
1
GND_LED 25
L=175mm
NC 24
GNDD 23
EFX_CH_SEL 22
KEY_IN3 21
ENC1_1 20
KEY_IN4
ENC1_0
KEY_IN5
19
18
17
HPJK ASSY
FADC ASSY (DWX3433)
J
MTX_SEL5 16
KEY_IN6 15
(DWX3438)
MTX_SEL6 14
KEY_IN7 13
MTX_SEL7
EXF_ON/OFF
GNDD_REFB_PA
GNDD
12
11
10
9
G CN9201
KM200NA4L
CN101
KM200NA4 S
HP_MIX 8
CN7002 CN8001 JA9201
V+3R3_REFA_PA
CROSS_FADER
HP_LEVEL
7
5
3 V+3R3REF2 3
2 VR_CFD 2
KM200NA3E KM200NA3LE
3
2
3 V+3R3REF2
2 VR_CFD
DKN1622-A HP_L_OUT
GNDHP
GNDHP
1
3
1
3
HP_L_OUT
GNDHP
GNDHP
(
1 1
1 GNDREF2 1 GNDREF2 HP_R_OUT 4 4 HP_R_OUT
LEVEL_DEPTH 4 PHONES
GNDD_REFA_PA 3
F BOOTH_LEVEL 2
V+3R3_REFB_PA 1 PF03PP6B07
L= 75mm PF04PP-S05
BLUE L=50mm
10 DJM-750-K
1 2 3 4
5 6 7 8
SCREW PLATE CH1 CH2 CH3 CH4 RETURN A

KN4601 JA4001 JA4002 JA4201 JA4202 JA4401 JA4402 AC POWER CORD AC POWER CORD
VNE1948-A DKB1083-A DKB1083-A DKB1083-A DKB1083-A DKN1654-A DKN1652-A SYXJ8/LXJ:ADG7062
UXJCB:DDG1108
KXJ5:ADG7115
L L L L XJCN5:ADG7105
R R R R L(MONO) R AC INLET ASSY AC INLET ASSY

UXJCB: DKP3915-A SYXJ8/KXJ5/XJCN5/LXJ
PHONO LINE LINE PHONO :DKP3916-A
CD/LINE CD/LINE CD/LINE CD/LINE
B ACSW ASSY
(DWR1532)
MIC1 ASSY A A 1/5 - A 5/5
(DWX3441) R
!
INPUT ASSY (DWX3432)
!
L N
JP9401
L N DKP3847-A
L=60mm B
KM200NA4L
GNDIN_CH3
GNDIN_CH3
GNDIN_CH3
GNDIN_CH3
GNDIN_CH4
GNDIN_CH4
GNDIN_CH4
GNDIN_CH4
GNDIN_CH4
GNDIN_RET
GNDIN_RET
GNDIN_RET
GNDIN_RET
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_CH1
GNDIN_CH1
GNDIN_CH1
GNDIN_CH1
GNDIN_CH1
GNDIN_CH2
GNDIN_CH2
GNDIN_CH2
GNDIN_CH2
GNDIN_CH2
GNDIN_MIC
V-15A
!
CN4801
CH3_SEL
CH4_SEL
!
CH1_SEL
CH2_SEL
RET_IN
CH3_R
CH4_R
RET_R
CH3_L
CH4_L
RET_L
CH1_R
CH2_R
!
CH1_L
CH2_L
L N
VKN1865-A
VKN1868-A
MIC
4
CN4802
CN4803
BLUE VIOLET
L N
10
11
12
13
14
15
16
17
18
19
20
21
22
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
9
1
CN3001 1 2
RKP1751-A ! 2 1 !
LIVE NEUTRAL CN3002
DIGITAL BOOTH MASTER1 SEND B2P3-VH
OUT JA501 JA401 JA301 JA302 JA601 JA602
JA3401
DKB1089-A AKB7181-A DKB1083-A DKB1093-A DKB1093-A DKN1652-A DKN1652-A
L L
DDD1597- L L(MONO) R
R
ASSY 25P FFC
L=70mm
R R
L R
3431) P=1.0mm MASTER2
REC
DDD1598- C
CN1201 JP3001
VKN1429-A-TBB
L=70mm P=1.0mm 22P FFC AKM1274-A-TBB PF03PG-Q07 (L=75mm)

VKN1426-A-TBB
CN1004
CN1003
JA3801 V+11E_UNREG 3 3 V+11E_UNREG

KN1237-A
10
11
12
13
14
15
16
17
18
19
20
21
22
1
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
GNDD 2 2 GNDD
GNDIN_CH3
CH3_L
GNDIN_CH3
CH3_SEL
GNDIN_CH3
CH3_R
GNDIN_CH3
GNDIN_CH4
GNDIN_CH4
CH4_L
GNDIN_CH4
CH4_SEL
GNDIN_CH4
CH4_R
GNDIN_CH4
GNDIN_RET
GNDIN_RET
RET_L
GNDIN_RET
RET_IN
GNDIN_RET
RET_R
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_CH1
GNDIN_CH1
CH1_L
GNDIN_CH1
CH1_SEL
GNDIN_CH1
CH1_R
GNDIN_CH1
GNDIN_CH2
GNDIN_CH2
CH2_L
GNDIN_CH2
CH2_SEL
GNDIN_CH2
CH2_R
GNDIN_CH2
RELAY_CONT 1 1 RELAY_CONT
MIC
KM200NA5L
Board In
CN3801
Q
PRIMARY ASSY
(DWR1535: SYXJ8, KXJ5,
DDA1043-
L=170mm PH
SHIELDED D D 1/19 - D 19/19 XJCN5 )
(DWR1537: UXJCB)
AKM1276-A-TBB
MAIN ASSY (DWX3430) (DWR1530: LXJ)

D
CN2602
5
LXJ
POWER_RESET_A
Except LXJ
CN3004 CN3003
V+13D_UNREG
B2P3-VH B3P5-VH
GNDA_HP
GNDA_HP
GND_PO
GND_PO
AKP7199-A
! !
HP_R+
HP_L+
V+15A
HP_R-
GNDD
GNDD
GNDD
PF13EE-S17
HP_L-
GNDA
GNDA
V-15A
MUTE
V+5A
3
CN1005
NEUTRAL
220-240V
110-120V
L=175mm
19
18
17
16
15
14
13
12
11
10
19P BRIDGE CONNECTOR
Except LXJ
AKM7077-A
GND_PO
GND_PO
CN3101
CN3
V+15_AC 13 13 V+15_AC
19
18
17
16
15
14
13
12
11
10
V+15A
S13B-EH
V-15A
KM200NA4
GNDF 12 12 GNDF Board In

GNDD
GNDD
POWER_RESET_A
MUTE
GNDD
V+13D_UNREG
GND_PO
V-15A
GND_PO
V+15A
GNDA
GNDA
HP_L+
GNDA_HP
HP_L-
GNDA_HP
HP_R-
HP_R+
V+5A
P=2.5mm
! JP3101:DDX1285-A LXJ
E
P
V+5A_AC1 11 11 V+5A_AC1
CN2
04PP-S17 L=140mm 3pin for LXJ

2
4
1
V+5A_AC2 10 10 V+5A_AC2
75mm GNDF 9 9 GNDF ! JP3102:DDX1284-A
V-15_AC 8 8 V-15_AC L=140mm 2pin for EXCEPT LXJ
TRANS ASSY
GNDA 7 7 GNDA
V+13D_AC1 6 6 V+13D_AC1
V+13D_AC2 5 5 V+13D_AC2
GNDD
GNDHP
4
3
4
3
GNDD
GNDHP
(DWR1536: SYXJ8, KXJ5, XJCN5)
V+HP_AC
V-HP_AC
2
1
2
1
V+HP_AC
V-HP_AC
(DWR1538: UXJCB)
CN1
(DWR1531: LXJ)
E E 1/2, E 2/2 CN4
B13B-EH
P=2.5mm
CN5001
52147-1010 52147-1010
SEC/HP ASSY P=2.0mm
O
V+5A_UNREG 10 1 V+5A_UNREG
GND5A_UNREG 9 2 GND5A_UNREG
(DWR1529) GND5A
V+5A
8
7
3
4
GND5A
V+5A
V-15A
REG ASSY
V-15A 6 5
V-15A_UNREG 5 6 V-15A_UNREG
GNDA_UNREG 4 7 GNDA_UNREG
V+15_UNREG
GND_PO 3
2
8
9
GND_PO
V+15A_UNREG
(DWR1528) F
V+15A 1 10 V+15A
D20PYY1010E
L=100mm
DJM-750-K 11
5 6 7 8
1 2 3 4
4.2 SYSTEM BLOCK DIAGRAM
SUB ucom
A
IC6601
DYW1830
KEY MATRIX
(UPD78F1162AGF) CSI(SPI)
KEY_IN0 to 7
VR MATRIX
VR_IN1 to 6
MAI
VR_FADER1
K FAD1 ASSY Channel 1 Fader IC
DYW
VR_FADER2
L FAD2 ASSY Channel 2 Fader
Serial FLASH (4Mbit)
(UPD78
VR_FADER3 IC2802 SPI

M FAD3 ASSY Channel 3 Fader
DYW1828
B VR_FADER4
16bit
N FAD4 ASSY
S
MX25L4006EM2I-12G
SPI
Channel 4 Fader
• Blackfin Flash
CROSS_FADE
J FADC ASSY Cross Fader • FPGA Flash
EFFECT_ON/OFF
EFFECT_ON/OFF SPI(Boot)
SPI
XC3S5
MX25L4006EM2I-12G Serial FLASH (4Mbit)
• DSP IC3008 D
A INPUT ASSY DYW1829
SDRAM (256M)
IC3202
M12L2561616A-5TG2A-K
DSP_BUS
16bit
16bit
BUS
SPI
BUS
EMIF B
C B MIC1 ASSY IC4601
NJM4580MD
IC4601
NJM4580MD DSPB_BUS_CLK
MIC (mono) 5 7 3 1 98.304MHz
ADC(single)
9 ADAT_D
1 IC2401 ADAT_MIC_AN
AK5358AET
IC1602
IC4002 NJM4580MD
NJM2121MD
3 1 7
7
Channel 1
5 4 5
CD/LIN CH1_L ADC(differntial)
5 IC1604 15 ADAT_CH1_
7 1 PCM1804DB
PHONO RIAA 7
1 CH1_TRIM 5
2
CH1_R 25 24 ADAT_MAS
2
IC4001 SELEC IC1601
NJM4580D NJM4580MD
IC4004 IC1802
NJM2121MD NJM4580MD
3 1 7
Channel 2
7
LINE 5
CH2_L
4 5
ADC(differntial)
5
D 5 7 1
IC1804 15 ADAT_CH2_
CD/LIN 1 CH2_TRIM 2
CH2_R 25 24 PCM1804DB
2
IC1801
SELEC NJM4580MD
ADAT_
IC4202 IC2002
NJM2121MD NJM4580MD
3 1 7
Channel 3
7
LINE 5 CH3_L
4 5
ADC(differntial)
ADAT_BO
5 IC2004 15 ADAT_CH3_ DSP
CH3_TRIM 5 7 1 CH3_R PCM1804DB
CD/LIN 2
1
2
25 24
SELEC IC2001
NJM4580MD IC3201
IC4204 IC2202
NJM4580MD
D810K013DZKB400-K
NJM2121MD
Channel 4
3 1 7
CD/LIN 7
5 CH4_L 4 5
ADC(differntial)
5 IC2204 15 ADAT_CH4_A
PHONO RIAA 7 1 CH4_TRIM
5 7 1
CH4_R 25 24 PCM1804DB
ADAT_S
2 2
IC4201 SELEC IC2201

NJM4580D NJM4580MD
E
IC4401
NJM4565MD
RETURN 3 1 2 ADC(single)
IC2402 9
(TS)
5 7 1
AK5359ET
ADAT_RETURN_
ADAT
MIDI_TXD_USB
F USBI ASSY UART(Downloard & other)

SPI (Boot)
ADAT_USBIN1
USB B ADAT_USBIN1
USB differential 90Ω ADAT_USBIN2 ADAT_U
USB Ucom ADAT_USBIN3
ADAT_USBIN2
CH1 to 4 ADAT_U
ADAT_USBIN3
ADAT_USBIN4
IC2603 ADAT_USBIN4 ADAT_U
ADSP-BF525BBCZ-5A-K
ADAT_U
F USB_S_CLK 106.5MHz
SDRAM (64M)
IC2604 16bit
M12L64164A-5TG2M-K
12 DJM-750-K
1 2 3 4
5 6 7 8
FL H PNLA ASSY
A nalog Audio A
LED Digital Audio

(MATRIX) MUT E signal
I PNLB ASSY C ontrol Signal
RESET_OUT
D MAIN ASSY PO WER
90 1 RESET IC
IC2801
S-80927CNMC-G8X
MAIN Ucom
IC2803
10
RELAY Control Q PRIMARY ASSY
DYW1827
MVR_MUTE(MASTER TRIM)
(UPD78F1166AGF) 11
SUB TRANS
CPU_MUTE
SPI
RELAY
(FPGA Boot)
MCPU_BUS
B
SPI
SPI
16bit
BUS
SPI
MAIN TRANS
oot) FPGA
IC3007 RESET
SPI
XC3S50A-4FTG256C
CONTROL Descrete
DPRAM Mute circuit
MUTE_OUT
CSI(SPI) DIT_SI/SO/SCK
Clock
SEP. soft SRC
DIGITAL DATA
(48k/96k)
DSP_BUS
16bit
CONTROL 2ch
BUS
SPI
EMIF A
CONTROL 3ch C
DIT
ADAT_DOUT IC3405 17 DIGITAL OUT
MIC_AN AK4114VQ
IC301 IC303
NJM4580MD NJM4580D
2 5
H1_ 10
35
3
1
6
7
ADAT_MASTER 11 5
MASTER 1
2
33 7 1
6 3
IC301 IC303
DAC NJM4580MD NJM4580D
IC201
PCM1691DCA-TBB 3 1 7
5 MASTER 2
H2_ IC402 D
NJM4580MD
IC401
NJM4565MD
ADAT_REC 9
39 2 1 7 REC
37 6
ADAT_BOOTH 8 43
2 1 7 BOOTH
H3_ DSP 41 6 (RCA)
IC501
NJM4580MD
IC3201
D810K013DZKB400-K
IC602
NJM4565MD
CH4_A DAC 11 2 1 7
SEND
ADAT_SEND 3 IC601 10 6 (TS)
AK4384ET
E
E SEC/HP ASSY G HPJK ASSY
IC101 IC102
ETURN_ DAC
12
NJM4565MD NJM4580D
ADAT_HP 3 IC1001 11
AK4382AVT 10 HEADPHONES
9
SBIN1 ADAT_UDOUT1
ADAT_USB1
SBIN2 ADAT_UDOUT2
SBIN3 ADAT_USB2
ADAT_UDOUT3
SBIN4 ADAT_USB3
ADAT_UDOUT4
ADAT_USB4
F
DJM-750-K 13
5 6 7 8
1 2 3 4
4.3 DSP BLOCK DIAGRAM
CHx in
B
CHx Timecode
Analog_PHONO Phono Level meter CHx Post CHx Fader
AMP BPM Detect CHx Select
CH1,4 Digital Channel Cross Fader Assign
Trim SOUND 3Band BEAT SOUND BEAT CUE Fader SOUND BEAT Thru
Analog_CD,LINE COLOR EQ/ COLOR
EFFECT COLOR EFFECT Monitor EFFECT CF A
EFFECT ISOLATOR EFFECT BPM Detec
EFFECT CHx CF B
CHx CHx CHx CHx CHx CHx
USB 2Position Send/ 3Position

Return CHx_CUE Cross S
CHx CH Fader Fader EC
Curve
Switch
Assign A
2Position CHx
C
CH1 - 4 COMMON S
C
E
Assign B
CHx Cross
Fader
Curve
Effect CH Select 3Position
Return in Beat CH x
Effect BPM Detec
Send/ CF A/B
Send out Return
MIC
Master
3Position
D 2Band Off
MIC MIC EQ On
MIC TalkOver
MIC MIC In
TalkOver ON/OFF
FILTER Level
Detect
BEAT EFFECT (SEND/RETURN) BEAT EFFECT (Others)

Effect SW
Effect CH Select SEND BEAT
Effect CH Select Level Depth Effect CH Select
No Cable
EFFECT Effect Out
Effect SW
Return
Level Effect CH Select
RETURN Effect Out
E SEL
Effect_C
Cable Exist
Cable Check Effect_C
14 DJM-750-K
1 2 3 4
5 6 7 8
Booth
Level
MIC_Out Booth
SEL
MIC Output
to Booth Monitor
On/Off SW
Rec Out B
BPM Detect Master REC out
Level meter Master

TalkOver ON/OFF
Assign Thru Boost Digital out
BPM Detect CF A CH 1 - 4 Master Master
Balance Level
SOUND BEAT Master
COLOR Talk Master MASTER
EFFECT EFFECT Mono/ Over CUE LIMITTER Master out1
Cross SOUND BEAT
COLOR
Fader EFFECT MASTER Master Stereo
EFFECT Master out2
CFA CF A Send/ 2Position
Return
Assign A Send/ Cross Fader A Master Master_CU
CHx Talk Over
Return Mode
CHx_CUE
Talk Over
CF A Advanced Level
HP
Effect_C Level
/Normal Mono Split / C
SOUND BEAT Master_CU Stereo SWITCH H.P. out
COLOR 2Parameter 4Parameter
EFFECT EFFECT & MIXING
CFB CF B
Assign B Send/ Cross Fader B
CHx Cross Return
CHx Timecode
Fader CF B Boost USB Common out
Curve Post CHx Fader
3Position Mixer
Cross Fader A
Audio
BPM Detect CF B Cross Fader B Output
Select
MIC
BPM Detect MIC MIC
Rec Out
3Position Master
Balance CH1 - 4 COMMON
Off SOUND BEAT D
COLOR
On EFFECT EFFECT MIC_Out
TalkOver MIC MIC
Send/
Return
MIC
Mono Split / Stereo SWITCH & MIXING

CHx Cue On/Off SW
Effect CH Select
CHx_CUE
Effect Out
Effect Cue On/Off SW Cue L
Mixing
Effect_CUE
Mono Split
H.P. MIX L Out
R E
Effect_C SEL Stereo
MONO SPLIT/
MIXING STEREO SWITCH
2Position
Mono Split
Master Cue On/Off SW Master L
Mixing SEL Stereo H.P. MIX R Out
Master_CU
DJM-750-K 15
5 6 7 8
1 2 3 4
4.4 CLOCK MAP

D MAIN ASSY SPI
CLK (2.5MHz)
0Ω
A DATA 0Ω
SPI
22Ω
CLK (2.5MHz)
DATA FLASH
100Ω
0Ω
22Ω 22Ω
MAIN BUS SPI

0Ω RD/WR(2.5MHz) 22Ω
CLK (7.246MHz)
MAIN UCOM
0Ω
ADRS/DATA 0Ω 22Ω
22Ω
SPI
22Ω
CLK (2.5MHz) 100Ω 22Ω
DATA 0Ω
22Ω 22Ω 22Ω 24.576MHz
0Ω
22Ω
SPI(BOOT) 0Ω
B CSS1795 22Ω
CLK (2.5MHz)
20.000MHz DATA 100Ω 100Ω
UART(312.5kHz)
6pF 6pF 22Ω 22Ω

FPGA 22Ω
6.144MHz
100Ω
SPI 56Ω
CLK (2.5MHz)
MIDI_TXD_USB (31.3kHz)
22Ω
DATA 22Ω 100Ω 100Ω
100Ω
96kHz
100Ω
DIV. 100Ω
SPI
DIV. SPI
Ω
CLK (15.13MHz) 22Ω CLK (15.13MHz)
FLASH DATA 22Ω
22Ω 22Ω
22Ω
DATA
100Ω 0Ω
100Ω 0Ω
Soft
0Ω 0Ω 100Ω 0Ω
SRC
22Ω 0Ω
0Ω
C 100Ω 100Ω
100Ω 100Ω
ASS7102
24.576MHz
22Ω 33Ω
WE/OE(16.384MHz)
CLK (15.13Hz)
MCK (24.576MHz)
ADRS/DATA
DSBA BUS
BCK (6.144MHz)
DATA
SPI
LRCK (96kHz)
ADATA (3.072MHz)
22Ω 22Ω 33Ω 33Ω
SPI0 EMIFA
100Ω
100Ω
100Ω
D 100Ω
MacASP0,1
100Ω
100Ω
100Ω
MacASP0,1
DSP
0Ω
DSPB BUS 100Ω

CLK(98.304MHz) 33Ω
EMIFB
100Ω
SDRAM 47Ω
ADRS/DATA 82Ω 100Ω
100Ω
22Ω
22Ω
100Ω
BF BUS 100Ω
CLK(106.5MHz) 68Ω
100Ω
EBIU
SDRAM 47Ω
ADRS/DATA USB UCOM 100Ω
68Ω
(Blackfin)
USB 2.0 0Ω
CMF USB2.0
(480MHz)
F USBI ASSY
F 1k Ω
0Ω
Connector
Connector
DSS1203
24.000MHz 12pF 10pF
USB B
16 DJM-750-K
1 2 3 4
5 6 7 8
SPI
Connector
Connector
K (2.5MHz) 0Ω
CLK (3.3MHz)
220Ω 100Ω
DATA DATA A
0Ω 220Ω SUB UCOM 100Ω 100Ω FL
DSS1180
6pF 6pF
20.000MHz
H PNLA ASSY
SPI
CLK (7.246MHz)
22Ω
0Ω
24.576MHz 22Ω
0Ω
B
100Ω
22Ω
6.144MHz 100Ω
56Ω
100Ω
100Ω
96kHz 100Ω MASTER
100Ω DAC
SPI
CLK (15.13MHz)
DATA
0Ω
0Ω
DIT 0Ω
0Ω
0Ω
0Ω
SEND DAC
0Ω
0Ω
C
2.7kΩ
22Ω 22Ω
0Ω
HP DAC
0Ω
SPDIF
0Ω
22Ω 22Ω
100Ω
MIC ADC
0Ω
68Ω
100Ω
22Ω 22Ω
100Ω
RETURN ADC
0Ω
DIGITAL OUT 100Ω
22Ω
0Ω
0Ω
CH1 ADC
100Ω
D
22Ω 22Ω
0Ω
CH3 ADC
0Ω
100Ω
100Ω
100Ω
0Ω
CH2 ADC
100Ω
100Ω 100Ω
100Ω
CH4 ADC
0Ω
100Ω
0Ω
Buffer standby
0Ω F
DJM-750-K 17
5 6 7 8
1 2 3 4
4.5 LED, KEY, VR ASSIGNMENTS

LED matrix
MTX_SEL1 MTX_SEL2 MTX_SEL3 MTX_SEL4 MTX_SEL5 MTX_SEL6 MTX_SEL7 MTX_SEL0
A LED_OUT0 LV1_OVER LV2_OVER LV3_OVER LV4_OVER LVms_L_OVER LVms_R_OVER TALK OVER
LED_OUT1 LV1_10 LV2_10 LV3_10 LV4_10 LVms_L_10 LVms_R_10 MIDI ON/OFF
LED_OUT2 LV1_7 LV2_7 LV3_7 LV4_7 LVms_L_7 LVms_R_7 FADER START2
LED_OUT3 LV1_4 LV2_4 LV3_4 LV4_4 LVms_L_4 LVms_R_4 FADER START3
LED_OUT4 LV1_2 LV2_2 LV3_2 LV4_2 LVms_L_2 LVms_R_2
LED_OUT7 LV1_-1 LV2_-1 LV3_-1 LV4_-1 LVms_L_-1 LVms_R_-1
LED_OUT11 LV1_-7 LV2_-4 LV3_-7 LV4_-7 LVms_L_-7 LVms_R_-7 CFX1(Noise) CFX4(Jet)
LED_OUT12 LV1_-10 LV2_-10 LV3_-10 LV4_-10 LVms_L_-10 LVms_R_-10 CFX2(Crush) CFX3(Filter)
LED_OUT13 LV1_-15 LV2_-15 LV3_-15 LV4_-15 LVms_L_-15 LVms_R_-15 BOOST
LED_OUT14 LV1_-24 LV2_-24 LV3_-24 LV4_-24 LVms_L_-24 LVms_R_-24 BOOST VR
B LED_OUT15 CH1 CUE CH2 CUE CH3 CUE CH4 CUE MASTER CUR EFX CUE EFFECT ON/OFF
: These buttons are lit dimly by software control.
: PNLB Assy
Except : PNLA Assy
KEY matrix
MTX_SEL0 MTX_SEL1 MTX_SEL2 MTX_SEL3 MTX_SEL4 MTX_SEL5 MTX_SEL6 MTX_SEL7
CH3 IN1 SELECT IN3 SELECT BEAT EFX
KEY_IN0 CH1 CUE - AUTO -
FADER START (CD/LINE) (CD/LINE) SELECT
CH2 IN1 SELECT IN3 SELECT BEAT EFX
KEY_IN1 CH2 CUE CH4 CUE MASTER CUE CH3 CUE
FADER START (USB) (USB) SELECT
MIC ON/OFF IN2 SELECT IN4 SELECT BEAT EFX
KEY_IN2 MIDI ON/OFF - BOOST EFX CUE
(OFF) (CD/LINE) (CD/LINE) SELECT
MIDI MIC ON/OFF IN2 SELECT IN4 SELECT HP MONO/ST MASTER BEAT EFX
KEY_IN3 -
C START/STOP (TALK OVER) (USB) (USB) (MONO) MONO/ST SELECT
CRFD ASSIGN EQ/ISO CRFD CURVE
KEY_IN4 - - - - -
CH2 (B) (ISOLATOR) (right)
CRFD ASSIGN CHFD CURVE CRFD CURVE
KEY_IN5 - - - - -
CH2 (A) (left) (left)
CRFD ASSIGN CRFD ASSIGN CRFD ASSIGN
KEY_IN6 - - - - -
CH3 (B) CH4 (B) CH1 (B)
CRFD ASSIGN CRFD ASSIGN CRFD ASSIGN
KEY_IN7 - - - - -
CH3 (A) CH4 (A) CH1 (A)
: PNLB Assy
Except : PNLA Assy
VR Assignment (AD port)
Microcomputer Pin No. Signal Name Route VR point
CH3_EQ_HI
D
CH4_TRIM
Pin 52 VR_IN1
CH3_TRIM
CH4_EQ_HI
CH1_EQ_HI
CH2_TRIM
Pin 53 VR_IN2
CH1_TRIM
Multiplexer CH2_EQ_HI
VR_SEL_0_0
VR_SEL_0_1 CH2_EQ_MID
CH3_EQ_LOW
Pin 54 VR_IN3
CH3_EQ_MID
CH2_EQ_LOW
SUB UCOM MIC_EQ_HI
(PNLA ASSY IC6601) CH1_EQ_LOW
E Pin 55 VR_IN4
CH1_EQ_MID
MIC_EQ_LOW
Pin 56 VR_master Direct in AD port MASTER_LEVEL
Pin 57 VR_boost Direct in AD port BOOST
CH4_EQ_LOW
HP_MIX
Pin 58 VR_IN5
CH4_EQ_MID
Multiplexer EFX_CH_SEL
VR_SEL_1_0
VR_SEL_1_1 LEVEL/DEPTH
BOOTH_LEVEL
Pin 59 VR_IN6
MASTER_BALANCE
HP_LEVEL
Pin 52 VR_FADER4 Direct in AD port CH4_FADER
F
MAIN UCOM
Pin 54 VR_FADER_CRS Direct in AD port CROSS_FADER
(MAIN ASSY IC2803)
18 DJM-750-K
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4.6 POWER BLOCK DIAGRAM
A
D MAIN ASSY
T3001
SUB_TRANS.
IC1401 MAIN UCOM
V+11E_UNREG NJM2831F33 (IC2803)
(7.2 to 18V) 5 4 V+3R3E
LDO
FUSE reset 10 Relay Cont
2200uF signal
FU1 /25V 90
11 MUTE
B
V+11E_UNREG
MAIN TRANS. IC1403
V+13D_UNREG NJM2392M
(9.7 to 17V) 6 1
DDC V+34D (for FL)
Relay Cont
6800uF
/25V
IC1404
BD9325FJ
2 3
DDC V+5LED (for FL, LED, etc.)
IC1406
NJM2878F3-33
5 4
LDO V+3R3D_REFA
(for MAIN_UCOM, SUB_UCOM) C
IC1405
BD9328EFJ
2 3
DDC V+3R3D
IC1407
S-1132B25-U5
5 1
LDO V+2R5D (for USB UCOM)
IC1408
BD9328EFJ
2 3
DDC V+1R2D
(for DSP, FPGA, USB UCOM)
V+5A (for ADC/DAC)
IC1402
S-1132B33
5 1 D
LDO V+3R3A (for ADC)
IC5001
NJM7805FA
V+5A_UNREG
REG
100uF
/10V
IC5002
NJM7815FA
V+15A_UNREG
REG V+15A (for Opamp)
6800uF 3300uF 100uF E
/16V /35V
/25V
3300uF IC5003 100uF
/35V NJM7915FA
/25V
REG V - 15A (for Opamp)
V-15A_UNREG
P101
V+HP_UNREG Poly
V+HP_UNREG_1 (for HP_Tr)
SW
1000uF
/25V
1000uF
/25V F
V - HP_UNREG
V - HP_UNREG_1 (for HP_Tr)
DJM-750-K 19
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5. DIAGNOSIS
5.1 POWER ON SEQUENCE
A Startup Sequence
* The signals indicated in blue boldface are those described in the Power Reset Muting Chart section.
FPGA MAIN UCOM SUB UCOM USB UCOM DSP Remarks
Program start
MUTE setting ON
Reset Reset
Canceling reset of MAIN Flash
MAIN UCOM Abnormal detection

ROM error check
B
Fail-safe state acquisition
(Internal ROM / FLASH)
Starting power supply to the peripheral ICs
FPGA_xPGM setting to LOW
FPGA_xPGM setting to HI
Starting FPGA configuration
FPGA_xINIT wait
FPGA_xINIT setting to HIGH

Accepting FPGA configuration Abnormal
detection SETUP LED
C FPGA communication check 1
FPGA_xINIT=LOW flashes endlessly
Loading data into FPGA
FPGA_DONE wait
FPGA_DONE setting to HIGH

Completion of FPGA configuration Abnormal
detection SETUP LED
FPGA communication check 2
FPGA_DONE=LOW flashes endlessly
Canceling reset (FPGA_RESET)
DPRAMvalidation
D System initialization
Starting power supply to FL
Canceling reset (SUB_CPU_RESET)
Program start
FL display start
[DJM-750]
NEC_B_CTRLsetting to LOW
Inhibiting and cancelling
SUB UCOM from accessing FPGA
DIT, DAC reset cancel
(DIT_RESET/AD_DA_RESET)
The unit goes into an infinite loop
E because FL display data have
not been input. FL display freezes.
Loading of setup data
The FL display freezes.
Abnormal SETUP LED

power supply, voltage check detection flashes endlessly
after that monitor it and be continued
VDET=LOW
SETUP LED
flashes four times
Abnormal
detection SETUP LED
SUB UCOM communication check
flashes five times
Notifying of version
(Initialization completion)
Obtaining KEY data

F
20 DJM-750-K
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FPGA MAIN UCOM SUB UCOM USB UCOM DSP Remarks
Operation mode judgment
Notifying of operation mode
Canceling reset of DSP FLASH
Canceling reset (DSP_RESET)
Canceling reset (USB_RESET)

(Wait from reset cancellation of the DSP for several msec.) B
Program start
MAIN UCOM -DSP
Handshake request
MAIN UCOM-DSP Abnormal

Standby for handshake request
detection SETUP LED
DSP communication check 1
flashes once
Notifying of version
(Initialization completion)
MAIN UCOM -DSP

Handshake response
MAIN UCOM-DSP
MAIN UCOM-DSP Standby for handshake request C
Handshake response
Boot loader start
Loading of USB UCOM firmware
Program start
standby USB_HWAIT
Multitasking start
Process for main communication start
USB_HWAIT setting to LOW

Abnormal
detection SETUP LED D
USB communication check 1
HWAIT=HI flashes six times
USB function start permission
Standby for USB function start response Permission for USB function start
Completion of USB function start

SETUP LED
USB communication check 2
Abnormal flashes six times
detection
USB function activation
USB UCOM version request
Standby for USB UCOM version response
E
Notifying of USB UCOM version
USB communication check 3 SETUP LED

Abnormal flashes six times
detection
Notifying of completion of
normal DSP startup
Initialization process of MAIN UCOM Abnormal

detection SETUP LED
DSP communication check 2
flashes once
Entering main loop Entering main loop KEY input reception

Notifying of completion of
input selector, automatic start information
USB communication start

F
MUTE setting OFF MUTE OFF
(CPU_MUTE) Startup complete
DJM-750-K 21
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A Power Reset Mute Timing Chart

* The signals indicated in blue boldface are those described in the Startup Sequence section.
When the unit is turned ON or returned to ON When the unit is turned OFF or shifts to Standby
from Standby mode mode
* Standby mode differs from OFF only in the UNREG-system power.
The sequence starts from here LEDs dimly lit MUTE canceled The sequence starts from here
Indications on the FL display start.
when STBY mode is canceled. when the unit shifts to STBY mode.
AC AC
V+11_UNREG V+11_UNREG
B
V+3R3E V+3R3E
Behavior dependent upon hardware
RESET_OUT RESET_OUT
T1 T27stby: The same time as T26 T27off: The same time
RELAY_CONT RELAY_CONT as RESET_OUT
UNREG power UNREG power
Audio-system Audio-system
power power
T2 (10 ms after T1) T26: 15 ms after T25
V+1R2D_CONT V+1R2D_CONT
V+1R2D V+1R2D
C V+3R3D_CONT V+3R3D_CONT
V+3R3D V+3R3D
V+2R5D V+2R5D
24.576MHz 24.576MHz
T4 (57 ms after T3)
FPGA_xPGM FPGA FPGA_xPGM
T5 (approx. 1250 ms after T4) T21: After T19 (0 ms, not controlled with software)
FPGA_RESET FPGA_RESET
T19: 5 ms after T16

Audio CLK Audio CLK

V+5D_CONT V+5D_CONT
V+5D, V+5LED V+5D, V+5LED

D V+3R3REF V+3R3REF
T7 (10 ms after T6) T24: The same time as T23
V+34D_CONT V+34D_CONT
V+34D V+34D
SUB_CPU_RESET SUB_CPU_RESET
DIT_RESET DIT_RESET
AD_DA_RESET AD_DA_RESET
T10 (approx. 670 ms after T9) T21: After T19 (0 ms)
DSP_RESET DSP_RESET
T11 (approx. 400 ms after T10) T16: 1 ms after T15
USB_RESET USB_RESET
T12 (approx. 4000 ms after T9) T15: 1.8 ms after T14
CPU_MUTE CPU_MUTE
E
MUTE MUTE
More than 600 ms after T1 (controlled by a timer) T14: Dependent on
hardware design T28: The same time as T26
Monitoring Monitoring Monitoring restarts.
POWER_RESET_A POWER_RESET_A
Classification
: Power
: Clock
: Hardware control signal
: MAIN control signal
22 DJM-750-K
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Simplified Power-Supply Block Diagram A
Power Sub V+3R3E

AC SW Trans. REG
V+1R2D
DC/DC
V+3R3D V+2R5D
DC/DC REG
V+5D V+3R3REF
DC/DC REG
V+34D
DC/DC
Main B
Trans. V+5A V+3R3A
REG REG
V+15A
REG
V-15A
REG
V+HP
UNREG
V-HP
UNREG
C
Power-on sequence Power-off sequence
[1] Supply of Standby power starts when the Power switch is set [1] A decrease in UNREG voltage starts when the Power switch is
to ON. Muting is activated (ON) set to OFF.
[2] MAIN UCOM reset is canceled when Reset IC voltage is detected. [2] The POWER_RESET_A signal level is changed from H to L
[3] Power supply to the main transformer starts when the when the Reset IC voltage is detected.
RELAY_CONT signal level is changed from L to H. [3] Muting is activated (ON) with CPU_MUTE.
Power supply to the audio system starts. [4] SUB UCOM, ADC, DAC, DIT, and USB UCOM are reset.
[4] V+1R2D supply starts when the V+1R2D_CONT signal level is [5] FPGA and DSP are reset. Audio-system CLK is stopped.
changed from L to H. [6] V+5D/V+34D supply is stopped by a change of the CONT
[5] V+3R3D supply starts when the V+3R3D_CONT signal level is signal level from H to L.
changed from L to H. Oscillation of 24.576 MHz starts. [7] V+3R3D supply is stopped by a change of the V+3R3D_CONT
[6] (After config files are read) FPGA reset is canceled. signal level from H to L.
Audio-system CLK output starts. [8] V+1R2D supply is stopped by a change of the V+1R2D_CONT D
[7] V+5D supply starts when the V+5D_CONT signal level is changed signal level from H to L.
from L to H. [9] The MAIN UCOM is reset when the Reset IC voltage is detected.
[8] V+34D supply starts when the V+34D_CONT signal level is [10] The main power supply is stopped by a change of the
changed from L to H. RELAY_CONT signal level from H to L.
[9] SUB UCOM reset is canceled. Indications on the FL display start. When the unit shifts to Standby mode, main power is stopped
[10] ADC/DAC/DIT reset is canceled. at the same time as in Step [8].
[11] DSP reset is canceled. [11] Muting is deactivated (OFF) with lowering of the MUTE voltage.
[12] USB UCOM reset is canceled.
[13] Muting is deactivated (OFF) with CPU_MUTE.
V+11E_UNREG
MUTE
[1][11] [10][4] ADC
[1][1] [13][3]
V+3R3E
DAC
Sub
AC AC REG E
Trans. Flash 24.576 MHz
[11][5] [5][5]
DSP
reset MAIN
[2] [2][9] [6] [5]
UCOM
reset CLK for
FPGA [6] Audio
[3][10] [12]
20 MHz
[4] Flash
Relay V+5A_UNREG
[4] [8] [5] [7] [7] [6] [8] [6] [9] USB 24 MHz
DD [4] UCOM
V+1R2D
con.
DD SUB
V+3R3D 20 MHz
con. UCOM
Main DD V+5D
Trans. con. F
V+13D_UNREG DD
V+34D
con.
Audio
DJM-750-K 23
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5.2 SIMPLIFIED DIAGNOSTIC PROCEDURE FOR AUDIO SIGNAL
A Simplified diagnostics for the audio signal blocks are possible, using the NOISE effect functions of this unit, as shown below.
Diagnostic procedure
1 In Test mode, check if any button, switch, VR, or LED functions improperly. (See "6.1 TEST MODE.")
If something is wrong, the PNLA or PNLB Assy is in failure. Repair the corresponding part on those Assys.
2 Check that white noise is output, using the NOISE effect function.
Operating Procedure for the NOISE Effect (Refer to the Operating Instructions for details.)
1. Set the Effect Channel Selector to MASTER.
2. Press the NOISE button of the COLOR FX selector so that it starts flashing. Flashing
3. Turn the COLOR control to the LOW or HI side.
B
* Make sure that no Master VR is set to its –∞ position.
* To check the PHONES output signal, be sure to set the Master CUE to ON.
Turn to the LOW
or HI side.
C Set to MASTER.
If white noise is audible: The blocks prior to the DSP can be deemed as being in failure.
If white noise is NOT audible: The DSP circuit and blocks subsequent to the DSP can be deemed as being in failure.
INPUT Assy MAIN Assy
MIC MIC1 Assy MTRM Assy

Master1
DSP Master2
Corresponding Corresponding
D
ADC IC3201 DAC REC
BOOTH
CH-system SEND
RETURN
SEC/HP HPJK
PHONES
Assy Assy
Possible defective locations when white noise is audible Possible defective locations when white noise is NOT audible
E
This diagnostic method is applicable to other DJ products equipped with an SG such as the NOISE effect generator.
* A control having the same function may have another name, depending on the model.
24 DJM-750-K
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5.3 TROUBLESHOOTING
A
Contents
[0] Prior Confirmation [3] AUDIO OUTPUT
[0-1] Checking Internal Cables [3-1] No signal is output from the MASTER1/
[1] Failure in Startup MASTER2/REC/BOOTH connectors.
[1-1] The unit dose not turn on, and the LED of the [3-2] No signal is output from the SEND connector.
SETUP LED does not flash. [3-3] No signal is output from the PHONES
[1-2] The unit dose not turn on, and the LED of the connector.
SETUP LED flashes endlessly. [3-4] No signal is output from the DIGITAL
[1-3] The unit dose not turn on, and the LED of the MASTER OUT connector.
SETUP LED flashes four times. [4] USB
[1-4] No power, and freezing of the FL display [4-1] No connection to the PC, No signal is input to
(See "5.9 ERROR INDICATIONS.") and output from the USB connector.
B
[1-5] The unit dose not turn on, and the LED of the [4-2] No timecode signal output from the mixer.
SETUP LED flashes five times. [5] FL
[1-6] The unit dose not turn on, and the LED of the [5-1] The FL does not light.
SETUP LED flashes once. [6] LED/Button/SW/VR
[1-7] The unit dose not turn on, and the LED of the [6-1] Do not accept button /SW/VR operation
SETUP LED flashes six times. [6-2] display is abnormal
[2] AUDIO INPUT [7] CONTROL
[2-1] No signal is input to the CD/LINE, PHONO [7-1] The FADER START function does not work
connectors.
[2-2] No signal is input to the MIC connector.
[2-3] No signal is input to the RETURN connector. *Point to be checked – Assys are classified with prefix.
[1-**] MAIN Assy
C
[2-**] INPUT Assy
[3-**] PNLA Assy
[4-**] SEC/HP Assy
[5-**] PRIMARY Assy
* The blue character of the Diagnosis Point means the silk printing indication (as follows silk for services) on PC board declining by a check
for services. The details, see "10. SCHEMATIC DIAGRAM" and "11. PCB CONNECTION DIAGRAM".
[0] Prior Confirmation

[0-1] Checking Internal Cables
No. Cause Diagnostics Point Item to be Checked Corrective Action Reference
1 Disconnection, Relevant part Check that all the cables are securely Securely connect the cables. If a cable is 4.1 OVERALL
D
breakage, or connected. broken, replace it. CONNECTION
loose connection Check that there is no breakage in the DIAGRAM
of internal cables cables.
[1] Failure in Startup

*See [5.9 ERROR INDICATIONS], [5.1 POWER ON SEQUENCE_Startup Sequence] and [5.1 POWER ON SEQUENCE_Power Reset Mute Timing Chart].
[1-1] The unit dose not turn on, and the LED of the SETUP LED does not flash.
The fuse may be blowout or V+11E_UNREG, V+3R3E power failure or MAIN UCOM (IC2803), FLASH (IC2802) startup error may be suspected.
1 Circuit failure PRIMARY Assy Check the primary side fuse. • If blowing of the fuse is visible, go to [2]. —————
Excessive power FU1 5-1 • If blowing of the fuse is not visible, go to [3].
supply voltage E
injection
2 Power failure Each power supply Check if any power supply is • If any power supply is short-circuited, repair it. 4.6 POWER
short-circuited to ground. • If no power supply is short-circuited, replace BLOCK DIAGRAM
the fuse. 5.4 INFORMATION
ON POWER
DIAGNOSTICS
3 Power failure MAIN Assy Check for the V+11E_UNREG power. • If the V+11E_UNREG power can be confirmed, 4.6 POWER
CN1201 pin 3 1-1 go to [4]. BLOCK DIAGRAM
Silk for service • If the V+11E_UNREG power cannot be 5.4 INFORMATION
[V+11E_UN] confirmed, go to [7]. ON POWER
DIAGNOSTICS
4 Power failure, MAIN Assy Check for the V+3R3E power. • If the V+3R3E power can be confirmed, 4.6 POWER
defective parts IC1401 pin 4 1-2 go to [5]. BLOCK DIAGRAM
Silk for service • If the V+3R3E power cannot be confirmed, 5.4 INFORMATION F
[V+3R3E] the 3.3V REGULATOR (IC1401) block may be ON POWER
defective. Check for the status of soldering and DIAGNOSTICS
replace it.
DJM-750-K 25
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A
5 RESET signal MAIN Assy Check for the CPU_RESET signal. • If the IC103_1 pin is high level, go to [6]. —————
error IC2803 pin 90 1-3 • If the IC103_1 pin is not high level, the RESET
Silk for service IC (IC2801) block may be defective. Check for
[RESET_OUT] the status of soldering and replace it.
[MAIN_CPU_RESET]
6 20 MHz CLK MAIN Assy Check for the 20M_CLK signal. • If an output signal can be confirmed, go to [8]. 10.35 WAVEFORMS
error R2804 1-4 This is a simple check of whether a signal • If an output signal cannot be confirmed, the 1-4
is output or not. A normal waveform crystal (X2801) block or MAIN UCOM (IC2803)
cannot be observed, because the drive may be defective.
circuit is inside the IC. Check for the status of soldering and replace it.
7 Power failure, PRIMARY Assy Check for the V+11E_UNREG power • If the V+11E_UNREG power can be confirmed, 4.6 POWER
defective parts, JP3001 pin 3 5-2 on PRIMARY Assy. JP3001 may be defective. Replace it. BLOCK DIAGRAM
B Wire defect • If the V+11E_UNREG power cannot be 5.4 INFORMATION
confirmed, the PRIMARY Assy may be ON POWER
defective. Replace it. DIAGNOSTICS
8 MAIN UCOM MAIN Assy If the symptom persists after the above The MAIN UCOM (IC2803) may be defective. —————
defective IC2803 corrections. Replace it.
[1-2] The unit dose not turn on, and the LED of the SETUP LED flashes endlessly.
The unit is shut down in error by the Voltage Monitoring Circuit. Or communication error between the MAIN UCOM (IC2803) and FPGA (IC3007).
1 Power failure See “5.5 VOLTAGE Check for power at each point, following • If the VDET signal level is High, go to [2]. 5.5 VOLTAGE
MONITORING “5.5 VOLTAGE MONITORING CIRCUIT.” • If the VDET signal level is low, repair the MONITORING
C CIRCUIT.” abnormal power supply point. CIRCUIT
2 Defective parts MAIN Assy • Check for the V+3R3D_FPGA power. • If the V+3R3D_FPGA power and 4.6 POWER
R3037 1-5 • Check for the V+1R2D_FPGA power. V+1R2D_FPGA power can be confirmed, BLOCK DIAGRAM
F3001 1-6 go to [3]. 5.4 INFORMATION
• If either power cannot be confirmed, the power ON POWER
line may be defective. DIAGNOSTICS
Check for the status of soldering and replace it.
3 Defective parts MAIN Assy If the symptom persists after the above The FPGA (IC3007) or FLASH (IC2802) may —————
IC3007 corrections. be defective. Check for the status of soldering
IC2802 and replace it. Check for status of soldering of
dumping resistor implementing on the communi-
cation line between MAIN UCOM and FPGA.
D
[1-3] The unit dose not turn on, and the LED of the SETUP LED flashes four times.
MAIN UCOM (IC2803) startup error may be suspected.
1 20 MHz CLK MAIN Assy Check for the 20M_CLK signal. • If an output signal can be confirmed, go to [2]. 10.35 WAVEFORMS
is output or not. A normal waveform crystal (X2801) block may be defective.
cannot be observed, because the drive Check for the status of soldering and replace it.
circuit is inside the IC.
2 MAIN UCOM MAIN Assy If the symptom persists after the above The MAIN UCOM (IC2803) may be defective. —————
defective IC2803 corrections. Replace it.
E
[1-4] No power, and freezing of the FL display (See "5.9 ERROR INDICATIONS.")
This error is generated because FL display data have not been input from the MAIN UCOM to the SUB UCOM.
1 RESET signal MAIN Assy Check that the signal level of • If the signal level is High, go to [2]. —————
error R3097 1-7 FPGA_RESET is High. • If the signal level is low, something on the
FPGA_RESET path may be wrong.
2 24 MHz CLK MAIN Assy Check for the 24M_CLK_FPGA signal. • If an output signal can be confirmed, go to [3]. 10.35 WAVEFORMS
error R3070 1-8 • If an output signal cannot be confirmed, the 1-8
24MCLK (IC3204) block may be defective.
F 3 Defective parts MAIN Assy If the symptom persists after the above The FPGA (IC3007) or FLASH (IC2802) may —————
IC3007 corrections. be defective. Check for the status of soldering
IC2802 and replace it. Check for status of soldering of
cation line between MAIN UCOM and FPGA.
26 DJM-750-K
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[1-5] The unit dose not turn on, and the LED of the SETUP LED flashes five times. A
Communication error between the MAIN UCOM (IC2803) and SUB UCOM (IC6601)
1 Power failure, PNLA Assy Check for the V+3R3D_PA power. • If the V+3R3D_PA power can be confirmed, 4.6 POWER
defective parts R6615 3-1 go to [2]. BLOCK DIAGRAM
Silk for service • If an V+3R3D_PA power cannot be confirmed, 5.4 INFORMATION
[V+3R3D] the power line may be defective. ON POWER
Check for the status of soldering and replace it. DIAGNOSTICS
2 RESET signal PNLA Assy Check that the signal level of • If the signal level is High, go to [3]. —————
error IC6601 pin 90 3-2 SUB_CPU_RESET is High. • If the signal level is low, the path inside the
Silk for service MAIN Assy may be wrong.
[SUB_RST] Check for the status of soldering and replace it.
3 20 MHz CLK PNLA Assy Check for the 20M_CLK signal. • If the signal can be confirmed, go to [4]. 10.35 WAVEFORMS
error R6624 3-3 This is a simple check of whether a signal • If an signal cannot be confirmed, crystal 3-3 B
is output or not. A normal waveform (X6601) block or SUB UCOM (IC6601) may
cannot be observed, because the drive be defective.
4 Defective parts PNLA Assy If the symptom persists after the above SUB UCOM (IC6601) may be defective. —————
IC6601 corrections. Replace it. Check for status of soldering of
cation line between FPGA and SUB UCOM.
5 Defective parts MAIN Assy If the symptom persists after the above FPGA (IC3007) may be defective. Check for the —————
IC3007 corrections. status of soldering and replace it.
IC2802 Check for status of soldering of dumping resistor
implementing on the communication line between
MAIN UCOM and FPGA.
[1-6] The unit dose not turn on, and the LED of the SETUP LED flashes once. C
Communication error between the MAIN UCOM (IC2803) and DSP (IC3201).
1 Power failure, MAIN Assy • Check for the V+3R3D_DSP power. • If the V+3R3D_DSP power and 4.6 POWER
defective parts R3209 1-9 • Check for the V+1R2D_DSP power. V+1R2D_DSP power can be confirmed, BLOCK DIAGRAM
F3201 1-10 go to [2]. 5.4 INFORMATION
• If either power cannot be confirmed, the power ON POWER
line may be defective. DIAGNOSTICS
error R3276 1-11 DSP_RESET is High. • If the signal level is low, something on the
Silk for service DSP_RESET path may be wrong.
[DSP_RESET] Check for the status of soldering and replace it.
3 24MCLK MAIN Assy Check for the 24M_CLK_DSP signal. • If an output signal can be confirmed, go to [4]. 10.35 WAVEFORMS D
error R3234 1-12 • If an output signal cannot be confirmed, the 1-12
24MCLK (IC3204) block may be defective.
4 Defective parts MAIN Assy If the symptom persists after the above DSP (IC3201) or FLASH (IC3008) may be defective. —————
IC3201 corrections. Check for the status of soldering and replace it.
DSP and FPGA.
[1-7] The unit dose not turn on, and the LED of the SETUP LED flashes six times.
Communication error between the MAIN UCOM (IC2803) and USB UCOM (IC2603)
1 Power failure, MAIN Assy • Check for the V+3R3D_USB power. • If the all power can be confirmed, go to [2]. 4.6 POWER
defective parts R2604 1-13 • Check for the V+1R2D_USB power. • If either power cannot be confirmed, the power BLOCK DIAGRAM E
F2601 1-14 • Check for the V+2R5D_USB_PLL line may be defective. 5.4 INFORMATION
R2611 1-15 power. Check for the status of soldering and replace it. ON POWER
DIAGNOSTICS
error R2669 1-16 USB_RESET is High. • If the signal level is low, something on the
Silk for service USB_RESET path may be wrong.
[USB_RST] Check for the status of soldering and replace it.
3 24MCLK MAIN Assy Check for the 24M_CLK signal. • If an output signal can be confirmed, go to [4]. 10.35 WAVEFORMS
is output or not. A normal waveform crystal (X2601) block or USB UCOM (IC2603)
cannot be observed, because the drive may be defective.
4 Defective parts MAIN Assy If the symptom persists after the above USB UCOM (IC2603) or FLASH (IC2802) ————— F
IC2603 corrections. may be defective. Replace it.
MAIN UCOM and USB UCOM.
DJM-750-K 27
5 6 7 8
1 2 3 4
A
[2] AUDIO INPUT
[2-1] No signal is input to the CD/LINE, PHONO connectors.
0 Prior CD/LINE, PHONO, Confirm on the screen that the selector ————— Operating
Confirmation LINE, USB */* is set properly. instructions
selector switch
/ TRIM control
1 Loose connection INPUT Assy [Confirmation of input signal selection] • If the selection is proper, go to [2]. 10.35 WAVEFORMS
/defective parts IC4002/IC4003 (CH1) Check if the input signal selection at each • If the selection is not proper, soldering of parts 2-1 (CD/LINE)
pin1 switching operational amplifier in the peripheral circuits of the switching 2-1 (PHONO)
IC4004/IC4005 (CH2) (IC4002/IC4003/IC4004/IC4005/IC4202/ operational amplifiers or the control transistors
pin1 IC4203/IC4204/IC4205) is proper. (Q4005/Q4006/Q4205/Q4206) is defective or
B IC4202/IC4203 (CH3) one or more of the parts is defective. Or part of
pin1 the circuit in the path from the MAIN UCOM
IC4204/IC4205 (CH4) (IC2803) to a control transistor may be
pin1 disrupted.
2-1
2 Loose connection MAIN Assy [Checking the ADC block] If no audio signal is input to ADC, a problem in 10.35 WAVEFORMS
/defective parts IC1604 (CH1) 1-18 Check for an audio signal at the input an analog circuit at a previous stage may be 2-2 (CD/LINE
IC1804 (CH2) 1-19 connector of ADC (IC1604/IC1804/ suspected. input signal)
IC2004 (CH3) 1-20 IC2004/IC2204). • If an audio signal is input, go to [3]. 2-3 (PHONO·MIC
IC2204 (CH4) 1-21 • If no audio signal is input, check for a part input signal)
pin 4, 5, 24, 25 where the signal is interrupted, by observing 1-18
Representative the audio signal in the path from the input
CH1_R- 1-18 connector to the ADC, then check the
/CH1_R+ 1-18 soldering status and check for a defective
Silk for service part in the corresponding part.
C each CH [L+][L-][R+][R-]
3 Loose connection MAIN Assy [Checking the ADC block] • If the RESET signal level is L, go to [6]. —————
/defective parts IC1604(CH1) 1-22 Check for the RESET signal of ADC. • If the RESET signal level is H, go to [4].
IC1804(CH2) 1-23
IC2004(CH3) 1-24
IC2204(CH4) 1-25
pin 19
4 Loose connection MAIN Assy [Checking the ADC block] • If no CLK signal is input, go to [7]. 10.35 WAVEFORMS
/defective parts IC1604 (CH1) Check for the CLK signal of ADC. • If the CLK signal is input, go to [5]. 1-26 1-27 1-28
IC1804 (CH2)
IC2004 (CH3)
IC2204 (CH4)
96k CLK: pin 17
Representative 1-26
D 6M CLK: pin 16
Representative 1-27
24M CLK: pin 18
Representative 1-28
5 Loose connection MAIN Assy [Checking the ADC block] • If output signal cannot be confirmed, ADC 10.35 WAVEFORMS
/defective parts IC1604(CH1) Check for the signal output from may be defective. 1-29
IC1804(CH2) ADC output terminal. Check for the status of soldering and replace it.
IC2004(CH3) • If output signal can be confirmed, DSP
IC2204(CH4) (IC3201) must be improperly soldered or
pin 15 Representative defective.
1-29
Silk for service
each CH [ADAT_CH*]
6 Loose connection MAIN Assy [Checking the RESET signal path] • If the signal level at Pin 1 is H and that at —————
E /defective parts IC2804 pin 1, pin 3 Check for the RESET signal. Pin 3 is L, IC2804 must be soldered
1-30 impropely or defective.
Silk for service • If the signal level at Pin 1 is L and there is no
[AD/DA_RESET] abnormality in the path from the MAIN UCOM
(IC2803) to IC2804, soldering of the MAIN
UCOM (IC2803) or the IC itself is defective.
7 Loose connection MAIN Assy [Checking the CLK signal path] • If no signal is output from Pin 7 even though 10.35 WAVEFORMS
/defective parts 96k CLK: IC3006 Check for the 96k CLK, 6M CLK and Pin 4 is normal for CH1/CH3, or if no signal is 1-31 1-32 1-33
pin 10, pin 8 1-31 24M CLK signals. output from Pin 11 even though Pin 13 is
6M CLK: IC3004 normal for CH2/CH4, soldering of IC3006/
pin 10, pin 8 1-32 IC3004/IC3005 or these ICs themselves are
24M CLK: IC3005 defective.
pin 10, pin 8 1-33 • If Pin 4 is not normal for CH1/CH3 or if Pin 13
is not normal for CH2/CH4, and if there is no
abnormality in the path from the FPGA
F (IC3007) to IC3006/IC3004/IC3005, soldering
of the FPGA (IC3007) or this IC itself is
defective.
28 DJM-750-K
1 2 3 4
5 6 7 8
[2-2] No signal is input to the MIC1 connectors. A

0 Prior OFF, ON, TALK OVER Confirm on the screen that the selector ————— Operating
Confirmation selector switch is set properly. instructions
/ TRIM control
/defective parts IC2401 Check for an audio signal at the input an analog circuit at a previous stage may be 1-34
MIC1: pin 1 1-34 connector of ADC (IC2401). suspected.
Silk for service • If an audio signal is input, go to [2].
[MIC] • If no audio signal is input, check for a part
where the signal is interrupted, by observing
the audio signal in the path from the input
connector to the ADC, then check the
soldering status and check for a defective B
part in the corresponding part.
2 Loose connection MAIN Assy [Checking the ADC block] • If the RESET signal level is L, go to [5]. —————
/defective parts IC2401 pin 13 Check for the RESET signal of ADC • If the RESET signal level is H, go to [3].
(IC2401).
3 Loose connection MAIN Assy [Checking the ADC block] • If no CLK signal is input, go to [7]. 10.35 WAVEFORMS
/defective parts IC2401 Check for the CLK signal of ADC (IC2401). • If the CLK signal is input, go to [4]. 1-37 1-38 1-39
96k CLK: pin 10 1-37
6M CLK: pin 12 1-38
24M CLK: pin 11 1-39
/defective parts IC2401 pin 9 1-40 Check for the signal output from may be defective. 1-40
Silk for service ADC (IC2401) output terminal. Check for the status of soldering and replace it.
[ADAT_MIC] • If output signal can be confirmed, DSP
(IC3201) must be improperly soldered or C
defective.
/defective parts IC2804 pin10, pin 8 Check for the RESET signal. Pin 8 is L, IC2804 must be soldered
1-41 impropely or defective.
UCOM (IC2803) or this IC itself is defective.
/defective parts 96k CLK: IC3006 Check for the 96k CLK, 6M CLK and Pin 10 is normal, soldering of the IC3006/ 1-31 1-32 1-33
pin 10, pin 8 1-31 24M CLK signals. IC3004/IC3005 or these ICs themselves are
pin 10, pin 8 1-32 • If Pin 10 is not normal and if there is no
24.576M CLK: IC3005 abnormality in the path from the FPGA D
pin 10, pin 8 1-33 (IC3007) to IC3006/IC3004/IC3005, soldering
defective.
[2-3] No signal is input to the RETURN.

0 Prior DELAY, ECHO, • Check that the type for BEAT EFFECT ————— Operating
Confirmation SPIRAL, REVERB, is set to SND/RTN. instructions
TRANS, FILTER, • Check that the BEAT EFFECT is set
FLANGER, PHASER, to ON.
ROBOT, VINYL BRAKE, • Check that a cable is connected to the
SLIP ROLL, ROLL, RETURN L connector.
REV ROLL, SND/RTN E
selector switch
/ ON/OFF button
1 Loose connection INPUT Assy Check that the RETURN IN signal level • If it is L, JA4401 or R4803 must be —————
/defective parts CN4803 pin 20 is H. improperly soldered or defective.
2-4 • If it is H, go to [2].
/defective parts IC2402 pin1, pin 2 Check for an audio signal at the input an analog circuit at a previous stage may be 1-42
1-42 connector of ADC (IC2401). suspected.
Silk for service • If no audio signal is input, check for a part
[RETL][RETR] where the signal is interrupted, by observing
the audio signal in the path from the input
connector to the ADC, then check the
soldering status and check for a defective
part in the corresponding part. F
• If an audio signal is input, go to [3].
DJM-750-K 29
5 6 7 8
1 2 3 4
A
3 Loose connection MAIN Assy [Checking the RESET signal path] • If the RESET signal level is L, go to 2-2 [5]. —————
/defective parts IC2402 pin 13 1-43 Check for the RESET signal at ADC. • If the RESET signal level is H, go to [4].
4 Loose connection MAIN Assy [Checking the ADC block] • If no CLK signal is input, go to 2-2 [6]. 10.35 WAVEFORMS
/defective parts LRCK: IC2402 pin 10 Check for the CLK signal of ADC. • If the CLK signal is input, go to [5]. 1-44 1-45 1-46
1-44
BCLK: IC2402 pin 12
1-45
MCLK: IC2402 pin 11
1-46
/defective parts IC2402 pin 9 1-47 Check for the signal output from ADC may be defective. 1-47
Silk for service output terminal. Check for the status of soldering and replace it.
B [ADAT_RETURN] • If output signal can be confirmed, DSP
(IC3201) must be improperly soldered or
defective.
[3] AUDIO OUTPUT

[3-1] No signal is output from the MASTER1/MASTER2/REC/BOOTH connectors.
1 Prior MASTER1 / Identify the connector(s) that do(es) not • If all connectors does output, go to [2]. Operating
Confirmation MASTER2 / output signals. • If neither MASTER 1 nor 2 connector outputs, instructions
REC / BOOTH go to [9].
• If only the MASTER 1 connector does not
output, go to [10].
• If only the MASTER 2 connector does not
C
output, go to [11].
• If only the BOOTH connector does not output,
go to [13].
2 Loose connection MAIN Assy [Checking the DAC block] • If the DAC output signal is normal, the MUTE 10.35 WAVEFORMS
/defective parts IC201 1-48 Check for the DA converter (IC201) circuit is activated. Go to [16]. 1-48 (MASTER)
Silk for service signal output. • If no signal is output from the DAC output, 1-48 (REC)
[MASTER_L+] MASTER: pin 29, pin31, pin 33, pin 35 go to [3]. 1-48 (BOOTH)
[MASTER_L-] REC: pin37, pin 39
[MASTER_R+] BOOTH: pin41, pin 43
[MASTER_R-]
[REC_L]
[REC_R]
[BOOTH_L]
[BOOTH_R]
D
3 Loose connection MAIN Assy [Checking the DAC block] • If no signal is output, the DSP (IC3201) must 10.35 WAVEFORMS
/defective parts IC201 pin 8, 9, 10, 11 Check that a signal is input to the be improperly soldered or defective. 1-49
1-49 DA converter. • If a signal is output, go to [4].
MASTER: pin10, pin 11
REC: pin 9
BOOTH: pin 8
4 Loose connection MAIN Assy [Checking the DAC block] • If it is L, the R212 or IC201 must be —————
/defective parts IC201 pin 18 1-50 Check for the AMUTEI signal improperly soldered or defective.
(IC201 pin 18). • If it is H, go to [5].
5 Loose connection MAIN Assy [Checking the DAC block] • If it is H, go to [7]. —————
/defective parts IC201 pin 15 1-51 Check for the RESET signal at • If it is L, go to [6].
DA converter.
6 Loose connection MAIN Assy [Checking the DAC block] • If a signal is output, go to [8]. 10.35 WAVEFORMS
E /defective parts 96k CLK: IC201 Check for the CLK signal at DA converter. • If the CLK signal is output, soldering of the 1-52 1-53 1-54
pin 6 1-52 IC201 or the IC itself is defective.
6M CLK: IC201
pin 7 1-53
24M CLK: IC201
pin 14 1-54
/defective parts IC2804 Check for the RESET signal. Pin 6 is L, IC2804 must be soldered
pin4, pin 6 1-55 impropely or defective.
UCOM (IC2803) or the IC itself is defective.
30 DJM-750-K
1 2 3 4
5 6 7 8
No. Cause Diagnostics Point Item to be Checked Corrective Action Reference A
/defective parts 96k CLK: IC3006 Check for the 96k CLK, 6M CLK and Pin 1 is normal, soldering of the IC3006/ 1-56 1-57 1-58
pin 1, pin 3 1-56 24M CLK signals. IC3004/IC3005 or these ICs themselves are
pin 1, pin 3 1-57 • If Pin 1 is not normal and if there is no
24M CLK: IC3005 abnormality in the path from the FPGA
pin 1, pin 3 1-58 (IC3007) to IC3006/IC3004/IC3005, soldering
defective.
9 Loose connection MAIN Assy [Checking the MASTER Shaping Noise Filter] • If a signal is output from the Pin 1/Pin 7 of 10.35 WAVEFORMS
/defective parts IC301 pin 1, pin 7 Check for the DAC differential audio signal IC301/IC302, go to [10] and [11]. 1-59 1-60
1-59 output. • If signals are output from the DAC (Pins 29,
IC302 pin 1, pin 7 Check the waveforms of the signals 31, 33 and 35 of IC201) but not from Pins 1
1-60 output pins of IC301/IC302. and 7 of IC301/IC302, soldering of the B
Silk for service IC301/IC302 block or some part in the block
[ML+][ML-] is defective.
[MR+][MR-] • If no signal is output from the DAC (Pins 37,
39, 41and 43 of IC123), go to [3].
10 Loose connection MAIN Assy [Checking the Balanced Output AMP] • If no signal is output, soldering of the IC303/ 10.35 WAVEFORMS
/defective parts IC303 pin 1, pin 7 Check the waveforms of the signals from IC304 is defective or the ICs themselves are 1-61 1-62
1-61 the output pins of IC303/304. defective.
IC304 pin 1, pin 7 • If signals are output, soldering of the output
1-62 capacitors (C355, C356, C357, C358) or the
ICPs (P302, P301) is defective or the
capacitors or ICPs themselves are defective.
Or the MUTE circuited is activated.
• If the MUTE circuited is activated, go to [14].
C
11 Loose connection MAIN Assy [Checking the MASTER2] • If no signal is output, soldering of the IC402 or 10.35 WAVEFORMS
/defective parts IC402 pin 1, pin 7 Check the waveform of IC402 output pin. the IC itself is defective. 1-63
1-63 • If signals are output, soldering of the output
capacitors (C425, C426), output resistor
(R427, R428) is defective or one or more of
those parts is defective.
12 Loose connection MAIN Assy [Checking the REC] • If signals are output from the DAC (Pins 37 and 10.35 WAVEFORMS
/defective parts IC401 pin 1, pin 7 Check the waveform of IC401 output pin. 39 of IC201) but not from IC401, soldering of 1-64
1-64 the IC401 block or some part in the block
is defective.
• If no signal is output from the DAC (Pins 37,
and 39 of IC201), go to [3].
• If signals are output from Pins 1 and 7 of D
IC401, soldering of the output capacitors
(C423, C424), output resistor (R422, R425,
R419 and R426) is defective or one or more of
those parts is defective.
13 Loose connection MAIN Assy [Checking the BOOTH] • If signals are output from the DAC (Pins 41 and 10.35 WAVEFORMS
/defective parts IC501 pin 1, pin 7 Check the waveform of IC501 output pin. 43 of IC201) but not from IC501, soldering of 1-96
1-96 the IC501 block or some part in the block
is defective.
and 43 of IC201), go to [3].
• If signals are output from Pins 1 and 7 of
IC501, soldering of the output capacitors
E
(C508, C520), output resistor (R505, R517) is
defective or one or more of those parts is
defective.
14 Loose connection MAIN Assy [Checking the MASTER_MUTE] • If the signal is within the range of —————
/defective parts MASTER_MUTE Check that the MASTER_MUTE signal approx. –14 to –15 V, go to [16].
1-68 1-68 is within the range of approx. –14 to –15 V. • If the signal is outside the range of
Silk for service approx. –14 to –15 V, go to [15].
[MASTER_MUTE]
15 Loose connection MASTER LEVEL [Checking the MVR_MUTE] • If MVR_MUTE (CN1002 pin 4) is H, VR6607 —————
/defective parts knob / • Check that the MASTER LEVEL knob is or IC6605 on the PNLA Assy or peripheral
MAIN Assy not set to –∞. parts must be improperly soldered or defective.
CN1002 pin 4 1-69 • Check the FFC connections with the • If MVR_MUTE (CN1002 pin 4) is L, Q203, F
PNLA Assy. Q204 or peripheral parts must be improperly
• Check that the MVR_MUTE (CN1002 soldered or defective.
pin 4) level is Low. If the part is OK, go to [16].
DJM-750-K 31
5 6 7 8
1 2 3 4
A
16 Loose connection MAIN Assy [Checking the MUTE] • If the signal is within the range of approx. –14 —————
/defective parts MUTE 1-70 Check that the MUTE signal 1-70 is to –15 V, soldering of the MUTE transistor or
Silk for service within the range of approx. –14 to –15 V. parts in its peripheral circuits is defective or
[MUTE] one or more of those parts is defective.
MUTE transistor • • •
MASTER1: Q305, Q306, Q307, Q308
MASTER2: Q407, Q408
REC: Q405, Q406
BOOTH: Q503, Q504
• If the signal is outside the range of approx. –14
to –15 V, check if the MUTE transistor is
defective. If the transistor is OK, go to [17].
17 Loose connection MAIN Assy [Checking the CPU_MUTE] • If it is L, MAIN UCOM (IC2803) or R2833 —————
B /defective parts IC2803 pin 11 1-71 Check that the CPU_MUTE signal level is must be improperly soldered or defective.
Silk for service High. • If it is H, Q201, Q202 and Q205 must be
[CPU_MUTE] improperly soldered or defective.
[3-2] No signal is output from the SEND connector.

1 Loose connection MAIN Assy [Checking the SEND] • If signals are output from Pins 1 and 7 of 10.35 WAVEFORMS
/defective parts IC602 pin 1, pin 7 Check the waveform of IC602 output pin. IC602, soldering of the output capacitors 1-72 (SEND output)
1-72 (C624, C625), output resistor (R621, R622) is 1-72 (SENDDAC output)
IC601 pin 1, pin 7 defective or one or more of those parts is
1-72 defective. Or the MUTE circuited is activated.
Silk for service • If the MUTE circuited is activated, go to 3-1 [17].
C [SEND_L][SEND_R] • If signals are output from the DAC (Pins 1 and
7 of IC601) but not from Pins 1 and 7 of IC602,
soldering of the IC601 and IC602 block or
some part in the block is defective.
and 11 of IC601), go to [2].
2 Loose connection MAIN Assy [Checking the DAC] • If no signal is found, DSP (IC3201) must be 10.35 WAVEFORMS
/defective parts IC601 pin 3 1-73 Check the input signal of DAC (IC601). improperly soldered or defective. 1-73
• If a signal is found, go to [3].
3 Loose connection MAIN Assy [Checking the DAC] • If it is L, go to [5]. —————

/defective parts IC601 pin 5 1-74 Check the RESET signal of DAC. • If it is H, go to [4].
4 Loose connection MAIN Assy [Checking the DAC] • If no signal is found, go to [6]. 10.35 WAVEFORMS
/defective parts 96k CLK: IC601 pin 4 Check the CLK signal of DAC. • If a CLK signal is found, IC601 must be 1-75 1-76 1-77
1-75 improperly soldered or defective.
D
6M CLK: IC601 pin 2 Or the MUTE circuited is activated.
1-76 • If the MUTE circuited is activated, go to [7].
24M CLK: IC601 pin 1
1-77
5 Loose connection MAIN Assy [Checking the RESET signal path] • If a signal level at Pin 4 is H and that at —————
/defective parts IC2804 pin 4, pin 6 Check the RESET signal. Pin 6 is L, IC2804 must be improperly
1-55 soldered or defective.
UCOM (IC2803) or this IC itself is defective.
6 Loose connection MAIN Assy [Checking the CLK signal path] • If Pin 1 is normal but a singal is not output 10.35 WAVEFORMS
E /defective parts 96k CLK: IC3006 Check for the 96k CLK, 6M CLK and from the Pin 3, IC3006/IC3004/IC3005 1-56 1-57 1-58
pin 1, pin 3 1-56 24M CLK signals. must be improperly soldered or defective.
6M CLK: IC3004 • If Pin 1 is not normal and if there is no
pin 1, pin 3 1-57 abnormality in the path from the FPGA
24M CLK: IC3005 (IC3007) to IC3006/IC3004/IC3005, soldering
pin 1, pin 3 1-58 of the FPGA (IC3007) or this IC itself is
defective. Or the MUTE circuited is activated.
7 Loose connection MAIN Assy [Checking the MUTE] • If the signal is within the range of —————
/defective parts MUTE 1-70 Check that the MUTE signal 1-70 is within approx. –14 to –15 V, Q603, Q604 must be
Silk for service the range of approx. –14 to –15 V. improperly soldered or defective.
[MUTE] • If the signal is outside the range of
approx. –14 to –15 V, check the above-mentioned
MUTE transistors. If they are OK, go to [8].
F 8 Loose connection MAIN Assy [Checking the CPU_MUTE] • If CPU_MUTE is Low, MAIN UCOM (IC2803) —————
/defective parts IC2803 pin 11 1-71 Check that the CPU_MUTE level is High. or R2833 must be improperly soldered or defective.
Silk for service • If PU_MUTE is High, Q201, Q202, Q205
[CPU_MUTE] must be improperly soldered or defective.
32 DJM-750-K
1 2 3 4
5 6 7 8
[3-3] No signal is output from the PHONES connector. A

0 Prior CUE button / LEVEL Confirm on the screen that the selector ————— Operating
Confirmation knob / MIXING knob is set properly. instructions
/ MONO, STEREO
selector
1 Loose connection MAIN Assy / Check for the connection between the Correct any power connections. —————
/defective parts SEC/HP Assy / MAIN Assy, SEC/HP Assy and
HPJK Assy HPJK Assy.
2 Loose connection SEC/HP Assy Check for the signals at Pins 1 and 4 of • If a signal is found, the HPJK Assy or wires 10.35 WAVEFORMS
/defective parts CN101 pin 1, pin 4 CN101. are defective. Replace them. 4-1
4-1 • If no signal is found, go to [3].
3 Loose connection SEC/HP Assy Check the audio signal of SEC/HP Assy. • Check for a part where the signal is interrupted, —————
/defective parts HP_L+/L- by observing the audio signal before and after B
HP_R+/R- each block. Soldering of the part or the part itself
where the signal is interrupted is defective. Or the
MUTE circuit is activated.
• If no signal is found at CN3, go to [5].
4 Loose connection SEC/HP Assy [Checking the MUTE] • If the signal is within the range of approx. –14 to —————
/defective parts MUTE 4-2 Check that the MUTE signal 4-2 is within –15 V, soldering of the MUTE transistors (Q103,
Silk for service the range of approx. –14 to –15 V. Q104) or any part in their peripheral circuits is
[MUTE] defective or one or more of those parts is defective.
• If the signal is outside the range of approx. –14 to
–15 V, check the conduction at CN3 and CN1005
and check the above-mentioned MUTE
transistors. If they are OK, go to 3-1 [17].
5 Loose connection MAIN Assy [Checking the DAC] • If the DAC output signal is normal, check the 10.35 WAVEFORMS
/defective parts IC1001 Check the output signal of DAC (IC1001). conduction at CN3 and CN1005. 1-78 C
pin 9, 10, 11, 12 1-78 • If no DAC signal is found, go to [6].
Silk for service
[L+][L-][R+][R-]
6 Loose connection MAIN Assy [Checking the DAC] • If no signal is found, DSP (IC3201) must be 10.35 WAVEFORMS
/defective parts IC1001 pin 3 1-79 Check the input signal of DAC. improperly soldered or defective. 1-79
Silk for service • If signal is found, go to [7].
[ADAT_HP]
7 Loose connection MAIN Assy [Checking the DAC] • If it is H, go to [8]. —————
/defective parts IC1001 pin 5 1-80 Check the RESET signal of DAC. • If it is H, go to 2-2 [5].
8 Loose connection MAIN Assy [Checking the DAC] • If no signal is found, go to 2-2 [6]. 10.35 WAVEFORMS
/defective parts 96k CLK: IC1001 pin 4 Check the CLK signal of DAC. • If CLK signal is found, DAC (IC1001) must be 1-81 1-82 1-83
1-81 improperly soldered or defective.
6M CLK: IC1001 pin 2 D
1-82
24M CLK: IC1001 pin 1
1-83
[3-4] No signal is output from the DIGITAL MASTER OUT connector.

1 Loose connection MAIN Assy Check for the signal at Pins 16 of DIT • If the signal can be found, soldering of any 10.35 WAVEFORMS
/defective parts IC3405 pin 16 1-84 (IC3405). part in the signal path from IC3405 to JA3401 1-84
may be defective. Check the soldering status.
If soldering is OK, replace the defective part.
• If no signal is found, go to [2].
2 Loose connection MAIN Assy Check for the V+3R3D_DIT power. • If V+3R3D_DIT power is found, go to [3]. 4.6 POWER
/defective parts C3411 1-85 • If V+3R3D_DIT power cannot be found, BLOCK DIAGRAM
soldering of any part in the power path may be 5.4 INFORMATION E
defective. Check the soldering status. If ON POWER
soldering is OK, replace the defective part. DIAGNOSTICS
3 Loose connection MAIN Assy Check that the DIT_RESET signal level • If it is H, go to [4]. —————
/defective parts R3434 1-86 is High. • If the signal level is L, soldering of any part in
Silk for service the DIT_RESET path may be defective. Check
[DIT_RST] the soldering status. If soldering is OK, replace
the defective part.
4 Loose connection MAIN Assy Check for the any signals of DIT • If any signal is abnormal, soldering of any part 10.35 WAVEFORMS
/defective parts IC3405 (IC3405). in the signal path may be defective. Check the 1-87 1-88 1-89 1-90
FPGASRC_LRCK soldering status. If soldering is OK, replace the
pin 24 1-87 defective part.
FPGASRC_BCK • If all signals are normal, soldering of the DIT
pin 26 1-88 (IC3405) or the IC itself may be defective.
ADAT_DOUT_FPGASRC Check the soldering status. If soldering is OK, F
pin 28 1-89 replace the defective part.
FPGASRC_MCLK
pin 30 1-90
DJM-750-K 33
5 6 7 8
1 2 3 4
A
[4] USB
[4-1] No connection to the PC, No signal is input to and output from the USB connector.
0 Prior CD/LINE, PHONO, • Check that the selector is set to USB*/*. ————— Operating
Confirmation LINE, USB • Check that the driver software dedicated instructions
*/* selector settings, for the DJM-750 has been installed on
PC settings the customer's PC.
• Check that the DJM-750 utility of the
connected PC is set properly.
1 Loose connection MAIN Assy • Check that the voltage at Pin 5 • If any signal is abnormal, soldering of any part 10.35 WAVEFORMS
/defective parts CN2602 (V+5VBUS) of CN2602 is about 5 V in the signal path from the PC to the MAIN 1-92 1-93
B V+5VBUS (4.75 to 5.25) using a PC connected. Assy may be defective. Check for any
pin 5 1-91 • Check for the D+USB and D-USB breakage in the cable and check the soldering
D+USB signals. status. If both are OK, replace the defective
pin 4 1-92 part.
D-USB • If all signals are normal, soldering of any part
pin 3 1-93 in the signal path from CN2602 to the USB
UCOM (IC2603) or the USB UCOM (IC2603)
is defective. Check the soldering status. If
soldering is OK, replace the defective part.
[4-2] No timecode signal output from the mixer.

0 Prior CD/LINE, PHONO, • Check that the selector is set to USB*/*. ————— Operating
C Confirmation LINE, USB • Check that the driver software dedicated instructions
*/* selector settings, for the DJM-750 has been installed on
PC settings the customer's PC.
• Check that the DJM-750 setting utility of
the connected PC is set properly.
• When using a DJ player (when using a
Time code (control CD,)) check that the
DJ player is connected via the CD/LINE
connector. When using a turntable (when
using a Time code (control turntable,))
check that the turntable is connected via
the PHONO connector.
1 Incorrect setting PC Setting Utility 1 Start up the Setup Utility that has been If CH* Timecode PHONO is selected, set it to Operating
(at the CD/LINE input) installed on the customer’s PC then click CH* Timecode CD/LINE. instructions
on the MIXER OUTPUT tab. Check that
D CH* Timecode CD/LINE is selected.
2 Incorrect setting PC Setting Utility 2 Start up the Setup Utility that has been If CH* Timecode CD/LINE is selected, set it to Operating
(at the PHONO input) installed on the customer’s PC then click CH* Timecode PHONO. instructions
on the MIXER OUTPUT tab.
Check that CH* Timecode PHONO is
selected.
3 Incorrect setting Timecode signal Because the setting varies depending on If the setting cannot be confirmed properly with 5.11 DVS
output the application used, see "5.11 DVS the method described in the left column, possible CONFIRMATION
CONFIRMATION METHOD" for a simplified reasons are as follows: METHOD
check method. 1 The channel for USB AUDIO output of the Operating
DJM-750 and that for USB AUDIO input of instructions
TRAKTOR2 do not match.
⇒ Check the channel setting on the Input
Routing screen in the Preferences window
E of TRAKTOR2 and that of the PC Setup
Utility.
2 Connection between an external device
(DJ player, turntable) and the DJM-750 is not
properly made.
⇒ Check the connection and check if the
RCA cables are broken.
After checking the above-mentioned items,
check the setting of the application used again.
If the symptom persists, a failure in hardware
may be suspected. Check the CD/LINE and
PHONO inputs and USB output, referring to [2-1]
and [4-1] of Troubleshooting.
34 DJM-750-K
1 2 3 4
5 6 7 8
A
[5] FL
The FL is controlled by the SUB UCOM (IC6601).
[5-1] The FL does not light.

The driver power to be supplied to the FL is produced at the MAIN Assy.
1 Power failure PNLA Assy Check for the voltage of the FL. If no loose connection is detected with the FL of 4.6 POWER
V6601 (V+3R3D_PA/V+5D_LED_PA/V+34D_PA) the PNLA Assy but power voltage is not BLOCK DIAGRAM
pin 24 3-12 detected, check the mounting status of the 5.4 INFORMATION
pin 1 3-10 DC-DC converter IC and peripheral parts for ON POWER
pin 25 3-9 each voltage point of the MAIN Assy. DIAGNOSTICS
If an error is detected, repair the defective parts.
MAIN Assy B
IC1407 V+3R3D Block
1-94
IC1405 V+5DBlock
1-95
IC1403 V+34DBlock
1-96
2 Filament PNLA Assy Check that the FL filament voltage is If the voltage is outside the normal range, a bias —————
voltage error V6601: 2.3 V. circuit error of the FL may be suspected.
of the FL Voltage between pins Check the mounting status of Q6601, Q6602,
1P to 32P and peripheral parts. If there is no problem,
3-11 Q6601 or Q6602 may be defective.
Replace them.
3 Signal errors PNLA Assy Check for the output signal of the FL If no signal is output, check for the mounting 10.35 WAVEFORMS
V6601 communication line and the cable status of SUB UCOM (IC6601). 3-14 3-13 3-15 3-16
C
pin 22 3-14 connection status in the PNLA Assy. If there is no problem, the port may be defective.
pin 21 3-13 • FL_SCK Replace it.
pin 23 3-15 • FL_TXD If soldering is improper, resolder it.
pin 24 3-16 • FL_LAT
• FL_BK
4 Defective FL PNLA Assy If the symptom persists after the above FL may be defective. —————
corrections. Replace it.
[6] LED/Button/SW/VR
D
The FL is controlled by the SUB UCOM (IC6601) and SUB UCOM (IC6601).
See "4.5 LED, KEY, VR ASSIGNMENTS".
[6-1] Do not accept button /SW/VR operation
1 Defective button, TEST MODE Check for each buttons /SWs/VRs Each parts may be defective. 6.1 TEST MODE
SW, VR works correctly with TEST MODE. Replace it.
[6-2] LED display is abnormal

1 Defective LED TEST MODE Check for each LEDs works Each parts may be defective. 6.1 TEST MODE
correctly with TEST MODE. Replace it. E
DJM-750-K 35
5 6 7 8
1 2 3 4
A [7] CONTROL
The control signal is output from the FPGA (IC3007).
To make the diagnostic procedure easier, set the CROSS FADER ASSIGN selectors for all channels to THRU before starting
diagnosis.
[7-1] The FADER START function does not work
0 Prior FADER START Check that the FADER START (CH2, CH3) ————— Operating
Confirmation (CH2, CH3) button button is set to ON. instructions
settings
1 Signal errors/ MAIN Assy • Check for the FADER_START signal • If the signal is output, the CONTROL cable 10.35 WAVEFORMS
Loose C231 to C238 1-97 when the CH FADER is changed from may be defective. Replace it. 1-97
connection Representative CH1 0 to 10. • If the signal is not output, go to [2].
• Check for the FADER_STOP signal
when the CH FADER is changed from
10 to 0.
2 Power failure MAIN Assy Check for the V+5D_CONTROL power. • If the V+5D_CONTROL power can be 4.6 POWER
R222 1-98 confirmed, go to [3]. BLOCK DIAGRAM
• If V+5D_CONTROL power cannot be found, 5.4 INFORMATION
soldering of any part in the V+5D_CONTROL ON POWER
power path may be defective. Check the DIAGNOSTICS
soldering status. If soldering is OK, replace the
defective part.
C
3 Signal errors/ MAIN Assy • Check for the FADER_START signal • If signal is output, the CONTROL block must 10.35 WAVEFORMS
defective parts R3057, R3058 1-99 when the CH FADER is changed from be improperly defective. Replace it. 1-99
Representative CH1 0 to 10. • If no signal is output, the FPGA (IC3007)
• Check for the FADER_STOP signal must be improperly soldered or defective.
when the CH FADER is changed from
10 to 0.
36 DJM-750-K
1 2 3 4
5 6 7 8
5.4 POWER SUPPLY DIAGNOSIS INFORMATION
Observing Normal Voltage Possible defective point when Standby State A

Name Remarks
Point Level a voltage error is generated (Power SW ON)
MAIN UCOM (IC2803), RESET IC (IC2801),
1 V+11E_UNREG 7.2 to 18 ON
SETUP LED (PNLA ASSY)
2 V+13D_UNREG 9.7 to 17 ALL DIGITAL CIRCUIT OFF
V+15A
3 14.25 to 15.75 ANALOG AUDIO CIRCUIT OFF
(V+15A_*)
V-15A
4 -15.75 to -14.25 ANALOG AUDIO CIRCUIT OFF
(V-15A_*)
V+5A
5 4.7 to 5.4 DAC, ADC OFF
(V+5A_*)
V+5D FL, LED, DIGITAL OUT,
6 4.75 to 5.35 OFF
(V+5D_*) MAIN UCOM (IC2803)
B
MAIN ASSY
V+3R3E MAIN UCOM (IC2803), RESET IC (IC2801),

7 3.2 to 3.4 ON
(V+3R3E_*) SETUP LED (PNLA ASSY)
V+3R3A
8 3.2 to 3.4 ADC OFF
(V+3R3A_*)
V+3R3D
9 3.15 to 3.45 ALL DIGITAL CIRCUIT OFF
(V+3R3D_*)
V+3R3D_REFA
10 3.15 to 3.45 MAIN UCOM (IC2803) OFF
(V+3R3D_REFA_*)
V+2R5D
11 2.4 to 2.6 USB UCOM (IC2603) OFF
(V+2R5D_*)
V+1R2D FPGA (IC3007), DSP (IC3201),
12 1.1 to 1.28 OFF
(V+1R2D_*) USB UCOM (IC2603)
V+34D
13 31 to 36 FL OFF
(V+34D_*) C
14 V+5VBUS Power of the connected PC 4.75 to 5.25 USB communication failure ON
INPUT
ASSY
15 V+15A 14.25 to 15.75 INPUT CIRCUIT OFF

16 V-15A -15.75 to -14.25 INPUT CIRCUIT OFF
17 V+15A_UNREG 17.6 to 27.8 ANALOG AUDIO CIRCUIT OFF
18 V-15A_UNREG -17.6 to -27.8 ANALOG AUDIO CIRCUIT OFF
19 V+5A_UNREG 7.4 to 12.0 DAC, ADC OFF
SEC/HP ASSY
20 V+13D_UNREG 9.7 to 17 ALL DIGITAL CIRCUIT OFF

21 V+HP_UNREG Before the polyswitch 4.5 to 9.5 HP CIRCUIT OFF
22 V+HP_UNREG_1 After the polyswitch 4.5 to 9.5 HP CIRCUIT OFF
D
23 V-HP_UNREG -4.5 to -9.5 HP CIRCUIT OFF
24 V+15A 14.25 to 15.75 ANALOG AUDIO CIRCUIT OFF
25 V-15A -15.75 to -14.25 ANALOG AUDIO CIRCUIT OFF
26 V+5A 4.7 to 5.4 DAC, ADC OFF
27 V+15A_UNREG 17.6 to 27.8 ANALOG AUDIO CIRCUIT OFF
28 V-15A_UNREG -17.6 to -27.8 ANALOG AUDIO CIRCUIT OFF
REG ASSY
29 V+5A_UNREG 7.4 to 12.0 DAC, ADC OFF

30 V+15A 14.25 to 15.75 ANALOG AUDIO CIRCUIT OFF
31 V-15A -15.75 to -14.25 ANALOG AUDIO CIRCUIT OFF
32 V+5A 4.7 to 5.4 DAC, ADC OFF E
V+5D_LED
33 4.75 to 5.35 FL,LED OFF
(V+5D_LED*)
34 V+3R3E 3.2 to 3.4 SETUP LED ON
PNLA ASSY
V+3R3D
35 3.15 to 3.45 FL, SUB UCOM (IC6601) OFF
(V+3R3D_*)
V+34D
36 31 to 36 FL OFF
(V+34D_*)
V+3R3D_REFA
37 3.15 to 3.45 CH1-4 FADER, CROSS FADER OFF
(V+3R3D_REFA_*)
PNLB ASSY
V+3R3_REFB
38 3.15 to 3.45 VR OFF
(V+3R3D_REFB_*)
V+3R3D_REFA
39 3.15 to 3.45 CROSS FADER OFF F
(V+3R3D_REFA_*)
ex) V+15A_* • • • • V+15A_O, V+15A_IN, etc • • •
DJM-750-K 37
5 6 7 8
1 2 3 4
5.5 VOLTAGE MONITORING CIRCUIT
A
Voltage-Monitoring Circuit
This unit monitors the voltages of the main power-supply ICs, using the VDET signal.
The VDET signal level is high (+3.3 V) during normal operations. When the level becomes low (0 V), detect abnormality
in the MAIN UCOM (IC2803).
Product behavior when an error is generated

If power failure is detected with the VDET signal, the MAIN UCOM will stop supplying the primary source of
power to the main transformer, setting the RELAY_CONT signal to low and interrupting the relay RY3001.
MAIN ASSY
SEC/HP
V+34D
ASSY
B V+5D
V+3R3D Monitoring Voltage
V+1R2D monitoring
V+15A circuit
V-15A
V+5A
V+3R3A
TRANS
ASSY
VDET
H: Normal
L: Abnormal
PNLA ASSY
H: Main trans. is output.
C RELAY_CONT L: Main trans. output is stopped.
STBY_LED SETUP LED
MAIN UCOM D6624 (RED)
(IC2803)
PRIMARY
ASSY
Flashing when
V+11E_UNREG V+3R3E
IC1401 an error occurs
LDO
Always output during power-on
The MAIN UCOM also informs of power failure with flashing of the SETUP button, by sending the STBY_LED signal:
Flashing intervals: 250 ms (lit for 125 ms/unlit for 125 ms)
As the switching-system output is stopped, the indications other than the SETUP LED are unlit and all the switches
D and VRs are disabled.
Diagnostic procedure
If any voltage is abnormal, that error will be detected by the voltage-monitoring program after it is started after a usual
startup of the unit. Then the power supply to the main transformer will be stopped. For this reason, power will be supplied
for about 1 sec after startup.
Identify which power-supply IC is defective, by turning the unit OFF then back ON while monitoring each voltage with an
oscilloscope. Check the value of each voltage immediately before stopping power supply.
Note: Each time before turning the unit ON, make sure that each power-supply IC is not short-circuited to GND.
E
38 DJM-750-K
1 2 3 4
5 6 7 8
Circuit diagram of the voltage-monitoring section A
Voltage abnormality detect circuit
V+34D V+5D V+5A V+15A V+34D D MAIN ASSY
R1247
DAN202UM
6.2k
(D)
Low value Hi value
D1205
V+34D 27.63V 44.59V
V+5A
V+5D 3.70V 7.21V
R1215
R1233
V+3R3D
200
33k
(D)
(D)
STBY V+3R3D 2.37V 4.31V
1000p/50
C1201
R1201
160k
R1204 R1252 V+1R2D 2.18V
NM 82k V+15A 4.92V 19.73V
STBY
R1248
R1234
(D)
750
4.7k
(D)
(D)
R1203 Q1201 R1214 R1231 V-15A -6.97V -19.30V
HN1A01FU(YGR)
(1/2) V+3R3E
NM 1k 2.7k V+5A 3.65V 7.21V
GNDD (D) Q 1 2 0 2
1000p/50
(D)
VDET
C1210
Q1206
STBY
R1249
HN1A01FU(YGR) V+3R3A 1.29V 6.22V
R1202
R1216
R1243
HN1A01FU(YGR)
NM
(2/2)
820
39k
10k
(1/2)
(D)
R1246
GNDD D1201 GNDD GNDD

100
VDET
10:14F To MAIN_UCOM
GNDD
0.01u/16
C1215
Q1208 NORMAL
B
DA2J101
V+5D LTC114YUB High
V+3R3D
D1202
DAN202UM ABNORMAL
Low
STBY GNDD GNDD
16k
C1202
R1205
0.1u/10
R1208
(D)
STBY NM
R1207 Q1201
HN1A01FU(YGR) V+3R3A
NM (2/2)
GNDD
R1244
12k
R1206
(D)
43k
(D)
Q1207
HN1B04FU(YGR)
GNDD (2/2)
R1245
R1253
33k
(D)
V+15A V+5A
100k
(D)
47k
R1210
(D)
R1213
10k V-15A
STBY (D) GNDD
R1212 Q1202
HN1A01FU(YGR)
NM (1/2)
R1211
62k
(D)
GNDD
C
V+3R3A V+1R2D
STBY
C1214
R1235
24k
0.1u/10
R1238
(D)
STBY NM
R1237 Q1206
HN1A01FU(YGR)
D1204
NM (2/2)
GNDD
R1236
22k
(D)
DAN202UM
GNDD
V+34D V+3R3A
47k
R1239
(D)
R1242
STBY 100k
(D)
R1241 Q1207
HN1B04FU(YGR)
NM (1/2)
R1240
33k
(D)
D
STBY
R1251
NM
V-15A
Table 1: Voltage value of the voltage-monitoring section

Over voltage / Threshold
Power Cause of error detection
Under voltage Detection range in consideration of variations Center value
+ More than 38.50 to 49.57 V 44.59 V Abnormality around IC1403
V+34D Abnormality around IC1403 or,
− 19.72 to 30.29 V or less 27.63 V
Short-circuiting at GND or different power supply
Abnormality around IC1404 or,
+ More than 6.08 to 8.43 V 7.21 V E
Short-circuiting at different power supply
V+5D
− 3.37 to 4.30 V or less 3.70 V
+ More than 3.89 to 4.65 V 4.31 V
V+3R3D
− 1.26 to 2.81 V or less 2.37 V
V+1R2D + More than 1.87 to 2.38 V 2.18 V
+ More than 17.43 to 21.54 V 19.73 V Short-circuiting at regulator (IC5002) IN/OUT
V+15A
− 3.72 to 7.23 V or less 4.92 V Short-circuiting at GND or different power supply
+ More than -17.07 to -21.55 V -19.30 V Short-circuiting at regulator (IC5003) IN/OUT
V-15A
− -6.24 to -8.29 V or less -6.97 V Short-circuiting at GND or different power supply
+ More than 6.08 to 8.43 V 7.21 V Short-circuiting at regulator (IC5001) IN/OUT F
V+5A
+ More than 4.01 to 6.72 V 6.22 V Short-circuiting at regulator (IC1402) IN/OUT
V+3R3A
DJM-750-K 39
5 6 7 8
1 2 3 4
5.6 ABOUT POLYSWITCH
This unit monitors the voltages of the main power-supply ICs, using the voltage-monitoring circuit. As resettable fuses
A
(PolySwitches) are also used, some circuits cannot be monitored by the voltage-monitoring circuit when any resettable fuse is
activated.
The resettable fuse opens when excess current flows and will be restored to a conductive state after the cause of the
corresponding circuit error is removed. (Replacement of the resettable fuse is not required if the corresponding circuit error is
remedied.)
Circuits using the resettable fuses

SEC/HP ASSY
Power-supply line using a resettable fuse: V+HP_UNREG
A circuit in the SEC/HP Assy may be in failure if the voltages of the above-mentioned power in the SEC/HP Assy are 0 V, with
the UTILITY LED (STBY_LED) not flashing.
B
Possible causes: Abnormal or no HP output
Item to be checked: Check if there is any abnormality in the periphery of Q105 or Q106.
SEC/HP ASSY
V+HP_UNREG Poly switch
Q105
P101: RXEF075P-T
Diagnostic procedure when any resettable fuse is activated

1. Unplug the AC power cord.
2. Check for any error, such as short-circuiting or defective parts, in the circuits downstream from the resettable fuse.
3. Repair the detective part.
5.7 ABOUT PROTECTOR

D
This unit uses ICPs (IC protectors) in MASTER1 output circuit.
If the specified signal from the MASTER 1 connectors (XLR) is not properly output, check if any ICP is activated.
D MAIN ASSY MASTER1 L MASTER1 R

JA301 JA302
DKB1093-A DKB1093-A
4 4
1 2 1 2
3 3
COLD
E MASTER1_L_COLD MASTER1_R_COLD
COLD
HOT
HOT
Q305 Q307
DZ2S180C
DZ2S180C
CFHXSQ
CFHXSQ
INC2002AC1 INC2002AC1
R378 R380
4700p/16
4700p/16
VA301
VA303
STBY
STBY
C359
D302
C361
D304
NM
NM
18k 18k
C365
C367
NM
NM
STBY
STBY
C366
C368
NM
NM
DZ2S180C
DZ2S180C
CFHXSQ
CFHXSQ
4700p/16
4700p/16
VA302
VA304
STBY
STBY
C360
D303
C362
D305
NM
NM
R379 R381
18k Q306 18k

Q308
INC2002AC1 INC2002AC1
GNDA_OUT GNDA_OUT
F P302 P301
1 2 1 2
AEK1073-A AEK1073-A
MASTER1_L_HOT MASTER1_R_HOT
40 DJM-750-K
1 2 3 4
5 6 7 8
5.8 V+34D DIAGNOSIS
The driver power output for the FL (V+34D) is controlled with a transistor switch. A
Diagnostic procedures when only V+34D is not output

1 Check V+34D_1 at the prior stage of the transistor (Q1402).
2 If no signal is detected at V+34D_1, the mounting status of the peripheral parts of the 34V DC/DC converter
(IC1403) may be improper or IC1403 itself may be defective.
3 If a signal is detected at V+34D_1, check the Q1405 and Q1406.
If V+34D_CONT is L, the mounting status of the MAIN UCOM (IC2803) may be improper or IC2803 itself may be
defective.
If V+5A is 0 V, confirm an output of IC5001 of REG Assy and connection state.
4 If both V+34D_CONT and V+5A are H:
If the output signal from Q1406 is L, the mounting status of Q1406 may be improper or Q1406 itself may be defective. B
5 When the above does not have any problem, the following problems are thought about.
1. The mounting status of the peripheral parts of Q1401 or Q1402 may be improper or Q1401/Q1402 may be defective.
2. The mounting status of the peripheral parts of Q1403 or Q1404 may be improper or Q1403/Q1404 may be defective.
13V 34V (FL) D MAIN ASSY

STBY
V+34D_1 1 V+34D C
R1404
R1405
R1406 C1412
SQ
SQ
1.5
1.5
NM NM
A side Q1402 A side
L1401 D1403 LSAR523UB
DTL1123-A
470uH RB160L-40
IC1403 !
R1414
R1417
100k
V+13D_UNREG
47k
15k
15k
15k
15k
15k
R1403 8 1
CD CS
1 . 5 k SR 7 2
SI ES
C1405 STBY
6 3
R1415
R1418
R1421
R1422
R1423
R1424
R1425
1000p/50
V+ CT
100u/50
SR
18k
47k
C1414
R1407
C1417
C1461
C1416
SR (D)
0.1u/50
5 4 100p/50 CH
NM
CH
SR
39k
IN- GND
CCG1236-A
1000p/50
100u/25
C1403
C1404
C1454
C1455
NJM2392M
0.1u/25
10u/35
CH
SR
R1408
!
SR (D)
1.5k
V+5A D
GNDD
3 GNDD_34D
Q1406
LTA024EEB
Q1401
LTC024EEB
V+34D_CONT
From MAIN_UCOM Q1405
10:12K
3
LTC024EEB
5
Q1404
LSCR523UB
3 V+34C_CONT V+34D Discharge circuit 4 GNDD
High R1416
Q1403
GNDD LSCR523UB
Low 2.2k
E
GNDD
5
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5.9 ERROR INDICATIONS
A Indications of Errors during Startup

Error indication Error Detection timing Detection method Defective part Diagnostic procedure
Continuous flashing of the SETUP LED Abnormal voltage Under constant monitoring Monitoring of the VDET signal with Power Troubleshooting: [1-2]
(lit for 125 ms/unlit for 125 ms) the voltage-monitoring circuit
FPGA configuration failed. During power-on sequence* Monitoring of the FPGA (IC3007) circuitry
FPGA_xINIT/FPGA_DONE signal
Repeated 4-time flashing of the SETUP MAIN UCOM ROM error During power-on sequence* Confirmation of internal ROM MAIN (IC2803) circuitry Troubleshooting: [1-3]
LED (lit and unlit for 250 ms each verification
4 times then unlit for 1 s)
The FL display freezes, with the display FL display data cannot be During power-on sequence* FL display data are not output from Mainly FPGA (IC3007) Troubleshooting: [1-4]
shown below. received by the SUB UCOM. the MAIN UCOM. circuitry
Repeated 5-time flashing of the SETUP Handshake between MAIN During power-on sequence* Confirmation of communication BUS line between Troubleshooting: [1-5]
LED (lit and unlit for 250 ms each and SUB failed. verification between MAIN UCOM MAIN UCOM and FPGA
5 times then unlit for 1 s) and SUB UCOM via FPGA
Repeated one-time flashing of the Handshake between MAIN During power-on sequence* Confirmation of communication DSP (IC3201) circuitry Troubleshooting: [1-6]
SETUP LED (lit then unlit for 250 ms and DSP failed. verification between MAIN UCOM
each once then unlit for 1 s) and DSP via FPGA
Repeated 6-time flashing of the SETUP Handshake between MAIN During power-on sequence* Confirmation of verification with the USB (IC2603) circuitry Troubleshooting: [1-7]
C LED (lit and unlit for 250 ms each and USB failed. UART signal between MAIN UCOM
6 times then unlit for 1 s) and USB UCOM
*See "5.1 POWER ON SEQUENCE."
Indications of Errors during Updating

* Be sure to perform updating properly, referring to "8.2 UPDATING OF THE FIRMWARE."
Indications on the unit

Effect Parameter Flashing of
Details of the error Corrective action
display display the SETUP LED*
[ERROR] [E004] Four times MAIN UCOM UPDATE error Perform updating again.
D [LOADING] None Five times SUB UCOM UPDATE error Perform updating again.
[ERROR] [E001] Once DSP Data UPDATE error Perform updating again.
[ERROR] [E001] Once DSP Program UPDATE error Perform updating again.
[ERROR] [E006] Six times USB UCOM UPDATE error Perform updating again.
[ERROR] [E008] Eight times USB-BOOT UPDATE error Perform updating again.
[ERROR] [E002] Twice FPGA UPDATE error Perform updating again.
[ERROR] [E009] Nine times SYS Ver. UPDATE error Perform updating again.
[ERROR] [E000] Non Other errors Perform updating again.
*The SETUP LED flashes with a set of lit and unlit for 250 ms each for the specified number of times then unlit
for 1 s.
Indications on the PC
E
Messages in the window Error Corrective action
! Your DJM-750 is not connected. This message is displayed when the mixer and After checking the connection via the USB
the PC are not connected. connectors, perform updating again.
See "Troubleshooting: [4-1]" if any error in USB
connection is suspected.
! There is an error in the update file. This message is displayed when no proper Download the UPD file again then perform
UPD file is found. updating again.
! An error has occurred. This message is displayed when updating in Perform updating again.
It was not possible to update the program. progress was canceled because of an error.
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5.10 CONNECTION CHECK WITH EACH INTERFACE
A
USB
[USB Bconnector]
Whether communication between the PC connected via the USB B connector and this unit is properly performed or not can
be confirmed on the PC.
Note: The driver software must be installed beforehand.
Use Device Manager for checking.

If the PC and this unit are properly connected, the components of this unit
are added in Device Manager (under Hardware) as devices.
If all components are properly displayed, the PC and this unit are properly B
communicating via the USB connector.
In a case of Windows XP:

Start, Control Panel, System, Hardware, then Device Manager
Devices to be added:
• Universal Serial Bus controllers
USB Composite Device
• Under “Sound, video and game controllers”
PIONEER DJM-750
DJM-750
USB Audio Device
C
A communication check may be easily performed if connection
is made with Device Manager displayed on the PC screen.
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5.11 DVS CONFIRMATION METHOD
A What is the DVS (Digital Vinyl System)?

The Digital Vinyl System (DVS) enables control of DJ software with normal DJ's operations of the CDJs or turntables, with use
of a control CD or VINYL supplied with DJ software that supports the DVS. A control disc contains timecodes for controlling
DJ software, which enable playback of music files stored on the PC from an assigned playback position at an assigned
playback speed.
Note: For checking operations as the DVS, a control CD (CD on which timecodes are recorded) is required. However,
assuming a case where no control CD is available, a simple check procedure using a music CD is explained here.
Necessary Items
• PC with the USB driver and TRAKTOR (demo version or TRAKTOR DDJ-T1 EDITION possible) installed
B Can download the Traktor demo version from the following URL.
http://www.native-instruments.com/#/en/products/dj/traktor-pro-2/?page=1975
• Media (CD, etc.) for checking operations, CDJ player
Check Procedures
1. Connect this unit and a PC, using the USB cable.
2. Connect the audio output of CDJ Player to the CD/LINE of CH1 of this unit.
3. Set the CD/LINE, PHONO, LINE, and USB */* selectors to USB1/2.
4. For details on settings to be made on the PC, see “Settings for the Driver” and “Settings on TRAKTOR” below.
5. Play back the CDJ Player, and check the following items:
• The level meters of Input Routing and Master Out on the TRAKTOR move in sync with audio output signals.
C • The Master Out is output normally.
*Repeat the above steps for channels 2 to 4, to check the DVS paths.
Note:
The Master Out signal will not be output if the MAIN volume control is set to the minimum volume position.
If the MAIN volume indicators are not displayed on the screen, set the TRAKTOR screen to Full screen.
D [Connection Diagram (When the CDJ Player is Connected to CH1)]

DJM-750 DJM-750
Computers
USB cable
Power amplifier
CDJ player
44 DJM-750-K
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A
Settings for the Driver
Start up the "DJM-750 Settings Utility".
(Reference)
For Windows
Click [Start] menu → [All Programs] → [Pioneer] → [DJM-750] → [DJM-750 Settings Utility].
For MacOS
Click [Macintosh HD] → [Aplications] → [Pioneer] → [DJM-750] → [DJM-750 Settings Utility].
MIXER INPUT MIXER OUTPUT

B
CH1: USB CH1 Timecode CD/LINE
CH2 Timecode CD/LINE

CH2: USB
When the CD/LINE, PHONO, LINE, and USB */* selectors Set the Timecode CD/LINE.
of the mixer are set to USB*/*, “USB” must be displayed
on the PC screen.
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A
Settings on TRAKTOR
1 After starting TRAKTOR, set the deck layout, in "Mixer".
Figure of TRAKTOR2 screen image
2 Set the deck A to D, in "Live Input".
3 Select Traktor then Preferences, or click on the "Preferences" button.
F
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4 In "Audio Setup", select for Windows: PIONEER DJM-750 6 In "Input Routing", select "Input Channel A-D". A
ASIO, for Mac OS: PIONEER DJM-750.
Figure of TRAKTOR2 screen image C

With the above settings, CH 1 of the mixer is assigned to

5 In "Output Routing", select "External,
Deck A, CH 2 to Deck B, CH 3 to Deck C, and CH 4 to
Output Channel A-D".
Deck D.
7 Close the "Preferences" window, by clicking on the

Close "×" button.
8 Play the Audio signal of a Player connected to the

D
Mixer, and confirm that a sound is output by the
MASTER output.
The TRIM knob, Channel Fader, MASTER LEVEL
knob of the input path do operation like normal mixer
use.
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6. SERVICE MODE
6.1 TEST MODE
A
1. Description of Test Modes
The Following 10 test modes are provided for this unit:
1 Mode 1 : Confirmation of software version. "Version" 7 Mode 7 : Fader test. "FDRTEST"
2 Mode 2 : All LEDs & FL display "OFF" mode. "ALL CLR" 8 Mode 8 : Confirmation of device. "DEVICE"
3 Mode 3 : ALL LEDs & FL display "ON" mode. "ALL SET" 9 Mode 9 : Channel Level Indicator LED test. "LEDTEST"
4 Mode 4 : KEY operating test. "KEY TEST" a Mode 10 : AD values of the rotary VRs test. "VOL AD"
5 Mode 5 : SELECT SW Operating test. "SW TEST" b Mode 11 : AD values of the fader test. "FDR AD"
6 Mode 6 : Rotary VRs value test. "VOLTEST"
2. Test Mode
Test Mode : ON Cyclic operation
Mode 1 Mode 2 Mode 3

MIDI FADER START CUE (Rear panel)
ON/OFF CH-2 CH1 POWER ON TAP
Mode 11 Mode 4
Test Mode
(Mode 1) TAP
Mode 10 Mode 5
C
Mode 9
Mode 8 Mode 7 Mode 6
Test Mode : CANCEL
(Rear panel)
POWER OFF POWER SW
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A
3. Test mode Contents
1 Mode 1 : Confirmation of software version

• Mode for confirmation of the versions of the system, MAIN UCOM, SUB UCOM, DSP (program), DSP (data), USB UCOM,
FPGA and BOOT.
When this mode is entered, “Version” is displayed at the top of the FL display.
• Mode 1 consists of 8 pages for indicating the versions of the system, MAIN UCOM, SUB UCOM, DSP (program), DSP (data),
USB UCOM, FPGA and BOOT.
The pages can be changed by pressing the BEAT c, d button.
When Mode 1 is entered, the System Version Display mode is automatically entered.
B
BEAT BEAT BEAT

d button d button d button
Software name
BEAT BEAT BEAT

c button c button c button
version
BEAT BEAT BEAT

d button c button d button
BEAT BEAT BEAT

d button d button d button D
BEAT BEAT BEAT

Software Name FL Display

System SYS
MAIN UCOM M
SUB UCOM SUB
DSP (program) D_P
DSP (data) D_D
USB UCOM USB
FPGA F
BOOT BT
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A
2 Mode 2 : All LEDs & FL display “OFF” mode
• Mode for extinguishing all the LEDs and FL segments.
Only after this mode is entered, “ALL CLR” is displayed for about 1 second at the top of the FL display.
3 Mode 3 : All LEDs & FL display “ON” mode

• Mode for lighting all the LEDs and FL segments.
Only after this mode is entered, “ALL SET” is displayed for about 1 second at the top of the FL display.
B
4 Mode 4 : Key operating test

• Mode for indicating a pressed key with lighting of an LED and indication on the FL display.
When this mode is entered, “KEYTEST” is displayed at the top of the FL display.
• The name of a pressed key is indicated on the FL display and The key LED which can light lit.
Operating Keys Lighting LED FL Display Remark
C MIDI ON/OFF button MIDI ON/OFF button LED MD_ON

MIDI START/STOP button None MD_ST
FADER START CH-2 button FADER START CH-2 button LED FSCH2
FADER START CH-3 button FADER START CH-3 button LED FSCH3
CUE CH1 button CUE CH1 button LED CUE_1
CUE MASTER button CUE MASTER button LED CUE_M
D
CUE EFFECT button CUE EFFECT button LED CUE_E
BEAT c button None BEAT<
BEAT d button None BEAT>
AUTO/TAP button None AUTO
SETUP (WAKE UP) button SETUP (WAKE UP) button LED SETUP
COLOR FX NOISE button COLOR FX NOISE button LED CFX_1
COLOR FX JET button COLOR FX JET button LED CFX_2
COLOR FX CRUSH button COLOR FX CRUSH button LED CFX_3
COLOR FX FILTER button COLOR FX FILTER button LED CFX_4
E
BOOST button BOOST button LED and COLOR control LED BOOST
EFFECT ON/OFF button EFFECT ON/OFF button LED EFXon
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5 Mode 5 : SELECT SW Operating test. "SW TEST" A
• When this mode is entered, “SW TEST” is displayed at the top of the FL display.
Operating Switches Lighting LED Remark

: CD/LINE 7 dB
CD/LINE, PHONO,
: PHONO CH1 Channel Level Indicator LED 10 dB
USB 1/2 selector switch CH1
: USB 1/2 OVER
: CD/LINE 7 dB
CD/LINE, LINE,
: LINE CH2 Channel Level Indicator LED 10 dB
: USB 3/4 OVER
: CD/LINE 7 dB B
CD/LINE, LINE,
: LINE CH3 Channel Level Indicator LED 10 dB
: USB 5/6 OVER
: CD/LINE 7 dB
CD/LINE, PHONO,
: PHONO CH4 Channel Level Indicator LED 10 dB
: USB 7/8 OVER
: Assign A -24dB
CROSS FADER ASSIGN
: THRU CH1 Channel Level Indicator LED -15dB
(A, THRU, B) selector switch CH1
: Assign B -10dB
: Assign A -24dB
CROSS FADER ASSIGN
: THRU CH2 Channel Level Indicator LED -15dB C
: Assign B -10dB
: Assign A -24dB
CROSS FADER ASSIGN
: Assign B -10dB
: Assign A -24dB
CROSS FADER ASSIGN
: Assign B -10dB
: OFF -1dB
OFF, ON, TALK OVER
: ON CH1 Channel Level Indicator LED 0dB
selector switch
: TALK OVER 1dB D
MONO SPLIT, STEREO : MONO SPLIT -5dB
CH1 Channel Level Indicator LED
selector switch : STEREO -3dB
: MONO 0dB
MONO, STEREO selector switch CH2 Channel Level Indicator LED
: STEREO 1dB
EQ CURVE (ISOLATOR, EQ) : ISOLATOR -3dB
selector switch : EQ -2dB
CH FADER : Left 0dB
selector switch : Right 1dB
: Left -1dB
CROSS FADER
: MID CH4 Channel Level Indicator LED 0dB
selector switch E
: Right 1dB
:1 -24dB
:2 -15dB
:3 -10dB
Effect channel selector switch :4 -7dB
Master Level Indicator ED
1, 2, 3, 4, MIC, CF.A, CF.B,
: MIC L CH -5dB
MASTER
: CF.A -3dB
: CF.B -2dB
: MASTER -1dB
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A
Operating Switches Lighting LED Remark
: DELAY -24dB
: ECHO -15dB
: SPIRAL -10dB
: REVERB -7dB
: TRANS -5dB
Beat effect selector switch : FILTER -3dB
DELAY, ECHO, SPIRAL, REVERB, : FLANGER -2dB
Master Level Indicator LED
TRANS, FILTER, FLANGER,
: PHASER R CH -1dB
PHASER, ROBOT, VINYL BRAKE,
SLIP ROLL, ROLL, REV ROLL, : ROBOT 0dB
B SND/RTN : VINYL BRAKE 1dB
: SLIP ROLL 2dB
: ROLL 4dB
: REV ROLL 7dB
: SND/RTN 10dB
This mode is also used to check operation of the TIME control.

The value displayed on the FL display increases/decreases as you turn the TIME control:
Minimum value Initial value Maximum value
Operation range
Initial value: 0
C Maximum value: 100
Minimum value: -100
Turn Turn
counterclockwise. clockwise.
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A
Correspondence diagram of Mode 5 : SELECT SW Operating test. "SW TEST"
1 3 4
C
2
2
E
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A
6 Mode 6 : Rotary VRs value test. "VOLTEST"
• Mode for confirmation of the AD conversion value for each rotary VR on the operation panel with lighting of a level indicator
LED or the segments on the FL display
When this mode is entered, “VOLTEST” is displayed at the top of the FL display.
• To indicate the AD conversion values for several rotary VRs with a level indicator, the rotary VRs are divided into 4 groups.
The group pages can be changed by pressing the BEAT c, d button.
Group 1 Group 2 Group 3 Group 4
BEAT BEAT BEAT

d button d button d button
B
Group No. BEAT BEAT BEAT

BEAT
d button
C
[Use of this mode during repair]

• For failure judgment of the rotary VRs
• For operation check of a rotary VR after replacement
• Group 1
Rotary VRs whose AD conversion values can be confirmed:
• CH1 TRIM control, CH2 TRIM control, CH3 TRIM control, CH4 TRIM control, EQ HI control,
EQ LOW control, COLOR control
D
VR to be tested Lit LED or FL Remarks
"-∞": Lights off
CH1 TRIM control CH1 Channel Level Indicator LED
"+9": Full Illuminate
"-∞": Lights off
"-∞": Lights off
"-∞": Lights off
"-12": Lights off
EQ HI control Master Level Indicator L LED
E "-12": Lights off
EQ LOW control Master Level Indicator R LED
"LOW": Lights off
COLOR control At the bottom of the FL display
"HIGH": Full Illuminate
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• Group 2 A

• CH1 EQ/ISO HI control, CH2 EQ/ISO HI control, CH3 EQ/ISO HI control, CH4 EQ/ISO HI control,
MIXING control, LEVEL control
"-26/-∞": Lights off
CH1 EQ/ISO HI control CH1 Channel Level Indicator LED
B
"CUE": Lights off
MIXING control Master Level Indicator L LED
"MASTER": Full Illuminate
"-∞": Lights off
LEVEL control Master Level Indicator R LED
"0": Full Illuminate
• Group 3
• CH1 EQ/ISO MID control, CH2 EQ/ISO MID control, CH3 EQ/ISO MID control, CH4 EQ/ISO MID control,
MASTER LEVEL control, BALANCE control
C
CH1 EQ/ISO MID control CH1 Channel Level Indicator LED
"-∞": Lights off
MASTER LEVEL control Master Level Indicator L LED
"L": Lights off D
BALANCE control Master Level Indicator R LED
"R": Full Illuminate
• Group 4
• CH1 EQ/ISO LOW control, CH2 EQ/ISO LOW control, CH3 EQ/ISO LOW control, CH4 EQ/ISO LOW control,
BOOTH MONITOR control, LEVEL/DEPTH control
CH1 EQ/ISO LOW control CH1 Channel Level Indicator LED
CH2 EQ/ISO LOW control CH2 Channel Level Indicator LED E
"-∞": Lights off
BOOTH MONITOR control Master Levele Indicator L LED
"MIN": Lights off
LEVEL/DEPTH control Master Levele Indicator R LED
"MAX": Full Illuminate
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: Group 1
: Group 2
: Group 3
: Group 4
7 Mode 7 : Fader test. "FDRTEST"

• Mode for confirmation of the values of CH1–4 Channel FADER and CROSS FADER with the level indicator LEDs.
When this mode is entered, “FDRTEST” is displayed at the top of the FL display.

• For failure judgment of the faders
• For operation check of a fader after replacement
Fader to be tested Lit LED Remarks
"0": Lights off
E CH1 Channel Fader CH1 Channel Level Indicator LED
"0": Lights off
CH2 Channel Fader CH2 Channel Level Indicator LED
"0": Lights off
"0": Lights off
"A": Lights off
Cross Fader Master Level Indicator L LED
"B": Full Illuminate
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8 Mode 8 : Confirmation of device. "DEVICE" A
• Mode for confirming device information

When this mode is entered, "DEVICE" is displayed at the top of the FL display.
• With this mode, perform only a check of SDRAM for DSP.
If SDRAM works normally at the middle of FL display, be indicated with "OK" and be indicated at the abnormality with "NG".
When a system is checking it, be indicated with "CHK".
B
check result
Device name
Device, Address FL Display Name Remarks

During a check : CHK
SDRAM for DSP SDRAM Normal : OK
Abnormal : NG C
9 Mode 9 : Channel Level Indicator LED test. "LEDTEST"

• Mode for confirming lighting of the level indicator LEDs
When this mode is entered, “LEDTEST” is displayed at the top of the FL display.
The LEDs for CH1 CUE button, CH2 CUE button, CH3 CUE button, CH4 CUE button, MASTER CUE button, D
and EFFECT CUE button light.
• Each time the CUE button is pressed, the level indicator LEDs for each channel light one by one from the bottom.
At first, all the LEDs are unlit.
If the CUE button is pressed after it was pressed 15 times (when the top LED is lit), all the LEDs become unlit again.
Button to be tested Lit Meter Remarks
CH1 CUE button CH1 Channel Level Indicator LED

E
MASTER CUE button Master Level Indicator L LED
EFFECT CUE button Master Level Indicator R LED
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A
a Mode 10 : AD values of the rotary VRs test. "VOL AD"
• Mode for displaying the AD values of rotary VRs on the FL display for confirmation.
When this mode is entered, “VOL AD” is displayed at the top of the FL display.
To indicate the AD values for several rotary VRs with a single level meter, the rotary VRs are divided into 4 groups.
The group pages can be changed by pressing the BEAT c, d button.
When the groups are switched, the name of the VR at the top of the group list is displayed at the bottom of the FL display.
The rotary VRs in a group can be changed by pressing the CH1–4 CUE button.
• The maximum amplitude value among AD conversion values for a rotary VR being tested can be confirmed on each page
of this mode.
The value is expressed with the number of segments lit at the bottom of the FL display. The measurement procedure is as
B indicated below.
Turn the rotary VR you wish to test to a desired position then press the EFFECT CUE key to start measurement. To reset,
press the EFFECT CUE key again. During measurement, the maximum amplitude value will be continuously displayed.
The EFFECT CUE key is lit during measurement and goes dark when reset.
Details on the amplitude value display are shown in the figures below.
An amplitude value in the range of ±1 to ±6 with regard to the VR value at the beginning of measurement is displayed.
For a value greater than +7 or less than -7, all the 7 segments are lit.
BEAT
d button
C
Group 1 Group 2 Group 3 Group 4
BEAT BEAT BEAT

AD value
(in hexadecimal d button d button d button
Name of the notation)
rotary VR
Amplitude
value
BEAT BEAT BEAT
D
CH1 CH2 CH3 CH4

CUE button CUE button CUE button CUE button
Note:
If the CUE button is pressed while the last VR on each group list is displayed, the top VR on that group list will then
be displayed.
When the BEAT c, d button is pressed for a layer lower than the 2nd one, the top VR on the list of the next group
will be displayed.
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A
• For failure judgment of the rotary VRs
As a guide, amplitude values higher than +4 or lower than -4 may be judged as failure.
The VRs can be set to any position during measurement. Possible symptoms are shown below.
• The volume changes arbitrarily.
• Interrupted sound leakage occurs even if the volume is decreased to the minimum at the Master or ZONE.
• The MIDI signal is output even if the corresponding VR is not operated.
• For operation check of a rotary VR after replacement
• Group 1 B
• CH1 TRIM control, CH1 EQ/ISO HI control, CH1 EQ/ISO MID control, CH1 EQ/ISO LOW control,
COLOR control, EQ HI control, EQ LOW control
VR to be tested FL Display Name Remarks

"-∞": 000
CH1 TRIM control CH1_T
"+9": 3FF
"26/-∞": 000
CH1 EQ/ISO HI control CH1_H
"+6": 3FF
"26/-∞": 000
CH1 EQ/ISO MID control CH1_M
"+6": 3FF
C
"26/-∞": 000
CH1 EQ/ISO LOW control CH1_L
"+6": 3FF
"LOW": 000
COLOR control BOOST
"HIGH": 3FF
"-12": 000
EQ HI control MIC_H
"+12": 3FF
"-12": 000
EQ LOW control MIC_L
"+12": 3FF
*As an AD value that is displayed on the FL display is the one before a hysteresis removal process,
and as it has an amplitude, an error of about ±2 may be produced.
D
• Group 2
MIXING control, LEVEL control

"-∞": 000
"+9": 3FF
"-26/-∞": 000
"+6": 3FF
"-26/-∞": 000 E
"+6": 3FF
"-26/-∞": 000
"+6": 3FF
"CUE": 000
MIXING control HP_MX
"MASTER": 3FF
"-∞": 000
LEVEL control HP_LV
"0": 3FF
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A
• Group 3
MASTER LEVEL control, BALANCE control

"-∞": 000
"+9": 3FF
"-26/-∞": 000
"+6": 3FF
"-26/-∞": 000
B "+6": 3FF
"-26/-∞": 000
"+6": 3FF
"-∞": 000
MASTER LEVEL control MSTLv
"0": 3FF
"L": 000
BALANCE control MST_B
"R": 3FF
C
• Group 4
BOOTH MONITOR control, LEVEL/DEPTH control

"-∞": 000
"+9": 3FF
"-26/-∞": 000
"+6": 3FF
"-26/-∞": 000
D "+6": 3FF
"-26/-∞": 000
"+6": 3FF
"-∞": 000
BOOTH MONITOR control BOOTH
"0": 3FF
"MIN": 000
LEVEL/DEPTH control LV/DP
"MAX": 3FF
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b Mode 11 : AD values of the fader test. "FDR AD" A
• Mode for displaying the AD values of the faders on the FL display for confirmation
When this mode is entered, “FDR AD” is displayed at the top of the FL display.
• Mode 11 consists of 5 pages for indicating the values of 5 faders.

The pages can be changed by pressing the BEAT c, d button.
When the groups are switched, the name of the VR at the top of the group list is displayed at the bottom of the FL display
and its AD value is displayed in the middle.
• The maximum amplitude value among AD conversion values for a fader being tested can be confirmed on each page of
this mode. The value is expressed with the number of segments lit at the bottom of the FL display. The measurement
procedure is as indicated below. B
Set the fader you wish to test to a desired position then press the EFFECT CUE key to start measurement. To reset, press
the EFFECT CUE key again. During measurement, the maximum amplitude value will be continuously displayed.
The EFFECT CUE key is lit during measurement and goes dark when reset.
Details on the amplitude value display are shown in the figures below.
An amplitude value in the range of ±1 to ±7 with regard to the VR value at the beginning of measurement is displayed.
For a value greater than +7 or less than -7, all the 7 segments are lit.
BEAT BEAT
d button d button C
AD value
(in hexadecimal
notation)
Fader name
BEAT BEAT
c button c button
Amplitude
value BEAT BEAT
c button d button
BEAT
c button D
BEAT
d button
BEAT
d button
• For failure judgment of the faders
As a guide, amplitude values higher than +4 or lower than -4 may be judged as failure.
The VRs can be set to any position during measurement. Possible symptoms are shown below.
• The volume changes arbitrarily.
• Interrupted sound leakage occurs even if the volume is decreased to the minimum at the fader. E
• The MIDI signal is output even if the corresponding VR is not operated.

• For operation check of a fader after replacement
Faders that can be confirmed
Fader to be tested FL Display Name Remarks
"0": 000
CH1 Channel Fader CH1
"10": 3FF
"0": 000
CH2 Channel Fader CH2 "10": 3FF
"0": 000
"10": 3FF
"0": 000 F
"10": 3FF
"A": 000
Cross Fader CROSS "B": 3FF
DJM-750-K 61
5 6 7 8
1 2 3 4
A 4. Mode transition flowchart

START
Mode 1:
Confirmation of software version. "Version"
BEAT
System MAIN UCOM SUB UCOM DSP (program) DSP (data) USB UCOM FPGA BOOT
Version display Version display Version display Version display Version display Version display Version display Version display
TAP
Mode 2 :
All LEDs & FL display "OFF" mode. "ALL CLR"
B TAP
Mode 3 :
ALL LEDs & FL display "ON" mode. "ALL SET"
TAP
Mode 4 :
KEY operating test. "KEY TEST"
TAP
Mode 5 :
SELECT SW Operating test. "SW TEST"
TAP
Mode 6 :
Rotary VRs value test. "VOLTEST"
BEAT BEAT BEAT
C Group 1 Group 2 Group 3 Group 4
TAP
Mode 7 :
Fader test. "FDRTEST"
TAP
Mode 8 :
Confirmation of device. "DEVICE"
TAP
Mode 9 :
Channel Level Indicator LED test. "LEDTEST"
TAP
Mode 10 :
D AD values of the rotary VRs test. "VOL AD"
CH 1 TRIM CH 2 TRIM CH 3 TRIM CH 4 TRIM

CH1 CUE CH2 CUE CH3 CUE CH4 CUE
CH 1 HI CH 2 HI CH 3 HI CH 4 HI
CH 1 MID CH 2 MID CH 3 MID CH 4 MID
CH 1 LOW CH 2 LOW CH 3 LOW CH 4 LOW

BEAT BEAT BEAT
COLOR HP MIXING MASTER BOOTH

E LEVEL MONITOR
CH1 CUE CH2 CUE
CH3 CUE CH4 CUE
EQ HI HP LEVEL LEVEL/
MASTER
BALANCE DEPTH
CH1 CUE CH2 CUE
CH3 CUE CH4 CUE
EQ LOW
CH1 CUE
TAP
Mode 11 :
AD values of the fader test. "FDR AD"
F BEAT BEAT BEAT BEAT

CH1 CH2 CH3 CH4 CROSS
FADER FADER FADER FADER FADER
TAP
62 DJM-750-K
1 2 3 4
5 6 7 8
6.2 ABOUT THE DEVICE
A
Device Name Function Part No. Reference No. Assy
MAIN UCOM Main control DYW1827 IC2803 MAIN Assy
FLASH (4M) Memory for Main, USB UCOM (Firmware) DYW1828 IC2802 MAIN Assy
FPGA For RAM, clock divider, SRC for digital out XC3S50A-4FTG256C IC3007 MAIN Assy
FLASH (4M) Memory for DSP (Firmware) DYW1829 IC3008 MAIN Assy
DSP Audio DSP D810K013DZKB400 IC3201 MAIN Assy
SDRAM (256M) Memory for DSP (Work) M12L2561616A-5TG2A IC3202 MAIN Assy
USB UCOM Controller for USB ADSP-BF525BBCZ-5A IC2603 MAIN Assy
SDRAM (64M) Memory for USB UCOM (Work) M12L64164A-5TG2Y IC2604 MAIN Assy
B
SUB UCOM LED, FL, KEY, VR control DYW1830 IC6601 PNLA Assy
Two or more FLASH and SDRAM are mounted in this unit.
Please judge the device which you should diagnose in reference to this list.
DJM-750-K 63
5 6 7 8
1 2 3 4
7. DISASSEMBLY
A Note: Even if the unit shown in the photos and illustrations in this manual may differ from your product, the
procedures described here are common.
Knobs and Volumes Location
D
B
E
F
B
C
H
D
I
J
C
E
A DAA1302 ×1 B DAA1301 ×2 C DAA1212 ×2 D DAA1210 ×3 E DAA1220 ×4
White
White White
White White
Black Gray Black Black Black
F DAA1306 ×12 G DAA1309 ×1 H DAA1205 ×1 K Slider knob 1 Slider knob 2 Slider knob stopper
(DAC2684) ×5 (DAC2685) ×5 (DNK5888) ×5
White
White White
Slider knob 2
Black White
Gray
Gray
White Projection
Slider knob 1
Black
I DAA1213 ×1 J DAA1214 ×1
F White Gray
Slider knob stopper
Black Black
64 DJM-750-K
1 2 3 4
5 6 7 8
Disassembly A
[1] Control Panel Section

[1-1] Front panel
(1) Remove the six screws. (BBZ40P060FTB)
(2) Remove the front panel.
Screw tightening order
3 2 1
B
1 ×6
2
6 5 4
Front panel
[1-2] Control panel section

(1) Remove the one knob (DAA1302).
(2) Remove the two screws. (BBZ30P060FTB)
1 4 ×2
(3) Remove the two screws. (BBZ30P060FTC)
(4) Remove the two screws. (BPZ30P120FTB) 2 ×2
(5) Remove the six screws.
(K: DBA1290, S: DBA1436)
5 5 ×3
×3 D
3 ×2
E
2 1 1 2
2
DJM-750-K 65
5 6 7 8
1 2 3 4
A (6) Remove the control panel section.

6
Control panel section

B
[2] INPUT Assy

(1) Disconnect the four short pin plugs. 1 ×2 1 ×2 3
(2) Remove the two washers and two nuts. 4 4 4
(3) Remove the two screws. (BBZ30P060FTB) 4
(4) Remove the four screws. (BPZ30P080FTB)
2 ×2 3
• Rear view
D Screw tightening order Nut tightening order
Tighten the nuts after tightening the screws indicated in the figure
on the left.
4 3 2 1
5 6
Bracket/SCN
(5) Remove the bracket/SCN by removing the one 5
screw. (BBZ30P060FTC) 6 MIC1 Assy
(6) Remove the MTRM Assy with stay by removing
the one screw. (BBZ30P060FTC)
(7) Remove the MIC1 Assy.
MTRM Assy
7
66 DJM-750-K
1 2 3 4
5 6 7 8
(8) Remove the five screws. (BBZ30P060FTC) A

Shield plate/INP
(9) Remove the shield plate/INP.
8 8
4 8
5
3 8
2 8 9
1
B
(10) Remove the three screws. (BBZ30P060FTC) INPUT Assy

Before tightening these screws, be sure to tighten
C
the screws and nuts for securing the INPUT Assy
to the rear panel. (Positioning of the INPUT Assy
is determined by its attachment position on the
rear panel.)
10 10 10
1 2 3 D
(11) Lift up the INPUT Assy to a front direction.
PNLA Assy Control panel section
Diagnosis PNLB Assy MAIN Assy

E
INPUT Assy
11 ACSW
Assy
FADC Assy
HPJK Assy
SEC/HP Assy F
REG Assy
PRIMARY Assy
TRANS Assy
DJM-750-K 67
5 6 7 8
1 2 3 4
A
Reference information
Screw tightening order (Rear panel) Screw tightening order (MAIN Assy)
2 1
a b
A B C
3 c d
5 4
Rear panel
Note:
B
The rear panel is attached to the chassis with the INLET
connector. Therefore, when detaching the rear panel, Nut tightening order (MAIN Assy)
remove the two screws for INLET connector. Tighten the nuts after tightening the screws indicated in the
figure on the upper.
Screw tightening order (Bracket PSW)
1 2
1 2
C Bracket PSW
ACSW Assy Screw tightening order (MAIN Assy)

Before tightening these screws, be sure to tighten the
screws and nuts for securing the MAIN Assy to the rear
panel. (Positioning of the MAIN Assy is determined by its
Bracket PSW
attachment position on the rear panel.)
1 2
D MAIN Assy
2 1 6
Rear panel
3 4 5
E
Screw tightening order (SEC/HP, REG Assy) Screw tightening order (Stay/INP)
7 6 5
SEC/HP Assy MAIN Assy

1
2 2
3 1
F
8
4
REG Assy
Stay/INP
68 DJM-750-K
1 2 3 4
5 6 7 8
Jumper wire styling A
3 rotations.
Screw tightening order (Bracket/USB) (For improving sound quality)
3 TRANS
Bracket/USB Assy
2 1
CN3101
Pabel/USB CN1
SEC/HP
Assy
B
Screw tightening order (Bracket/MIC)
CN4
1 2 CN5001
REG
Assy C
SEC/HP
Bracket/MIC Assy
Screw tightening order (Side panel L)
Bend the FFC at the place A above so that the cable

2 3 1 will not bulge in the direction indicated by the arrow (i).
6 4
Locking wire saddle position D
5
Side panel L (LXJ model only)
board align TRANS Assy
Screw tightening order (Side panel R)
1 3 2
Coil side
Cable
4 5 6 board align E
Power level select SW Side panel R

(Only LXJ model) Locking wire
saddle
Side of the product
1: Adhere the Locking Wire Saddle so that its corner and

that of the board align.
2: Be sure to clamp the cables to the Locking Wire Saddle F
so that they are styled coming from the coil side toward
the side of the product, as shown in the figure above.
DJM-750-K 69
5 6 7 8
1 2 3 4
A
[3] Panel Section
[3-1] Control panel and Fader panel
(1) Remove the all knobs. 1 ×28
(2) Remove the five silider knobs 2,
five slider knobs 1, five slider knob stoppers.
(See below.)
The reference of the direction
Side on which
the line reaches the bottom
Stopper
(rear direction)
Stopper
(right direction)
2 ×5
• Disassembly of the slider knob

The new slider knob adopted by this product is designed so that it is not pulled out easily.
Therefore, the method for removing the slider knob is different from the conventional method; it can only be pulled out after
slider knob 2 is removed.
D
1 Find the side on which the line reaches 2 Insert a pair of tweezers etc. beneath 3 Remove the slider knob 2.
the bottom. the line then push the slider knob 2 upward.
To protect the panel from being
scratched, use protective material.
slider knob 2
slider knob 2
E *: During reassembly, fully push

Tweezers Protective material down slider knob 2 until it is
dented into Slider knob 1.
4 Remove the Slider knob 1. 5 Remove the slider knob stopper.
Slider knob 1
slider knob stopper
70 DJM-750-K
1 2 3 4
5 6 7 8
(3) Remove the six screws. A

(K: DBA1290, S: DBA1436) Control panel
(4) Remove the five screws. 4 ×5
(K: DBA1290, S: DBA1436) 3 ×4
(5) Remove the Control panel and panel/FD.
Note: 3
When you remove only panel/FD, it is a
process of step (2), (4).

(for MAIN unit)
6 2 B
8 12 3
Panel/FD 5
9
4 5
11
13 14
C
15
10 16 17 7
3 1
Note:
Screws 1 – 6 are for securing the control panel and
stay/PNL, screws.
Screws 7 – c are for securing the Control Panel Assy
and the cabinet of the product.
Screws d – h are for securing the Panel/FD and
stay/PNL. D
[3-2] Fader section

(1) Remove the two screws. (BBZ30P060FTC) FAD1 Assy
(2) Remove the FADC Assy. FAD2 Assy
(3) Disconnect the one connector. (CN7002)
FAD3 Assy
(4) Remove the eight screws. (BSZ20P040FTB)
(5) Disconnect the four connectors. FAD4 Assy
(CN6611, 6610, 6612, 6609) 6 ×4
(6) Remove the FAD1 to FAD4 Assemblies.
4 ×8
E
• Connectors color
Match the color of a connected connector.
5 ×2
5 ×2
3
CN6611
CN6612
CN6610
CN6609
1 ×2
CN7002
W R W R
(Red) (Red)
(White) (White)
2
FAD1
FAD2
FAD3
FAD4
FADC Assy
F
DJM-750-K 71
5 6 7 8
1 2 3 4
A
FADC Assy FAD1 FAD2 FAD3 FAD4
Assy Assy Assy Assy
1 3 5 7
2 1
CRF stay
2 4 6 8
2 1
FADC Assy
[3-3] PNLA and PNLB Assemblies

(1) Remove the lens. 1
C (2) Remove the ring. Lens
(3) Remove the reflector.
2
Ring 3
Reflector
(4) Remove the 27 flange nuts M9. 4 ×27

(5) Remove the one nut.
72 DJM-750-K
1 2 3 4
5 6 7 8
(6) Remove the button Assy/UTY. 7 6 A

×8 Button Assy/UTY
(7) Remove the four slide SW caps (W).
Slide SW Cap (W)
(8) Remove the SW packing (EF).
B
8
SW packing (EF)
(9) Reverse the control panel section. 10 ×6

(10) Remove the six screws. (BBZ30P060FTC)
(11) Remove the five screws. (BBZ30P060FTC) 11 ×2
(12) Remove the barrier/PNL and barrier/A. Barrier/PNL
C
(13) Remove the 14 screws. (BBZ30P060FTC)
(14) Remove the PNLA and PNLB Assemblies.
11 ×3
12
Barrier/A
12 13 ×14
PNLA Assy D
PNLB Assy
14
E
• Bottom view
DJM-750-K 73
5 6 7 8
1 2 3 4
A
Flexible cables, Barriers styling
3 8
PNLA Assy 7
Barrier/A
6
5 9
1 10
B 4 2
13
PNLB Assy 12
11 14
C
Barrier/PNL
21 22 19
Barrier/PNL
20
18
25
17 24 FFC FFC
Barrier/A
15
D 16 23
Note:
Tighten the screws (l to p) after performing styling
of flexible cables.
Put the FFC between this slit (barrier/PNL).
Barrier/PNL
E
Barrier/A
FFC FFC
Bend the two FFCs on some this side

F of edge (barrier/PNL).
74 DJM-750-K
1 2 3 4
5 6 7 8
8. EACH SETTING AND ADJUSTMENT

8.1 NECESSARY ITEMS TO BE NOTED
It is recommended that you take note of the setting data before starting repair. A
Use “8.4 SHEET FOR CONFIMATION OF THE USER SETTINGS” for taking notes.
After repairing, be sure to check the version of the firmware (see “Mode 1: For confirmation of the version” in “TEST MODE” ),
and if it is not the latest one, update to the latest version.
When the following parts are replaced, confirmation of the version of the firmware, updating to the latest version of the
firmware.
• MAIN Assy
(MAIN UCOM: IC2803, FLASH: IC2802, FLASH: IC3008)
• PNLA Assy
(SUB UCOM: IC6601)
B
DJM-750-K 75
5 6 7 8
1 2 3 4
8.2 UPDATING OF THE FIRMWARE
A A. Confirmation of the Download Files:

1. Unzip the downloaded file.
For Windows:
Save the downloaded file [DJM-750Updater_vxxx_Win.zip] to an arbitrary directory such as desktop and unzip it.
For MacOS:
Save the downloaded file [DJM-750Updater_vxxx_Mac.dmg] to an arbitrary directory such as desktop and double click to
mount it.
2. Check the unzipped file.

For Windows:
B
The [DJM-750Updater_vxxx_Win] folder is generated when the file is unzipped.
Please ensure the following file is included in the folder.
1. [DJM750UP.upd]
2. [DJM-750Updater_vxxx.exe]
3. pcupdate.dll
For MacOS:
The [DJM-750Updater_vxxx_Mac] folder is generated when the file is extraced.
Please ensure the following file is included in the folder.
1. [DJM-750Updater_vxxx.app]
Notes:
C
• xxx is the version of the new firmware.
• Extension (.exe or .app) might not be shown depending on your computer settings.
B. Set up DJM-750 for updating:

1. Connect your computer with DJM-750.
Connect your computer and the DJM-750 using a USB cable.
2. Go into update mode.

While holding [CUE (BEAT EFFECT)] and [ON/OFF (BEAT EFFECT)] buttons, press the Power button to go into update mode.
D
3. Check the current version.
Please check the current version of your firmware by checking the version displayed on the VFD.
If the current version, xxx, is displayed, you do not need to continue the update process.
3 Check the current version.

1 Connect your computer
E with DJM-750 by USB cable.
2 Press [CUE (BEAT EFFECT)]

button and
[ON/OFF (BEAT EFFECT)]
button with power button.
76 DJM-750-K
1 2 3 4
5 6 7 8
C. Update the firmware from your computer: A
1. Start updating your firmware. <STEP4> Update screen when the update is completed
Close all the applications before you start updating. Make sure that the update process has been completed.
When the following “Update completed” message appears,
click [OK]. “SUCCESS” message appears on the VFD of
<STEP1> Start the updater program. DJM-750 if the update is successfully completed.
For Windows:
Double click [DJM-750Updater_vxxx.exe] to start the updater
program.
For MacOS:
Double click [DJM-750Updater_vxxx.app] to start the updater B
program.
<STEP2> Select a language.

Select a language from the dropdown list and click [OK].
The figure below shows selecting English.
<STEP3> Check the version.

Ensure that the version for this update is x.xx and click [Start].
The figure below shows an example.
DO NOT remove Power and/or USB cables during updating.
<STEP5> Restart DJM-750.

D
Please turn off the power of DJM-750 and then turn it on
again.
2. Check the current DJM-750 version to make sure that

the update was completed.
<STEP1> Start DJM-750 in update mode:
While holding [CUE (BEAT EFFECT)] and
[ON/OFF (BEAT EFFECT)] buttons, press the Power button.
Update screen during updating
Please wait until the progress bar on the screen reaches 100%. <STEP2> Check the current version: E
If the current version x.xx is displayed on the VFD of the

DJM-750, the update has been successfully completed.
[Reference Information]
You can run this updater program only on the following OS:
Windows: WindowsXP/ Windows Vista/ Windows 7/ Windows8
MacOS: OS X 10.6/ 10.7/ 10.8
It will take approximately 3 minutes to complete the update

F
process.
DJM-750-K 77
5 6 7 8
1 2 3 4
8.3 USER SETABLE ITEMS
A FL Initial Value Part Content to be

Setting Item Display Setting Area Part No. Ref No. Assy Stored
(Factory settings) Name
MIDI CH MIDI CH 1 to 16 1
USER MIDI Button Type MIDI BT TGL/TRG TGL

SETUP TALK OVER MODE TLK MOD ADV/NOR ADV
TALK OVER LEVEL TLK LVL -24dB/-18dB/-12dB/-6dB -18dB
Digital Master Out Level DOUT LV -19dB/-15dB/-10dB/-5dB -19dB
Digital Out Sampling Rate DOUT FS 48kHz/96kHz 96kHz Flash UTILITY

DYW1828 IC2802 MAIN
MASTER ATT. MST ATT -6dB/-3dB/0dB 0dB ROM setting
CLUB Auto Standby AUTOSTB ON/OFF ON

B
SETUP Mic Output To Booth Monitor MIC BTH ON/OFF ON
Peak Limiter PKLIMIT ON/OFF ON
PC Utility PC UTLY ON/OFF ON
Factory Reset INITIAL YES/NO NO
8.4 SHEET FOR CONFIRMATION OF THE USER SETTING
When you write down a setting item, please make use of this seat.
USER SETUP CLUB SETUP

D MIDI CH Digital Master Out Level
1 2 3 4 5 6 7 8 -19dB -15dB -10dB -5dB
9 10 11 12 13 14 15 16
Digital Out Sampling Rate
48kHz 96kHz
MIDI Button Type
TGL TRG
MASTER ATT.
-6dB -3dB 0dB
TALK OVER MODE
NOR ADV
Auto Standby
E
OFF ON
TALK OVER LEVEL
-24dB -18dB -12dB -6dB Mic Output To Booth Monitor
OFF ON
Peak Limiter
OFF ON
PC Utility
OFF ON
F
Factory Reset
NEVER perform FACTORY RESET before taking note
of setting data.
78 DJM-750-K
1 2 3 4
5 6 7 8
DJM-750-K 79
5 6 7 8
1 2 3 4
9. EXPLODED VIEWS AND PARTS LIST

NOTES: - Parts marked by “NSP” are generally unavailable because they are not in our Master Spare Parts List.
A
- The > mark found on some component parts indicates the importance of the safety factor of the part.
Therefore, when replacing, be sure to use parts of identical designation.
- Screws adjacent to b mark on product are used for disassembly.
- For the applying amount of lubricants or glue, follow the instructions in this manual.
(In the case of no amount instructions, apply as you think it appropriate.)
9.1 PACKING SECTION
SYXJ8 only
80 DJM-750-K
1 2 3 4
5 6 7 8
(1) PACKING SECTION PARTS LIST

Mark No. Description Part No.
> 1 Power Cord See Contrast table (2)
2 USB Cable DDE1128 A
3 Driver Software/ DXX2726

Operating Instructions CD-ROM
4 Read Before Use (Important)/ See Contrast table (2)
Quick Start Guide
NSP 5 Warranty See Contrast table (2)

NSP 6 Polyethylene Bag AHG7117
7 Packing Pad/A DHA1883
8 Packing Pad/B DHA1884
B
9 Packing Case See Contrast table (2)
10 Packing Sheet RHC1023
(2) CONTRAST TABLE

DJM-750-K/SYXJ8, UXJCB, LXJ, KXJ5, XJCN5, DJM-750-S/SYXJ8, UXJCB, LXJ, KXJ5 and XJCN5 are constructed the same
except for the following:
DJM-750-K DJM-750-K DJM-750-K DJM-750-K DJM-750-K
Mark No. Symbol and Description C
/SYXJ8 /UXJCB /LXJ /KXJ5 /XJCN5
> 1 Power Cord ADG7062 DDG1108 ADG7062 ADG7115 ADG7105
4 Read Before Use (Important) DRH1205 DRH1206 DRH1216 DRH1219 DRH1218
/Quick Start Guide
NSP 5 Warranty ARY7158 Not used Not used Not used Not used
9 Packing Case DHG3239 DHG3240 DHG3241 DHG3244 DHG3243
DJM-750-S DJM-750-S DJM-750-S DJM-750-S DJM-750-S

Mark No. Symbol and Description
> 1 Power Cord ADG7062 DDG1108 ADG7062 ADG7115 ADG7105
4 Read Before Use (Important) DRH1205 DRH1206 DRH1216 DRH1219 DRH1218
/Quick Start Guide
NSP 5 Warranty ARY7158 Not used Not used Not used Not used
D
9 Packing Case DHG3245 DHG3246 DHG3247 DHG3250 DHG3249
DJM-750-K 81
5 6 7 8
1 2 3 4
9.2 EXTERIOR SECION
Refer to
"9.4 CONTROL PANEL SECTION (1/2)" .
C
UXJCB
B only
B
F
C
A B
UXJCB
UXJCB, LXJ
only
only
C
D
D
F
E
B
A
G
F UXJCB
only
E C
E D
NON-CONTACT
CONTACT SIDE
LXJ only
F LXJ only
SIDE
UXJCB
Refer to
only
"9.3 BOTTOM SECTION" .
82 DJM-750-K
1 2 3 4
5 6 7 8
(1) EXTERIOR SECION PARTS LIST

1 USBI Assy DWX3431 21 USB Cover B DNK5868

2 INPUT Assy DWX3432 22 Side Panel L DNK6061 A
3 HPJK Assy DWX3433 23 Side Panel R See Contrast table (2)
4 MIC1 Assy DWX3441 24 Panel/USB DNK6120
5 MTRM Assy DWX3442 25 Knob/POW See Contrast table (2)
6 Plug/Pin DKM1024 26 Terminal Screw AKE-031

7 Shielded Conn-Cable DDA1043 27 Front Panel DNK6063
8 FFC/25P DDD1597 28 Knob/EQ DAA1302
9 FFC/22P DDD1598 NSP 29 Name Label See Contrast table (2)
10 Connector Assy PF04PP-S05 NSP 30 Label See Contrast table (2)
NSP 31 Caution Label See Contrast table (2) B

11 Cable PF04PP-S17
12 Stay/HP DNF1907 NSP 32 V Select Label See Contrast table (2)
13 Shield Plate/INP DNF1908 33 • • • • •
14 Bracket/USB DNF1909 34 Flange Nut M9 DBN1008
15 Bracket/MIC DNF1929 35 Nut (M12) NKX2FNI
16 Stay/INP DNF1911 36 Nut M12 DBN1018

17 Bracket/SCN DNH3090 37 Washer DEC2920
18 Nylon Rivet AEC1671 38 Screw (FE) See Contrast table (2)
19 Locking Mini Clamp DEC2439 39 Screw (M3*5) DBA1340
20 Holder VEC1355 40 Screw BBZ30P060FTB
C
41 Screw BBZ30P060FTC
42 Screw BBZ40P060FTB
43 Screw BPZ30P080FTB
44 Screw BPZ30P120FTB
(2) CONTRAST TABLE

DJM-750-K/SYXJ8, UXJCB, LXJ, KXJ5, XJCN5, DJM-750-S/SYXJ8, UXJCB, LXJ, KXJ5 and XJCN5 are constructed the same D
23 Side Panel R DNK6062 DNK6062 DNK6065 DNK6062 DNK6062
25 Knob/POW Not used Not used DNK6066 Not used Not used
NSP 29 Name Label DAL1260 DAL1245 DAL1246 DAL1249 DAL1248
NSP 30 Label Not used DRW1975 Not used Not used Not used
NSP 31 Caution Label Not used DRW2429 DRW2430 Not used Not used
NSP 32 V Select Label Not used Not used DRW2400 Not used Not used
38 Screw (FE) DBA1290 DBA1290 DBA1290 DBA1290 DBA1290
DJM-750-S DJM-750-S DJM-750-S DJM-750-S DJM-750-S E

23 Side Panel R DNK6062 DNK6062 DNK6065 DNK6062 DNK6062
25 Knob/POW Not used Not used DNK6066 Not used Not used
NSP 29 Name Label DAL1261 DAL1251 DAL1252 DAL1255 DAL1254
NSP 30 Label Not used DRW1975 Not used Not used Not used
NSP 31 Caution Label Not used DRW2429 DRW2430 Not used Not used
NSP 32 V Select Label Not used Not used DRW2400 Not used Not used
DJM-750-K 83
5 6 7 8
1 2 3 4
9.3 BOTTOM SECTION
PNLA
CN6602
PNLA INPUT
CN6601 CN4802
D
HPJK USBI
B CN9201 CN3801
INPUT
CN4803
E INPUT
CN4801 C
A
Silicon grease
(GEM1057)
Bottom side
C
A
O
D
B
P LXJ only
UXJCB
only
E
R
B
Q
LXJ only
LXJ only
84 DJM-750-K
1 2 3 4
5 6 7 8
(1) BOTTOM SECTION PARTS LIST

1 MAIN Assy DWX3430 21 Sheet/BOT DEC3404

2 REG Assy DWR1528 22 • • • • • A
3 SEC/HP Assy DWR1529 23 PCB Holder PNW2029
4 ACSW Assy DWR1532 24 Holder VEC1355
5 PRIMARY Assy See Contrast table (2) NSP 25 PC Support VEC1749
6 TRANS Assy See Contrast table (2) 26 Power Knob DAC2306

> 7 Fuse (T630 mA) AEK1052 27 Power Knob Guard DNK4534
> 8 AC Inlet See Contrast table (2) 28 Locking Wire Saddle See Contrast table (2)
> 9 Transformer See Contrast table (2) 29 Binder See Contrast table (2)
10 Jumper Wire D20PYY1010E 30 Nut (M12) NKX2FNI
31 Washer DEC2920 B
11 Connector Assy PF13EE-S17
NSP 12 Chassis/750 DNA1453 32 Screw See Contrast table (2)
13 Rear Panel See Contrast table (2) 33 Screw BBZ30P060FTB
14 Bracket PSW DNF1759 34 Screw BBZ30P060FTC
15 Shield Plate/PW DNF1906 35 Screw BPZ30P080FTB
NSP 16 Plate DNK6124 36 Screw IBZ30P080FTB

17 Foot (Rubber) REC-434 37 Screw IMZ30P040FTC
NSP 18 PCB Stay (FE) VNE2489 38 Screw PMB40P060FTB
NSP 19 Spacer AEB7092 39 Screw PPZ30P080FTB
20 Spacer DEB1998 C
(2) CONTRAST TABLE

5 PRIMARY Assy DWR1535 DWR1537 DWR1530 DWR1535 DWR1535
6 TRANS Assy DWR1536 DWR1538 DWR1531 DWR1536 DWR1536 D
> 8 AC Inlet/3P Not used DKP3915 Not used Not used Not used
> 8 AC Inlet/2P DKP3916 Not used DKP3916 DKP3916 DKP3916
> 9 Transformer DTT1256 DTT1257 DTT1256 DTT1256 DTT1256
13 Rear Panel DNC2101 DNC2102 DNC2103 DNC2106 DNC2105
28 Locking Wire Saddle Not used Not used DEC3439 Not used Not used
29 Binder Not used Not used ZCA-SKB90BK Not used Not used
32 Screw Not used PMH40P080FTC Not used Not used Not used

5 PRIMARY Assy DWR1535 DWR1537 DWR1530 DWR1535 DWR1535
6 TRANS Assy DWR1536 DWR1538 DWR1531 DWR1536 DWR1536 E
> 8 AC Inlet/3P Not used DKP3915 Not used Not used Not used
> 8 AC Inlet/2P DKP3916 Not used DKP3916 DKP3916 DKP3916
> 9 Transformer DTT1256 DTT1257 DTT1256 DTT1256 DTT1256
13 Rear Panel DNC2101 DNC2102 DNC2103 DNC2106 DNC2105
28 Locking Wire Saddle Not used Not used DEC3439 Not used Not used
29 Binder Not used Not used ZCA-SKB90BK Not used Not used
32 Screw Not used PMH40P080FTC Not used Not used Not used
DJM-750-K 85
5 6 7 8
1 2 3 4
9.4 CONTROL PANEL SECTION (1/2)
K a
W
L
D M
R
A
B W N
R
C
D
A B
C
D
1/2
a
2/2
F Nut:
Attached part of Rotary encoder
Refer to
"9.5 CONTROL PANEL SECTION (2/2)" .
86 DJM-750-K
1 2 3 4
5 6 7 8
(1) CONTROL PANEL SECTION (1/2) PARTS LIST

1 FAD1 Assy DWX3434 21 Slide SW Cap (W) DAC2401

2 FAD2 Assy DWX3435 22 Slider Knob 1 DAC2684 A
3 FAD3 Assy DWX3436 23 Slider Knob 2 DAC2685
4 FAD4 Assy DWX3437 24 Panel/FL DAH2936
5 FADC Assy DWX3438 25 Ring DEC3479
6 Connector Assy PF03PP-B05 26 Panel/FD See Contrast table (2)

7 Connector Assy PF03PP2B05 27 Control Panel See Contrast table (2)
8 Connector Assy PF03PP6B07 28 Lens DNK4532
9 CRF Stay DNF1870 29 Slider Knob Stopper DNK5888
10 Fader Packing DEC2903 30 Lens DNK6231
31 Reflector DNK6232 B
11 SW Packing (EF) DEC2929
12 Select Knob DAA1205 32 Button Assy/UTY DXB2138
13 Knob (MA) DAA1210 33 Binder ZCA-SKB90BK
14 Knob (Black) DAA1212 34 • • • • •
15 FX SEL Knob DAA1213 35 • • • • •
16 Knob (TIME) DAA1214 36 Flange Nut M9 DBN1008

17 Rotary Knob (BN) DAA1220 37 Screw (FE) See Contrast table (2)
18 Knob/MIC DAA1301 38 Screw BBZ30P060FTC
19 Knob/RSW DAA1306 39 Screw IMZ30P040FTC
20 Knob/FRE DAA1309 40 Screw PMA20P040FTC
C
(2) CONTRAST TABLE

26 Panel/FD DNB1216 DNB1216 DNB1216 DNB1216 DNB1216
27 Control Panel DNB1218 DNB1218 DNB1218 DNB1218 DNB1218 D

26 Panel/FD DNB1217 DNB1217 DNB1217 DNB1217 DNB1217
27 Control Panel DNB1219 DNB1219 DNB1219 DNB1219 DNB1219
DJM-750-K 87
5 6 7 8
1 2 3 4
9.5 CONTROL PANEL SECTION (2/2)
A • Bottom view
Note:
Refer to “7. DISASSEMBLY” for styling of flexible cables, barriers.
MAIN
MAIN CN1002
B CN1001
Note: Fix the packing/L to the lower right of Barrier FL.
H
I
1/2 2/2
E
NON-CONTACT
CONTACT SIDE
F
SIDE
88 DJM-750-K
1 2 3 4
5 6 7 8
CONTROL PANEL SECTION (2/2) PARTS LIST

Mark No. Description Part No.
1 PNLA Assy DWX3439
2 PNLB Assy DWX3440 A
3 SHADE1 Assy DWX3479
4 SHADE2 Assy DWX3483
5 FFC/27P DDD1601
6 FFC/24P DDD1628
7 FFC/17P DDD1629
8 Stay/PNL DND1275
9 Barrier FL DEC3351
10 Packing/L DEC3416
B
11 Barrier/CHF DMR1017
12 Barrier/PNL DMR1018
13 Barrier/A DMR1019
14 Effect Knob DAC2304
15 Button (FL) DAC2398
16 Slide SW Cap DAC2400

17 MIC Knob DAC2522
18 Button/CUE DAC2873
19 Button/BLK DAC2920
20 Button/TAP DAC2921 C
21 Button/CFX DAC2923
22 Button/CUE DAC2925
23 Lens Holder DNK4533
24 Holder/LED DNK6230
25 Lebel Meter Assy DXB1882
26 • • • • •
27 • • • • •
28 Screw BBZ30P060FTC
D
DJM-750-K 89
5 6 7 8
1 2 3 4
10. SCHEMATIC DIAGRAM

10.1 INPUT ASSY (1/5)
A (CL1) R4003 R4058 (CL1) CD1_L
100 1k
1000p/50
100p/50
RN RN
C4001
C4009
R4017
CH
CH
RN
47k
CH1 2-2 V+15A V+15A
V+15A
C4037
JA4001
1000p/50
R4018
DKB1083-A
100p/50
C4002
C4010
1 100u/25
R4025
R4029
CH
CH
RN
47k
RN
RN
1.5k
1.5k
L C4029 C4038 GND_PO
CD/LINE 2
R4004 R4059 0.1u/25 PHONO1_L
IC4002
NJM2121MD 0.1u/25
R
R4031
3 100 1k GND_P1 (P1) GND_CH1
47
RN RN V+ 2 8
330p/50
6
C4021
4 8 (P1) C4031 R4039
7
CH
3
0.022u/50
L GND_CH1 (C1)
C4019
100u/16 0 5
4 I C 4 0 0 1 (2/2) (CL1)
PHONO 5 5
V- NJM4580D
7
R Q4001
V-15A
6 6
2SK209(BL)-TLB Q4003 1
R4041
2SK209(BL)-TLB 4
100k
RN
(P1)
2-3 R4009 R4060 R4037
0 8.2k C4039
100
1000p/50
(P1) RN
100p/50
C4007
C4011
R4019
RN
CH
CH
RN
47k
C4026 0.1u/25
B C4017 0.01u/50 C4043 GND_CH1
C4022 R4033
CFTLA GND_CH1
150
D
470p/50 100u/25
R4026
CH
2.4k
RN
1000p/50
R4047 GND_PO
100p/50
C4008
C4012
R4020
V-15A
220u/10
CH
RN
47k
CH
1.2k
R4043
RN
RN
1.5k
R4010
V-15A
V+15A V+15A
100
R4034
RN
0
GND_P1 GND_CH1
C4033
R4027
R4030
RN
RN
IC4003
1.5k
1.5k
GND_P1 PHONO1_R NJM2121MD 0.1u/25
V+15A
2 8 GND_CH1
47
R4032
V+ I C 4 0 0 1 (1/2)
3
330p/50
2 NJM4580D
C4023
8 C4032 R4040
1 5
CH
0.022u/50
C4020
4C 4 0 3 0 100u/16 0 7
3
V- CD1_R 6 1
0.1u/25
4
GND_P1
R4042
Q4002 V-15A
100k
RN
2SK209(BL)-TLB Q4004
2SK209(BL)-TLB
C R4061 R4038 C4034
0 8.2k
RN 0.1u/25
C4028
V-15A GND_CH1
0.01u/50 R4048
GND_CH1
C4024 R4035
CFTLA
150
D
C4018 1.2k
R4045
RN
1.5k
470p/50 RN
220u/10
R4028
CH
2.4k
RN
R4055
V-15A 0
R4036
GND_CH1
(CL2) R4005 R4062

GND_P1 (CL2) CD2_L
100 1k
1000p/50
100p/50
RN RN
C4003
C4013
R4021
CH
CH
RN
47k
R4063
CH2 1k
RN V+15A
JA4002
1000p/50
R4022
DKB1083-A C4040
100p/50
C4004
C4014
D 1
CH
CH
RN
47k
L 100u/25
CD/LINE 2 R4006 LINE2_L IC4004

NJM2121MD
C4041 GND_PO
R 100 (L2) 0.1u/25
3
RN 2 8
4
3
GND_CH2
L GND_CH2 5
(C2)
(CL2)
LINE 5
7
R
6
6 1
(L2) 4
R4007 R4064
100 1k C4042
1000p/50
RN RN
C4005
C4015
R4023
100p/50
CH
CH
RN
47k
0.1u/25
C4044 GND_CH2
100u/25
1000p/50
GND_PO
100p/50
C4006
C4016
R4024
V-15A
CH
CH
RN
47k
R4049
R4008 R4065 1.2k

R4044
RN
RN
V+15A
1.5k
100 1k
E RN RN
GND_CH2
GND_CH2 C4035
LINE2_R IC4005
NJM2121MD 0.1u/25
2 8 GND_CH2
3
5
7
STBY Notes
R4001 CD2_R 6 1
NM is STBY 4
NM
SQ RS1/10SR***J
D RS1/10SR****D
R4002 C4036
SQ RS1/8SQ***J
NM 0.1u/25
SQ RN RN1/16SE****D
GND_CH1 GND_CH2 CH CCSRCH***J F

V-15A GND_CH2
R4050
SQ CKSQYB***K F
1.2k
R4046
CKSRYB***K F RN
RN
1.5k
CFTLA CFTLA F
F
NP CEANP F
CEAT F GND_CH2
A 1/5
90 DJM-750-K
1 2 3 4
5 6 7 8
CH1 CH2 INPUT A 1/5 INPUT ASSY (DWX3432)

4037
0u/25
4038 GND_PO
u/25
GND_CH1
5
(C1) C4048 (C1)
5:6C
CH1_L
NM
STBY
4039
u/25
4043 GND_CH1 B
0u/25
GND_PO
033
/25
GND_CH1
5 C4049 5:6D
CH1_R
NM
STBY
034 C
V+15A
/25
R4051
GND_CH1
47k
R4052
47k
2-1
A 5/5 A 5/5
Q4005 CH1_ASEL_OUT
LTC114EUB 5:6D To BOARD IF Block
C4045
0.1u/16
GND_CH1
4040
D
0u/25
4041 GND_PO
u/25
GND_CH2
(C2) C4047
(C2)
5 5:6D
CH2_L
NM
STBY
4042
u/25
4044 GND_CH2
0u/25
GND_PO
E
035
/25
GND_CH2
5 C4050
5:6D
CH2_R
NM
V+15A
STBY
R4053
47k
036
(P1)
R4054
: Voltage measuring point

47k
/25
: CH1 PHONO Signal (L CH)
(CL1)
GND_CH2
A 5/5 : CH1 CD/LINE Signal (L CH) : Waveform measuring point
(C1)
Q4006
LTC114EUB
CH2_ASEL_OUT
5:6D
: CH1 Audio Signal (L CH)
(L2)
F
0.1u/16
C4046
: CH2 LINE Signal (L CH)

(CL2)
(C2)
: CH2 CD/LINE Signal (L CH)
GND_CH2
A 1/5
DJM-750-K 91
5 6 7 8
1 2 3 4

(CL3) R4205 R4258 (CL3) CD3_L
100 1k
1000p/50
100p/50
RN RN
C4201
C4209
R4221
A
CH
CH
RN
47k
CH3 V+15A
C4237
JA4201
DKB1083-A
1000p/50
R4222
100u/25
100p/50
1
C4202
C4210
CH
CH
RN
47k
L C4238 GND_PO
CD/LINE 2
R4206 R4259
LINE3_L
IC4202
NJM2121MD 0.1u/25
R 100 1k GND_CH3
3 (L3)
RN RN 2 8
4 3
L GND_CH3 (C3
5
(CL3)
LINE 5 7
R
6 6 1
4
(L3) R4207 R4260 (L3)
1k C4239
1000p/50
100
C4203
C4211
R4223
100p/50
RN RN
CH
CH
RN
47k
0.1u/25
C4243 GND_CH3
B 100u/25
1000p/50
R4249 GND_PO
C4204
C4212
R4224
100p/50
V-15A
CH
CH
RN
47k
1.2k
R4245
RN
RN
1.5k
R4208 R4261
V+15A
100 1k
RN RN
GND_CH3 GND_CH3
C4233
LINE3_R IC4203
NJM2121MD 0.1u/25
2 8 GND_CH3
3
5
7
CD3_R 6 1
CH3 CH4 INPUT 4
C4234
C
0.1u/25
V-15A GND_CH3
R4250
1.2k
R4247
RN
1.5k
RN
GND_CH3
(CL4) R4209 R4262 (CL4) CD4_L
100 1k
1000p/50
100p/50
RN RN
C4205
C4213
R4225
CH
RN
47k
R4263
CH4 1k
RN
V+15A
V+15A
V+15A
JA4202
DKB1083-A C4240
1000p/50
R4226
100p/50
1
C4206
C4214
R4227
R4231
CH
RN
RN
RN
1.5k
1.5k
47k
L C4229 100u/25
CD/LINE 2 R4210 0.1u/25 PHONO4_L IC4204

NJM2121MD
C4241 GND_PO
R4233
R 100 GND_P4
47
(P4) 0.1u/25
D 3
RN V+ 2 8
6
330p/50
C4221
4 8 (P4) C4231 R4241 GND_CH4

7
CH
3
0.022u/50
L GND_CH4 (C
C4219
100u/16 0 5
4 I C 4 2 0 1 (2/2)
(CL4)
PHONO 5
5
V- NJM4580D
7
V-15A
R
R4243
6 Q4201
100k
RN
2SK209(BL)-TLB 6 1
Q4203
(P4) 2SK209(BL)-TLB 4
R4211 R4264 R4239
100 0 8.2k C4242

1000p/50
RN RN
100p/50
C4207
C4215
R4219
CH
RN
47k
C4226
CH
0.1u/25
C4217 0.01u/50 GND_CH4 C4244 GND_CH4
C4222 R4235
150
CFTLA
D
470p/50
R4228
100u/25
CH
2.4k
RN
1000p/50
GND_PO
100p/50
C4208
C4216
R4220
220u/10
V-15A
CH
CH
RN
47k
R4251
R4212 1.2k
V-15A
R4246
RN
RN
V+15A
1.5k
100 V+15A
R4236
RN
0
GND_P4
STBY GND_CH4 C4235
R4229
R4232
E
RN
RN
1.5k
1.5k
R4201 R4203 IC4205

GND_P4 PHONO4_R NJM2121MD 0.1u/25
NM NM
SQ SQ V+15A
2 8 GND_CH4
R4234
47
V+ I C 4 2 0 1 (1/2) 3
R4202 R4204
2 NJM4580D
330p/50
C4223
8 C4232 R4242
1 5
CH
0.022u/50
NM NM
C4220
SQ SQ 4C 4 2 3 0 100u/16 0 7
3
GND_CH2 GND_CH3 GND_CH4 V- CD4_R 6 1
0.1u/25
R4244
4
100k
RN
Q4202 GND_P4
Notes Q4204
V-15A
2SK209(BL)-TLB
2SK209(BL)-TLB
NM is STBY R4265 R4240 C4236
RS1/10SR***J 8.2k
0 0.1u/25
RN
D RS1/10SR****D
C4228
SQ RS1/8SQ***J 0.01u/50 R4252
V-15A GND_CH4
C4218 GND_CH4
C4224 R4237
CFTLA
150
D
RN RN1/16SE****D
470p/50 1.2k
R4230
R4248
CH RN
2.4k
RN
RN
1.5k
CH CCSRCH***J F
220u/10
SQ CKSQYB***K F
F CKSRYB***K F R4257
V-15A
CFTLA CFTLA F
R4238
0
0
NP CEANP F
GND_CH4
A 2/5
CEAT F
GND_P4
92 DJM-750-K
1 2 3 4
5 6 7 8
V+15A
A 2/5 INPUT ASSY (DWX3432) A
C4237
100u/25
C4238 GND_PO
MD 0.1u/25
GND_CH3
8
5
(C3) C4247 (C3)
5:8C
CH3_L
NM
STBY
1
4
C4239
0.1u/25
C4243 GND_CH3
100u/25 B
V-15A GND_PO
V+15A
C4233
D 0.1u/25
8 GND_CH3
5 C4249
5:8C
CH3_R
NM
STBY
1 V+15A
4
R4253
47k
C4234
C
0.1u/25
R4254
47k
V-15A GND_CH3
A 5/5
Q4205 CH3_ASEL_OUT
LTC114EUB 5:8C
C4245
0.1u/16
A 5/5
To BOARD IF Block
GND_CH3
V+15A
C4240
100u/25
C4241 GND_PO
D
0.1u/25
8 D
GND_CH4
(C4) C4248 (C4)
5 5:8C
CH4_L
NM
STBY
1
4
C4242
0.1u/25
C4244 GND_CH4
100u/25
GND_PO
V-15A
V+15A
C4235
E
D 0.1u/25
8 GND_CH4
5 C4250 5:8D
CH4_R
NM
V+15A
STBY
1
4
R4255
47k
C4236
R4256
47k
0.1u/25
(L3)
V-15A GND_CH4 : CH3 LINE Signal (L CH)
A 5/5 (CL3)
Q4206 CH4_ASEL_OUT (C3)
LTC114EUB 5:8C
(P4)
C4246
0.1u/16
: CH4 PHONO Signal (L CH) F

(CL4)
(C4)
GND_CH4 A 2/5
DJM-750-K 93
5 6 7 8
1 2 3 4
A
RETURN
V+15A
C4405
100u/25
B C4406 GND_PO
0.01u/50
GND_RET
V+
2 (RET A) (RET A)
JA4401 8
5 (RET A) (RET A) 1
R4403 R4405 R4407
4
2 I C 4 4 0 1 (1/2)
4
100 33k 0 3 NJM4565MD
L(MONO) 3
7 D
V-
1000p/50
C4407
R4409
100p/50
8
C4401
C4403
16k
CH
CH
1
D
DKN1654-A 0.01u/50
C4408 GND_RET
RETURN
100u/25
V-15A GND_PO
GND_RET
1000p/50
R4410
100p/50
C4402
C4404
V+15A
16k
CH
CH
D
V+
6
8
JA4402 7
R4404 R4406 R4408
C 2
I C 4 4 0 1 (2/2)
R 3
1 100 33k
D
0 5
V-
4
NJM4565MD
DKN1652-A V-15A
Pull up Main side

VA4401
NM
STBY
GND_RET
D
C4409
0.01u/50
CFTLA
R4401
NM
SQ
R4402
NM
SQ
STBY GND_RET
GND_CH4
A 3/5
94 DJM-750-K
1 2 3 4
5 6 7 8
RETURN_L
T A) (RET A) (RET A)
5:8D
RETURN_L
A 5/5
RETURN_R To BOARD IF Block
5:8D
RETURN_R C
5:8D
RETURN_IN
D
Notes
(RET A)
NM is STBY : RETURN Audio Signal (L CH)
RS1/10SR***J
D RS1/10SR****D
SQ RS1/8SQ***J
RN RN1/16SE****D
CH CCSRCH***J F
SQ CKSQYB***K F
CKSRYB***K F
CFTLA CFTLA F
NP CEANP F
CEAT F
A 3/5
DJM-750-K 95
5 6 7 8
1 2 3 4
A MIC
B V+15A
C4614
0.1u/25
0.01u/50
330p/50
R4619
R4621
RN 1 5 0
R4623
C4611
C4612
RN
RN
1.5k
1.5k
MIC1_TRIM_IN
VCC
IC4601 GND_MIC1
6
8 (1/2) C4617 (MIC1 A)
7
MIC1 (MIC1 A) (MIC1 A)
4
NJM4580MD 100u/16
5
GND C4615
R4627
100k
MIC_COLD_1
1 1 0.1u/25
CKS3561-A (MIC1 A) Q4602 Q4603
CN4601 R4638 R4609
2 3 2SK209(BL) 2SK209(BL) 3 2
V-15A
CN9001
220 220
(MIC1 A) RN RN GND_MIC1
MIC1_COLD 6
R4612
100p/50
C4607 GND_MIC1
C4625
RN
10k
CH
C4613
MIC1_COLD 5 470p/50
GNDA CH 470p/50
4 CH
GNDA 3 R4615 R4620 R4625
MIC1_HOT 2
12k 820 12k
B
C MIC1_HOT 1 GND_MIC1 RN RN RN
470p/50
C4605
R4618
R4622
RN
RN
4.7k
4.7k
100p/50
C4626
R4613
CH
RN
10k
2-3
(MIC1 A) (MIC1 A) (MIC1 A)
R4639 R4610
220 220
RN RN
MIC_HOT_1
V-15A
KN4601
VNE1948-A
STBY 1 3
C4627
2 4
NM STBY
SQ
C4629
NM NM (MIC1 A
VA4601 SQ
D C4630
GND_CH1 GND_MIC1
1u/25
SQ
GNDD GND_MIC1
A 4/5
96 DJM-750-K
1 2 3 4
5 6 7 8
V+15A
STBY
C4620
NM
GND_PO
B
R4632
390
RN
MIC1_TRIM_IN
VCC
I C 4 6 0 1 (2/2)
NJM4580MD
MIC1 ADC IN
A 5/5
2
8
1 R4633 (MIC1 A) (MIC1 A) 5:6C
(MIC1 A) C4618 (MIC1 A) MIC1_ADC_IN
4 220
100u/16 3 RN
R4630
GND
RN
390
R4627
100k
R4628
100k
STBY
GND_MIC1 GND_MIC1 GND_MIC1
C4621
NM
GND_PO
V-15A
C
CN4602
CKS3561-A
CN8801
(MIC1 A) (MIC1 A)
6 MIC1_TRIM_IN
5 MIC1_TRIM_IN
(MIC1 A) (MIC1 A) D
4 GND_MIC1
3 GND_MIC1
2 MIC1_TRIM_OUT
1 MIC1_TRIM_OUT
C
GND_MIC1
Notes
NM is STBY (MIC1 A)
RS1/10SR***J
: MIC1 Audio Signal
D RS1/10SR****D E
SQ RS1/8SQ***J
RN RN1/16SE****D
CH CCSRCH***J F : Waveform measuring point

SQ CKSQYB***K F
CKSRYB***K F
CFTLA CFTLA F
NP CEANP F
CEAT F
A 4/5
DJM-750-K 97
5 6 7 8
1 2 3 4
BOARD I/F
CN4802
STBY VKN1868-A
P4801
V+15A
GNDIN_MIC 1
NM
GNDIN_MIC 2
CN4801
B
0.01u/50
100u/25 GNDIN_MIC
C4801
C4803
C4805
KM200NA4L 3
15
1u/25
SQ
GNDIN_MIC 4
V+15A 1
GNDIN_MIC 5
2
E 1/2 GND_PO
GNDIN_MIC 6
100u/25
0.01u/50
GND_PO
C4802
C4804
C4806
CN2
1u/25
SQ
GNDIN_MIC 7
V-15A 4
16 GNDIN_MIC 8
MIC
CN1003
9
P4802 GNDIN_CH1 10
V-15A
GNDIN_CH1 11
NM
STBY CH1_L 12
STBY
GNDIN_CH1 13
D 1/19
R4801
CH1_SEL 14
C
NM GNDIN_CH1 15
CH1_R 16
GND_PO GND_PO GND_CH1 GNDIN_CH1 17
GNDIN_CH2 18
GNDIN_CH2 19
STBY
CH2_L 20
GNDIN_CH2 21
R4804 R4825 R4826
CH2_SEL 22
NM NM NM GNDIN_CH2 23
GND_PO GND_MIC1 GND_CH1 GND_CH1 GND_CH3 GND_CH3
R4806 R4805 R4807 CH2_R 24
GNDIN_CH2 25
NM NM NM
D GND_PO GND_CH2 GND_CH1 GND_CH1 GND_CH3 GND_CH3
R4808 R4810 R4814
NM NM NM
GND_PO GND_CH4 GND_CH1 GND_CH1 GND_CH3 GND_CH3
R4809 R4811 R4815
NM NM NM
GND_PO GND_RET GND_CH1 GND_CH1 GND_CH3 GND_CH3
R4812 R4816
GND
NM NM
GND_CH2 R4813
GND_CH2 GND_CH4 R4817
GND_CH4
NM NM
GND_CH2 R4823
GND_CH4
E
NM NM
GND_CH2 R4824
GND_CH4
NM NM
GND_CH2 R4819
GND_CH4
NM NM
GND_RET R4820
GND_RET GND_CH4 GND_CH4
NM
GND_RET R4821
GND_RET
NM
GND_RET GND_RET
F
A 5/5
98 DJM-750-K
1 2 3 4
5 6 7 8
CN4802
VKN1868-A CN4803
VKN1865-A
GNDIN_MIC 1 R4828 GNDIN_CH3

0 1
(C3) 2:11B
GNDIN_MIC R4829 CH3_L
2 0 GND_STBY 2 CH3_L
R4832
GNDIN_MIC R4830 0 GNDIN_CH3 B
3 0 3
STBY 2:7E
GNDIN_MIC 4 CH3_SEL 4 CH3_ASEL_OUT
R4837 R4833
0 NM
GNDIN_MIC 5 R4838 R4834 GNDIN_CH3 5
0 NM 2:11C
GNDIN_MIC R4831 R4839 R4835 CH3_R
6 0 0 6 CH3_R
NM
GNDIN_MIC 7
R4840
0
R4836
NM GNDIN_CH3 7 A 2/5
GNDIN_MIC 8 GNDIN_CH4 8
(MIC1 A) 4:11B GNDD
MIC 9 MIC1_ADC_IN GNDIN_CH4 9
(C4)
2:11F
GNDIN_CH1 10 A 4/5 CH4_L 1 0 CH4_L
CN1004
GNDIN_CH1 11 GNDIN_CH4 1 1
(C1) 1:11B 2:7H
CH1_L 12 CH1_L CH4_SEL 1 2 CH4_ASEL_OUT
1:7E 2:11G
CH1_SEL 14 CH1_ASEL_OUT D 1/19 CH4_R 1 4 CH4_R
C
1:11C
CH1_R 16 CH1_R GNDIN_RET 1 6
GNDIN_CH1 17 GNDIN_RET 1 7
(RET A) 3:10D
GNDIN_CH2 18 A 1/5 RET_L 1 8 RETURN_L
GNDIN_CH2 19 GNDIN_RET 1 9 2-4

CH2_L 20
(C2)
1:11F
CH2_L RET_IN 2 0
3:10E
RETURN_IN
A 3/5
R4803
GNDIN_CH2 21 GNDIN_RET 2 1 100
1:7H 3:10E
CH2_SEL 22 CH2_ASEL_OUT RET_R 2 2 RETURN_R
GNDIN_CH2 23
1:11G
CH2_R 24 CH2_R
GND_CH3
GNDIN_CH2 25
D
GND_CH4
GND_RET
GND_MIC1
GND_CH1
GND_CH2
(C1)
(C2)
: CH2 Audio Signal (L CH) E
(C3)
(C4)
(RET A)
: RETURN Audio Signal (L CH)
(MIC1 A)
: MIC1 Audio Signal

: Waveform measuring point
A 5/5
DJM-750-K 99
5 6 7 8
1 2 3 4
10.6 MIC1 and MTRM ASSYS
B MIC1 ASSY (DWX3441) C
MIC JACK M
B
MIC SHIELD:DNF1849
MIC1
JA9001
M
CKS3533-A
CN9001
1
(MIC1 A) R9001 R9003 (MIC1 A)
2
CN4601
1 MIC1_HOT
3 0 0
2 MIC1_HOT
C 4
3 GNDA CH
5
4 GNDA
(MIC1 A) R9002 R9004 (MIC1 A)
A 4/5
6
5 MIC1_COLD
D9002 D9001
D9004 D9003
7 0 0
6 MIC1_COLD
0.01u/50
0.01u/50
C9007
LA C 9 0 0 1
LA C 9 0 0 2
C9003
C9004
C9005
C9006
C9008
NM
NM
NM
NM
NM
NM
DKB1108-A
DZ2J150M0
C9009
DZ2J150M0
1u/25
SQ DZ2J150M0
DZ2J150M0
D VA9001 NOTES NM is STBY
EZJZ1V270RM
SQ CKSQYB
VA9002
EZJZ1V270RM LA CFTLA
RS1/10SR****J
GNDF GNDA
(MIC1 A)
: MIC1 Audio Signal
B
100 DJM-750-K
1 2 3 4
5 6 7 8
C MTRM ASSY (DWX3442)
MIC TRIM
B
(MIC1 A) (MIC1)
CN4602
6 MIC1_TRIM_IN
(MIC1 A)
5 MIC1_TRIM_IN
(MIC1)
4 GND_MIC1
MIC1 TRIM
DCS1123-A
2
3
5
6
3 GND_MIC1
VR8801
A 4/5
2 MIC1_TRIM_OUT
1 MIC1_TRIM_OUT
1
4
CN4601
R8801
CN8801
CKS3533-A C
NM
CHASSIS GND
GND_MIC1
GND_MIC1
A 4/5
(MIC1 A)
: MIC1 Audio Signal
NOTES
NM is STBY
RS1/10SR***J
C
DJM-750-K 101
5 6 7 8
1 2 3 4
10.7 MAIN ASSY (1/19)

V+5D_LED
A
BOARD IF CN1002
V+5D_LED
CANON SHIELD: DNF1789-
VKN1421-A V+34D V+3R3E PHONE SHIELD: DNF1875-
C1001
0.1u/10
V+5D_LED 1 7
GNDD_LED 1 6
V+5D_LED 1 5
GNDD_LED 1 4
CN6602
V+5D_LED 1 3
GNDD_LED 1 2
V+5D_LED 1 1
GNDD_LED 1 0
GNDD 9
V+34D 8
H 1/2
1-69
C1012
0.1u/50
SR
GNDD 7
GNDD_34D
EFX_ON/OFF
6
5
R1011 EFX_ON/OFF
10:2C To MAIN_UCOM D 10/19
R1012 0
MVR_MUTE
V+3R3E
4
3
0
MVR_MUTE
15:2H To OUTPUT IF D 15/19
R1013 STBY_KEY
B STBY_KEY 2
R1014 0 10:11A
From To MAIN_UCOM
STBY_LED 1
0
STBY_LED
10:12B D 8/19,11/19 24M_CLK_HP-MIC-
8:11C;8:5C;11:
C1009 D 10/19
0.1u/10
GNDD_34D From FPGA 6M_CLK_HP-MIC-
8:11C;8:5C;11:
GNDD_LED
D 13/19 From DSP ADAT_

13:13
V+3R3D_REFA
GNDD V+3R3D
CN1001
D 11/19 D 8/19,11/19 From FPGA 96k_CLK_HP-MIC-R
8:11C;8:5C;11:2
VKN1428-A HP-MIC-RE_RESE
From MAIN_UCOM
0.01u/16
8:11C;8:5C;10:15
C1020
C1011
C1019
0.1u/10
1u/10
SUB_UCOM
From To FPGA
SR
V+3R3D
GNDD
24
23
11:14H
D 8/19,10/19
GNDD 22
R1007 FPGA_CLK
FPGA_CLK 21
0
GNDD 20
R1008 FPGA_RXD_DAT
FPGA_RX_DAT 19
0
GNDD 18
R1041 FPGA_TXD_DAT
CN6601
FPGA_TX_DAT 17
C GNDD 16
0
R1042 SUB_INT
SUB_INT 15 10:12A
R1009 0
SUB_CTRL
SUB_CTRL 14
R1040 0 10:12K
FPGA_SIGNAL
FPGA_SIGNAL 13
0 R1010 SUB_CPU_RESET
0
SUB_CPU_RESET 12 10:12J
H 1/2
GNDD 11
SUB CPU RST
GNDD
GNDD
10
9
D 10/19
V+3R3D_REFA 8
V+3R3D_REFA From To MAIN_UCOM ST
GND_REFA 7
R1034 VR_FADER4
VR_FADER4 6 10:12C
R1033 0 VR_FADER3
VR_FADER3 5 10:12C
R1032 0
VR_FADER_CRS
CROSS_FADER 4
R1031 0 10:12C
VR_FADER2
VR_FADER2 3
R1030 0 10:12C
VR_FADER1 2 VR_FADER1
0 10:12C
100k
100k
100k
100k
100k
GND_REFA 1
C1010
0.1u/10
D
R1005
R1004
R1006
R1029
R1003
GNDD
GNDREF_A
A 5/5 CN4802 A 5/5 CN4803

GNDIN_CH3
GNDIN_CH3
GNDIN_CH3
GNDIN_CH3
GNDIN_CH4
GNDIN_CH4
GNDIN_CH4
GNDIN_CH4
GNDIN_CH4
GNDIN_RET
GNDIN_RET
GNDIN_RET
GNDIN_RET
1 0 GNDIN_CH1
1 1 GNDIN_CH1
1 3 GNDIN_CH1
1 5 GNDIN_CH1
1 7 GNDIN_CH1
1 8 GNDIN_CH2
1 9 GNDIN_CH2
2 1 GNDIN_CH2
2 3 GNDIN_CH2
2 5 GNDIN_CH2
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
GNDIN_MIC
CN1003
VKN1429-A
CH3_SEL
CH4_SEL
1 4 CH1_SEL
2 2 CH2_SEL
VKN1426-A
RET_IN
CH3_R
CH4_R
RET_R
1 6 CH1_R
2 4 CH2_R
CH3_L
CH4_L
RET_L
1 2 CH1_L
2 0 CH2_L
CN1004
MIC
V+5D
10
11
12
13
14
15
16
17
18
19
20
21
22
1
9
STBY
R1080
STBY
NM R1046
(RET A)
R1083 NM RETR
STBY
STBY
STBY
STBY
R1048
R1015
R1017
R1047
R1016
R1045
R1018
R1044
R1043
NM
NM
NM
NM
100
0
0
GNDIN_CH3
E R1084
(C4)
LINE_SEL1
LINE_SEL2
LINE_SEL3
LINE_SEL4
0
R1085 RETL (RET A) (RET A
0
R1086 GNDIN_MIC GNDIN_CH1 GNDIN_CH2 GNDIN_CH4 GNDIN_RET
CH4L CH4R
(C3)
(C2)
(C4)
GNDIN_MIC MIC (C4
CH3L CH3R
STBY
R1001
R1082
NM
NM
CH1L CH2L (C3) (C3

(MIC1 A)
R1081
GNDD CH1R CH2R
(C1)
0
GNDD
(C2) (C2
(C1) (C1
F
(MIC1 A) (MIC1 A
D 1/19
102 DJM-750-K
1 2 3 4
5 6 7 8
D 1/19 MAIN ASSY (DWX3430) A
V+13D_UNREG 2
D 10/19 5
V+15A
To MAIN_UCOM POWER_RESET_A
V+5A V+13D_UN
220u/25
10:2H
0.1u/25
C1007
C1008
SR
MUTE V+5A CN1005
AKP7199-A
From MUTE 15:4F;16:11E;17:3G;1 8:3D;19:4E 3
D 15/19-19/19 V+5A_HP 19
18
GNDD
GNDD
DCH1201-A
17 POWER_RESET_A
10u 10V
0.1u/10
C1003
C1004
16 MUTE
15 GNDD
C1005
14 V+13D_UNREG
B
CN3
1000p/50
/19 24M_CLK_HP-MIC-RE
8:11C;8:5C;11:2L ADAT_HP 1-83 HP DAC C1006
13
12
GND_PO
V-15A
GA 6M_CLK_HP-MIC-RE 1-79 1-82 0.01u/16
11 GND_PO
IC1001
STBY
C1013
8:11C;8:5C;11:2L
E 1/2
10 V+15A
R1039 R1021 1 16 NM
9 From DSP ADAT_HP

13:13G 22 R1022 22 2
MCLK DZFL
BICK DZFR
15 C1014
9
8
GNDA
V+5A
(HP D) R1023 0 3 14 NM
SDTI VDD 7 GNDA
96k_CLK_HP-MIC-RE R1024 0 4 13
PGA 8:11C;8:5C;11:2L
R1020 0
(HP D)
5
LRCK VSS
12
GNDA_HP
(HP O)
GNDD (HP O)
6 HP_L+
HP-MIC-RE_RESET PDN
COM 8:11C;8:5C;10:15D
1
100
8 6
CSN
AOUTL+
11 (HP O) (HP O)
5 GNDA_HP
4 HP_L-
/19 1-81 2 7 7
AOUTL-
CCLK
10
GNDA_HP
3
AOUTR+
3 6 8 9
CDTI HP_R-
1-80 4 5
AOUTR-
2
1 HP_R+
0.01u/16
C1002
R1019 AK4382AVT 1-78 L+

10k
L- 4 R1075
R+ 0
SR
R-
GNDA GNDA_OUT GNDA_HP
STBY
GNDD V-15A STBY C
R1049
C1018
C1017
C1016
C1015
NM
NM
NM
NM
NM
R1050
NM
GNDA_OUT GNDA_OUT GNDD GND_PO GNDA_OUT
STBY NOTES
R1051 R1054 R1057 R1059 R1062 R1074 R1076
NM is STBY
NM NM NM NM NM NM NM
RS1/16SS***J
R1052 R1055 R1058 R1060 R1063 R1077
(D) RS1/16SS****D
NM NM NM NM NM NM
GNDA_OUT GNDIN_RET SR RS1/10SR***J
R1053 R1056 R1064 R1061 R1066 R1078
SR (D) RS1/10SR****D
NM NM NM NM NM NM
1/8W RS1/8SQ***J
R1072 R1070 R1065 R1067 R1079
1/8W (F) RS1/8SQ****F
NM NM NM NM NM
GNDA_OUT GN DIN_CH1
R1073 R1071 R1068
1/4W RS1/4SA***J D
GNDA_OUTGND_PO GNDD GNDD RN RN1/16SE****D
NM NM NM
R1069
GNDA_OUT GNDIN_CH4 GNDA_OUT GN DIN_CH2
NM RAB4CQ***J
GNDA_OUT GNDIN_CH3
CKSSYB***K F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
(C1)
CCSSCH***D
: CH1 Audio Signal (L CH) CH (D) F
SRCH CCSRCH***J F
(C2)
: CH2 Audio Signal (L CH) SQCH CCSQCH***J F
(C3) CFHXSQ CFHXSQ***J F
: CH3 Audio Signal (L CH) +
CEVW***M F
(C4)
: CH4 Audio Signal (L CH) NP
+
CEVWNP***M F
HVW CEHVW***M F
(RET A) +
RET_R
8:2B : RETURN Audio Signal (L CH) HVAW CEHVAW***M F
E
RET_L
8:2B
To MIC/RET ADC D 8/19 (MIC1 A)
: MIC1 Audio Signal
CEANP CEANP***M F
(RET A)
RETURN_IN (HP D)
10:2F
: HP OUT Digital Signal
CH_SELECT
To MAIN_UCOM D 10/19 (HP O)
: HP OUT Signal (L ch)
10:14I
CH4_R
(C4) 7:2B
CH4_L To CH4 ADC D 7/19
7:2E : Voltage measuring point
CH3_R
6:2B
D 6/19 : Waveform measuring point
(C3)
CH3_L
6:2E
To CH3 ADC
CH2_R
5:2B The check point for service.
(C2) CH2_L
5:2E
To CH2 ADC D 5/19 ***** (Legend silk indication on the PCB.)
CH1_R
(C1)
4:2B
CH1_L
4:2E
To CH1 ADC D 4/19 F
(MIC1 A) MIC1
8:8B
MIC2
8:8B
To MIC/RET ADC D 8/19
MIDI_TXD
10:11A To MAIN_UCOM D 10/19 D 1/19
DJM-750-K 103
5 6 7 8
1 2 3 4
10.8 MAIN ASSY (2/19)
A POWER IF
V+13D_UNREG
!
D1203
1SR154-400 V+11E_UN UNREG Voltage 7.2 18V

V+11E_UNREG
Voltage abnormality
CN1201 1-1 1
AKM1274-A V+34D
STBY
P1204
V+11E_UNREG 3
1 NM 2
D 10/19
Q JP3001 RELAY_CONT 1
GNDD 2
R1232 RELAY_CONT
10:2K From Main Ucom
CCG1236-A
220 STBY
0.01u/25
C1209
C1212
C1211
C1213
0.1u/25
10u/35
NM
SR
1000p/50
C1201
R1201
160k
STBY
B GNDD R1203
NM
GNDD GNDD
R1202
39k
V+15A V+15A_O V+15A_IN
GNDD
V+15A
R1255
2
1/4W V+5D
1000p/50
1000p/50
C1208
0.01u/25
0.01u/25
C1205
C1203
C1207
R1254
CH
CH
2
1/4W
C1202
R1205
0.1u/10
16k
(D)
V-15A R1207
STBY
GND_PO
NM
C V-15A V-15A_O V-15A_IN
GNDD
R1206
43k
(D)
V+5A GNDD
V+5A V+5A_IN V+5A_O V+5A_HP
V+15A
R1210
R1228
C1206
C1204
R1226
47k
(D)
NM
NM
NM
NM
STBY
R1212
R1229
R1227
NM
NM
NM
STBY
R1211
62k
(D)
R1230
GNDA
NM
GNDD
D Q1205
D 5/19,7/19,10/19 NM V+3R3A
24AD_RESET R1225
From MAIN_UCOM 5:10F;7:10F;10:15C NM

Q1204
C1214
R1235
0.1u/10
NM
24k
(D)
S
R12
GNDD
NM
GNDD
R1236
22k
(D)
V+3R3D_REFA V+3R3E V+5D V+5A_O V+34D
GNDD
C1217
C1218
C1219
C1220
C1221
C1222
C1223
C1224
C1225
C1226
C1227
C1216
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/50
SR
V+34D
E
R1239
47k
(D)
S
GNDREF_A GNDD GNDD GNDA_OUT GNDD_34D R12
NM
V+3R3D V+1R2D
R1240
33k
(D)
1000p/50
1000p/50
1000p/50
1000p/50
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
C1233
C1234
C1235
C1236
C1237
C1238
C1239
C1240
C1241
C1228
C1229
C1230
C1231
C1232
C1242
0.1u/10
STBY
R1251
NM
V-15A
GNDD GNDD
KN1202 KN1204 KN1206

CKF1089-A CKF1089-A CKF1089-A
KN1201 KN1203 KN1205
CKF1089-A CKF1089-A CKF1089-A
1 1 1
F 1 1 1
D 2/19 GNDD
104 DJM-750-K
1 2 3 4
5 6 7 8
Voltage abnormality detect circuit

V+34D V+5D V+5A V+15A V+34D Low value Hi value
V+34D 27.63V 44.59V
R1247
DAN202UM
6.2k
(D)
V+5D 3.70V 7.21V
D1205
V+3R3D 2.37V 4.31V

V+5A
V+1R2D 2.18V
R1215
R1233
V+3R3D
200
33k
(D)
(D)
STBY V+15A 4.92V 19.73V
1000p/50
C1201
R1201
R1204 R1252 -19.30V

160k
V-15A -6.97V
STBY NM 82k V+5A 3.65V 7.21V
R1248
R1234
(D)
750
4.7k
(D)
(D)
R1203 Q1201 R1214 R1231 V+3R3A 1.29V 6.22V B
HN1A01FU(YGR) V+3R3E
NM (1/2) 1k 2.7k
GNDD
1000p/50
(D) (D)
VDET
C1210
Q1202 Q1206
STBY
R1249
R1202
R1216
R1243
HN1A01FU(YGR)
D 10/19
NM
HN1A01FU(YGR)
820
39k
10k
(1/2)
(D)
(2/2)
R1246
GNDD D1201 GNDD GNDD

100
VDET
10:14F To MAIN_UCOM
GNDD
0.01u/16
C1215
Q1208 NORMAL
LTC114YUB High
DAN202UM ABNORMAL
Low
GNDD GNDD
V+5D V+3R3D
DA2J101
D1202
V+3R3A
STBY
C1202
R1205
0.1u/10
R1208
16k
(D)
R1244
STBY NM
12k
(D)
R1207 Q1201
HN1A01FU(YGR)
NM Q1207
GNDD (2/2)
HN1B04FU(YGR) C
(2/2)
R1206
43k
R1245
(D)
R1253
33k
(D)
100k
(D)
GNDD
V-15A GNDD
V+15A V+5A
R1210
R1213
47k
(D)
10k NOTES
STBY (D)
R1212 Q1202
HN1A01FU(YGR) NM is STBY
NM
(1/2)
RS1/16SS***J
R1211
(D) RS1/16SS****D
62k
(D)
SR RS1/10SR***J
GNDD
1/8W RS1/8SQ***J D
V+3R3A V+1R2D 1/8W (F) RS1/8SQ****F
1/4W RS1/4SA***J
RN RN1/16SE****D
STBY
C1214
R1235
0.1u/10
R1238
24k
(D)
STBY NM RAB4CQ***J
R1237 Q1206
HN1A01FU(YGR)
NM D1204
(2/2)
GNDD CKSSYB***K F
R1236
SR CKSRYB***K F
22k
(D)
DAN202UM CKSQYB***K
SQ F
CH CCSSCH***J F
GNDD CCSSCH***D
CH (D) F
SRCH CCSRCH***J F
V+34D V+3R3A SQCH CCSQCH***J F

CFHXSQ CFHXSQ***J F
+
CEVW***M F
E
R1239
R1242
47k
(D)
NP CEVWNP***M F
STBY 100k +
(D) HVW CEHVW***M F
R1241 Q1207 +
HN1B04FU(YGR) HVAW CEHVAW***M F
NM
(1/2)
CEANP CEANP***M F
R1240
33k
(D)
STBY
R1251
NM
V-15A
The > mark found on some component parts
: Voltage measuring point indicates the importance of the safety factor of the part.
Therefore, when replacing, be sure to use parts
: Waveform measuring point of identical designation.
F
The check point for service.
***** (Legend silk indication on the PCB.)
D 2/19
DJM-750-K 105
5 6 7 8
1 2 3 4
10.9 MAIN ASSY (3/19)
A POWER ONLY USB_UCOM(Blackfin) PLL
11V 3.3V(EuP) 3.3V(D) 2.5V(D)

V+11E_UNREG V+3R3E V+3R3D V+2R5D
STBY STBY
D1401
V+3R3E D1404
NM NM 11
7
DCH1201-A
IC1401 IC1407
1 0 u 10V
C1435
1 5 5 1
CONTROL
2
GND
VIN
A side
VIN VOUT
VSS
2 V+2R5D
DCH1201-A
3 4 4 3
1 0 u 10V
NC VOUT ON/OFF NC
1-2
C1443
C1441
0.1u/10
1000p/50
C1406
C1410
C1408
S-1132B25-U5
0.1u/25
NJM2831F33
1u/10
CH
SR
SR
! !
V+11E_UNREG
B GNDD
GNDD
R1445
STBY
10k
R1443
IC1409
11k
1 5
OUT CD
2
VDD
C1464
3 4
NM
R1444
C1465
VSS NC
12k
NM
NM
GNDD
C 5V(A) 3.3V(A) 5V(D) 3.3V(REFA)

V+5A_IN V+3R3A V+3R3D V+5D V+3R3D_REFA_0
STBY STBY STBY

D1402 R1402 D1405 V+3R3D_REFA
NM NM NM
! IC1402 ! IC1406 10
STBY
5
VIN VOUT
1 V+3R3A 1
CONT VIN
5
2 2
1000p/50
VSS
8 GND
C1411
C1401
C1402
C1407
C1409
0.1u/10
0.1u/10
1u/10
4 3 3 4
NM
CH
SR
SW NC NC VOUT
1000p/50
C1437
C1439
C1438
0.1u/10
S-1132B33
1u/10
NJM2878F3-33
CH
SR
GNDA_OUT
GNDD
D
13V 34V (FL)

STBY
V+34D_1 V+34D
R1404
R1405
1/8W
1/8W
R1406 C1412 V+13D_U

1.5
1.5
NM NM
A side Q1402 A side 1-96
L1401 D1403 LSAR523UB
470uH RB160L-40
DTL1123-A
IC1403
13
!
R1414
R1417
100k
V+13D_UNREG
47k
R1403 8 1
C1413
15k
15k
15k
15k
15k
10u/35
1.5k 7
CD CS
2
V+34D
SI ES
SR C1405
R1421
R1422
R1423
R1424
R1425
6 3 STBY
R1415
R1418
1000p/50
V+ CT
100u/50
SR
18k
47k
C1414
R1407
C1417
C1461
C1416
SR (D)
0.1u/50
5 4 100p/50
NM
CH
SR
39k
IN- GND
CCG1236-A
CH
1000p/50
100u/25
C1403
C1404
C1454
C1455
NJM2392M
0.1u/25
10u/35
E
CH
SR
R1408
!
SR (D)
1.5k
V+5A
GNDD
GNDD_34D
Q1406
LTA024EEB
34D_CON
D 10/19 Q1401
LTC024EEB
V+34D_CONT Q1405
From MAIN_UCOM 10:12K LTC024EEB
Q1404
LSCR523UB
V+34C_CONT V+34D Discharge circuit GNDD
High GNDD
R1416
Q1403
LSCR523UB
2.2k
F Low
D 3/19
GNDD
106 DJM-750-K
1 2 3 4
5 6 7 8
D 10/19 1R2D_CON
V+1R2D_CONT
From MAIN_UCOM 10:12K
V+1R2D
13V 1.2V(D)
L1404 1-95
33u
CTH1527-A-TLB
12
R1438
220
STBY
(D)
V+13D_UNREG IC1408
BD9328EFJ
V+1R2D
C1460
NM
R1435 C1436 1 8
R1439
22 0.1u/10 BST SS
2 7
3.3k
9
(D)
DCH1201-A
DCH1201-A
CCH1565-A
EN
1 0 0 u 16V
VIN 3
1 0 u 10V
1 0 u 10V
1000p/50
6
C1448
C1447
C1445
C1446
C1449
0.1u/10
FIN
CH
COMP
CCG1236-A
SW4 5
1000p/50
10u/35
C1434
C1456
C1457
FB
0.1u/25
GND B
CH
SR
C1440
0.1u/10
C1442
C1444
R1440
0.1u/10
0.1u/10
!
10k
(D)
R1436
4.7k
GNDD
D 10/19 3R3D_CON
V+3R3D_CONT
From MAIN_UCOM 10:12K V+3R3D
13V 3.3V(D)
L1402 1-94
47u
ATH7048-A-TLB
9
R1429
4.7k
STBY
(D)
V+13D_UNREG IC1405
BD9328EFJ C1458
V+3R3D C
NM
R1413 C1419 1 8
R1430
0.1u/10 BST SS
22 2 7
22k
9
(D)
DCH1201-A
DCH1201-A
CCH1565-A
EN
1 0 u 10V
1 0 0 u 16V
VIN 3
1 0 u 10V
1000p/50
6
C1431
C1429
C1427
C1425
C1433
0.1u/10
CH
SW FIN COMP
CCG1236-A
4 5
1000p/50
C1415
C1450
C1451
FB
0.1u/25
10u/35
GND
CH
SR
0.033u/16
C1421
!
C1423
R1431
0.1u/10
10k
(D)
R1420
18k
GNDD
D 10/19 5D_CON 6 V+5D

D
V+5D_CONT
From MAIN_UCOM 10:12K V+5D V+5D_LED
13V 5V(D)
L1403 NOTES
47u
ATH7048-A-TLB NM is STBY
R1426
STBY
7.5k
RS1/16SS***J
(D)
V+13D_UNREG IC1404
C1459
NM
BD9325FJ (D) RS1/16SS****D

-96 R1412 C1418 1 8 SR RS1/10SR***J
BST SS
R1427
STBY 22 0.1u/10 2 7
39k
(D)
DCH1201-A
DCH1201-A
CCH1565-A
VIN EN
1 0 u 10V
1 0 u 10V
1 0 0 u 16V
1000p/50
3 6
D1407
C1430
C1428
C1424
C1426
C1432
1/8W RS1/8SQ***J
0.1u/10
SW COMP
NM
CH
CCG1236-A
4 5 1/8W (F) RS1/8SQ****F

1000p/50
GND FB
C1413
C1452
C1453
0.1u/25
10u/35
34D
CH
SR
1/4W RS1/4SA***J
0.022u/16
C1420
R1441
STBY RN RN1/16SE****D
!
NM
C1463
C1422
R1428
0.1u/10
CMS03
NM
10k
D1406
(D)
! RAB4CQ***J
C1462
R1419
NM
27k
E
CKSSYB***K F
SR CKSRYB***K F
GNDD SQ CKSQYB***K F
GNDD_LED
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CEVW***M F
NP CEVWNP***M F
The > mark found on some component parts +
HVW CEHVW***M F
indicates the importance of the safety factor of the part. +
: Voltage measuring point Therefore, when replacing, be sure to use parts HVAW CEHVAW***M F
B CEANP CEANP***M F
of identical designation.
F
D 3/19
DJM-750-K 107
5 6 7 8
1 2 3 4
10.10 MAIN ASSY (4/19)
A CH1 ADC STBY

V+5A_IN
V+15A_IN D1601
C1605
0.1u/25 NM
SR
GNDIN_CH1
R1617
GNDA_OUT
2 . 4 k RN R-
C1613
100p/50
C1638
CH
R1601 STBY STBY
10k VCC NM
RN C1601
NM 2
8 R1613
1 V+5A_IN
IC1601 220
R1621
R1602 4 NJM4580MD RN
2.4k
3
RN
10k (1/2) C1620
GND
RN
0.1u/10
V-15A_IN
D 1/19 R1609
R1623 R1622
V+
2.4k
RN
1.2k 2
RN 8
CH1_R 1
STBY
To BOARD_IF 1:7H
C1609
RN
2.4k
4 IC1603
B NM R1618
V-
3 NJM4565MD
V+15A_IN (1/2)
2 . 4 k RN
C1614
GNDIN_CH1
100p/50
STBY
CH
R1624
C 1 6 3 9 STBY
2.4k
RN
R1603 STBY
10k VCC
RN C1602 NM
NM 6
R1629
C1619
8 R1614
7
NM
NM
220
GNDA_OUT
IC1601
R1604 4 RN
10k
5 NJM4580MD
RN GND (2/2) C 1 6 1 0 STBY
NM GNDIN_CH1
R1610
1.2k
R+ V+5A_IN
RN STBY
C1606
D1602
0.1u/25
CH1, CH3 common used SR
GNDIN_CH1
V-15A_IN NM
V+15A_IN
GNDA_OUT
C
100u/25
100u/25
C1617
C1618
V+5A_IN
STBY
GND_PO GND_PO V+15A_IN D1603
V-15A_IN C1607
0.1u/25 NM
SR
GNDIN_CH1
R1619
GNDA_OUT
2.4k RN L- (CH1)
100p/50
C1615
CH
R1605 C1640
STBY
10k VCC
(CH1) RN C1603 NM STBY
NM 6
8 R1615 (CH1)
7
IC1602 220 V+5A_IN
R1625
R1606 5
4 NJM4580MD RN
RN
2.4k
10k (2/2)
RN GND
V-15A_IN R1611
D 1/19
R1627 R1626
V+
RN
2.4k
1.2k 6
(CH1) RN 8
D To BOARD_IF CH1_L C 1 6 1 1 STBY
7
1:7H
RN
2.4k
NM 4 IC1603
R1620 5 NJM4565MD
V-
V+15A_IN 2.4k
(2/2)
RN
C1616
GNDIN_CH1
100p/50
CH
R1628
C 1 6 4 1 STBY
RN
R1607 STBY
2.4k
10k VCC GNDA_OUT

RN C1604 NM
NM 2
8 R1616
1
IC1602 220
R1608 4 RN (CH1) (CH1)
(CH1) 3 NJM4580MD (CH1)
10k
RN GND (1/2)
C1612
NM
STBY
L+ V+5A_IN
(CH1)
STBY
R1612
1.2k D1604
RN
C1608
0.1u/25 NM
SR
GNDIN_CH1
V-15A_IN GNDA_OUT
D 4/19
108 DJM-750-K
1 2 3 4
5 6 7 8
(CH1)
(CH1 D)
: CH1 Digital Signal

B
NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F
1/4W RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K
C
F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CEVW***M F
NP CEVWNP***M F
+
HVW CEHVW***M F
+
HVAW CEHVAW***M F
CEANP CEANP***M F
CH1 ADC The check point for service. D

C1626 C1629
PCM1804DB
22u/6.3 IC1604 22u/6.3
C1622 1 VREFL 28 C1634

1-18 0.1u/10 2 AGNDL
VREFR
27 0.1u/10
AGNDR
26
R+
3 VCOML
C1623 VCOMR C1630
(CH1) 0 . 1 u / 1 0 (CH1) 4 VINL+ 25 0.1u/10
VINR+
24
R-
(CH1) 5
VINL-
C1624 VINR- C1631
2 7 0 0 p / 5 0 (CH1) 6 F M T 0 23 2700p/50
AGND
L+ L- 7 FMT1 22
1-18
VCC
8 S/M 21
9 OSR0
OVFL
20 1-26 1-28 1-22
OVFR
R1632
10
OSR1
11 OSR2
RST
19
18 100
R1635
13AD_RESET
6:10F;10:14C
24M_CLK_13AD
From MAIN_UCOM D 6/19,10/19
SCKI R1633 6:10F;11:2H
12 BYPAS 17 22
13
LRCK/DSDBCK
DGND 16 0
R1636
96k_CLK_13AD
6:10F;11:2H
6M_CLK_13AD
From FPGA D 6/19,11/19
14
BCK/DSDL
15 R1634 0 (CH1 D) 6:10F;11:2H E
VDD
DATA/DSDR 100
ADAT_CH1_ANA
13:4H
To DSP D 13/19
V+3R3A (CH1 D) V+5A_IN
0.01u/16
C1632
1-27 1-29 ADAT_CH1

R1630
R1631
NM
NM
STBY STBY
GNDD
CCH1998-A
10u 16V
1000p/50
1000p/50
C1621
C1625
C1627
C1628
C1633
C1635
0.1u/10
0.1u/10
22u/6.3
C1636
1000p/50
C1637
GNDA_OUT
0.01u/16
PCM, left-justified, 24-bit
FMT0 Low
FMT1 Low GNDD
Dual rate ( 64 fS slavemode

OSR0 High
OSR1 Low
OSR2 Low F
D 4/19
DJM-750-K 109
5 6 7 8
1 2 3 4
10.11 MAIN ASSY (5/19)
A
CH2 ADC V+5A_IN
STBY
V+15A_IN D1801
C1805
0.1u/25 NM
SR
GNDIN_CH2
R1817
GNDA_OUT
2.4k RN R-
C1813
100p/50
C1838
CH
R1801 STBY
10k VCC NM STBY
RN C1801
NM 2
8 R1813
1 V+5A_IN
IC1801
220
R1821
2.4k
3
RN
10k (1/2) C1820
RN GND
0.1u/10
R1809
D 1/19 V-15A_IN
R1823 R1822
V+
2.4k
RN
1.2k 2
RN 8
CH2_R 1
To BOARD_IF 1:7H
C1809
STBY
RN
2.4k
4 IC1803
B NM R1818
V-
3 NJM4565MD
V+15A_IN (1/2)
2.4k RN
C1814
GNDIN_CH2
100p/50
STBY
CH
R1824
C1839
2.4k
RN
R1803 STBY STBY
10k VCC
RN C1802 NM
NM 6
R1829
C1819
8 R1814
7
NM
NM
IC1801 220
GNDA_OUT
5 (2/2)
10k
RN GND
C 1 8 1 0 STBY
NM GNDIN_CH2
R1810
1.2k
R+ V+5A_IN
RN STBY
C1806
CH2, CH4 common used 0.1u/25
D1802
SR
GNDIN_CH2
V+15A_IN NM
V-15A_IN
100u/25
100u/25
C1817
C1818
GNDA_OUT
C
V+5A_IN
GND_PO GND_PO STBY
V-15A_IN V+15A_IN D1803
C1807
0.1u/25 NM
SR
GNDIN_CH2
R1819
GNDA_OUT
2.4k RN L- (CH2)
C1815
100p/50
CH
R1805 C1840
STBY
10k VCC
(CH2) RN C1803
6 NM STBY
NM 8 (CH2)
7 R1815
IC1802 220 V+5A_IN
R1825
R1806 5
4 NJM4580MD RN
RN
2.4k
10k (2/2)
RN GND
V-15A_IN R1811
R1827 R1826
D 1/19 V+
RN
2.4k
1.2k 6
(CH2) 8
D CH2_L
RN 7
To BOARD_IF 1:7H
C1811 STBY
RN
2.4k
4 IC1803
NM R1820 5 NJM4565MD
V- (2/2)
V+15A_IN 2.4k RN
C1816
GNDIN_CH2
100p/50
CH
R1828
C 1 8 4 1 STBY
RN
R1807 STBY
2.4k
VCC GNDA_OUT
10k
RN C1804 NM
NM 2 (CH2)
8 R1816
1
IC1802 220
R1808 4 NJM4580MD RN (CH2) (CH2)
(CH2) 3
10k (1/2)
RN GND
C 1 8 1 2 STBY (CH2)
NM
L+ V+5A_IN
STBY
R1812
1.2k D1804
RN
C1808
0.1u/25 NM
SR
GNDIN_CH2
V-15A_IN GNDA_OUT
D 5/19
110 DJM-750-K
1 2 3 4
5 6 7 8
(CH2)
: CH2 Audio Signal (L CH) B
(CH2 D)
NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F
1/4W RS1/4SA***J C
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CEVW***M F
NP CEVWNP***M F
+
CH2 ADC HVW
HVAW
+
CEHVW***M
CEHVAW***M
F
F
D
C1826 C1829
PCM1804DB CEANP CEANP***M F
22u/6.3 IC1804 22u/6.3
C1822 1 28 C1834
VREFL
1-19 0.1u/10 2
VREFR
AGNDL 27 0.1u/10
AGNDR R+ The check point for service.
3 26
(CH2) C1823
VCOML
VCOMR C1830 ***** (Legend silk indication on the PCB.)
0 . 1 u / 1 0 (CH2) 4
VINL+
25 0.1u/10
(CH2)
VINR+ R-
5 24
VINL-
C1824 VINR- C1831
2 7 0 0 p / 5 0 (CH2) 6
FMT0
23 2700p/50
AGND
L+ L- 7 FMT1
22
1-19
VCC
8 S/M
21
9 OSR0
OVFL
OVFR
20 1-26 1-28 1-23 D 2/19,7/19,10/19
10 19 R1832 24AD_RESET
OSR1
RST R1835
2:2E;7:10F;10:15C From MAIN_UCOM
11 18 100 24M_CLK_24AD
OSR2
SCKI R1833 7:10F;11:2I
12 17
13
BYPAS
LRCK/DSDBCK
DGND 16 0
100
R1836
96k_CLK_24AD
7:10F;11:2I
6M_CLK_24AD
14
BCK/DSDL
15 R1834 100
7:10F;11:2I E
VDD
DATA/DSDR
100
ADAT_CH2_ANA
13:4H
To DSP D 13/19
V+3R3A (CH2 D) V+5A_IN (CH2 D)
0.01u/16
C1832
1-27 1-29 ADAT_CH2

R1830
R1831
NM
NM
STBY STBY
GNDD
CCH1998-A
10u 16V
1000p/50
1000p/50
22u/6.3
C1821
C1825
C1827
C1828
C1833
C1835
0.1u/10
0.1u/10
C1837
1000p/50
C1836
GNDA_OUT
0.01u/16
FMT0 Low
FMT1 Low GNDD

OSR0 High
OSR1 Low
OSR2 Low
F
D 5/19
DJM-750-K 111
5 6 7 8
1 2 3 4
10.12 MAIN ASSY (6/19)
A CH3 ADC V+5A_IN

STBY
V+15A_IN D2001
C2005
0.1u/25 NM
SR
GNDIN_CH3
R2017
GNDA_OUT
2.4k RN R-
C2013
100p/50
C2036
CH
R2001 STBY
10k VCC NM STBY
RN C2001
NM 2
8 R2013
1 V+5A_IN
IC2001
220
R2021
2.4k
3
RN
10k (1/2) C2018
RN GND
0.1u/10
V-15A_IN R2009
D 1/19
R2023 R2022
V+
2.4k
RN
1.2k 2
RN 8
CH3_R 1
To BOARD_IF 1:7G
C2009 STBY
RN
2.4k
4 IC2003
B NM R2018
V-
3 NJM4565MD
V+15A_IN (1/2)
2.4k RN
C2014
GNDIN_CH3
100p/50
STBY
CH
R2024
C2037
2.4k
RN
R2003 STBY STBY
10k VCC
RN C2002 NM
NM 6
R2029
C2017
8 R2014
7
NM
NM
IC2001 220
GNDA_OUT
5 (2/2)
10k
RN GND
C 2 0 1 0 STBY
NM GNDIN_CH3
R2010
1.2k
R+ V+5A_IN
RN STBY
C2006
D2002
0.1u/25
SR
GNDIN_CH3
V-15A_IN NM
GNDA_OUT
C
V+5A_IN
STBY
V+15A_IN D2003
C2007
0.1u/25 NM
SR
GNDIN_CH3
R2019
GNDA_OUT
2.4k RN L- (CH3)
C2015
100p/50
CH
R2005 C2038
STBY
10k VCC
(CH3) RN C2003
6 N M STBY
NM 8 (CH3)
7 R2015
IC2002 220 V+5A_IN
R2025
R2006 5
4 NJM4580MD RN
RN
2.4k
10k (2/2)
RN GND
V-15A_IN R2011
R2027 R2026
D 1/19 V+
RN
2.4k
1.2k 6
(CH3) 8
D CH3_L RN 7
To BOARD_IF 1:7H
C 2 0 1 1 STBY
RN
2.4k
NM 4 IC2003
R2020 5
V- NJM4565MD
V+15A_IN 2.4k RN (2/2)
C2016
GNDIN_CH3
100p/50
CH
R2028
C2039
RN
R2007 STBY STBY

2.4k
VCC GNDA_OUT
10k
RN C2004 NM
NM 2 (CH3)
8 R2016
1
IC2002 220
R2008 4 NJM4580MD RN (CH3) (CH3)
(CH3) 3
10k (1/2)
RN GND
C2012 (CH3)
NM
STBY
L+ V+5A_IN
STBY
R2012
1.2k D2004
RN
C2008
0.1u/25 NM
SR
GNDIN_CH3
V-15A_IN GNDA_OUT
D 6/19
112 DJM-750-K
1 2 3 4
5 6 7 8
(CH3)
: CH3 Audio Signal (L CH) B
(CH3 D)
NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F

C
1/4W RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CEVW***M F
CEVWNP***M
CH3 ADC NP
HVW
+
CEHVW***M
F
F
D
C2024 C2027 +
HVAW CEHVAW***M F
PCM1804DB
22u/6.3 IC2004 22u/6.3 CEANP***M
CEANP F
C2020 1 28 C2032
1-20 0.1u/10 2
VREFL
VREFR
27 0.1u/10
AGNDL
AGNDR R+
3 26
C2021
VCOML
VCOMR C2028 The check point for service.
(CH3) 0 . 1 u / 1 0 (CH3) 4 VINL+
VINR+
25 0.1u/10
R- ***** (Legend silk indication on the PCB.)
(CH3) 5 24
VINL-
C2022 VINR- C2029
2 7 0 0 p / 5 0 (CH3) 6
FMT0
23 2700p/50
AGND
L+ L- 7 FMT1
22
1-20
VCC
8 21
S/M
9 OSR0
OVFL
20 1-26 1-28 1-24
OVFR
10
11
OSR1
RST
19
18
R2032
100
R2035 R2037
13AD_RESET
4:10F;10:14C
24M_CLK_13AD
From MAIN_UCOM D 4/19,10/19
OSR2
SCKI R2033 4:10F;11:2H
12 17 22
13
BYPAS
LRCK/DSDBCK
DGND
16 0
22
R2036
96k_CLK_13AD
4:10F;11:2H
6M_CLK_13AD
14
BCK/DSDL
15 R2034 0
(CH3 D) 4:10F;11:2H E
VDD
DATA/DSDR
100
ADAT_CH3_ANA
13:4I
To DSP D 13/19
V+3R3A (CH3 D) V+5A_IN
0.01u/16
C2030
1-27 1-29 ADAT_CH3

R2030
R2031
NM
NM
STBY STBY
GNDD
CCH1998-A
16V
1000p/50
1000p/50
C2019
C2023
C2025
C2026
C2031
C2033
0.1u/10
0.1u/10
22u/6.3
10u
C2034
1000p/50
C2035
GNDA_OUT
PCM, left-justified, 24-bit 0.01u/16
FMT0 Low
FMT1 Low GNDD

OSR0 High
OSR1 Low
OSR2 Low
F
D 6/19
DJM-750-K 113
5 6 7 8
1 2 3 4
10.13 MAIN ASSY (7/19)
A
CH4 ADC V+5A_IN
STBY
V+15A_IN D2201
C2205
0.1u/25 NM
SR
GNDIN_CH4
R2217
GNDA_OUT
2 . 4 k RN R-
C2213
100p/50
C2236
CH
R2201 STBY
10k VCC NM STBY
RN C2201
NM 2
8 R2213
1 V+5A_IN
IC2201 220
R2221
2.4k
3
RN
10k (1/2) C2218
RN GND
0.1u/10
V-15A_IN R2209
D 1/19
R2223 R2222
V+
2.4k
RN
1.2k 2
RN 8
CH4_R 1
To BOARD_IF 1:7G
C2209
STBY
RN
2.4k
B NM R2218 4 IC2203
3 NJM4565MD
V- (1/2)
V+15A_IN 2.4k RN
C2214
GNDIN_CH4
100p/50
STBY
CH
R2224
C2237
2.4k
RN
R2203 STBY STBY
10k VCC
RN C2202 NM
NM 6
R2229
C2217
8 R2214
7
NM
NM
IC2201 GNDA_OUT
NJM4580MD 220
R2204 4 RN
5 (2/2)
10k
RN GND C2210 STBY
NM GNDIN_CH4
R2210
1.2k
R+ V+5A_IN
RN STBY
C2206
D2202
0.1u/25
SR
GNDIN_CH4
V-15A_IN NM
GNDA_OUT
C
V+5A_IN
STBY
V+15A_IN D2203
C2207
0.1u/25 NM
SR
GNDIN_CH4
R2219
GNDA_OUT
2.4k RN L- (CH4)
C2215
100p/50
CH
R2205 C2238
STBY
10k VCC
(CH4) RN C2203
6 N M STBY
NM 8 (CH4)
7 R2215
IC2202 220 V+5A_IN
R2225
R2206 5
4 NJM4580MD RN
RN
2.4k
10k (2/2)
RN GND
V-15A_IN R2211
R2227 R2226
D 1/19 V+
RN
2.4k
1.2k 6
(CH4)
D CH4_L
RN 7
8
To BOARD_IF 1:7G
C2211
STBY
RN
2.4k
4 IC2203
NM R2220 5 NJM4565MD
V- (2/2)
V+15A_IN 2.4k RN
C2216
GNDIN_CH4
100p/50
CH
R2228
C2239
RN
R2207 STBY STBY

2.4k
10k VCC GNDA_OUT

RN C2204 NM
NM 2 (CH4)
8 R2216
1
IC2202 220
R2208 4 NJM4580MD RN (CH4) (CH4)
(CH4) 3
10k (1/2)
RN GND
C2212 STBY
NM
L+ V+5A_IN
(CH4)
STBY
R2212
1.2k D2204
RN
C2208
0.1u/25 NM
SR
GNDIN_CH4
V-15A_IN GNDA_OUT
D 7/19
114 DJM-750-K
1 2 3 4
5 6 7 8
(CH4)
(CH4 D)
B
NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F
1/4W RS1/4SA***J
RN RN1/16SE****D
C
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CEVW***M F
NP CEVWNP***M F
+
HVW CEHVW***M F
+
HVAW CEHVAW***M F
CH4 ADC CEANP CEANP***M F
D
C2224 C2227
PCM1804DB
22u/6.3 IC2204 22u/6.3
C2220 1 28 C2232 The check point for service.

1-21 2
VREFL
VREFR
27
0.1u/10 AGNDL 0.1u/10
3
AGNDR
26
R+
VCOML
C2221 VCOMR C2228
0 . 1 u / 1 0 (CH4) 4 VINL+
25 0.1u/10
5
VINR+
24
R-
VINL-
C2222 VINR- C2229
2 7 0 0 p / 5 0 (CH4) 6 FMT0
23 2700p/50
AGND
L+ L- 7 FMT1
VCC
22
1-21
8 21
S/M
9 OSR0
OVFL
20 1-26 1-28 1-25 D 2/19,5/19,10/19
OVFR
10 19 R2232 24AD_RESET
OSR1
RST R2235 R2237
2:2E;5:10F;10:15C From MAIN_UCOM
11 OSR2 18 100 24M_CLK_24AD
SCKI R2233 5:10F;11:2I
100
12
13
BYPAS
LRCK/DSDBCK
DGND
16
17
0
100
R2236
96k_CLK_24AD
5:10F;11:2I
6M_CLK_24AD
14
BCK/DSDL
15 R2234 (CH4 D) 5:10F;11:2I E
V+3R3A
VDD
DATA/DSDR
(CH4 D) V+5A_IN
100
100
ADAT_CH4_ANA
13:4I
To DSP D 13/19
0.01u/16
C2230
1-27 1-29 ADAT_CH4

R2230
R2231
NM
NM
STBY STBY
GNDD
CCH1998-A
16V
1000p/50
1000p/50
C2219
C2223
C2225
C2226
C2231
C2233
0.1u/10
0.1u/10
22u/6.3
10u
C2234
1000p/50
C2235
GNDA_OUT
0.01u/16
FMT0 Low
FMT1 Low GNDD

OSR0 High
OSR1 Low
OSR2 Low
F
D 7/19
DJM-750-K 115
5 6 7 8
1 2 3 4
10.14 MAIN ASSY (8/19)
A MIC/RET ADC
1-42
D 1/19 RET_R
1:7G
C2402
33u/25
From BOARD IF RET_L
C2401 (RET A) 1-42
1:7G
33u/25
DAN217UM
DAN217UM
RETURN_ADC
D2403
D2404
R2413
IC2402 1 8
1 16 2 7
V+5A_IN AINR CKS0
2 15 6
B AINL CKS2
3 1-43
(RET A) 3 14 4 5
V+3R3D CKS1 DIF
4 13 GNDD R2423 100 HP-M
STBY
R2426
10k
STBY VCOM PDN 1:6C
NM
5 12 R2417 0 6M_
R2408
AGND SCLK
NM
R2418 R2424 1:6C

6 11 22 24M
VA MCLK 1:6C
7 10 R2419 0 22
96k_
VD LRCK
(RET D) 1:6C
DCH1201-A
DCH1201-A
DCH1201-A
8 9 R2420 100
10V
10V
10V
DGND SDTO ADAT
0.1u/10
C2411
C2413
C2410
C2412
R2410
C2415
C2416
0.1u/10
0.1u/10
13:4H
10k
0.01u/16
C2424
AK5359ET 1-45 1-46 1-44 1-47
10u
ADAT_RETURN
10u
10u
C2422
STBY 1000p/50
C2420
R2411
1/8W
C2421
NM
GNDA_OUT GNDD
0
0.01u/16
GNDD
C
GNDIN_RET
(MIC1 A)
1-34
(MIC1 A)
D 1/19 MIC1
1:7H
C2404
33u/25
From BOARD IF MIC2
C2403
D 1:7H
NM
STBY
DAN217UM
STBY
MIC_ADC
D2401
D2402
NM
R2412
IC2401 1 8
1 16 2 7
AINR CKS0
2 15
V+5A_IN AINL CKS2
3 6 1-36
3 14 4 5
V+3R3D STBY CKS1 DIF
GNDD R2422 100 HP-M
4 13
R2405
10k
STBY VCOM PDN 1:6C
NM
5 12 R2414 0 6M_C
R2409
AGND SCLK
NM
R2416 R2425 1:6C

6 11 22 24M_
VA MCLK 1:6C
7 10 R2415 0 22
96k_
VD LRCK
1:6C
DCH1201-A
DCH1201-A
DCH1201-A
8 9 R2421 100 (MIC D)

10u 10V
10u 10V
10u 10V
DGND SDTO ADAT

C2414
C2417
C2406
R2406
C2408
C2407
0.1u/10
0.1u/10
0.1u/10
C2405
13:4H
E
10k
(MIC D)
0.01u/16
C2423
AK5358AET
1-38 1-39 1-37 1-40
C2418 ADAT_MIC
STBY 1000p/50
C2409
R2407
1/8W
C2419
NM
GNDA_OUT GNDD
0
0.01u/16
GNDD
GNDIN_MIC
D 8/19
116 DJM-750-K
1 2 3 4
5 6 7 8
B
HP-MIC-RE_RESET
1:6C;11C;10:15D From MAIN_UCOM D 1/19,10/19
6M_CLK_HP-MIC-RE
R2424 1:6C;11C;11:2L
24M_CLK_HP-MIC-RE
22
1:6C;11C;11:2L From FPGA D 1/19,11/19
96k_CLK_HP-MIC-RE
(RET D) 1:6C;11C;11:2L
ADAT_RETURN_ANA
13:4H
To DSP D 13/19
DAT_RETURN
(RET A)
: RETURN Audio Signal (L CH)
(RET D)
: RETURN Digital Signal
(MIC1 A)
: MIC1 Audio Signal
(MIC D)
: MIC Digital Signal C

NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F D
1/4W RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
0 HP-MIC-RE_RESET
1:6C;5C;10:15D From MAIN_UCOM D 1/19,10/19 SQ CKSQYB***K F
6M_CLK_HP-MIC-RE
1:6C;5C;11:2L CH CCSSCH***J F
R2425
24M_CLK_HP-MIC-RE
22
1:6C;5C;11:2L
96k_CLK_HP-MIC-RE
From FPGA D 1/19,11/19 CH (D) CCSSCH***D F
SRCH CCSRCH***J F
(MIC D) 1:6C;5C;11:2L
ADAT_MIC_ANA
13:4H
To DSP D 13/19 SQCH CCSQCH***J F
CFHXSQ***J
E
CFHXSQ F
+
CEVW***M F
ADAT_MIC CEVWNP***M
NP F
+
HVW CEHVW***M F
+
HVAW CEHVAW***M F
CEANP CEANP***M F

D 8/19
DJM-750-K 117
5 6 7 8
1 2 3 4
10.15 MAIN ASSY (9/19)
USB_UCOM USB UCOM

A V+1R2D
STBY
V+1R2D_USB IC2603
1-14
R2601
ADSP-BF525BBCZ-5A
NM
F2601
DTL1106-A
1 3 G12 A1
VDDINT1 VSS1
G13 A17
VDDINT2 VSS2
2
C2617 1000p/50
C2621 1000p/50
C2623 1000p/50
C2625 1000p/50
C2627 1000p/50
C2629 1000p/50
C2634 1000p/50
1000p/50
G14 A20
470p/50
C2610 0.1u/10
VDDINT3 VSS3
STBY R2630
DCH1201-A
H14 B20 USB_ADRS[1] W20
10u 10V
VDDINT4 VSS4 ADDR1
C2602
C2669
C2606
0.1u/10
J14 H9 USB_ADRS[2] 4 5 W19
NM
VDDINT5 VSS5 ADDR2
C2608
C2615
K14 H10 USB_ADRS[3] 3 6 Y19
VDDINT6 VSS6 ADDR3
L14 H11 USB_ADRS[4] 2 7 W18
VDDINT7 VSS7 R2627 1 ADDR4
M14 H12 USB_ADRS[5] 8 Y18
1 8 82
VDDINT8 VSS8 ADDR5
N14 H13 USB_ADRS[6] 2 7 W17
VDDINT9 VSS9 ADDR6
GNDD J9 USB_ADRS[7] 3 6 Y17
VSS10 ADDR7
P12 J10 USB_ADRS[8] 4 5 W16
V+3R3D V+3R3D_USB 1-13 P13

VDDINT10
VDDINT11
VSS11
VSS12
J11 82
R2631
Y16
ADDR8
ADDR9
P14 J12 USB_ADRS[9] 1 8 W15
V+3R3D_USB VDDINT12 VSS13 ADDR10
R2604 R2606 F19 J13 USB_ADRS[10] Y15
2 7
VRSEL VDDINT SEL VSS14 ADDR11
NM NM G7 K9 USB_ADRS[12] 3 6 W14
VDDEXT1 VSS15 ADDR12
STBY STBY
470p/50
G8 K10 Y14
C2609 0.1u/10
C2620 0.1u/10
C2622 0.1u/10
C2624 0.1u/10
C2626 0.1u/10
C2628 0.1u/10
C2632 0.1u/10
C2637 0.1u/10
C2639 0.1u/10
C2643 0.1u/10
C2647 0.1u/10
0.1u/10
4 5
C2601
0.1u/10
DCH1201-A
G9 K11 82 W13
10V

100u/16
C2603
C2605
G10 K12 R2632 Y13

Power Suply
C2607
C2616
10u
G11 K13 4 5 W12

USB_ADRS[18]
B H7
VDDEXT5
VDDEXT6
VSS19
VSS20
L9
USB_ADRS[19] 3 6
GNDD
Y12
ADDR16
ADDR17
H8 L10 2 7 W11
V+3R3D_USB_MEM J7 L11 1 8 Y11
VDDEXT8 VSS22 82 ADDR19
J8 L12 USB_S_CLK R2633 K20
VDDEXT9 VSS23 CLKOUT
R2607 R2628 68
K7 L13 USB_S_CKE P20
VDDEXT10 VSS24 SCKE
NM K8 M9 USB_S_MS 4 5 R19
VDDEXT11 VSS25 SMS
STBY 3
C2638 0.01u/16
C2640 0.01u/16
C2644 0.01u/16
C2648 0.01u/16
0.01u/16
L7 M10 USB_S_WE 6 T19
VDDEXT12 VSS26 SRAS
2 7
DCH1201-A
M11 USB_S_RAS U20

10V
VSS27 SCAS
C2614
L8 M12 1 8 T20
VDDMEM1 82 SWE
VSS28
C2633
R2629
10u
M7 M13 V19
VDDMEM2 VSS29 USB_S_CAS ABE0/SDQM0
M8 N9 4 5 V20
VDDMEM3 VSS30 USB_S_SA10 ABE1/SDQM1
N7 N10 3 6 U19
VDDMEM4 VSS31 USB_S_ABE[1] SA10
N8 N11 2 7
V+3R3D_USB_IF VDDMEM5 VSS32 USB_S_ABE[0]
P7 N12 1 8
VDDMEM6 VSS33 82
R2608 P8 N13
VDDMEM7 VSS34
C 2 6 4 1 1 0 0 0 p / 5 0 CH
CH
CH
NM P9 Y1
VDDMEM8 VSS35
STBY P10 Y20
C2645 100p/50
100p/50
VDDMEM9 VSS36
P11
VDDMEM10
C2636
C2630
0.1u/10
GNDD D19
VDDUSB1 GNDD
G20
VDDUSB2
1-15 A16
C V+2R5D
V+2R5D_UPLL
VDDRTC
R2611 R20
VDDOTP
STBY
DCH1201-A
NM L19
1 0 u 10V
C2613
VPPOTP
C2619
C2635
C2642
STBY
0.1u/10
0.1u/10
NM
D 11/19 R2671
GNDD
96K_CLK_USB
From FPGA 11:2C

6M_CLK_USB
0 R2672
11:2C 0
V+3R3D
STBY
IC2601
1 VCC 5
C2611 Oscillator
R2602
NM
2
3 4 R2609
NM
GNDD 24MHz 1-17

GND
NM
NM STBY R2614
GNDD
V+3R3D NM
R2624
1k
X2601
IC2602 4 X2 3
D 1 VCC 5
C2612
GND2
USB UCOM
R2603 2 NM 1 2
IC2603
X1 GND1
R2610
R2626
NM 3 4 GNDD
C2618
C2631
CH (D)
12p/50
10p/50
GND DSS1203-A
22
CH
NM 24MHz
GNDD
NM ADSP-BF525BBCZ-5A
A11
D 13/19
Clock
CLKIN
RTC
ADAT_USB1OUT
(CH1 U OUT) A10 A14 R2636
GNDD XTAL RTXI
13:13I (CH2 U OUT) C19 A15 10k
From DSP ADAT_USB2OUT
13:13I (CH3 U OUT) F1
CLKBUF RTXO
A7
(USB Audio out signal) ADAT_USB3OUT
13:13I (CH4 U OUT) E1
PF0/PPI_D0/DR0PRI_/ND_D0A PH0/ND_D0/HOST_D0
B7
GNDD
ADAT_USB4OUT PF1/PPI_D1/RFS0/ND_D1A PH1/ND_D1/HOST_D1

13:13I E2 A8
(CH1 U/D IN) PF2/PPI_D2/RSCLK0/ND_D2A PH2/ND_D2/HOST_D2
ADAT_USBIN1 (CH2 U/D IN) R2616 D1 B8
13:4I PF3/PPI_D3/DT0PRI/ND_D3A PH3/ND_D3/HOST_D3
(CH3 U/D IN) R2617 100
To DSP ADAT_USBIN2
13:4I R2618 100
D2
PF4/PPI_D4/TFS0/ND_D4A/TACLK0 PH4/ND_D4/HOST_D4
A9
(USB Audio input signal) ADAT_USBIN3

13:4I R2619 100
C1
PF5/PPI_D5/TSCLK0/ND_D5A/TACLK1 PH5/ND_D5/HOST_D5
B9
C2 B10
Port H
ADAT_USBIN4
Port F
PF6/PPI_D6/DT0SEC/ND_D6A/TACI0 PH6/ND_D6/HOST_D6
D 13/19 13:4I STBY 100 B1

PF7/PPI_D7/DR0SEC/ND_D7A/TACI1 PH7/ND_D7/HOST_D7
B11
5
(CH4 U/D IN) B2 A12

R2667
PF8/PPI_D8/DR1PRI PH8/xSPISEL4/HOST_D8/TACLK2
NM
A2 B12
PF9/PPI_D9/RSCLK1/xSPISEL6 PH9/xSPISEL5/HOST_D9/TACLK3
4
2
1
B3 A13
V+3R3D_USB PF10/PPI_D10/RFS1/xSPISEL7 PH10/xND_CE/HOST_D10 DBG_PORT_PH10
A3 B13
PF11/PPI_D11/TFS1/CZM PH11/xND_WE/HOST_D11 DBG_PORT_PH11
B5 B14
PF12/PPI_D12/DT1PRI/xSPISEL2/CDG PH12/xND_RE/HOST_D12 DBG_PORT_PH12
STBY A5 B15
GNDD PF13/PPI_D13/TSCLK1/xSPISEL3/CUD PH13/xND_BUSY/HOST_D13 DBG_PORT_PH13
R2612
R2613
B6 B16
NM
10k
E D 10/19 R2620
A6
R2
PF14/PPI_D14/DT1SEC/UART1TX
PF15/PPI_D15/DR1SEC/UART1RX/TACI3
PH14/ND_CLE/HOST_D14
PH15/ND_ALE/HOST_D15
B17
F2
DBG_PORT_PH14
DBG_PORT_PH15
To MAIN_UCOM 10:14G
HWAIT
PG0/HWAIT PPI_FS1/TMR0
Port J
47 P1 G2
PG1/xSPISS/xSPISEL1 PPI_CLK/TMRCLK
USB_SCK P2 A4
11:12L PG2/SCK SCL
R2621
From To FPGA USB_MISO
11:12L 22
N1
N2
PG3/MISO/DR0SECA SDA
B4
V2
USB_MOSI PG4/MOSI/DT0SECA TCK
D 11/19 11:12L M1 T1
R2605
PG5/TMR1/PPI_FS2 TDO
10k
JTAG
M2 R1
PG6/DT0PRIA/TMR2/PPI_FS3 TDI
Port G
L1 U2
PG7/TMR3/DR0PRIA/UART0TX TMS
MIDI_TXD_USB GNDD L2 U1
10:11A PG8/TMR4/RFS0A/UART0RX/TACI4 TRST
From MAIN_UCOM USB_ERR_MAIN
10:14F
R2622
22
K1
PG9/TMR5/RSCLK0A/TACI5 EMU
T2
K2 J20
D 10/19 PG10/TMR6/TSCLK0A/TACI6 EXT_WAKE0

Regulation
J1
PG11/TMR7/xHOST_WR
Voltage
USB_SI R2623 J2 H20

10:14F PG12/DMAR1/UART1TXA/HOST_ACK VROUT
22
I/F
USB_SO H1
PG13/DMAR0/UART1RXA/HOST_ADDR/TACI2
10:14F R2615 R2635
H2 G19
USB_REQ
PG14/TSCLK0A1/xHOST_RD SS
10:14F 22 10k
From To MAIN_UCOM USB_RCV
G1
PG15/TFS0A/HOST_CE
GNDD
10:14F V+3R3D_USB Y10
D 10/19 USB_RESET
R2669
R2625
10k
B19
B18
NMI
Mode Control
BMODE0
BMODE1
W10
Y9
RESET BMODE2
10:14F 100 W9
BMODE3
0.01u/16
1-16
C2646
USB_RST
8
7
6
5
F
R2634
V+3R3D_
10k
BMODE3-0 : 0100
Boot from SPI host device
2
3
4
1
GNDD
D 9/19 GNDD
118 DJM-750-K
1 2 3 4
5 6 7 8
USB UCOM
IC2603 SDRAM 64M

ADSP-BF525BBCZ-5A V+3R3D_USB_MEM
R2630 R2642
W20 Y8 1 8 USB_DATA[0]
ADDR1 DATA0
5
6
W19
Y19
ADDR2 DATA1
W8
Y7
2 7 USB_DATA[1]
1
IC2604 54
3 6 USB_DATA[2] C2653
ADDR3 DATA2 R2647 R2664
7 0.01u/16 VDD1 VSS3 53
W18 W7 4 5 USB_DATA[3] USB_DATA[0] 1 8 2 1 8 USB_DATA[15]
ADDR4 DATA3 R2644 DQ0 DQ15
8 Y18 Y6 3 52
82 68 1 8 USB_DATA[4] USB_DATA[1] 2 7 C2654 2 7 USB_DATA[14]
ADDR5 DATA4 V D D Q 1 VSSQ4
0.01u/16
W17 W6 2 7 USB_DATA[5] USB_DATA[2] 3 6 4 51 3 6 USB_DATA[13]
Data Bus
ADDR6 DATA5 DQ1 DQ14
Y17 Y5 5 50
Address Bus
3 6 USB_DATA[6] USB_DATA[3] 4 5 4 5 USB_DATA[12]
W16 W5 4 5 USB_DATA[7] 47 6 49 C2661 47
ADDR8 DATA7 R2643 VSSQ1 VDDQ4 0.01u/16
Y16 Y4 1 8 68 USB_DATA[ 8] 7 48
R2631 ADDR9 DATA8 R2648 DQ3 DQ12 R2665
8 W15 W4 2 7 USB_DATA[9] USB_DATA[4] 1 8 8 47 1 8 USB_DATA[11]
7 Y15 Y3 3 6 USB_DATA[10] USB_DATA[5] 2 7 C2655 9 46 2 7 USB_DATA[10]
ADDR11 DATA10 VDDQ2 VSSQ3
0.01u/16
6 W14 W3 4 5 USB_DATA[11] USB_DATA[6] 3 6 10 45 3 6 USB_DATA[9]
ADDR12 DATA11 R2645 DQ5 DQ10
5 Y14 Y2 68 1 8 USB_DATA[12] USB_DATA[7] 4 5 11 44 4 5 USB_DATA[ 8]
82 W13 W2 2 7 USB_DATA[13] 47 12 43 C2662 47
ADDR14 DATA13 VSSQ2 VDDQ3 0.01u/16
Y13 W1 3 6 USB_DATA[14] 13 42
W12 V1 4 5 USB_DATA[15] C2656 14 41
GNDD
Y12
ADDR16
ADDR17
DATA15
68 USB_S_ABE[0]
R2651 0.01u/16
15
VDD2
LDQM
VSS2
NC2
40 B
R2652
W11 47 16 39 R2662
USB_S_WE 1 8 USB_S_ABE[1]
ADDR18 WE UDQM
Y11 USB_S_CAS 2 7 17 38 47 USB_S_CLK
ADDR19 CAS CLK
3 K20 J19 18 37 R2663
USB_S_RAS 3 6 USB_S_CKE
CLKOUT AMS0 RAS CKE
68
P20 K19 19 36 47
SDRAM Controller
USB_S_MS 4 5
SCKE AMS1 R2650 CS NC1 R2660
5 R19 M19 20 35
USB_ADRS[18] 1 8 47 1 8 USB_ADRS[12]
SMS AMS2 BA0 A11
AMC
6 T19 L20 21 34
USB_ADRS[19] 2 7 2 7 USB_ADRS[10]
SRAS AMS3 BA1 A9
7 U20 N19 22 33
USB_S_SA10 3 6 3 6 USB_ADRS[9]
SCAS AWE A10/AP A8
8 T20 M20 23 32
82 USB_ADRS[1] 4 5 4 5 USB_ADRS[ 8]
SWE ARE R2649 A0 A7 R2666
2629 V19 N20 24 31
USB_ADRS[2] 1 8 47 47 1 8 USB_ADRS[7]
ABE0/SDQM0 AOE A1 A6
5 V20 P19 USB_ADRS[3] 2 7 25 30 2 7 USB_ADRS[6]
ABE1/SDQM1 ARDY A2 A5
6 U19 USB_ADRS[4] 3 6 26 29 3 6 USB_ADRS[5]
SA10 A3 A4
7 4 5 C2657 27 28 4 5
VDD3 VSS1
8 47 0.01u/16 47
82
M12L64164A-5TG2Y
GNDD GNDD
GNDD
C
V+5VBUS
R2657
0
STBY SR
V+5D
IC2605
5 VCC 1
R2670
R2661
0
2
R2656 4 3 NM
GND
NM
NM
USB UCOM
C2666
C2667
C2668
C2650
C2651
C2652
C2658
C2659
C2663
R2659
NM
NM
NM
NM
NM
NM
NM
NM
NM
NM CN2602
IC2603 AKM1276-A
ADSP-BF525BBCZ-5A 14 1 GND_USB
F
GNDD
A19 E19 2 GND_USB
USB_XI USB_VBUS
A18 3 D-USB
USB_XO USB_D+ 4 4 L2601
3 3
E20 4 D+USB
D20
USB_RSET UDB2.0 HS OTG
USB_DP
USB_DM
F20
STBY
USB_D- 1 1 2 2
5 V+5VBUS CN3801 D
ATH7015-A STBY
1000p/50
0.01u/16
C2671
C2670
D2601
C2664
C2665
H19 C20
1-92
NM
NM
NM
USB_VREF USB_ID
1-91
C2649
0.1u/10
STBY 1-93 R2668
0
R2646
1/8W
NM
A14 R2636
GNDD USB_ID use OTG GNDD
V+3R3D_USB GNDD GND_USB
RTXI
A15 10k not use then open
RTXO USB_RSET,USB_VREF use test mode
A7
HOST_D0 GNDD not use then
HOST_D1
B7 USB_RSET opnen
A8 USB_VREF 0.1uF(GND)
HOST_D2
B8
HOST_D3
A9
HOST_D4
B9
HOST_D5
B10
HOST_D6
B11 NOTES
HOST_D7
A12 (CH1 U/D IN)
8/TACLK2
9/TACLK3
B12 : CH1 USB/DIGITAL Input Signal NM is STBY
RS1/16SS***J
A13 (CH2 U/D IN)
DBG_PORT_PH10
OST_D10
B13 : CH2 USB/DIGITAL Input Signal (D) RS1/16SS****D
debug
OST_D11 DBG_PORT_PH11 SR RS1/10SR***J

B14
OST_D12 DBG_PORT_PH12 (CH3 U/D IN) SR (D) RS1/10SR****D
OST_D13
B15
B16
DBG_PORT_PH13
STBY : CH3 USB/DIGITAL Input Signal 1/8W RS1/8SQ***J
DBG_PORT_PH14 1/8W (F) RS1/8SQ****F
(CH4 U/D IN)
OST_D14
B17 E
OST_D15
S1/TMR0
F2
DBG_PORT_PH15 V+3R3D_USB
: CH4 USB/DIGITAL Input Signal 1/4W
RN
RS1/4SA***J
RN1/16SE****D
G2 (CH1 U OUT)
K/TMRCLK
A4
: CH1 USB Output Signal
R2638
R2637
R2639
R2640
SCL (CH2 U OUT)

NM
NM
NM
NM
B4 RAB4CQ***J
SDA
V2 JTAG : CH2 USB Output Signal
TCK V+3R3D_USB
T1
(CH3 U OUT)
CN2601
TDO
TDI
R1 NM : CH3 USB Output Signal SR
CKSSYB***K
CKSRYB***K
F
F
U2 (CH4 U OUT)
CKSQYB***K
TMS
TRST
U1
1
2
V+3R3D
V+3R3D
: CH4 USB Output Signal SQ
CH CCSSCH***J
F
F
T2
EMU 3 BF_EMU CH (D) CCSSCH***D F
J20
T_WAKE0 4 BF_TMS SRCH CCSRCH***J F
R2641
5 BF_TCK SQCH CCSQCH***J F

4.7k
H20
VROUT 6 BF_TRST CFHXSQ CFHXSQ***J F
+
7 BF_TDI CEVW***M F
G19 R2635 GNDD
SS 8 BF_TDO NP CEVWNP***M F
10k +
9 GNDD HVW CEHVW***M F
GNDD
Y10 +
BMODE0
W10
10 GNDD
: Voltage measuring point HVAW CEHVAW***M
CEANP***M
F
BMODE1 CEANP F
Y9 GNDD
BMODE2
BMODE3
W9 : Waveform measuring point
8
F
R2634
V+3R3D_USB
10k

2
4
1
GNDD
D 9/19
DJM-750-K 119
5 6 7 8
1 2 3 4
10.16 MAIN ASSY (10/19)

R2889
MAIN_UCOM STBY
NM
A R2831
GN
0
V+3R3D
R2807
C2812
0.1u/10
10k
IC2802 High LED
1 8
CS VCC Low LED
R2806 2 SO/SIO1 7 GNDD
22 3 HOLD 6
WP SCLK
4 GND 5
SI/SIO0
DYW1828- /J
MX25L4006EM2I-12G-K
GNDD FOR USB UCOM
D 1/19
From BOARD_IF EFX_ON/OFF
1:4B
V+3R3D
R2823
22
V+3R3E_M
V+3R3D
R2879
10k
R2822
10k
R2825
R2817
R2828
22
10k
10k
GNDD
DSP_USB_WP
D 11/19 11:13J
DSP_USB_CS
11:13J
R2878
100
STBY
100
DSP_USB_SO
22
22
From To FPGA 11:13J
DSP_USB_SI 16:2E
R2819
R2820
R2821
11:13J
D 16/19 ATT_SEL_3dB
R2829
C DSP_USB_CLK
R2826
Q3402
22
11:13K
NM
LTC024EEB C2814
To MASTER1
R2830
16:2E 1000p/50
22
V+3R3D ATT_SEL_6dB C2815
1000p/50
R2802
ATT_SEL_3dB HI LOW HI LOW
D 1/19
10k
(IC2803 81pin) (LOW) (HI) (LOW) (HI) Q3403

LTC024EEB
ATT_SEL_6dB HI HI LOW LOW GNDD
80
79
78
77
76
75
74
73
72
71
RETURN_IN (IC2803 82pin) (LOW) (LOW) (HI) (HI)
From BOARD_IF 1:7G
STBY
Master1 & 2
Output Level
0dB
X1.00
-3dB
X0.71
-6dB
X0.50
No USE 81
C2803
NM
82
P120/INTP0/EXLVI
P140/PCLBUZ0/INTP6
P141/PCLBUZ1/INTP7
P142/xSCK20/SCL2
R2812 83 P47/INTP2
22 P46/INTP1/TI05/TO05
R2813 84
STBY V+3R3E P45/SO01
22
85
CN2802 GNDD
NM MAIN_CPU_RESET_2 MAIN_CPU_RESET R2814 86
P44/SI01
P43/xSCK01
22
R2810 10k 87
V+3R3D 1 P42/TI04/TO04
R2880
88
debugger
RESET_OUT 2 P41/TOOL1
R2881
0 89
RESET_IN 3 P40/TOOL0
R2882 R2811 10k
0 R2872 C2813 90
RxD 4 xRESET
R2883 100
0 91
FLMDO 5
R2884 0.01u/16
P124/XT2 U
0 92
CLK_IN 6 P123/XT1 L
0 93 FLMD0
GNDD 7 P122/X2/EXCLK
94 P121/X1
RESET_OUT V+3R3E_M REGC
P31/TI03/TO03/INTP4
GNDD Oscillator 95 VSS
EVSS0
D C2809 96 VDD
R2801
1-3 EVDD0
47k
1u/10 97
R2805
RESET IC R2803 SR
NM STBY 98
P65/xWR0
P66/xWR1
P61/SDA0
P67/ASTB
P60/SCL0
C2810
P64/xRD
S-80927CNMC-G8X 470k
1-4 20MHz
CSS1795-A V+3R3E V+3R3E_M
0.1u/10 99
R2804
IC2801 X1 100
P62
P63
0
V+3R3E_M GND1
1 5 2 1 R2808 C2811
OUT CD
10
2 0.1u/10
0.01u/16
0
C2802
DCH1201-A
VDD X2 GND2 STBY

1 0 u 10V
3 4 3 4
C2801
C2808
1u/10
C2806
C2807
VSS NC X2801
NM
NM
SR
CH ( D )
C2804
C2805
CH ( D )
6p/50
6p/50
D 11/19 GNDD
GNDD
8
7
5
FPGA_XINIT GNDD
R2827
11:13K V+3R3E_M
From FPGA
20MHz MAIN
0
FPGA_DONE
11:13K;15:7B
4
1
R2816
10k
GNDD
From BOARD_IF POWER_RESET_A
1:9B MCPU_ASTB
D 1/19
1
4
MCPU_WR0
R2824
MCPU_RD
22
1-4pin INPUT SELECT SIGNAL V+3R3D

5
7
8
(open drain output) R2818
E LINE_SEL* INPUT 5 4
CH1/CH4 PHONO 6 3
LOW
CH2/CH3 LINE 7 2
8 1
HI CH1-4 CD/LINE 2.2k
LINE_SEL1
LINE_SEL2
LINE_SEL3
LINE_SEL4
STBY
V+3R3D
R2809
NM
D2801
NM
Q2801
V+3R3E NM
D 2/19 Q2804
LTA024EEB
GNDD
RELAY_CONT
F To POWER_IF 2:3B
Q2803
LTC024EEB
R2873
10k
CPU_MUTE
D 15/19
D 10/19 To OUTPUT IF CPU_MUTE
15:2F
GNDD
120 DJM-750-K
1 2 3 4
5 6 7 8
STBY_KEY
1:4B
To BOARD_IF D 1/19
D 10/19
R2889
STBY R2890
MAIN ASSY (DWX3430)

MIDI_TXD
1:7H
NM
FPGA_xPGM
To USB_UCOM D 9/19
0
R2831
GNDD MIDI_TXD_USB
9:2J
A
0
SUB_INT
1:4D From BOARD_IFD 1/19
FPGA_XPGM
To FPGA D 11/19
11:2B
FPGA_RESET
11:13K
Q2802
STBY_LED
1:4B To BOARD_IF D 1/19
LTC024EEB
High LED ON
Low LED OFF
GNDD AD/DA_RESET
D 14/19
DIT_RESET
14:2B
DOUT_SRC_RESET
To DIGITAL OUT
14:2D
To DSP
D 13/19
DSP_RESET
13:2B
V+3R3D
VR_FADER1
1:4E
VR_FADER2
1:4E
VR_FADER_CRS
1:4E
D 1/19 C2833
0.1u/10
From BOARD_IF 1-30

VR_FADER3 IC2804
B
1:4D
D 4/19,6/19 1
2
VCC
14
13
D 2/19,5/19,7/19
VR_FADER4 To CH1 ADC 13AD_RESET
R2876 3 12
1:4D
CH3 ADC 4:10F;6:10F 100 4 11 R2874
24AD_RESET To CH2 ADC
5 10 100
2:2E;5:10F;7:10F
CH4 ADC
R2877 6 9
DA_RESET
8
7
To OUTPUT IF
390
390
100
390
390
R2871
15:2C;19:2C
100 7 8 R2875
HP-MIC-RE_RESET To MIC/RET ADC
22
GND
V+3R3D
1:6C;8:11C;8:5C
BOARD_IF
D 15/19,19/19 100
R2849
R2851
R2852
R2853
R2854
2
3
4
1
C2819
TC74VHC08FK
D 1/19,8/19
R2823
GNDD
22
V+3R3E C2820 470p/50

V+3R3E_M
1-55 1-41
V+3R3D
C2821 470p/50
R2879
STBY
10k
C2822 470p/50
R2885
R2887
NM
NM
C2823 470p/50
R2822
10k
470p/50
R2825
R2817
R2828
22
10k
10k
V+3R3D_REFA V+3R3D
60 & 61 pin are the identification ports
R2886
R2888
GNDD
10k
10k
L2802
R2843 NM
for the additional model.
GNDD V+3R3D_REFA_0
STBY
4 5 60pin 61pin Model name
R2878
L2801
100
STBY
100
22
22
3 6
LOW LOW DJM-750-K,DJM-750-S (Original model)
33u
2 7
R2819
R2820
R2821
LCTAW330J2520 LOW HI Nothing (Standby)

C2831
C2832
0.1u/10
NM
R2829
R2834
R2862
DBG_PORT_P21
DBG_PORT_P26
DBG_PORT_P27
1 8
STBY
C
R2826
10k
22
22
HI LOW Nothing (Standby)

DBG_PORT2
0
NM
814
GNDD
HI HI Nothing (Standby)
R2830
R2832
p/50
22
22
815 R2870
0
p/50
GNDREF_A
R2842
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
10k R2865
D 2/19
AVSS
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7
P150/ANI8
P151/ANI9
P152/ANI10
P153/ANI11
P154/ANI12
P155/ANI13
P156/ANI14
P157/ANI15
81 50 10k
82 49 GNDD VDET
P120/INTP0/EXLVI 2:11B From POWER_IF
P140/PCLBUZ0/INTP6
P141/PCLBUZ1/INTP7
P142/xSCK20/SCL2
P143/SI20/RxD2/SDA2
P144/SO20/TxD2
P145/TI07/TO07
P00/TI00
P01/TO00
P02/SO10/TxD1
P03/SI10/RxD1/SDA1
P04/xSCK10/SCL1
P131/TI06/TO06
P20/ANI0
P21/ANI1
P22/ANI2
P130
D 9/19
83 P47/INTP2 48
P46/INTP1/TI05/TO05
R2861
USB_ERR_MAIN
9:2J From USB_UCOM
84 47
P45/SO01
46 0 R2866
85 FPGA_SCK
To FPGA
86
87
P44/SI01
P43/xSCK01
AVREF0
P111/ANO1
P110/ANO0
AVREF1
45
44
R2841
R2867
22
22
11:13K
USB_RESET
9:2K
FPGA_SO
To USB_UCOM D 11/19
P10/EX24/xSCK00 To FPGA
88
89
P42/TI04/TO04
P41/TOOL1
IC2803
P11/EX25/Si00/RxD0
P12/EX26/SO00/TxD0
P13/EX27/TxD3
43
42
R2868 22
22
11:13K
USB_SO
9:2J
USB_SI
D 9/19
90
P40/TOOL0
xRESET
DYW1827- /J P14/EX28/RxD3
P15/EX29/RTCDIV/RTCCL
41 R2869
9:2J
USB_RCV
9:2J From To USB_UCOM D 11/19
91 40 22 USB_REQ
UCOM UPD78F1166AGF-GAS-K
D 9/19
P124/XT2 P16/EX30/TI01/TO01/INTP5 9:2J
92 39
HWAIT
P123/XT1 Label VRW1773- P17/EX31/TI02/TO02
9:2I
93 FLMD0 38
P30/INTP3/RTC1HZ
P122/X2/EXCLK P57/EX15
94 P121/X1
REGC MAIN_UCOM P56/EX14
37
P77/EX23/KR7/INTP11
P76/EX22/KR6/INTP10
P31/TI03/TO03/INTP4
P75/EX21/KR5/INTP9
P74/EX20/KR4/INTP8
95 VSS 36
EVSS0 P55/EX13
96 VDD
EVDD0 P54/EX12
35 D
P84/EX4
P85/EX5
P86/EX6
P87/EX7
34
P73/EX19/KR3
P72/EX18/KR2
P71/EX17/KR1
P70/EX16/KR0
EVDD1
97
P05/CLKOUT
P53/EX11
33
P06/xWAIT
98 P52/EX10
P65/xWR0
P66/xWR1
P61/SDA0
P67/ASTB
P60/SCL0
P64/xRD
P80/EX0
P81/EX1
P82/EX2
P83/EX3
99 P51/EX9 32
EVSS1
P50/EX8
100 31
P62
P63
NOTES
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
C2829
8
7
6
5
7
6
8
7
8
7
6
5
0.1u/10
R2835
R2845
R2863
R2864
1/8W RS1/8SQ***J
1000p/50
22
C2817
0
8
7
6
5
R2827
R3E_M GNDD 1/8W (F) RS1/8SQ****F

2
3
4
3
4
4
1
1
0
8
7
6
R2856
1/4W RS1/4SA***J
R2850
10k
2
3
4
1
RN RN1/16SE****D
10k
3
4
1
GNDD
MCPU_DATA[10]
MCPU_DATA[11]
MCPU_DATA[12]
MCPU_DATA[13]
MCPU_DATA[14]
MCPU_DATA[15]
MCPU_DATA[0]
MCPU_DATA[1]
MCPU_DATA[2]
MCPU_DATA[3]
MCPU_DATA[4]
MCPU_DATA[5]
MCPU_DATA[6]
MCPU_DATA[7]
MCPU_DATA[8]
MCPU_DATA[9]
RAB4CQ***J
R2839
MCPU_ASTB
1
4
3
2
MCPU_WR0
R2824
R2833
22
MCPU_RD
22
22
D 11/19 CKSSYB***K F
5
6
7
8
SR CKSRYB***K F
MCPU_BUS
From To FPGA SQ CKSQYB***K F
4 11:2B
E
R2855
CH CCSSCH***J F
22
3
CH (D) CCSSCH***D F
2 STBY
SRCH CCSRCH***J F
C2830
1
NM
SQCH CCSQCH***J F
LINE_SEL1
LINE_SEL2
LINE_SEL3
LINE_SEL4
CFHXSQ CFHXSQ***J F
+
GNDD D 1/19 NP
+
CEVW***M
CEVWNP***M
F
F
CH_SELECT
1:7G
To BOARD_IF HVW
+
CEHVW***M F
HVAW CEHVAW***M F
CEANP CEANP***M F
3R3D
NM
D2801
NM
SUB_CPU_RESET
1:4D
D 1/19
To BOARD_IF
SUB_CTRL
1:4D
NDD
V+1R2D_CONT
3:9B
V+3R3D_CONT
3:9C
D 3/19 The check point for service. F
V+5D_CONT
3:9E To POWER ***** (Legend silk indication on the PCB.)
V+34D_CONT
3:2H
1-71 D 10/19
DJM-750-K 121
5 6 7 8
1 2 3 4
10.17 MAIN ASSY (11/19)

V+3R3D V+3R3D_FPGA
1-5 V+1R2D V+1R2D_FPGA
F3001 1-6
FPGA R3037
DTL1106-A
1 3
CCH1565-A
DCH1201-A
DCH1201-A
NM
1 0 0 u 16V
10V
A
C3034
C3035
C3036
C3037
C3038
C3040
C3042
10u 10V
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
C3019
C3020
C3021
C3022
C3024
C3026
C3028
C3030
C3032
100u/16
2
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
STBY
10u
GNDD GNDD
C3039
C3041
C3023
C3025
C3027
C3029
C3031
C3033
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
STBY
R3065 R3067
D 10/19 NM 0
GNDD
GNDD
From To MAIN_UCOM MCPU_BUS
10:14I
MCPU_RD
D 10/19 FPGA_XPGM
R3016
From MAIN_UCOM 10:12B

0
R3008
D 13/19 To DSP
96K_CLK_DSP
13:2G
6M_CLK_DSP
R3009 100
100
13:2G
D 14/19 To DIGITAL OUT 24M_CLK_DIGI

14:2F
6M_CLK_USB
R3019
R3020
0
To USB_UCOM 9:1F 100

R3021
B D 9/19 96K_CLK_USB
9:1F 100
STBY FPGA IC3007

6M_CLK_DIGI R3099
To DIGITAL OUT 14:2F

R3100
NM XC3S50A-4FTG256C
96K_CLK_DIGI R3034 100
D 14/19
14:2F NM
0
R3035 100
R3102
R3101
GNDD
A1
A2
A3
A4
A5
A6
D 14/19 SRC_SCK
14:2F
R3011
0
TMS
TDI
B1
B2
B3
B4
B5
B6
To DIGITAL OUT SRC_CS
14:2E
R3025 R3036 100
0
SRC SPI SRC_TXD
R3024
14:2E 0
D 14/19
C1
C2
C3
C4
C5
C6
R3038
DIT_TXD 8 1
14:2B
DIT_SCK 7 2
To DIGITAL OUT 14:2B
6 3
DIT CONTROL SPI DIT_CS 5 4
D1
D2
D3
D4
D5
D6
14:2B
C 22
MCPU_WR0
D 14/19 GNDD
E1
E2
E3
E4
E5
E6
DOUT_SRC_BCK
14:2C
From DIGTAL OUT DOUT_SRC_DATA
14:2C
Digital SRC out DOUT_SRC_LRCK
14:2C
F1
F2
F3
F4
F5
F6
D 14/19 ADAT_DOUT_FPGASRC
14:2B
FPGASRC_MCLK
R3027
R3098
22
To DIGITAL OUT 14:2B 100
G1
G2
G3
G4
G5
G6
MCPU_ASTB
FPGA SRC FPGASRC_LRCK
R3026
14:2B 100
R3023
FPGASRC_BCK
14:2B 100
H1
H2
H3
H4
H5
H6
V+3R3D R3042
MCPU_DATA[0]
C3017
MCPU_DATA[1] 5 4
J1
J2
J3
J4
J5
J6
0.1u/10
C3018 MCPU_DATA[2] 6 3
MCPU_DATA[3] 7 2
1000p/50
C3012 8 1
33
96k 100p/50 CH
K1
K2
K3
K4
K5
K6
D 1-56 IC3006
1 14
VCC
2 13
D 4/19,6/19
L1
L2
L3
L4
L5
R3046
L6
R3017 3 12
MCPU_DATA[4]
96k_CLK_13AD 100 4 11 R3033 4
5
4:10F;6:10F MCPU_DATA[5]
To CH1 ADC 6M_CLK_13AD
4:10F;6:10F
5 10 100
MCPU_DATA[6]
6 3
CH3 ADC 24M_CLK_13AD

R3018 6 9
MCPU_DATA[7]
7 2
M1
M2
M3
M4
M5
M6
4:10F;6:10F 100 7 8 R3030 1
R3053 0
8
GND 33
100 Configuration mode
M[1} High
TC74VHC08FK
1-31
D 5/19,7/19 GNDD
MCPU_DATA[8]
R3050
N1
N2
N3
N4
N5
N6
96k_CLK_24AD
5 4
5:10F;7:10F MCPU_DATA[9]
To CH2 ADC 6M_CLK_24AD

5:10F;7:10F V+3R3D
MCPU_DATA[10] 6 3
CH4 ADC 24M_CLK_24AD

5:10F;7:10F C3013
MCPU_DATA[11]
7
8
2
1
33
0.1u/10
P1
P2
P3
P4
P5
P6
C3014
Configuration mode R3054 0
1000p/50 M[2} High
C3010
6M 100p/50 CH
MCPU_DATA[12]
R3063
R2
R3
R4
R5
R6
R1
5 4
1-57 1
IC3004
14
MCPU_DATA[13]
MCPU_DATA[14]
6 3
VCC 7 2
2 13 MCPU_DATA[15]
8 1
R3012 3 12 33
T1
T2
T3
T4
T5
T6
E 100 4 11 R3031
5 10 56 M2-0 : 111
R3013 6 9
Configuration Slave Serial Mode
100 7 8 R3028 22
GND
TC74VHC08FK
1-32
R3064
GNDD
0
Configuration mode M[0} High
V+3R3D
C3015
D 15/19
R3057
0.1u/10 FADER_STOP1 8 1
C3016 15:8C
FADER_START1 7 2
1000p/50 15:8D
C3011 To BOARD IF FADER_STOP2
15:8D
6 3
D 15/19,19/19 24.576M 100p/50 CH

FADER_START2
15:8E
5 4
96k_CLK_DA 100
15:2B;19:2C
To OUTPUT IF 6M_CLK_DA
15:2B;19:2C 1-58 1
IC3005
14
1-99
SEND 24M_CLK_DA
15:2C;19:2C 2
VCC
13
R3014 3 12
R3069
22 4 11 R3032
10k
5 10 0
R3015 6 9
D 1/19,8/19 22 7
GND
8 R3029 0 : Voltage measuring point R3068
22
96k_CLK_HP-MIC-RE
F To MIC/RET ADC
1:6C;8:11C;8:5C
6M_CLK_HP-MIC-RE
1:6C;8:11C;8:5C
GNDD
TC74VHC08FK
1-33 : Waveform measuring point
BOARD IF 24M_CLK_HP-MIC-RE
1:6C;8:11C;8:5C
M
The check point for service. GNDD
D 11/19
122 DJM-750-K
1 2 3 4
5 6 7 8
1-6
D 15/19 D 11/19 MAIN ASSY (DWX3430)

DCH1201-A
R3079
A
C3037
C3038
C3040
C3042
0.1u/10
0.1u/10
0.1u/10
0.1u/10
DA_CDTI
22 15:2C
R3081 DA_CCLK
15:2C
To OUTPUT IF
22
Multi DAC control SPI
R3080
DA_CSN
22 15:2C
1-8 D 13/19
STBY
R3065 R3067 24M576_CLK_FPGA
13:2G From DSP
NM 0
DSP_SPI_CLK
GNDD 13:3B
DSP_SPI_WP
13:3B
To DSP
D 12/19
MCPU_RD
DSP_SPI_SIMO
13:3B
R3084
DSP_SPI_SOMI
DSP Boot SPI
13:3B
DSP - FPGA Bus From To DSP
D 13/19
22
DSP_SPI_CS
13:3B
Address 11bit DSP_BUS
Data 16bit 12:7A
DSPA_WE
DSPA_OE
DSPA_ADRS[2]
DSPA_ADRS[1]
DSPA_ADRS[6]
DSPA_ADRS[5]
DSPA_ADRS[7]
DSPA_ADRS[4]
DSPA_ADRS[0]
DSPA_ADRS[3]
DSPA_ADRS[8]
DSPA_ADRS[9]
DSPA_ADRS[10]
FDSP_DATA[9]
FDSP_DATA[2]
FDSP_DATA[0]
FDSP_DATA[8]
FDSP_DATA[10]
DSPA_CS_FPGA
DSPA_WE
DSPA_OE
DSPA_ADRS[3]
DSPA_ADRS[2]
R3070
DSPA_ADRS[1]
B
0
DSPA_ADRS[0]
DSPA_ADRS[7]
DSPA_ADRS[6]
DSPA_ADRS[5]
DSPA_ADRS[4]
TCK
DSPA_ADRS[10]
DSPA_ADRS[9]
A10
A11
A12
A13
A14
A15
A16
A4
A5
A6
A7
A8
A9
DSPA_ADRS[8]
TDO
R3093
FDSP_DATA[9] 8 1 DSPA_DATA[9]
B10
B11
B12
B13
B14
B15
B16
B4
B5
B6
B7
B8
B9
C10
C11
C12
C13
C14
C15
C16
33
C4
C5
C6
C7
C8
C9
R3094
D10
D11
D12
D13
D14
D15
D16
D4
D5
D6
D7
D8
D9
FDSP_DATA[4]
FDSP_DATA[6] 33
C
R3095
E10
E11
E12
E13
E14
E15
E16
E4
E5
E6
E7
E8
E9
DSPA_CS_FPGA FDSP_DATA[6] 6 3 DSPA_DATA[6]
33
F10
F11
F12
F13
F14
F15
F16
F4
F5
F6
F7
F8
F9
R3096
G10
G11
G12
G13
G14
G15
G16
G4
G5
G6
G7
G8
G9
33
FDSP_DATA[14]
FDSP_DATA[1]
FDSP_DATA[3]
D 13/19
H10
H11
H12
H13
H14
H15
H16
H4
H5
H6
H7
H8
H9
ADAT_DOUT_FPGA
FDSP_DATA[11] 13:13H From DSP
FDSP_DATA[12] Digital out Audio data
FDSP_DATA[5]
J10
J11
J12
J13
J14
J15
J16
J4
J5
J6
J7
J8
J9
FDSP_DATA[15]
FDSP_DATA[7]
FDSP_DATA[13]
K12
K13
K14
K15
K16
K10
K11
K4
K5
K6
K7
K8
K9
D
L10
L11
L12
L13
L14
L15
L16
L4
L5
L6
L7
L8
L9
D 1/19
M10
M11
M12
M13
M14
M15
M16
M4
M5
M6
M7
M8
M9
SUB_UCOM
1:4C From To BOARD_IF
R3089 0 FPGA_CLK
N10
N11
N12
N13
N14
N15
N16
N4
N5
N6
N7
N8
N9
R3090 100 FPGA_RXD_DAT

R3091 0 FPGA_TXD_DAT
NOTES
P10
P11
P12
P13
P14
P15
P16
P4
P5
P6
P7
P8
P9
NM is STBY
R3092 0 FPGA_SIGNAL
RS1/16SS***J
(D) RS1/16SS****D
R10
R11
R12
R13
R14
R15
R16
SR RS1/10SR***J
R4
R5
R6
R7
R8
R9
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F
1/4W RS1/4SA***J
T10
T11
T12
T13
T14
T15
T16
T4
T5
T6
T7
T8
T9
GNDD RN RN1/16SE****D E
RAB4CQ***J
CKSSYB***K F
10k
R3082
R3083
R3076
R3097
0.01u/16
CKSRYB***K
10k
SR F
C3044
22
100
0
debug L08N
SQ CKSQYB***K F
R3075
1-7 CH CCSSCH***J
CCSSCH***D
F
D 10/19
CH (D) F
GNDD
SRCH CCSRCH***J F
DSP_USB_WP
10:2E SQCH CCSQCH***J F
R3085
22
DSP_USB_SI
10:2E From To MAIN_UCOM CFHXSQ
+
CFHXSQ***J F
DSP_USB_SO
10:2E USB_UCOM Boot CEVW***M F
DSP_USB_CS
10:2E
& NP CEVWNP***M F
+
DSP_USB_CLK Serial Flash Write HVW CEHVW***M F
10:2E +
HVAW CEHVAW***M F
V+3R3D
FPGA_DONE CEAN P CEANP***M F
10:2H;15:7B
FPGA_SO
R3069
C3043
0.1u/10
10:14F
R3072
10k
IC3008
22
FPGA_SCK
1
CS VCC
8 10:14F
From To MAIN_UCOM
R3068
22
2 SO/SIO1
HOLD
7
GNDD
FPGA_RESET FPGA Configulation
3 6 FPGA_RESET
D 10/19,15/19
WP SCLK 10:12B
R3039
4
GNDSI/SIO0
5
5 4
FPGA_XINIT
10:2H
F
DYW1829- /J 6 3
MX25L4006EM2I-12G-K R3078
USB_MOSI
GNDD FOR DSP 7 2 22
9:2J
From To USB_UCOM
8 1 R3077
22 USB_SCK SPI Boot program
D 11/19
9:2I
22
USB_MISO
9:2I
D 9/19
DJM-750-K 123
5 6 7 8
1 2 3 4
10.18 MAIN ASSY (12/19)
DSP_1 DSP
A
DSP_BUS
11:16B F
IC3201
D810K013DZKB400
R3207
DSPA_DATA[2] 1 8 T13 R8
EMA_D[0]/MMCSD_DAT[0]/UHPI_HD[0]/GP0[0]/BOOT[12] EMA_BA[0]/GP1[14] R3211
DSPA_DATA[0] 2 7 R15 P8 1 8 DSPA_ADRS[0]
EMA_D[1]/MMCSD_DAT[1]/UHPI_HD[1]/GP0[1] EMA_BA[1]/UHPI_HHWIL/GP1[13]
DSPA_DATA[10] 3 6 R13 2 7 DSPA_ADRS[3]
EMA_D[2]/MMCSD_DAT[2]/UHPI_HD[2]/GP0[2]
DSPA_DATA[9] 4 5 P15 T9 3 6 DSPA_ADRS[4]
R3204 EMA_D[3]/MMCSD_DAT[3]/UHPI_HD[3]/GP0[3] EMA_A[0]/GP1[0]
DSPA_DATA[5] 1 8 33 P13 R9 4 5 DSPA_ADRS[7]
EMA_D[4]/MMCSD_DAT[4]/UHPI_HD[4]/GP0[4] EMA_A[1]/MMCSD_CLK/UHPI_HCNTL0/GP1[1]
DSPA_DATA[13] 2 7 N15 P9 33
EMA_D[5]/MMCSD_DAT[5]/UHPI_HD[5]/GP0[5] EMA_A[2]/MMCSD_CMD/UHPI_HCNTL1/GP1[2] R3216
DSPA_DATA[7] 3 6 N13 N9 1 8 DSPA_ADRS[5]
EMA_D[6]/MMCSD_DAT[6]/UHPI_HD[6]/GP0[6] EMA_A[3]/GP1[3]
DSPA_DATA[15] 4 5 M15 T10 2 7 DSPA_ADRS[6]
EMA_D[7]/MMCSD_DAT[7]/UHPI_HD[7]/GP0[7]/BOOT[13] EMA_A[4]/GP1[4]
33 R10 3 6 DSPA_ADRS[1]
R3208 EMA_A[5]/GP1[5]
DSPA_DATA[1] 1 8 N12 P10 4 5 DSPA_ADRS[2]
EMA_D[8]/UHPI_HD[8]/GP0[8] EMA_A[6]/GP1[6]
DSPA_DATA[3] 2 7 T14 N10 33
EMA_D[9]/UHPI_HD[9]/GP0[9] EMA_A[7]/GP1[7] R3212
R14 T11 1 8 DSPA_ADRS[8]
DSPA_DATA[11] 3 6
EMIFA
P16 R11 2 7 DSPA_ADRS[9]
DSPA_DATA[12] 4 5
R3201 EMA_D[11]/UHPI_HD[11]/GP0[11] EMA_A[9]/GP1[9]
DSPA_DATA[14] 1 P14 N8 3 6 DSPA_ADRS[10]
8 33
STBY
B DSPA_DATA[4] 2 7 N16
P11 4 5
DSPA_DATA[6] 3 6 N14 N11 33

EMA_D[14]/UHPI_HD[14]/GP0[14] EMA_A[12]/GP1[12] V+3R3D_DSP
DSPA_DATA[8] 4 5 M16
EMA_D[15]/UHPI_HD[15]/GP0[15]
R12
R3227
33 GNDD
EMA_CLK/OBSCLK/AHCLKR2/GP1[15]
NM
N6 T12
EMA_WAIT[0]/UHPI_HRDY/GP2[10] EMA_SDCKE/GP2[0]
T8
V+3R3D_DSP EMA_CS[0]/UHPI_HAS/GP2[4]
P7
EMA_CS[2]/UHPI_HCS/GP2[5]/BOOT[15] D320
R3210 T7 R3213 33 DSPA_CS_FPGA NM
EMA_CS[3]/AMUTE2/GP2[6]
10k N7
EMA_RAS/EMA_CS[5]/GP2[2]
L16
Q3201
EMA_CAS/EMA_CS[4]/GP2[1]
NM
M13 R3214 33 DSPA_WE
EMA_WE/UHPI_HRW/AXR0[12]/GP2[3]/BOOT[14]
M14
EMA_WE_DQM[0]/UHPI_HINT/AXR0[15]/GP2[9]
P12
EMA_WE_DQM[1]/UHPI_HDS2/AXR0[14]/GP2[8] GNDD
R7 R3215 33 DSPA_OE
EMA_OE/UHPI_HDS1/AXR0[13]/GP2[7]
C
IC3201 R3217
DSP D810K013DZKB400 1 8 DSPB_RAS
2 7 DSPB_CS_SDRAM
R3205
DSPB_DATA[3] 1 8 F16 C9 3 6 DSPB_BA[0]
EMB_D[0]/GP6[0] EMB_BA[0]/GP7[1]
DSPB_DATA[2] 2 7 G13 B9 4 5 DSPB_BA[1]
EMB_D[1]/GP6[1] EMB_BA[1]/GP7[0] R3221
DSPB_DATA[1] 3 6 G16 82 1 8 DSPB_ADRS[10
EMB_D[2]/GP6[2]
DSPB_DATA[0] 4 5 H13 D10 2 7 DSPB_ADRS[0
R3202 EMB_D[3]/GP6[3] EMB_A[0]/GP7[2]
DSPB_DATA[7] 1 8 68 H16 C10 3 6 DSPB_ADRS[1
EMB_D[4]/GP6[4] EMB_A[1]/GP7[3]
DSPB_DATA[6] 2 7 J13 B10 4 5 DSPB_ADRS[2
EMB_D[5]/GP6[5] EMB_A[2]/GP7[4] R3218
DSPB_DATA[5] 3 6 J15 A10 1 8 82 DSPB_ADRS[3
EMB_D[6]/GP6[6] EMB_A[3]/GP7[5]
DSPB_DATA[4] 4 5 J16 D11 2 7 DSPB_ADRS[4
R3206 EMB_D[7]/GP6[7] EMB_A[4]/GP7[6]
DSPB_DATA[11] 68 1 8 C16 C11 3 6 DSPB_ADRS[5
EMB_D[8]/GP6[8] EMB_A[5]/GP7[7]
DSPB_DATA[10] 2 7 D13 B11 4 5 DSPB_ADRS[6
EMB_D[9]/GP6[9] EMB_A[6]/GP7[8] R3222
DSPB_DATA[9] 3 6 D14 A11 82 1 8 DSPB_ADRS[7
EMB_D[10]/GP6[10] EMB_A[7]/GP7[9]
DSPB_DATA[8] 4 5 D15 D12 2 7 DSPB_ADRS[8
R3203 EMB_D[11]/GP6[11] EMB_A[8]/GP7[10]
DSPB_DATA[15] 1 8 68 D16 C12 3 6 DSPB_ADRS[9
EMB_D[12]/GP6[12] EMB_A[9]/GP7[11]
DSPB_DATA[14] 2 7 E13 A9 4 5 DSPB_ADRS[11
EMIFB
EMB_D[13]/GP6[13] EMB_A[10]/GP7[12]
DSPB_DATA[13] 3 6 E16 B12 82
EMB_D[14]/GP6[14] EMB_A[11]/GP7[13]
DSPB_DATA[12] 4 5 F13 B15
EMB_D[15]/GP6[15] EMB_A[12]/GP3[13]
68 G15
EMB_D[16]
D H14
EMB_D[17] EMB_CLK
C14 R3220
R3223
DSPB_BUS_CLK
H15 C13 33
1 8 DSPB_ADRS[12
EMB_D[18] EMB_SDCKE
J14 D9 2 7
EMB_D[19] EMB_CS[0]
K13 A8 3 6 DSPB_BUS_CKE
EMB_D[20] EMB_RAS
K16 L13 4 5 DSPB_UDQM_SDRAM
EMB_D[21] EMB_CAS R3219
L14 K15 1 8 82 DSPB_LDQM_SDRAM
EMB_D[22] EMB_WE
L15 K14 2 7 DSPB_WE
EMB_D[23] EMB_WE_DQM[0]/GP5[15]
A13 C15 3 6 DSPB_CAS
EMB_D[24] EMB_WE_DQM[1]/GP5[14]
B14 B13 4 5
EMB_D[25] EMB_WE_DQM[2]
A14 A12 82
EMB_D[26] EMB_WE_DQM[3]
E14
EMB_D[27]
E15 GNDD
EMB_D[28]
F14
EMB_D[29]
F15
EMB_D[30]
G14
EMB_D[31]
NOTES
NM is STBY
E RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F
1/4W RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
CKSQYB***K
: Voltage measuring point SQ
CH CCSSCH***J
F
F
CCSSCH***D
: Waveform measuring point CH (D)
SRCH CCSRCH***J
F
F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
F CEVW***M F
NP CEVWNP***M F
+
HVW CEHVW***M F
+
HVAW CEHVAW***M F
D 12/19
CEANP CEANP***M F
124 DJM-750-K
1 2 3 4
5 6 7 8
DSP_BUS
From To FPGA
11:16B
D 11/19
DRS[0]
DRS[3]
DRS[4]
DRS[7]
DRS[5]
V+3R3D_DSP V+3R3D_DSP_MEM
SDRAM 256M
R3226
DRS[6]
DCH1201-A
DRS[1] STBY 0
10u 10V
C3242
C3241
NM
DRS[2]
DRS[8]
IC3202
DRS[9] C3243 1 54
R3225 0.01u/16 VDD1 VSS3 53 R3228
RS[10] DSPB_DATA[0] 2 DSPB_DATA[15]
1 8 1 8
DQ0 DQ15
STBY DSPB_DATA[1] 2 7 C3244
0.01u/16
3
V D D Q 1 VSSQ4
52 2 7 DSPB_DATA[14] B
DSPB_DATA[2] 3 6 4 51 3 6 DSPB_DATA[13]
V+3R3D_DSP DQ1 DQ14
DQ2 DQ13
6 49
R3227
47 C3248 47
V S S Q 1 VDDQ4
NM
0.01u/16
7 48
R3224 DQ3 DQ12 R3229
DQ4 DQ11
DSPB_DATA[5] 2 7 C3245 9 46 2 7 DSPB_DATA[10]
D3201 0.01u/16 VDDQ2 VSSQ3
_FPGA NM DSPB_DATA[6] 6 10 45 6 DSPB_DATA[9]
3 3
DQ5 DQ10
DQ6 DQ9
47 12 43 47
Q3201 C3249
VSSQ2 VDDQ3 0.01u/16
NM
A_WE 13 42
DQ7 DQ8
C3246 14 41
0.01u/16 VDD2 VSS2
DSPB_LDQM_SDRAM 15 40
GNDD LDQM NC
A_OE DSPB_WE 16 39 DSPB_UDQM_SDRAM
WE UDQM
DSPB_CAS 17 38 DSPB_BUS_CLK
CAS CLK
DSPB_RAS 18 37 DSPB_BUS_CKE
RAS CKE
DSPB_CS_SDRAM 19 36 DSPB_ADRS[12]
CS A12
DSPB_BA[0] 20 35 DSPB_ADRS[11]
BA0 A11
DSPB_BA[1] 21 34 DSPB_ADRS[9]
BA1 A9
DSPB_ADRS[10] 22 33 DSPB_ADRS[8]
A10/AP A8
A0 A7
DSPB_ADRS[1] 24
A1 A6
31 DSPB_ADRS[6] C
A2 A5
DSPB_RAS DSPB_ADRS[3] 26 29 DSPB_ADRS[4]
A3 A4
DSPB_CS_SDRAM C3247 27 28
0.01u/16 VDD3 VSS1
DSPB_BA[0]
M12L2561616A-5TG2A
DSPB_BA[1]
3221
8 DSPB_ADRS[10]
7 DSPB_ADRS[0]
GNDD
6 DSPB_ADRS[1]
5 DSPB_ADRS[2]
82 DSPB_ADRS[3]
DSPB_ADRS[4]
DSPB_ADRS[5]
3222
8
DSPB_ADRS[6]
DSPB_ADRS[7]
DSP
7
6
DSPB_ADRS[8]
DSPB_ADRS[9]
V+3R3D V+3R3D_DSP IC3201
5 DSPB_ADRS[11]
1-9 D810K013DZKB400
R3209
82 B16 A1
DVDD1 Vss1
NM E5 A2
DVDD2 Vss2
C3263 0.01u/16
0.01u/16
C3210 0.01u/16
C3211 0.01u/16
C3213 0.01u/16
C3215 0.01u/16
C3217 0.01u/16
C3219 0.01u/16
C3221 0.01u/16
C3223 0.01u/16
C3225 0.01u/16
C3227 0.01u/16
C3229 0.01u/16
C3231 0.01u/16
C3233 0.01u/16
C3235 0.01u/16
C3237 0.01u/16
0.01u/16
STBY
470p/50
E8 A3
C3207 0.1u/10
DVDD3 Vss3
3223
DSPB_BUS_CLK E9
DVDD4 Vss4
A15 D
C3201
C3203
0.1u/10
47u/6.3
8 DSPB_ADRS[12] E12 A16

DVDD5 Vss5
C3205
C3262
C3209
7 F5 B2
DVDD6 Vss6
6 DSPB_BUS_CKE F11 B3
DVDD7 Vss7
5 DSPB_UDQM_SDRAM F12 E6
DVDD8 Vss8
82 DSPB_LDQM_SDRAM G5 E7
DVDD9 Vss9
DSPB_WE G12 E10
GNDD
DVDD10 Vss10
DSPB_CAS K5 E11
DVDD11 Vss11
K12 F8
DVDD12 Vss12
L5 F9
DVDD13 Vss13
L11 F10
DVDD14 Vss14
L12 G8
DVDD15 Vss15
M5 G9
DVDD16 Vss16
M8 H8
DVDD17 Vss17
Power Supply
M9 H9
DVDD18 Vss18
M12 J8
DVDD19 Vss19
R1 J9
V+1R2D V+1R2D_DSP DVDD20 Vss20
F3201 1-10 R16

DVDD21 Vss21
K8
K9
DTL1106-A
Vss22
1 3 F6 L7
CVDD1 Vss23
G6 L8
2
CVDD2 Vss24
E
C3214 1000p/50
C3216 1000p/50
C3218 1000p/50
C3220 1000p/50
C3222 1000p/50
C3224 1000p/50
C3226 1000p/50
C3228 1000p/50
C3230 1000p/50
C3232 1000p/50
C3234 1000p/50
C3236 1000p/50
1000p/50
470p/50
G7 L9
C3208 0.1u/10
CVDD3 Vss25
G10 L10
CVDD4 Vss26
C3202
C3204
0.1u/10
100u/4
G11 M6
CVDD5 Vss27
C3206
C3212
H6 M7
CVDD6 Vss28
H7 M10
CVDD7 Vss29
H10 M11
CVDD8 Vss30
H11 T1
CVDD9 Vss31
H12 T2
GNDD CVDD10 Vss32
J6 T15
CVDD11 Vss33
J7 T16
CVDD12 Vss34
J10
CVDD13 GNDD
J11
CVDD14
J12
CVDD15 V+1R2D_DSP
K6
CVDD16
K7 D1 L3201
CVDD17 PLL0_VDDA
K10 E1 CTF1823-A
CVDD18 PLL0_VSSA
0.01u/16
100p/50
C3238
C3239
C3240
1u/6.3
K11
CH
CVDD19
L6
CVDD20
F7
RSV1
B1
RSV2
GNDD
F
D 12/19
DJM-750-K 125
5 6 7 8
1 2 3 4
10.19 MAIN ASSY (13/19)

V+3R3D_DSP
DSP_2
A SPI0 SPI1
BOOT0 1 0
8
7
6
5
R3240
BOOT1 0 1
R3251
R3278
DSP
1k
1k
1k
BOOT2 1 1
2
3
4
1
BOOT7 0 0
FPGA FLASH 4M IC3201

GNDD
D810K013DZKB400
D 11/19 DSP_SPI_CLK
DSP_SPI_WP
11:13B
R3235
R3236 22
T5
R5
SPI0_CLK/EQEP1I/GP5[2]/BOOT[2]
SPI0_ENA/UART0_CTS/EQEP0A/GP5[3]/BOOT[3]
UART0_TXD/I2C0_SCL/TM64P0_OUT12/GP5[9]/BOOT[9]
UART0_RXD/I2C0_SDA/TM64P0_IN12/GP5[8]/BOOT[8]
P3
R3
11:13B
From To FPGA DSP_SPI_SOMI
11:13B R3238
22 R6
SPI0_SOMI[0]/EQEP0I/GP5[0]/BOOT[0]
P6
SPI Master=DSP,Slave=Flash(FPGA) DSP_SPI_SIMO
SPI0_SIMO[0]/EQEP0S/GP5[1]/BOOT[1]
11:13B R3239 22 N4
DSP_SPI_CS
SPI0_SCS[0]/UART0_RTS/EQEP0B/GP5[4]/BOOT[4]
11:13B 22
T6
SPI1_CLK/EQEP1S/GP5[7]/BOOT[7]
1-11 debug port DBG_PORT_GP5[12]

R4
P5
SPI1_ENA/UART2_RXD/GP5[12]
D 10/19 R3276
DSP_RESET N5
P4
SPI1_SOMI[0]/I2C1_SCL/GP5[5]/BOOT[5]
SPI1_SIMO[0]/I2C1_SDA/GP5[6]/BOOT[6]
DSP_RESET
From MAIN_UCOM 10:12B
100
SPI1_SCS[0]/UART2_TXD/GP5[13]
0.01u/16
C3258
C1
NC1
B C2
NC2
STBY F3 G1
NC3 RTC_CVDD
GNDD V+3R3D H4
NC4
JTAG G3
RTC_XI
H1
H2
CN3201
NM
NM
NM
NM
NM
RESET RTC_XO
NM
K1 G2
R3241
R3242
R3243
R3244
R3252
V+3R3D 1 GP7[14] RTC_VSS
V+3R3D 2
J1
DSP_TMS 3 TMS
J2
JTAG
DSP_TDI 4 TDI
J3
DSP_TDO 5 TDO
J4 F2
DSP_TCK 6 TRST OSCIN
H3 F1
DSP_EMU 7 TCK OSCOUT
J5 E2
DSP_TRST 8 EMU[0]/GP7[15] OSCVSS
GNDD 9
R3253
GNDD 1 0 G
V+1R2D
10k
GNDD IC3205
C3260
1 0.1u/10
VCC 5
C 2
Oscillator 3
GND
4 R3255 GNDD
22
V+3R3D
TC7SG08FU
GNDD
24.576MHz(DSP/FPGA)
R3230
1000p/50
C3257
100p/50
C3255
C3256
0.1u/10
CH
1000p/50
0.01u/16
100p/50
C3250
C3251
C3252
C3264
0.1u/10
CH
IC3204
X3202 1 14
VCC
4 3 2 13
VDD OUT
1-12
R3279
100k
3 12 GNDD
1
OE GND
2 24M 4 11 R3234
5 10 0
GNDD
ASS7102-A R3233 6 9
GNDD
0 7 8
GND
TC74VHC08FK
GNDD GNDD
D 11/19 To FPGA 24M576_CLK_FPGA

11:13B
6M_CLK_DSP
From FPGA 96K_CLK_DSP

11:2C
11:2C
D 11/19
B5
AHCLKX0/AHCLKX2/USB_R
C5
ACLKX0/ECAP0/APWM0/GP
D5
AFSX0/GP2[13]/BOOT[10]
(CH1 D)
: CH1 Digital Signal A4
AHCLKR0/GP2[14]/BOOT[11
(CH2 D) B4
: CH2 Digital Signal C4
ACLKR0/ECAP1/APWM1/GP
(CH3 D)
: CH3 Digital Signal D 5/19 (CH2 D)
AFSR0/GP3[12]
B8
(CH4 D) From CH2 ADC Block ADAT_CH2_ANA
AXR0[0]/AFSR2/GP3[0]
E : CH4 Digital Signal
5:10F C8
AXR0[1]/ACLKX2/GP3[1]
(MIC D) D 8/19 (RET D)

D8
A7
AXR0[2]/AXR2[3]/GP3[2]
: MIC Digital Signal From MIC/RET ADC

ADAT_RETURN_ANA
ADAT_MIC_ANA
8:5C
(MIC D) B7
AXR0[3]/AXR2[2]/GP3[3]
(RET D) AXR0[4]/AXR2[1]/GP3[4]
8:11C
: RETURN Digital Signal D 4/19
C7
D7
AXR0[5]/AFSX2/GP3[5]
AXR0[6]/ACLKR2/GP3[6]
(CH1 U/D IN) (CH1 D)
: CH1 USB/DIGITAL Input Signal From CH1 ADC Block ADAT_CH1_ANA
4:10F
A6
AXR0[7]/GP3[7]
(CH2 U/D IN) D 6/19 From CH3 ADC Block

From CH4 ADC Block
ADAT_CH3_ANA
6:10F
(CH3 D)
(CH4 D)
B6
C6
AXR0[8]/GP3[8]
: CH2 USB/DIGITAL Input Signal ADAT_CH4_ANA

7:10F
D6
UART1_RXD/AXR0[9]/GP3[9
(CH3 U/D IN)

: CH3 USB/DIGITAL Input Signal D 7/19 A5
UART1_TXD/AXR0[10]/GP3[
AXR0[11]/AXR2[0]/GP3[11]
(CH4 U/D IN) (CH1 U/D IN) L4

ADAT_USBIN1
: CH4 USB/DIGITAL Input Signal ADAT_USBIN2
9:2H
(CH2 U/D IN)
AMUTE0/RESETOUT
From USB_UCOM ADAT_USBIN3

9:2H (CH3 U/D IN)
9:2H
(CH4 U/D IN)
D 9/19 ADAT_USBIN4
9:2H
D 13/19
126 DJM-750-K
1 2 3 4
5 6 7 8
NOTES
NM is STBY
P3
64P0_OUT12/GP5[9]/BOOT[9] RS1/16SS***J
R3
M64P0_IN12/GP5[8]/BOOT[8] (D) RS1/16SS****D
SR RS1/10SR***J
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F
1/4W RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
V+1R2D_DSP
CKSSYB***K F
SR CKSRYB***K F
B
G1
C3261
R3263
0.1u/10
RTC_CVDD SQ CKSQYB***K F
10k
CH CCSSCH***J F
H1
RTC_XI CH (D) CCSSCH***D F
H2
RTC_XO SRCH CCSRCH***J F
SQCH CCSQCH***J F
RTC_VSS
G2
: Voltage measuring point CFHXSQ
+
CFHXSQ***J F
CEVW***M F
GNDD
: Waveform measuring point NP
+
CEVWNP***M F
HVW CEHVW***M F
+
HVAW CEHVAW***M F
F2
OSCIN CEANP CEANP***M F
F1
OSCOUT
E2
OSCVSS
GNDD

260
10
C
GNDD
DSP
IC3201
D810K013DZKB400
(HP D)
USB0_VBUS
D3
E4
: HP OUT Digital Signal
USB0_DRVVBUS/GP4[15] (MA D)
H5
E3
USB0_VDDA33
F4
: MASTER OUT Digital Signal
USB0_VDDA18 USB0_DP (BO D)
C3
USB0_VDDA12
USB2.0
USB0_DM
G4
: BOOTH OUT Digital Signal
STBY (SEND D)
: SEND OUT Digital Signal
C3259
D2
NM
USB0_ID
(REC D)
: REC OUT Digital Signal
GNDD (DIG OUT)
: DIGITAL OUT Signal
(CH1 U OUT)
: CH1 USB Output Signal D
(CH2 U OUT)
(CH3 U OUT)
(CH4 U OUT)
DSP IC3201
D810K013DZKB400
B5 K2
C5
D5
AHCLKX0/AHCLKX2/USB_REFCLKIN/GP2[11]
ACLKX0/ECAP0/APWM0/GP2[12]
AHCLKX1/EPWM0B/GP3[14]
ACLKX1/EPWM0A/GP3[15]
K3
K4
(HP D)
D 1/19
AFSX0/GP2[13]/BOOT[10] AFSX1/EPWMSYNCI/EPWMSYNCO/GP4[10]
STBY
ADAT_HP
1:6C
To BOARD_IF
R3274 (DIG OUT)
A4 L1
B4
AHCLKR0/GP2[14]/BOOT[11] AHCLKR1/GP4[11]
L2 NM
ADAT_DOUT
14:2G To DIGITAL OUT
ACLKR0/ECAP1/APWM1/GP2[15] ACLKR1/ECAP2/APWM2/GP4[12]
D 14/19
R3277
C4 L3
0
AFSR0/GP3[12] AFSR1/GP4[13]
McASP1
B8 T3 R3247
C8
AXR0[0]/AFSR2/GP3[0]
AXR0[1]/ACLKX2/GP3[1]
AXR1[0]/GP4[0]
AXR1[1]/GP4[1]
R2 100
GNDD
D 11/19 E
D8 P2 (DIG OUT) R3246
To FPGA
McASP0
ADAT_DOUT_FPGA
AXR0[2]/AXR2[3]/GP3[2] AXR1[2]/GP4[2]
A7 P1 R3245 100 11:15G
AXR0[3]/AXR2[2]/GP3[3] AXR1[3]/EQEP1A/GP4[3]
B7 N2 100
AXR0[4]/AXR2[1]/GP3[4] AXR1[4]/EQEP1B/GP4[4]
C7 N1 (BO D) ADAT_BOOTH
D7
A6
AXR0[5]/AFSX2/GP3[5]
AXR0[6]/ACLKR2/GP3[6]
AXR1[5]/EPWM2B/GP4[5]
AXR1[6]/EPWM2A/GP4[6]
M4
M3
1
R3264
8 (REC D)
15:2B
ADAT_REC
15:2B
D 15/19
2 7 ADAT_MASTER_R
B6
AXR0[7]/GP3[7] AXR1[7]/EPWM1B/GP4[7]
M2 3 6 (MA D)
15:2B
ADAT_MASTER_L
To OUTPUT IF
AXR0[8]/GP3[8] AXR1[8]/EPWM1A/GP4[8]
C6 M1 15:2B
4 5
UART1_RXD/AXR0[9]/GP3[9] AXR1[9]/GP4[9]
D6 N3 (SEND D)
A5
UART1_TXD/AXR0[10]/GP3[10] AXR1[10]/GP5[10]
T4
100 ADAT_SEND
19:2C To SEND
AXR0[11]/AXR2[0]/GP3[11]
L4
AXR1[11]/GP5[11]
D4 1
R3265
8 (CH3 U OUT) ADAT_USB3OUT
D 19/19
AMUTE0/RESETOUT AMUTE1/EPWMTZ/GP4[14] 9:2H
2 7 (CH4 U OUT) ADAT_USB4OUT
3 6 (CH2 U OUT)
9:2H
ADAT_USB2OUT
9:2H
To USB_UCOM
4 5 (CH1 U OUT)
100
ADAT_USB1OUT
9:2H
D 9/19
D 13/19
DJM-750-K 127
5 6 7 8
1 2 3 4
10.20 MAIN ASSY (14/19)
DIGITAL OUT DIT_RST

A
FPGASRC_MCLK
11:3F
DIT_RESET
10:12B
DIT_TXD
11:3E
D 10/19,11/19 DIT_SCK
11:3E
DIT_CS
From FPGA 11:3E
FPGASRC_LRCK
11:3F
FPGASRC_BCK
11:3F (DIG OUT)
ADAT_DOUT_FPGASRC
11:3F
D 11/19 DOUT_SRC_LRCK
11:3F
R3414
R3415
0
0
To FPGA DOUT_SRC_BCK
DOUT_SRC_DATA
11:3F (DIG OUT) R3416
0
11:3F R3411
0 (DIG OUT)
R3412
STBY
24bit SRC R3413
0
D 10/19
From MAIN_UCOM R3410
1 8
R3435
DOUT_SRC_RESET 2 7
C 10:12B
0 3 6
0.01u/16
C3405
4 5
29
27
25
32
31
30
28
26
NM
RMCK
SDOUT1
OLRCK1
OSCLK1
RST
GPO3/SRC_UNLOCK
TDM_IN
GNDD
OLRCK2
1 24
RX0/RXP0 OSCLK2
V+3R3D
2 23
RX1/RXN0 SDOUT2
DCH1201-A
1 0 u 10V
C3406
C3408
0.1u/10
3 22
VA IC3404 VL
NM
C3404
0.1u/10
4 21
AGND 33 DGND
DCH1201-A
THERMAL_PAD
1 0 u 10V
SDA/CDOUT/V/AUDIO
R3408
C3407
C3409
0.1u/10
5 20
SCL/CCLK/NV/RERR
1 8 RX2/RXP1 VD_FILT
2 7
6 19
3 6
D RX3/RXN1 V_REG
ILRCK/MCLK_OUT
4 5 GPO2/TX/U GNDD
7 GPO1/C 18
ISCLK/TX_SEL
SRC_CS NM
SDIN/RX_SEL
AD0/CS/SAOF
11:3E
GPO0/RCBL
XTI
8 17
SRC_TXD AD1/CDIN/MS_SEL
11:3E
XTO
9
10
11
12
13
14
15
16
D 11/19 SRC_SCK
11:3D
From FPGA
GNDD
24M_CLK_DIGI
11:2C
E 96K_CLK_DIGI
11:2D
6M_CLK_DIGI
11:2C
From DSP ADAT_DOUT

13:13H
17pin C
R3436
D 13/19
0
Software mode non pull up
Hardware mode 20k pull up
GNDD
D 14/19
128 DJM-750-K
1 2 3 4
5 6 7 8

1-86
R3434
100
0.01u/16
C3412
(DIG OUT)
GNDD
R3422
B
0
R3421
0
R3420
1-90
0
STBY 1-89
R3417
R3418 NM
1-87
R3419 NM 1-88
V+3R3D_DIT V+3R3D
NM (DIG OUT)
(DIG OUT)
R3427
NM
DCH1201-A
10V
36
35
34
33
32
31
30
29
28
27
26
25
STBY
C3415
1-85 V+5D
CM0/CDTO/CAD1
PDN
XTO
CM1/CDTI/SDA
XTI
10u
INT1 LRCK
OCKS0/CSN/CAD0
OCLS1/CCLK/SCL
INT0
C3411 37 24
AVDD MCKO1
STBY
SDTO
DAUX
MCKO2
0.1u/10
BICK
DCH1201-A
R3423 38 23
10V
R DVSS
C
C3416
C3417
C3419
C3410 18k RN 39 22 C3413
NM
0.01u/16
VCOM DVDD
0.47u/6.3 40 21
10u
0.1u/10
41
AVSS DOUT DIT VOUT
20
R3429
RX0 UOUT
DIGITAL OUT
1.8k
GNDD
42
NC_AVSS3
IC3405 COUT
19
1-84
V+3R3D
43
44
RX1
TEST1
AK4114VQ BOUT
TX1
TX0
18
17 R3426 R3428
GNDD
RX2 Q3401
NC_AVSS4 NC_DVSS1 2SC2412K(RS)
45 16 22 2.7k STBY JA3401
NC_AVSS1
NC_AVSS2
TVDD (DIG OUT)

DKB1089-A
IPS0/RX4
DIF0/RX5
DIF1/RX6
DIF2/RX7
DCH1201-A
R3432 C3418 L3401

IPS1/IIC
46 15
2
1 0 u 10V
TEST2
C3406
C3408
0.1u/10
XTL0
XTL1
NM
P/SN
47 14 C3414 68 0.1u/10
R3431
R3433
(DIG OUT) 1
VIN
R3430
100k
RX3
220
3.9k
48 13 0.1u/10
2
9
1
10
11
12
DCH1201-A
R3425
1 0 u 10V
C3407
C3409
0.1u/10
10k
R3424
GNDD
10k
D
GNDD
XTAL:24.576MHz GNDD
NOTES
(DIG OUT)
NM is STBY : DIGITAL OUT Signal
RS1/16SS***J
(D) RS1/16SS****D : Voltage measuring point
SR RS1/10SR***J
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F

1/4W RS1/4SA***J
RN RN1/16SE****D E
RAB4CQ***J
n C CKSSYB***K F
up SR CKSRYB***K F
ull up SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CEVW***M F
NP CEVWNP***M F
HVW
+
CEHVW***M F
F
+
HVAW CEHVAW***M F
CEANP CEANP***M F
D 14/19
DJM-750-K 129
5 6 7 8
1 2 3 4
10.21 MAIN ASSY (15/19)

TEST MODE FORMAT MCLK SCLK
OUTPUT IF
LRCK
I2S 256fs 64fs
OPEN SPI 96kHz
A I2S
Left-Justified
32bits 24.576MHz 6.144MHz
V+5A_O
IC201
MASTER / REC/ BOOTH DAC PCM1691DCA
STBY
R213
NM
1 48
RSV2_1 RSV2_13
2 47
RSV1_2 VCC2
3 46
1000p/50
22u/6.3
C214
C216
C218
1u/10
RSV2_2 AGND2
SR
1-52 4
RSV1_1
45
RSV2_12
5 44
D 11/19,19/19 96k_CLK_DA
11:2K;19:2C
1-53 RSV2_3
6
RSV2_11
43
(BO)
BOOTH_L D 18/19
18:2C
From FPGA LRCK VOUT1
1-49 6M_CLK_DA
11:2K;19:2C
(BO D)
7
BCK
42
RSV2_10
BOOTH_L To BOOTH
ADAT_BOOTH 8 41 BOOTH_R
V+3R3D 13:13H DIN1 VOUT2 18:2G
(REC D)
D 13/19 ADAT_REC
13:13H
ADAT_MASTER_L (MA D)
9
DIN2
10
40
RSV2_14
39
BOOTH_R (REC)
REC_L D 17/19
STBY
R201
NM
From DSP 13:13I DIN3

11
VOUT3
38
17:2E
ADAT_MASTER_R
13:13H DIN4 RSV2_9
REC_L To MASTER2/REC
12 37 REC_R
49
B VDD VOUT4 17:2G
CCH1998-A
13 GND 36 REC_R
16V
1000p/50
DGND RSV2_8 (MA)

0.1u/10
C202
C203
C204
14 35 MASTER_L+
SCKI VOUT5 16:2C
10u
15 34
MASTER_L +
RST
16
ZERO1
RSV2_7
33
VOUT6
(MA)
MASTER_L-
16:2C
D 16/19
1-50 17 32
MASTER_L - To MASTER1
R212 ZERO2 RSV2_6
18 31 MASTER_R+
D 11/19,19/19 1-54 0
AMUTEI
19
VOUT7
30
16:2G
AMUTEO RSV2_5
MASTER_R +
From FPGA 24M_CLK_DA
11:2K;19:2C R204
20
MD/SDA/DEMP
29
VOUT8
MASTER_R-
16:2G
21 28
MASTER_R -
From MAIN_UCOM DA_RESET
10:14D;19:2C 100
MC/SCL/FMT
22
RSV2_4
27
D 10/19,19/19 DA_CDTI
11:12A
MS/ADR0/RSV
23
TEST/ADR1/RSV
AGND1
26
VCOM
DA_CCLK 24 25
From FPGA 11:12A
DA_CSN
R211
MODE VCC1
10k
1000p/50
D 11/19
22u/6.3
220u/4
11:12B
C213
C215
C217
C219
C220
1u/10
1u/10
SR
SR
0.01u/16
C206
1-51
C209
C 1000p/50
STBY C210
GNDD
NM
STBY
R252 R266 R271 C212
NM NM NM 0.01u/16
R253 R267 R272 C211
NM NM NM 0.01u/16
R254 R268 R273 C249

KN201
1 3 NM NM NM 1000p/50
GND1 GND3
R255 R269 R274
GNDA_OUT GNDD
2 4 NM NM NM
GND2 GND4
R270 R275
VNE1948-A
NM NM
GNDA_OUT GNDA_OUT
GND_PO GNDA_OUT GND_PO GNDA_OUT
GNDD
D
V+11E_UNREG
R205
1-70
22k
Q205
LSA1576UB(QRS) D 1/19,16/19-19/19
MUTE To BOARD_IF
R202
MASTER1
47k
MUTE
R206
1:9B;16:11E;17:3G;18:3D;19:4E MASTER2/REC
22k
BOOTH
R209
0.01u/25
47k
MUTE
C208
STBY
SEND
R203
C363
NM
47k
Q202
LSC4081UB(QRS)
R210
47k
D 10/19 Q201
LTC024EEB
GNDD
GNDD
From MAIN_UCOM CPU_MUTE

10:2K
GNDD
C201
V-15A_O
STBY
NM
E
CPU_ MVR_ MASTER
MUTE
MUTE MUTE MUTE
L L H (ON) H (ON) GNDD
L H H (ON) H (ON)
V-15A V-15A
H L V+11E_UNREG
(OFF) (OFF)
V-15A
H H H (ON)
(OFF)
R207
MASTER
22k
DA2J101
D301
Q204
MUTE 1-68
MASTER VR MUTE
LSAR523UB
R208
To MASTER1
22k
MASTER_MUTE
STBY 16:11E MASTER2/REC
R353
47k
STBY
STBY
D 16/19
C207
C364
NM
NM
Q203
LTC024EEB
From BOARD IF MVR_MUTE

R386
47k
1:4B
STBY
C205
F
NM
D 1/19 GNDD GNDD
V-15A_O
D 15/19 GNDD
130 DJM-750-K
1 2 3 4
5 6 7 8
CONTROL D 15/19 MAIN ASSY (DWX3430) A
V+5D V+5D_CONTROL
R214 L201
0 VTF1093-A
STBY SR
0.1u/10
C222
D 18/19 1-48
V+3R3D Q207
NM
R217
NM
To BOOTH C221 GNDD
NM
D 17/19 IC202 GNDD
R218
NM
1 VCC 5
To MASTER2/REC FPGA_DONE 2
10:2H;11:13K 3 4 R215 Q206
GND
NM
NM B
R216
NM
NM
D 16/19 GNDD
To MASTER1 GNDD
V+5D_CONTROL
R226 R234
STBY
L208
1-97 CONTROL1
47k 470 NM
(for CH2)
DZ2S180C
STBY
C230
NM
FADER_STOP1
0.1u/10
C236
D204
11:6J Q215 JA202
LTC024EEB 1
3
GNDD GNDD 2
XKN3017-B
V+5D_CONTROL
1-98 STBY 1-97 GNDD
C209
R222 R233 L209
1000p/50
47k 470 NM C
DZ2S180C
Y C210
0.1u/10
C228
C238
STBY
NM
FADER_START1
D202
NM 11:6J
Q214
C212 LTC024EEB
0.01u/16
GNDD GNDD
C211
0.01u/16
C249
D 11/19 V+5D_CONTROL
R223 R228
STBY
L202
GNDD
CONTROL2
From FPGA
1000p/50 47k 470 NM
(for CH3)
DZ2S180C
STBY
0.1u/10
GNDD
C226
C231
DA_OUT
NM
FADER_STOP2 D201
11:6J Q209 JA203
LTC024EEB 1
3
GNDD GNDD 2
XKN3017-B
V+5D_CONTROL
STBY
GNDD
R219 R227 L204
47k 470 NM
D
DZ2S180C
STBY
0.1u/10
C223
C233
NM
FADER_START2
D203
11:6J
Q208
LTC024EEB
GNDD GNDD NOTES

9,16/19-19/19 NM is STBY
GNDD
To BOARD_IF RS1/16SS***J
MASTER1 (D) RS1/16SS****D
MASTER2/REC SR RS1/10SR***J
BOOTH
SEND (MA D)
: MASTER OUT Digital Signal 1/8W RS1/8SQ***J
(BO D) 1/8W (F) RS1/8SQ****F
: BOOTH OUT Digital Signal 1/4W RS1/4SA***J
(REC D)
: REC OUT Digital Signal RN RN1/16SE****D
(BO)
: BOOTH OUT Signal (L ch) RAB4CQ***J E
(REC)
: REC OUT Signal (L ch)
(MA)
: MASTER OUT Signal (L ch) CKSSYB***K F
SR CKSRYB***K F
: Voltage measuring point SQ CKSQYB***K F
CH CCSSCH***J F
: Waveform measuring point CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
The check point for service. CFHXSQ CFHXSQ***J F

+
CEVW***M F
To MASTER1 NP CEVWNP***M F
MASTER2/REC HVW
+
CEHVW***M F
+
D 16/19 HVAW
CEANP
CEHVAW***M
CEANP***M
F
F
D 15/19
DJM-750-K 131
5 6 7 8
1 2 3 4
10.22 MAIN ASSY (16/19)
MASTER1
A V+15A_O
C317
100u/25
HVAW
C318
GND_PO
0.1u/25
SR
GNDA_OUT
ML+
56p/50
R309
R325
C309
RN
RN
CH
24k
24k
R301 R317 R333 C327
I C 3 0 1 (2/2)
R701
3.3k 3k 2.7k (MA) VCC NJM4580MD NM
2200p/50
RN RN RN 2 L+
470p/50
SRCH
SRCH
8 C323 180 (MA) (MA1)
C301
C305
1 1/8W (F)
NM
4 R702
3
R302 R318 R334 (MA) GND STBY
3.3k 3k 2.7k
1-59 180
1/8W (F)
1/8W (F)
1/8W (F)
1/8W (F)
R713
R714
R725
R341
RN RN RN
RN
180
180
220
10k
56p/50
R310
R326
C310
RN
RN
CH
24k
24k
V-15A_O
D 15/19 MASTER_L+
(MA)
R721
B 15:5B Q703
Q707
From OUTPUT IF MASTER_L-

(MA)
GNDA_OUT
R709
22k
INC2002AC1 MASTER_L_HOT
15:5B 22k
INC2002AC1
ML- GNDA_OUT
M
56p/50
(MA2)
R311
R327
C311
RN
RN
CH
24k
24k
V+15A_O
3dB_ON
R303 R319 R335 C328
I C 3 0 1 (1/2)
R703
3.3k 3k 2.7k VCC NJM4580MD NM
(MA)
2200p/50
RN RN RN 6 L-
470p/50
SRCH
SRCH
8 C324 180 (MA)

C302
C306
7 1/8W (F)
NM R704
4
(MA) 5 (MA1)
R304 R320 R336 GND STBY
1-59 180
1/8W (F)
6dB_ON
3.3k 3k 2.7k C320
1/8W (F)
1/8W (F)
1/8W (F)
R715
R716
R726
R344
RN RN RN
RN
180
180
220
10k
56p/50
R312
R328
C312
RN
RN
CH
0.1u/25
24k
24k
SR
V+15A_O GNDA_OUT
C321
R722
Q708
100u/25 Q704
HVAW 22k
D 10/19 10:7E
Q701
LTA024EEB
GNDA_OUT GND_PO
R710
22k
INC2002AC1
ATT_SEL_6dB V-15A_O
C From MAIN_UCOM 10:7E
Q702
LTA024EEB
INC2002AC1
ATT_SEL_3dB GNDA_OUT
V+15A_O F
R729
R731
51k
51k
C319
0.1u/25
R730
R732
51k
51k
SR
GNDA_OUT
MR+
56p/50
R313
R329
C313
RN
RN
CH
24k
24k
3dB_ON
V-15A_O
R305 R321 R337 I C 3 0 2 (1/2) C329

NJM4580MD R705
3.3k 3k 2.7k VCC NM
2200p/50
RN RN RN 2 R+
470p/50
SRCH
SRCH
8 C325 180
C303
C307
1 1/8W (F)
NM R706
4
3
180
3.3k 3k 2.7k 1-60 1/8W (F)
1/8W (F)
1/8W (F)
1/8W (F)
R717
R718
R727
R342
RN RN RN
RN
180
180
220
10k
56p/50
R314
R330
C314
D
RN
RN
CH
24k
24k
V-15A_O
6dB_ON
R723
D 15/19 MASTER_R+
R711
Q705
22k
Q709
15:5B
GNDA_OUT INC2002AC1
MASTER_R_HOT
From OUTPUT IF MASTER_R-
15:5C
22k
INC2002AC1
MR- GNDA_OUT
56p/50
R315
R331
C315
RN
RN
CH
24k
24k
V+15A_O
MASTER_R_COLD
R307 R323 R339 C330
I C 3 0 2 (2/2) R707
3.3k 3k 2.7k VCC NJM4580MD NM
2200p/50
RN RN RN 6 R-
470p/50
SRCH
SRCH
8 C326 180
C304
C308
7 1/8W (F)
NM R708
4
5
3.3k 3k 2.7k C322

1-60 180
1/8W (F)
1/8W (F)
1/8W (F)
1/8W (F)
R719
R720
R728
R343
RN RN RN
RN
180
180
220
10k
56p/50
R316
R332
C316
RN
RN
CH
0.1u/25
24k
24k
SR
V-15A_O GNDA_OUT
R724
Q710
E R712
Q706
22k
GNDA_OUT INC2002AC1
22k
INC2002AC1
GNDA_OUT
MASTER 2R
(MA2)
F MASTER 2L+
D 16/19
132 DJM-750-K
1 2 3 4
5 6 7 8
V+15A_O
C335
100u/25
HVAW
C336
NM
GND_PO MASTER1 L
STBY JA301
C337 DKB1093-A
0.1u/25 4
SR
1 2
GNDA_OUT
R354
3
6.8k
RN
C338
(MA1) R345 Q301
100p/50
CH NM
1-61 MASTER1_L_COLD
COLD
5.6k STBY (MA1) V+
HOT
RN 6 STBY
8 C355 (MA1)
C331
7 R362
NM
IC303 DCN1200-A 220u/16
5
4 NJM4580D 330 XCEAT (MA1)
(2/2) 1/2W
R346 (MA1) V-
Q305
DZ2S180C
CFHXSQ
INC2002AC1
R355 R378
4700p/16
5.6k V-15A_O
VA301
STBY
C359
D302
RN
NM
6.8k 18k
RN
B
C365
C349
NM
R367
2.2k
RN
100p/50
ER_L_HOT CH
STBY
V+15A_O
R368
2.2k
RN
C366
R356
NM
MASTER_L_COLD
DZ2S180C
GNDA_OUT
CFHXSQ
(MA2)
4700p/16
6.8k
VA302
STBY
C360
D303
RN
NM
C339 R379
R347 100p/50 Q302 18k Q306

5.6k
RN
STBY (MA1) V+
CH NM
STBY
1-61 INC2002AC1
GNDA_OUT
2 (MA1)
8 C356 P302
C332
1 R363
NM
IC303 1 2
DCN1200-A 220u/16
3
4 NJM4580D 330 XCEAT (MA1) AEK1073-A
(MA1) (1/2) 1/2W
R348 (MA1) V-
MASTER1_L_HOT
5.6k C350
RN
100p/50
CH
R357
C340 6.8k
RN
0.1u/25 STBY
SR
C341
STBY
Canon Shield(DNF1789-A)
C353
NM
NM
STBY
C348 GNDA_OUT
C
R374
R376
NM
0
100u/25
HVAW
GND_PO GNDA_OUT
D 15/19 V-15A_O
From OUTPUT IF MASTER_MUTE

15:4H
STBY
V+15A_O
R375
R377
STBY
MASTER1 R
NM
C342
0
NM STBY
JA302
C343 DKB1093-A
C354
NM
0.1u/25
SR 4
1 2
GNDA_OUT
R358
3
6.8k
RN GNDA_OUT
C344
R349 100p/50 Q303

CH NM
1-62
COLD
MASTER1_R_COLD
HOT
5.6k STBY V+
RN 6 STBY
8 C357
C333
7 R364
NM
IC304
DCN1200-A 220u/16
4 NJM4580D 330 XCEAT
5 (2/2)
R350 V- 1/2W
Q307 D
DZ2S180C
CFHXSQ
INC2002AC1
R359 R380
4700p/16
5.6k V-15A_O
VA303
STBY
C361
D304
RN NM
6.8k 18k
RN
C367
C351
NM
R371
2.2k
RN
MASTER_R_HOT 100p/50
CH
STBY
V+15A_O
R372
2.2k
RN
C368
R360
NM
GNDA_OUT
DZ2S180C
CFHXSQ
4700p/16
6.8k
VA304
STBY
C362
D305
RN
NM
MASTER_R_COLD C345 R381
R351 100p/50 Q304 18k

Q308
5.6k
RN
STBY V+
CH NM
STBY
1-62 INC2002AC1
GNDA_OUT
2
8 C358 P301
C334
1 R365
NM
IC304 DCN1200-A 220u/16 1 2

4 NJM4580D 330 XCEAT AEK1073-A
3 (1/2)
R352 V- 1/2W MASTER1_R_HOT
5.6k C352
RN NOTES
100p/50
CH
R361
NM is STBY
C346 6.8k RS1/16SS***J
RN
0.1u/25
SR
C347
(D) RS1/16SS****D
E
STBY SR RS1/10SR***J
NM
GNDA_OUT 1/8W RS1/8SQ***J
V-15A_O 1/8W (F) RS1/8SQ****F

1/4W RS1/4SA***J
RN RN1/16SE****D
(MA)
RAB4CQ***J
: MASTER OUT Signal (L ch)
(MA1)
: MASTER1 OUT Signal (L ch) CKSSYB***K F
(MA2) SR CKSRYB***K F
: MASTER2 OUT Signal (L ch) SQ CKSQYB***K F

MASTER 2R+ CCSSCH***J
MASTER_2R+
D 17/19 CH (D)
CH
CCSSCH***D
F
F
17:2C CCSRCH***J
SRCH F
(MA2)
MASTER2_L+
To MASTER2/REC : Voltage measuring point SQCH CCSQCH***J F
17:2B
CFHXSQ***J
MASTER 2L+
: Waveform measuring point CFHXSQ
+
CEVW***M
F
F
F
NP CEVWNP***M F
+
HVW CEHVW***M F
The check point for service. +
HVAW
+
CEHVAW***M F
XCEAT
CEANP
XCEAT***M
CEANP***M
F
F
D 16/19
DJM-750-K 133
5 6 7 8
1 2 3 4
10.23 MAIN ASSY (17/19)
A
MASTER2,REC (MA2)
: MASTER2 OUT Signal (L ch)
(REC)
: REC OUT Signal (L ch)
D 16/19
(MA2) R404 (MA2)
MASTER2_L+
16:7J 10k
RN
Q401
NM
R411
NM
B STBY
GNDA_OUT
From MASTER1
D 16/19 R403
MASTER_2R+
16:7J 10k
RN
Q402
NM
R439 R412
MASTER_MUTE
C 15:4H 0 NM
D 15/19 STBY
R440
NM
GNDA_OUT
STBY
V
R405
R409
22k
22k
(D)
(D)
D 15/19 (REC) C402 (REC) R402 R407 R413 (REC) 2

REC_L
15:5B 22u/6.3 3.3k 2.7k 2.4k
(D) (D) (D)
4700p/50
From OUTPUT IF STBY 3

SQCH
820p/50
SRCH
C403
C405
R437
Q409
NM
NM
GNDA_OUT GNDA_O
E
R406
R410
22k
22k
(D)
(D)
D 15/19 C401
R401 R408 R414 6
REC_R
15:5B 22u/6.3 3.3k 2.7k 2.4k
(D) (D) (D)
4700p/50
STBY 5
820p/50
SQCH
SRCH
C404
C406
R438
Q410 V
NM
NM
GNDA_OUT GNDA_O
F D 1/19,15/19,16/19,18/19,19/19
MUTE
1:9B;15:4F;16:11E;18:3D;19:4E
D 17/19
134 DJM-750-K
1 2 3 4
5 6 7 8
V+15A_O
C417
CCG1236-A
10u/35
C418 STBY GND_PO
NM
C419
0.1u/25
MASTER2/REC
SR
GNDA_OUT
R423 JA401
DKB1083-A
(REC)
33k 1 REC L
R420
RN
RN
12k
VCC 1-63 GNDA_OUT 2 REC R
2
8
3
1 R427 C425 (MA2) (MA2)
MA2) (MA2)
4 MASTER2 L
IC402 DCN1200-A 100u/16 STBY
4 NJM4580MD 5 MASTER2 R
3 330 6
GND (2/2) 1/2W
CFHXSQ
4700p/16
R436
C427
D401
470k
NM
V-15A_O Q407
R431 INC2002AC1
18k
GNDA_OUT
R433
B
NM
STBY
GNDA_OUT
R434
NM
GNDA_OUT
Q408
V+15A_O INC2002AC1
R432
R424 18k
33k
R421
RN
RN
12k
VCC 1-63 GNDA_OUT

6
8 R428 C426
7
IC402 DCN1200-A 100u/16 STBY
4 NJM4580MD 330
5
GND (1/2) 1/2W
CFHXSQ
4700p/16
R435
C428
C420
470k
D402
NM
0.1u/25
SR
C421 STBY C
NM
C422 GNDA_OUT
10u/35
CCG1236-A
GNDA_OUT
GND_PO
V-15A_O
C414
56p/50
Q403
CH
2SK209(BL)
C408
V+15A_O 0.33u/10
SR
C409 NOTES
0.1u/25 D
SR NM is STBY
C410 GNDA_OUT
RS1/16SS***J
(REC) 2
V+ 10u/35
CCG1236-A
1-64 (D) RS1/16SS****D
8 R422 R425 C423 (REC)
1 GND_PO SR RS1/10SR***J
IC401 DCN1200-A 10 100u/16 STBY
4 NJM4565MD SR (D) RS1/10SR****D
3 330
V- (1/2) R415 1/2W 1/8W RS1/8SQ***J
4700p/16
CFHXSQ
C411
R429
C429
1M
100k
D403
NM
1/8W (F) RS1/8SQ****F

1000p/50
0.1u/25
C415
SR 1/4W RS1/4SA***J
C 4 1 2 GNDA_OUT
RN RN1/16SE****D
GNDA_OUT
10u/35
CCG1236-A
GND_PO GNDA_OUT
RAB4CQ***J
R418 Q405
V-15A_O GNDA_OUT
INC2002AC1
18k
CKSSYB***K F
C413
SR CKSRYB***K F
56p/50
E
Q404 SQ CKSQYB***K F
CH 2SK209(BL)
C407 CCSSCH***J
GNDA_OUT CH F
0.33u/10 CCSSCH***D
SR CH (D) F
V+15A_O
SRCH CCSRCH***J F
IC401
6
V+ NJM4565MD
(2/2)
1-64 SQCH CCSQCH***J F
8 R419 R426 C424
7 CFHXSQ CFHXSQ***J F
DCN1200-A 100u/16 STBY +
4 10 CEVW***M F
5 330
R416 1/2W
V- NP CEVWNP***M F
4700p/16
CFHXSQ
+
R430
C430
D404
1M
100k
NM
V-15A_O HVW CEHVW***M F

1000p/50
+
C416
HVAW CEHVAW***M F
CEANP CEANP***M F
GNDA_OUT
GNDA_OUT
GNDA_OUT
F
R417 Q406
INC2002AC1
18k
GNDA_OUT
D 17/19
DJM-750-K 135
5 6 7 8
1 2 3 4
10.24 MAIN ASSY (18/19)
A BOOTH
C505
0.33u/10
SR
V+15A_O
C506
47u/25
GND_PO Q501
C507 2SK209(BL)
22p/50
R502
R504
C504
RN
RN
CH
62k
62k
0.1u/25
SR
VCC GNDA_OUT
(BO) C501
R501 R503 R519 2 (BO)
From OUTPUT IF BOOTH_L
15:5B 22u/6.3 3.3k 3k 3k (BO)
8
1
IC501
(BO) R505
B RN RN RN
4700p/50
DCN1200-A
SQCH
SRCH
820p/50
D 15/19 4
C502
C503
3 NJM4580MD 330
GND (1/2) 1/2W
1-96
V-15A_O
GNDA_OUT
SRCH
680p/50
C511
R508
470k
GNDA_OUT
D502
From OUTPUT IF 1:9B;15:4F;16:11E;17:3G;19:4E
MUTE
DA2J101
D 1/19,15/19-17/19,19/19
R509
470k
STBY
R507
C510
NM
47k
SRCH
680p/50
C512
V-15A_O
GNDA_OUT
D
C517
0.33u/10
SR
Q502
2SK209(BL)
V+15A_O
22p/50
R513
R515
C516
RN
RN
CH
62k
62k
D 15/19 C513 VCC

R512 R514 R516
E 6
From OUTPUT IF BOOTH_R
15:5B 22u/6.3 3.3k 3k 3k
8
7
IC501
R517
RN RN RN DCN1200-A
4 NJM4580MD 330
4700p/50
5
SQCH
SRCH
820p/50
C514
C515
GND (2/2) 1/2W

1-96
C518
0.1u/25
GNDA_OUT SR
GNDA_OUT
C519
47u/25
GND_PO
V-15A_O
D 18/19
136 DJM-750-K
1 2 3 4
5 6 7 8
JA501
AKB7181-A
1 Rch OUT
BOOTH_L (Red)
2
(BO) (BO)
R505 C508
3 Lch OUT
STBY (White)
DCN1200-A 100u/16 4 B
330
BOOTH
CFHXSQ
1/2W
4700p/16
5
C509
D501
NM
R506
100k
Q503
INC2002AC1
R510
18k
GNDA_OUT
(BO)
: BOOTH OUT Signal (L ch)
T

NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
T
SR RS1/10SR***J D
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F
1/4W RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
BOOTH_R
CH (D) CCSSCH***D F
R517 C520 CCSRCH***J
E
SRCH F
DCN1200-A STBY
100u/16 SQCH CCSQCH***J F
330
CFHXSQ
1/2W
4700p/16
CFHXSQ CFHXSQ***J F
C521
D503
NM
R518
+
100k
Q504 CEVW***M F
INC2002AC1
R511 CEVWNP***M
NP F
+
18k HVW CEHVW***M F
+
HVAW CEHVAW***M F
CEANP CEANP***M F
GNDA_OUT
D 18/19
DJM-750-K 137
5 6 7 8
1 2 3 4
10.25 MAIN ASSY (19/19)
A SEND
V+5A_O
STBY
SEND_DAC R610
(SEND) C608
22u/6.3
R611
3.3k
D 11/19,15/19 1-76 1-77 1-73 IC601 NM (D)
DCH1201-A
24M_CLK_DA R601 R608 0 1 16
10V
MCLK DZFL
From FPGA 11:2K;15:2C
0.1u/10
STBY
0
C603
C604
C607
R604 0 2 15
NM
6M_CLK_DA
BICK DZFR
11:2K;15:2B R605 0
10u
(SEND D) 3 14
D 13/19 From DSP ADAT_SEND
13:13I R609 0
SDTI VDD
4 13
From FPGA 96k_CLK_DA
11:2K;15:2B R606 100 5
LRCK VSS
12 C628 100u/4
C DA_RESET
From MAIN_UCOM 10:14D;15:2C
1-75 1-74 6
PDN VCOM
SMUTE/CSN 11 C602 STBY
D 10/19,15/19 7
AOUTL SEND_L
ACKS/CCLK 10
0.01u/16
NM
C601
(SEND)
AOUTR
8 DIF0/CDTI 9
P/S
AK4384ET
SEND_R
GNDD 1-72
NOTES R629 C605
10k
NM is STBY R630 R632 1000p/50
NM C606
RS1/16SS***J R631 STBY 10k
0.01u/16 C609 R612
(D) RS1/16SS****D 10k
SR RS1/10SR***J 22u/6.3 3.3k
GNDD GNDD GNDA_OUT (D)
D SR (D) RS1/10SR****D
1/8W RS1/8SQ***J
1/8W (F) RS1/8SQ****F
1/4W RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
D 1/19,15/19-18/19
MUTE
CKSSYB***K F From OUTPUT IF 1:9B;15:4F;16:11E;17:3G;18:3D
SR CKSRYB***K F
SQ CKSQYB***K F
E CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CEVW***M F
NP CEVWNP***M F
+
HVW CEHVW***M F
+
HVAW CEHVAW***M F
CEANP CEANP***M F
D 19/19
138 DJM-750-K
1 2 3 4
5 6 7 8
V+15A_O
C615
10u/35
CCG1236-A
C616
GND_PO
0.1u/25
SR
GNDA_OUT
B
Q601
C617 2SK209(BL)
R613
R617
0.33u/10
27k
27k
(D)
(D)
SR
C618
(SEND) R 6 1 9
V+ 56p/50 1-72
08 R611 R615 CH
2
8
JA601
(SEND) R621 C624 (SEND)
1 2 DKN1652-A
u/6.3 3.3k 3k 2.7k 3
(D) (D) (D) 330 100u/16
4 IC602 1
1/4W
5600p/50
1000p/50
3
SQCH
SRCH
CFHXSQ
NJM4565MD
C610
C612
V-
2700p/50
(1/2)
R627
C626
100k
C619
SEND L
1000p/50
C623
R624
0.1u/25
1M
SR
C 6 2 1 GNDA_OUT
10u/35 R625
C
CCG1236-A
SEND
18k
V-15A_O
ND_L GNDA_OUT
Q603
GND_PO GNDA_OUT INC2002AC1
V+15A_O
Q602 GNDA_OUT
ND_R C614 2SK209(BL)
0.33u/10
SR
R614
R618
C620
27k
27k
(D)
(D)
56p/50
CH
09 R612 R616 R620
V+ 1-72
6
8
JA602
7 R622 C625 DKN1652-A
2
6.3 3.3k 3k 2.7k 3
(D) (D) (D) IC602 330 100u/16 1
4
5600p/50
1000p/50
5 1/4W
SQCH
SRCH
CFHXSQ
NJM4565MD
D
C611
C613
V-
2700p/50
R628
C627
(2/2)
100k
SEND R
1000p/50
C622
R623
1M
V-15A_O
R626
DNF1875-A
18k
PHONE SHIELD
GNDA_OUT
Q604
INC2002AC1
Rch ONLY
GNDA_OUT
GNDA_OUT
(SEND D) E
: SEND OUT Digital Signal
(SEND)
: SEND OUT Signal (L ch)


D 19/19
DJM-750-K 139
5 6 7 8
1 2 3 4
10.26 SEC/HP ASSY (1/2)
A SECONDARY V+15_AC POW
C19 C23
V+5
1000p/50 1000p/50
CH CH
! !
D5 D9 V+15A_UNREG
1SR154-400 1SR154-400
STBY
17
STBY
3300u/35
0.01u/50
POWER ! !
NM
C31
C53
C33
C37
NM
D6 D10
1SR154-400 1SR154-400
CN1
B13B-EH
C13 C20
B STBY
3300u/35
V+15_AC 1 3
0.01u/50
C1
NM
1000p/50 1000p/50
C32
C54
C34
C38
NM
0.047u
GNDF 1 2 R27 CH CH
0 SQ
V+5A_AC1 1 1 C2 GNDA_UNREG
V+5A_AC2 1 0
0.047u 18
CN3101
C3
0.047u
GNDF 9 R28
0 SQ
V-15_AC 8 C4 V-15A_UNREG
V-15_AC
0.047u
GNDA 7
C5
0.047u
V+13D_AC1 6
C6
0.047u
P
V+13D_AC2 5
C7
0.047u V+5A_AC1
GNDD 4
C8
0.047u C14
GNDHP 3
C9
0.047u V+5A_UNREG
V+HP_AC 2 1000p/50
C10 CH
0.047u
V-HP_AC 1 C11
! D3
0.047u
29
AKF7002-A
RB160L-40
KN2
! D4
C
6800u/16
0.01u/50
KN1
C24
C55
C26
C27
NM
NM
RB160L-40 1
V+5A_AC2 J35 J17
1
J22
C15 STBY STBY
AKF7002-A
1000p/50
GND_F CH
C12
GND5A
NM GND5A_UNREG (from REG)
STBY
! D1 GNDF
(to CHASSIS)
RB060L-40 V+13D_UNREG
R21
NM
SQ
! D2 20 STBY GND_P
6800u/25
1000p/50
J2
0.01u/50
(from REG)
0.1u/25
RB060L-40
C28
C25
C29
C30
NM
C16
STBY
NM
D STBY GNDD is not connected to the chassis
in this substrate.
(GNDD is connected via the MAIN board.)
STBY V+HP_AC
GNDD
R25
NM
SQ
C17 C21
R24
NM
SQ
STBY 1000p/50 1000p/50

CH CH
R26
! D7 D11 !
NM V+HP_UNREG
SQ RB160L-40 RB160L-40
STBY
STBY
21
! D8 !
RB160L-40 D12
1000u/25
RB160L-40
C39
NM
R22
C35
C41
NM
4.7k
E C18 C22
1000p/50 1000p/50
CH CH
Note
1000u/25
GNDHP
C40
NM
C36
C42
NM
R23
4.7k
23
V-HP_UNREG
F CF
E 1/2
140 DJM-750-K
1 2 3 4
5 6 7 8
POWER DOWN
E 1/2 SEC/HP ASSY (DWR1529) A
POWER_RESET_A
V+5A_UNREG 10C POWER_RESET_A
IC1
13k
R5
D
1 5 V+5A V+15A V+13D_UNREG
OUT CD
CN3
2 AKM7077-A
VDD
0.01u/50
C52
3 4
0.01u/50
VSS NC
C51
11k
R4
GNDD
D
19
S-80927CNMC-G8X 18 GNDD
8C
POWER_RESET_A 17 POWER_RESET_A
2:1F
MUTE 16 MUTE
E 2/2
CN1005
15 GNDD
GNDD
14 V+13D_UNREG B
13 GND_PO
EG 12 V-15A
11 GND_PO
10 V+15A
D 1/19
9 GNDA
8 V+5A
7 GNDA
2:1D (HP O)
HP_L+ 6 HP_L+
5 GNDA_HP
2:1D (HP O)
HP_L- 4 HP_L-
E 2/2 2:1D
3 GNDA_HP
HP_R- 2 HP_R-
2:1D
HP_R+
AKF7002-A
1
HP_R+
C
GNDA_HP GND_PO GNDD GND5A
J22
V-15A
(HP O)
GND5A : HP OUT Signal (L ch)
(from REG)
F
SIS)
V+15A_UNREG
R21 V+15A V+5A V+5A_UNREG
NM
SQ
STBY GND_PO 24 26 CN4
(from REG) 52147-1010
10 V+5A_UNREG
R20 SA
9 GND5A_UNREG
to the chassis D
CN5001
NM
a the MAIN board.) 8 GND5A
ACH1480-A
CFTLA
0.47u/50
0.01u/50
7 V+5A
C56
C45
C47
6 V-15A
5 V-15A_UNREG
R18
GNDA_UNREG
O
4
N M SA STBY
3 GND_PO
ACH1480-A
2
CFTLA
V+15A_UNREG
0.47u/50
0.01u/50
C57
C46
C48
1 V+15A
GND_PO
CEHAZL101M10-TS
P_UNREG
CFTLA 0 . 4 7 u / 5 0
100u/10
0.01u/50
25 GNDA_UNREG
C49
C50
C58
21 V-15A
STBY
V+15A TH1
V-15A_UNREG
NM
CN4801
CN2
KM200NA4
R1
1
E
GND5A V+15A
GND5A_UNREG
3.9 SA
2 GND_PO
1/4W
3 GND_PO
R2
A 5/5
SA
4 V-15A
3.9
Notes 1/4W
GNDHP The > mark found on some component parts GND_PO
NM is STBY indicates the importance of the safety factor of the part. TH2
V-15A NM
RS1/10SR***J Therefore, when replacing, be sure to use parts
of identical designation. STBY
SQ RS1/8SQ***J
23 SA RS1/4SA***J
D RS1/10SR****D
RN RN1/16SE****D
NREG The check point for service.
CH CCSRCH***J F ***** (Legend silk indication on the PCB.)
CKSRYB***K F
CKSQYB***K F
CFTLA CFTLA***J F F
NP CEANP F
CEAT F : Waveform measuring point
E 1/2
DJM-750-K 141
5 6 7 8
1 2 3 4
10.27 SEC/HP ASSY (2/2)
A HP OUT
POST Filter AMP
C112
B
470p/50
CH
R120
3k
RN
V+15A
STBY
100p/50
V+15A TH103
R105
C103
RN
CH
15k
NM
Q101
C114 2SK209(BL)-TLB
R101 R109 C107 10u/50 STBY
3.9k 3.3k
(HP O)
V+ 0 . 1 u / 2 5 C115 GND_PO R142
RN RN 6
8
470p/50
C109 R114 (HP O) V+ 0 . 1 u / 2 5 NM

7 GNDA_HP
C101
CH
2
I C 1 0 1 (2/2) 8 R126 (HP O)
100u/16 5.6k 1 GNDA_HP
4 R116
(HP O) 5 NJM4565MD RN
V- 470
R102 R110 0 4 I C 1 0 2 (1/2)
3 VM
V- NJM4580D
C 3.9k 3.3k
STBY
RN RN V-15A R117 V-15A
100p/50
R106
C104
RN
CH
15k
NM R122
STBY
E 1/2 GNDA_HP
1M
C118
NM
GNDHP
(HP O)
HP_L+
GNDA_HP
1:10D
HP_L- GNDA_HP
1:10D R125
(HP O)
C113 15k
INC2002
Q103
HP_R+ 470p/50
1:10D CH
HP_R- GNDA_HP
1:10D R121
3k
RN
100p/50
R107
C105
RN
CH
15k
D Q102
V+15A 2SK209(BL)-TLB
R103 R111
STBY
V+15A R143
3.9k 3.3k V+
RN RN 2
8 I C 1 0 2 (2/2)
470p/50
1 C110 R115 V+ NM
C102
NJM4580D
CH
6
I C 1 0 1 (1/2) 100u/16 5.6k 8 R127
7
4 RN R118
3 NJM4565MD
V- 470
R104 R112 4
0 5 VM
C108 V- C116
3.9k 3.3k
RN RN 0.1u/25 0.1u/25
100p/50
R108
C106
RN
CH
C117
15k
V-15A GNDA_HP STBY GNDA_HP

TH104 10u/50
GNDA_HP NM
GND_PO
V-15A
GNDA_HP R123
STBY
1M
C119
NM
E
MUTE
E 1/2 4-2 GNDA_HP
1:10C R124
INC2002A
MUTE Q104
STBY 15k
C111
NM
GNDA_HP
R119
GNDA_HP
0
GNDHP GNDA_HP

F
E 2/2
142 DJM-750-K
1 2 3 4
5 6 7 8
E 2/2 SEC/HP ASSY (DWR1529) A
V+HP_UNREG V+HP_UNREG_1
STBY
P101 P102
1 2
22 1 2
RXEF075P NM
! V-HP_UNREG V-HP_UNREG_1
V+HP_UNREG_1
C120
DCH1165-A
10u 16V
Q105
C121 GNDHP
KTC3209(Y)-T
Q101 0.1u/16
2SK209(BL)-TLB
GNDHP
STBY
R142
NM
2W LMF
(HP O) R128 (HP O) R130
HP_L (HP O)
R126 C126
470 1k 33 220u/16
RN
R136
R138
VM R137 NP
SQ
SQ
C
0
R134
NM
1k
SQ
STBY
R131
C122 33
Q106 2W LMF GNDHP
KTA1281(Y)-T 0.1u/16
C125
GNDHP
125 DCH1165-A
10u 16V
15k
INC2002AC1-TLB
Q103
GNDHP 4-1 CN101
V-HP_UNREG_1 KM200NA4
(HP O)
1 HP_L_OUT
GNDA_HP
2 GNDHP G
3 GNDHP
V+HP_UNREG_1
GNDHP 4 HP_R_OUT
CN9201
Q107
KTC3209(Y)-T
C123 4-1
Q102 D
0.1u/16
2SK209(BL)-TLB
GNDHP
STBY
R143
NM
2W LMF
R129 R132 C127 HP_R
R127
470 1k 33 220u/16
RN NP
R139
R141
VM R140
SQ
SQ
0
R135
NM
1k
SQ
STBY
R133
C124 33
Q108
KTA1281(Y)-T
2W LMF GNDHP
0.1u/16
Y
GNDHP
E
to CHASSIS
AKF7002-A
KN101
4
INC2002AC1-TLB
Q104
1
V-HP_UNREG_1
Notes
GNDA_HP
NM is STBY
RS1/10SR***J
GNDHP
2W(LMF) RS2LMF***J
D RS1/10SR****D
indicates the importance of the safety factor of the part.
RN RN1/16SE****D (HP O)
SQ RS1/8SQ***J of identical designation.
CKSRYB***K F
CKSQYB***K F F
CH CCSRCH***J F : Waveform measuring point
NP CEANP F
E 2/2
CEAT F
DJM-750-K 143
5 6 7 8
1 2 3 4
10.28 USBI and HPJK ASSYS
F USBI ASSY (DWX3431) G

B
USB2.0 High speed
JA3801 CN3801
V+5VBUS
DKN1237-A KM200NA5L
STBY
1 GND_USB
2 GND_USB
1 V+5_SUB L3801
3 D-USB
D 9/19
2 D-USB
3 4 D+USB CN2602
D+USB
4 NM 5 V+5VBUS
DCH1201-A
GND_USB
10V
SRCH
SRCH
100p/50
C3801
C3802
C3803
C3805
7p/50
7p/50
CH
10u
C
STBY
STBY
VA3802 NM
VA3803 NM
NM
GND_USB
C3807
100p/50
C3806
VA3801
NM
CH
GNDF KN3801
CKF1089-A
NOTES
NM is STBY
RS1/16SS***J
CKSSYB***K F
CH CCSSCH***J F
SRCH CCSRCH***D F
F
144 DJM-750-K
1 2 3 4
5 6 7 8
G HPJK ASSY (DWX3433)

B
GND_F GND_F
PHONE SHIELD:DNF1875-
HP
CN9201
KM200NA4L JA9201
DKN1622-A
R9205 (HP O)
1
3
HP_L_OUT
E 2/2 GNDHP 2
R9204 0 2
0 1
CN101 GNDHP 3
0.22u/16
0.22u/16
C9203
C9204
4
C
HP_R_OUT
R9209
0
STBY
R9203
NM
0
VA9201
GNDHP
R9208
NM
D
(HP O)
C9205
Notes 0.01u/50
LA
NM is STBY
RS1/10SR***J
CKSRYB***K F
LA CFTLA***J F
GNDF
G
DJM-750-K 145
5 6 7 8
1 2 3 4
10.29 PNLA ASSY (1/2)

3-11 FL FILAMENT VOLTAGE
R6884
V+3R3E
R6896
R6897
R6898
R6899
R6900
NM
10
10
10
10
10
LTA114EUB
A DEL1071-B V6601
STBY
Q6604
FL HOLDER : DNF1869-
PGND
FL
LGND
C6622 CH
R6901
R6902
R6903
R6904
R6905
R6906
VDD
CLK
1000p
LAT
NM
VH
BK
10
10
10
10
10
F+
SI
32 F-
V+5D_LED_PA 3-10 C6623
UTILITY(STBY) LED
0.01u/50 STBY KEY
21
22
23
24
25
26
27
28
R6701
V+5D_LED_PA C6624 (UTILITY)
STBY
R6876
NM
0.1u/16
1u/10
V+34D_PA
390
3-9 R6913 C6620 CCG1205-A RS1/4SA100J-T S6601
F
R6616
V+34D_PA S6602
2.2u/10
1/4W
SLR-343VC(NPQ)
NM C6621 DSG1079-A
12k
R6604 R6605 CCG1205-A
STBY DSG1079-A TAP
C6626
2.2u/10 C6646
D6624
(RED)
10 10 GNDD D6617 C6647
GNDD_34D NM R6622 STBY NM
CH
GNDD STBY NM
0.01u/50
10
C6610
C6606
C6607
C6613
STBY
C6605
GNDD
0.1u/50
STBY
STBY
Q6601
NM
NM
1000p
LSAR523UB
V+3R3D_PA GNDD S6604
Q6602
R6617
2SC5712 BEAT UP
3-13 DSG1079-A
8.2k
D
C6649
R6610
3-12
C6619
0.1u/16
GNDD_34D
GNDD_34D STBY NM
3-14 100k
C6614 V+3R3D_PA S6603
GNDD
3-15 100p CH BEAT DOWN
R6623
R6626
R6630
R6633
R6638
R6644
R6649
R6657
R6663
R6666
V+3R3D_PA GNDD DSG1079-A
V+5D_LED V+5D_LED_PA V+3R3D
15
15
15
15
15
15
15
15
15
15
C6615 C6648
GNDD_LED_PA
100p CH
3-16 STBY NM
100u/16
C6616
C6602
100u/16
C6604
C6608
0.1u/16
0.1u/16
C6611
GNDD
33 35
STBY
100p CH
C6617
2:6F
100p CH VR_SEL_1_1
H 2/2
R7054
R7053
R7052
R7051
NM
NM
2:6F
100
100
100
GNDD_LED GNDD_LED_PA GNDD GNDD
VR_SEL_1_0
2:1A
V+3R3D_REFA V+3R3D_REFA_PA V+34D V+34D_PA
B
KEY_IN0
KEY_IN1
KEY_IN2
KEY_IN3
KEY_IN4
KEY_IN5
KEY_IN6
KEY_IN7
KEY_PNLA
STBY_KEY
STBY_LED
CCG1255-A
FL_SCK
FL_TXD
C6601
100u/16
FL_LAT
H 2/2
C6603
C6612
0.1u/16
1.0u/50
37 36
0.1u/50
FL_BK
C6728
FL_TXD
FL_BK
FL_SCK
GNDD_REFA GNDD_REFA_PA
V+3R3D GNDD_34D
CN6601
0.01u/50
C6743
C6744
VKN1839-A
1u/10
V+3R3D 2 4
GNDD 2 3
GNDD 2 2
2:6A
VR_BUS H 2/2
FPGA_CLK
FPGA_CLK 2 1
VR_IN1
BFX4_SW
BFX3_SW
VR_IN2
BFX2_SW
BFX1_SW
VR_master
VR_IN4
VR_IN3
D6767 R7042
VR_IN6
VR_IN5
VR_boost
NM
GNDD 2 0
CN1001
JP FPGA_RX_DAT
FPGA_RX_DAT 1 9 D6768 R7043
NM
GNDD 1 8
JP
FPGA_TX_DAT V+3R3D_PA
FPGA_TX_DAT 1 7 D6769 R7044
NM
GNDD 1 6
SUB_INT 1 5
JP SUB_INT V+3R3D_PA 3-1
1k
1k
1k
1k
1k
1k
D6770
1k
1k
SUB_CTRL GNDD
NM NM
100
100
SUB_CTRL 1 4 D6766
R6643
FPGA_SIGNAL
R6656
NM
FPGA_SIGNAL 1 3
R6936
R6615
DCH1201-A
D6765
R6870
R6871
R6872
R6873
R6874
R6875
R6883
NM SUB_CPU_RESET STBY
C6625
C6627
R6659
0.1u/16
SUB_CPU_RESET 1 2 V+3R3D_REFB_PA V+3R3D_PA

10u/10
100
D6764
10k
10k
D 1/19
10k
10k
10k
NM
GNDD 1 1
STBY
R6650
GNDD 1 0
LCTAW330J2520-T
10k
V+3R3D_REFA
1u/10
GNDD 9 GNDD GNDD L6601
GNDD
C V+3R3D_REFA 8
R6645
33u
R6620
R6621
R6637
R6632
R6642
NM
STBY
C6742
10k
C6739
C6640
C6720
C6721
C6722
C6723
C6724
C6725
GND_REFA 7
0.01u/50
0.01u/50
0.01u/50
100u/16
C6643
0.01u/50
0.01u/50
0.01u/50
0.01u/50
0.01u/50
C6644
C6645
VR_FADER4
NM
R6664
R6670
R6689
R6690
R6691
R6693
R6694
R6696
R6697
R6699
VR_FADER4 6
100k
100k
100k
100k
100k
100k
100k
100k
100k
100k
0.1u/16
C6745
VR_FADER3
VR_FADER3 5 0
CROSS_FADER
77 R6651
CROSS_FADER 4 STBY R6713
100k
VR_FADER2
VR_FADER2 3
VR_FADER1 GNDD
VR_FADER1 2 GNDD
80
79
78
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
1 22
GNDD_REFB_PA V+3R3D_PA
GND_REFA 10k
AVSS
P130
R6911
P140/PCLBUZ0/INTP6
P141/PCLBUZ1/INTP7
P142/xSCK20/SCL2
P143/SI20/RxD2/SDA2
P144/SO20/TxD2
P145/TI07/TO07
P00/TI00
P01/TO00
P02/SO10/TxD1
P03/SI10/RxD1/SDA1
P04/xSCK10/SCL1
P131/TI06/TO06
P20/ANI0
P21/ANI1
P22/ANI2
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7
P150/ANI8
P151/ANI9
P152/ANI10
P153/ANI11
P154/ANI12
P155/ANI13
P156/ANI14
P157/ANI15
FPGA_SIGNAL 81 50 R6703
SUB_INT R6912 82 49 ENC1_0
GNDD_REFA R6612
22
FL_LAT 83 48 ENC1_1
V+5D_LED R6625 R6704
FPGA_TX_DAT R6613 100 47
84 10k
R6665 220 100k 46
V+5D_LED 1 7 FPGA_RX_DAT 85 AVREF0 LED
P111/ANO1 P10/EX24/xSCK00
CN1002
GNDD_LED 1 6 FPGA_CLK 100 R6614 86 45 LED

P110/ANO0 P11/EX25/Si00/RxD0
R6667 220
V+5D_LED 1 5 SUB_CTRL R6618 87 P120/INTP0/EXLVI AVREF1 44 LED
P47/INTP2 P12/EX26/SO00/TxD0
V+3R3D_PA 10k 43
3-2
GNDD_LED 1 4 100 88 P46/INTP1/TI05/TO05 LED
P41/TOOL1 P13/EX27/TxD3
R6619 P45/SO01
STBY
V+5D_LED 1 3 10k 89 42 LED

R6608
C6629 P40/TOOL0 P44/SI01 P14/EX28/RxD3

R6611
NM
41
GNDD_LED 1 2 0.01u/50 90
xRESET
P43/xSCK01
P42/TI04/TO04
IC6601 P15/EX29/RTCDIV/RTCCL
LED
V+5D_LED 1 1 100 91 40 LE
P124/XT2 EVSS0 P16/EX30/TI01/TO01/INTP5
GNDD_LED 92 39 LE
GNDD_LED
GNDD
10
9
V+34D
10k
R6609
SUB_RST 93
P123/XT1 VDD
SUB uCOM P17/EX31/TI02/TO02
38
FLMD0 EVDD0 P57/EX15
P56/EX14 37
V+34D 8 94
DYW1830- /J
D 1/19
P122/X2/EXCLK P55/EX13
P77/EX23/KR7/INTP11
P76/EX22/KR6/INTP10
P31/TI03/TO03/INTP4
SUB_CPU_RESET
P75/EX21/KR5/INTP9
P74/EX20/KR4/INTP8
GNDD 7 95 P54/EX12 36
H 2/2
P30/INTP3/RTC1HZ
P121/X1 UPD78F1162AGF-GAS-K P53/EX11
GNDD_34D 6 96 35
C6631 P52/EX10
3-3
DSS1180-A REGC
GNDD X6601 1u/10 P51/EX9 34
P73/EX19/KR3
P72/EX18/KR2
P71/EX17/KR1
P70/EX16/KR0
EFX_ON/OFF 5 97
P05/CLKOUT
MVR_MUTE 1 3 VSS P50/EX8

33
P06/xWAIT
MVR_MUTE 4 2:10H 98
P65/xWR0
P66/xWR1
P61/SDA0
P67/ASTB
P60/SCL0
P64/xRD
P80/EX0
P81/EX1
P82/EX2
P83/EX3
P84/EX4
P85/EX5
P86/EX6
P87/EX7
V+3R3E 32
D V+3R3E 3 99
EVDD1
EVSS1
STBY_KEY 2
STBY_KEY 2 100 31
P62
P63
STBY_LED
STBY_LED 1 GNDD
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
CN6602 34 30
VKN1248-A
V+3R3D
V+3R3D_PA
GNDD_34D
C6642
0.1u/16
C6628
0.1u/16
V+3R3D
100k
100k
STBY VKN1933-A
RESET_OUT
RESET_IN
R6712
R6711
R6710
R6709
R6708
R6707
R6706
R7045
R6684
R6686
100k
100k
100k
100k
100k
100k
100k
100k
RxD
FLMDO
CLK_IN
GNDD GNDD
Debugger GNDD
Connector
LED_OUT0
LED_OUT1
LED_OUT2
LED_OUT3
LED_OUT4
LED_OUT5
LED_OUT6
LED_OUT7
MTX_SEL0
MTX_SEL1
MTX_SEL2
MTX_SEL3
MTX_SEL4
MTX_SEL5
MTX_SEL6
MTX_SEL7
STBY
MTX_SEL0
MTX_SEL1
MTX_SEL2
MTX_SEL3
MTX_SEL4
MTX_SEL5
MTX_SEL6
MTX_SEL7
CN6603
VKN1842-A
LED_OUT15 2 7
MTX_SEL7A 2 6
LED_OUT15
MTX_SEL7A
H 2/2 BFX1_SW
S660
DSG
C
2:6B
GND_LED 2 5 VR_SEL_0_1
E NC 24 GNDD_LED_PA
STBY
S660
GNDD 2 3 2:6B BFX2_SW
VR_SEL_0_0
EFX_CH_SEL 2 2 DSG
KEY_IN3 C
KEY_IN3 2 1
R6602 ENC1_1
H 2/2
CN7001
ENC1_1 2 0 STBY
22
KEY_IN4
KEY_IN4 1 9 S660
R6603 BFX3_SW
ENC1_0
ENC1_0 1 8
22 DSG
KEY_IN5
KEY_IN5 1 7 C
MTX_SEL5
MTX_SEL5 1 6 STBY
KEY_IN6
KEY_IN6 1 5 S660
MTX_SEL6 BFX4_SW
MTX_SEL6 1 4
KEY_IN7 DSG
KEY_IN7 1 3
C
MTX_SEL7
MTX_SEL7 1 2
I
STBY
EFX_ON/OFF 1 1
CROSS_FADER
GNDD_REFB_PA 1 0
VR_FADER4
VR_FADER2
VR_FADER3
VR_FADER1
GNDD 9
GNDD_REFB_PA
8
GNDD 2:8F
HP_MIX HP_MIX
V+3R3D_REFA_PA
V+3R3_REFA_PA 7 V+3R3D_REFA_PA V+3R3D_REFA_PA V+3R3D_REFA_PA V+3R3D_REFA_PA
2:9G
HP_LEVEL 6
HP_LEVEL
5 Conn.color:WHITE Conn.color:RED Conn.color:WHITE Conn.color:RED
CROSS_FADER
DA2J101
DA2J101 DA2J101
DA2J101 DA2J101
DA2J101 DA2J101
2:8G
LEVEL_DEPTH 4
H 2/2
D6615
D6618
D6620
D6622
LEVEL/DEPTH
GNDD_REFA_PA 3 GNDD_REFA_PA 1 V+3R3D_REFA 1 GNDD_REFA 1 V+3R3D_REFA 1 GNDD_REFA
2
2:8G
BOOTH_LEVEL 2 VR_FADER1 2 VR_FADER2 2 VR_FADER3 2 VR_FADER4
BOOTH_LEVEL
C6618
DA2J101
V+3R3D_REFB_PA
D6616
C6630
D6619
C6633
D6621
C6641
D6623
0.1u/16
0.1u/16
0.1u/16
0.1u/16
V+3R3_REFB_PA 1 3 3 V+3R3D_REFA 3 GNDD_REFA 3 V+3R3D_REFA

GNDD_REFA
2:8F
CN6609
F EFX_CH_SEL CN6611
KM200NA3
CN6610
KM200NA3R
CN6612
KM200NA3 KM200NA3R
GNDD_REFA_PA GNDD_REFA_PA GNDD_REFA_PA GNDD_REFA_PA
H 1/2 K CN7201 L CN7401 M CN7601 N CN7801

146 DJM-750-K
1 2 3 4
5 6 7 8
H 1/2 PNLA ASSY (DWX3439) A

STBY
R6876
NM
S6602
DSG1079-A TAP LEVEL METER INDICATORS CH1 CH2 CH3 CH4 MST L MST R
STBY
C6647
NM
R6823 TALK OVER
D6626
D6643
D6659
D6678
D6696
D6711
D6735
NM
STBY
OVER
R7047
R7046
R7050
R7049
R7048
JP
JP
GNDD (RED)
JP
JP
JP
R6750 R6824 SLR-343VC(NPQ)
S6604 (RED)
R6729
SLR-343VC(NPQ)
LED_OUT0 75 75
Q6607
DSG1079-A BEAT UP LSCR523UB STBY
C6649 3k
R6733
30k
R6818
D6731
D6627
R6951
D6644
D6660
D6679
D6697
D6712
MIDI ON/OFF
10
R7041
R7040
R7039
R7038
STBY NM
JP
NM
JP
JP
JP
JP
R6815 (AMBER)
S6603
GNDD R6751 JP SLI-343YYW(TUV)
R6715 75 R6950 68
BEAT DOWN LED_OUT1 Q6608
DSG1079-A
LSCR523UB STBY
C6648 3k
30k
R6810
R6734
R6949
D6628
D6645
R6995
D6661
R7009
D6680
R7030
D6698
R7037
D6713
D6727
R6953
FADER START2
STBY NM
7
JP
JP
JP
JP
JP
JP
NM
GNDD R6752 R6811
(AMBER)
SLI-343YYW(TUV)
R6716 560 82
LED_OUT2 Q6605
LSCR523UB STBY
3k
30k
R6806
R6731
R6948
D6629
D6646
D6662
D6681
D6699
D6714
D6728
4
R6952
R6994
R7008
R7029
R7036
FADER START3
JP
JP
JP
JP
JP
JP
NM
(AMBER)
R6753 R6812
SLI-343YYW(TUV)
LED_OUT3 R6717
Q6606
560 82 B
LSCR523UB
3k
30k
R6732
R6947
D6630
D6647
R6993
D6663
R7007
D6682
R7028
D6700
R7035
D6715
R6966
JP
JP
JP
JP
JP
JP
R6754
R6714 560
LED_OUT4 Q6609 (AMBER)
LSCR523UB SLI-343YYW(TUV)
R6735
D6648
3k
30k
R6946
1
D6631
R6965
D6664
D6683
D6701
D6716
R6992
R7006
R7027
R7034
JP
JP
JP
JP
JP
JP
R6764
H 2/2
560
2:6A LED_OUT5 R6718
Q6610
VR_BUS LSCR523UB
3k
30k
R6736
D6632
D6649
R6991
D6665
R7005
D6684
R7026
D6702
R7033
D6717
0 R6945
R6964
JP
JP
JP
JP
JP
JP
R6755
LED_OUT6 R6719 68
Q6611 (GREEN)
LSCR523UB SLR-343MC(NPQ)
30k
3k
R6737
-1
D6633
D6650
D6666
D6685
D6703
D6718
R6963
R6990
R7004
R7025
R7032
JP
JP
JP
JP
JP
R6756
LED_OUT7 R6720 68
Q6612
LSCR523UB
R6738
3k
30k
-2
D6634
D6651
D6667
D6686
D6704
D6719
R6962
R6989
R7003
R7024
R7031
JP
JP
JP
JP
JP
FB_PA V+3R3D_PA
R6757
68
LED_OUT8 R6721
LCTAW330J2520-T Q6613
LSCR523UB
STBY
STBY
R6829
R6847
R6859
R6835
R6850
R6862
L6601
NM
NM
3k
30k
R7023
47
12
47
12
R7002
R7016
D6635
R6961
D6652
D6668
D6687
D6705
D6720
-3
R6739
R6988
JP
33u
C
LSAR523UB
JP
JP
LSAR523UB
JP
JP
NM
STBY
C6742
Q6641
Q6638
R6758
100u/16
C6645
Q6644 Q6647
NM
68 LSAR523UB LSAR523UB
R6722
LED_OUT9 Q6614 (BLUE)
0 LSCR523UB
(BLUE)
R6830
R6836
EFFECT1
D6736
EFFECT4
30k
D6739
3k
470
470
R6740
D6636
D6653
D6669
R7001
D6688
D6706
D6721
TBY
R6960
R6713
-5 SLR343BC4T(JK)
R6987
SLR343BC4T(JK)
JP
JP
JP
R6856
R6759
GNDD JP
_PA V+3R3D_PA
R6723
68
10k LED_OUT10 Q6615
STBY
STBY
R6831
R6848
R6860
R6833
R6849
R6861
R6703 LSCR523UB
NM
NM
47
12
47
12
30k
R7000
3k
R6741
D6637
R6959
D6654
D6670
D6689
D6707
D6722
ENC1_0
-7
LSAR523UB
R6986
LSAR523UB
JP
JP
JP
ENC1_1
Q6640
Q6639
R6704 R6760 Q6645 Q6646
10k LSAR523UB LSAR523UB
68
R6724
LED_OUT15 LED_OUT11 Q6616
(BLUE)
R6832
R6834
LSCR523UB (BLUE)
D6737
470
470
D6738
LED_OUT14 EFFECT3
30k
3k
R7020
EFFECT2
-10
D6638
D6655
D6671
R6999
D6690
R7013
D6708
D6723
R6742
R6958
R6985
JP
LED_OUT13
JP
JP
JP
R6855
JP
LED_OUT12 R6761
SLR343BC4T(JK) SLR343BC4T(JK) JP
LED_OUT11 R6725 68 GNDD_LED_PA
LED_OUT12 Q6617 GNDD_LED_PA
LED_OUT10 LSCR523UB SLR-343VC(NPQ)
3k
30k
R 6 9 2 1 STBY
R7019
R6998
R7012
-15
D6639
R6957
D6656
D6672
D6691
D6709
D6724
D6787
LED_OUT9
R6743
R6984
JP
JP
JP
JP
BOOST
JP
LED_OUT8 NM
R6762 R6922 (RED)
75
SOUND COLOR FX
68
LED_OUT13 R6726 (RED)
Q6618 SLI-343U8R(HJK)
LSCR523UB
30k
R6744
D6780
D6781
3k R7055
D6740
D6779
-24
D6640
D6657
D6673
D6692
D6710
R6955
R6982
D6725
82
JP
JP
R6914
R6763
82
68 R6915
R6727
LED_OUT14 Q6619 82
2SC4097(R) R7056
D
R6745
1k
30k
82 R7058
D6694
D6625
D6641
D6782
D6642
D6658
D6783
D6674
D6676
D6784
D6693
D6695
D6785
D6675
D6677
D6786
82
R7057
82 R7060
100
R 6 7 6 71 0 0
100
R 6 7 7 51 0 0
100
R 6 7 8 21 0 0
100
R 6 7 9 31 0 0
100
R 6 7 8 31 0 0
100
100
R6770 NM
R6916 NM
R6779 NM
R6917 NM
R6788 NM
R6918 NM
R6798 NM
R6919 NM
R6789 NM
R6920 NM
82
R7059
R6769
R6776
R6784
R6796
R6785
R6799
R6797
82
STBY STBY STBY STBY STBY

LSCR523UB
Q6621
CH1 CUE CH2 CUE CH3 CUE CH4 CUE MAS CUE EFX CUE
R6749
R6730
STBY
LED_OUT15
NM
(AMBER) (AMBER) (AMBER) (AMBER) (AMBER) (AMBER)

30k
R6747
3k
(AMBER)
GNDD SLI-343YYW(TUV)
GNDD_LED_PA
V+5D_LED_PA
MTX_SEL5
MTX_SEL6
MTX_SEL7
C6656
V+5D_LED_PA
0.1u/16
V+5D_LED_PA
C6657
R6765
0.1u/16
22k
2SB1689
Q6623
V+5D_LED_PA
C6658
R6771
0.1u/16
22k
R6766
390
S6605
2SB1689
BFX1_SW
Q6625
LTC143EUB
C6659
V+5D_LED_PA
0.1u/16
R6777
EFFECT1
22k
R6772
DSG1079-A
Q6622
390
C6650 MTX_SEL1
2SB1689
Q6627
2SB1689 C6660
V+5D_LED_PA V+5D_LED_PA V+5D_LED_PA

E
0.1u/16
LTC143EUB
R6786
STBY NM
22k
R6778
Q6624
390
GNDD MTX_SEL2
2SB1689
S6606
Q6629
C6661
BFX2_SW
LTC143EUB
R6794
C6662
C6663
0.1u/16
0.1u/16
0.1u/16
22k
R6787
Q6626
EFFECT2
Q6628 390
DSG1079-A MTX_SEL3
C6651
Q6631
LTC143EUB
R6821
R6826
R6802
22k
22k
22k
R6795
STBY NM
2SB1689
2SB1689
390
2SB1689
MTX_SEL4
Q6635
Q6637
GNDD
Q6633
LTC143EUB
S6607
BFX3_SW
R6803
R6822
R6827
Q6630
Q6632 390
390
390
EFFECT3 MTX_SEL5
DSG1079-A
LTC143EUB
C6652
STBY NM MTX_SEL6
LTC143EUB
S6608
GNDD
Q6634
BFX4_SW MTX_SEL7
DSG1079-A EFFECT4
LTC143EUB
C6653
Q6636
MTX_SEL0
STBY NM
GNDD
MTX_SEL7A
R6768
R6774
R6781
R6792
R6800
R6804
R6885
R6886
56k
56k
56k
56k
56k
56k
56k
56k
olor:RED
GNDD_LED_PA
1 GNDD_REFA
2 VR_FADER4
NOTES
3 V+3R3D_REFA NM is STBY
6609
00NA3R
RS1/10SR***J
F
D
F
RS1/10SR****D
RS1/10SR****F
CKSRYB
H 1/2
CH
CCSRCH ***** (Legend silk indication on the PCB.)
CN7801 CEAT
DJM-750-K 147
5 6 7 8
1 2 3 4
10.30 PNLA ASSY (2/2)
H 1/2 NOTES
A BEAT EFX VR_BUS
SELECT 1:8D
NM is
H 1/2
5
R
5
DSX1068-A
4
D
4
KEY_PNLA R
S6622
3
1:6C
3
F
R
2
2
C
1
1
MTX_SEL7 CH
C
MTX_SEL6
MTX_SEL5 C
MTX_SEL4
MTX_SEL3
MTX_SEL2
H 1/2
MTX_SEL1 VR_SEL_0_0
MTX_SEL0
1:7J
CH3 FD CH1 CUE AUTO

1:7J
VR_SEL_0_1
START
S6642
DSG1079-A
S6620
DSG1079-A
S6625
DSG1079-A H 1/2
B
DA2J101
D6755
DA2J101
DA2J101
D6776
D6760
KEY_IN0 D6756
CH2 FD IN1 SELECT IN3 SELECT DA2J101

DA2J101
DA2J101
CH2 CUE CH4 CUE MASTER CUE CH3 CUE
START
D6747
D6773
VR_IN2
S6616 S6614
S6641 S6619 S6617 S6628 S6618
DSG1079-A DSG1079-A DSG1079-A DSG1079-A DSG1079-A
1
CD/LINE CD/LINE
2
470p
470p
470p
470p
PHONO LINE
DA2J101
3
DA2J101
DA2J101
DA2J101
DA2J101
D6752
D6763
D6742
D6754
D6753
USB(1/2) USB(5/6)
4
4
DA2J101
C6668
C6671
C6735
C6673
DA2J101
5
D6774
D6775
DSH1058-A DSH1058-A
KEY_IN1 D6751
DA2J101
MIDI BOOST EFX CUE G
C ON/OFF VR_IN4
S6623 S6644 S6627
DSG1079-A DSG1079-A DSG1079-A
DA2J101
DA2J101
D6757
D6778
DA2J101
D6762
KEY_IN2 D6750
DA2J101
DA2J101
DA2J101
DA2J101
D6743
D6746
D6745
MIDI MASTER
START/STOP S6612 S6615 S6613
MONO/ST
S6621
S6624
1
DSG1079-A DSH1066-A
1
CD/LINE
OFF
2
CD/LINE
2
ON LINE 1 C2 3
3
PHONO
DA2J101
3
D6759
DA2J101
TALK USB(3/4)
D6758
USB(7/8)
4
DA2J101
OVER
DA2J101
DA2J101
MONO STEREO
D6744
D6771
5
5
D6772
DSH1058-A DSH1058-A DSH1058-A

KEY_IN3 VR_IN1
D6749
D
DA2J101
MIC ON/OFF IN2 SELECT IN4 SELECT
470p
470p
470p
470p
/TALKOVER
C6733
C6670
C6672
C6734
VR_IN3
H 1/2
VR_SEL_1_0
1:6C
1:6C
VR_SEL_1_1
E H 1/2
VR_master
VR_boost
VO
SE
VR_IN5
470p
470p
470p
470p
C6664
C6666
C6736
C6669
F
GNDD_RE
VR_IN6
H 2/2
148 DJM-750-K
1 2 3 4
5 6 7 8
NOTES
NM is STBY
H 2/2 PNLA ASSY (DWX3439) A
RS1/10SR***J
D
RS1/10SR***D
F
RS1/10SR***F
CKSRYB
CH1 EQ HI CH2 TRIM CH1 TRIM CH2 EQ HI
CH
CCSRCH
V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA
V+3R3D_REFB_PA
CEAT C6709
VR6611 C6731 C6729
1/2 2
3
0.1u/16
1
0.1u/16 0.1u/16
VR6608
C6704
0.1u/16
2 2 2
EL_0_0 5 3 1 3 1 3 1
6 4 5
DCS1104-A DCS1104-A
6 4
J DCS1100-A VR6622 VR6621
EL_0_1
GNDD_REFB_PA GNDD_REFB_PA GNDD_REFB_PA DCS1100-A
GNDD_REFB_PA
1/2
B
VOLUME V+3R3D_REFB_PA
SELECT MIC EQ HI CH1 EQ LOW CH1 EQ MID MIC EQ LOW
0.1u/16
C6680
IC6602 V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA
1 16
0Y VCC C6701 C6714 C6716 C6710
VR6605 VR6616 VR6618 VR6612
2 15 GNDD_REFB_PA
2Y 2X 0.1u/16 0.1u/16 0.1u/16 0.1u/16
N2 3
2 2 2 2
14
Y_COM 1X 3 1 3 1 3 1 3 1
4 13 5 5 5 5
3Y X_COM 6 4 6 4 6 4 6 4
5 12
1Y 0X DCS1100-A
DCS1100-A DCS1100-A DCS1100-A
6 11
470p
470p
470p
470p
INH 3X
GNDD_REFB_PA GNDD_REFB_PA GNDD_REFB_PA GNDD_REFB_PA
7 10
470p/50
470p/50
470p/50
470p/50
VEE A
8 9
C6668
C6671
C6735
C6673
GND B
C6689
C6696
C6692
C6694
C6682
C6684
STBY
NM
NM
TC74HC4052AF
GNDD_REFB_PA CH3 EQ HI CH4 TRIM CH3 TRIM CH4 EQ HI

GNDD_REFB_PA GNDD_REFB_PA
V+3R3D_REFB_PA
N4 V+3R3D_REFB_PA
V+3R3D_REFB_PA
V+3R3D_REFB_PA C
C6707 C6730
VR6609 C6702
C6732 VR6606
0.1u/16 0.1u/16
2 0.1u/16
2 0.1u/16 2
3 1 2 3 1
VR_SEL_0_0 5 3 1
3 1 5
6 4 DCS1104-A 6 4
VR_SEL_0_1 DCS1104-A
VR6624
DCS1100-A VR6623 DCS1100-A
GNDD_REFB_PA
GNDD_REFB_PA
V+3R3D_REFB_PA
VOLUME
SELECT CH2 EQ MID CH3 EQ LOW CH3 EQ MID CH2 EQ LOW
0.1u/16
C6679
V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA

IC6603 V+3R3D_REFB_PA
1 16 C6699 C6715
0Y VCC VR6603 VR6614 C6712 VR6617
VR6604 C6700
2 15 GNDD_REFB_PA 0.1u/16 0.1u/16 0.1u/16
2Y 2X 2 2 2 0.1u/16
N1 3 14 3 1 3 1 3 1 2
Y_COM 1X 3 1
5 5 5
4
3Y X_COM
13
6 4 6 4 6 4 5 D
5 12
6 4
1Y 0X DCS1100-A DCS1100-A DCS1100-A
470p
6 11 DCS1100-A
470p
470p
470p
INH 3X GNDD_REFB_PA GNDD_REFB_PA GNDD_REFB_PA

GNDD_REFB_PA
470p/50
470p/50
470p/50
470p/50
7 10
VEE A
8 9
C6733
C6670
C6672
C6734
GND B
C6681
C6683
STBY
C6687
C6690
C6737
C6738
NM
NM
TC74HC4052AF
CH4 EQ LOW CH4 EQ MID MASTER BALANCE
GNDD_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA
V+3R3D_REFB_PA
N3 C6711 C6697
VR6613 VR6601 C6698
0.1u/16 0.1u/16
2 2
/2 0.1u/16
3
3 1 3 1
2
5 5
EL_1_0 6 4 6 4
1
C
DCS1100-A DCS1100-A VR6602
C
EL_1_1 H 1/2 GNDD_REFB_PA GNDD_REFB_PA DCS1097-A
GNDD_REFB_PA MASTER LEVEL
V+3R3D_REFB_PA
/2 R6680
0
HP_MIX
1:3K C6703
E
R6935 EFX_CH_SEL 0.1u/16
0
3
1:3L
aster
2
oost
1
V+3R3D_REFB_PA
VOLUME VR6607
SELECT DCS1096-A
0.1u/16
C6676
GNDD_REFB_PA
IC6604
1
0Y VCC
16
R6683
H 1/2 SOUND COLOR FX
V+5D_LED_PA
V+3R3D_REFB_PA
R6869
2 15 GNDD_REFB_PA BOOTH_LEVEL 10k

2Y 2X 1:3L V+3R3D_REFB_PA
R6868
R6682
N5 3 14 0
MASTER VOLUME MUTE
1M
LEVEL/DEPTH
STBY
Y_COM 1X
R6865
1:3K
NM
4 13
R6866
0 C6719
3Y X_COM VR6620 V+5D_LED_PA
22k
R6681 IC6605
5 12 HP_LEVEL 0.1u/16
1Y 0X 1:3K 2 1 8
6 11 3 1
470p
470p
470p
470p
0
INH 3X
H 1/2 5 2 7
STBY
C6740
C6741
7 10 Q6650
C6717
0.1u/16
NM
NM
VEE A 6 4 LTA143EUB
470p/50
470p/50
470p/50
470p/50
3 6
8 9
C6664
C6666
C6736
C6669
GND B DCS1095-A 4 5
C6685
C6686
C6688
C6691
R6867
C6705
C6706
0.1u/16
0.1u/16
C6677
C6678
GNDD_REFB_PA
1k
NM
NM
TC74HC4052AF GNDD_REFB_PA
NJM2903M
STBY
MVR_MUTE
F
GNDD_REFB_PA 1:3G GNDD_REFB_PA GNDD_LED_PA
N6 GNDD_REFB_PA GNDD_REFB_PA
H 1/2 1.
2.
OUTPUT1
-INPUT1
8.
7.
V
OUTPUT2
3.
4.
+INPUT1
GND
6.
5.
-INPUT2
+INPUT2 H 2/2
DJM-750-K 149
5 6 7 8
1 2 3 4
10.31 PNLB and FADC ASSYS
HP_LEVEL HP_MIX LEVEL DEPTH BOOT

A I PNLB ASSY (DWX3440) V+3R3_REFB_PB
DCS1096-A
V+3R3_REFB_PB V+3R3_REFB_PB
V
DCS1096-A
VR7001
C7008 C7010
DCS1097-A
C7012
VR7004
VR7003
VR7002
0.1u/16 0.1u/16
3
0.1u/16
3
DCS1100-A 0
2
3
1
2
3
2
1
5
1
4
1
6
BOOTH_LEVEL
LEVEL_DEPTH
GNDD_REFB_PB GNDD_REFB_PB
GNDD_REFB_PB
HP_LEVEL
HP_MIX
V+3R3_RE
B CH SELECTOR C7016
0.1u/1
EFX_CH_SEL
R7021 R7020
220
330
R7027 R7026 R7025 R7024 R7023 R7022
S7002
390
TIME 2
3
S7001
510
: Voltage measuring point DSX1064-A 4
3 COM
ENC1_1
2 B
1 5
750
10 6
ENC1_0
1 A
R7013
7
2.2k
0.01u/50
0.01u/50
C7007
C7009
8
1.1k
9
DSG1098-A
C CN7001
1.8k
GNDD_REFB_PB
VKN1842-A
LED_OUT15 GNDD
3.6k
LED_OUT15 2 7
LED_MTX_SEL7_A
MTX_SEL7A 2 6
LED_MTX_SEL7_A SLI-
GND_LED 2 5
NC 2 4 EFFE
GNDD 2 3
D7005
D7007
EFX_CH_SEL
EFX_CH_SEL 2 2 SLI-343YYW(TUV)
KEY_IN3
KEY_IN3 2 1
ENC1_1
ENC1_1 2 0
R7018
R7019
R7028
R7029
150
150
150
KEY_IN4
KEY_IN4 1 9
ENC1_0
ENC1_0 1 8
KEY_IN5
CN6603
KEY_IN5 1 7
MTX_SEL5
MTX_SEL5 1 6
KEY_IN6
KEY_IN6 1 5
MTX_SEL6
MTX_SEL6 1 4
KEY_IN7
D KEY_IN7 1 3 LED_OUT15 R7002
Q7002
MTX_SEL7
MTX_SEL7 1 2 LSCR523UB
H 1/2
3k
EFX_ON/OFF
R7004
EFX_ON/OFF 1 1
30k
GNDD_REFB_PA 1 0
GNDD 9
HP_MIX
HP_MIX 8
V+3R3_REFA
V+3R3_REFA_PA 7 GNDD_LED
HP_LEVEL
HP_LEVEL 6
CROSS_FADER
CROSS_FADER 5
LEVEL_DEPTH
LEVEL_DEPTH 4
V+3R3_REFB
GNDD_REFA_PA 3
BOOTH_LEVEL
BOOTH_LEVEL 2
V+3R3_REFB_PA 1
GNDD GNDD_LED
GNDD_REFB
E
GNDD_REFA
R7041
JP
V+3R3_REFA V+3R3_REFA_PB V+3R3_REFB V+3R3_REFB_PB
39 38
C7005
C7004
C7006
47u/35
C7002
47u/35
0.1u/16
0.1u/16
GNDD_REFA GNDD_REFA_PB GNDD_REFB GNDD_REFB_PB
I
150 DJM-750-K
1 2 3 4
5 6 7 8
TH BOOTH LEVEL
A
V+3R3_REFB_PB
DCS1096-A
VR7004
C7015
0.1u/16
3
2
1
BOOTH_LEVEL
B_PB
GNDD_REFB_PB
MTX_SEL7
V+3R3_REFB_PB MTX_SEL6
ECTOR C7016
B
0.1u/16 MTX_SEL5
HP MONO/ST
R7021 R7020
220
S7008
DSH1066-A
GNDD_REFB_PB
330
DA2J101
D7016
R7027 R7026 R7025 R7024 R7023 R7022
2
390
1 C2 3
MONO STEREO
510
4 KEY_IN3
KEY_IN7
5
750
6 CRFD ASSIGN CRFD ASSIGN CRFD ASSIGN

7 CH3 CH4 CH1
S7010 S7012 S7009
1.1k
1
D7017 D7021 D7014
1098-A A A A
C
2
1.8k
DA2J101 THRU DA2J101 DA2J101

THRU THRU
3
3
D7018 D7022 D7015
B B B
4
3.6k
DA2J101 DA2J101 DA2J101
5
KEY_IN6 DSH1058-A DSH1058-A DSH1058-A
SLI-343YYW(TUV)-TS
EFFECT ON/OFF
(AMBER) CHFD CURVE
D7005
D7007
UV) S7013
DSH1066-A
R7018
R7019
R7028
R7029
150
150
150
150
DA2J101
1 C2 3
D7024
KEY_IN5
CRFD ASSIGN CRFD CURVE

CH2 S7014 D
DSH1066-A
S7015
S7011 EQ/ISO
1
1
DA2J101 D7025
2
A
2
DA2J101
D7019
THRU
3
3
D7026
DA2J101
DA2J101 1 C2 3
D7027
4
B
4
DA2J101
D7020
ISOLATOR EQ
5
5
DSH1058-A DSH1058-A
KEY_IN4
S7007
DSG1079-A
EFX_ON/OFF EFFECT ON/OFF
C7017
NM
J FADC ASSY (DWX3438)
GNDD
R8001
E
V+3R3_REFA_PB 0
STBY
P8001
R7041
R7042
P7001
NM
NM
JP
CN8001
CN7002
KM200NA3LE
DA2J101 DA2J101
KM200NA3E VR8001
D7012
DCV1006-A
GNDD_LED
3 V+3R3REF2 V+3R3REF2 3 2
CROSS_FADER 1 3
2 VR_CFD VR_CFD 2 5
C7018
D7013
4 6
0.1u/16
1 GNDREF2
GNDREF2 1
D8001
GNDD_REFA_PB
Connector Color:Blue
NM
STBY
NOTES NM is STBY
GNDF F
RS1/10SR****J Notes
CKSRYB
NM is STBY
CEAT***
I J
RS1/10SR***J
DJM-750-K 151
5 6 7 8
1 2 3 4
10.32 FAD1 to FAD4 ASSYS
A
K FAD1 ASSY (DWX3434)
CN7201
KM200NA3L
GNDREF2 3 2
H 1/2 VR_FD1 2
1 3
5
CN6611 V+3R3REF2 1
4 6
VR7201
DCV1020-A
B
White
L FAD2 ASSY (DWX3435)
CN7401
KM200NA3LR
C 1 2
H 1/2 GNDREF2
VR_FD2 2
1 3
5
CN6610 V+3R3REF2 3
4 6
VR7401
DCV1020-A
Red
M FAD3 ASSY (DWX3436)

D
CN7601
KM200NA3L
V+3R3REF2 1
H 1/2 VR_FD3 2
2
3 1
CN6612 GNDREF2 3 5
6 4
VR7601
White DCV1020-A
E
N FAD4 ASSY (DWX3437)
CN7801
KM200NA3LR
V+3R3REF2 3
H 1/2 VR_FD4 2
2
3 1
CN6609 GNDREF2 1 5
6 4
VR7801
F Red DCV1020-A
K L M N
152 DJM-750-K
1 2 3 4
5 6 7 8
10.33 REG ASSY
O REG ASSY (DWR1528)

STBY
D5003
NM
V+15A_UNREG !
IC5002 V+15A
NJM7815FA
IN 1
OUT B
3 COM
RB501VM-40
2
0.01u/50
C5002
1000p/50
0.01u/50
C5005
C5010
C5008
C5013
D5004
0.1u/25
1u/25
SQ
V+15A_UNREG
V+15A V+5A V+5A_UNREG
32 29 CN5001
30
RB501VM-40
GND_PO 52147-1010
1000p/50
0.01u/50
0.01u/50
C5003
C5009
C5014
C5011
D5005
0.1u/25
27
1u/25
C5006
SQ
GNDA_ STBY 1 V+5A_UNREG

UNREG 2 GND5A_UNREG
R5001
3
3 GND5A
2 COM NM C
IN OUT1 4 V+5A
! IC5003 5 V-15A
E 1/2
V-15A_UNREG NJM7915FA V-15A 6 V-15A_UNREG CN4
D5001
7 GNDA_UNREG
NM 8 GND_PO
STBY
9 V+15A_UNREG
STBY
10 V+15A
D5002
31 28
NM
V+5A_UNREG V+5A
GND5A_UNREG
! IC5001 V-15A
NJM7805FA GND_PO
1 GND5A
IN OUT V-15A_UNREG D
3 GND
CCG1205-A
2 STBY
10V
0.01u/50
C5001
GNDA_UNREG
1000p/50
0.01u/50
C5012
C5004
C5015
C5007
C5016
0.1u/16
NM
2.2u
GND5A_UNREG GND5A : Voltage measuring point

Notes
E
NM is STBY
CH CCSRCH***J F
CAUTION SQ CKSQYB***K F
Pin-Signal name of NJM7805FA is different CKSRYB***K F
in the specification and the circuit symbol.
Specification circuit symbol

7805A
JRC
1pin INPUT OUT Therefore, when replacing, be sure to use parts
of identical designation.
2pin GND GND
3pin OUTPUT IN IN GND OUT

spec 1 2 3
symbol 3 2 1
O
DJM-750-K 153
5 6 7 8
1 2 3 4
10.34 TRANS, PRIMARY and ACSW ASSYS
A
Q PRIMARY ASSY
(DWR1535: SYXJ8,KXJ5,XJCN5)
AC POWER CORD AC INLET
ADG7062: SYXJ8,LXJ DKP3916: SYXJ8, KXJ5, XJCN5, LXJ (DWR1537: UXJCB)
ADG7115: KXJ5
ADG7105:
DDG1108:
XJCN5
UXJCB
DKP3915: UXJCB
(DWR1530: LXJ)
! ! AC IN FILTER
! ! !
AC POWER CODE AC INLET CN3001 C3001 ! L3001
C3003
RKP1751-A ACE7027-A ACG7030-A
DTL1131-A
4 3
NEUTRAL 2
LIVE 1
H3002
AKR1004-A 1 2
H3001
AKR1004-A
FU1
B ! AEK1052- 5-1
T630mAL 250V
J3009 OTHERS
R ACSW ASSY (DWR1532) J3008 LXJ ONLY
4
VOLTAGE SELECTOR
LX
STBY !
POWER SW C3002
S3001
AKX7020-A
! ! NM
1
1
JP9401 CN3002 V+11E_UNREG
B2P3-VH AC220V-240V AC
! RY3001
VIOLET ASR7029-A
1
C9401
S9401
DSA1037-A ACG7030-A
2
RELAY 3
J3007
! 3300p BLUE
2
OTHERS
! 4 1
2
D3002
Board in Cable
C DKP3847-A
DA2J101
R3002
33
STBY
R3001
! NM
Q3001
KTC3209(Y)
COVER FOR "C9401":DEC3212- D3001
STBY
R3003
NM
DAN217UM
R3004
(F)
10
GNDD
R3005
(F)
12
D GNDD
• NOTE FOR FUSE REPLACEMENT

CAUTION - FOR CONTINUED PROTECTION AGAINST RISK OF FIRE,
REPLACE ONLY WITH SAME TYPE NO. 218.630 MFD. BY
LITTELFUSE INC. FOR FU1.

of identical designation. LXJ ONLY
E JP3101 !
DDX1285-A
VIOLE
NEUTRAL
BROW
110V~120V
BLUE
220V~240V
: Waveform measuring point JP3102
DDX1284-A
VIOLE
NEUTRAL
F
NOTES !
NM is STBY LIVE
BLUE
CKSRYB
P Q R OTHERS
154 DJM-750-K
1 2 3 4
5 6 7 8
SUB TRANS
T3001
DTT1245: SYXJ8, KXJ5, XJCN5
DTT1255: UXJCB STBY C3010 C3008 STBY
DTT1242: LXJ
NM NM
! 11
D3005 STBY V+11E_UNREG
1 10 D3003
1SR154-400 1SR154-400 P3001 5-2 JP3001
9 PF03PG-Q07
2 ! ! NM
8
3 7
3 V+11E_UNREG
D 2/19
CEAT222M25-F
! ! 2 GNDD
D3004
2200u/25
6 D3006
0.01u/50
C3006
C3007
4
5 1SR154-400 1SR154-400
1 RELAY_CONT
CN1201 B
0.047u/50
0.047u/50
C3004
C3005
C3011 C3009
J3009 OTHERS
NM NM
STBY STBY
J3008 LXJ ONLY KN3001
AKF7002-A
6
LXJ ONLY GNDD

1
! J3005
S3001 (USE)
AKX7020-A
3
AC220V-240V AC110V-120V
GNDF
J3007
OTHERS
LXJ ONLY
!
NOTES
CN3003 NM is STBY C
B3P5-VH
RS1/10SR***J
3 220 240V
(F)
2 110 120V RS1/10SR****F
1 NEUTRAL
CKSRYB
Y)
!
CN3004
B2P3-VH
2 LIVE
1 NEUTRAL
OTHERS
P TRANS ASSY
(DWR1536: SYXJ8,KXJ5,XJCN5)
(DWR1538: UXJCB)
(DWR1531: LXJ)
T3101
DTT1256: SYXJ8, KXJ5, XJCN5 S13B-EH
!
DTT1257: UXJCB
DTT1256: LXJ
CN3101
20 P3100
V+15_AC
C3101 13 V+15_AC
6 19
NM V+5A_AC1 0.1u/50
R3101 12 GNDF
18
V+5A_AC2
ONLY P3101 NM 0 SQ
C3102 11 V+5A_AC1
17
JP3101
0.1u/50
10 V+5A_AC2
E
! 16
P3102
C3103
X1285-A NM 0.1u/50
R3102 9 GNDF
5 15 V-15_AC
VIOLET 0 SQ
EUTRAL
P3103 NM
C3104
0.1u/50
8
7
V-15_AC
GNDA
E 1/2
13 C3105
3
V+13D_AC1 NM
C3106 6 V+13D_AC1 CN1
BROWN 0.1u/50
0V~120V C3107 5 V+13D_AC2
14
V+13D_AC2 0.1u/50
4 GNDD
11 C3108
NM
3 GNDHP
2 C3109
BLUE V+HP_AC NM
0V~240V C3110 2 V+HP_AC
12 NM
P3104 0.1u/50
1 V-HP_AC
C3111
P3102 0.1u/50
X1284-A 10 V-HP_AC
VIOLET JP3105
EUTRAL P3105 NM NM
GNDHP
! GNDA GNDD
F
LIVE
BLUE MAIN TRANS GNDF
ERS P Q
DJM-750-K 155
5 6 7 8
1 2 3 4
10.35 WAVEFORMS
A
Measurement Conditoion
IN or OUT Measure CH IN CH IN LEVEL IN FREQUENCY RL Other Settings Other Settings
IN CD/LINE CH1/2/3/4 0 dB 1K − TRIM LEVEL VR Center −
IN LINE CH2/3 0 dB 1K − TRIM LEVEL VR Center −
IN PHONO CH1/4 -40 dB 1K − TRIM LEVEL VR Center −
IN MIC MIC -40 dB 1K − TRIM LEVEL VR Center Center all EQs
IN RETURN RETURN 0 dB 1K − Level depth VR Center −
IN USB USB1/2/3/4 0 dB 1K − TRIM LEVEL VR Center −
OUT MASTER1/2 CH1/CD/LINE 0 dB 1K 10 kΩ MASTER LEVEL VR Center Center all EQs/FADER Max
OUT BOOTH CH1/CD/LINE 0 dB 1K 10 kΩ BOOTH LEVEL VR Center Center all EQs/FADER Max
OUT REC CH1/CD/LINE 0 dB 1K 10 kΩ − Center all EQs/FADER Max
B
OUT SEND CH1/CD/LINE 0 dB 1K 10 kΩ − Center all EQs/FADER Max
OUT HP CH1/CD/LINE 0 dB 1K 32 Ω HP LEVEL Center Center all EQs/FADER Max
OUT DIG OUT CH1/CD/LINE 0 dB 1K 75 Ω − Center all EQs/FADER Max
Measure the output waveforms at the CH1 CD/LINE input. TSET DISC <STD-905>
Track2 1 kHz 0 dB
Switch Type Setting Track6-2 1 kHz -40 dB
MASTER ATT : 0 dB Playbak in CDJ.
MONO/ST (HP) : ST
MON/ST (MASTER) : ST
CH FADER CURVE : Right side (linear)
C CROSS FADER CURVE : Center
CROSS FADER ASSIGN : THRU
MIC SW : ON
MASTER CUE : ON
COLOR VR : Center
ISOLATOR : EQ
* The waveform for a high-speed signal is obtained, using an FET probe.

Note that the waveforms at the high-frequency band will be attenuated (a curve will be damped) compared with those
indicated in this section if a passive probe (generally available) is used for diagnosis.
NOTE: The following waveforms were measured at the point of the corresponding
balloon number in the schematic diagram and PCB diagram.
A INPUT ASSY
2-1 INPUT SELECT (CD/LINE) 2-1 INPUT SELECT (PHONO) 2-2 CH1_L, R (CD/LINE) 2-3 CH1_L, R (PHONO)
V: 5 V/div. H: 200 μs/div. V: 5 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div. V: 20 mV/div. H: 200 μs/div.
156 DJM-750-K
1 2 3 4
5 6 7 8
D MAIN ASSY A
1-4 P122/X2/EXCLK 1-26 96k_CLK_13AD 1-42 RET_L, R 1-59 MASTER_L+, -

V: 1 V/div. H: 20 ns/div. V: 1 V/div. H: 2 μs/div. V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div.
1-60
1-8 24M576_CLK_FPGA 1-27 6M_CLK_13AD 1-48 BOOTH_L, R 1-61 MASTER_L+, -

V: 1 V/div. H: 10 ns/div. V: 1 V/div. H: 20 ns/div. V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div.
1-62
1-12 AHCLKR1/GP4[11] 1-28 24M_CLK_13AD 1-48 MASTER_L, R 1-63 MASTER2_L, R

V: 1 V/div. H: 10 ns/div. V: 1 V/div. H: 10 ns/div. V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div.
1-17 XTAL (24 MHz) 1-29 ADAT_CH1_ANA 1-48 REC_L, R 1-64 REC_L, R
V: 1 V/div. H: 20 ns/div. V: 1 V/div. H: 2 μs/div. V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div.
E
1-18 VINR+, - 1-34 MIC1 1-49 ADAT_BOOTH, REC, MASTER_L, R
V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 2 μs/div.
DJM-750-K 157
5 6 7 8
1 2 3 4
A
D MAIN ASSY E SEC/HP ASSY
1-72 SEND_L (SENDDAC output) 1-88 DOUT_SRC_BCK 1-96 BOOTH L, R 4-1 HP_L, R_OUT
V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 50 ns/div. V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div.
1-72 SEND_L (SEND output) 1-89 DOUT_SRC_DATA 1-97 FADER_START1, FADER_STOP1

V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 500 ns/div. V: 1 V/div. H: 100 ms/div.
Fader Start button ON
CH Fader MIN ↔ MAX H PNLA ASSY
3-13 FL_TXD
V: 1 V/div. H: 500 μs/div.
1-78 HP_L+, -, HP_R+, - 1-90 FPGASRC_MCLK 1-99 R3057, R3058

V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 10 ns/div. V: 1 V/div. H: 100 ms/div.
Fader Start button ON
CH Fader MIN ↔ MAX
3-14 FL_SCK
1-84 DIGITAL OUT 1-92 D+USB

V: 1 V/div. H: 500 ns/div. V: 200 mV/div. H: 100 ns/div.
3-15 FL_LAT
E
1-87 DOUT_SRC_LRCK 1-93 D-USB
V: 1 V/div. H: 2 μs/div. V: 200 mV/div. H: 100 ns/div.
3-16 FL_BK
158 DJM-750-K
1 2 3 4
5 6 7 8
DJM-750-K 159
5 6 7 8
1 2 3 4
11. PCB CONNECTION DIAGRAM

11.1 INPUT, MIC1 and MTRM ASSYS
A
SIDE A
CN8801 C MTRM ASSY

CN9001
CN8801
MTRM
DWX3442-
[[ G ]] DWX3441- MIC1
5 1
C7
C7
C9002
[[ G ]]
C9001
5 1
MIC1 TRIM
VR8801
5
6 CN9001 1
1
1
B
(DNP2708-B)
5
B MIC1 ASSY
JA9001
(DNP2708-B)
IC4001
A INPUT ASSY 2-1 2-2 2-3 2-1
KN4601
1 5 1 5
L R L R L R L R
INPUT JA4001 CH1 JA4002 CH2
DWX3432- C4022
C4024
J2001
J2002 DWX
J4044 J4028
V-15A
J4108
5
GND_CH2
GND_CH2
IC4001
J4107
J4001
2-3
1
C4026
C4028
J4079
J4102
J4043
J4056
CN4601
CN4601
5 1
5 1 J4063
J4072 V+15A
V+15A
J4020
V-15A
6 2 J4083
V-15A J4041
GND_MIC1
C4031
C4032
C4040
J4068
V-15A J4059
J4017
GND_CH2
J4009
C4043
GND_CH1
J4013 J4105
J4100 GND_CH2
J4021
GND_CH1
C4617 J4031
6
C4037
CN4602
V+15A C4047 C4050

J4035
J4015
CN4602
J4030
GND_PO
V-15A
5
V-15A
J4088
J4029
J4074
J4016 C4049 GND_PO
C4618
1
J4006 V+15A J4069

GND_CH1
J4092
J4024
V+15A
J4077
E
2
J4076
GND_CH1
J4106
GND_CH1
J4010
J4051
J4023
J4037
GND_STBY <-> GND_MIC1
GND_MIC1 C4048
C4801 C4802
MIC J4082
GND_MIC1
V+15A
J4008
J4011
V-15A
GND_PO
J4003
J4045
J4042
CN4801
1 CON
1 4
2.GND_PO
3.GND_PO
1.V+15A
1
4.V-15A
1 5
2
15 16
CN4801
F
E CN2
A B C
160 DJM-750-K
1 2 3 4
5 6 7 8
A
SIDE A
: Voltage measuring point NOTE FOR PCB DIAGRAMS :
ASSY : Waveform measuring point 1. The parts mounted on this PCB include all
necessary parts for several destinations.
For further information for respective desti-
nations, be sure to check with the sche-
matic diagram.
2. View point of PCB diagrams.

Connector Capacitor
B) B
SIDE A
SIDE B
P.C.Board Chip Part
IC4201
2-1 2-1
1
C
1
5 1 5 1 5 5
R L R L R L R L R
JA4201 CH3 JA4202 CH4
C4409
C4222
C4224
JA4401 L RETURN R JA4402
J4027 J4050
J4095 J4049
V-15A
GND_CH2
GND_CH3
GND_CH2
GND_CH3
J4040
5
J4001
J4018
IC4201
J4080
D
J4101
J4079
J4055
J4102
J4043
J4019
J4033
1
C4226
C4228
J4062
C4408
V-15A
J4061
J4025 V+15A
V-15A
V-15A
J4002
J4048 V+15A
J4032 V+15A
C4237
C4040
C4231
C4232
V-15A J4014
J4059 J4038
GND_CH2 GND_CH3
J4071 V-15A
GND_CH4
05 J4103 J4104 J4039

C4405
H2 GND_CH3
J4054
J4093 GND_CH4
J4047
C4047 C4050 C4044 C4247 C4249 C4243
GND_CH2
J4094
J4078
J4004
C4244
V+15A
J4086
GND_PO J4012
C4240
J4091
V+15A J4069 J4066 J4046

J4099 V-15A GND_CH4 E
GND_PO
C4248
V-15A
J4067
J4064 V+15A
GND_CH1 GND_CH3 GND_CH4 C4250

J4052
GND_CH2
J4087
GND_RET PC
J4089 J4005 J4073
J4081
J4022
MIC J4082
J4007 J4036 J4026 J4060 J4034

[[ G ]]
C7
CONTACT UPPER SIDE
10 CN4802 CN4803
3
20 10 20
1 5 15 25 1 5 15
CONTACT UPPER SIDE
2-4
CN4802 CN4803 (DNP2706-B) F
D CN1003 D CN1004
A
DJM-750-K 161
5 6 7 8
F
E
B
A
D
C
162
A
SIDE B
1
1
22.RET_R R4803
21.GNDIN_RET C4407
20.RET_IN
19.GNDIN_RET
IC4401
R4410 R4404
LF
18.RET_L C4402
R
17.GNDIN_RET
16.GNDIN_RET
1
R4408
IC4401
15.GNDIN_CH4 C4404
14.CH4_R R4406
13.GNDIN_CH4 VA4401
R4409
RETURN
12.CH4_SEL C4406
11.GNDIN_CH4
R4809
L
10.CH4_L R4407 R4405
9.GNDIN_CH4 C4403
8.GNDIN_CH4
7.GNDIN_CH3 R4403
A INPUT ASSY
C4401
6.CH3_R
5.GNDIN_CH3 R4820 R4229

4.CH3_SEL R4821 R4230 R4401
3.GNDIN_CH3 Q4202
2
2
1
2.CH3_L C4236
C4218
1.GNDIN_CH3
R4237
Q4204
IC4205
R4819 R4252 R4240 R4238
R4212 R4402
5
R4232
R4248 R4242 R4234 R4265
R
Q4202 Q4204
C4220
1
IC4205
C4223
R4244
R4220 C4216 C4208
C4235 C4242
PHONO4
R4251 R4257 C4230 R4219 C4215 C4207
5
C4229 C4221
C4219
R4264
L
R4243 R4211
1
R4246
R4236
R4210
R
R4228
IC4204
Q4206 R4241
E
C4246 C4217
DJM-750-K
R4827 C4241
Q4203 C4214 C4206
IC4204 Q4206
CD4
R4816 R4255
L
R4235
1
R4817 R4256 R4239
R4226
Q4201
1
C4205
CN4803
R4822 R4209
Q4203 Q4201
R4808 R4233
R4818 R4231 R4263
R4227 R4225
3
3
C4213 R4203
C4234 R4204
R4262
IC4203
R4250
5
R4807 R4208
R
R4815 R4261
R4224
1
R4247
IC4203
LINE3
C4212 C4204
C4239 C4211 C4203
R4249 C4233 R4223
L
5
R4260 R4207
R4826
R
R4206
1
R4823 25.GNDIN_CH2 R4814 R4245
24.CH2_R Q4205
E
23.GNDIN_CH2 C4245
R4222 C4210 C4202
IC4202
CD3
R4812 C4238 R4221 C4209 C4201

IC4202 Q4205
22.CH2_SEL R4253 R4254 R4259

L
21.GNDIN_CH2
CN4802
R4811 R4205
20.CH2_L R4258
19.GNDIN_CH2
R4805 18.GNDIN_CH2 C4036
4
4
R4202
IC4005
17.GNDIN_CH1 R4050
R4831 16.CH1_R R4201
R4829 15.GNDIN_CH1 5
R4828 14.CH1_SEL
13.GNDIN_CH1
1
IC4005
R4046 R4008
R
R4830 12.CH1_L R4065

R4832 11.GNDIN_CH1 R4806 C4042
R4838 10.GNDIN_CH1 C4035
R4049
R4024 C4016 C4006
LINE2
R4837
5
9.MIC R4023 C4015 C4005

8.GNDIN_MIC R4824
7.GNDIN_MIC
1
L
6.GNDIN_MIC R4813 R4044

Q4006 R4064 R4007
5.GNDIN_MIC
E
C4046 R4006
R
4.GNDIN_MIC
IC4004
3.GNDIN_MIC C4041
IC4004 Q4006
2.GNDIN_MIC
1.GNDIN_MIC R4053 R4054 R4022 C4014 C4004
CD2
R4021 C4013 C4003

R4832 11.GNDIN_CH1 R4806 C4042
R4838 10.GNDIN_CH1 C4035
R4049
R4024 C4016 C4006
LINE2
R4837
5
9.MIC R4023 C4015 C4005
8.GNDIN_MIC R4824
7.GNDIN_MIC
1
L
6.GNDIN_MIC R4813 R4044
Q4006 R4064 R4007
5.GNDIN_MIC
E
C4046 R4006
R
4.GNDIN_MIC
IC4004
3.GNDIN_MIC C4041
IC4004 Q4006
2.GNDIN_MIC
1.GNDIN_MIC R4053 R4054 R4022 C4014 C4004
CD2
R4021 C4013 C4003
R4063
P4802
L
C4804 1 R4062
C4806 R4005
MTRM
4
R4027
5
5
DWX3442-
C4805 R4028 Q4002
1 R4002
1
P4801
CN4801
C4803 Q4004 R4001 R8801
R4038 R4035
1
C4034
R
R4030 C4020 R4036
CN8801
R4801
IC4003
R4032
Q4002 Q4004
C4018 R4010
R4048
CN8801
5
4.V-15A R4040 C4023 R4061
3.GND_PO R4045
2.GND_PO R4020 C4012 C4008
1
PHONO1
1.V+15A C4033 R4042 C4030
IC4003
R4019 C4011 C4007
C MTRM ASSY
R4060
LF
R4055 C4021
R4047 C4039 C4029 C4019
L
R4034 R4009
5
(DNP2708-B)
R4825 R4026
R
R4041 R4004
R4810 C4017
1
R4043
IC4002
C4038 Q4005 C4002
E
CD1
C4045 R4039 Q4003 C4010
R4033
1
R4037
IC4002
Q4005
R4051 R4018
1
C4001
L
R4052
Q4001 R4003
Q4003 Q4001
6
6
R4625 R4031 C4009
C4613 R4029
R4025 R4017
C4612 R4621 R4059
C4611
R4623 R4619
R4804 R4058
R4618
R4622 C4607 C4627
C4620
LF
VA4601
1
C4614 R4620 R4615
DWX
R4633 C9007
1
INPUT
R4632 Q4603
R4630
5
1
IC4601
CN9001 6
C4629
CN9001
Q4602
DJM-750-K
R9003
R4628 C4630
1
C9008
IC4601
DWX3432-
Q4603 Q4602
R9004
C4615 C9009
C4621
5
C4605 C9006
6
MIC1
R9002
ADD
C9004
R4833 VA9001
C9005
R4627 R4610 R4639 R4834
COLD
7
7
D9003
1 R4839 R4613 C4626 R4835 D9004
5 R4612 C4625 R9001
R4609 R4638 R4836 VA9002 C9003
DWX3441-
2 6 R4840
HOT
D9002 D9001
(DNP2706-B)
SOLDER
B MIC1 ASSY
(DNP2708-B)
CN4602 CN4601
8
8
A B C
SIDE B
163
F
E
B
A
D
C
4 3 2 1
DJM-750-K 164
A print position of the PCB silk of the product is wrong. A print position listed in this service manual is correct. D
* About [RESET_OUT]
19 15 5 1 C1413
1 IC1404
L1402 KN1205 F
C1008
5D_CON CONTACT
1
D1407
V+13D_UN
2 C1452 SIDE
1
10
IC1404
1
C1415
C1450
18
R1254 CN1005 C1432
5
1 3
V-15A C1434
V+3R3D_REFA
V+15A V+5A C1427 IC1405

C1007
C1456 1.G_REFA
1R2D_CON
C1425
10
2.VR_FD1
H
R1255
1
5 3.VR_FD2
D1406
IC1405
4 VDET 6.HP_L+ 1.HP_R+ L1403 SUB 4.VR_CFD
IC1408
C1424
C1426
2.HP_R- CPU 5.VR_FD3

15
7.GNDA 3.GNDA_HP RST

5
11.GND_PO 8.V+5A 4.HP_L- 3R3D_CON 6.VR_FD4

IC1408
V+5D
V+3R3D
12.V-15A 9.GNDA 5.GNDA_HP 1 7.G_REFA

13.GND_PO 10.V+15A R2649
CN1001
V+2R5D 1 1
R2652 1 1 1 8.V_REFA
L1404
C1433 R2648 R2647

20
V+13D_UNREC D1404 9.GNDD

GNDD L+ L- R- R+ C1449 5.V+5VBUS 10.GNDD
CN1001
C1004 4.D+USB R2650

16.MUTE 16 15 10 3.D-USB
CN6601
25 20 15 10 5 1
C1445 2.GND_USB
R1075
IC1001
MAIN_CPU_RESET_2
27
24
R_RESET_A C1446 CN2602 1.GND_USB 11.GNDD IC1001

ER_RESET_HP HP
R2601
C2666 5 1 12.SCPU_RST
1
IC2604
V+1R2D 13.FPGA_SIG IC2604

.GNDD C1019 14.SUB_CTRL
1 5
1
15.SUB_INT
1
8 16.GNDD
17.FPGA_TXD
5
1
V+5A
F2601
18.GNDD
R1019
19.FPGA_RXD
RESET_OUT
IC2605
ADAT_HP C2606 30
1 1
35 40 45 50 54 20.GNDD
IC2605
5 1 1 21.FPGA_CLK E
D2404 R2666 22.GNDD
23.GNDD
R2668
CN2802 1.STBY_LED
1
R2413
24.V+3R3D
D2601 R2657
C2664
C2665
C2650 2.STBY_KEY
1
RETURN C2669 R2665 R2664

L2601 1
1 R2660 R2634
1
1CN2601
5
16
411 IC2402 3.V+3R3E

5
1 1 1
1
R2630 R2632 4.MVR_MUTE

15
CN3201
C2415
R2645
10
5.EFX_ON/OFF
IC2402
1
V+3R3E
5
D2403
1
5
1 1
R3224 R3225 1
R2642 1 R2643
1
10
10 6.GNDD_34D
H
R2644
1
D2402
8
7.GNDD
V+1R2D_USB
V+34D 8.V+34D
R2629
9.GNDD
10
R2628
C2411 25 20 15 10
C2410
5 1
1 1
27 10.GNDD_LED
11.V+5D_LED
ADAT_
R2408
R2412 12.GNDD_LED
CN1002
R2604
CN1002
RETURN
15
IC3202 13.V+5D_LED
16
IC2401
C2408
R2426
D2401
IC2603
14.GNDD_LED
1
V+5D
V+3R3D_USB
15
IC3202
1 LED 15.V+5D_LED
V+2R5D_UPLL
17
5
16.GNDD_LED
IC2401
CN6602
10
17.V+5D_LED
8
MIC 30 35 40 45 50 54 1
A R2606 CONTACT SIDE
C2414 V+3R3D_USB
C2405
1 1
R2405
1 R2409 ADAT_MIC 9.MIC D3201 IC2603
8.GNDIN_MIC R3228 C2603
F
1 7.GNDIN_MIC Q3201 R2614

R3229
C2605
15.GNDIN_CH1 1 1 1 1
11
R3205 R3219
Q3201
12 13
14.CH1_SEL 6.GNDIN_MIC
R254
13.GNDIN_CH1 5.GNDIN_MIC E
10
4.GNDIN_MIC R3203 IC2602

14
15
12.CH1_L R3202 1
1
5 5
R3223
1
R3204
11.GNDIN_CH1 3.GNDIN_MIC R3206 USB DBG 1 X2601

F3001
16.CH1_R
24M_CLK_USB
10.GNDIN_CH1
1
2.GNDIN_MIC
CN2602
IC2601
17.GNDIN_CH1
19.GNDIN_CH2
1
1.GNDIN_MIC
1
IC2602 IC2601
R3222
1 1
D
R3209
USB_RST
ADAT_CH1 1
R3218
1 R3208
R3207
1
FPGA DBG
CN3801
L08N
1
1
R3221
V+1R2D_FPGA
C3036
20.CH2_L
R3093 1 1 R3094 1 1 IC3201
C3035
C3021
R3217
1
R1601
25.GNDIN_CH2
24.CH2_R
21.GNDIN_CH2
22.CH2_SEL
R3212
23.GNDIN_CH2 18.GNDIN_CH2
R3216
V+3R3D_DSP TDO R3095 R3096

R-
C3203 V+1R2D_DSP TCK
V+3R3D_FPGA
1
1
R3037
A
DSP DBG GP5[12]
1 IC3201
1
R3240
C3259 IC3007
D1602
1
R253 R3264 1
C3204
C3020
IC3007
1
L3201 96k_CLK_AD/DA
14 10
R3039
1
IC3008
IC3008
KN1202 DSP_RESET 6M_CLK_AD/DA
24AD_RESET
1
5
5
IC2804
24M_CLK_AD/DA
IC3205
F3201 IC3205
1 5 7
7
14
HP-MIC-RE_RESET
10 10 10 1
10
24M R3057
IC3006 IC3204
IC3204
1
R3046
1 1
R3063
1 KN1206
1
R3038 1 IC3005
14
1 7 R3042
IC3004
13AD_RESET
7 7 TMS R3050 1
1 5 1 5 1 5
DA_RESET
R201
1 X3202
AD_DA_RESET
R3230 TDI
IC3005
24 20 15 10 5 1 IC3004 IC3006
C202
C
1
IC201
V+3R3D_REFA
IC1406 IC201
MULTI
IC1406
FPGA_xPGM
LF
48
2
24M_CLK_DIGI
C1438
6M_CLK_DIGI
96k_CLK_DIGI
25 30 35 40 45 L2801
C219
R267
C216 BOOTH_R BOOTH_L
C213 C519
C218
L2802
C215
D1405
C501
PC
R726 C513
FPGA_RESET
GNDREF_A
R715 R266 R512 R501
REC_R C402 C514 C518
R514 C515 C502 MAIN DBG
V+3R3D_REFA
R516 C503
5
P27 P26 P21
SUB_CPU_RESET
REC_L R503
R513
IC501
1
R502
E
Q409
R515
C517
Q410
1
IC501 R519
CPU_MUTE
C403 C507
R2843
C405
1
Q501 Q502
C404
R2871
C512
Q501
C505 1
R504
5
Q502
C412 D2801 IC2802
C406 C411 C511
MAIN_CPU_RESET IC2801
5
5
IC2802
C408 R2803
C506 IC2801
1
R2808 1
R 1
IC401
C409 L 15 10
C2801
IC3404
R517 R505
B
R3408
5
L
20
[[ G ]]
C520 C508
IC3404
A30C5/C7
C410
1
1
R V+3R3E_M
1
25 30
R422
R268
C3408 C3409
E E
R3423 DIT_RST C2807
C2808
R3410
C3410 Q3403
R426
R425
Q3402 Q3403 Q3402
C424
45 40 E E Q214 Q215
E E
36
Q208
48
R510
E
Q504 FPGASRC
1
Q214 Q208
C3419
Q503
35
_BCK1
R511
E
DWX3430
DWX
5
Q215 Q209
C423
R506 Q209
30
R518
10
IC3405
25
C3417
L204
L202
L209
L208
MAIN
C521 15 20 D203
C429 C509 Q3401 D204 Q3401
24
D503 IC3405 FPGASRC D201 D202
D404 D403 JA501 D501 E _LRCK1 JA203 JA202 KN201
1 1 5 JA3401 CH3 CH2
R3432
JA401
L3401
1
The blue character is silk for services.
A
D MAIN ASSY SIDE A
11.2 MAIN ASSY
4 3 2 1
8 7 6 5
165 DJM-750-K
(DNP2705-B)
E
D
19
CN1005
C1404
CN3
F
1.RELAY_CONT
C1008
2.GNDD R1405
Q1406 3.V+11E_UNREG R1404 V+13D_UN
C1454 34D_CON E
C1403
KN1203 RELAY_CONT R1403

1 18
Q
Q1406 KN1201
Q1405
5
E Q1405
IC1403 CN1201 V-15A
V+15A
C1007
C1416
D1203
CN1201
IC1402
R
1
1
1
V+11E_UN
IC1402
IC1403
5 V+3R3A
4 VDET 6.HP_L+ 1.HP_R+
2.HP_R-
C1209 7.GNDA 3.GNDA_
JP3001
C1409 R1402 5 D1401 D1403 R1415 11.GND_PO 8.V+5A 4.HP_L-

12.V-15A 9.GNDA 5.GNDA_
R1049
C1461
Q1402 IC1401
D1402 R1406 13.GND_PO 10.V+15A
1 C1412
L1401
E
R1050 14.V+13D_UNREC
V+15A
C1211 1 ADAT_CH2 Q1402 15.GNDD L+ L- R-

P1204
C1408
V+3R3E C1004
C1406
ADAT_CH4 IC1401 R1830 V+34D 16.MUTE 16 15 10

IC1804
V-15A
R1075
IC2204 IC100
R2230 17.POWE R_RESET_A
14
14
HP
22.RET_R
18.POWER_RESET_HP
15
15
R1831
10
10
19.GNDD 1 5
1
20
20
C2219
R2231
C1821
8
C2402
IC1804 IC2204
5
5
C1817
D2203
25
25
V+5A
R1019
L- D1803
1
1
1
1
28
28
C2233
L-
19.GNDIN_RET
18.RET_L
16.GNDIN_RET
17.GNDIN_RET
20.RET_IN
21.GNDIN_RET
C1835
D2204
E
D2404
D2202 L+ L+
1
1
CH4 CH2
R+ R+
1
1
R2413
D1804
RETURN
1
R1058 1
D1802
16
R2411 IC2402
1
15
R- R- C2401
C2415
1
1
R1054
5
D2403
C2227
1
14.CH4_R
15.GNDIN_CH4
D1801
10.CH4_L
D2201
C1829
C1818
10
C1826
C2224
R1051
R1057 C2404 D2402

8
C2205 C1807
R2215
C1805
R2213
R1813
R2216
C2207 C2411
R2214
C2410
1 1
R1814
R1816
1
1
1
1
R2201
R1815
IC1801 IC2201
R2408
8.GNDIN_CH4 12.CH4_SEL
6.CH3_R
IC1802 IC2202 R2407 R2412

5
5
5
5
16
IC2401
C2408
R2426
D2401
R2205
1
R2203 R2207
R1803 R1807
15
R1806
R1801
R2206 1
C2206 R2204 C2208 C1806 R1804 C1808
R1802
R1805
5
R2208
C2403
R1808
R1053
10
R1052 R1056
R2202
8
R1055
IC1801
IC2201
IC2202
IC1802
MIC
2.CH3_L
1.GNDIN_CH3
3.GNDIN_CH3
5.GNDIN_CH3
4.CH3_SEL
CONTACT SIDE
RETR
RETL
CH4R
CH4L
CH2R
CH2L
CH1R
CH1L
MIC
CH3R
CH3L
CONTACT SIDE C2414

C2405
25
R2405
22 1 1 R2409 ADAT_MIC
A
20 15 10 5 1 25 20 15 10 5 1
15.GNDIN_CH1
CN1004 14.CH1_SEL
R254
CN1003 13.GNDIN_CH1
R1060 R1061 R1063 12.CH1_L
C1608 11.GNDIN_CH1
R2008
C2006
CN1004
R1602
R1604
R2006 R2004 R1606

16.CH1_R
10.GNDIN_CH1
IC2001
IC1602
C2008 C1606
17.GNDIN_CH1
19.GNDIN_CH2
R1608
5
5
5
5 IC1601
D
IC1602 IC2002 R3209
R1605
ADAT_C
R2005
R2001 R2002
CN4803
1
1
1
1
IC1601 IC2001
R2014
R1615
R1059
R1062
C2007
20.CH2_L
R2015
R1614
C2005 C1607 C1605

R2013
R1601
R1616
25.GNDIN_CH2
IC2002
24.CH2_R
21.GNDIN_CH2
22.CH2_SEL
R1613
D2001
R2016
R-
1
R-
C1618
C3203
A
D1601
C2024
C1629
C2027
C1626
R+ R1064 R+ 1
1
L+ L+
D1602
R1065
1
1
D2002 R253
D1604
D2004
CH3 CH1
C1617
CN1003
1
1
28
1
1
28
L- L- 14 10
D2003 D1603
25
25
K
5
5
C2033
C1635
24AD_RESET
IC2804
IC2804
CN4802
20
20
R1631
10
10
1 5
IC1604 IC2004
7
HP-MIC-RE_RESET
C2019
R2031
15
15
C1621
14
14
IC2004 R1630
R2030 ADAT_CH3
1
13AD_RESET
DA_RESET
R201
IC1604
AD_DA_RESET
R310 R302
R326
24
R304
C301
R301
20 15 10
R303
C202
C 6 R314 C302 R320 R317

R319 C306 R336
R334
C305 R318
MASTER_R R330 R335 5 1

1 8 IC201
R309
R333
R325
R308
MASTER_L +
R322
+ R324 R316 C322 R312

R338
C307
R332 R306 IC601
R307
C320
IC601
KN1204 C308 - R340 - R328 C602
C304 25 30 35 40
C303
R305
IC302
IC301
C219
R323 SEND
5
5
R321 10 15
16
IC301 IC302 C607 C213 C216
C220
R339
R329
R313
R315
1
1
R311
C215
R331 R337
R327
C321
C319 Q707
E E E E R727 R705
C318 R704 R726
R718 R706
C628
MR- MR+ ML- ML+ R703 R715 R266
MUTE
Q707-Q710
C326
R271
R272
REC_R C402
C323
Q710 Q708 C401

E Q709 E E E R725 R702 REC_L
MASTER_MUTE
R713 R701
C609 SEND_R R714 R341
C317
Q410 Q703-Q706
C324
C325
Q706 Q704 Q703
E
Q705
E
Q409
R270
Q410
Q409
SEND_L R719 C341 C403
C347 R716 C404 C405
R351 R717 R344 R347 C422
R612 R275 C346
R616
C621 R707 R728 R273
IC304
R342
IC303
C611 C619 R343
R350
R614 R708 R720 R349 C340 C421 C412
R346
5
5
Q303
C610
R424
C411
R403
R615 C406
Q301 R345 C420
IC402
R618
R404
1
1
C612
R348
5
5
C613 C407
5
Q301 Q303
C408
IC402
Q304 R352
C348
IC303 IC304 IC602
Q302
R421
R420
1
1
R
IC401
C608
1
C337
1
1
R423
Q302 Q304
R
IC401
R622 R619 R274 C409
R620
B 1 1 R356 C419
R354
C616
R358
R360 L
R357
R355
C418
R364 C342
R362 C336
L+
C343
R427
R361
R359
C615 R621
IC602
R428
C353
R363
C410
L-
R367
R371 R+ R365 L
R419
R- E
R368 E
C417 R
R372
R422
R617
R613
R611
C354
Q306
C355
R268
C335
R269
C624
Q306 Q308
C625
C357
C358
R628 R627 Q308
C356
R426
R425
C424
Q307 C362 C359

C361
C425
C627 E
VA304
VA302
P302
Q307
Q305
C626
VA303
D305 Q305 E D303
D301
D304
P301
C360
C423
VA301 D302
C426
1 1
C428 C427 C430
C
C429
JA301
D
D402 5 D401 D404 D403 1
JA602
JA601
JA401
JA302
1 1
A
SIDE A
8 7 6 5
4 3 2 1
DJM-750-K 166
D
19 15 5 1 C1413
1 IC1404
L1402 5D_CON KN1205
C1008
CONTACT
1
D1407
C1452 SIDE
F
V+13D_UN
2
1
10
2
1
C1415
C1450
18
R1254 CN1005 C1432
5
1 3
V-15A C1434
V+15A V+5A
V+3R3D_REFA
C1427
C1007
C1456 C1425 1.G_REFA

1R2D_CON
10
2.VR_FD1
R1255
1
5 3.VR_FD2
D1406
IC1405
4 VDET 6.HP_L+ 1.HP_R+ L1403
6SUB 4.VR_CFD
C1424
C1426
2.HP_R- CPU 5.VR_FD3

15
7.GNDA 3.GNDA_HP RST

5
11.GND_PO 3R3D_CON
9
8.V+5A 4.HP_L- V+5D 6.VR_FD4
IC1408
V+3R3D
12.V-15A 9.GNDA 5.GNDA_HP 1 7.G_REFA

13.GND_PO 10.V+15A V+2R5D R2649
1-94 1 1
R2652 1 1 1 8.V_REFA
L1404
C1433 R2648 R2647

1-78
20
+13D_UNREC D1404
1-95 9.GNDD
GNDD L+ L- R- R+ C1449 5.V+5VBUS 10.GNDD
CN1001
C1004 4.D+USB R2650

11
16.MUTE 16 15 10 3.D-USB 1-15 25 20 15 10 5 1
C1445 2.GND_USB
R1075
IC1001
1-93 1-92
27
24
1.GND_USB
MAIN_CPU_RESET_2
_RESET_A C1446 CN2602 11.GNDD

ER_RESET_HP HP
R2601
C2666 5 1 12.SCPU_RST
1
IC2604
V+1R2D 13.FPGA_SIG
.GNDD
1-83 C1019 14.SUB_CTRL
1 5
1
15.SUB_INT
1
8 1-91 14 16.GNDD
17.FPGA_TXD
5
1-82 12 1
V+5A
F2601
18.GNDD
R1019
1-80
19.FPGA_RXD
RESET_OUT
ADAT_HP C2606 30
1 1
35 40 45 50 54 20.GNDD
IC2605
1-14
5 21.FPGA_CLK
1-81 1-79 1 1
5 D2404 R2666 22.GNDD
23.GNDD
R2668
E
CN2802 1.STBY_LED
1
R2413
24.V+3R3D
D2601 R2657
C2664
C2665
2.STBY_KEY
1-42
C2650
1
RETURN C2669 R2665 R2664

L2601 1
1 R2660 R2634
1
1CN2601
5
16
411 IC2402 3.V+3R3E

5
1 1 1
1
R2630 R2632 4.MVR_MUTE

15
1-43
CN3201
C2415
R2645
10
V+3R3E 5.EFX_ON/OFF
1
D2403
1
5
1 1
R3224 R3225 1
R2642 1 R2643
1
10
R2644 10 6.GNDD_34D
1
1-69
D2402
1-45
8
7.GNDD
V+1R2D_USB
V+34D 8.V+34D
R2629
9.GNDD
10
R2628
C2411
1-46 25 20 15 10
C2410
5 1
1 1
10.GNDD_LED
1-47
27
11.V+5D_LED
1-34
ADAT_
R2408
1-44
R2412 R2604 12.GNDD_LED
RETURN
CN1002
15
IC3202 13.V+5D_LED
16
IC2401
C2408
R2426
D2401
14.GNDD_LED
1
V+5D
V+3R3D_USB
15
1-36
1 LED 15.V+5D_LED
V+2R5D_UPLL
17
5
16.GNDD_LED
10
1-38
17.V+5D_LED
8
1-13
MIC 1-39 30 35 40 45 50 54 1
A R2606 CONTACT SIDE
C2414 V+3R3D_USB
C2405
1 1
R2405
1 R2409 ADAT_MIC 9.MIC D3201 IC2603
1-40
8.GNDIN_MIC R3228 C2603
1 7.GNDIN_MIC Q3201 R2614
R3229
C2605
15.GNDIN_CH1 1 1 1 1
11
R3205 R3219
1-37 1-16
12 13
14.CH1_SEL 6.GNDIN_MIC
1-17
R254
13.GNDIN_CH1 5.GNDIN_MIC E
10
4.GNDIN_MIC R3203 IC2602

14
15
12.CH1_L R3202 1
1
5 5
R3223
1
R3204
11.GNDIN_CH1 3.GNDIN_MIC R3206 USB DBG 1 X2601

F3001
16.CH1_R
24M_CLK_USB
10.GNDIN_CH1
1
2.GNDIN_MIC IC2601
17.GNDIN_CH1
1-9
19.GNDIN_CH2
1
1.GNDIN_MIC
1
R3222
R3209 1 1
USB_RST
1-6
1
ADAT_CH1
R3218
D
1 R3208
R3207
1
FPGA DBG
L08N
1
1
R3221
V+1R2D_FPGA
C3036
20.CH2_L
R3093 1 1 R3094 1 1
C3035
C3021
R3217
1
R1601
25.GNDIN_CH2
24.CH2_R
21.GNDIN_CH2
22.CH2_SEL
R3212
R3216
V+3R3D_DSP TDO R3095 R3096

1-7
R-
C3203 V+1R2D_DSP TCK
V+3R3D_FPGA
1
1
R3037
A
1-41
DSP DBG GP5[12]
1 IC3201
R3240
C3259 IC3007
D1602
1
R253 R3264 1 1-5
C3204
C3020
1-10 L3201 96k_CLK_AD/DA

14 10
1-11
R3039
1
1-8
IC3008
KN1202 DSP_RESET 6M_CLK_AD/DA
24AD_RESET
1
5
5
IC2804
24M_CLK_AD/DA
IC3205
F3201
1-30
1 5 7
1-31 1-32 1-33
7
14
HP-MIC-RE_RESET
1-12
10 10 10 1
10
24M R3057
1-99
IC3204
1
R3046
1 1
R3063
1 KN1206
1
1-53 1-54 1-51 R3038 1
14
1 7 R3042
13AD_RESET
7 7 TMS R3050 1
1 5 1 5 1 5
DA_RESET
R201
1 X3202
AD_DA_RESET
1-52 1-49 1-50 1-55
R3230 TDI
IC3005
24 20 15 10 5 1 IC3004 IC3006
C202
1-56 1-57 1-58 10
1
IC201
C
MULTI V+3R3D_REFA
IC1406
FPGA_xPGM
LF
48
2
24M_CLK_DIGI
C1438
6M_CLK_DIGI
96k_CLK_DIGI
25 30 35 40 45 L2801
C219
R267
C216 BOOTH_R BOOTH_L
C213
1-48
C218 C519
L2802
C215
D1405
C501
PC
R726 C513
FPGA_RESET
R715 R266 R512

C514 C518 R501 GNDREF_A
REC_R C402 C502
R514 C515 MAIN DBG
V+3R3D_REFA
R516 C503
5
REC_L P27 P26 P21
SUB_CPU_RESET
R503
R513
1
R502
E
Q409
R515
C517
Q410
1
IC501 R519
CPU_MUTE
C403 C507
R2843
C405
1
C404
Q501
R2871
C512
1-71
C505 1
R504
5
Q502
C412 D2801 IC2802
C406 C411 C511 IC2801
MAIN_CPU_RESET 5
5
C408 R2803
1-96 1-96 1-3
C506
1
R2808 1
R 1
IC401
C409 L 15 10
C2801
IC3404
R517 R505
R3408
5
L
20
[[ G ]]
C520 C508
B
A30C5/C7
C410
1-64
1
R V+3R3E_M
1
25 30
R422
R268
C3408 C3409
E E
R3423 DIT_RST C2807
C2808
R3410
1-85
C3410 Q3403
R426
R425
Q3402
C424
45 40 E E Q214 Q215
E E
36
Q208
48
R510
1-86
E
Q504 FPGASRC
C3419
Q503
35
_BCK1
R511
E
DWX3430
DWX
C423
R506 Q209
1-90
30
R518
10
25
C3417
1-98
L204
L202
L209
L208
MAIN
C521 15 20 D203
C429 C509 Q3401 D204
24
D503 IC3405 FPGASRC
1-89
D501 _LRCK1 D201 D202 KN201
D404 D403 1 1 JA501 5 E JA3401 CH3 JA203 JA202 CH2
R3432
JA401 1-87 1-88 1-97
L3401 1-84 1-97
1
: Voltage measuring point A
Measuring points of waveforms and voltages SIDE A
4 3 2 1
8 7 6 5
167 DJM-750-K
(DNP2705-B)
D
19
C1404
1.RELAY_CONT
C1008
F 2.GNDD R1405
3.V+11E_UNREG V+13D_UN
R1404
2
C1454 34D_CON E
C1403
KN1203 RELAY_CONT R1403

1 18
R
Q1406 KN1201
5
E Q1405
CN1201 V-15A
V+15A
1-1
C1007
C1416
D1203
1
R
1
1
1
V+11E_UN
IC1402
IC1403
5 V+3R3A 1-2
4 VDET 6.HP_L+ 1.HP_R+
2.HP_R-
C1409 C1209 7.GNDA 3.GNDA_H
R1402 5 D1401 D1403 R1415
13 11.GND_PO 8.V+5A 4.HP_L-
12.V-15A 9.GNDA 5.GNDA_H
R1049
C1461
R1406 13.GND_PO 10.V+15A

8 7
D1402 1 C1412
L1401
1-78
E
R1050 14.V+13D_UNREC
V+15A
C1211 1 ADAT_CH2 15.GNDD

1-96
Q1402
4
P1204 L+ L- R-
V+3R3E
C1408

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ORDER NO.

DJM-750-K, DJM-750-S SYXJ8 AC 220 V to 240 V

DJM-750-K, DJM-750-S LXJ AC 110 V to 120 V or 220 V to 240 V

DJM-750-K, DJM-750-S KXJ5 AC 220 V

PIONEER CORPORATION 1-1, Shin-ogura, Saiwai-ku, Kawasaki-shi, Kanagawa 212-0031, Japan

(FOR USA MODEL ONLY)

10.11 MAIN ASSY (5/19) ..................................................................................................................................................110

Do NOT use a soldering iron whose tip temperature cannot be controlled.

The following lead-free solders are available as service parts:

1.2 NOTES ON REPLACING

1.3 NOTES ON SERVICING

3. BASIC ITEMS FOR SERVICE

3.2 JIGS LIST E

Lubricants and Glues List

Name Part No. Remarks

3.3 PCB LOCATIONS

G HPJK ASSY O REG ASSY P TRANS ASSY

1..PNLA ASSY DWX3439

and PARTS LIST" or "PCB PARTS LIST".

K L M N VNE1948-A XKN3017-B XKN3017-B DKB1089-A

FAD1 ASSY FAD2 ASSY FAD3 ASSY FAD4 ASSY CN6601

SCREW PLATE CH1 CH2 CH3 CH4 RETURN A

R R R R L(MONO) R AC INLET ASSY AC INLET ASSY

L=70mm P=1.0mm 22P FFC AKM1274-A-TBB PF03PG-Q07 (L=75mm)

JA3801 V+11E_UNREG 3 3 V+11E_UNREG

MAIN ASSY (DWX3430) (DWR1530: LXJ)

19P BRIDGE CONNECTOR

GNDF 12 12 GNDF Board In

04PP-S17 L=140mm 3pin for LXJ

SEC/HP ASSY P=2.0mm

4.2 SYSTEM BLOCK DIAGRAM

VR_FADER3 IC2802 SPI

IC4201 SELEC IC2201

F USBI ASSY UART(Downloard & other)

LED Digital Audio

4.3 DSP BLOCK DIAGRAM

USB 2Position Send/ 3Position

BEAT EFFECT (SEND/RETURN) BEAT EFFECT (Others)

Cable Check Effect_C

BPM Detect Master REC out

Level meter Master

Mono Split / Stereo SWITCH & MIXING

4.4 CLOCK MAP

MAIN BUS SPI

6pF 6pF 22Ω 22Ω

22Ω 22Ω 33Ω 33Ω

DSPB BUS 100Ω

4.5 LED, KEY, VR ASSIGNMENTS

4.6 POWER BLOCK DIAGRAM

V+5A (for ADC/DAC)

Canceling reset of MAIN Flash

MAIN UCOM Abnormal detection

Starting power supply to the peripheral ICs

FPGA_xPGM setting to LOW

FPGA_xINIT setting to HIGH

FPGA_DONE setting to HIGH

Canceling reset (FPGA_RESET)

Starting power supply to FL

Canceling reset (SUB_CPU_RESET)

Abnormal SETUP LED

Obtaining KEY data

FPGA MAIN UCOM SUB UCOM USB UCOM DSP Remarks

Operation mode judgment