Circuits Sample & Hold

It is called (Circuit sample & hold), a circuit that, governed by a logical control signal, is able to read
an input signal and recorded its value to display it constantly on the output.

In some cases, the output signal will not be exactly the input but an inverted version, in general,
amplified.

Two temporal concepts that are important in the study of S/H circuits are the "sampling time" and
the "retention time".

• The first marks the minimum time required to correctly limit the value of the entry.

• The second time the device can hold the signal.

Core of an S/H circuit

The basic element to build an S/H circuit is a capacitor and a switch that can be operated at will.

When the control signal ϕ is activated, the capacitor is connected to the input and stores a load of
value Q = CH · VIN.

When ϕ is deactivated, the capacitor is disconnected from the input and the output shows the last
stored input value. This structure presents, however, two fundamental problems: the sensitivity to
the effects of loading and the pedestal effect.

Figure 1: Elementary core of an S/H circuit (a). During ϕ activated b), the input and output are short-
circuited and the input voltage is recorded on the capacitor. During ϕ off (c), the capacitor is isolated
from the input and keeps the voltage recorded before the switch is opened.

S/H circuits with operational amplifiers

Using operational amplifiers, we place a pair of voltage followers (Fig. 2) to reduce the capacitor's
charge time and increase the retention time.

Op 1 charges the capacitor freeing the input source from doing so. On the other hand, the only load
effect of CH from the bias current of the non-inverting input of Op 2.
Figure 2: Simple structure of S / H circuit with two operational amplifiers as voltage followers.

This structure has two drawbacks.

1. The first of these is that the offset voltages of the operational amplifiers add directly to the
output. Thus, it is possible to see that when the switch is closed.

Va=Vb,
Va=VIN +VOS 1 ,
VOUT =Vb+VOS 1 ,
VOUT =VIN + VOS1 ,+VOS 2.
Solution

Figure 3: S / H circuit structure with two operational amplifiers and cross feedback to cancel
the offset voltage of op amp 2.

2. The second problem that appears in this structure is that the problem of the pedestal effect
has not been resolved

Solution
Figure 4: S/H circuit structure with two operational amplifiers to eliminate pedestal effect.