IET Power Electronics

Research Article

Compact dual-output inverter based on flying- ISSN 1755-4535

Received on 19th March 2018
Revised 21st February 2019
capacitor: modelling, control, and prototype Accepted on 11th March 2019
E-First on 6th June 2019
validation doi: 10.1049/iet-pel.2018.5160
www.ietdl.org

Saeed Yousofi-Darmian1, S. Masoud Barakati1

1Electricaland Computer Department, University of Sistan and Baluchestan, Zahedan, Iran
E-mail: smbaraka@ece.usb.ac.ir

Abstract: A new DC/AC inverter with ability of supplying two AC loads, independently, based on flying-capacitor topology is
proposed. Flying capacitor enables the converter to have three-level output voltages which results in high-quality output
waveforms. Comparing to conventional flying capacitor inverter (FCI) for supplying two loads, the new inverter has lower
numbers of semiconductor switches and flying capacitors, up to 25 and 50%, respectively. Comparing to recent works, proposed
inverter provides better trade-off between number of components and independent control of loads. Three-phase topology of the
proposed inverter consists of three parallel single-phase modules. The inverter can operate in both constant and variable output
frequencies. A switched model along with an effective control strategy based on Karnauph Map is also derived for the proposed
inverter. High performance of the inverter is verified with both simulation and experimental results. The proposed inverter can
mostly be used in applications, such as motor drive, UPS systems, hybrid electric vehicles, and photovoltaic (PV) systems.

1 Introduction [9]. In [10], the nine-switch converter was used in a variable-speed

In recent years, a lot of efforts have been done in field of power
converter design to reduce the number of semiconductor devices
and passive elements which results in reduction the cost and
volume of overall system. In order to supply two AC electrical
loads by only one DC source, a conventional method is to use two
separated inverters and another way is to use a single inverter with
one output connected to two parallel loads. Using high number of
semiconductor devices and lack of independent control of loads are
the disadvantages of the first and the second methods, respectively.
Employing multi-terminal converters instead of conventional two-
level converters in hybrid energy systems reduce volume and cost
of the system. Some applications of multi-terminal converters such
as motor drive and distributed generation (DG) has been reported
in the literature [1–13].
An inverter topology with two outputs for supplying two
separated loads was introduced in [1]. This inverter has lower
number of switches in comparison with the standard full-bridge
inverter. A three-phase converter proposed in [2] for AC/AC power
conversion applications, called nine-switch converter, is similar to
inverter introduced in [1] and operated in constant- and variable-
frequency (CF and VF) modes; but both of these modes have
limitation, former mode could not work with arbitrary phase-
displacement between load voltages, and latter could not work
when modulation indices of both loads are above 0.5. A model
predictive control scheme was proposed in [3] to overcome the
complexity and high computational burden of conventional PWM
method to control nine-switch converter. In [4], a three-switch dual
output inverter was presented. This inverter derived from the nine-
switch converter uses three series-connected DC-link capacitors to
provide neutral points of load. In [5], a dual-buck-based single-
phase dual-output six-switch inverter was proposed to improve the
reliability and efficiency of conventional six-switch inverter. In [6],
a dual-output four-leg converter proposed in order to control
transmitted power in a microgrid. For uninterruptible power supply
(UPS) applications, a three-phase converter with dual-output was
developed for AC/AC conversion through a quasi-DC-link circuit
[7]. Also for this application, a single-phase converter was
introduced with maximum DC bus voltage utilisation, minimum
output voltage THD, and switching loss [8]. A nine-switch
converter for power quality enhancement with reduced switching
losses using a discontinuous modulation scheme was proposed in
grid-connected wind energy conversion system including a
maximum power point tracking controller. A two-phase induction
motor drive application using a dual-output inverter was reported
in [11]. In [12], a system configuration for integrating a grid-
connected photovoltaic (PV) system together with a dynamic
voltage restorer (DVR) was proposed to enhance the system
robustness against severe symmetrical/asymmetrical grid faults.
Reference [13] proposed a hybrid electric vehicle based on z-
source nine-switch inverter which allows bidirectional power flow.
This paper proposes an inverter with dual outputs and the
ability of supplying two different frequency AC loads. Lower
number of semiconductor switches, gate driver circuits and also
capacitors in comparison with a dual-output inverter that consists
of parallel connection of two flying capacitor inverters (FCIs) are
some features of the proposed inverter. The proposed inverter is
applicable in on-grid and off-grid renewable energy system
applications.
The rest of the paper is organised as follows: in Section 2,
standard FCI along with proposed inverter structure are presented.
Section 3 is dedicated to modelling and control principles of
proposed inverter. Simulations and experimental results along with
comparison with other recent works are provided in Section 4.
Finally, conclusions are presented in Section 5.
2 Proposed inverter structure and switching
states
In this section, first the FCI structure and switching are explained
and then, the proposed inverter based on flying capacitor and its
switching states will be introduced.
2.1 Flying capacitor inverter
FCI was introduced by Meynard and Foch in 1992 [14]. So far,
flying capacitor has been extensively used in several converter
structures and applications like: PV [15], flexible AC transmission
system (FACTS) [16, 17], automotive [18–20], train traction and
motor drive [21, 22], pulsed power [23], and active filters [24, 25].
The FCI with three-level output is shown in Fig. 1a. This inverter
is a well-known topology for multi-level inverters that offers
advantages, such as producing higher voltage levels, better output
quality, and having lower switching semiconductor rating and

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Fig. 1  Single-phase three-level FCI
(a) Standard structure, (b) Parallel structure
losses [26, 27]. In addition, as shown in Fig. 1a, because of switch
S4 (S3) is the complement of switch S1 (S2) and flying capacitor
voltage is controlled to be Vdc, blocking voltages, and currents
(i.e. rating) of all switches are identical. Due to redundant
switching states, FCI has ability to balance the flying capacitor
voltage, so this topology is suitable for high power factor
applications [28, 29]. However, slow dynamic response of
capacitor voltage is a drawback of this topology. This dynamic
problem and analytical study on balancing of flying capacitor are
explained in [30, 31].
Switching states of FCI are shown in Table 1, where 0 and 1
denote OFF and ON states of switches, respectively. As shown in
this table, to produce zero voltage level FCI has two choices, which
can use one choice for charging and another for discharging of the
flying capacitor. So, voltage of flying capacitor can be balanced by
proper choosing of the zero voltage level.
In order to supply two electric AC loads by a DC source, one
possible way is using two parallel FCI inverters, as shown in
Fig. 1b.
2.2 Proposed inverter
Here, an inverter structure based on flying capacitor is proposed
which can supply two loads with lower numbers of switches and
flying capacitors in compare with two parallel FCI. As illustrated
in Fig. 2, the proposed inverter is consisted of seven semiconductor
switches and one flying capacitor. This inverter offers three-level
voltages in both outputs with better harmonic spectrum than
conventional two-level inverters. Comparing with two parallel FCI,
that uses eight semiconductor switches along with two capacitors,
the proposed inverter saves 12.5% in number of switches and 50%
in flying capacitors (it is similar for three-phase structures).
Switching states for the proposed inverter are shown in Table 2.
It can be observed that this inverter can use all three voltage levels
in both outputs without any limitation. This feature allows
independent modulation for each output. From Table 2, one can
deduce that S5 = S1⊕S4 (⊕ denotes Exclusive OR operand) and
1826
Table 1 Switching states of three-level FCI
S1 S2 VO
0 0 −Vdc
0 1 0
1 0 0
1 1 Vdc
Fig. 2  Proposed inverter structure
S22 and S32 are complementary switches of S21 and S31,
respectively. Switch S5 is used to prevent exceeding flying
capacitor voltage limitations. The limitations will be happened
when the first and second output voltages are [VO1 = Vdc, VO2 = 
−Vdc] or vice versa [VO1 = −Vdc, VO2 = Vdc], as shown in Table 2
and Fig. 2.
3 Operation and control principles of the
proposed inverter
As aforementioned, the proposed inverter can produce three-level
voltages in both outputs and according to Table 2, only one
redundancy state in [VO1 = 0, VO2 = 0]. Fundamental component of
outputs voltages and currents can be presented as,
⟨ei⟩1 = Emisin(ωit + θi)
, i = 1, 2, (1)
⟨iOi⟩1 = Imisin(ωit + ϕi)
where Emi is maximum voltage, Imi maximum current, ωi
frequency, θi voltage phase angle, and ϕi current phase angle of ith
output. Equation (1) represents the most general form of outputs
voltages and currents.
Typical waveforms of outputs voltages and currents are
depicted in Fig. 3, where for simplicity of discussion, fundamental
outputs frequencies and voltage phase angles consider to be
identical (ω1 = ω2, θ1 = θ2 = 0), but loads and modulation indices
are different. Due to different power factors of outputs, inverter
operates in six modes, as shown in Fig. 3. Obviously, if power
factors are identical and not equal to unity, or one of them is unity
and another one is non-unity, the number of modes will be reduced
to four. Also if both power factors are unity, the number of modes
will be reduced to two.
Charge and discharge conditions of flying capacitor in each
mode are illustrated in Table 3. In this table, iO1 and iO2 are outputs
currents that used to illustrate the different impact of magnitude
and sign of each output current on flying capacitor voltage.
According to Fig. 3, because of symmetry in voltage and current
waveforms, modes I, II, and III are the same as modes IV, V, and
VI, respectively, in terms of the voltage and current shapes, but
different in signs. Table 3 shows that these identical modes have
similar impact on flying capacitor voltage, resulting no effect on
balancing the flying capacitor voltage of the proposed inverter.
According to Table 3, balancing of the capacitor voltage can be
achieved by [0 0] state. In other words, through the [0 0] state, the
flying capacitor will be charged/discharged to control the capacitor
voltage level. When modulation indices of both outputs are
identical, only [0 0] and [x x] (x = 1 or −1) states will take place.
Otherwise, voltage levels [0 x] and [x 0] will have uncontrollable
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Table 2 Switching states of proposed inverter
S1 S21
1 1
1 1
1 1
1 0
0 1
1 0
0 1
1 0
0 0
0 0
S31 S4 S5 VO1 VO2
1 0 1 VDC VDC
0 0 1 VDC 0
0 1 0 VDC −VDC
1 0 1 0 VDC
1 1 1 0 0
0 0 1
0 1 1 0 −VDC
1 1 0 −VDC VDC
1 1 1 −VDC 0
0 1 1 −VDC −VDC

Fig. 3  Different modes of the proposed inverter

Table 3 Charge and discharge conditions of flying capacitor where iO1, iO2, and vC are first, second output currents, and flying
in each mode capacitor voltage, respectively; the switched variables are: first and
States Modes second inverter output voltages (e1 and e2) respect to the neutral
— I II III point, iin1, iin2 and i5 positive and negative DC-link pole currents
[1 1] NCha NCh NCh and switch S5 current, respectively. Switching function defined for
[1 0] Dch(iO2) Dch(iO2) Ch(iO2) switches is as follows,
[0 1] Dch(iO1) Ch(iO1) Ch(iO1)
1, switch i is on
[0 0] Cha or Dcha ( −  Ch or Dch Ch or Dch (iO1 +  ui = , i = 1, 2, …, 5. (2)
0, switch i is off
iO1−iO2) (iO1−iO2) iO2)
— IV V VI For complementary switches (i.e. S22 and S32), switching function
[ − 1 − 1] NCh NCh NCh is defined as u = 1 − u . Switching functions are shown in Fig. 2.
[ − 1 0] Dch(iO2) Dch(iO2) Ch(iO2) Dynamic equations that govern the inverter are as:
[0 − 1] Dch(iO1) Ch(iO1) Ch(iO1)
diO1
[0 0] Ch or Dch (iO1 +  Ch or Dch ( − iO1 +  Ch or Dch ( −  L1 = e1 − r1iO1
dt
iO2) iO2) iO1−iO2)
diO2
aCh, Dch and Nch stand for charge, discharge and no change of capacitor voltage, L2 = e2 − r2iO2, (3)
dt
respectively.
dvC
C = iC
dt
effect on the flying capacitor voltage, i.e. in each state based on the
choosing mode the capacitor will be charged or discharged. where iC is flying capacitor current. Next step is to represent
As shown in Fig. 3, modes III and VI have the longest time switched variables as a function of inputs and state variables.
interval, so it is expected that without any control in these modes According to Fig. 2, for switched variables e1 and e2 one can write
the capacitor voltage will be increases.
e1 = u1u2V DC − u2u4V DC + u2u4u5(vC − V DC)
3.1 Switched model of the proposed inverter
+u1u2u5(V DC − vC)
It is assumed that the inverter DC-link voltage is maintained at . (4)
e2 = u1u3V DC − u3u4V DC + u3u4u5(vC − V DC)
specific value and switches are ideal, i.e. switches change their
state instantly, the on/off resistances are zero/infinity, and there is +u1u3u5(V DC − vC)
no voltage drop at switches. In order to obtain the switched model
of the proposed inverter, proper state and switched variables have Equations expressed in (4) can be rewritten as,
to be selected. As shown in Fig. 2, state variables are selected,

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 e1 = u1 + u4 u2 − u2u5 − u4 + u1u5 V DC capacitor voltage will be adjusted according to capacitor voltage
+u5 u2 u4 + u1 − u1 vC and sign of capacitor current.
. (5) Logic relations between switch states and desired outputs and
e2 = u1 + u4 u3 − u3u5 − u4 + u1u5 V DC flying capacitor voltage can be converted to algebraic equations
+u5 u3 u4 + u1 − u1 vC using Karnauph Map. Two separate variables are needed for sign of
the current flowing through the flying capacitor (A), and the state
Regard to switched variables iin1 and iin2, of flying capacitor voltage relate to reference value (B). These
variables are defined as:
iin1 = u1 u2iO1 + u3iO2 + u5i5
. (6) A = sgn(iO1 + iO2)
iin2 = u4 −u2iO1 − u3iO2 + u5i5 , (11)
B = sgn(V C − V Cref )
Performing KCL law at neutral point of the inverter, one can
where sgn( . ) is sign function that defined as follows,
obtained,
1, ifX ≥ 0
iO1 + iO2 + iin2 − iin1 = 0. (7) sgn(X) = . (12)
0, ifX < 0
Substituting (6) in (7) and perform some mathematical
simplifications, As mentioned before, the proposed inverter has two outputs that
can generate three-level voltages simultaneously. So, number of
1 − u4 − u2 u1 − u4 states covering all output voltage levels is nine. These states can be
i5 = iO1 converted to four logic variables (e.g. C, D, E, and F) using look-
u5 u1 − u4
(8) up tables (LUTs). Then, the overall number of logic variables are
1 − u4 − u3 u1 − u4 six (A to F). Accounting these definitions, switching table of the
+ iO2 .
u5 u1 − u4 inverter including logic variables can be obtained as shown in
Table 4. Switches will be considered to be open for the rest of
According to the fact that iC = u5i5, substituting (5) and (8) in (3), states to avoid unexpected short circuits in the inverter (these states
switched model of the proposed inverter can be finally achieved as, are not shown in Table 4). As shown in Table 4, logic variables A
and B have certain values only when both output voltage levels are
diO1 zero; otherwise, their values are not important. The rationale
L1 = u1 + u4 u2 − u2u5 − u4 + u1u5 V DC
dt behind this is the fact that only by zero voltage level of both
+u5 u2 u4 + u1 − u1 vC − r1iO1 outputs the flying capacitor charging or discharging can be
controlled. Switch states are selected to control the flying capacitor
diO2 voltage at the reference value.
L2 = u1 + u4 u3 − u3u5 − u4 + u1u5 V DC
dt Switching function of each switch can be obtained using
. (9) Table 4 and Karnauph Map as follows,
+u5 u3 u4 + u1 − u1 vC − r2iO2
dvC 1 − u4 − u2 u1 − u4 S1 = CD + CEF + ABCF + ABCF
C = iO1
dt u1 − u4
S21 = CDF + CEF + ABCE + ABCE
1 − u4 − u3 u1 − u4
+ iO2 S22 = S21
u1 − u4
S31 = CEF + CDE + CDEF + ABCEF
It is worth to mention that if the frequency of both outputs is equal,
+ ABCEF . (13)
the switch S5 could be omitted (i.e. u5 = 1) and switch S4 could
operate as complementary of switch S1 (i.e. u4 = u1). Then, the S32 = S31
switched model of the inverter simplified as, S4 = CEF + CDF + ABCD + CDEF
diO1 + ABCD
L1 = (2u1 − 1)V DC + (u2 − u1)vC − r1iO1
dt S5 = CE + CF + DEF
diO2
L2 = (2u1 − 1)V DC + (u3 − u1)vC − r2iO2 The overall control system of the inverter is shown in Fig. 5, where
dt
. (10) M1 and M2 are modulation indices of first and second output
dvC u1 − u2(2u1 − 1) voltages, respectively.
C = iO1
dt (2u1 − 1)
u1 − u3(2u1 − 1) 4 Simulation and experimental results
+ iO2
(2u1 − 1)
In this section, output voltages and currents of the proposed
inverter and the capacitor voltage deviation from nominal value
The switched model (9) along with control approach introduced in
will be studied through simulation and experimental work.
the next section are used to simulate and analyse the proposed
Experimental setup which consists of a dual DC power supply as
inverter operation.
DC-link power sources, dual linear power supply for sensors,
TMS320F2812 DSP board to implement controller, current sensors
3.2 Proposed inverter control strategy board, main power circuit board containing voltage sensor, and RL
Charging/discharging of the flying capacitor based on comparing loads is shown in Fig. 6. The system parameters for both
its voltage with a voltage reference is an effective voltage control simulation and experimental setup are the same and shown in
strategy. According to Table 2, Fig. 2, and Table 3, sign of outputs Table 5.
currents has direct impact on charging/discharging of the capacitor, Voltage and current waveforms of first output obtained from
so in addition to flying capacitor voltage outputs currents must be simulation are shown in Fig. 7a, and their corresponding
measured. This balancing algorithm is illustrated in Fig. 4. Based experimental results are illustrated in Fig. 7b. As illustrated,
on the algorithm, balancing of flying capacitor voltage takes place voltage waveform is three level. Voltage and current waveforms of
only when voltages levels are [0 0]; in this condition, flying the second output gained from simulation are depicted in Fig. 8a,
and their corresponding experimental results are shown in Fig. 8b.
It can be seen that, the second output voltage is also three level and
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due to lower modulation index (0.6) relate to the first output (0.85)
has pulses with narrow bands. Frequency spectrum of both output
currents is illustrated in Fig. 9. As the frequency index of the
second output is one-fifth of the first output, the second output
current has more harmonics than first output current. According to
Fig. 7, Figs. 8, and 9, there is a good matching between simulation
and experimental results.
Currents and voltage sensors are disabled and enabled,
respectively, in order to evaluate the performance of the proposed
capacitor voltage controller and the result is shown in Fig. 10. It

Fig. 4  Flying capacitor voltage balancing algorithm

Table 4 Switching table of the proposed inverter including logic parameters

A B C D E F S1 S2 S3 S4 S5 VO1 VO2
xa x 0 0 0 0 1 1 1 0 1 Vdc Vdc
x x 0 0 0 1 1 1 0 0 1 Vdc 0
x x 0 0 1 0 1 1 0 1 0 Vdc −Vdc
x x 0 0 1 1 1 0 1 0 1 0 Vdc
1 1 0 1 0 0 0 1 1 1 1 0 0
0 0 0 1 0 0 0 1 1 1 1 0 0
1 0 0 1 0 0 1 0 0 0 1 0 0
0 1 0 1 0 0 1 0 0 0 1 0 0
x x 0 1 0 1 0 1 0 1 1 0 −Vdc
x x 0 1 1 0 1 0 1 1 0 −Vdc Vdc
x x 0 1 1 1 0 0 1 1 1 −Vdc 0
x x 1 0 0 0 0 0 0 1 1 −Vdc −Vdc
ax represents don't care state.

Fig. 5  Overall control strategy of the proposed inverter

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Fig. 6  Overview of experimental setup

Table 5 Simulation and experimental setup parameters

Quantity Value
DC link voltage 100 V
flying capacitor 4.7 mF
switching frequency 5 kHz
first output frequency 50 Hz
first output modulation index 0.85
second output frequency 250 Hz
second output modulation index 0.6
r1 25 Ω
r2 10 Ω
L1, L2 9 mH

Fig. 7  First output voltage and current waveforms

(a) Simulation results, (b) Experimental results (50 V/div, 2.5 A/div, 5 ms/div)

can be seen that the proposed controller has desirable performance
to restore the flying capacitor voltage.
In Table 6, the proposed inverter is compared to two well-
known topologies, named: two parallel FCIs and single FCI with
two parallel loads topologies along with three recently published
topologies, six-switch inverter [11], dual-buck six switch inverter
[5], and three-switch inverter [4] topologies. All of these topologies
can supply dual AC loads. The comparison is done in terms of
some merit factors to have a better view of advantages and
disadvantages of each topology. Table 6 shows that three-switch
inverter topology has the lowest number of components. However,
its output voltages only have two-levels which causes poor power
quality. Dual-buck six-switch inverter topology has more reliable
operation among other topologies due to its shoot-through
capability, but it uses more number of components than others.
According to Table 6, it can be concluded that the proposed
inverter provides good trade-off between number of components
(active and passive) and independent control of its outputs among
other topologies. It introduces the maximum modulation indices of
one in both CF and VF modes of operation which means
independent control of outputs without any limitations.

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Fig. 8  Second output voltage and current waveforms
(a) Simulation results, (b) Experimental results (50 V/div, 2.5 A/div, 1 ms/div)

Fig. 9  Frequency spectrum of output currents

(a) Simulation result for the first output current, (b) Experimental result for the first output current (20 dB/div, 2.5 kHz/div), (c) Simulation result for the second output current, (d)
Experimental result for the second output current (20 dB/div, 2.5 kHz/div)

Fig. 10  Performance of the capacitor voltage with and without the propose controller (10 V/div, 1 s/div)

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Table 6 Comprehensive comparison with recent techniques to supply dual ac loads
Dual loads supplying Num. of Num. of Num. of Shoot-through Maximum Independent
topology switches passive output capability modulation index control of outputs
elements voltage levels in VF mode
two parallel FCIs 8 2 3 no 1 yes
single FCI with two parallel 4 1 3 no 1 no
loads
six-switch inverter [11] 6 0 3 no 0.5 limited
dual-buck six-switch inverter 6 + 6a 8 3 yes 0.5 limited
[5]
three-switch inverter [4] 3 0 2 no 0.5 limited
proposed inverter 7 (6b) 1 3 no 1 yes
aIn addition to six switches, inverter requires six separated diodes.
bWhen proposed inverter operates in CF mode, number of switches can be reduced to six.

5 Conclusions
Here, a new dual outputs inverter based on flying capacitor is
proposed. The flying capacitor is used to add a voltage level in the
inverter outputs and improve their harmonic quality. The number
of semiconductor switches and flying capacitors are 12.5 and 50%,
respectively, less than conventional two parallel FCIs. The
proposed inverter has the ability of operating in the VF mode.
When the proposed inverter operates in constant-frequency mode,
the overall number of semiconductor switches can decrease to six
(25% lower than FCI). The switched model along with a control
strategy based on Karnauph Map is derived for the proposed
inverter. Comparison with recent works, and simulation and
experimental results verify the good performance of the inverter.
The proposed inverter can mostly use in applications such as motor
drive, UPS systems, hybrid electric vehicles, and PV systems.
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1832 IET Power Electron., 2019, Vol. 12 Iss. 7, pp. 1825-1832

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