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ASSIGNMENT – II
Topic 1- Explain the process of development for producing digital products or circuits with the help
of flowchart.
Topic 3-How period and frequency is interrelated? Explain with proper example.
Topic 4-What do you mean by duty cycle. Explain and also write down the necessities or
advantages of the same.
Topic 7-Explain the switching circuits and the truth table along with symbol and applications of:
(a) Buffer (b) Tristate buffer (c) Inverter (d) Tristate inverter
Part 1-
In this part the inner product or the main part is made. As first the requirement of the
products is given to the manufacture and detailed specification of how the product should
work. Then the making of the product starts i.e. the initial design begins. After that testing
begins it is called simulation. If the output is not up to the requirement then again the design
phase begin else the finished product is forwarded.
Part 2-
In this part the final product is made. First the product is tested with all its components and if
the requirement is fulfilled then it is fabricated and sold. If there are major error then the
whole product is redesigned else minor errors are corrected and then sold after
fabrications.
a. Standard chips –
It contains small amount of circuitry usually less than 100 transistors.
It is useful for small operations.
Example – 7400 series.
b. PLD(Programmable Logic Devices)-
Collection of gates with programmable inter-collection.
Function is configurable by the user.
Example- CAD tools.
c. CPLD(Complex Programmable Logic Devices)
Combined several PLDs together on a single integrated circuit to form complex
programmable logic devices.
Example- XC9500XL.
d. FPGA(Field programmable gate arrays)-
At the beginning of 1980, FPGA were programmable logic devices, which had fast
design, highly configurable and reprogrammable, but they were support only small
functions.
e. FPAA (Field Programmable Analog Array)-
Field programmable analog array (FPAA) based on switched capacitor circuits
operating with operational amplifiers and numerous switches incorporate many
classes (subsystems) of interconnections.
f. MPGA(Mask Programmable Gate Array)-
Mask-Programmable Gate Array (MPGA) was developed to handle larger logic
circuits. MPGAs consist of an array of pre-fabricated transistors that can be
customized. A common MPGA consists of rows of transistors that can be
interconnected to implement desired logic circuits.
Topic 3-How period and frequency is interrelated? Explain with proper example.
The period is the time it takes a wave to complete one cycle. Frequency is the number of
cycles that are completed in a certain amount of time.
f=1/t
Also, t=1/f
If the period of a square wave is 1 micro second, then its frequency is measured as
f=1/1μs=1/10^-6s=10^6 Hz=1MHz.
Clock signals are generally considered as symmetrical signal i.e. the signal where the fall
time of a signal is quite equal with the rise time of the signal.
Fall time = rise time.
Topic 4-What do you mean by duty cycle. Explain and also write down the necessities or
advantages of the same.
Duty cycle is a convenient measure of how symmetric or how asymmetric a wave form
is.
There are two possible duty cycle available –
(a) Duty Cycle ‘H’ = tH/T.
(b) Duty Cycle ‘L’ = tL/T.
For a symmetrically square wave the duty cycles are equal i.e. duty cycle ‘H’ = duty cycle ‘L’=
(T/2)/T=T/2T =1/2=0.5 = 50%.
Duty cycles can be used to describe the percent time of an active signal in an electrical
device such as the power switch in a switching power supply or the firing of action
potentials by a living system such as a neuron.
The duty factor for periodic signal expresses the same notion, but is usually scaled to a
maximum of one rather than 100%
(a) If a wave formed having frequency 6MHz and the width of the positive pulse is
0.05Ms. What is the high duty cycle for the wave form?
Solution-
Given,
f = 6MHz
T= 0.05Ms
T=1/f=1/6MHz=0.17Ms
tH= 0.05Ms
(b) If a wave formed having frequency 5MHz and the high duty cycle for the wave form is
25%. What is the width of the positive pulse?
Solution-
Given,
T=1/f=1/5=0.2Ms
High duty cycle = 25%
(c) If the width of the positive pulse is 0.05Ms and the high duty cycle for the wave form is
25%.What is the frequency of the wave formed?
Solution-
Given,
tH= 0.05Ms
High duty cycle = 25%
(d) If the width of the positive pulse is 0.05Ms and the high duty cycle for the wave form is
75%.What is the frequency of the wave formed.
Solution-
Given,
tH=0.05Ms
High duty cycle = 75%
Truth table-
Topic 7-Explain the switching circuits and the truth table along with symbol and applications of:
(a) Buffer (b) Tristate buffer (c) Inverter (d) Tristate inverter
(a) Buffer
Symbol for buffer-
Truth Table-
Switching Circuit-
A buffer can be thought of as an electronic switch, the switch is actuated by the input
voltage Vi. Its operation is as same as relay. When Vi is low, the switch is down and
Vo is low as well. On the other hand, when Vi is high the switch moves up and Vo is
high. Since, the buffer is capable of delivering additional current load. It is often called
buffer amplifier.
Example- 7407 is a fourteen pin IC that contains six buffers.
Truth table-
Switching Circuit-
The above diagram is a simple buffer with an additional switch controlled by an input
labeled by G. Now G can be in either high state or in low state. Therefore, when
G=0vDC we get high impedance state as output. When G=+5vDC the remaining
circuit will act as a normal buffer through the load or disconnects the buffer from the
load.
Example- TTL54126 or 74126 which is a 14 pin IC with four tri-state buffers.
(c) Inverter
Truth table-
Switching Circuit
When the input to the circuit is low the switch remains up and hence the output is high.
When the input is high the switch arm is actuated and moves down and the output is
grounded, it means V0=0vDC. Therefore, A= A’.
It is used for centralized heating and cooling system. As the heat increases cooling
system starts and vice versa in case of cooling.
Truth Table-
Switching Circuit-
As shown in the above diagram when G is low the inverter is connected to the output
when G is high it enables the switch in open state and hence the output is
disconnected from the inverter.
Example- 74LS386A.
Using two NAND gate we can make an AND gate as shown in the above figure.
b) AND gate using NOR gate.
Using three NOR gate we can make an AND gate as shown in the above figure.
Using three NAND gate can make an OR gate as shown in the above figure.
Using two NOR gate we can make an OR gate as shown is the above figure.
Using six NOR gate we can make a XOR gate as shown in the above figure.
Using five NAND gate we can make a XNOR gate as shown in the above figure.
Using five NOR gate we can make a XNOR gate as shown in the above figure.
Using two NAND gate we can make a NAND gate as shown in the above figure.
j) Buffer using NOR gate.
Using two NOR gate we can make a NAND gate as shown in the above figure.
Using a NAND gate we can make a inverter as shown in the above figure.
Using a NAND gate we can make a inverter as shown in the above figure.
Using four NAND gate we can make a NOR gate as shown in the above figure.