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An efficient algorithm to design convolved LFSR/SR

Conference Paper · February 2000

DOI: 10.1109/NRSC.2000.838952 · Source: IEEE Xplore

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 An Efficient Algorithm to Design Convolved LFSR/SR
Mohamed H. El-Mahlawy, Winston Waller
Electronic Engineering Lab., University of Kent at Canterbury
Canterbury, Kent, CT2 7NT, U.K.
Abstract: In this paper, we have presented an efficient algorithm
to design convolved LFSR/SR (Linear Feedback Shift Register /
Shift Register). Convolved LFSR/SR is considered to be the opti-
mal pseudoexhaustive test pattern generator as far as the lengths of
test set and hardware overhead are concerning. In this algorithm, we
have presented an efficient search to assign the residues for the in-
puts of the CUT to increase the chance to get several solution and
reduce the hardware overhead. The experimental results indicate the
efficiency of our approach.
1.0 Introduction
In recent years, there has been increased interest in testing combi-
national networks using pseudoexhaustive test techniques. The
choice of pseudoexhaustive test technique depends on whether or
not any combinational circuit outputs depend on all of the circuit
inputs. If any circuit output depends on all of its inputs, a partition-
ing (or segmentation) test technique must be used to test these cir-
cuits. For circuits with restricted output dependency (i.e, none of
the circuit outputs depend on all of its inputs), the pseudoexhaus-
tive test techniques provide an alternative test method. The combi-
national circuit with n inputs and m outputs is modelled as a direct
acyclic graph. The nodes represent gates and the interconnection
signals are represented by edges. Each output cone of the circuit
forms a subgraph need not be disjoint. The dependency set, Di, of
the output cone i is considered the set of the primary inputs and the
pseudo-primary inputs that feed it directly or effect it through
another node. The dependency, |Di|, of the output cone i is the car-
dinality of its dependency set. Let k be the maximum value among
the dependencies of the m output cones. The circuit can be charac-
terized as an (n, m, k) circuit. The circuit is partitioned into m out-
put cones, and each cone is tested exhaustively. The test ensures
detection of all irredundant combinational faults within individual
cones of the circuit without fault simulation. The time required for
pseudoexhaustive testing depends on the sizes of the output cones.
So pseudoexhaustive testing reduces the testing time to a feasible
workable value while retaining many of the advantages of exhaus-
tive testing. Many test pattern generators have been proposed for
pseudoexhaustive testing. Examples are syndrome driver counters
(SDCs) [1], constant-weight counters (CWCs) [2], condensed
LFSRs [3], cyclic LFSRs [4], combined LFSR and XOR gates
(LFSR/XORs) [5] [6], combined LFSR and shift register (simple
LFSR/SRs) [7], and convolved LFSR/SRs [8]. Convolved LFSR/
SR is considered to be the optimal pseudoexhaustive test pattern
technique as far as the lengths of test set and hardware overhead
are concerning. In [8], the size of shift register segment is con-
strained to have a desired minimum length to reduce the number of
feed forward stages. This constraint weakens the potential of using
convolved LFSR/SR and in a lot of cases, the number of XOR
gates needed for convolved LFSR/SR is high.
12 April 2006
The algorithm presented in this paper is dedicated to reduce the
constraint in the size of the shift register segment and make an effi-
cient search to restrict on the number of feed forward stages into
two stages at most and no restriction on the size of the shift register
segment. The residue assignment such that minimum hardware
overhead are achieved. The results are compared with the results in
[8] for the five benchmark circuits and indicate the efficiency of
our approach. Different results present for five benchmark circuits,
16-bit adder, and 8-bit multiplier with higher k, also.
We will begin with a background survey of the convolved LFSR/
SR as test pattern generator for pseudoexhaustive testing in section
2. Search for residues assignment will be in section 3. The algo-
rithm is given in section 4. The experimental results will be in sec-
tion 5 and the conclusion in section 6.
2.0 Convolved LFSR/SR as test pattern generator
for pseudoexhaustive testing
Convolved LFSR/SR [8] is a pseudoexhaustive test pattern genera-
tor based on simple LFSR/SR with XOR gates inserted between
some stages in the SR (Shift Register) portion. It bridges the gap
between LFSR/SRs and LFSR/XORs. A convolved LFSR/SR in
trivial case without any XOR gates, becomes a simple LFSR/SR
requiring minimal hardware. Residues [8] [12] are considered for
assignment to the inputs of the CUT in the order generated by suc-
cessive stages of a simple LFSR/SR. During the assignment proc-
ess, the residue of a specific stage may be linearly dependent with
other residues for an output cone. To ensure linear independence,
the residue of that specific stage is modified using XOR gates. Let
the inputs 0 through i be assigned the residues 0 through i. The
convolved LFSR/SR appears similar to the simple LFSR/SR for
stages 0 through i. Assume that input i + 1 can not be assigned any
of the residues, i + 1, i + 2,..., i + j - 1 because all of them are line-
arly dependent on already assigned residues for some output cones.
Residue i + j is then selected for assignment to the input i + 1.
Stage i + 1 can be made to generate this residue by feeding the res-
idue i + j - 1 at its input. Let the residue i + j - 1 be a linear combi-
nation of certain residues. These residues are combined using XOR
gates and provide the input to stage i + 1. The stage i + 1 is referred
to as a feed forward stage of the convolved LFSR/SR. The set of
stages between two consecutive feed forward stages forms a shift
register segment. Once the inputs are assigned proper residues, all
cones in the circuit can be exhaustively tested. Convolved LFSR/
SR is considered to be the optimal pseudoexhaustive test pattern
generator as far as the lengths of test set and hardware overhead are
concerning. The multiple LFSR/SR [8] is a special case of con-
volved LFSR/SR. It is composed of two or more independent sim-
ple LFSR/SRs that are run in parallel. The simple LFSR/SRs have
identical feedback polynomials but may have different shift regis-
ter lengths and initial seeds. The initial seeds can be manipulated to
generate desired residues from the simple LFSR/SRs. However,
1
the residues of the successive stages within each simple LFSR/SR
are fixed by the feedback polynomial.
There are several methods to check the linear independence for the
dependency set with size k but this method to check the linear inde-
pendence based on the determination of the rank of a binary matrix
is the most efficient in terms of time. The steps of the method is as
the following: (1) Put the residues in matrix M with each column
representing one residue. (2) Arrange the first column to make the
first element 1 (if this element equals 0 you can change the row
with another row whose corresponding element equals 1) and make
all elements below it equal to 0 (by adding (mod 2) the correspond-
ing rows). (3) Repeat step 2 for second column w.r.t second ele-
ment in the column, for third column w.r.t third element in the
column, and so on. (4) In the case where it is not possible to pro-
duce the diagonal of 1s then the residues are linearly dependent.
The upper bound of the number of steps for one output is given by
the following equation (assuming the time required to sum two
rows equals the time required to exchange two rows):
k to demonstrate how the search sequence occur where each portion
G(k) = ∑ (k – (j – 1))
j=2
where G ( k ) is the upper bound of the number of steps in the worst
case. This method is efficient in terms of time as indicated in
TABLE1.
3.0 Search for residues assignment
The search approach is based on software procedure that generates
a pattern of 1’s and 0’s. First, we assign 1’s in the first n - k residues
and the remaining Q - n residues will be assigned to 0’s. The algo-
rithm will utilize those residues assigned to 1 and will neglect resi-
dues assigned to 0 in input assignment. The procedure sweeps (n -
k) 1’s through (Q - k) to get new assigned residues in the manner to
restrict the number of feed forward to be two at most and no
restriction in the size of the shift register segment. The sweep takes
place as shown in Fig. 1 for the CUT with k = 4, n = 12. These pat-
terns take the shape of the convolved LFSR/SR generator after res-
idues assignment. The linear independence for all output cones is
checked after the residues assignment. If the assigned residues do
not achieve the linear independence for any output cone, the itera-
tive search procedure progressively assigns residues to all inputs
for another pattern.
Example 1: We will take small portion in the sequence of patterns
will separate by line in Fig. 1.
4 5 6 7 8 9 10 11 12 13 14
the pattern :1 1 1 1 0 1 1 1 1 0 0
the pattern :1 1 1 1 0 0 1 1 1 1 0
the pattern :1 1 1 1 0 0 0 1 1 1 1

TABLE 1. The first pattern will assign residues 0-3 4 5 6 7 9 10 11 12 to all

inputs and check for linear independent for all output cones if any
k G(k) k G(k) k G(k) k G(k)
output is linear dependent, go to next pattern. We notice that the
3 3 11 55 17 136 25 300 residues 4 5 6 7 is fixed in this patterns. First, the linear independ-
4 6 12 66 18 153 26 325 ent is checked for residues 0-3 4 5 6 7 assigned the inputs 0-7. If
this check is linear dependent, the procedure will exit from that
5 10 13 78 19 171 27 351
portion to another portion. If this check is linear independent, the
6 15 14 91 20 190 28 378 algorithm will continue for the input assignment in this portion.
7 21 15 105 21 210 29 406 This will save a big time in the search for high value of Q.
8 28 16 120 22 231 30 435 We have divided the search into two scan, partial scan by using
9 36 17 136 23 253 31 465 pattern A and pattern B in Fig. 1 or by using pattern A and pattern
10 45 18 153 24 276 32 496 C in Fig. 1 and fall scan by using all patterns. Sometimes, it is not
usefull to begin the scan from the first pattern, so we need to deter-
For a (n, k) convolved LFSR/SR, all possible residues can be con- mine the first residue that assign for kth input before the scan
sidered for input assignment. However, the number of possible res- begin. When we use the primitive polynomial with minimum terms
idues increases exponentially with the degree of the primitive (that need one XOR gate, for example), we use partial scan with
polynomial. In practice, only a few residues are considered for pattern A and pattern C because the chance to have less hardware is
input assignment, Q. This practical consideration weakens the high as shown in the example 2. In [8], the SR segment size is con-
potential of using convolved LFSR/SRs. We can not use the advan- strained to have a desired minimum length to be greater than or
tage of the convolved LFSR/SR without good search in reasonable equal to certain value. This values sometimes is greater than or
time with minimum hardware overhead. First, we need to retrieve equal k to reduce the number of feed forward stages and reduce the
all primitive polynomials for the required order with certain limit area overhead due to XOR gates. But for some results in [8], the
value for the number of terms of the polynomial from the stored author reduce this value below k to get the solution that all output
file and check if any primitive polynomial achieves that all output cones are exhaustively tested. So, we find that this restriction will
cones will be exhaustively tested, the convolved LFSR/SR will be reduce the capability of this generator and reduce the chance of
a simple LFSR/SR with minimal hardware overhead and optimal obtaining several solutions. We have designed this procedure for
length of test set. If no primitive polynomial achieves that all out- generating the pattern shown in Fig. 1 with restriction in the
put cones will be exhaustively tested, we need to change the resi- number of feed forward and no restriction in the size of the shift
dues with the admissible residues. A primitive polynomial (with register segment to reduce the hardware overhead and increase the
minimum terms) is chosen and n - k residues are assigned from Q - chance to obtain several solutions. This choice enables for the
k residues such that all output cones are exhaustively tested where algorithm to get at least one or two feed forward to be independent
all residues from 0 to (k -1) will automatically assign the first k simple LFSR/SRs with the same polynomial and different initial
inputs. The procedure of selecting n - k residues from Q - k resi- seeds. Several solutions with minimum hardware overhead have
dues to achieve minimum hardware will be required. been obtained and in some cases, no solution with minimum hard-

2 12 April 2006
ware overhead will exist for certain primitive polynomials. The Generator procedure
experimental results indicate the efficiency of this search.
input: The dependency set of output cones, the order of the
Residues from 4 - 14 Residues from 4 - 14 primitive polynomial, r >= k, the number of primary input
the pattern :11111111000 the pattern :10011110111 and pseudo-primary input, n, the number of output cones,
the pattern :01111111100 the pattern :10011111011
m, the maximum value among the dependencies of the m
outputs, k, the limitation number for the number of residues,
the pattern :00111111110 the pattern :10011111101
Q, and the type of the scan.
the pattern :00011111111 the pattern :11010111110
the pattern :10111111100 the pattern :11010011111 output: Residues assignment for inputs and its initial seed.
the pattern :10011111110 the pattern :11011011110
the pattern :10001111111 the pattern :11011001111 1. Generate all primitive polynomials with limit in the
the pattern :11011111100 the pattern :11011101110 number of terms.
B
the pattern :11001111110 the pattern :11011100111
2. Generate corresponding residues (the first n residues) for
the pattern :11000111111 the pattern :11011110110
selected primitive polynomials, check the linear independ-
the pattern :11101111100 the pattern :11011110011 ence for each output cone. In case of no output is linear
the pattern :11100111110 the pattern :11011111010 dependence, the corresponding primitive polynomial
the pattern :11100011111 the pattern :11011111001 exhaustively tests all output cones, this solution is consid-
A
the pattern :11110111100 the pattern :11001011111 ered the optimal solution in hardware overhead, exit (The
the pattern :11110011110 the pattern :11001101111 solution will be (n, r) simple LFSR/SR). In the case of no
the pattern :11110001111 the pattern :11001110111 primitive polynomial do not achieve the linear independ-
the pattern :11111011100 the pattern :11001111011 ence for all outputs, continue.
the pattern :11111001110 the pattern :11001111101
3. Select a primitive polynomial (with minimum term), gen-
the pattern :11111000111 the pattern :01011111110
erate all residues (according to the number of the constraint
the pattern :11111101100 the pattern :01001111111 Q).
the pattern :11111100110 the pattern :01101111110
the pattern :11111100011 the pattern :01100111111 4. Generate the pattern (transfer this pattern with 1s into the
the pattern :11111110100 the pattern :01110111110 corresponding residues) using partial scan or fall scan.
the pattern :11111110010 the pattern :01110011111
5. For each pattern and corresponding residues, the program
the pattern :11111110001 the pattern :01111011110
checks for linear independence condition for all outputs. If
the pattern :10101111110 the pattern :01111001111
this condition is not achieved, continue with another pat-
the pattern :10100111111 the pattern :01111101110 tern. But if this condition is achieved, the corresponding
the pattern :10110111110 the pattern :01111100111 residues are the required residues to exhaustively test all
C
the pattern :10110011111 the pattern :01111110110 output cones, calculate the initial seed for all residues, and
the pattern :10111011110 the pattern :01111110011 then exit.
the pattern :10111001111 the pattern :01111111010
the pattern :10111101110 the pattern :01111111001
6. Repeat step 5, until the generated patterns are complete.
If no solution exists, go to step 3.
the pattern :10111100111 the pattern :00101111111
B
the pattern :10111110110 the pattern :00110111111
Example 2: We have a CUT with 24 inputs and 6 outputs. The
the pattern :10111110011 the pattern :00111011111
dependency set for each output is as follows: D0 = {0, 1, 3, 4, 8, 9,
the pattern :10111111010 the pattern :00111101111 10, 13, 16, 22}, D1 = {0, 2, 3, 5, 6, 8, 11, 14, 17, 23}, D2 = {1, 2, 4,
the pattern :10111111001 the pattern :00111110111 5, 7, 9, 12, 15, 18, 22}, D3 = {0, 1, 2, 6, 7, 10, 11, 12, 19, 23},
the pattern :10010111111 the pattern :00111111011 D4 = {3, 4, 5, 6, 7, 13, 14, 15, 20, 22}, D5 = {8, 9, 10, 11, 12, 13,
the pattern :10011011111 the pattern :00111111101 14, 15, 21, 23}.
the pattern :10011101111
By using partial scan for pattern A and pattern C and from the run
of the program
Fig 1 The sweep of 8 (n - r) 1’s through 11 bits.
the polynomial is 10: 3 0
The residues of the convolved LFSR: 0 - 9 13 - 15 248 -258
4.0 The algorithm
The initial seed: 1000000000-000-01111111001
We divide this procedure into three parts: (1) Generate all primitive
polynomials for the selected order, higher orders require long exe- We have got two feed forwards the first one has size 3, we need to
2 5
cution time, so we store these polynomials on file. One of the most enter residue 12 in the input of residue 13,R 12 = x + x = R 2 + R 5 .
practical methods of finding primitive polynomials is the sieve We notice this feed forward need one XOR gate. The other one has
method [12]. A series of tests are applied to the trial polynomial size 11 which is independent simple LFSR/SR with the same prim-
that first determines irreducibility and then primitivity. (2) Gener- itive polynomial with different initial seed. The convolved LFSR/
ate the total residues for the assigned primitive polynomial [8] SR for this circuit with its initial seed is shown in Fig. 4. The con-
[12]. (3) Assign the residues for convolved LFSR/SR with its ini- volved LFSR/SR has 3 XOR gates and the length of test set is
tial seed. 1023. We know this generator miss the all zero seed so, this
scheme needs two seeds. We have implemented the procedure TPG

12 April 2006 3
in [8]. The residues will be 0-9 50-60 111-113. The total number of ciency of our approach where the number of XOR gates produced
upper bound of XOR gates required is 8. Where the number of is always better than or equal to that produced in [8] for the same
terms in the residue 110 is 7. So the advantage of our approach ena- primitive polynomial and our algorithm has better results with
bles us to make the first feed forward stage which has size less than other polynomials. TABLE 6 presents the convolved LFSR/SR
10. designs for five partitioned benchmark circuits, 16-bit adder, and
8-bit multiplier for a maximum dependency of 24, 28, 32 inputs to
Note: The required order of primitive polynomial to test this circuit indicate the power of this algorithm to deal with high order of
exhaustively is 19 using Generalized LFSR/XOR, the length of test primitive polynomial in reasonable time as indicated in the table.
set will be 524288. The number of XOR gates is approximately 47. The run time in this paper on a SUN 5/60 computer and in [8] on a
For condensed LFSR, the length of test set according to theorem 1 SUN 4/60.
in [3] will be 1048576 (k = 20) and the number of XOR gates is 9.
For cyclic LFSR, there is no cyclic code corresponding to 24 (the
number of inputs of the CUT), but we can go through the steps of 6.0 Conclusion
the design of this generator using [4]. From [4, appendix I], we can
choose n’ = 31, k’ = 11, d = 11, k = n’ - k’ = 20, then the length of We have introduced demonstrated an efficient algorithm to design
test set will be 1048576, and of course, the number of XOR gates convolved LFSR/SR to generate the required residues to test
will be greater much than 3. It is clear from example 3 that the effi- exhaustively all output cones with minimal hardware overhead.
cient algorithm to design convolved LFSR/SR presented in this Without good search approach, we can not use the advantage of the
paper is the best in terms of test set lengths and hardware overhead convolved LFSR/SR. The use of pattern generation reduces the
comparing to other generators. restriction of the size of shift register segment and restricts in the
number of feed forward. These give a good reduction in the
number of XOR gates as indicated in the experimental results. Pat-
tern generation increases the chance to obtain several solutions,
also.
1 0 0 0 0 0 0 0 0 0
0 1 2 3 4 5 6 7 8 9
7.0 References
0 0 0
10 - 12 [1] Zeev Barzilai, Jacob Savir, George Markowsky, and Merlin G.
Smith, “The weighted syndrome sums approach to VLSI testing,”
IEEE Transactions on Computers, VOL. C-30, NO. 12, Dec. 1981.
0 1 1 1 1 1 1 1 0 0 1
13 - 23 [2] D. T. Tang and L. S. Woo, “Exhaustive test pattern generation
with constant weight vectors,” IEEE transaction on computers vol.
Fig. 2 Convolved LFSR/SR for example 2. C-32, pp. 1145-1150, Dec. 1983.

We have obtained several solutions which provide the same mini- [3] L. -T. Wang and E. J. McCluskey, “Condensed linear feedfack
mum hardware overhead, some of which are shown below: shift register (LFSR) testing - A pseudoexhaustive test technique,”
IEEE transaction on computers vol. C-35, pp. 367-370, Apr. 1986.
0-9 13 - 15 580 - 590 0-9 15 - 17 388 - 398
0-9 16 - 19 380 - 389 0-9 22 - 24 485 - 495 [4] L. -T. Wang and E. J. McCluskey, “Circuits for pseudoexhaus-
0-9 22 - 24 580 - 590 0-9 22 - 24 818 - 828 tive test pattern generation,” IEEE transaction on computer-aided
0-9 22 - 24 25 - 835 0-9 22 - 24 828 - 838 design vol. 7, pp. 1068- 1080 Oct. 1988.
0-9 26 - 28 18 - 128 0-9 16 - 18 853 - 863
[5] S. B. Akers, “On the use of linear sums in exhaustive testing,”
0-9 16 - 18 997 - 1006 0-9 16 - 19 127 - 136
Digest of papers, 15th Annual International on Fault Tolerant
0-9 15 - 17 846 - 856 0-9 16 - 18 680 - 690 Computing Symposium, pp. 148-153, 1985.
0-9 15 - 17 826 - 836 0-9 15 - 17 658 - 668
[6] N. Vasanthavada, P. N. Marinos, “An operationally efficient
scheme for exhaustive test-pattern generation using linear codes,”
5.0 Experimental Results Proc. International Test Conference, pp. 476-482, Nov. 1985.
Using the algorithm described above, convolved LFSR/SRs were [7] Zeev Barzilai, Don Coppersmith, and Arnold L. Rosenberg,
designed for five benchmark circuits, 8-bit multiplier, and 16-bit “Exhaustive generation of bit patterns with applications to VLSI
adder that were partitioned using our partitioning procedure. self-testing,” IEEE Transactions on Computers, VOL. C-32, NO.
TABLE 5 presents the convolved LFSR/SR designs for five parti- 2, Feb. 1983.
tioned benchmark circuits for a maximum dependency of 20
inputs. The first three columns provide the characteristics of parti- [8] Srinivasan, R., S. K. Gupta, and M. A. Breuer, “Novel test pat-
tioned circuits. The exponent terms for the feedback primitive pol- tern generators for pseudoexhaustive testing,” Proc. International
ynomial and the residue assignment for the stages are given by the Test Conference, pp. 1041-1050, 1993.
fourth and fifth column respectively. The number of upper bound
of XOR gates required to realize these stages are specified for our [9] W. Wesley Petrson, E. J. Weldon., “Error-correcting codes,”
paper in the sixth column and for [8] in the seventh column. An second edition, 1972.
upper bound on the required number of XOR gates can be realized
using (t - 1) 2-input XOR gates, where t is the number of terms in
the residue of that stage. From TABLE 5, we have found the effi-

4 12 April 2006
[10] Paul H. Bardell, Willian H. McAnney, Jacob Savir, “Built-In in FORTRAN,” International Symposium on circuits and
test for VLSI: pseudorandom techniques,” John Wiley and Sons, systems, June, 1985.
1987.

[11] F. Brglez and H. Fujiwara, “A neutral netlist on ten

combinational benchmark circuits and a target translator

TABLE 2. Convolved LFSR/SRs for partitioning benchmark circuits

(n,m,k) (n,m,k)
before after Primitive XOR in this
Ckt partitioning partitioning polynomial Residue assignment paper XOR in [8]
c432 (36,7,36) (55,26,20) 20 19 4 3 0 0-19 21-30 62-86 9 / 1 sec 9 / 1.9 sec
20 3 0 0-19 27-41 144-163 3 / 19 sec -
20 6 4 1 0 0-29 35-59 6 / 0 sec -
c499c (41,32,41) (49,40,14) 14 9 8 3 0 0-13 2417-2451 6 / 20 sec 11 / 59.1 sec
1355 14 5 3 1 0 0-13 18-30 420-441 9 / 139 sec -
14 7 5 3 0 0-28 245-264 6 / 26 sec -
c880 (60,25,45) (70,36,17) 17 16 3 2 0 0-16 37-71 88-105 9 / 39 sec 13 / 3.1 sec
17 13 10 6 0 0-69 3 / 0 sec -
17 3 0 0-16 110-144 224-241 3 / 290 sec -
c1908 (33,25,33) (46,38,20) 20 19 4 3 0 0-19 24-27 103-124 10 / 11 sec 10 / 31.6 sec
20 3 0 0-19 59-62 270-291 4 / 85 sec -
20 6 4 1 0 0-19 38-63 6 / 0 sec -

TABLE 3. Convolved LFSR/SRs for partitioning benchmark circuits and other circuits

(n,m,k) (n,m,k)
before after Primitive XOR in Time in
Ckt partitioning partitioning polynomial Residue assignment this paper second
c432 (36,7,36) (51,22,24) 24 4 3 1 0 0-26 75-98 6 0
(47,18,28) 28 3 0 0-27 377-395 8 1
(43,14,32) 32 28 27 1 0 0-31 100-110 17 1
c499 (41,32,41) (48,39,22) 22 1 0 0-21 422-430 1177-1193 17 2791
c1355 (48,39,23) 23 5 0 0-22 24 210-233 3 1
(48,39,24) 24 4 3 1 0 0-23 129-156 6 1
(47,38,30) 30 16 15 1 0 0-29 4882-4898 17 27

c880 (60,25,45) (69,35,24) 24 4 3 1 0 0-23 59-103 6 0

(67,33,28) 28 3 0 0-27 29-38 355-383 3 17
(63,29,32) 32 28 27 1 0 0-31 250-280 15 2
c1908 (33,25,33) (45,37,24) 24 4 3 1 0 0-23 78-98 12 0
(42,34,28) 28 3 0 0-27 40-41 364-375 8 9
(37,29,32) 32 28 27 1 0 0-31 41-45 11 0
add16 (33,17,33) (34,18,23) 23 5 0 0-33 1 0
(34,18,27) 27 8 7 1 0 0-33 3 0
(34,18,31) 31 3 0 0-33 1 0
mult8 (17,16,17) (23,22,16) 16 11 9 7 0 0-22 3 0
(29,28,14) 14 13 4 2 0 0-28 3 0
(39,38,12) 12 7 4 3 0 0-11 40-53 66-78 9 5

12 April 2006 5

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