Acer E5-421 Quanta ZQN DA0ZQNMB6D0 R1a PDF

5 4 3 2 1
ZQN BLOCK DIAGRAM

VRAM
D
BEEMA PEG PEG0~3(PCI-E x4) GPU Channel B
D
TX/RX
DDRIII-SODIMM1 DDRIII-SODIMM2 One Channel DDR III BGA 769 Jet XT(25W)
IMC
(STD) (RVS)
29mm X 29mm
X'TAL VRAM DDR3-512MB*4 = 2GB

27.0MHz
USB-1 (CCD)
CLK USB-3 (TouchS) eDP/CCD Con.
eDP INT_eDP
SATA 0 SATA0
SATA - HDD
Display INT_CRT
CRT Con.
C C
SATA 1 SATA1
SATA - ODD FT3B
HDMI
INT_HDMI
APU HDMI Con.
USB 2.0 USB3

Connector USB3.0 USB 3.0
USB/IO Board USB2.0(Port 0 and Port 5)
USB2.0 Connector
Connector
USB 2.0
Connector
PCI-E x1 PCIE-1
USB-7 MINI CARD

GL834L WLAN
CardReader USB2.0(Port 6) X'TAL
Connector
Card Reader 32.768KHz
SD
PCIE-2 RTL8111GS-CG RJ45
X'TAL 48MHz 10/100/1G
B
Touch Pad I2C USB2.0(Port 2) X'TAL B
Connector MCU 25MHz
CLK
BQ24737 ISL62771
SPI SPI ROM Batery Charger P20 CPU core/VAXG P24
8M
TPS51225 TPS54318RTER
Azalia IHDA RTC
3V/5V P21 +1.8V P25
LPC
BATTERY
TPS51216 TPS54318RTER
+1.5V_SUS P22 +1.5V_GFX
EC TPS51211 TPS54318RTER
ALC283-CG 0.95V_S5 +PCIE_VDDC_GFX
P23
AUDIO CODEC ITE8587
A A
TPS51728RHAR
GPU_Core
Universal Fan Driver Quanta Computer Inc.

Jack K/B Con. HALL SENSOR
PROJECT : ZQN
Size Document Number Rev
1A
Block Diagram
Date: Tuesday, April 29, 2014 Sheet 1 of 39
5 4 3 2 1
1 2 3 4 5 6 7 8
Power Sequence
ACIN
3V/5VPCU
NBSWON#
A A
DNBSWON#
S5_ON/S5
RSMRST#
PCIE_WAKE#
SUSC
SUSB
SUSON
MAINON
VR_ON
B B
CPU_CORE
VRM_PWRGD
HWPG
Power States
CONTROL ECPWROK
POWER PLANE VOLTAGE DESCRIPTION SIGNAL ACTIVE IN
PWR_GOOD
VIN +10V~+19V MAIN POWER ALWAYS ALWAYS
+1.5V_RTC +1.5V RTC POWER ALWAYS ALWAYS PCI_RST#
+3VPCU +3.3V EC POWER ALWAYS ALWAYS
+5VPCU +5V CHARGE POWER ALWAYS ALWAYS
+15V +15V CHARGE PUMP POWER ALWAYS ALWAYS
+3V_S5 +3.3V LAN/ TPM POWER S5_ON S0-S5

Thermal Follow Chart
C +5V_S5 +5V USB POWER S5_ON S0-S5 C
+1.8V_S5 +1.8V APU POWER S5_ON S0-S5
+0.95V_S5 +0.95V APU CORE POWER S5_ON S0-S5 APU CORE_PWM_PROCHOT#

+5V +5V HDD/ODD/Codec/TP/CRT/HDMI POWER MAINON S0 CORE PWR H/W Throttling APU
+3V +3.3V APU/Peripheral component /WLAN POWER MAINON S0
+1.5VSUS +1.5V CPU/SODIMM CORE POWER SUSON S0-S3

THERM_ALERT#
+SMDDR_VTT +0.75V SODIMM Termination POWER MAINON S0
FAN Driver FAN
+1.8V +1.8V APU POWER MAINON S0
PROCHOT_EC
+1.5V +1.5V MINI CARD MAINON S0
SM-Bus
+0.95V +0.95V APU CORE POWER MAINON S0
+VDDNB_CORE variation APU CORE POWER VRON S0

EC
LCDVCC +3.3V LCD POWER LVDS_VDDEN S0 CPUFAN#
+VGPU_CORE variation GPU POWER DGPU_PWREN S0 NTC 3V/5 V

D SYS_SHDN# D
+1.5V_GFX +1.5V GPU POWER DGPU_PWREN S0

S5_ON Thermal SYS PWR
Protection
+1.8V_GFX +1.8V GPU POWER DGPU_PWREN S0
+3V_GFX +3V GPU POWER DGPU_PWREN S0
Quanta Computer Inc.

PROJECT : ZQN
1A
PWR Status & GPU PWR CRL
1 2 3 4 5 6 7 8
5 4 3 2 1
M_A_DQ[0..63] <9,10>
U24B
<9,10> M_A_A[15:0] M_A_A0 AG38 B30 M_A_DQ0
M_A_A1 W35 M_ADD0 M_DATA0 A32 M_A_DQ1
M_A_A2 W38 M_ADD1 KABINI M_DATA1 B35 M_A_DQ2
M_A_A3 W34 M_ADD2 PART 2 OF 9 M_DATA2 A36 M_A_DQ3
D M_A_A4 U38 M_ADD3 M_DATA3 B29 M_A_DQ4 D
M_A_A5 U37 M_ADD4 M_DATA4 A30 M_A_DQ5
M_A_A6 U34 M_ADD5 M_DATA5 A34 M_A_DQ6
M_A_A7 R35 M_ADD6 M_DATA6 B34 M_A_DQ7
M_A_A8 R38 M_ADD7 M_DATA7
M_A_A9 N38 M_ADD8 B37 M_A_DQ8
M_A_A10 AG34 M_ADD9 M_DATA8 A38 M_A_DQ9
M_A_A11 R34 M_ADD10 M_DATA9 D40 M_A_DQ10
M_A_A12 N37 M_ADD11 M_DATA10 D41 M_A_DQ11
M_A_A13 AN34 M_ADD12 M_DATA11 B36 M_A_DQ12
M_A_A14 L38 M_ADD13 M_DATA12 A37 M_A_DQ13
M_A_A15 L35 M_ADD14 M_DATA13 B41 M_A_DQ14
<9,10> M_A_BS#[2..0] M_ADD15 M_DATA14 M_A_DQ15 U24A
C40
M_A_BS#0 AJ38 M_DATA15 R10 L2
M_A_BS#1 AG35 M_BANK0 F40 M_A_DQ16 R8 P_GPP_RXP0 P_GPP_TXP0 L1
M_A_BS#2 N34 M_BANK1 M_DATA16 F41 M_A_DQ17 P_GPP_RXN0 KABINI P_GPP_TXN0
<9,10> M_DM[7..0] M_BANK2 M_DATA17 K40 M_A_DQ18 PCIE_RXP1 R5 K2 PCIE_TXP1_C
PART 1 OF 9 C565 0.1U/10V_4 PCIE_TXP1 <24>
M_DM0 M_DATA18 M_A_DQ19 <24> PCIE_RXP1 PCIE_RXN1 P_GPP_RXP1 P_GPP_TXP1
B32 K41 R4 K1 PCIE_TXN1_C C566 0.1U/10V_4 PCIE_TXN1 <24>
M_DM1 M_DM0 M_DATA19 M_A_DQ20 <24> PCIE_RXN1 P_GPP_RXN1 P_GPP_TXN1
B38 E40
M_DM2 G40 M_DM1 M_DATA20 E41 M_A_DQ21 PCIE_RXP2_LAN N5 J2 PCIE_TXP2_LAN_C C571 0.1U/10V_4
M_DM3 M_DM2 M_DATA21 M_A_DQ22 <23> PCIE_RXP2_LAN PCIE_RXN2_LAN P_GPP_RXP2 P_GPP_TXP2 PCIE_TXP2_LAN <23>
N41 J40 N4 J1 PCIE_TXN2_LAN_C C572 0.1U/10V_4
M_DM4 M_DM3 M_DATA22 M_A_DQ23 <23> PCIE_RXN2_LAN P_GPP_RXN2 P_GPP_TXN2 PCIE_TXN2_LAN <23>
AG40 J41
M_DM4 M_DATA23
PCIE I/F
M_DM5 AN41 N10 H2
M_DM6 AY40 M_DM5 M41 M_A_DQ24 N8 P_GPP_RXP3 P_GPP_TXP3 H1
M_DM7 AY34 M_DM6 M_DATA24 N40 M_A_DQ25 P_GPP_RXN3 P_GPP_TXN3
Y40 M_DM7 M_DATA25 T41 M_A_DQ26 R330 1.69K/F_4 P_TX_ZVDD_095 W8 W7 P_RX_ZVDD_095 1K/F_4 R329
M_DM8 M_DATA26 M_A_DQ27 +0.95V P_TX_ZVDD_095 P_RX_ZVDD_095 +0.95V
U40
B33 M_DATA27 L40 M_A_DQ28
<9,10> M_A_DQS0 M_DQS_H0 M_DATA28 M_A_DQ29
A33 M40
<9,10> M_A_DQS#0 M_DQS_L0 M_DATA29 M_A_DQ30 PEG_TXP0_C
B40 R40 L5 G2 C559 *EV@0.1u/10V_4
<9,10> M_A_DQS1 M_DQS_H1 M_DATA30 M_A_DQ31 <11> PEG_RXP0 P_GFX_RXP0 P_GFX_TXP0 PEG_TXN0_C PEG_TXP0 <11>
C A40 T40 L4 G1 C550 *EV@0.1u/10V_4 C
<9,10> M_A_DQS#1 H41 M_DQS_L1 M_DATA31 <11> PEG_RXN0 P_GFX_RXN0 P_GFX_TXN0 PEG_TXN0 <11>
<9,10> M_A_DQS2 M_DQS_H2 M_A_DQ32 PEG_TXP1_C
H40 AF40 J5 F2 C558 *EV@0.1u/10V_4
<9,10> M_A_DQS#2 M_DQS_L2 M_DATA32 M_A_DQ33 <11> PEG_RXP1 P_GFX_RXP1 P_GFX_TXP1 PEG_TXN1_C PEG_TXP1 <11>
P41 AF41 J4 F1 C557 *EV@0.1u/10V_4
<9,10> M_A_DQS3 M_DQS_H3 M_DATA33 M_A_DQ34 <11> PEG_RXN1 P_GFX_RXN1 P_GFX_TXN1 PEG_TXN1 <11>
P40 AK40
<9,10> M_A_DQS#3 M_DQS_L3 M_DATA34
GFX
AH41 AK41 M_A_DQ35 G5 E2 PEG_TXP2_C C570 *EV@0.1u/10V_4
<9,10> M_A_DQS4 AH40 M_DQS_H4 M_DATA35 AE40 M_A_DQ36 <11> PEG_RXP2 G4 P_GFX_RXP2 P_GFX_TXP2 E1 PEG_TXN2_C PEG_TXP2 <11>
C569 *EV@0.1u/10V_4
<9,10> M_A_DQS#4 M_DQS_L4 M_DATA36 M_A_DQ37 <11> PEG_RXN2 P_GFX_RXN2 P_GFX_TXN2 PEG_TXN2 <11>
AP41 AE41
<9,10> M_A_DQS5 M_DQS_H5 M_DATA37 M_A_DQ38 PEG_TXP3_C
AP40 AJ40 D7 D2 C556 *EV@0.1u/10V_4
<9,10> M_A_DQS#5 M_DQS_L5 M_DATA38 M_A_DQ39 <11> PEG_RXP3 P_GFX_RXP3 P_GFX_TXP3 PEG_TXN3_C PEG_TXP3 <11>
BA40 AJ41 E7 D1 C555 *EV@0.1u/10V_4
MEMORY I/F
<9,10> M_A_DQS6 M_DQS_H6 M_DATA39 <11> PEG_RXN3 P_GFX_RXN3 P_GFX_TXN3 PEG_TXN3 <11>
AY41
<9,10> M_A_DQS#6 AY33 M_DQS_L6 AM41 M_A_DQ40 FT3B_Beema
<9,10> M_A_DQS7 M_DQS_H7 M_DATA40 M_A_DQ41
BA34 AN40
<9,10> M_A_DQS#7 M_DQS_L7 M_DATA41 M_A_DQ42
AA40 AT41
Y41 M_DQS_H8 M_DATA42 AU40 M_A_DQ43
M_DQS_L8 M_DATA43 AL40 M_A_DQ44
AC35 M_DATA44 AM40 M_A_DQ45
<9> M_A_CLK0 M_CLK_H0 M_DATA45 M_A_DQ46
AC34 AR40
<9> M_A_CLK0# M_CLK_L0 M_DATA46 M_A_DQ47
AA34 AT40
<9> M_A_CLK1 M_CLK_H1 M_DATA47
AA32
<9> M_A_CLK1# M_CLK_L1
AE38 AV41 M_A_DQ48
<10> M_B_CLK0 AE37 M_CLK_H2 M_DATA48 AW40 M_A_DQ49
<10> M_B_CLK0# M_CLK_L2 M_DATA49
AA37 BA38 M_A_DQ50
<10> M_B_CLK1 M_CLK_H3 M_DATA50
AA38 AY37 M_A_DQ51
<10> M_B_CLK1# M_CLK_L3 M_DATA51
+1.5V_SUS R113 1K/F_4 AU41 M_A_DQ52
G38 M_DATA52 AV40 M_A_DQ53
<9,10> DDR3_DRAMRST# AE34 M_RESET_L M_DATA53 AY39 M_A_DQ54
<9,10> M_A_EVENT# M_EVENT_L M_DATA54 AY38 M_A_DQ55
L34 M_DATA55
<9> M_A_CKE0 M0_CKE0 M_A_DQ56
J38 BA36
<9> M_A_CKE1 M0_CKE1 M_DATA56 M_A_DQ57
B J37 AY35 B
<10> M_B_CKE0 J34 M1_CKE0 M_DATA57 BA32 M_A_DQ58
<10> M_B_CKE1 M1_CKE1 M_DATA58 M_A_DQ59
AY31
AN38 M_DATA59 BA37 M_A_DQ60
<9> M_A_ODT0 M0_ODT0 M_DATA60 M_A_DQ61
AU38 AY36
<9> M_A_ODT1 M0_ODT1 M_DATA61 M_A_DQ62
AN37 BA33
<10> M_B_ODT0 AR37 M1_ODT0 M_DATA62 AY32 M_A_DQ63
<10> M_B_ODT1 M1_ODT1 M_DATA63
AJ34 V41
<9> M_A_CS#0 M0_CS_L0 M_CHECK0 +1.5V_SUS
AR38 W40
<9> M_A_CS#1 M0_CS_L1 M_CHECK1
AL38 AB40
<10> M_B_CS#0 AN35 M1_CS_L0 M_CHECK2 AC40
<10> M_B_CS#1 M1_CS_L1 M_CHECK3 U41
AJ37 M_CHECK4 V40 R467
<9,10> M_A_RAS#
AL34 M_RAS_L M_CHECK5 AA41 +1.5V_SUS Power trace tracking
<9,10> M_A_CAS# M_CAS_L M_CHECK6
AL35 AB41 1K/F_4
<9,10> M_A_WE# M_WE_L M_CHECK7 +1.5V_SUS
<7,9,10,32,37> +1.5V_SUS
AD41 +M_ZVDDIO R466 39.2/F_4
M_ZVDDIO_MEM_S AD40 M_VREF
M_VREF AC38
M_VREFDQ
2
R464 C627 C630
FT3B_Beema
C633
1K/F_4 1000P/50V_4 0.1U/10V_4 0.47u/10V_4
1
A A

PROJECT : ZQN
1A
MEM/PCIE (1/6)
Date: Tuesday, March 11, 2014 Sheet 3 of 39
5 4 3 2 1
5 4 3 2 1
U24D
+3V ANALOG/DISPLAY/MISC
INT_HDMITX2P A9 B16 DP_150_ZVSS R400 150/F_4
<22> INT_HDMITX2P INT_HDMITX2N B9 TDP1_TXP0 DP_150_ZVSS A21 DP_2K_ZVSS R425 2k/F_4
CORE_PWM_PROCHOT# <22> INT_HDMITX2N TDP1_TXN0 DP_2K_ZVSS B17 APU_BLEN
R397 1K/F_4
APU_SIC INT_HDMITX1P DP_BLON APU_DISP_ON APU_BLEN <21,29>
DP MISC
R423 1K/F_4 A10 A17
APU_SID <22> INT_HDMITX1P INT_HDMITX1N B10 TDP1_TXP1 DP_DIGON A18 APU_DPST_PWM APU_DISP_ON <21>
R410 1K/F_4
APU_ALERT# <22> INT_HDMITX1N TDP1_TXN1 DP_VARY_BL APU_DPST_PWM <21>
R407 1K/F_4 HDMI INT_HDMITX0P A11
DISPLAYPORT 1
R391 4.7K_4 DDCCLK
<22> INT_HDMITX0P INT_HDMITX0N B11 TDP1_TXP2 D17 HDMI_DDCCLK_SW
R378 4.7K_4 DDCDATA HDMI_DDCCLK_SW <22>
<22> INT_HDMITX0N TDP1_TXN2 TDP1_AUXP E17 HDMI_DDCDATA_SW
INT_HDMICLK+ TDP1_AUXN HDMI_DDCDATA_SW <22>
APU_VDD_18 A12
<22> INT_HDMICLK+ INT_HDMICLK- B12 TDP1_TXP3 H19 HDMI_HPD
<22> INT_HDMICLK- TDP1_TXN3 TDP1_HPD HDMI_HPD <22>
R412 300_4 APU_RST# <21> EDP_TX0
EDP_TX0 A4 D15 EDP_AUX
EDP_AUX <21>
D EDP_TX0# B4 LTDP0_TXP0 LTDP0_AUXP E15 EDP_AUX# D
<21> EDP_TX0# LTDP0_TXN0 LTDP0_AUXN EDP_AUX# <21>
R406 300_4 APU_PWRGD eDP EDP_TX1 A5 H17 EDP_HPD
+3V <21> EDP_TX1 EDP_TX1# LTDP0_TXP1 LTDP0_HPD EDP_HPD <21>
Reserve B5
<21> EDP_TX1# LTDP0_TXN1
A6 B14
DISPLAYPORT 0
CRT_HSYNC LTDP0_TXP2 DAC_RED CRT_R <21>
R388 1K/F_4 B6 A14 CRT_G <21>
R389 *1K/F_4 LTDP0_TXN2 DAC_GREEN B15
DAC_BLUE CRT_B <21>
A7
B7 LTDP0_TXP3
LTDP0_TXN3 G19 CRT_HSYNC R380 *SHORT_4
DAC_HSYNC CRT_VSYNC HSYNC <21>
E19 R387 *SHORT_4 VSYNC <21> R383 R390 R396
K15 DAC_VSYNC
VGA DAC
H15 DISP_CLKIN_H 150/F_4 150/F_4 150/F_4
DISP_CLKIN_L
CLK
+1.8V D19
DAC_SCL D21 DDCCLK <21>
APU_LDT_RST_HTPA# DAC_SDA DDCDATA <21>
R109 *1K/F_4
R108 *1K/F_4 APU_PWRGD_BUF SVT G31
SVC D27 SVT A16 DAC_ZVSS R404 499/F_4
SVD E29 SVC DAC_ZVSS
SVD H27 APU_THERMDA_R
SER
APU_SIC B22 THERMDA H29 APU_THERMDC_R TP24
APU_SID B21 SIC THERMDC D25 TP25
Can remove on MP(For HDT test) SID DIECRACKMON A27 BP0 R446 *1K/F_4
+3V APU_RST# B20 BP0 B27 BP1
LDT_RST# A20 APU_RST_L BP1 A26 TP64
R424 *0_4 BP2 R445 *1K/F_4
LDT_RST_L BP2 B26 BP3 R444 *1K/F_4
APU_PWRGD B19 BP3 B28 PLLTEST1 R449 1K/F_4
C605 R413 *0_4 LDT_PWRGD A19 APU_PWROK PLLTEST1 A28 PLLTEST0 R450 1K/F_4
LDT_PWROK PLLTEST0 B24 BYPASSCLK_H R441 510/F_4
*0.1U/10V_4
CTRL
CORE_PWM_PROCHOT# A22 BYPASSCLK_H A24 BYPASSCLK_L R440 510/F_4
<5,29,34> CORE_PWM_PROCHOT# PROCHOT_L BYPASSCLK_L PLLCHRZ_H +1.8V
AV35
PLLCHRZ_H TP28
TEST
APU_ALERT# B18 AU35 PLLCHRZ_L
U23 ALERT_L PLLCHRZ_L E33 M_TEST TP29
APU_RST# 1 6 APU_LDT_RST_HTPA# APU_TDI D29 M_TEST TP27
1A 1Y C607 C606 APU_TDO D31 TDI
2 5 *150p/50V_4 *150p/50V_4 APU_TCK D35 TDO A29 FREE_2 R87 *1K/F_4
GND VCC APU_TMS D33 TCK FREE_2 H21 GIO_TSTDTMO_SERIALCLK TP65
R86 *1K/F_4
APU_PWRGD 3 4 APU_PWRGD_BUF APU_TRST# G27 TMS GIO_TSTDTM0_SERIALCLK H25 GIO_TSTDTM0_CLKINIT R97 *1K/F_4
2A 2Y APU_DBRDY TRST_L GIO_TSTDTM0_CLKINIT +1.8V
C B25 R98 *1K/F_4 C
JTAG
APU_DBREQ# A25 DBRDY
*SN74LVC2G07DCKR DBREQ_L AJ10 USB_ATEST0
D23 USB_ATEST0 AJ8 USB_ATEST1 TP21
G23 VDDCR_NB_SENSE USB_ATEST1 R32 M_ANALOGIN TP20
E25 VDDCR_CPU_SENSE M_ANALOGIN N32 M_ANALOGOUT TP67
E23 VDDIO_MEM_S_SENSE M_ANALOGOUT AP29 TMON_CAL TP68
VSS_SENSE TMON_CAL TP26
VDD_095_FB_H AV33 R381 *1K/F_4
<33> VDD_095_FB_H VDD_095_FB_L VDD_095_FB_H DP_STEREOSYNC +1.8V
AU33 E21 R382 *1K/F_4
<33> VDD_095_FB_L VDD_095_FB_LKABINI HDMI_EN/DP_STEREOSYNC
PART 4 OF 9
FT3B_Beema
VSS_SENSE R85 *SHORT_4 APU_VDD_RUN_FB_L

VDDCR_APU_SENSE APU_VDD_RUN_FB_H APU_VDD_RUN_FB_L <34>
R84 *SHORT_4
APU_VDD_RUN_FB_H <34> DIFFERENTIAL ROUTING
VDDIO_MEM_S_SENSE_R R93 *SHORT_4 VDDIO_MEM_S_SENSE
VDDIO_MEM_S_SENSE <32>
Power trace tracking VDDCR_NB_SENSE R90 *SHORT_4 APU_VDDNB_RUN_FB_H

APU_VDDNB_RUN_FB_H <34>
+3V
<5,7,9,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37> +3V APU_VDD_18
<7,34> APU_VDD_18
HDT(Hardware Debug Tool ) Connector SMBUS (Internal Thermal sensor)

+3V
B B
+1.8V +1.8V HDT+ HEADER / PLACE ON TOP +1.8V
2
CN1 3 1 APU_SIC
APU_TCK <12,29> 2ND_MBCLK
R117 1 2 R105 1K/F_4
1K/F_4 3
CPU_VDDIO CPU_TCK
4 APU_TMS R106 1K/F_4
5 GND CPU_TMS
6 APU_TDI R107 1K/F_4 2N7002K
7 GND CPU_TDI
8 APU_TDO
Q33
APU_TRST# R118 *SHORT_4 HDT_TRST# 9
GND CPU_TDO
10 APU_PWRGD_BUF
R119 10K_4 11 CPU_TRST_L CPU_PWROK_BUF
12 APU_LDT_RST_HTPA#
CPU_DBRDY 3 CPU_RST_L_BUF APU_DBRDY
2
R120 10K_4 13 14
R121 10K_4 15
CPU_DBRDY 2 CPU_DBRDY 0
16 APU_DBREQ# R110 1K/F_4
17
CPU_DBRDY 1 CPU_DBREQ_L
18 J108_PLLTST0 R111 *SHORT_4 PLLTEST0 3 1 APU_SID
GND CPU_PLLTEST0 J108_PLLTST1 <12,29> 2ND_MBDATA
19 20 R112 *SHORT_4 PLLTEST1
CPU_VDDIO CPU_PLLTEST1
*HDT 2N7002K
Q31
R426 *0_4
R411 *0_4
+1.8V
Serial VID
+3V
R422 R439 R432 R420 R437 R430 R399
*1K/F_4*1K/F_4*1K/F_4 *300/F_4 *300/F_4 *300/F_4 *2.2K_4

R401
10K/F_4
SVT R421 33_4

APU_SVT <34>
2
SVC R438 33_4 Q30

APU_SVC <34>
MMST3904-7-F
SVD R431 33_4 THERM_ALERT# 3 1 APU_ALERT#
APU_SVD <34> <28> THERM_ALERT#
A A
APU_PWRGD R405 *SHORT_4
APU_PWRGD_SVID_REG <34>
+3V
R403 R436 R429
*220/F_4 *0_4 *0_4 VFIX MODE VID Override table (VDD) R392
*10K/F_4
SVC SVD Boot Voltage
0 0 1.1V Quanta Computer Inc.
2
Q29
0 1 1.0V *MMST3904-7-F
3 1 CORE_PWM_PROCHOT#
PROJECT : ZQN
1 0 0.9V Size Document Number Rev
1 1 0.8V DIS/MISC (2/6) 1A

5 4 3 2 1
5 4 3 2 1
Test mode setting (Follow AMD's suggestion)
+3V_S5
NC,no install by default U24C
C597 150P/50V_4
R409 *1K/F_4 APU_TEST0 R408 15K/F_4
<24,29> PLTRST# PLTRST# R367 33_4 LPC_RST#_R AY4
R386 *1K/F_4 APU_TEST1 R385 15K/F_4 PCIE_RST# AY9 LPC_RST_L W4 R76 *33_4
PCIE_RST_L USBCLK/14M_25M_48M_OSC AG4 USB_ZVSS R79 11.8K/F_4 TP19
R374 *1K/F_4 APU_TEST2 R373 15K/F_4 PCH_RSMRST#_R AY5 USB_ZVSS
RSMRST_L
AL4
BA8 USB_HSD0P AL5 USBP0+ <27>
<29> DNBSWON#
DNBSWON#
SYS_PWRGD PWR_BTN_L USB_HSD0N USBP0- <27> Daughter board side USB2.0
TEST2 TEST1 TEST0 Description AM19
<8,28> SYS_PWRGD SYS_RST# PWR_GOOD
AY7 AJ4
D <8> SYS_RST# SYS_RESET_L/GEVENT19_L USB_HSD1P USBP1+ <21> D
R91 *SHORT_4PCIE_WAKE# AW11 AJ5 Camera USB
MISC
<23,24> PCIE_LAN_WAKE# WAKE_L/GEVENT8_L USB_HSD1N USBP1- <21>
USB
0 0 0 FCH TAP accessible from APU when TAPEN is asserted C220 *100p/50V_4
USB
1.1
FCH JTAG pins are overloaded for multiple AG7
USB_HSD2P USBP2+ <24>
functions, in this configuration the FCH JTAG are SUSB# AY3 AG8 USB to I2C
<8,29> SUSB# BA5 SLP_S3_L USB_HSD2N USBP2- <24>
used as non-JTAG pins SUSC#
<29> SUSC# SLP_S5_L AG1
APU_TEST0 AU13 USB_HSD3P AG2 USBP3+ <21>
Touch Panel
ACPI / WAKE UP
TP63 APU_TEST1 AY10 TEST0 USB_HSD3N USBP3- <21>
0 0 1 Reserved APU_TEST2 TEST1/TMS
TP60 AY6 AF1
TP57 TEST2 USB_HSD4P AF2
EVENTS
AR23 USB_HSD4N
0 1 X Reserved <29> KBRST#
KBRST#
SIO_A20GATE KBRST_L
AR31 AE1
<29> SIO_A20GATE SIO_EXT_SCI# AN5 GA20IN/GEVENT0_L USB_HSD5P AE2 USBP5+ <27>
FCH JTAG multi-function pins are configured as <29> SIO_EXT_SCI# SIO_EXT_SMI# LPC_PME_L/GEVENT3_L USB_HSD5N USBP5- <27> Daughter board side USB2.0
1 TMS 0 JTAG pins, in this configuration the FCH TAP AL7
<29> SIO_EXT_SMI# LPC_SMI_L/GEVENT23_L
can be accessed from FCH JTAG pins LPCPD# AV2 AD1
<24,28> LPCPD# LPC_PD_L/GEVENT5_L/SPI_TPM_CS_L USB_HSD6P USBP6+ <27>
AD2 Card reader
AP15 USB_HSD6N USBP6- <27>
Use on ATE only AC_PRES/IR_RX0/GEVENT16_L
1 TMS 1 Yuba JTAG enabled AV13 AC1
IR_TX0/GEVENT21_L USB_HSD7P USBP7+ <24>
BA9 AC2 WLAN Min-Card
USB
IR_TX1/GEVENT6_L USB_HSD7N USBP7- <24>
2.0
BA10
AV15 IR_RX1/GEVENT20_L AB1
IR_LED_L/LLB_L/GPIO184 USB_HSD8P AB2 USBP8+ <27>
USB_HSD8N USBP8- <27> USB Combo 3.0/2.0
AU29 AA1
PCIE_CLKREQ_WLAN# AW29 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60 USB_HSD9P AA2
External pull-up <24>
<23>
PCIE_CLKREQ_WLAN#
PCIE_REQ_LAN#
PCIE_REQ_LAN# AR27
AV27
CLK_REQ1_L/GPIO61
CLK_REQ2_L/GPIO62
USB_HSD9N
R447 *0_4 AY29 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63

<12> PCIE_REQ_GPU# CLK_REQG_L/GPIO65/OSCIN
+3V AE10 USB_SS_ZVSS R81 1K/F_4
USB_SS_ZVSS AE8 USB_ZVDD R80 1K/F_4
CLK_SCLK USB_SS_ZVDD_095_USB3_DUAL +0.95V_DUAL
R451 2.2K_4
CLK_SCLK AU25
CLK_SDATA <9,10,24> CLK_SCLK CLK_SDATA SCL0/GPIO43
R448 2.2K_4 S0-domain AV25
<9,10,24> CLK_SDATA SDA0/GPIO47
SCL1 AY11 T2
BA11 SCL1/GPIO227 USB_SS_TX0P T1 USB30_TX1+ <27>
S5-domain SDA1
SDA1/GPIO228 USB_SS_TX0N USB30_TX1- <27>
+3V_S5 R379 *10K/F_4
V2
USB_SS_RX0P USB30_RX1+ <27>
C V1 C
SYS_RST# USB_SS_RX0N USB30_RX1- <27>
J1 *0_4
BOARD_ID0 AP27 +3V
GPIO49
USB
GPIO
BOARD_ID1 AY28 R1
3.0
+3V_S5 BOARD_ID2 BA28 GPIO50 USB_SS_TX1P R2
AV23 GPIO51 USB_SS_TX1N
R88 *10K/F_4 TP_I2C_INT#_APU BOARD_ID3 AP21 GPIO55 W1
BOARD_ID4 BA26 GPIO57 USB_SS_RX1P W2
PCIE_WAKE# <21> BOARD_ID4 AV19 GPIO58 USB_SS_RX1N
R92 100K_4 Q6 R95
<11> DGPU_RST_L TP_INT_APU GPIO59
2
AY27 *2N7002K *10K_4
R416 2.2K_4 SCL1 BA27 GPIO64
<25> SPKR GPU_Enable SPKR/GPIO66 TP_I2C_INT#_APU
AU21 AY8 3 1
AY26 GPIO68 USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L AW1 USB_OC1# TP_I2C_INT# <24,28>
R417 2.2K_4 SDA1
AV21 GPIO69 USB_OC1_L/TDI/GEVENT13_L AV1 USB_OC2# USB_OC1# <27>
USB_OC1# PROCHOT#_CTRL AM21 GPIO70 USB_OC2_L/TCK/GEVENT14_L AY1 USB_OC3# USB_OC2# <27>
R332 10K/F_4 R100 *0_4
<4,29,34> CORE_PWM_PROCHOT# GPIO71 USB_OC3_L/TDO/GEVENT15_L
USB
R560 10K/F_4 RAMID_0 BA3 TP53
OC
R331 10K/F_4 USB_OC2# GPIO174 R89 *0_4
GEVENT2# AV17 AN2 ACZ_BCLK_R

<8> GEVENT2# BA4 GEVENT2_L AZ_BITCLK AN1 ACZ_SDOUT_R
R558 10K/F_4 AR15 GEVENT4_L AZ_SDOUT AK2 PCH_AZ_CODEC_SDIN0
R559 10K/F_4 AP17 GEVENT7_L AZ_SDIN0/GPIO167 AK1 RAMID_3
To Azalia ACZ_SDOUT_R R316 33_4
AP11
AN8
GEVENT10_L
GEVENT11_L
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AM1
AL2
RAMID_1
RAMID_2
PCH_AZ_CODEC_SDOUT <25> AU17 GEVENT17_L AZ_SDIN3/GPIO170 AM2 ACZ_SYNC_R
ACZ_SYNC_R R327 33_4 BA6 BLINK/GEVENT18_L AZ_SYNC AL1 ACZ_RST#_R
PCH_AZ_CODEC_SYNC <25> GEVENT22_L AZ_RST_L
ACZ_BCLK_R R317 33_4
PCH_AZ_CODEC_BITCLK <25>
AUDIO
BA29
ACZ_RST#_R R324 33_4 AP23 GENINT1_L/GPIO32
HD
PCH_AZ_CODEC_RST# <25> <37> PE_PWRGD GENINT2_L/GPIO33
PCH_AZ_CODEC_SDIN0
PCH_AZ_CODEC_SDIN0 <25>
AV31 KABINI
AU31 FANOUT0/GPIO52 PART 3 OF 9

ACZ_BCLK_R R328 *10K/F_4 FANIN0/GPIO56
PCH_AZ_CODEC_SDIN0 R323 *10K/F_4 FT3B_Beema

B B
+3V
Board ID +1.8V_S5 +3V_S5 +3V_S5
+3V
PR191 U7 R78
R104 *10K_4 BOARD_ID0 R101 10K_4 *EV@100K/F_6 R366 *MC74VHC1G08DFT2G *4.7K_4
BOARD_ID1
3
R443 *10K_4 R442 10K_4 47K/F_4
R434 *10K_4 BOARD_ID2 R433 10K_4 R531 *SHORT_4 GPU_Enable 1
BOARD_ID3 <37> DGPU_PWREN PCH_RSMRST#_R
R419 *10K_4 R418 10K_4
<11,23,24,27> PCIERST# PCIERST# 4
BOARD_ID4 <29> PCH_RSMRST# PCIERST_R# PCIE_RST#
R428 10K_4 R427 *10K_4 2 R83 33_4
D3
C616 RB500V-40
5
*EV@0.1U/10V_4 C598 R368 C207 150P/50V_4
GPIO High Low 0.1u/10V_4 *10K_4
BOARD_ID0 d'TPM R82 *SHORT_4

i'TPM
BOARD_ID1 d'GPU UMA
BOARD_ID2 17" 14"
+3V_S5
BOARD_ID3 Reserve Reserve
TS interrupt (reserve only)
BOARD_ID4 Touch
(Depend on cable)
None Touch
(Depend on cable) TP SMBus
R461
*2.2K_4
+3V_S5
2
Q34
Power trace tracking +3V
<4,7,9,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37> +3V
1 3 SCL1
RAMID_0 <28> TP_SMCLK +3V
A R360 *10K/F_4 R365 10K/F_4 +1.8V A
RAMID_1 <4,7,35> +1.8V
R315 *10K/F_4 R326 10K/F_4 *2N7002K
R314 *10K/F_4 RAMID_2 R325 10K/F_4 R453 *0_4 +3V_S5
RAMID_3 <6,7,8,23,24,26,27,28,29,31,36> +3V_S5
R313 *10K/F_4 R322 10K/F_4
+3V_S5 +0.95V_DUAL
<7> +0.95V_DUAL
R435
RAM RAMID_0 RAMID_1 RAMID_2 RAMID_3 *10K_4
2
R462
LDO +3V PU in Panel device
TP_INT_APU 1 3
Reserve Reserve Reserve Reserve Reserve *2.2K_4 TP_INT <21>
2
Q35 Q32
1 3 SDA1
<28> TP_SMDATA *2N7002K PROJECT : ZQN
*2N7002K Size Document Number Rev
R454 *0_4 1A
GPIO/USB/AZ (3/6)
5 4 3 2 1
5 4 3 2 1
Vender Size Quanta P/N Vender P/N

APU SPI ROM
1st WND 8M AKE3EFP0N07 W25Q64FVSSIQ
? AMIC 8M ? ?
? MAX 8M ? MX25L6436E
U24E
? GGD 8M AKE3EGN0Q01 GD25B64BSIGR
KABINI
? EON 8M AKE3EZN0Q01 EN25QH64-104HIP
PART 5 OF 9
D SATA_TXP0 BA14 BA23 +3V_S5 D
<26> SATA_TXP0 SATA_TXN0 AY14 SATA_TX0P SD__PWR_CTRL AY22
<26> SATA_TXN0 SATA_TX0N SD_CLK/GPIO73
SATA HDD SATA_RXN0 BA16 AY23
<26> SATA_RXN0 SATA_RXP0 SATA_RX0N SD_CMD/GPIO74
AY16 AY20 R376
<26> SATA_RXP0 SATA_RX0P SD_CD/GPIO75 +3V_S5 +3V_S5
BA20
SD_WP/GPIO76 10K/F_4
SATA_TXP1 AY19 BA22 R525 33_4
<26> SATA_TXP1 SATA_TXN1 SATA_TX1P SD_DATA0/GPIO77 <29> SPI_CS
BA19 AY21 R526 33_4
<26> SATA_TXN1 SATA_TX1N SD_DATA1/GPIO78 <29> SPI_SCK
AY24 R527 33_4 C222
SATA ODD SATA_RXN1 AY17 SD_DATA2/GPIO79 <29> SPI_SDO
SERIAL
BA24 R528 33_4
<26> SATA_RXN1 SATA_RXP1 BA17 SATA_RX1N SD_DATA3/GPIO80 <29> SPI_SDI
0.1U/10V_4
ATA
<26> SATA_RXP1 SATA_RX1P AY25 U22
SD_LED/GPIO45 SPI_CS1# R375 33_4 SPI_CS 1 8 R398
1K/F_4 R96 SATA_ZVSS AR19 SPI_CLK R393 33_4 SPI_SCK 6 CE# VDD 10K/F_4
1K/F_4 R94 SATA_ZVDD AP19 SATA_ZVSS 5 SCK
+0.95V SATA_ZVDD_095 SI SPI_HOLD
2 7
CARD
C601 22p/50V_4
SO HOLD#
SD
SATA_ACT# BA30 SPI_SO R384 33_4 SPI_SDO 3 4
TP66 SATA_ACT_L/GPIO67 SPI_SI SPI_SDI WP# VSS
R372 33_4
+3V_S5 R370 10K/F_4 SPI_W25Q64FVSSIQ
AY12 SPI_WP R369 *SHORT_4 SPI_WP_R

SATA_X1
AU7 SPI_CLK TP61
SPI_CLK/GPIO162 AW9 SPI_CS1# TP58
SPI_CS1_L/GPIO165 AR4 TP52
BA12 SPI_CS2_L/GPIO166 AR11 SPI_SO TP59
SATA_X2 SPI_DO/GPIO163 AR7 SPI_SI TP56
C
SPI_DI/GPIO164 AU11 SPI_HOLD TP62 C
SPI_HOLD_L/GEVENT9_L AU9 SPI_WP TP55
SPI_WP_L/GPIO161
ROM
R355 22_4 PCLK_TPM <24>
SPI
LPC_CLK0_R R352 22_4
CLK_PCIE_VGAP_R LPC_CLK0 <8>
<11> CLK_PCIE_VGAP R309 *SHORT_4 U4 R351 22_4
CLK_PCIE_VGAN_R GFX_CLKP CLK_LPC_DEBUG <24>
<11> CLK_PCIE_VGAN R307 *SHORT_4 U5 AY2 R359 *22_4 C592 *15p/50V_4
GFX_CLKN LPCCLK0 AW2 R364 22_4 C595 *15p/50V_4
LPCCLK1
LPC_CLK1_R CLK_PCI_775 <29>
AC8 R356 22_4 LPC_CLK1 <8>
AC10 GPP_CLK0P AT2 LPC_LAD0
GPP_CLK0N LAD0 LPC_LAD1 LPC_LAD0 <24,29>
AT1 LPC_LAD1 <24,29>
LAD1 AR2 LPC_LAD2
LAD2 LPC_LAD3 LPC_LAD2 <24,29>
AE4 AR1
<24> CLK_PCIE_WLAN GPP_CLK1P LAD3 LPC_LFRAME# LPC_LAD3 <24,29>
<24> CLK_PCIE_WLAN# AE5 AP2 LPC_LFRAME# <8,24,29>
GPP_CLK1N LFRAME_L AP1 LDRQ#0
LDRQ0_L TP51
AV29 SERIRQ SERIRQ <24,29>
R333 *SHORT_4 CLK_PCIE_LANP_R AC4 SERIRQ/GPIO48 AP25 LPC_CLKRUN#_R R99 *SHORT_4
<23> CLK_PCIE_LANP CLK_PCIE_LANN_R GPP_CLK2P LPC_CLKRUN_L LPC_CLKRUN# <24,28,29>
R321 *SHORT_4 AC5
<23> CLK_PCIE_LANN GPP_CLK2N 32K_X1 C545 22p/50V_4
1
AA5 AJ2
AA4 GPP_CLK3P 32K_X1
GPP_CLK3N R312 Y2 USE GROUND GUARD FOR 32K_X1 AND 32K_X2
AJ1 20M_4 32.768KHZ
32K_X2
AP13
X14M_25M_48M_OSC
2
32K_X2 C547 22p/50V_4
AV11 RTC_CLK <8> R72 *SHORT_4

48M_X1 RTCCLK +3VRTC +3VPCU
C544 5.6p/16V_4 N2
B X48M_X1 D2 B
+3VPCU_R
1
Q4
Y3 R310 48M_X2 N1 AN4 +1.5V_RTC_R 20MIL R75 10K_4 20MIL +1.5V_RTC 1 3 20MIL
48MHZ
X48M_X2 VDDBT_RTC_G VOUT VIN 20MIL
1M_4
3
BAT54C
1
C546 5.6p/16V_4 G1 C196
GND
FT3B_Beema *SHORT_ PAD C198 C199 C197 +VCCRTC_2
0.1U/10V_4 0.22u/10V_4 1u/10V_4
AP2138N-1.5TRG1 1u/10V_4
2
R70
1K/F_4
+BAT
1
CN10
CR2032_CONN
2
Power trace tracking
A A
+3V
<4,5,7,9,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37> +3V
+0.95V_S5
<7,33> +0.95V_S5
+3V_S5
<5,7,8,23,24,26,27,28,29,31,36> +3V_S5
<21,25,26,28,29,30,31,35,37> +3VPCU
+3VPCU Quanta Computer Inc.
PROJECT : ZQN
1A
SATA/CLK/LPC (4/6)
5 4 3 2 1
5 4 3 2 1
+1.5V_SUS +VDD_CORE U24G U24H

U24F
A8 J3 W29 AL39
J35 L21 A13 VSS_1 KABINI VSS_63 J7 W39 VSS_125 KABINI VSS_187 AL41
L32 VDDIO_MEM_S_1 VDDCR_CPU_1 L23 A23 VSS_2 PART 8 OF 9 VSS_64 J8 W41 VSS_126 PART 9 OF 9 VSS_188 AM11
L37 VDDIO_MEM_S_2 VDDCR_CPU_2 L25 A31 VSS_3 VSS_65 J39 Y1 VSS_127 VSS_189 AM27
C257 C269 C259 C266 C289 C273 C283 N35 VDDIO_MEM_S_3 VDDCR_CPU_3 L27 C112 C593 C200 C245 C203 C111 C247 A35 VSS_4 VSS_66 K11 Y2 VSS_128 VSS_190 AM31
R31 VDDIO_MEM_S_4 VDDCR_CPU_4 L29 A39 VSS_5 VSS_67 K13 AA3 VSS_129 VSS_191 AN3
180p/50V_4 180p/50V_4 180p/50V_4 180p/50V_4 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 R37 VDDIO_MEM_S_5 VDDCR_CPU_5 N21 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 180p/50V_4 B8 VSS_6 VSS_68 K17 AA7 VSS_130 VSS_192 AN7
U32 VDDIO_MEM_S_6 VDDCR_CPU_6 N23 B13 VSS_7 VSS_69 K19 AA8 VSS_131 VSS_193 AN39
U35 VDDIO_MEM_S_7 VDDCR_CPU_7 N27 B23 VSS_8 VSS_70 K21 AA11 VSS_132 VSS_194 AP31
D W31 VDDIO_MEM_S_8 VDDCR_CPU_8 R21 B31 VSS_9 VSS_71 K23 AA15 VSS_133 VSS_195 AR3 D
W32 VDDIO_MEM_S_9 VDDCR_CPU_9 R23 B39 VSS_10 VSS_72 K25 AA19 VSS_1134 VSS_196 AR13
W37 VDDIO_MEM_S_10 VDDCR_CPU_10 R27 C1 VSS_11 VSS_73 K27 AA25 VSS_135 VSS_197 AR17
C270 C263 C272 C258 C271 C268 AA31 VDDIO_MEM_S_11 VDDCR_CPU_11 U21 C234 C238 C237 C248 C236 C2 VSS_12 VSS_74 K29 AA29 VSS_136 VSS_198 AR21
0.1u/10V_4 0.1u/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 AA35 VDDIO_MEM_S_12 VDDCR_CPU_12 U23 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 C5 VSS_13 VSS_75 K31 AA39 VSS_137 VSS_199 AR25
AC32 VDDIO_MEM_S_13 VDDCR_CPU_13 U27 C7 VSS_14 VSS_76 L3 AC3 VSS_138 VSS_200 AR29
AC37 VDDIO_MEM_S_14 VDDCR_CPU_14 W21 C9 VSS_15 VSS_77 L7 AC7 VSS_139 VSS_201 AR39
AE31 VDDIO_MEM_S_15 VDDCR_CPU_15 W23 C11 VSS_16 VSS_78 L8 AC11 VSS_140 VSS_202 AR41
AE35 VDDIO_MEM_S_16 VDDCR_CPU_16 W27 C13 VSS_17 VSS_79 L10 AC15 VSS_141 VSS_203 AU1
AG32 VDDIO_MEM_S_17 VDDCR_CPU_17 AA21 C235 C249 C246 C251 C252 C250 C15 VSS_18 VSS_80 L11 AC19 VSS_142 VSS_204 AU2
C261 C264 C267 C262 C265 C260 AG37 VDDIO_MEM_S_18 VDDCR_CPU_18 AA23 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 C17 VSS_19 VSS_81 L15 AC25 VSS_143 VSS_205 AU3
1U/10V_4 0.1u/10V_4 1U/10V_4 0.1u/10V_4 1U/10V_4 1U/10V_4 AJ35 VDDIO_MEM_S_19 VDDCR_CPU_19 AA27 C19 VSS_20 VSS_82 L19 AC29 VSS_144 VSS_206 AU15
AL32 VDDIO_MEM_S_20 VDDCR_CPU_20 AC21 C21 VSS_21 VSS_83 L31 AC31 VSS_145 VSS_207 AU19
AL37 VDDIO_MEM_S_21 VDDCR_CPU_21 AC23 C23 VSS_22 VSS_84 L39 AC39 VSS_146 VSS_208 AU23
AR35 VDDIO_MEM_S_22 VDDCR_CPU_22 AC27 C25 VSS_23 VSS_85 L41 AC41 VSS_147 VSS_209 AU27
VDDIO_MEM_S_23 VDDCR_CPU_23 AE21 C27 VSS_24 VSS_86 M1 AE3 VSS_148 VSS_210 AU39
VDDCR_CPU_24 AE23 C29 VSS_25 VSS_87 M2 AE7 VSS_149 VSS_211 AV9
VDDCR_CPU_25 VSS_26 VSS_88 VSS_150 VSS_212
GROUND
GROUND
AE27 +VDDNB_CORE C31 N3 AE25 AW3
VDDCR_CPU_26 C33 VSS_27 VSS_89 N7 AE29 VSS_151 VSS_213 AW7
+1.5V APU_VDDIO_AZ C35 VSS_28 VSS_90 N15 AE32 VSS_152 VSS_214 AW13
L13 C37 VSS_29 VSS_91 N19 AE39 VSS_153 VSS_215 AW15
PLACE ON TOP LAYER VDDCR_NB_1 VSS_30 VSS_92 VSS_154 VSS_216
POWER
L17 C39 N25 AG3 AW17
R103 *SHORT_6 VDDCR_NB_2 N11 C41 VSS_31 VSS_93 N29 AG5 VSS_155 VSS_217 AW19
VDDCR_NB_3 N13 C225 C223 C152 C224 D9 VSS_32 VSS_94 N31 AG10 VSS_156 VSS_218 AW21
C243 C230 C231 VDDCR_NB_4 N17 C206 D11 VSS_33 VSS_95 N39 AG11 VSS_157 VSS_219 AW23
VDDCR_NB_5 R11 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 180p/50V_4 D13 VSS_34 VSS_96 P1 AG13 VSS_158 VSS_220 AW25
4.7U/6.3V_6 1U/10V_4 180p/50V_4 VDDCR_NB_6 R13 E3 VSS_35 VSS_97 P2 AG15 VSS_159 VSS_221 AW27
VDDCR_NB_7 R17 E4 VSS_36 VSS_98 R3 AG19 VSS_160 VSS_222 AW31
VDDCR_NB_8 U13 E9 VSS_37 VSS_99 R7 AG25 VSS_161 VSS_223 AW33
VDDCR_NB_9 U17 E11 VSS_38 VSS_100 R15 AG29 VSS_162 VSS_224 AW35
C VDDCR_NB_10 W13 C212 C205 C211 C217 C215 E13 VSS_39 VSS_101 R19 AG31 VSS_163 VSS_225 AW37 C
VDDCR_NB_11 W17 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 E27 VSS_40 VSS_102 R25 AG39 VSS_164 VSS_226 AW39
VDDCR_NB_12 AA13 E31 VSS_41 VSS_103 R29 AG41 VSS_165 VSS_227 AW41
APU_VDDIO_AZ VDDCR_NB_13 AA17 E35 VSS_42 VSS_104 R39 AH1 VSS_166 VSS_228 AY13
PLACE ON BOT LAYER APU_VDDIO_AZ VDDCR_NB_14 AC13 E38 VSS_43 VSS_105 R41 AH2 VSS_167 VSS_229 AY15
VDDCR_NB_15 AC17 C204 C202 C216 C213 E39 VSS_44 VSS_106 U1 AJ3 VSS_168 VSS_230 AY18
VDDCR_NB_16 AE15 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 G3 VSS_45 VSS_107 U2 AJ7 VSS_169 VSS_231 AY30
C232 C229 VDDCR_NB_17 AE17 G7 VSS_46 VSS_108 U3 AJ15 VSS_170 VSS_232 BA2
VDDCR_NB_18 AE19 G11 VSS_47 VSS_109 U7 AJ17 VSS_171 VSS_233 BA7
1U/10V_4 1U/10V_4 AL10 VDDCR_NB_19 AG17 G13 VSS_48 VSS_110 U8 AJ19 VSS_172 VSS_234 BA13
AL11 VDDIO_AZ_ALW_1 VDDCR_NB_20 AG21 G15 VSS_49 VSS_111 U11 AJ23 VSS_173 VSS_235 BA15
APU_VDD18_ALW VDDIO_AZ_ALW_2 VDDCR_NB_21 G17 VSS_50 VSS_112 U15 AJ25 VSS_174 VSS_236 BA18
G21 VSS_51 VSS_113 U19 AJ29 VSS_175 VSS_237 BA21
B1 APU_VDD_18 G25 VSS_52 VSS_114 U25 AJ31 VSS_176 VSS_238 BA25
B2 VDD_18_ALW_1 A2 G29 VSS_53 VSS_115 U29 AJ32 VSS_177 VSS_239 BA31
VDD_18_ALW_2 VDD_18_1 A3 G35 VSS_54 VSS_116 U31 AJ39 VSS_178 VSS_240 BA35
VDD_18_2 B3 G37 VSS_55 VSS_117 U39 AL3 VSS_179 VSS_241 BA39
VDD_18_3 C3 G39 VSS_56 VSS_118 W3 AL8 VSS_180 VSS_242
APU_VDD33_ALW KABINI VDD_18_4 G41 VSS_57 VSS_119 W5 AL15 VSS_181
PART 7 OF 9 APU_VDD_33 H11 VSS_58 VSS_120 W11 AL17 VSS_182
AL13 AM15 H13 VSS_59 VSS_121 W15 AL19 VSS_183 A15
AM13 VDD_33_ALW_1 VDD_33_1 AM17 H23 VSS_60 VSS_122 W19 AL25 VSS_184 VSSBG_DAC AL31
+0.95V_DUAL VDD_33_ALW_2 VDD_33_2 H31 VSS_61 VSS_123 W25 AL29 VSS_185 VBURN AM29
APU_VDD_0.95 VSS_62 VSS_124 VSS_186 PSEN
AR5 AG23
AU4 VDD_095_USB3_DUAL1 VDD_095_1 AG27 FT3B_Beema FT3B_Beema
AV7 VDD_095_USB3_DUAL2 VDD_095_2 AJ21
VDD_0.95V_ALW AW5 VDD_095_USB3_DUAL3 VDD_095_3 AJ27
VDD_095_USB3_DUAL4 VDD_095_4 AL21
AE11 VDD_095_5 AL23 APU_VDD_0.95 +0.95V
B AE13 VDD_095_ALW_1 VDD_095_6 AL27 B
+3V_S5 APU_VDD33_ALW AJ11 VDD_095_ALW_2 VDD_095_7 AM23 R124 *SHORT_8
AJ13 VDD_095_ALW_3 VDD_095_8 AM25
VDD_095_ALW_4 VDD_095_9
If P_GFX[3:0] are not used, leave VDD_095_GFX unconnected.
R402 *SHORT_8 42R
U10 VDD_095_GFX L17
C604 C603 C602 VDD_095_GFX_1 W10 PBY160808T-600Y-N(60,3A)
VDD_095_GFX_2 AA10
4.7U/6.3V_6 1U/10V_4 1U/10V_4 VDD_095_GFX_3 C214 C226 C241 C253 C240 C256 C255 C284 C285 C254 C239 C242
FT3B_Beema
1U/10V_4 10u/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10u/6.3V_8 10u/6.3V_8 1U/10V_4 1U/10V_4 180p/50V_4
S5 DOMAIN
+0.95V +0.95V_S5 +0.95V_DUAL
+3V APU_VDD_33 R55 *SHORT_8 +0.95V

Power trace tracking +1.5V_SUS
<3,9,10,32,37> +1.5V_SUS
R102 *SHORT_8 R59 *0_8 +1.5V
<24,25,32,35> +1.5V +3V_S5
<5,6,8,23,24,26,27,28,29,31,36> +3V_S5
C218 C221 C227 C228 S0 DOMAIN C177 C191 C553 C567 C551 C554 C162 C568 C552 C192 C287 C286 C184 C288 C189 C282 C193
<4,5,9,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37> +3V
+3V
+1.8V
<4,35> +1.8V +1.8V_S5
4.7U/6.3V_6 1U/10V_4 1U/10V_4 180p/50V_4 10u/6.3V_8 10u/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 180p/50V_4 10u/6.3V_8 10u/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 180p/50V_4
<5,8,35,37> +1.8V_S5
+0.95V
<3,6,33,35> +0.95V +0.95V_S5
<33> +0.95V_S5
A A
+1.8V APU_VDD_18 +0.95V_S5 VDD_0.95V_ALW
+1.8V_S5 APU_VDD18_ALW
R308 *SHORT_8 R347 *SHORT_8 R51 *SHORT_8
C583 C588 C573 C575 C587 C589 C576 C586 C574 C176 C166 C190 C156 C210 C208 C209 C219
C542 C560 C561 C564 C563 C562
C549
180p/50V_4
C548
10u/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 180p/50V_4 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
4.7U/6.3V_6 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10u/6.3V_8
PROJECT : ZQN
1A
POWER/GND(5/6)
5 4 3 2 1
5 4 3 2 1
STRAPS PINS OVERLAP COMMON PADS WHERE

DEBUG STRAPS
POSSIBLE FOR DUAL-OP RESISTORS.
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5
D D
R354 R358 R320 R415 R395

*10K/F_4 10K/F_4 10K/F_4 *10K/F_4 *10K_4
LPC_CLK0
<6> LPC_CLK0
LPC_CLK1
<6> LPC_CLK1
LPC_LFRAME#
<6,24,29> LPC_LFRAME#
<5> GEVENT2# GEVENT2#
RTC_CLK
<6> RTC_CLK
R353 R357 R319 R414 R394

2K/F_4 *2K/F_4 *2K/F_4 2K/F_4 *2K/F_4
C C
REQUIRED STRAPS
RTC_CLK LPC_CLK0 LPC_CLK1 LFRAME# GEVENT2#
PULL Normal power up BOOT FAIL TIMER CLKGEN SPI ROM 1.8V SPI ROM
HIGH ENABLED ENABLED
DEFAULT DEFAULT DEFAULT Power trace tracking
+3V
<4,5,7,9,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37> +3V
PULL BOOT FAIL TIMER CLKGEN LPC ROM 3.3V SPI ROM +3V_S5
LOW Fast power on DISABLED DISABLED <5,6,7,23,24,26,27,28,29,31,36> +3V_S5
DEFAULT
DEFAULT
B B
+3V_S5
SYS PWRGD +1.8V_S5
R142 C308
10K/F_4 *0.1U/10V_4
D5 *1N4148WS U10
<5> SYS_RST#
5
2
D7 1N4148WS 4 SYS_PWRGD
<5,29> SUSB# SYS_PWRGD <5,28>
1
C316
D6 1N4148WS
<29> PWROK_EC
3
0.1U/10V_4 *TC7SH08FU
+3V_S5
SYS_PWRGD_R R134 *SHORT_4
R169
3
100K_4
Q10
2N7002K
3
A A
1
2
<29> HWPG
Q16
2N7002K
1
PROJECT : ZQN
1A
STRAP(6/6)
5 4 3 2 1
5 4 3 2 1
+1.5V_SUS
<3,10> M_A_A[15:0] JDIM2A M_A_DQ[63:0] <3,10> JDIM2B
M_A_A0 98 5 M_A_DQ0 75 44
M_A_A1 97 A0 DQ0 7 M_A_DQ1 76 VDD1 VSS16 48
D A8 DQ8 VDD9 VSS24 D
M_A_A9 85 23 M_A_DQ9 100 71
M_A_A11 84 A10/AP DQ10 35 M_A_DQ11 106 VDD11 VSS26 127
PC2100 DDR3 SDRAM SO-DIMM

M_A_A13 119 A12/BC# DQ12 24 M_A_DQ13 112 VDD13 VSS28 133
M_A_A14 80 A13 DQ13 34 M_A_DQ14 2.48A 117 VDD14 VSS29 134
A15 DQ15 39 M_A_DQ16 123 VDD16 VSS31 139

109 DQ16 41 M_A_DQ17 124 VDD17 VSS32 144
<3,10> M_A_BS#0 108 BA0 DQ17 51 M_A_DQ18 VDD18 VSS33 145
<3,10> M_A_BS#1 79 BA1 DQ18 53 M_A_DQ19 199 VSS34 150
<3,10> M_A_BS#2 114 BA2 DQ19 40 M_A_DQ20 +3V VDDSPD VSS35 151
<3> M_A_CS#0 121 S0# DQ20 42 M_A_DQ21 M_A_EVENT# 77 VSS36 155
<3> M_A_CS#1 101 S1# DQ21 50 M_A_DQ22 <3,10> M_A_EVENT# 122 NC1 VSS37 156
<3> M_A_CLK0 103 CK0 DQ22 52 M_A_DQ23 <3,10> DDR3_DRAMRST# 125 NC2 VSS38 161
<3> M_A_CLK0# 102 CK0# DQ23 57 M_A_DQ24 NCTEST VSS39 162
C325 0.1u/10V_4
<3> M_A_CLK1 104 CK1 DQ24 59 M_A_DQ25 198 VSS40 167
C332 0.1u/10V_4
<3> M_A_CLK1# 73 CK1# DQ25 67 M_A_DQ26 30 EVENT# VSS41 168
C380 1000p/50V_4
<3> M_A_CKE0 74 CKE0 DQ26 69 M_A_DQ27 RESET# VSS42 172
C383 0.1u/10V_4
<3> M_A_CKE1 115 CKE1 DQ27 56 M_A_DQ28 VSS43 173
<3,10> M_A_CAS# 110 CAS# DQ28 58 M_A_DQ29 +DDR_VREF2 1 VSS44 178
<3,10> M_A_RAS# 113 RAS# DQ29 68 M_A_DQ30 +DDR_VREF2 +DDR_VREF 126 VREF_DQ VSS45 179
R198
<3,10>
10K_4
M_A_WE# DIMM2_SA0 197 WE# DQ30 70 M_A_DQ31 +DDR_VREF VREF_CA VSS46 184
R200 10K_4 DIMM2_SA1 201 SA0 DQ31 129 M_A_DQ32 VSS47 185
202 SA1 DQ32 131 M_A_DQ33 C416 0.1u/10V_4 2 VSS48 189
<5,10,24> CLK_SCLK 200 SCL DQ33 141 M_A_DQ34 C408 1000p/50V_4 3 VSS1 VSS49 190
<5,10,24> CLK_SDATA SDA DQ34 143 M_A_DQ35 C398 0.1u/10V_4 8 VSS2 VSS50 195
C C
(204P)
116 DQ35 130 M_A_DQ36 C430 0.1u/10V_4 9 VSS3 VSS51 196
<3> M_A_ODT0 120 ODT0 DQ36 132 M_A_DQ37 13 VSS4 VSS52
<3> M_A_ODT1 ODT1 DQ37 140 M_A_DQ38 14 VSS5
<3,10> M_DM[7..0] M_DM0 11 DQ38 142 M_A_DQ39 19 VSS6
M_DM1 28 DM0 DQ39 147 M_A_DQ40 20 VSS7 +SMDDR_VTT
M_DM2 46 DM1 DQ40 149 M_A_DQ41 25 VSS8
M_DM3
M_DM4
63 DM2
DM3
(204P) DQ41
DQ42
157 M_A_DQ42
M_A_DQ43
26 VSS9
VSS10 VTT1
203
136 159 31 204
M_DM5 153 DM4 DQ43 146 M_A_DQ44 32 VSS11 VTT2
M_DM6 170 DM5 DQ44 148 M_A_DQ45 37 VSS12 205
M_DM7 187 DM6 DQ45 158 M_A_DQ46 38 VSS13 GND 206
DM7 DQ46 160 M_A_DQ47 43 VSS14 GND
<3,10> M_A_DQS[7:0] M_A_DQS0 12 DQ47 163 M_A_DQ48 VSS15
M_A_DQS1 29 DQS0 DQ48 165 M_A_DQ49
M_A_DQS3 DQS2 DQ50 M_A_DQ51 DDR3-DIMM_H=4_STD
64 177
M_A_DQS6 171 DQS5 DQ53 174 M_A_DQ54 +1.5V_SUS
<3,10> M_A_DQS#[7:0] M_A_DQS#0 10 DQS7 DQ55 181 M_A_DQ56
M_A_DQS#1 27 DQS#0 DQ56 183 M_A_DQ57
M_A_DQS#2 45 DQS#1 DQ57 191 M_A_DQ58
M_A_DQS#3 62 DQS#2 DQ58 193 M_A_DQ59 R219
M_A_DQS#4 135 DQS#3 DQ59 180 M_A_DQ60
DQS#4 DQ60 1K/F_4
M_A_DQS#5 152 182 M_A_DQ61 +SMDDR_VREF
M_A_DQS#6 169 DQS#5 DQ61 192 M_A_DQ62
B DQS#6 DQ62 B
M_A_DQS#7 186 194 M_A_DQ63 R223 *0_6 +DDR_VREF
DQS#7 DQ63
3mA
DDR3-DIMM_H=4_STD R211
1K/F_4
+1.5V_SUS Place these Caps near So-Dimm1. +1.5V_SUS
Stitching Cap
+1.5V_SUS
C384 C418 C389 C419 C421 C422 C439 C438 C440 C437 C436 +1.5V_SUS
0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4
20K=>1K
R206
1K/F_4
+SMDDR_VTT C357 C359 +SMDDR_VREF
+1.5V_SUS +SMDDR_VTT
180p/50V_4 180p/50V_4 R209 *0_6 +DDR_VREF2
3mA R191
C423 C426 C388 C391 C386 C390 C394 C429 C411 C381 C413 1K/F_4
A A
+1.5V_SUS
Power trace tracking Quanta Computer Inc.

<3,7,10,32,37> +1.5V_SUS
C427 C385 C420 C387 C392 C417 C425 C424 <4,5,7,10,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37> +3V
0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 <10,32> +SMDDR_VTT PROJECT : ZQN
<32> +SMDDR_VREF
<10> +DDR_VREF2 Size Document Number Rev
1A
DDRIII SO-DIMM-1
Date: Thursday, March 27, 2014 Sheet 9 of 39
5 4 3 2 1
1 2 3 4 5 6 7 8
+1.5V_SUS
<3,9> M_A_A[15:0] JDIM1A M_A_DQ[63:0] <3,9> JDIM1B
M_A_A0 98 5 M_A_DQ0 75 44
A A8 DQ8 VDD9 VSS24 A
M_A_A9 85 23 M_A_DQ9 100 71
M_A_A11 84 A10/AP DQ10 35 M_A_DQ11 106 VDD11 VSS26 127

M_A_A13 119 A12/BC# DQ12 24 M_A_DQ13 112 VDD13 VSS28 133
M_A_A14 80 A13 DQ13 34 M_A_DQ14 2.48A 117 VDD14 VSS29 134
A15 DQ15 39 M_A_DQ16 123 VDD16 VSS31 139

109 DQ16 41 M_A_DQ17 124 VDD17 VSS32 144
<3,9> M_A_BS#0 108 BA0 DQ17 51 M_A_DQ18 VDD18 VSS33 145
<3,9> M_A_BS#1 79 BA1 DQ18 53 M_A_DQ19 199 VSS34 150
<3,9> M_A_BS#2 114 BA2 DQ19 40 M_A_DQ20 +3V VDDSPD VSS35 151
<3> M_B_CS#0 121 S0# DQ20 42 M_A_DQ21 M_A_EVENT# 77 VSS36 155
<3> M_B_CS#1 101 S1# DQ21 50 M_A_DQ22 <3,9> M_A_EVENT# 122 NC1 VSS37 156
<3> M_B_CLK0 103 CK0 DQ22 52 M_A_DQ23 <3,9> DDR3_DRAMRST# 125 NC2 VSS38 161
<3> M_B_CLK0# 102 CK0# DQ23 57 M_A_DQ24 NCTEST VSS39 162
C376 0.1u/10V_4
<3> M_B_CLK1 104 CK1 DQ24 59 M_A_DQ25 198 VSS40 167
C346 0.1u/10V_4
<3> M_B_CLK1# 73 CK1# DQ25 67 M_A_DQ26 30 EVENT# VSS41 168
C348 1000p/50V_4
+3V <3> M_B_CKE0 74 CKE0 DQ26 69 M_A_DQ27 RESET# VSS42 172
C323 0.1u/10V_4
<3> M_B_CKE1 115 CKE1 DQ27 56 M_A_DQ28 VSS43 173
<3,9> M_A_CAS# 110 CAS# DQ28 58 M_A_DQ29 1 VSS44 178
<3,9> M_A_RAS# RAS# DQ29 M_A_DQ30 +DDR_VREF2 VREF_DQ VSS45
113 68 126 179
<3,9> M_A_WE# DIMM1_SA0 WE# DQ30 M_A_DQ31 +DDR_VREF VREF_CA VSS46
R163 10K_4 197 70 184
R162 10K_4 DIMM1_SA1 201 SA0 DQ31 129 M_A_DQ32 VSS47 185
202 SA1 DQ32 131 M_A_DQ33 C358 0.1u/10V_4 2 VSS48 189
<5,9,24> CLK_SCLK 200 SCL DQ33 141 M_A_DQ34 C360 1000p/50V_4 3 VSS1 VSS49 190
<5,9,24> CLK_SDATA SDA DQ34 143 M_A_DQ35 C349 0.1u/10V_4 8 VSS2 VSS50 195
B B
(204P)
116 DQ35 130 M_A_DQ36 C350 0.1u/10V_4 9 VSS3 VSS51 196
<3> M_B_ODT0 120 ODT0 DQ36 132 M_A_DQ37 13 VSS4 VSS52
10/1 For DIM1 <3> M_B_ODT1 ODT1 DQ37 140 M_A_DQ38 14 VSS5
<3,9> M_DM[7..0] M_DM0 11 DQ38 142 M_A_DQ39 19 VSS6
M_DM1 28 DM0 DQ39 147 M_A_DQ40 20 VSS7
M_DM2 46 DM1 (204P) DQ40 149 M_A_DQ41 25 VSS8
M_DM3 63 DM2 DQ41 157 M_A_DQ42 26 VSS9 203
M_DM4 DM3 DQ42 M_A_DQ43 VSS10 VTT1 +SMDDR_VTT
136 159 31 204
M_DM5 153 DM4 DQ43 146 M_A_DQ44 32 VSS11 VTT2
M_DM6 170 DM5 DQ44 148 M_A_DQ45 37 VSS12 205
M_DM7 187 DM6 DQ45 158 M_A_DQ46 38 VSS13 GND 206
DM7 DQ46 160 M_A_DQ47 43 VSS14 GND
<3,9> M_A_DQS[7:0] M_A_DQS0 12 DQ47 163 M_A_DQ48 VSS15
M_A_DQS3 DQS2 DQ50 M_A_DQ51 DDR3-DIMM_H=4_RVS
64 177
<3,9> M_A_DQS#[7:0] M_A_DQS#0 10 DQS7 DQ55 181 M_A_DQ56
M_A_DQS#1 27 DQS#0 DQ56 183 M_A_DQ57
M_A_DQS#2 45 DQS#1 DQ57 191 M_A_DQ58
M_A_DQS#3 62 DQS#2 DQ58 193 M_A_DQ59
M_A_DQS#4 135 DQS#3 DQ59 180 M_A_DQ60
M_A_DQS#5 152 DQS#4 DQ60 182 M_A_DQ61
M_A_DQS#6 169 DQS#5 DQ61 192 M_A_DQ62
C DQS#6 DQ62 C
M_A_DQS#7 186 194 M_A_DQ63
DQS#7 DQ63
DDR3-DIMM_H=4_RVS
+1.5V_SUS +1.5V_SUS
Place these Caps near So-Dimm1.
C367 C374 C373 C370 C343 C339 C318 C310 C324 C315 C326
+SMDDR_VTT
+1.5V_SUS +SMDDR_VTT
C335 C341 C372 C336 C340 C338 C330 C333 C366 C365 C347
D D
+1.5V_SUS
Power trace tracking Quanta Computer Inc.

<3,7,9,32,37> +1.5V_SUS
C345 C375 C369 C337 C371 C342 C344 C368 <4,5,7,9,21,22,23,24,25,27,28,29,31,32,33,34,35,36,37> +3V
0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 0.22u/10V_4 <9,32> +SMDDR_VTT PROJECT : ZQN
<9,32> +SMDDR_VREF
<9> +DDR_VREF2 Size Document Number Rev
1A
DDRIII SO-DIMM-1
Date: Thursday, February 20, 2014 Sheet 10 of 39
1 2 3 4 5 6 7 8
U19A
PART 1 0F 9
AA38 PCIE_RX0P PCIE_TX0P Y33 PEG_RXP0_C C531 *EV@0.1u/10V_4

<3> PEG_TXP0 Y37 Y32 PEG_RXN0_C PEG_RXP0 <3>
PCIE_RX0N PCIE_TX0N C538 *EV@0.1u/10V_4
<3> PEG_TXN0 PEG_RXN0 <3>
Y35 PCIE_RX1P PCIE_TX1P W33 PEG_RXP1_C C528 *EV@0.1u/10V_4

<3> PEG_TXP1 PEG_RXP1 <3>
W36 PCIE_RX1N PCIE_TX1N W32 PEG_RXN1_C C530 *EV@0.1u/10V_4
W38 PCIE_RX2P PCIE_TX2P U33 PEG_RXP2_C C525 *EV@0.1u/10V_4

<3> PEG_TXP2 V37 U32 PEG_RXN2_C PEG_RXP2 <3>
V35 PCIE_RX3P PCIE_TX3P U30 PEG_RXP3_C C523 *EV@0.1u/10V_4

<3> PEG_TXP3 U36 U29 PEG_RXN3_C PEG_RXP3 <3>
U38 PCIE_RX4P PCIE_TX4P T33

T37 PCIE_RX4N PCIE_TX4N T32
T35 PCIE_RX5P PCIE_TX5P T30

R36 PCIE_RX5N PCIE_TX5N T29
R38 PCIE_RX6P PCIE_TX6P P33

P37 PCIE_RX6N PCIE_TX6N P32
P35 PCIE_RX7P PCIE_TX7P P30

N36 PCIE_RX7N PCIE_TX7N P29
N38 PCIE_RX8P PCIE_TX8P N33

M37 PCIE_RX8N PCIE_TX8N N32
PCI EXPRESS INTERFACE
M35 PCIE_RX9P PCIE_TX9P N30

L36 PCIE_RX9N PCIE_TX9N N29
L38 PCIE_RX10P PCIE_TX10P L33

K37 PCIE_RX10N PCIE_TX10N L32
+3V_GFX
K35 PCIE_RX11P PCIE_TX11P L30
J36 PCIE_RX11N PCIE_TX11N L29
C541 *EV@0.1u/10V_4
J38 PCIE_RX12P PCIE_TX12P K33
5
H37 PCIE_RX12N PCIE_TX12N K32 U20
2
<5> DGPU_RST_L PERST#_BUF
4
H35 J33 1
PCIE_RX13P PCIE_TX13P
<5,23,24,27> PCIERST#
G36 PCIE_RX13N PCIE_TX13N J32
*EV@TC7SH08FU(F) R300
3
G38 PCIE_RX14P PCIE_TX14P K30 *EV@100K_4
F37 PCIE_RX14N PCIE_TX14N K29
F35 PCIE_RX15P PCIE_TX15P H33

E37 PCIE_RX15N PCIE_TX15N H32
CLOCK
AB35 PCIE_REFCLKP
<6> CLK_PCIE_VGAP
AA36 PCIE_REFCLKN
<6> CLK_PCIE_VGAN
CALIBRATION
PCIE_CALR_TX Y30 PCIE_CALR_TX R34 *EV@1.69K/F_4
R66 *EV@1K_4 TEST_PG AH16 TEST_PG PCIE_CALR_RX Y29 PCIE_CALR_RX R35 *EV@1K/F_4 +PCIE_VDDC_GFX
PERST#_BUF AA30 PERSTB

*EV@GPU_M2
PROJECT : ZQN
A1A
Opal(Jet)_M2/PEG*16
U19B
PART 2 0F 9 Thermal
MUTI GFX
AD29 GENLK_CLK TXCAP_DPA3P AU24
AC29 GENLK_VSY NC TXCAM_DPA3N AV23 +3V_GFX
TX0P_DPA2P AT25
Q28
AJ21 SWAPLOCKA TX0M_DPA2N AR24
AK21 DPA 5
SWAPLOCKB
TX1P_DPA1P AU26
AV25 3 4 GPUT_CLK
TX1M_DPA1N <4,29> 2ND_MBCLK
AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27
AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26 2
AP8 DVPCNTL_0
TP18 AW8 AR30 6 1 GPUT_DATA
DVPCNTL_1 TXCBP_DPB3P <4,29> 2ND_MBDATA
AR3 DVPCNTL_2 TXCBM_DPB3N AT29
AR1 DVPCLK
AU1 DVPDATA_0 TX3P_DPB2P AV31
AU3 AU30 *EV@2N7002DW
DVPDATA_1 TX3M_DPB2N
AW3 DPB
DVPDATA_2 R377 *EV@0_4
AP6 DVPDATA_3 TX4P_DPB1P AR32
AW5 DVPDATA_4 TX4M_DPB1N AT31 R371 *EV@0_4
AU5 DVPDATA_5
AR6 DVPDATA_6 TX5P_DPB0P AT33
1.8V GPIO AW6 DVPDATA_7 TX5M_DPB0N AU32 +3V_GFX
AU6 DVPDATA_8
AT7 DVPDATA_9 TXCCP_DPC3P AU14 +3V_GFX
AV7 DVPDATA_10 TXCCM_DPC3N AV13
AN7 DVPDATA_11
AV9 DVPDATA_12 TX0P_DPC2P AT15
AT9 DVPDATA_13 TX0M_DPC2N AR14 R362 R363 R361
AR10 DVPDATA_14 *EV@10K_4 *EV@10K_4 *EV@10K_4
AW10 DPC AU16 C599
DVPDATA_15 TX1P_DPC1P
AU10 DVPDATA_16 TX1M_DPC1N AV15 *EV@0.1u/10V_4
AP10 DVPDATA_17 U6
AV11 DVPDATA_18 TX2P_DPC0P AT17
AT11 AR16 GPUT_CLK 8 1 GPU_D+
DVPDATA_19 TX2M_DPC0N
AR12 SCLK VCC
DVPDATA_20
AW12 AU20 GPUT_DATA 7 2
DVPDATA_21 TXCDP_DPD3P
AU12 AT19 SDA DXP C578
DVPDATA_22 TXCDM_DPD3N
+3V_GFX AP12 ALT#_GPIO17 6 3
DVPDATA_23
+3V_GFX AT21 ALERT# DXN *EV@2200p/50V_4
TX3P_DPD2P
TX3M_DPD2N AR20 4 5
R349 *EV@10K_4 PCIE_REQ_GPU# OVERT# GND GPU_D-
R63 *EV@4.7K_4 GPU_SMBCLK AJ23 SMBCLK
DPD
TX4P_DPD1P AU22
R350 *EV@100_4 R64 *EV@4.7K_4 GPU_SMBDAT AH23 SMBDATA
SMBus
TX4M_DPD1N AV21 *EV@G780P81U
+3V_GFX TX5P_DPD0P AT23

TX5M_DPD0N AR22
R61 *EV@4.7K_4 GPU_SCL AK26 SCL
+3V_GFX R62 *EV@4.7K_4 GPU_SDA AJ26 I2C
SDA
R65 *EV@0_4 R AD39

<36> GPU_DPRSLPVR
GENERAL PURPOSE I/O AVSSN#1 AD37
GPU_GPIO0_TP AH20 GPIO_0 +3V_GFX
TP16 GPU_GPIO1_TP AH18 AE36
R77 GPIO_1 G
TP9 GPU_GPIO2_TP AN16 AD35
*EV@10K_4 TP17 GPIO_2 AVSSN#2
2
B AF37
3 1 GPU_AC_DC# AH17 GPIO_5_AC_BATT AVSSN#3 AE38
<29> DGPU_AC_DC#
AJ17 GPIO_6
<36> PWRCNTRL2 AK17 DAC1 AC36
*EV@2N7002K
R348 *EV@10K_4
GPU_GPIO8 AJ13
GPIO_7_BLON
GPIO_8_ROMSO
HSY NC
VSY NC AC38
R297
R298
*EV@10K_4
*EV@10K_4
Opal only, DNI for Jet
TP7 GPU_GPIO9
Q5 AH15 GPIO_9_ROMSI
TP15 GPU_GPIO10 AJ16 GPIO_10_ROMSCK +1.8V_GFX
TP10 GPU_GPIO11 AK16 AB34
GPIO_11 RSET R301 *EV@499/F_4 +1.8V_AVDD
TP11 GPU_GPIO12 AL16
TP13 GPIO_12 DAC1 Analog Power : 1.8V@18mA
AM16 GPIO_13 AVDD AD34 L6
AM14 GPIO_14_HPD2 AVSSQ AE34 *EV@BLM15BD121SN1D_300MA
<31,35,36> SYS_SHDN# TP14
AM13 GPIO_15_PWRCNTL_0
<36> PWRCNTRL0
3
AK14 GPIO_16 VDD1DI AC33 C138 C137 C134

<36> PWRCNTRL3 ALT#_GPIO17 AG30 AC34
GPIO_17_THERMAL_INT VSS1DI *EV@0.1u/10V_4 *EV@1u/6.3V_4 *EV@10u/6.3V_6
Q27 AN14 GPIO_18_HPD3
2 GPIO_19_CTF AM17 GPIO_19_CTF
AL13 GPIO_20_PWRCNTL_1 NC#1 V13
<36> PWRCNTRL1 GPU_GPIO21 AJ14 GPIO_21 NC#2 U13
TP6 GPU_GPIO22
*EV@2N7002K R341 AK13 GPIO_22_ROMCSB NC#3 AC31
TP12
PCIE_REQ_GPU# AN13 AD30
*EV@10K_4 <5> CLKREQB NC#4 +1.8V_VDD1DI
PCIE_REQ_GPU#
1
NC#5 AC32 DAC1 Digital Power : 1.8V@117mA

NC#6 AD32 L5
AG32 GPIO_29 NC#7 AF32 *EV@BLM15BD121SN1D_300MA
<36> PWRCNTRL4
AG33 GPIO_30 NC#8 AA29
<36> PWRCNTRL5
NC#9 AG21 C124 C125 C119
AJ19 GENERICA *EV@0.1u/10V_4 *EV@1u/6.3V_4 *EV@10u/6.3V_6
AK19 GENERICB
GPU_GENERICC AJ20 GENERICC
TP5
AK20 GENERICD
AJ24 AF33
Opal only, DNI for Jet AH26
GENERICE_HPD4
GENERICF_HPD5
NC_TSVSSQ
AH24 GENERICG_HPD6
PS_0 AM34 PS_0

+1.8V_GFX PS_0 <14>
AC30 CEC_1
TP4
AK24 AD31 PS_1
Place close to Chip TP8 HPD1
MLPS
PS_1
PS_1 <14>
R68
*EV@499/F_4
GPU_VREFG AH13 VREFG PS_2 AG31 PS_2
PS_2 <14>
R60 C186 BACO

*EV@249/F_4 *EV@0.1u/10V_4 R340 *EV@4.7K_4 AL21 AD33 PS_3
PX_EN PS_3
PS_3 <14>
DEBUG DDC/AUX AM26

DDC1CLK
DDC1DATA AN26
R43 *EV@1K_4 TESTEN AD28 TESTEN
AUX1P AM27
R46 *EV@5.11K/F_4 AL27
+3V_GFX AUX1N
R339 *EV@10K_4 AM23 JTAG_TRSTB DDC2CLK AM19

R338 *EV@10K_4 AN23 JTAG_TDI DDC2DATA AL19
R337 *EV@10K_4 AK23 JTAG_TCK
R336 *EV@10K_4 AL24 JTAG_TMS AUX2P AN20
R335 *EV@10K_4 AM24 JTAG_TDO AUX2N AM20
DDCCLK_AUX3P AL30
DDCDATA_AUX3N AM30
THERMAL AL29
DDCCLK_AUX4P
GPU_D+ AF29 DPLUS DDCDATA_AUX4N AM29
GPU_D- AG29 DMINUS
DDCCLK_AUX5P AN21
DDCDATA_AUX5N AM21
R48 *EV@10K_4 GPU_GPIO28 AK32
PU:Disable MLPS GPIO_28_FDO
AK30
PD:Enable MLPS AL31
DDCCLK_AUX6P
AK29
TS_A DDCDATA_AUX6N
on-die thermal sensor power : 1.8V@13mA DDCVGACLK AJ30

L9 +1.8V_TSVDD AJ32 AJ31
+1.8V_GFX TSVDD DDCVGADATA
*EV@BLM15BD121SN1D_0.3A_4 AJ33 TSVSS
C159 C160
C163
*EV@10u/6.3V_6 *EV@1u/6.3V_4 *EV@0.1u/10V_4 *EV@GPU_M2
PROJECT : ZQN
A1A
Opal(Jet)_M2/GPIO_DP_CRT_I2C
237mA DPLL_PVDD
+1.8V_GFX L10 *EV@PBY160808T-501Y_1.2A_6
U19G
C170 C171
C173
U19I PART 7 0F 9
*EV@10u/6.3V_6 *EV@1u/6.3V_4 *EV@0.1u/10V_4
VARY_BL AK27 R54 *EV@10K_4

PART 9 0F 9
LVDS CONTROL DIGON AJ27 R52 *EV@10K_4
AM32 AV33 GPU_XTALIN C585 *EV@10p/50V_4 AK35

DPLL_PVDD XTALIN TXCLK_UP_DPF3P
280mA TXCLK_UN_DPF3N AL36
DPLL_VDDC
3
4
L16 *EV@PBY160808T-501Y_1.2A_6 AN31
+PCIE_VDDC_GFX DPLL_VDDC
R334 Y4 TXOUT_U0P_DPF2P AJ38
C174 C181 *EV@1M_4 TXOUT_U0N_DPF2N AK37
C188 AN32 DPLL_PVSS *EV@27MHZ
*EV@10u/6.3V_6 *EV@1u/6.3V_4 *EV@0.1u/10V_4 TXOUT_U1P_DPF1P AH35
1
2
XTALOUT AU34 GPU_XTALOUT C584 *EV@10p/50V_4 TXOUT_U1N_DPF1N AJ36
TXOUT_U2P_DPF0P AG38
TXOUT_U2N_DPF0N AH37
H7 MPLL_PVDD
H8 MPLL_PVDD TXOUT_U3P AF35
150mA TXOUT_U3N AG36
MPLL_PVDD
LVTMDP
L1 *EV@FCM1005KF-221T03_0.3A AW34 R318 *EV@10K_4
+1.8V_GFX XO_IN
C47 C53 C62 AM10 SPLL_PVDD
PLLS/XTAL
*EV@10u/6.3V_6 *EV@1u/6.3V_4 *EV@0.1u/10V_4 TXCLK_LP_DPE3P AP34
TXCLK_LN_DPE3N AR34
AN9 SPLL_VDDC XO_IN2 AW35 R311 *EV@10K_4
TXOUT_L0P_DPE2P AW37
TXOUT_L0N_DPE2N AU35
AN10 SPLL_PVSS TXOUT_L1P_DPE1P AR37

TXOUT_L1N_DPE1N AU39
75mA SPLL_PVDD
L14 *EV@BLM15BD121SN1D_0.3A_4 AP35
+1.8V_GFX TXOUT_L2P_DPE0P
CLKTESTA AK10 CLKTESTA TXOUT_L2N_DPE0N AR35
C185 C179 C167 AF30 NC_XTAL_PVDD CLKTESTB AL10 CLKTESTB
AF31 NC_XTAL_PVSS route 50ohms TXOUT_L3P AN36
*EV@10u/6.3V_6 *EV@1u/6.3V_4 *EV@0.1u/10V_4 single-ended/100ohms diff TXOUT_L3N AP37
and keep short
C580 C579
*EV@0.1u/10V_4 *EV@0.1u/10V_4
*EV@GPU_M2
*EV@GPU_M2
100mA R343 R342
L13 *EV@BLM15BD121SN1D_0.3A SPLL_VDDC *EV@51.1/F_4 *EV@51.1/F_4
+PCIE_VDDC_GFX
C183 C172 C175
*EV@10u/6.3V_6 *EV@1u/6.3V_4 *EV@0.1u/10V_4
Debug only, for clock observation

DPLL_PVDD R57 *EV@0_4
R303 *EV@0_4

PROJECT : ZQN
A1A
Opal(Jet)_M2/ XTAL_LVDS
PS_3 [3:1]
Opal Jet CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
Vendor Vendor P/N STN B/S P/N Size MLPS MLPS Default Setting
STRAPS MLPS GPIO PIN DESCRIPTION OF DEFAULT SETTINGS
MLPS_DISABLE NA GPIO_28_FDO Enable MLPS, NA for Thames/Whistler/Seymour X

AKD5MZDTW05 *4 1G 000 0: Enable MLPS, disable GPIO PINSTRAP
1: Disable MLPS, enable GPIO PINSTRAP
H5TC2G63FFR-11C
(128Mb*16) 2Gb
TX_PWRS_ENB PS_1[4] GPIO0 Transmitter Power Savings Enable
AKD5MZDTW05 *8 2G 001 0: 50% Tx output swing X
1: Full Tx output swing
Hynix
TX_DEEMPH_EN PS_1[5] GPIO1 PCIE Transmitter De-emphasis Enable X
AKD5PGWTW13 *4 110 0: Tx de-emphasis disabled

2G 1: Tx de-emphasis enabled
H5TC4G63AFR-11C BIF_GEN3_EN_A PS_1[1] GPIO2 PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 1
(256Mb*16) 4Gb 0: GEN3 not supported at power-on
1: GEN3 supported at power-on
AKD5PGWTW13 *8 4G BIF_VGA DIS PS_2[4] GPIO9 VGA Control 0
0: VGA controller capacity enabled
1: VGA controller capacity disabled (for multi-GPU)
AKD5MGST513 *4 1G 010 ROMIDCFG[2:0] PS_0[3..1] GPIO[13:11] Serial ROM type or Memory Aperture Size Select
K4W2G1646Q-BC1A
XXX
(128Mb*16) 2Gb If GPIO22 = 0, defines memory aperture size
If GPIO22 = 1, defines ROM type
AKD5MGST513 *8 2G 011 100 - 512Kbit M25P05A (ST)
101 - 1Mbit M25P10A (ST)
Samsung 101 - 2Mbit M25P20
101 - 4Mbit M25P40
(ST)
(ST)
101 - 8Mbit M25P80 (ST)
AKD5PGWT504 *4 111 100 - 512Kbit Pm25LV512 (Chingis)

2G 101 - 1Mbit Pm25LV010 (Chingis)
K4W4G1646D-BC1A BIOS_ROM_EN PS_2[3] GPIO22 Enable external BIOS ROM device X

(256Mb*16) 4Gb 0: Disabled
1: Enabled
AKD5PGWT504 *8 4G AUD[1] NA HSYNC 00 - No audio function XX
AUD[0] NA VSYNC 01 - Audio for DP only
10 - Audio for DP and HDMI if dongle is detected
11 - Audio for both DP and HDMI
HDMI must only be enabled on systems that are legally entitled. It is the
AKD5MGSTL25 *4 1G 100 responsibility of the system designer to ensure that the system is entitled to
support this feature.
MT41J128M16JT-093G:K
X
(128Mb*16) 2Gb CEC_DIS PS_0[4] GENLK_VSYNC Enable CEC function. Reserved for Thames/Whistler/Seymour
0: Disabled
AKD5MGSTL25 *8 2G 101 1: Enabled
Micron
AKD5PZSTL02 *4 2G NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR
IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET
MT41J256M16HA-093G:E
0
(256Mb*16) 4Gb RESERVED PS_1[3] GENLK_CLK Reserved
0
RESERVED PS_1[2] GPIO8 Reserved
AKD5PZSTL02 *8 4G RESERVED NA GPIO21 Reserved 0
RESERVED NA GENERICC Reserved (for Thames/Whistler/Seymour only) 0
System Memory Aperture size AUD_PORT_CONN_PINSTRAP[2] PS_3[5] NA STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS XXX
AUD_PORT_CONN_PINSTRAP[1] PS_3[4] NA 111 = 0 usable endpoints
NA 110 = 1 usable endpoints
AUD_PORT_CONN_PINSTRAP[0] PS_0[5]
GPIO9 GPIO11 GPIO12 GPIO13 101 = 2 usable endpoints
100 = 3 usable endpoints
BIOSROM ROMIDCFG0 ROMIDCFG1 ROMIDCFG2 010 = 5 usable endpoints
0 128M 0 0 0 000 = all endpoints are usable
0 256M 1 0 0
0 64M 0 1 0
0 Reservd 1 1 0
VDDC_CT VDDC_CT
MLPS
R_pu R305 R_pu R44
*EV@8.45K/F_4 *EV@0_4 R_pu R_pd Bits [3:1] Ra P/N MLPS Bit Bits [5:1] Ca Bits [5:4] P/N
PS_0 PS_1
<12> PS_0 <12> PS_1
NC 4.75K 000 2K CS22002FB19 PS_0 01001 680nF 00 CH4681K9B00
R_pd R_pd
Ca C543 R306 Ca C135 R45
*EV@82n/16V_4 *EV@2K/F_4 *EV@0.1u/10V_4 *EV@4.75K/F_4 8.45K 2K 001 3.24K CS23242FB09 PS_1 11000 82nF 01 CH3823K1B00
4.53K 2K 010 3.4K CS23402FB08 PS_2 00000 10nF 10 CH31003KB11
6.98K 4.99K 011 4.53K CS24532FB08 PS_3 00XXX NC 11

VDDC_CT VDDC_CT
4.53K 4.99K 100 4.75K CS24752FB12
R_pu R50 R_pu R42 3.24K 5.62K 101 4.99K CS24992FB26

*EV@0_4 *EV@0_4
PS_2 PS_3
<12> PS_2 <12> PS_3 3.4K 10K 110 5.62K CS25622FB18
R_pd R_pd
Ca C153 R49 Ca C126 R41 4.75K NC 111 6.98K CS26982FB01
*EV@680n/6.3V_4 *EV@4.75K/F_4 *EV@680n/6.3V_4 *EV@4.75K/F_4
8.45K CS28452FB12
10K CS31002FB26 Quanta Computer Inc.

PROJECT : ZQN
A1A
Opal(Jet)_M2/ STRAPS_Thermal
U19E
PART 5 0F 9 +1.8V_GFX
+1.5V_GFX
(2.2A) MEM I/O
PCIE_VDDR
(440mA)
AC7 VDDR1 NC_PCIE_VDDR AA31 L4 *EV@HCB1608KF-121T30_3A_6
AD11 VDDR1 NC_PCIE_VDDR AA32
AF7 VDDR1 NC_PCIE_VDDR AA33
C158 C128 C50 C10 C52 AG10 VDDR1 NC_PCIE_VDDR AA34 C97 C114 C98 C99 C95
*EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@10u/6.3V_6 *EV@10u/6.3V_6 AJ7 VDDR1 NC_PCIE_VDDR W30 *EV@0.1u/10V_4 *EV@0.1u/10V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@4.7u/6.3V_6
AK8 VDDR1 NC_PCIE_VDDR Y31
AL9 VDDR1 NC_BIF_VDDC V28
G11 VDDR1 NC_BIF_VDDC W29
G14 VDDR1 PCIE_PVDD AB37 +PCIE_VDDC_GFX
G17 3.9A
PCIE
VDDR1
G20 VDDR1 PCIE_VDDC G30
C96 C61 C58 C136 C70 C63 C60 G23 VDDR1 PCIE_VDDC G31
*EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 G26 VDDR1 PCIE_VDDC H29
G29 VDDR1 PCIE_VDDC H30 C87 C85 C56 C76 C83 C84 C67 C64 C68 C66
H10 VDDR1 PCIE_VDDC J29 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6
J7 VDDR1 PCIE_VDDC J30 2.5A
J9 VDDR1 PCIE_VDDC L28
K11 VDDR1 PCIE_VDDC M28
K13 VDDR1 PCIE_VDDC N28
C71 C54 C65 C161 K8 VDDR1 PCIE_VDDC R28
*EV@0.1u/10V_4 *EV@0.1u/10V_4 *EV@0.1u/10V_4 *EV@0.1u/10V_4 L12 VDDR1 PCIE_VDDC T28
L16 VDDR1 PCIE_VDDC U28
L21 VDDR1
L23 VDDR1
L26 VDDR1 BIF_VDDC N27
L7 BACO T27
VDDR1 BIF_VDDC 1.4A
C591 M11 VDDR1
C115 C57 C59 C81 N11 VDDR1
*EV@0.1u/10V_4 *EV@0.1u/10V_4 *EV@0.1u/10V_4 *EV@0.1u/10V_4 *EV@22u/6.3V_8 P7 VDDR1 VDDC AA15
R11 CORE AA17
VDDR1 VDDC
U11 VDDR1 VDDC AA20
U7 VDDR1 VDDC AA22
Y11 VDDR1 VDDC AA24
Y7 VDDR1 VDDC AA27
VDDC AB16 +VGPU_CORE
VDDC AB18 (30A)
VDDC AB21
Level translation between core and I/O, VDDC AB23
excluding memory receivers. VDDC_CT LEVEL VDDC AB26
(17mA) TRANSLATION VDDC AB28 C132 C78 C74 C107 C89 C109 C77
L11 VDDC_CT AF26 AC17 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4
+1.8V_GFX VDD_CT VDDC
*EV@BLM15BD121SN1D_0.3A_4 AF27 VDD_CT VDDC AC20
AG26 VDD_CT VDDC AC22
C169 C141 C142 C154 AG27 VDD_CT VDDC AC24
*EV@4.7u/6.3V_6 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@0.1u/10V_4 VDDC AC27
VDDC AD18
I/O power for 3.3-V pins, such as GPIOs. I/O VDDC AD21
(60mA) AF23 VDDR3 VDDC AD23
+3V_GFX L12 VDDR3 AF24 VDDR3 VDDC AD26
*EV@BLM15BD121SN1D_0.3A AG23 VDDR3 VDDC AF17 C108 C122 C120 C133 C79 C131 C121 C90 C88 C116
AG24 VDDR3 VDDC AF20 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4
C178 C168 C155 C164 VDDC AF22
*EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@1u/6.3V_4 *EV@1u/6.3V_4 DVP VDDC AG16
AD12 VDDR4 VDDC AG18
AF11 VDDR4
AF12 VDDR4 VDDC AH22
AF13 AH27
Opal only, DNI for Jet (300mA)
VDDR4 VDDC
VDDC AH28
+1.8V_GFX L8 VDDR4 VDDC M26
*EV@BLM15BD121SN1D_300MA AF15 VDDR4 VDDC N24 C130 C129 C145 C94 C127 C118 C117 C93 C144 C101
AG11 VDDR4 VDDC R18 *EV@10u/6.3V_6 *EV@10u/6.3V_6 *EV@10u/6.3V_6 *EV@10u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6
Power for all DVP pins; DVPDATA_[23:0]—DVO or GPIO. C148 C139 C140 AG13 VDDR4 VDDC R21
*EV@4.7u/6.3V_6 *EV@1u/6.3V_4 *EV@0.1u/10V_4 AG15 VDDR4 VDDC R23
VDDC R26
VDDC T17
VDDC T20
VDDC T22
VDDC T24
VDDC U16
VDDC U18
C146 VDDC U21
*EV@4.7u/6.3V_6 VDDC U23
VDDC U26
VDDC V17
VDDC V20
VDDC V22
VDDC V24
VDDC V27
VDDC Y16
VDDC Y18
VDDC Y21
VDDC Y23
VDDC Y26 L2 *EV@HCB1608KF-121T30_3A_6 +VGPU_CORE
VDDC Y28 L3 *EV@HCB1608KF-121T30_3A_6
(8.8A)
VDDCI AA13 VDDCI
VDDCI AB13
VDDCI AC12
VDDCI AC15 C80 C75 C91 C82
VDDCI AD13 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4
VDDCI AD16
VDDCI M15
VDDCI M16
GPUVDDC/GPUVSS route a differtial pair. VDDCI M18
VOLTAGE M23
VDDCI
SENESE N13
CORE I/O
VDDCI
ISOLATED
R74 *SHORT_4 GPUVDDC_SENSE_GPU AF28 N15

FB_VDDC VDDCI
<36> GPUVDDC_SENSE
VDDCI N17 C72 C73
VDDCI N20 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6
AG28 FB_VDDCI VDDCI N22
TP50
VDDCI R12
VDDCI R13
R73 *SHORT_4 GPUVSS_SENSE_GPU AH29 R16
<36> GPUVSS_SENSE FB_GND VDDCI
VDDCI T12
T15
03/17 short Pad VDDCI
V15
VDDCI
VDDCI Y13 PROJECT : ZQN
A1A
*EV@GPU_M2
Opal(Jet)_M2/ MainPower
Date: Monday, March 17, 2014 Sheet 15 of 38
U19H Opal only, DNI for Jet
PART 8 0F 9 +PCIE_VDDC_GFX
DP_VDDR DP_VDDC
DPAB_VDD10
(330mA)
DP_VDDC AP31 L15
DP_VDDC AP32 *EV@PBY160808T-501Y-N_1.2A
DP_VDDC AN33 C187 C165 C180
DP_VDDC AP33
AN24 DP_VDDR *EV@4.7u/6.3V_6 *EV@1u/6.3V_4 *EV@0.1u/10V_4
AP24 DP_VDDR DP_VDDC AP13
AP25 DP_VDDR Opal/Jet : DP_VDDC AT13
AP26 DP_VDDR
NC PIN DP_VDDC AP14
AU28 DP_VDDR DP_VDDC AP15
AV29 DP_VDDR
DP_VDDC AL33
DP_VDDC AM33
AP20 DP_VDDR DP_VDDC AK33
AP21 DP_VDDR DP_VDDC AK34
AP22 DP_VDDR
AP23
Opal only, DNI for Jet AU18
DP_VDDR
DP_VDDR
+1.8V_GFX AV19 DP_VDDR
DP GND
DP_VSSR AN27
AH34 DP_VDDR DP_VSSR AP27
AJ34 DP_VDDR DP_VSSR AP28
AF34 DP_VDDR DP_VSSR AW24
(330mA) AG34 DP_VDDR DP_VSSR AW26
L7 *EV@PBY160808T-501Y-N_1.2A DPEF_VDD18 AM37 DP_VDDR DP_VSSR AN29
AL38 DP_VDDR DP_VSSR AP29
DP_VSSR AP30
C147 C151 C150 DP_VSSR AW30
*EV@4.7u/6.3V_6 *EV@1u/6.3V_4 *EV@0.1u/10V_4 DP_VSSR AW32
DP_VSSR AN17
DP_VSSR AP16
DP_VSSR AP17
DP_VSSR AW14
DP_VSSR AW16
DP_VSSR AN19
DP_VSSR AP18
DP_VSSR AP19
DP_VSSR AW20
CALIBRATION AW22
DP_VSSR
DP_VSSR AN34
DP_VSSR AP39
AW28 DPAB_CALR DP_VSSR AR39
DP_VSSR AU37
DP_VSSR AF39
DP_VSSR AH39
AW18 AK39
Opal only, DNI for Jet DPCD_CALR DP_VSSR
DP_VSSR AL34
DP_VSSR AV27
DP_VSSR AR28
R304 *EV@150/F_4 AM39 DPEF_CALR DP_VSSR AV17
DP_VSSR AR18
DP_VSSR AN38
DP_VSSR AM35
*EV@GPU_M2

PROJECT : ZQN
A1A
Opal(Jet)_M2/ DP_Powers
<VGA>
U19F
PART 6 0F 9
AB39 PCIE_VSS GND A3

E39 PCIE_VSS GND A37
F34 PCIE_VSS GND AA16
F39 PCIE_VSS GND AA18
G33 PCIE_VSS GND AA2
G34 PCIE_VSS GND AA21
H31 PCIE_VSS GND AA23
J31 PCIE_VSS GND AA6
J34 PCIE_VSS GND AB12
K31 PCIE_VSS GND AB15
L31 PCIE_VSS GND AB22
L34 PCIE_VSS GND AB24
M34 PCIE_VSS GND AB27
M39 PCIE_VSS GND AC11
N31 PCIE_VSS GND AC13
N34 PCIE_VSS GND AC16
P31 PCIE_VSS GND AC18
R34 PCIE_VSS GND AC23
T31 PCIE_VSS GND AC26
U31 PCIE_VSS GND AD15
U34 PCIE_VSS GND AD17
V34 PCIE_VSS GND AD20
V39 PCIE_VSS GND AD22
W31 PCIE_VSS GND AD24
W34 PCIE_VSS GND AD27
Y34 PCIE_VSS GND AD9
Y39 PCIE_VSS GND AE2
GND AE6
GND AF10
GND AF16
GND AF18
GND GND AF21
GND AG17
F15 GND GND AG2
F17 GND GND AG20
F19 GND GND AG22
F21 GND GND AG6
F23 GND GND AG9
F25 GND GND AH21
F27 GND GND AJ10
F29 GND GND AJ11
F31 GND GND AJ2
F33 GND GND AJ28
F7 GND GND AJ6
F9 GND GND AK11
G2 GND GND AK31
G6 GND GND AK7
H9 GND GND AL11
J2 GND GND AL14
J27 GND GND AL17
J6 GND GND AL2
J8 GND GND AL20
K14 GND
K7 GND GND AL23
L11 GND GND AL26
L17 GND GND AL32
L2 GND GND AL6
L22 GND GND AL8
L24 GND GND AM11
L6 GND GND AM31
M17 GND GND AM9
M22 GND GND AN11
M24 GND GND AN2
N16 GND GND AN30
N18 GND GND AN6
N2 GND GND AN8
N21 GND GND AP11
N23 GND GND AP7
N26 GND GND AP9
N6 GND GND AR5
R15 GND GND B11
R17 GND GND B13
R2 GND GND B15
R20 GND GND B17
R22 GND GND B19
R24 GND GND B21
R27 GND GND B23
R6 GND GND B25
T11 GND GND B27
T13 GND GND B29
T16 GND GND B31
T18 GND GND B33
T21 GND GND B7
T23 GND GND B9
T26 GND GND C1
U15 GND GND C39
U17 GND GND E35
U2 GND GND E5
U20 GND GND F11
U22 GND GND F13
U24 GND
U27 GND
U6 GND
V11 GND
V16 GND
V18 GND
V21 GND
V23 GND
V26 GND
W2 GND
W6 GND
Y15 GND
Y17 GND
Y20 GND
Y22 GND VSS_MECH A39
Y24 GND VSS_MECH AW1
Y27 GND VSS_MECH AW39
*EV@GPU_M2

PROJECT : ZQN
A1A
Opal(Jet)_M2/ GND
<VGA>
VMB_DQ[63..0]
<20> VMB_DQ[63..0]
VMB_DM[7..0]
<20> VMB_DM[7..0] U19D
U19C VMB_RDQS[7..0]
<20> VMB_RDQS[7..0] PART 4 0F 9
PART 3 0F 9 VMB_WDQS[7..0]
VMA_DQ[63..0] <20> VMB_WDQS[7..0] VMB_DQ0 C5 GDDR5/DDR3 P8 VMB_MA0
GDDR5/DDR3 DQB0_0 MAB0_0/MAB_0
<19> VMA_DQ[63..0] VMA_DQ0 C37 G24 VMA_MA0 VMB_MA[15..0] VMB_DQ1 C3 T9 VMB_MA1
DQA0_0 MAA0_0/MAA_0 DQB0_1 MAB0_1/MAB_1
VMA_DM[7..0] VMA_DQ1 C35 J23 VMA_MA1 <20> VMB_MA[15..0] VMB_DQ2 E3 P9 VMB_MA2
<19> VMA_DM[7..0] VMA_DQ2 VMA_MA2 VMB_DQ3 VMB_MA3
A35 DQA0_2 MAA0_2/MAA_2 H24 E1 DQB0_3 MAB0_3/MAB_3 N7
VMA_RDQS[7..0] VMA_DQ3 E34 J24 VMA_MA3 VMB_DQ4 F1 N8 VMB_MA4
<19> VMA_RDQS[7..0] VMA_DQ4 G32 H26 VMA_MA4 VMB_BA0 VMB_DQ5 F3 N9 VMB_MA5
VMA_WDQS[7..0] VMA_DQ5 VMA_MA5 <20> VMB_BA0 VMB_BA1 VMB_DQ6 VMB_MA6
D33 DQA0_5 MAA0_5/MAA_5 J26 F5 DQB0_6 MAB0_6/MAB_6 U9
<19> VMA_WDQS[7..0] VMA_DQ6 F32 H21 VMA_MA6 <20> VMB_BA1 VMB_BA2 VMB_DQ7 G4 U8 VMB_MA7
VMA_DQ7 E32 G21 VMA_MA7 <20> VMB_BA2 VMB_DQ8 H5 Y9 VMB_MA8
VMA_DQ8 D31 H19 VMA_MA8 VMB_DQ9 H6 W9 VMB_MA9
MEMORY INTERFACE A
VMA_MA[15..0] VMA_DQ9 F30 H20 VMA_MA9 VMB_DQ10 J4 AC8 VMB_MA10
<19> VMA_MA[15..0] VMA_DQ10 C30 L13 VMA_MA10 VMB_DQ11 K6 AC9 VMB_MA11
VMA_DQ11 A30 G16 VMA_MA11 VMB_DQ12 K5 AA7 VMB_MA12
VMA_BA0 VMA_DQ12 F28 J16 VMA_MA12 VMB_DQ13 L4 AA8 VMB_BA2
DQA0_12 MAA1_4/MAA_12 DQB0_13 MAB1_5/BA2
<19> VMA_BA0 VMA_BA1 VMA_DQ13 VMA_BA2 VMB_DQ14 VMB_BA0
C28 DQA0_13 MAA1_5/MAA_BA2 H16 M6 DQB0_14 MAB1_6/BA0 Y8
<19> VMA_BA1 VMA_BA2 VMA_DQ14 VMA_BA0 VMB_DQ15 VMB_BA1
A28 DQA0_14 MAA1_6/MAA_BA0 J17 M1 DQB0_15 MAB1_7/BA1 AA9
<19> VMA_BA2 VMA_DQ15 VMA_BA1 VMB_DQ16
E28 DQA0_15 MAA1_7/MAA_BA1 H17 M3 DQB0_16
VMA_DQ16 D27 VMB_DQ17 M5 H3 VMB_DM0
MEMORY INTERFACE B
DQA0_16 DQB0_17 WCKB0_0/DQMB_0
VMA_DQ17 F26 A32 VMA_DM0 VMB_DQ18 N4 H1 VMB_DM1
DQA0_17 WCKA0_0/DQMA_0 DQB0_18 WCKB0B_0/DQMB_1
VMA_DQ18 C26 C32 VMA_DM1 VMB_DQ19 P6 T3 VMB_DM2
DQA0_18 WCKA0B_0/DQMA_1 DQB0_19 WCKB0_1/DQMB_2
VMA_DQ19 A26 DQA0_19 WCKA0_1/DQMA_2 D23 VMA_DM2 VMB_DQ20 P5 DQB0_20 WCKB0B_1/DQMB_3 T5 VMB_DM3
VMA_DQ20 F24 E22 VMA_DM3 VMB_DQ21 R4 AE4 VMB_DM4
VMA_DQ21 C24 C14 VMA_DM4 VMB_DQ22 T6 AF5 VMB_DM5
VMA_DQ22 A24 A14 VMA_DM5 VMB_DQ23 T1 AK6 VMB_DM6
VMA_DQ23 E24 E10 VMA_DM6 VMB_DQ24 U4 AK5 VMB_DM7
VMA_DQ24 C22 DQA0_24 WCKA1B_1/DQMA_7 D9 VMA_DM7 VMB_DQ25 V6 DQB0_25
VMA_DQ25 A22 DQA0_25
VMB_DQ26 V1 DQB0_26 EDCB0_0/QSB_0 F6 VMB_RDQS0
VMA_DQ26 F22 C34 VMA_RDQS0 VMB_DQ27 V3 K3 VMB_RDQS1
DQA0_26 EDCA0_0/QSA_0 DQB0_27 EDCB0_1/QSB_1
VMA_DQ27 D21 D29 VMA_RDQS1 VMB_DQ28 Y6 P3 VMB_RDQS2
VMA_DQ28 A20 D25 VMA_RDQS2 VMB_DQ29 Y1 V5 VMB_RDQS3
VMA_DQ29 F20 DQA0_29 EDCA0_3/QSA_3 E20 VMA_RDQS3 VMB_DQ30 Y3 DQB0_30 EDCB1_0/QSB_4 AB5 VMB_RDQS4
VMA_DQ30 D19 E16 VMA_RDQS4 VMB_DQ31 Y5 AH1 VMB_RDQS5
VMA_DQ31 E18 DQA0_31 EDCA1_1/QSA_5 E12 VMA_RDQS5 VMB_DQ32 AA4 DQB1_0 EDCB1_2/QSB_6 AJ9 VMB_RDQS6
VMA_DQ32 C18 J10 VMA_RDQS6 VMB_DQ33 AB6 AM5 VMB_RDQS7
VMA_DQ33 A18 D7 VMA_RDQS7 VMB_DQ34 AB1
DQA1_1 EDCA1_3/QSA_7 DQB1_2
VMA_DQ34 F18 DQA1_2
VMB_DQ35 AB3 DQB1_3 DDBIB0_0/QSB_0B G7 VMB_WDQS0
VMA_DQ35 D17 DQA1_3 DDBIA0_0/QSA_0B A34 VMA_WDQS0 VMB_DQ36 AD6 DQB1_4 DDBIB0_1/QSB_1B K1 VMB_WDQS1
VMA_DQ36 A16 DQA1_4 DDBIA0_1/QSA_1B E30 VMA_WDQS1 VMB_DQ37 AD1 DQB1_5 DDBIB0_2/QSB_2B P1 VMB_WDQS2
VMA_DQ37 F16 E26 VMA_WDQS2 VMB_DQ38 AD3 W4 VMB_WDQS3
DQA1_5 DDBIA0_2/QSA_2B DQB1_6 DDBIB0_3/QSB_3B
VMA_DQ38 D15 DQA1_6 DDBIA0_3/QSA_3B C20 VMA_WDQS3 VMB_DQ39 AD5 DQB1_7 DDBIB1_0/QSB_4B AC4 VMB_WDQS4
VMA_DQ39 E14 C16 VMA_WDQS4 VMB_DQ40 AF1 AH3 VMB_WDQS5
VMA_DQ40 F14 C12 VMA_WDQS5 VMB_DQ41 AF3 AJ8 VMB_WDQS6
VMA_DQ41 D13 DQA1_9 DDBIA1_2/QSA_6B J11 VMA_WDQS6 VMB_DQ42 AF6 DQB1_10 DDBIB1_3/QSB_7B AM3 VMB_WDQS7
VMA_DQ42 F12 F8 VMA_WDQS7 VMB_DQ43 AG4
DQA1_10 DDBIA1_3/QSA_7B DQB1_11
VMA_DQ43 A12 VMB_DQ44 AH5 T7
DQA1_11 DQB1_12 ADBIB0/ODTB0
VMA_DQ44 D11 J21 VMB_DQ45 AH6 W7 VMB_ODT0 <20>
DQA1_12 ADBIA0/ODTA0 DQB1_13 ADBIB1/ODTB1
VMA_DQ45 F10 G19 VMA_ODT0 <19> VMB_DQ46 AJ4 VMB_ODT1 <20>
DQA1_13 ADBIA1/ODTA1 DQB1_14
VMA_DQ46 A10 VMA_ODT1 <19> VMB_DQ47 AK3 L9 VMB_CLK0
DQA1_14 DQB1_15 CLKB0
VMA_DQ47 VMB_CLK0 <20>
C10 DQA1_15 CLKA0 H27 VMA_CLK0 VMB_DQ48 AF8 DQB1_16 CLKB0B L8 VMB_CLK0#
VMA_DQ48 VMA_CLK0 <19> VMB_CLK0# <20>
G13 DQA1_16 CLKA0B G27 VMA_CLK0# VMB_DQ49 AF9 DQB1_17
VMA_DQ49 H13 VMA_CLK0# <19> VMB_DQ50 AG8 AD8 VMB_CLK1
DQA1_17 DQB1_18 CLKB1
VMA_DQ50 VMB_CLK1 <20>
J13 DQA1_18 CLKA1 J14 VMA_CLK1 VMB_DQ51 AG7 DQB1_19 CLKB1B AD7 VMB_CLK1#
VMA_DQ51 H11 H14 VMA_CLK1# VMA_CLK1 <19> VMB_DQ52 AK9 VMB_CLK1# <20>
DQA1_19 CLKA1B DQB1_20
VMA_DQ52 G10 VMA_CLK1# <19> VMB_DQ53 AL7 T10 VMB_RAS0#
DQA1_20 DQB1_21 RASB0B
VMA_DQ53 VMA_RAS0# VMB_DQ54 VMB_RAS0# <20>
Place MVREF dividers and Caps close to ASIC G8 DQA1_21 RASA0B K23 AM8 DQB1_22 RASB1B Y10 VMB_RAS1#
VMA_DQ54 K9 K19 VMA_RAS1# VMA_RAS0# <19> VMB_DQ55 AM7 VMB_RAS1# <20>
DQA1_22 RASA1B DQB1_23
VMA_DQ55 K10 VMA_RAS1# <19> VMB_DQ56 AK1 W10 VMB_CAS0#
DQA1_23 DQB1_24 CASB0B
VMA_DQ56 G9 K20 VMA_CAS0# VMB_DQ57 AL4 AA10 VMB_CAS1# VMB_CAS0# <20>
DQA1_24 CASA0B DQB1_25 CASB1B
VMA_DQ57 A8 K17 VMA_CAS1# VMA_CAS0# <19> VMB_DQ58 AM6 VMB_CAS1# <20>
+1.5V_GFX DQA1_25 CASA1B +1.5V_GFX DQB1_26
VMA_DQ58 VMA_CAS1# <19> VMB_DQ59
C8 DQA1_26 AM1 DQB1_27 CSB0B_0 P10 VMB_CS0#
VMA_DQ59 VMA_CS0# VMB_DQ60 VMB_CS0# <20>
(0.7*VDDR1) E8 DQA1_27 CSA0B_0 K24 (0.7*VDDR1) AN4 DQB1_28 CSB0B_1 L10
VMA_DQ60 A6 K27 VMA_CS0# <19> VMB_DQ61 AP3
DQA1_28 CSA0B_1 DQB1_29
VMA_DQ61 C6 DQA1_29
VMB_DQ62 AP1 DQB1_30 CSB1B_0 AD10 VMB_CS1#
VMA_DQ62 E6 M13 VMA_CS1# VMB_DQ63 AP5 AC10 VMB_CS1# <20>
R26 DQA1_30 CSA1B_0 R38 DQB1_31 CSB1B_1
VMA_DQ63 VMA_CS1# <19>
*EV@40.2/F_4 A5 DQA1_31 CSA1B_1 K16 *EV@40.2/F_4
CKEB0 U10 VMB_CKE0
VMA_CKE0 VMB_CKE0 <20>
MVREFDA L18 MVREFDA CKEA0 K21 MVREFDB Y12 MVREFDB CKEB1 AA11 VMB_CKE1
VMA_CKE1 VMA_CKE0 <19> VMB_CKE1 <20>
MVREFSA L20 MVREFSA CKEA1 J20 MVREFSB AA12 MVREFSB
VMA_CKE1 <19> N10 VMB_WE0#
WEB0B
VMA_WE0# VMB_WE0# <20>
L27 NC_MEM_CALRN0 WEA0B K26 WEB1B AB11 VMB_WE1#
VMA_WE1# VMA_WE0# <19> VMB_WE1# <20>
R24 C51 N12 NC_MEM_CALRN1 WEA1B L15 R37 C110
VMA_WE1# <19>
*EV@100/F_4 *EV@1u/6.3V_4 AG12 NC_MEM_CALRN2 *EV@100/F_4 *EV@1u/6.3V_4
MAB0_8/MAB_13 T8 VMB_MA13
M12 NC_MEM_CALRP1 MAA0_8/MAA_13 H23 VMA_MA13 MAB1_8/MAB_14 W8 VMB_MA14
R31 *EV@120/F_4 M27 MEM_CALRP0 MAA1_8/MAA_14 J19 VMA_MA14 MAB0_9/MAB_15 U12 VMB_MA15
AH12 MEM_CALRP2 MAA0_9/MAA_15 M21 VMA_MA15 MAB1_9/RSVD V12
MAA1_9/RSVD M20
+1.5V_GFX +1.5V_GFX DRAM_RST AH11 GPU_DRAM_RST
(0.7*VDDR1) (0.7*VDDR1)
*EV@GPU_M2
R28 R40
*EV@40.2/F_4 *EV@GPU_M2 *EV@40.2/F_4
R27 C55 R39 C123

*EV@100/F_4 *EV@1u/6.3V_4 *EV@100/F_4 *EV@1u/6.3V_4
25mm (max) 5mm (max) 25mm (max)
Place MVREF dividers and Caps close to ASIC

GPU_DRAM_RST R345 *EV@10/F_4 DRST_R R346 *EV@51/F_4
MEM_RST# <19,20>
C581
R344
*EV@4.99K/F_4 *EV@120p/50V_4
Place all these componets very close to GPU (within 25mm)

and keep all components close to each other
** This basic topology should be used for DRAM_RAT for DDR3/GDDR5
These Capacitors and Resistor values arre an example only

The series R and || cap values will depend on the DRAM loads
and will have to be calculated for differrent Memory, DRAM loads and board
to pass Reset Signal Spec

PROJECT : ZQN
A1A
Opal(Jet)_M2/ MEM Interface
5 4 3 2 1
<18>
<18>
VMA_DQ[63..0]
VMA_DM[7..0]
VMA_DQ[63..0]
VMA_DM[7..0] CHANNEL A: 512MB DDR3 (64M*16*4pcs)

VMA_RDQS[7..0]
<18> VMA_RDQS[7..0]
VMA_WDQS[7..0]
<18> VMA_WDQS[7..0]
U17 U2
U1 U16
VREFC_VMA3 M8 E3 VMA_DQ48 VREFC_VMA4 M8 E3 VMA_DQ62
VREFC_VMA1 M8 E3 VMA_DQ7 VREFC_VMA2 M8 E3 VMA_DQ12 VREFD_VMA3 H1 VREFCA DQL0 F7 VMA_DQ54 VREFD_VMA4 H1 VREFCA DQL0 F7 VMA_DQ57
VREFD_VMA1 H1 VREFCA DQL0 F7 VMA_DQ3 VREFD_VMA2 H1 VREFCA DQL0 F7 VMA_DQ11 VREFDQ DQL1 F2 VMA_DQ51 VREFDQ DQL1 F2 VMA_DQ60
VREFDQ DQL1 F2 VMA_DQ5 VREFDQ DQL1 F2 VMA_DQ8 VMA_MA0 N3 DQL2 F8 VMA_DQ52 VMA_MA0 N3 DQL2 F8 VMA_DQ59
VMA_MA0 N3 DQL2 F8 VMA_DQ1 VMA_MA0 N3 DQL2 F8 VMA_DQ13 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ49 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ61
<18> VMA_MA0 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ4 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ15 VMA_MA2 P3 A1 DQL4 H8 VMA_DQ53 VMA_MA2 P3 A1 DQL4 H8 VMA_DQ56
<18> VMA_MA1 VMA_MA2 P3 A1 DQL4 H8 VMA_DQ0 VMA_MA2 P3 A1 DQL4 H8 VMA_DQ14 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ50 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ63
<18> VMA_MA2 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ6 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ9 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ55 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ58
D <18> VMA_MA3 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ2 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ10 VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7 D
<18> VMA_MA4 VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7 VMA_MA6 R8 A5 VMA_MA6 R8 A5
<18> VMA_MA5 VMA_MA6 R8 A5 VMA_MA6 R8 A5 VMA_MA7 R2 A6 D7 VMA_DQ38 VMA_MA7 R2 A6 D7 VMA_DQ43
<18> VMA_MA6 VMA_MA7 R2 A6 D7 VMA_DQ25 VMA_MA7 R2 A6 D7 VMA_DQ22 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ35 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ47
<18> VMA_MA7 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ31 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ19 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ39 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ40
<18> VMA_MA8 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ27 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ20 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ33 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ46
<18> VMA_MA9 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ30 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ16 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ36 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ42
<18> VMA_MA10 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ24 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ21 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ34 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ45
<18> VMA_MA11 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ29 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ17 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ37 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ41
<18> VMA_MA12 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ26 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ23 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ32 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ44
<18> VMA_MA13 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ28 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ18 VMA_MA15 M7 A14 DQU7 VMA_MA15 M7 A14 DQU7
<18> VMA_MA14 VMA_MA15 M7 A14 DQU7 VMA_MA15 M7 A14 DQU7 A15 A15
+1.5V_GFX +1.5V_GFX
<18> VMA_MA15 A15 A15
+1.5V_GFX +1.5V_GFX
VMA_BA0 M2 B2 VMA_BA0 M2 B2
VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9
<18> VMA_BA0 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA2 M3 BA1 VDD#D9 G7 VMA_BA2 M3 BA1 VDD#D9 G7
<18> VMA_BA1 VMA_BA2 M3 BA1 VDD#D9 G7 VMA_BA2 M3 BA1 VDD#D9 G7 BA2 VDD#G7 K2 BA2 VDD#G7 K2
<18> VMA_BA2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 VDD#K2 K8 VDD#K2 K8
VDD#K2 K8 VDD#K2 K8 VDD#K8 N1 VDD#K8 N1
VDD#K8 N1 VDD#K8 N1 VMA_CLK1 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9
VMA_CLK0 J7 VDD#N1 N9 VMA_CLK0 J7 VDD#N1 N9 <18> VMA_CLK1 VMA_CLK1# K7 CK VDD#N9 R1 VMA_CLK1# K7 CK VDD#N9 R1
<18> VMA_CLK0 VMA_CLK0# K7 CK VDD#N9 R1 VMA_CLK0# K7 CK VDD#N9 R1 <18> VMA_CLK1# VMA_CKE1 K9 CK VDD#R1 R9 VMA_CKE1 K9 CK VDD#R1 R9
<18> VMA_CLK0# VMA_CKE0 K9 CK VDD#R1 R9 VMA_CKE0 K9 CK VDD#R1 R9 <18> VMA_CKE1 CKE VDD#R9 CKE VDD#R9
+1.5V_GFX +1.5V_GFX
<18> VMA_CKE0 CKE VDD#R9 CKE VDD#R9
+1.5V_GFX +1.5V_GFX
VMA_ODT1 K1 A1 VMA_ODT1 K1 A1
VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 <18> VMA_ODT1 VMA_CS1# L2 ODT VDDQ#A1 A8 VMA_CS1# L2 ODT VDDQ#A1 A8
<18> VMA_ODT0 VMA_CS0# L2 ODT VDDQ#A1 A8 VMA_CS0# L2 ODT VDDQ#A1 A8 <18> VMA_CS1# VMA_RAS1# J3 CS VDDQ#A8 C1 VMA_RAS1# J3 CS VDDQ#A8 C1
<18> VMA_CS0# VMA_RAS0# J3 CS VDDQ#A8 C1 VMA_RAS0# J3 CS VDDQ#A8 C1 <18> VMA_RAS1# VMA_CAS1# K3 RAS VDDQ#C1 C9 VMA_CAS1# K3 RAS VDDQ#C1 C9
<18> VMA_RAS0# VMA_CAS0# K3 RAS VDDQ#C1 C9 VMA_CAS0# K3 RAS VDDQ#C1 C9 <18> VMA_CAS1# VMA_WE1# L3 CAS VDDQ#C9 D2 VMA_WE1# L3 CAS VDDQ#C9 D2
<18> VMA_CAS0# VMA_WE0# L3 CAS VDDQ#C9 D2 VMA_WE0# L3 CAS VDDQ#C9 D2 <18> VMA_WE1# WE VDDQ#D2 E9 WE VDDQ#D2 E9
<18> VMA_WE0# WE VDDQ#D2 E9 WE VDDQ#D2 E9 VDDQ#E9 F1 VDDQ#E9 F1
VDDQ#E9 F1 VDDQ#E9 F1 VMA_RDQS6 F3 VDDQ#F1 H2 VMA_RDQS7 F3 VDDQ#F1 H2
VMA_RDQS0 F3 VDDQ#F1 H2 VMA_RDQS1 F3 VDDQ#F1 H2 VMA_RDQS4 C7 DQSL VDDQ#H2 H9 VMA_RDQS5 C7 DQSL VDDQ#H2 H9
VMA_RDQS3 C7 DQSL VDDQ#H2 H9 VMA_RDQS2 C7 DQSL VDDQ#H2 H9 DQSU VDDQ#H9 DQSU VDDQ#H9
DQSU VDDQ#H9 DQSU VDDQ#H9
VMA_DM6 E7 A9 VMA_DM7 E7 A9
VMA_DM0 E7 A9 VMA_DM1 E7 A9 VMA_DM4 D3 DML VSS#A9 B3 VMA_DM5 D3 DML VSS#A9 B3
C VMA_DM3 D3 DML VSS#A9 B3 VMA_DM2 D3 DML VSS#A9 B3 DMU VSS#B3 E1 DMU VSS#B3 E1 C
DMU VSS#B3 E1 DMU VSS#B3 E1 VSS#E1 G8 VSS#E1 G8
VSS#E1 G8 VSS#E1 G8 VMA_WDQS6 G3 VSS#G8 J2 VMA_WDQS7 G3 VSS#G8 J2
VMA_WDQS0 G3 VSS#G8 J2 VMA_WDQS1 G3 VSS#G8 J2 VMA_WDQS4 B7 DQSL VSS#J2 J8 VMA_WDQS5 B7 DQSL VSS#J2 J8
VMA_WDQS3 B7 DQSL VSS#J2 J8 VMA_WDQS2 B7 DQSL VSS#J2 J8 DQSU VSS#J8 M1 DQSU VSS#J8 M1
DQSU VSS#J8 M1 DQSU VSS#J8 M1 VSS#M1 M9 VSS#M1 M9
VSS#M1 M9 VSS#M1 M9 VSS#M9 P1 VSS#M9 P1
VSS#M9 P1 VSS#M9 P1 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9
MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 RESET VSS#P9 T1 RESET VSS#P9 T1
<18,20> MEM_RST# RESET VSS#P9 T1 RESET VSS#P9 T1 VMA_ZQ3 L8 VSS#T1 T9 VMA_ZQ4 L8 VSS#T1 T9
VMA_ZQ1 L8 VSS#T1 T9 VMA_ZQ2 L8 VSS#T1 T9 ZQ VSS#T9 ZQ VSS#T9
ZQ VSS#T9 ZQ VSS#T9
B1 B1
B1 B1 VSSQ#B1 B9 VSSQ#B1 B9
VSSQ#B1 B9 VSSQ#B1 B9 R279 VSSQ#B9 D1 R276 VSSQ#B9 D1
R3 VSSQ#B9 D1 R6 VSSQ#B9 D1 *EV@243/F_4 VSSQ#D1 D8 *EV@243/F_4 VSSQ#D1 D8
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D8 E2 VSSQ#D8 E2
*EV@243/F_4 *EV@243/F_4
VSSQ#D8 E2 VSSQ#D8 E2 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 100-BALL 100-BALL
100-BALL 100-BALL SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 SDRAM DDR3 *EV@VRAM _DDR3 *EV@VRAM _DDR3
*EV@VRAM _DDR3 *EV@VRAM _DDR3
Group-A0 VREF Group-A1 VREF

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX
B B
R5 R272 R274 R270

*EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4 R277 R9 R7 R14
*EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2
VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4
R4 C8 R273 C488 R275 C489 R271 C486

R278 C494 R10 C13 R8 C12 R13 C15
*EV@4.99K/F_4 *EV@0.1u/10V_4 *EV@4.99K/F_4 *EV@0.1u/10V_4 *EV@4.99K/F_4 *EV@0.1u/10V_4 *EV@4.99K/F_4 *EV@0.1u/10V_4
Group-A0 decoupling CAP Group-A1 decoupling CAP

MEM_A0 CLK
MEM_A1 CLK
+1.5V_GFX +1.5V_GFX
VMA_CLK0 VMA_CLK1
VMA_CLK0# VMA_CLK1#
C511 C46 C30 C512 C484 C487 C516 C17 C32 C34 C497 C496 C498 C19 C16 C515
*EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4
R2 R1
*EV@40.2/F_4 *EV@40.2/F_4 R11 R12
*EV@40.2/F_4 *EV@40.2/F_4
+1.5V_GFX +1.5V_GFX
C7 C14
*EV@0.01u/25V_4 C485 C9 C4 C6 C517 C5 C3 C2 C519 C18 C1 C518 C495 C499 C20 C493
A *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@0.01u/25V_4 A
+1.5V_GFX +1.5V_GFX
C23
*EV@4.7u/6.3V_6
C22
*EV@4.7u/6.3V_6
C11
*EV@4.7u/6.3V_6
C506
*EV@4.7u/6.3V_6
C504
*EV@4.7u/6.3V_6
C491
*EV@4.7u/6.3V_6
C49
*EV@4.7u/6.3V_6
C490
*EV@4.7u/6.3V_6
C508
*EV@4.7u/6.3V_6
C21
*EV@4.7u/6.3V_6 Quanta Computer Inc.
PROJECT : ZQN
Size Docum ent Num ber Rev
Opal(Jet)_M2/VRAM_A A1A
Date: Thurs day, February 20, 2014 Sheet 19 of 38

5 4 3 2 1
5 4 3 2 1
<18>
<18>
VMB_DQ[63..0]
VMB_DM[7..0]
VMB_DQ[63..0]
VMB_DM[7..0] CHANNEL B: 512MB DDR3 (64M*16*4pcs)

VMB_RDQS[7..0]
<18> VMB_RDQS[7..0]
VMB_WDQS[7..0]
<18> VMB_WDQS[7..0]
U4 U18 U21 U5
VREFC_VMB1 M8 E3 VMB_DQ7 VREFC_VMB2 M8 E3 VMB_DQ9 VREFC_VMB3 M8 E3 VMB_DQ50 VREFC_VMB4 M8 E3 VMB_DQ62
VREFD_VMB1 H1 VREFCA DQL0 F7 VMB_DQ2 VREFD_VMB2 H1 VREFCA DQL0 F7 VMB_DQ13 VREFD_VMB3 H1 VREFCA DQL0 F7 VMB_DQ55 VREFD_VMB4 H1 VREFCA DQL0 F7 VMB_DQ58
VREFDQ DQL1 F2 VMB_DQ4 VREFDQ DQL1 F2 VMB_DQ10 VREFDQ DQL1 F2 VMB_DQ51 VREFDQ DQL1 F2 VMB_DQ61
VMB_MA0 N3 DQL2 F8 VMB_DQ1 VMB_MA0 N3 DQL2 F8 VMB_DQ14 VMB_MA0 N3 DQL2 F8 VMB_DQ53 VMB_MA0 N3 DQL2 F8 VMB_DQ59
<18> VMB_MA0 VMB_MA1 P7 A0 DQL3 H3 VMB_DQ5 VMB_MA1 P7 A0 DQL3 H3 VMB_DQ8 VMB_MA1 P7 A0 DQL3 H3 VMB_DQ49 VMB_MA1 P7 A0 DQL3 H3 VMB_DQ60
<18> VMB_MA1 VMB_MA2 A1 DQL4 VMB_DQ0 VMB_MA2 A1 DQL4 VMB_DQ15 VMB_MA2 A1 DQL4 VMB_DQ54 VMB_MA2 A1 DQL4 VMB_DQ56
P3 H8 P3 H8 P3 H8 P3 H8
<18> VMB_MA2 VMB_MA3 A2 DQL5 VMB_DQ6 VMB_MA3 A2 DQL5 VMB_DQ11 VMB_MA3 A2 DQL5 VMB_DQ48 VMB_MA3 A2 DQL5 VMB_DQ63
N2 G2 N2 G2 N2 G2 N2 G2
D <18> VMB_MA3 VMB_MA4 P8 A3 DQL6 H7 VMB_DQ3 VMB_MA4 P8 A3 DQL6 H7 VMB_DQ12 VMB_MA4 P8 A3 DQL6 H7 VMB_DQ52 VMB_MA4 P8 A3 DQL6 H7 VMB_DQ57 D
<18> VMB_MA4 VMB_MA5 P2 A4 DQL7 VMB_MA5 P2 A4 DQL7 VMB_MA5 P2 A4 DQL7 VMB_MA5 P2 A4 DQL7
<18> VMB_MA5 VMB_MA6 R8 A5 VMB_MA6 R8 A5 VMB_MA6 R8 A5 VMB_MA6 R8 A5
<18> VMB_MA6 VMB_MA7 A6 VMB_DQ18 VMB_MA7 A6 VMB_DQ29 VMB_MA7 A6 VMB_DQ46 VMB_MA7 A6 VMB_DQ33
R2 D7 R2 D7 R2 D7 R2 D7
<18> VMB_MA7 VMB_MA8 T8 A7 DQU0 C3 VMB_DQ23 VMB_MA8 T8 A7 DQU0 C3 VMB_DQ27 VMB_MA8 T8 A7 DQU0 C3 VMB_DQ43 VMB_MA8 T8 A7 DQU0 C3 VMB_DQ37
<18> VMB_MA8 VMB_MA9 R3 A8 DQU1 C8 VMB_DQ17 VMB_MA9 R3 A8 DQU1 C8 VMB_DQ28 VMB_MA9 R3 A8 DQU1 C8 VMB_DQ45 VMB_MA9 R3 A8 DQU1 C8 VMB_DQ35
<18> VMB_MA9 VMB_MA10 L7 A9 DQU2 C2 VMB_DQ21 VMB_MA10 L7 A9 DQU2 C2 VMB_DQ25 VMB_MA10 L7 A9 DQU2 C2 VMB_DQ42 VMB_MA10 L7 A9 DQU2 C2 VMB_DQ38
<18> VMB_MA10 VMB_MA11 R7 A10/AP DQU3 A7 VMB_DQ19 VMB_MA11 R7 A10/AP DQU3 A7 VMB_DQ30 VMB_MA11 R7 A10/AP DQU3 A7 VMB_DQ44 VMB_MA11 R7 A10/AP DQU3 A7 VMB_DQ32
<18> VMB_MA11 VMB_MA12 A11 DQU4 VMB_DQ22 VMB_MA12 A11 DQU4 VMB_DQ24 VMB_MA12 A11 DQU4 VMB_DQ40 VMB_MA12 A11 DQU4 VMB_DQ39
N7 A2 N7 A2 N7 A2 N7 A2
<18> VMB_MA12 VMB_MA13 A12/BC DQU5 VMB_DQ16 VMB_MA13 A12/BC DQU5 VMB_DQ31 VMB_MA13 A12/BC DQU5 VMB_DQ47 VMB_MA13 A12/BC DQU5 VMB_DQ34
T3 B8 T3 B8 T3 B8 T3 B8
<18> VMB_MA13 VMB_MA14 T7 A13 DQU6 A3 VMB_DQ20 VMB_MA14 T7 A13 DQU6 A3 VMB_DQ26 VMB_MA14 T7 A13 DQU6 A3 VMB_DQ41 VMB_MA14 T7 A13 DQU6 A3 VMB_DQ36
<18> VMB_MA14 VMB_MA15 M7 A14 DQU7 VMB_MA15 M7 A14 DQU7 VMB_MA15 M7 A14 DQU7 VMB_MA15 M7 A14 DQU7
<18> VMB_MA15 A15 A15 A15 A15
VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2
<18> VMB_BA0 VMB_BA1 BA0 VDD#B2 VMB_BA1 BA0 VDD#B2 VMB_BA1 BA0 VDD#B2 VMB_BA1 BA0 VDD#B2
N8 D9 N8 D9 N8 D9 N8 D9
<18> VMB_BA1 VMB_BA2 M3 BA1 VDD#D9 G7 VMB_BA2 M3 BA1 VDD#D9 G7 VMB_BA2 M3 BA1 VDD#D9 G7 VMB_BA2 M3 BA1 VDD#D9 G7
<18> VMB_BA2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
VMB_CLK0 J7 VDD#N1 N9 VMB_CLK0 J7 VDD#N1 N9 VMB_CLK1 J7 VDD#N1 N9 VMB_CLK1 J7 VDD#N1 N9
<18> VMB_CLK0 VMB_CLK0# K7 CK VDD#N9 R1 VMB_CLK0# K7 CK VDD#N9 R1 <18> VMB_CLK1 VMB_CLK1# K7 CK VDD#N9 R1 VMB_CLK1# K7 CK VDD#N9 R1
<18> VMB_CLK0# VMB_CKE0 K9 CK VDD#R1 R9 VMB_CKE0 K9 CK VDD#R1 R9 <18> VMB_CLK1# VMB_CKE1 K9 CK VDD#R1 R9 VMB_CKE1 K9 CK VDD#R1 R9
<18> VMB_CKE0 CKE VDD#R9 CKE VDD#R9 <18> VMB_CKE1 CKE VDD#R9 CKE VDD#R9
VMB_ODT0 K1 A1 VMB_ODT0 K1 A1 VMB_ODT1 K1 A1 VMB_ODT1 K1 A1
<18> VMB_ODT0 VMB_CS0# ODT VDDQ#A1 VMB_CS0# ODT VDDQ#A1 <18> VMB_ODT1 VMB_CS1# ODT VDDQ#A1 VMB_CS1# ODT VDDQ#A1
L2 A8 L2 A8 L2 A8 L2 A8
<18> VMB_CS0# VMB_RAS0# J3 CS VDDQ#A8 C1 VMB_RAS0# J3 CS VDDQ#A8 C1 <18> VMB_CS1# VMB_RAS1# J3 CS VDDQ#A8 C1 VMB_RAS1# J3 CS VDDQ#A8 C1
<18> VMB_RAS0# VMB_CAS0# RAS VDDQ#C1 VMB_CAS0# RAS VDDQ#C1 <18> VMB_RAS1# VMB_CAS1# RAS VDDQ#C1 VMB_CAS1# RAS VDDQ#C1
K3 C9 K3 C9 K3 C9 K3 C9
<18> VMB_CAS0# VMB_WE0# L3 CAS VDDQ#C9 D2 VMB_WE0# L3 CAS VDDQ#C9 D2 <18> VMB_CAS1# VMB_WE1# L3 CAS VDDQ#C9 D2 VMB_WE1# L3 CAS VDDQ#C9 D2
<18> VMB_WE0# WE VDDQ#D2 E9 WE VDDQ#D2 E9 <18> VMB_WE1# WE VDDQ#D2 E9 WE VDDQ#D2 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
VMB_RDQS0 F3 VDDQ#F1 H2 VMB_RDQS1 F3 VDDQ#F1 H2 VMB_RDQS6 F3 VDDQ#F1 H2 VMB_RDQS7 F3 VDDQ#F1 H2
VMB_RDQS2 C7 DQSL VDDQ#H2 H9 VMB_RDQS3 C7 DQSL VDDQ#H2 H9 VMB_RDQS5 C7 DQSL VDDQ#H2 H9 VMB_RDQS4 C7 DQSL VDDQ#H2 H9
DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9
VMB_DM0 E7 A9 VMB_DM1 E7 A9 VMB_DM6 E7 A9 VMB_DM7 E7 A9

C VMB_DM2 D3 DML VSS#A9 B3 VMB_DM3 D3 DML VSS#A9 B3 VMB_DM5 D3 DML VSS#A9 B3 VMB_DM4 D3 DML VSS#A9 B3 C
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
VMB_WDQS0 G3 VSS#G8 J2 VMB_WDQS1 G3 VSS#G8 J2 VMB_WDQS6 G3 VSS#G8 J2 VMB_WDQS7 G3 VSS#G8 J2
VMB_WDQS2 B7 DQSL VSS#J2 J8 VMB_WDQS3 B7 DQSL VSS#J2 J8 VMB_WDQS5 B7 DQSL VSS#J2 J8 VMB_WDQS4 B7 DQSL VSS#J2 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9
<18,19> MEM_RST# RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1
VMB_ZQ1 L8 VSS#T1 T9 VMB_ZQ2 L8 VSS#T1 T9 VMB_ZQ3 L8 VSS#T1 T9 VMB_ZQ4 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R30 VSSQ#B9 D1 R36 VSSQ#B9 D1 R47 VSSQ#B9 D1 R296 VSSQ#B9 D1
*EV@243/F_4 VSSQ#D1 D8 *EV@243/F_4 VSSQ#D1 D8 *EV@243/F_4 VSSQ#D1 D8 *EV@243/F_4 VSSQ#D1 D8
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
*EV@VRAM _DDR3 *EV@VRAM _DDR3 *EV@VRAM _DDR3 *EV@VRAM _DDR3
Group-B1 VREF
Group-B0 VREF
B B
R302 R71 R294 R67

R33 R290 R292 R288 *EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4
*EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4
VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4
VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2
R299 C540 R69 C194 R295 C539 R58 C182

R32 C69 R291 C521 R293 C524 R289 C520
Group-B0 decoupling CAP Group-B1 decoupling CAP

MEM_B0 CLK MEM_B1 CLK
+1.5V_GFX +1.5V_GFX
VMB_CLK1
VMB_CLK0 C42 C40 C44 C41 C113 C24 C43 C103 C600 C582 C201 C105 C104 C102 C577 VMB_CLK1#
VMB_CLK0# *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4
R53 R56
*EV@40.2/F_4 *EV@40.2/F_4
R29 R25
*EV@40.2/F_4 *EV@40.2/F_4 +1.5V_GFX +1.5V_GFX
A C590 C33 C106 C45 C537 C594 C536 C535 C100 C38 C534 C596 C533 C31 C532 A
C157
C48 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@1u/6.3V_4 *EV@0.01u/25V_4
*EV@0.01u/25V_4
+1.5V_GFX +1.5V_GFX
C36 C492 C527 C35 C86 C529 C143 C92 C149 C37 Quanta Computer Inc.
*EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6 *EV@4.7u/6.3V_6
PROJECT : ZQN
A1A
Opal(Jet)_M2/VRAM_B
5 4 3 2 1
1 2 3 4 5 6 7 8
C614 0.1u/10V_4
CRT F1
2 1 D20 SSM22LLPT CRTVDD5 CN6
16
+5V
FUSE_KMC3S110RY/1.1A_1206
6
CRT_R L23 BLM18BB470_6 CRT_R1 L22 BLM18BB470_6 CRT_R2 1 11 CRT_11
<4> CRT_R TP32
7
CRT_G L21 BLM18BB470_6 CRT_G1 L20 BLM18BB470_6 CRT_G2 2 12 DDCDAT_1
<4> CRT_G 8
CRT_B L18 BLM18BB470_6 CRT_B1 L19 BLM18BB470_6 CRT_B2 3 13 CRTHSYNC
<4> CRT_B 9
4 14 CRTVSYNC
R123 R122 R116 C276 C278 C281 10
A C280 C279 C277 5 15 DDCCLK_1 A
150/F_4 150/F_4 150/F_4 3.3p/50V_4 3.3p/50V_4 3.3p/50V_4 *10p/50V_4 *10p/50V_4 *10p/50V_4
CRT_CONN
17
+3V
C619 U25
CRTVDD5 1 16 CRT_VSYNC2 R455 *SHORT_4 CRTVSYNC C608 *0.1u/10V_4 CRTVDD5
0.1u/10V_4 VCC_SYNC SYNC_OUT2 14 CRT_HSYNC2 R456 *SHORT_4 CRTHSYNC
7 SYNC_OUT1 C609 *10p/50V_4 CRTVSYNC
C613 0.22u/25V_6 CRT_BYP 8 VCC_DDC
BYP 15
2 SYNC_IN2 13
VSYNC
HSYNC
VSYNC <4>
C610 *10p/50V_4 CRTHSYNC Power trace tracking
+3V VCC_VIDEO SYNC_IN1 HSYNC <4> DDCCLK_1
C274 *10p/50V_4 <4,5,7,9,10,22,23,24,25,27,28,29,31,32,33,34,35,36,37> +3V
C625 <22,25,26,28,31,35> +5V
CRT_R2 3 10 DDCCLK_R R457 *SHORT_4 DDCCLK C275 *10p/50V_4 DDCDAT_1
CRT_G2 VIDEO_1 DDC_IN1 DDCDATA_R DDCCLK <4> <6,25,26,28,29,30,31,35,37> +3VPCU
0.1u/10V_4 4 11 R458 *SHORT_4 DDCDATA <30,31,32,33,34,35,36,37> VIN
CRT_B2 VIDEO_2 DDC_IN2 DDCDATA <4>
5
VIDEO_3 9 DDCCLK_1 R114 2k/F_4 CRTVDD5
6 DDC_OUT1 12 DDCDAT_1 R115 2k/F_4
GND DDC_OUT2
CM2009-02QR
B
LCD CONNECTOR LCD Power B
+3V
C39 U3
CCD_PWR TP_PWR_R 1u/6.3V_4 6 1 LCDVCC
IN OUT
C513 C514 C510 C509 4 2 C27 C25 C26 C28 C29
IN GND
0.1u/10V_4 0.1u/10V_4 R16 *SHORT_4 APU_DISP_ON_R 3 5 *0.1u/10V_4 *10u/6.3V_6 0.1u/10V_4 0.01u/25V_4 22u/6.3V_8
<4> APU_DISP_ON ON/OFF GND
1000p/50V_4 1000p/50V_4
G5243AT11U
R18
100K_4
EDP_HPD
<4> EDP_HPD
R282
R285 *SHORT_6 Panel_50398
G_5
R286 *SHORT_6 V_BLIGHT
VIN 40
100K_4
39
LCDVCC
38
37
36
Backlight Control +3VPCU
C
35 C
34 R23
R284 *SHORT_6 CCD_PWR 33 *100K_4
+3V +3V 32
R283 *SHORT_6 TP_PWR_R 31 G_4 +3V LID591#
+3V 30 LID591# <26,29>
29
EDP_AUX_C 28 LID591#,EC intrnal PU
R281 100K_4 R17 *100K_4 R287 *SHORT_4 BRIGHT
EDP_AUX#_C <4> APU_DPST_PWM BL_ON 27
R280 *100K_4 R15 100K_4 D1
EDP_HPD 26 R20
25 1N4148WS
EDP_AUX C507 0.1U/16V_4 EDP_AUX_C 24 R19 10K_4
<4> EDP_AUX EDP_AUX# EDP_AUX#_C 23 BL_ON
C505 0.1U/16V_4
<4> EDP_AUX# 22 10K_4
EDP_TX1 EDP_TX1_C 21
3
C503 0.1U/16V_4
<4> EDP_TX1 EDP_TX1# EDP_TX1#_C 20
3
C500 0.1U/16V_4
<4> EDP_TX1# 19
EDP_TX0 C501 0.1U/16V_4 EDP_TX0_C 18 BL# 2 2
<4> EDP_TX0 EDP_TX0# EDP_TX0#_C 17 EC_FPBACK# <29>
C502 0.1U/16V_4
<4> EDP_TX0# 16
3
Q2 Q3
USBP1+ 15 2N7002K DTC144EUA
<5> USBP1+ 14
1
Camera USB <5> USBP1-
USBP1-
13
1
R22 *SHORT_4 APU_BLEN_R 2
12 <4,29> APU_BLEN
USBP3+
<5> USBP3+ 11
Touch Panel <5> USBP3-
USBP3-
10 G_1
Q1
R21 2N7002K
TP_CLK 9
TP1 8
1
TP_DATA 100K_4
TP2 7
<29> TS_Enable TP_INT 6
<5> TP_INT TP_RST# 5
I2C TP3 4
I2C TOUCH
3
D <5> BOARD_ID4 2 D
TOUCH 1
G_0
For Touch or None-Touch CN3

PROJECT : ZQN
1A
CRT/LVDS/CAMERA/LID
1 2 3 4 5 6 7 8
5 4 3 2 1
HDMI HDMI connector EMI
C652 0.1u/10V_4 INT_HDMITX2N_C CN11

<4> INT_HDMITX2N INT_HDMITX2P_C 20 INT_HDMITX2P_C
C653 0.1u/10V_4
<4> INT_HDMITX2P INT_HDMITX2P_C 1 SHELL1
C647 0.1u/10V_4 INT_HDMITX1N_C 2 D2+ R482 *100_4
<4> INT_HDMITX1N INT_HDMITX1P_C INT_HDMITX2N_C D2 Shield
C648 0.1u/10V_4 3
D <4> INT_HDMITX1P INT_HDMITX1P_C 4 D2- INT_HDMITX2N_C D
C649 0.1u/10V_4 INT_HDMITX0N_C 5 D1+
<4> INT_HDMITX0N INT_HDMITX0P_C INT_HDMITX1N_C 6 D1 Shield INT_HDMITX1P_C
C650 0.1u/10V_4
<4> INT_HDMITX0P INT_HDMITX0P_C 7 D1-
C644 0.1u/10V_4 INT_HDMICLK+_C 8 D0+ R480 *100_4
<4> INT_HDMICLK+ INT_HDMICLK-_C INT_HDMITX0N_C 9 D0 Shield 23
C643 0.1u/10V_4
<4> INT_HDMICLK- INT_HDMICLK+_C 10 D0- GND INT_HDMITX1N_C
11 CK+ 22
INT_HDMICLK-_C 12 CK Shield GND INT_HDMITX0P_C
13 CK-
499/F_4 R176 R179 R194 R190 R185 R183 R205 R199
+5V CE Remote
14 R481 *100_4
P/N: CS14992FB24 499/F_4 499/F_4 499/F_4 499/F_4 499/F_4 499/F_4 499/F_4 499/F_4 HDMI_DDCCLK_MB 15 NC
HDMI_DDCDATA_MB 16 DDC CLK INT_HDMITX0N_C
Q13 17 DDC DATA
3 1 HDMI_5V 18 GND INT_HDMICLK+_C
IN OUT HDMI_MB_HPD +5V
3
2 19
GND HP DET 21 R479 *100_4
Q21 AP2331SA-7 C642 D22 SHELL2
2 INT_HDMICLK-_C
+5V *220p/50V_4 *VARS_AZ5125_4 HDMI_CONN
R159
R196 2N7002K 100K_4

1
C
100K/F_4 C
HDMI DDC Bus +5V
+3V
HDMI-detect
2
D8 +3V
RB501V-40 +3V
1
R184
R188 10K_4
R177 R160 10K_4
2
2.2K_4 2.2K_4 HDMI_HPD <4>

Q14
HDMI_DDCCLK_MB
3
1 3
<4> HDMI_DDCCLK_SW
B 2N7002K B
2
3
Q19
+5V 2N7002K
1
+3V HDMI_MB_HPD 2
2
D9
RB501V-40 Q18
2N7002K
1
1
R178 R161
2
2.2K_4 2.2K_4
1
Q15
3 HDMI_DDCDATA_MB Power trace tracking
<4> HDMI_DDCDATA_SW
2N7002K
<4,5,7,9,10,21,23,24,25,27,28,29,31,32,33,34,35,36,37> +3V
<21,25,26,28,31,35> +5V
A A

PROJECT : ZQN
1A
HDMI (PS8101)
5 4 3 2 1
5 4 3 2 1
LAN
XTAL2 C312 12p/50V_4
1
2
Y1
25MHZ +-30PPM
VDD10
3
4
XTAL1
C317 12p/50V_4
R133 2.49K/F_4 RSET
10 mils
+3V
D LANVCC D
R139 *10K_4
2
32
31
30
29
28
27
26
25
U9
3 1 PCIE_REQ_LAN#_R
RSET
<5> PCIE_REQ_LAN#
AVDD33
AVDD10
CKXTAL2
CKXTAL1
LED0
LED1/GPO
LED2(LED1)
33 Q9
GND *2N7002K
+3V
R140 *SHORT_4
MDI_0+ 1 24 R158
MDI_0- MDIP0 REGOUT REGOUT +3V_S5
2 23 VDDREG/VDD33 1K_4
3 MDIN0 VDDREG(VDD33) 22
VDD10 MDI_1+ AVDD10(NC) DVDD10(NC) VDD10 PCIE_LAN_WAKE#_R
4 21 R164 *10K_4
MDI_1- 5 MDIP1 LANWAKEB 20 ISOLATEB
MDI_2+ MDIN1 ISOLATEB
2
6 RTL8111GS-CG 19
MDI_2- 7 MDIP2(NC) PERSTB 18 GPP_TX2N_LAN PCIERST# <5,11,24,27>
C328 0.1U/10V_4
MDIN2(NC) HSON GPP_TX2P_LAN PCIE_RXN2_LAN <3>
VDD10 8 17 C327 0.1U/10V_4 R156
AVDD10 HSOP PCIE_RXP2_LAN <3>
*15K_4 Q11
3 1 PCIE_LAN_WAKE#_R
<5,24> PCIE_LAN_WAKE#
*DTC144EUA
AVDD33(NC)
MDIN3(NC)
REFCLK_N
LANVCC
MDIP3(NC)
REFCLK_P
CLKREQB
R170 *SHORT_4
+3V_S5 LANVCC Consider VCC33 may be connected to Main
HSIN
HSIP
Power or chipset/bios's GPO, the pull-low
resistor R14 can be NC only when Main Power
40 mils (Iout=1A) 40 mils (Iout=1A) or chipset/bios's GPO can ensure to drive the
9
10
11
12
13
14
15
16
R174 *SHORT_8 ISOLATEB pin to a voltage level < 0.8V at the
system state S1~S5.
MDI_3+ If the ISOLATEB pin can not be well-controlled to
C306 C305 MDI_3- a voltage level < 0.8V at S1~S5, the pull-low
0.1U/10V_4 10U/6.3V_6 LANVCC resistor R14 is needed to make sure the LAN
C chip is well isolated. C
CLK_PCIE_LANN <6>
CLK_PCIE_LANP <6>
PCIE_TXN2_LAN <3>
PCIE_TXP2_LAN <3>
PCIE_REQ_LAN#_R
Power trace tracking
<5,6,7,8,24,26,27,28,29,31,36> +3V_S5
<4,5,7,9,10,21,22,24,25,27,28,29,31,32,33,34,35,36,37> +3V
LANVCC
For RTL8111G(S) For RTL8111G(S)
VDDREG/VDD33
RTL8111GS * Place 0.1uF CAP close to each * Place 1uF CAP close to each VDD10 pin-- 22 (reserve)
40 mils (Iout=1A) REGOUT (SWR mode) support VDD10 pin-- 3, 8, 22, 30 VDD10
R171 *SHORT_8
40 mils (Iout=1A) 40 mils (Iout=1A)
C307 C299 C352 C296 40 mils (Iout=1A) C329 C334 L25 4.7uH
0.1U/10V_4 0.1U/10V_4 4.7U/6.3V_6 4.7U/6.3V_6 0.1U/10V_4 4.7U/6.3V_6
C353 C351 C298 C304 C303 C301 C302 C297

4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 1U/6.3V_4 0.1U/10V_4
For RTL8111GS
* Place 0.1uF,4.7uF CAP close to each Remove For Not Using SWR mode
VDD33 pin-- 11, 32 close to Pin23.
B
Transformer B
Layout:All termination
signal should have 30
RJ45 Connector
mil trace
U27 Need Check P/N and F/P
CN9
MDI_0+ 1 TD1+ MX1+ 24 LAN_MX0+
MDI_0- 2 TD1- MX1- 23 LAN_MX0-
TCT 3 TCT1 MCT1 22 LAN_MCT0 R127 75/F_8 LANCT3
4 21 LAN_MCT1 R129 75/F_8 LAN_MX0+ 1

TCT2 MCT2 LAN_MX0- 2
MDI_1+ 5 20 LAN_MX1+ LAN_MX1+ 3 R143 *SHORT_1206
TD2+ MX2+ LAN_MX2+ 4
MDI_1- 6 19 LAN_MX1- LAN_MX2- 5 C290 *0.01u/50V_4
TD2- MX2- LAN_MX1- 6
LAN_MX3+ 7 9 C322 *0.1U/10V_4
LAN_MX3- 8 10
MDI_2+ 7 18 LAN_MX2+ R125 *SHORT_1206
TD3+ MX3+
MDI_2- 8 17 LAN_MX2-
TD3- MX3-
9 16 LAN_MCT2 R131 75/F_8 LGND
TCT3 MCT3
LAN_RJ45
LGND
10 15 LAN_MCT3 R132 75/F_8
TCT4 MCT4
MDI_3+ 11 14 LAN_MX3+
TD4+ MX4+
A MDI_3- 12 13 LAN_MX3- A
TD4- MX4-
C291
0.01u/50V_4 D4
*BS4200N-C_1812
NS692417
C309 R126
1000p/3KV_1808 *1M_8

LGND PROJECT : ZQN
LAN (RTL8111GS) 1A

5 4 3 2 1
5 4 3 2 1
Mini Card 1 (MPC) +WL_VDD +3V

+WL_VDD +1.5V_WLAN
<29> BT_POWERON#
R487 R485
2
10K_4 *10K_4
Q38
DTC144EUA
CN12
1 3 BT_PWRON R486 *SHORT_4 BT_PWRON_R 51 52
CL_RST1#_WLAN 49 Reserved +3.3V 50
TP69 CL_DATA1_WLAN Reserved GND
D PLTRST# R488 *0_4 47 48 D
<5,29> PLTRST# CL_CLK1_WLAN Reserved +1.5V
R489 *0_4 45 46
<6> CLK_LPC_DEBUG 43 Reserved LED_WPAN# 44
41 GND LED_WLAN# 42 +3V +WL_VDD
+WL_VDD +3.3Vaux LED_WWAN#
39 40
37 +3.3Vaux GND 38 R490 *SHORT_8 +WL_VDD
GND USB_D+ USBP7+ <5>
35 36
33 GND USB_D- 34 USBP7- <5>
<3> PCIE_TXP1 PETp0 GND WL_CLK_SDATA
31 32 R476 *0_4 C655 C641 C638 C640
<3> PCIE_TXN1 PETn0 SMB_DATA WL_CLK_SCLK CLK_SDATA <5,9,10>
29 30 R477 *0_4 10u/6.3V_6 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
GND SMB_CLK CLK_SCLK <5,9,10>
27 28
25 GND +1.5V 26
<3> PCIE_RXP1 23 PERp0 GND 24
<3> PCIE_RXN1 PERn0 +3.3Vaux
21 22
GND PERST# RF_EN PCIERST# <5,11,23,27>
19 20
UIM_C4 W_DISABLE# RF_EN <29>
17 18
UIM_C8 GND
15 16 A_LFRAME#_R R478 *0_4
CLK_PCIE_WLAN_C GND UIM_VPP A_LAD3_R LPC_LFRAME# <6,8,29>
R483 *SHORT_4 13 14 R470 *0_4
<6> CLK_PCIE_WLAN CLK_PCIE_WLAN#_C REFCLK+ UIM_RESET A_LAD2_R LPC_LAD3 <6,29>
R484 *SHORT_4 11 12 R471 *0_4 +1.5V
<6> CLK_PCIE_WLAN#
9 REFCLK- UIM_CLK 10 A_LAD1_R R472 *0_4
LPC_LAD2 <6,29> Debug
PCIE_CLKREQ_WLAN#_R GND UIM_DATA A_LAD0_R LPC_LAD1 <6,29>
3 1 7 8 R473 *0_4
<5> PCIE_CLKREQ_WLAN# 5 CLKREQ# UIM_PWR 6 LPC_LAD0 <6,29>
DTC144EUA 3 Reserved +1.5V 4 +1.5V_WLAN R469 *0_6
GND
GND
Q36 1 Reserved GND 2
WAKE# +3.3V C636
MINI-CARD C639 C637
53
54
*1000p/50V_4 *0.1u/10V_4 *10u/6.3V_8
+WL_VDD
C C
2
Q37
DTC144EUA
3 1 PCIE_WAKE#_R
<5,23> PCIE_LAN_WAKE#
2/18 Check DNS parts and power source(+3V or +3V_S5)

TPM USB2I2C
U28
TPM_VDD TPM_VSB C674 1U/10V_4 12 3

VCCD VSSD1 13
VSSD2 16
TP_PWR I2C_PWR VSSD3 17 TP_PWR +3V
VSSA 25
+3V EPAD
R547 *0_4 24 15
VDDD VBUS R519 R520
24
19
10
U8
5
C669 C670 CY7C65211-24TXI *0_4 *SHORT_4

R548 *SHORT_4
VDD3
VDD2
VDD1
VSB
4.7U/6.3V_6 0.1u/10V_4
B 18 B
R541 *IF@4.7K_4 GPIO_0
LPC_LAD3 17 7 R540 *IF@4.7K_4 C678 C677
LPC_LAD2 20 LAD3 PP 6 R138 1 2 *IF@20K_4 I2C_INT# 4
LPC_LAD1 LAD2/SPI_IRQ GPX/GPIO2 TPM_VDD GPIO_8
23 2 5 4.7U/6.3V_6 0.1u/10V_4
LPC_LAD0 LAD1/MOSI GPIO1 TP71 GPIO_9
26 TP72 6 10
LPC_LFRAME# 22 LAD0/MISO 1 GPIO_10 USBDP 11
R130 *0_4 SERIRQ_R 27 LFRAME/SCS GPIO0/XOR_OUT 9 R468 *IF@0_4 PLTRST#_R 1 USBDM
<6,29> SERIRQ SERIRQ GPIO3/BADD SCB_0_GPIO_6
R536 *0_4 21 8 20
<6> PCLK_TPM LCLK/SCLK TEST 21 SCB_0_GPIO_2 7
R542 *NV@10K_4
<28> TP_I2C_SCL SCB_0_GPIO_3 GPIO_11
C293 *10p/50V_4 15 3 22 19
CLKRUN/GPIO04 NC1 <28> TP_I2C_SDA SCB_0_GPIO_4 GPIO_1 USBP2+ <5>
16 12 23 8
LRESET/SPI_RST NC2 SCB_0_GPIO_5 SUSPEND USBP2- <5>
TPM_VDD R538 *NT@10K_4 28 13 2 9
LPCPD NC3 14 SCB_0_GPIO_7 WAKEUP 14
R537 *NT@0_4 NC4 R512 2.2K_4 XRES
<6,28,29> LPC_CLKRUN# I2C_PWR
GND1
GND2
GND3
GND4
R510 2.2K_4
PLTRST# D31 *RB500V-40 PLTRST#_R
D32 *NT@RB500V-40 SP@NPCT620/650_TSSOP28 MCU_65211-24LTXI

<5,28> LPCPD#
4
11
18
25
AL000650K00 : NPCT650AA0WX
AL009655K01 : SNI SLB9655TT1.2 I2C_PWR
+3V +3V For Infineon R553

+3V_S5 For nuvoton Q45 10K_4
A TPM_VSB A
<5,28> TP_I2C_INT# I2C_INT#
R128
TPM_VDD R543 *IF@0_4
+3V
+3V_S5 R544 *NV@0_4 BAT54C
*0_4
C686
C687
R551 *0_4 Quanta Computer Inc.
C313
*0.1U/10V_4
C295
*0.1U/10V_4
C294
*0.1U/10V_4
C311
*0.1U/10V_4
C292
*10u/6.3V_6
*0.1u/10V_4 *10u/6.3V_6
PROJECT : ZQN
1A
Mini-Card/WL/3G/SIM
5 4 3 2 1
5 4 3 2 1
Codec(ADO) Grounding circuit(ADO)

HP-R2
+3VRTC +3VPCU
HP-L2
LINE1-VREFO-L PIN1, PIN4, PIN3, PIN6 are ANALOG R237 R238
LINE1-VREFO-R +1.5V
Q23
MIC2-VREFO *100K_4 100K_4
1 6 SLEEVE
R235
CODEC_VREF C458 2.2u/6.3V_4 2
ADOGND
INT_AMIC-VREFO C457 10u/6.3V_4
D ADOGND D
3
+5VA 4 3 RING2
10u/6.3V_4 C446
1u/10V_4 C450
placed close to codec Q24 *100K_4
R232 100K_4 BSS138-7-F
C452 5
2 R234 10K_4 PCH_AZ_CODEC_RST#
1u/10V_4 C448 ADOGND
2N7002DW
C449
0.1u/10V_4 10u/6.3V_4 C459
*1u/10V_4
+AZA_VDD
1
Place next to pin 26
36
35
34
33
32
31
30
29
28
27
26
25
+1.5VA
U13
ADOGND
VREF
CPVEE
LDO1-CAP
CPVDD
CBN
HP-OUT-R
LINE1-VREFO-R
HP-OUT-L
LINE1-VREFO-L
MIC2-VREFO
AVDD1
AVSS1
C443
D-Mic
C444 +3V
10u/6.3V_4 0.1u/10V_4 +3V
ADOGND 37 24 LINE2-L
CBP LINE2-L T1
C483 *10u/6.3V_4
38 23 LINE2-R C482 0.1u/10V_4 R265
AVSS2 LINE2-R T2
ADOGND *0_4
Place next to pin 40 C442 10u/6.3V_4 39 22 LINE1-L U29
LDO2-CAP LINE1-L 6 1
40 21 VDD GND
Analog AVDD2 LINE1-R
LINE1-R
DMIC_DAT_L 5 2
+5V_PVDD 41 20 DATA CS
Digital +5V L28
PVDD1 NC close to codec DMIC_CLK_L
PBY160808T-600Y-N(60,3A) 4 3
L_SPK+ 42 19 C435 10u/6.3V_4 CLK GND
SPK-L+ MIC1-CAP ADOGND
C415
10u/6.3V_4
C434
0.1u/10V_4
L_SPK- 43
SPK-L-
ALC283 MIC2-R/SLEEVE
18 SLEEVE trace width of SLEEVE & RING2
D-MIC R264
*SHORT_4
R_SPK- 44 17 RING2
are required at least 40mil and
SPK-R- MIC2-L/RING2 its length should be asshort as possible
near Codec R_SPK+ 45 16
SPK-R+ MONO-OUT
46 15 CODEC_JDREF R221 20K/F_4
PVDD2 JDREF ADOGND
Low is power down
GPIO0/DMIC-DATA
amplifier output PD# 47 GPIO1/DMIC-CLK 14
HEADPHONE/MIC/LINE combo (AMP)

C C414 PDB Sense B C
48 13 SENSEA R218 39.2K/F_4 HP_JD#
SDATA-OUT
TP49 SPDIFO/GPIO2 Sense A
LDO3-CAP
0.1u/10V_4
SDATA-IN
DVDD-IO
PCBEEP
RESETB
BIT-CLK
49 Placement near Audio Codec
DVDD
SYNC
DVSS
DGND
Analog
near Codec
Digital
1
10
11
12
DMIC_CLK
C407
FB1/FB2(SLEEVE/RING2) should choose DC resistance

+AZA_VDD
1.6Vrms (Rdc) < 30m-ohm
+3V R207 *SHORT_6
0.1u/10V_4 BEEP_1 to get the best audio performance for HP crosstalk
1
10u/6.3V_4
PCBEEP C396 R202 47K_4 D12 1N4148WS

SPKR <5>
D35 D36
C403 C395 R201 D15 1N4148WS MIC2-VREFO R247 2.2K_4 *VARS/14V_4 *VARS/14V_4
PCBEEP_EC <29>
C409 4.7K_4
2
0.1u/10V_4 10u/6.3V_4 100p/50V_4 R258 2.2K_4
+3V +1.5V SLEEVE_L Combo Jack

SLEEVE L31 BLM15AG121SS1_0.5A_4
close to codec
CN17
Place next to pin 1 RING2 L33 BLM15AG121SS1_0.5A_4 RING2_L 4
PCH_AZ_CODEC_RST# L37 BLM15AG121SS1_0.5A_4 3
PCH_AZ_CODEC_RST# <5>
R208 *0_4 HP-L2 HP-L3 R515 56/F_4 HP-L4 1
DMIC_DAT_L L32 BLM15AG121SS1_0.5A_4
PCH_AZ_CODEC_SYNC <5>
Tied at one point only under HP-R2 HP-R3 R256 56/F_4 HP-R4 2
DMIC_CLK_L R215 DVDD_IO 5
the codec or near the codec 22_4 R203 *SHORT_4
HP_JD# 6 7
R216 *SHORT_4 C399
ACZ_SDIN R214
1
10p/50V_4 33_4 C400 C406 ADO-JACK_2SJ3052-005111F
PCH_AZ_CODEC_SDIN0 <5> C464 C480 C675 C473
R239 *0_4 LINE1-L C676 4.7U/6.3V_6 D19
R241 *0_4 PCH_AZ_CODEC_BITCLK <5> 0.1u/10V_4 10u/6.3V_4 *VARS/14V_4
R261 *0_4 LINE1-VREFO-L R514 4.7K_4 100p/50V_4 100p/50V_4 100p/50V_4 100p/50V_4
2
R518
R233
*0_4
*0_4
need check with C397 22p/50V_4
LINE1-VREFO-R R249 4.7K_4
C465 *1000p/50V_4 DMIC vender PCH_AZ_CODEC_SDOUT <5> Place next to pin 9
LINE1-R C469 4.7U/6.3V_6 ADOGND
C679 *0.1u/10V_4
B B
ADOGND
Cap need near AVDD1

and AVDD2
power source input
Codec PWR 5V(ADO) Mute(ADO) +1.5V

Codec PWR 1.5V(ADO)
+AZA_VDD
R186
*2.2K_4
R210
1K_4
2
DIGITAL ANALOG Q20

*BSS138-7-F
L30 HCB2012KF220T60/6A_8 PD# D23 *RB500V-40 3 1 PCH_AZ_CODEC_RST#
+5V +5VA +1.5VA
U14 R213
3 4 10K_4 DIGITAL ANALOG
IN OUT C410
2 *1u/10V_4
GND C454 C453 D14 RB500V-40 L29 HCB1608KF-121T30_3A_6
AMP_MUTE# <29> +1.5V
1 5 R227 *29.4K/F_4
SHDN SET *10u/6.3V_6 *0.1u/10V_4 C441
*G923-330T1UF
C445 C447 R226 1U/6.3V_4
Internal Speaker
A *10K/F_4 A
*0.1u/10V_4 *10u/6.3V_6 ADOGND
R222 *0_4
close pin3
ADOGND
R_SPK+
40mil for each signal R_SPK+_1
CN16
R496 *SHORT_6
R_SPK- R495 *SHORT_6 R_SPK-_1 4 6
L_SPK- R494 *SHORT_6 L_SPK-_1 3 5
L_SPK+ R497 *SHORT_6 L_SPK+_1 2
1
C666 C665 C664 C680

SPK_CONN_4P Quanta Computer Inc.
*1000P/50V_4 *1000P/50V_4 *1000P/50V_4 *1000P/50V_4 PROJECT : ZQN
Place these EMI components next ALC283/HP/SPK 3B
to codec Date: Tuesday, April 29, 2014 Sheet 25 of 39

5 4 3 2 1
5 4 3 2 1
2.5" SATA HDD SATA ODD

Need Check P/N and F/P
CN13
23
GND23 CN8
D 1 14 D
GND1 2 SATA_TXP0_C C663 0.01u/16V_4 GND14
RXP SATA_TXN0_C SATA_TXP0 <6>
3 C661 0.01u/16V_4 SATA_TXN0 <6> 1
RXN 4 GND1 2 SATA_TXP1_C C635 0.01u/16V_4
GND2 RXP SATA_TXP1 <6>
5 SATA_RXN0_C C660 0.01u/16V_4 3 SATA_TXN1_C C634 0.01u/16V_4
TXN SATA_RXP0_C SATA_RXN0 <6> RXN SATA_TXN1 <6>
6 C659 0.01u/16V_4 4
TXP 7 SATA_RXP0 <6> GND2 5 SATA_RXN1_C C631 0.01u/16V_4
GND3 TXN 6 SATA_RXP1_C SATA_RXN1 <6>
C628 0.01u/16V_4
TXP 7 SATA_RXP1 <6>
8 GND3 +5V
3.3V 9
3.3V 10 8 SATA_DP R459 *1K_4
3.3V 11 DP 9 +5V_ODD R463 *SHORT_8
GND 12 +5V +5V 10
GND 13 +5V 11 C611 C617 C618 C612 C615 C620
60mil
+
GND 14 +5V_HDD R491 *SHORT_8 RSVD 12
5V 15 GND 13 0.01u/25V_4 0.01u/25V_4 *0.1u/10V_4 *0.1u/10V_4 10u/6.3V_6 *100u/6.3V_3528
5V 16 GND
5V 17 C658 C657 C646 C654 C651 + C645 15
GND 18 0.01u/25V_4 0.01u/25V_4 *0.1u/10V_4 *0.1u/10V_4 10u/6.3V_6 100u/6.3V_3528 + C656 GND15
RSVD 19 ODD_C185Q2-11311-L
GND TP70
20 *100u/6.3V_1206
12V 21
12V 22
C 12V C
24
GND24
HDD_CONN
Power Switch Board. Indicitor LED

+5V_S5 +3V_S5
+3VPCU
R521 *1M_4
CN7 R522 *1M_4
B B
1 5 +3V_S5 +5V_S5
2 LED1
<21,29> LID591#
3 1
<29> NBSWON#
4
3 R263 2k/F_4 PWRLED# <29> Power Blue
2
6
4 R260 820_4 SUSLED# <29> SLEEP_AMBER
LED_ORG/BLUE
+5VPCU +3VPCU
PowerB_CONN
R523 *1M_4
R524 *1M_4
+3VPCU +5VPCU
LED2
1 3 R257 2k/F_4 BATLED0# <29> FULLY_BLUE
2 4 R259 820_4 BATLED1# <29> CHARGING_AMBER
LED_ORG/BLUE
A A

PROJECT : ZQN
1A
SATA HDD/LED/SW
5 4 3 2 1
5 4 3 2 1
USB 3.0 Connector HOLE(OTH)

SP4 SP2
USBPWR1 HOLE2 HOLE3 HOLE1 HOLE6 HOLE4 HOLE5 HOLE7 *SPAD-C236 *SPAD-C236
CN14 *HG-C276D118P2 *HG-C276D118P2 *O-ZQN-6 *HG-TC276BC197D118P2*O-ZQN-5 *O-ZQN-2 *HG-C276D118P2
<5> USBP8-
USB3.0_CONN 7 6 7 6 7 6 7 6 7 6 7 6
<5> USBP8+
1 USBP8- RV3 1 2 *VARS_4 8 5 8 5 8 5 8 5 8 5 8 5
2 1 VBUS 9 4 9 4 9 4 9 4 9 4 9 4
USBP8-
2 D-
C461 *1.6P/50V_4 USBP8+ 3 USBP8+ RV4 1 2 *VARS_4
3 D+
1
4
USB30_RX1- 4 GND USB30_RX1-
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
5 RV6 1 2 *VARS_4
<5> USB30_RX1- USB30_RX1+ 5 SSRX-
6
<5> USB30_RX1+ 7 6 SSRX+ USB30_RX1+ RV5 1 2 *VARS_4 SP3
C456 *1.6P/50V_4 C432 0.1u/10V_4 USB30_TX1-_C 8 7 GND *SPAD-C236
C431 0.1u/10V_4 USB30_TX1+_C 9 8 SSTX- HOLE10 HOLE14 HOLE15 HOLE16 HOLE18 HOLE12
D 9 SSTX+ USB30_TX1-_C RV2 1 2 *VARS_4 D
*HG-C276D118P2 *HG-C276D118P2 *HG-C276D118P2 *HG-C276D118P2 *H-TC236BC256D161P2 *O-ZQN-3
13
12
11
10
7 6 7 6 7 6 7 6
USB30_TX1- C433 C428 USB30_TX1+_C RV1 1 2 *VARS_4 8 5 8 5 8 5 8 5
<5> USB30_TX1-
13
12
11
10
USB30_TX1+ *1.6P/50V_4 *1.6P/50V_4 9 4 9 4 9 4 9 4
<5> USB30_TX1+
1
1
2
3
1
2
3
1
2
3
1
2
3
1
SP6 SP7
*SPAD-C236 *SPAD-C236
HOLE20 HOLE21 HOLE22 HOLE17 HOLE19 HOLE8 HOLE9

+5V_S5 USBPWR1 *H-TC236BC256D161P2 *H-TC236BC256D161P2 H-C236D140P2 H-C236D140P2 H-C236D140P2 *h-c102d102n *O-ZQN-1 HOLE23
U12 7 6 H-O102X165D102X165N
8 5
1
5 1 9 4
IN OUT
C405 2 C401 C402 C412 HOLE24 SP1
GND
1
2
3
*H-O91X114D91X114N *SPAD-C236
1
1u/6.3V_4 4 3
/EN /OC
470p/50V_4 0.1u/10V_4 100u/6.3V_1206
G524D2T11U
1
<29> USBON#
<5> USB_OC1#
G524D2T11U: Enable: Low Active /OCP 1.5A
USB D/B Card Reader and Connector

DVDD
C C
C684 68p/50V_4
DVDD
C668 0.1u/10V_4
R246 *SHORT_4
+5V_S5 VCC_XD PCIERST# <5,11,23,24> R244
CN18 *1K_4
1
2 15
3 RSTZ
SD_CDZ
VCC_XD
4 C460
DVDD
5
RSTZ
USBON# C462 0.1u/10V_4
6 4.7U/6.3V_6
<5> USB_OC2# 7 C467
8 R248
*0.1u/10V_4
24
23
22
21
20
19
<5> USBP5- 9 U15 *100K_4
D/B USB Port <5> USBP5+ 10
RSTZ
SD_CDZ
PMOS
DVDD
DVDD
GPIO0
11 C662 0.1u/10V_4
<5> USBP0- 12
D/B USB Port <5> USBP0+ 13 16
DVDD 1 18 VDD18
14 2 DVDD VDD18 17 SD_D2/MS_D5
<5> USBP6- DM SB13 SD_D3/MS_D4
<5> USBP6+ 3 16 C472 C683
4 DP SB12 15 SD_CMD
USB_DB_Conn
AVDD
5 AVDD GL834L SD_CMD 14 SD_CLK 0.1u/10V_4 68p/50V_4
6 MS_INS QFN24-3.3V SD_CLK 13 SD_D0/MS_D6
SB0 SB9
MS_BS
2
C685 C455 C451
SB1
SB3
SB4
SB5
SB8
R242 *SHORT_6
+3V DVDD
25
68p/50V_4 0.1u/10V_4 2.2u/6.3V_6
1
GL834L
25
7
8
9
10
11
12
C463
C667
10u/6.3V_6 4.7u/10V_6
B B
SD_D1/MS_D7
DVDD AVDD
SD_WP/MS_D1 L36
BLM18PG121_6
SD/MMC CARD READER (MMC)
EMI +3V_S5 SD_CLK_R

CN2 SD_CMD_R
SD_WP/MS_D1 R255 *SHORT_4 SD_WP_R 11 SD_DATA2_R
SD_CDZ R240 *SHORT_4 SD_CD#_R 10 W/P SD_DATA1_R R250
SD_D2/MS_D5 R254 90.9/F_4 SD_DATA2_R 9 CARD/DET SD_DATA0_R
*330_4
SD_D1/MS_D7 R243 90.9/F_4 SD_DATA1_R 8 DATA2 SD_DATA3_R
SD_D0/MS_D6 R245 90.9/F_4 SD_DATA0_R 7 DATA1
C314 C378 C300 C195 C362 6 DATA0 C470 C471 C477 C466 C468 C476
SD_CLK R251 90.9/F_4 SD_CLK_R 5 VSS2
*1000p/50V_4 *1000p/50V_4 *1000p/50V_4 *1000p/50V_4 1000p/50V_4
4 CLK *10p/50V_4 *10p/50V_4 *10p/50V_4 *10p/50V_4 *10p/50V_4 *10p/50V_4
VCC_XD VDD
3
SD_CMD R252 90.9/F_4 SD_CMD_R 2 VSS1
GND
GND
GND
SD_D3/MS_D4 R253 90.9/F_4 SD_DATA3_R 1 CMD GND

CD/DATA3
A SD-CARD A
12
13
14
15
C474
+3V +5VPCU C475
VARS_0.2pF/5V_4
VARS_0.2pF/5V_4
VARS_0.2pF/5V_4
VARS_0.2pF/5V_4
VARS_0.2pF/5V_4
VARS_0.2pF/5V_4
VARS_0.2pF/5V_4
VARS_0.2pF/5V_4
+3V +VDDNB_CORE *4.7u/6.3V_6 0.1u/10V_4

C233
C244 C364
0.1u/10V_4 0.1u/10V_4
0.1u/10V_4
T3
T4
T5
T6
T7
T8
T9

T10
PROJECT : ZQN
1A
USB Port/ DB
5 4 3 2 1
5 4 3 2 1
KEYBOARD (KBC) CPU FAN CTRL(THM) +3V

<EMI>
MX7 1 2 +5V
CN15 MX6 3 4 CP5 +3VPCU R460
1 MY0 MX5 5 6 *220p_8P4R
2 MY0 <29> 7 8
MY1 MX4 10K_4
MY1 <29>
3 MY2 RP1
MY2 <29>
2
4 MY3 MY3 1 2 10 1 MX3 C621
MY3 <29> <29> FANSIG
5 MY4 MY2 3 4 CP1 MX4 9 2 MX2
6 MY4 <29> 5 6 8 3
D MY5
MY5 <29>
MY1 *220p_8P4R MX5 MX1 2.2u/6.3V_6 U26 30mils CN5 D
1
7 MY6 MY0 7 8 MX6 7 4 MX0 2 3 TH_FAN_POW ER
MY6 <29> VIN VO 1 4
8 MY7 MX7 6 5 5
9 MY7 <29> 1 2 1 GND 6 2
MY8 MY7
MY8 <29> <4> THERM_ALERT# /FON GND 3 5
2
10 MY9 MY6 3 4 CP2 *10K_10P8R 7 C623 C622 C624
11 MY9 <29> 5 6 4 GND 8
MY10 MY5 *220p_8P4R FAN_3P
12 MY10 <29> 7 8 <29> CPUFAN# VSET GND
MY11 MY4 2.2u/6.3V_6 0.01u/16V_4*0.01u/50V_4
MY11 <29>
1
13 MY12 G991P11U
14 MY12 <29> 1 2
MY13 MY8
MY13 <29>
15 MY14 MY9 3 4 CP3
16 MY15
MY14 <29>
MY10 5 6 *220p_8P4R
FANPWR = 1.6*VSET
17 MY15 <29> 7 8
MY16 MY11
MY16 <29>
18 MY17
19 MY17 <29> 1 2
MX7 MX3
MX7 <29>
20 MX6 MX2 3 4
21
22
MX5
MX4
MX6
MX5
MX4
<29>
<29>
<29>
MX1
MX0
5
7
6
8
CP6
*220p_8P4R
Keyboard Backlight
23 MX3
27 24 MX3 <29> 1 2
MX2 MY12 Q26
MX2 <29>
28 25 MX1 MY13 3 4 CP4 *AO3413 CN19
26 MX1 <29> 5 6 1 3
MX0 MY14 *220p_8P4R +5V VKBL
MX0 <29> 7 8 4 6
MY15
KB_CONN 3 5
MY16 C478 *220p/50V_4 2
1
2
MY17 C479 *220p/50V_4 C481
R262 *100K_4 *0.1u/10V_4 *KBL_CONN_4P
C C
3
Q25
2
<29> KEY_BL_EN
*2N7002K
1
TP_PW R
Power Domain change
03/28 install and change to 10k LPC Power down
TP_PW R +3V_S5
R535 R534
Q43 2.2K_4 2.2K_4
5
R230
R228 *2.2K_4 4 3 TP_I2C_SC +3V_S5
<24> TP_I2C_SCL
10K_4
2
2
Q22
TP_I2C_INT# 1 3 1 6 TP_I2C_SD
B TPD_INT# <29> <24> TP_I2C_SDA B
R155
*2N7002K R157 22K/F_4
2N7002KDW *100K_4
LPCPD#
LPCPD#
R224 *SHORT_4 03/17 short Pad R532 *0_4
3
R533 *0_4
<5,24>
SYS_PW RGD_Q 2
TOUCH PAD(TPD) TP_PW R
3
R549 *0_4
Q8
I2C HID =>ELAN0501 *2N7002K
Q44
1
I2C CID =>ELAN0000 2 Q12
AO3413 I2C bus address =>0x15 <5,8> SYS_PW RGD
I2C High/Low active? =>Active Low
PS2 HID =>ETD050A *FDV301N
TP_PW R 1 3
+3V_S5 PS2 CID =>PNP0F13
3
1
Elan VIDElan PID
R550 C673 0x04F30x0400
2
0.1u/10V_4 2
<6,24,29> LPC_CLKRUN#
100K_4
R505 R507
Q7
10K_4 10K_4 CN20 *2N7002K
<29> TP_PW R_EN#
1
40mil 1 10
A R506 *SHORT_4 TPCLK_CN 2 9 A
<29> TPCLK TPDATA_CN 3
R504 *SHORT_4
<29> TPDATA 4
C672 *10p/50V_4 R502 *0_4 5
<5> TP_SMDATA 6
C671 *10p/50V_4 SMABUS R500 *0_4
<5>
<5,24>
TP_SMCLK
TP_I2C_INT#
7
8
<29> TPD_EN
TP_I2C_SD TP_CONN
PROJECT : ZQN
TP_I2C_SC
I2C Size Document Number Rev
1A
KB/TP/FAN
5 4 3 2 1
5 4 3 2 1
L27 External PU(KBC) +3VPCU

EC(KBC)
+A3VPCU
EMI FILTER FCM1608KF-121T04(120,0.4A) +3VPCU_ECPLL L24
+3VPCU_EC
C377 EMI FILTER FCM1608KF-121T04(120,0.4A) MBCLK R149 4.7K_4
0.1u/10V_4 C319 (For PLL Power) MBDATA R148 4.7K_4
ECAGND 12 mils 0.1u/10V_4

+3VRTC
R204
1
2.2_6
2
12 mils +3VPCU_EC C331
HWPG
SUSC#
+3V_S5
+3VPCU SUSC# <5> 2ND_MBCLK
SUSB# R147 4.7K_4
SUSB# <5,8> 2ND_MBDATA
C379 C320 C382 C321 C404 C354 0.1u/10V_4 R146 4.7K_4
+3VPCU_EC and +3V_RTC
D 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 D
minimum trace width 12mils. TP_PWR_EN# <28>
USB_CHG_MODE TP36
USB_EC_ON TP40
R172 *SHORT_6 +3V_EC +3VPCU
+3V LPC_CLKRUN# <6,24,28>
C356 R168 8.2K/F_4 +3V S5_ON R153 10K_4
0.1u/10V_4
114
121
127
NBSWON# R144 10K_4
11
26
50
92
74
84
83
82
19
20
99
98
97
96
93
3
U11
10 110 MBCLK
<6,24> LPC_LAD0 MBCLK <30>
VCC
AVCC
WUI42/GPH6/ID6(Dn)
WUI41/GPH5/ID5(Dn)
WUI40/GPH4/ID4(Dn)
WUI19/GPH3/ID3(Dn)
CLKRUN#/WUI16/GPH0/ID0(Dn)
EGCLK/WUI27/GPE3(Dn)
EGCS#/WUI26/GPE2(Dn)
EGAD/WUI25/GPE1(Dn)
L80HLAT/BAO/WUI24/GPE0(Dn)
L80LLAT/WUI7/GPE7(Up)
VBAT
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
9 LAD0/GPM0(X) SMCLK0/GPB3(X) 111 MBDATA
<6,24> LPC_LAD1 LAD1/GPM1(X) SMDAT0/GPB4(X) 2ND_MBCLK MBDATA <30>
8 115
<6,24> LPC_LAD2 LAD2/GPM2(X) SMCLK1/GPC1(X) 2ND_MBDATA 2ND_MBCLK <4,12>
7 116 +3V_S5
<6,24> LPC_LAD3 LAD3/GPM3(X) SMDAT1/GPC2(X) 2ND_MBDATA <4,12>
PLTRST# 22 117
+3VPCU <5,24> PLTRST# CLK_PCI_775 13 LPCRST#/WUI4/GPD2(Up) PECI/SMCLK2/WUI22/GPF6(Up) 118 SIO_EXT_SMI# R182 *10K_4
SM BUS
<6> CLK_PCI_775 6 LPCCLK/GPM4(X) SMDAT2/WUI23/GPF7(Up) EC_FPBACK# <21> SIO_EXT_SCI# R189 *10K_4
<6,8,24> LPC_LFRAME# LFRAME#/GPM5(X) 85 R529 100K_4
PROCHOT_EC 17 PS2CLK0/TMB0/CEC/GPF0(Up) 86 DNBSWON# R145 10K_4
LPCPD#/WUI6/GPE6(Dn) PS2DAT0/TMB1/GPF1(Up) LID591# <21,26>
2
89
SIO_A20GATE PS2CLK2/WUI20/GPF4(Up) TPCLK <28> +3V
D10 126 90
<5> SIO_A20GATE GA20/GPB5(X) PS2DAT2/WUI21/GPF5(Up) TPDATA <28>
PS/2
R173 SDMK0340L-7-F SERIRQ 5
<6,24> SERIRQ SIO_EXT_SMI# SERIRQ/GPM6(X)
100K_4 15 KBRST# R166 10K_4
<5> SIO_EXT_SMI# SIO_EXT_SCI# ECSMI#/GPD4(Up)
23
ECSCI#/GPD3(Up) LPC
SERIRQ R165 *10K_4
<5> SIO_EXT_SCI#
1
WRST# 14 GPIO MAINON R180 100K_4

4 WRST# VRON R195 100K_4
<5> KBRST# 16 KBRST#/GPB6(X) PLTRST# R187 100K_4
C363 PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT
1u/6.3V_4 24
PWM0/GPA0(Up) PWRLED# <26>
IT8587
25
PWM1/GPA1(Up) BATLED1# <26>
28
PWM2/GPA2(Up) SUSLED# <26>
119 29
C <4,21> APU_BLEN CRX0/GPC0(Dn) PWM3/GPA3(Up) BATLED0# <26> C
123 CIR 30
<32> SUSON CTX0/TMA0/GPB2(Dn) PWM4/GPA4(Up) 31
PWM5/GPA5(Up)
CLK_PCI_775
PWM
80
<24>
<32,35> MAINON
BT_POWERON#
BT_POWERON 104
33
DAC4/DCD0#/GPJ4(X)
DSR0#/GPG6(X) TACH0A/GPD6(Dn)
47
48
FANSIG
FANSIG <28>
ProcHOT
<8> PWROK_EC KEY_BL_EN GINT/CTS0#/GPD5(Up) TACH1A/TMA1/GPD7(Dn)
88
<28> KEY_BL_EN PS2DAT1/RTS0#/GPF3(Up) CORE_PWM_PROCHOT# <4,5,34>
R175 CPUFAN# 81 120 DNBSWON#
<28> CPUFAN# TPD_EN DAC5/RIG0#/GPJ5(X) TMRI0/WUI2/GPC4(Dn) DNBSWON# <5>
3
87 124
<28> TPD_EN PS2CLK1/DTR0#/GPF2(Up) TMRI1/WUI3/GPC6(Dn)
*22_4 109 Q17
108 TXD/SOUT0/GPB1(Up)
<25> AMP_MUTE# RXD/SIN0/GPB0(Up) PROCHOT_EC 2
71 125 NBSWON#
72 ADC5/DCD1#/WUI29/GPI5(X) PWRSW/GPE4(Up) 18 dGPU_OPP# NBSWON# <26>
C361
<30> ACIN TEMP_MBAT ADC6/DSR1#/WUI30/GPI6(X) UART port RI1#/WUI0/GPD0(Up)
*10p/50V_4 73 21 TP44 R181 2N7002K
<30> TEMP_MBAT 35 ADC7/CTS1#/WUI31/GPI7(X) RI2#/WUI1/GPD1(Up)
<21> TS_Enable RTS1#/WUI5/GPE5(Dn) WAKE UP
1
34 100K_4
<25> PCBEEP_EC PWM7/RIG1#/GPA7(Up) PCH_RSMRST#
107 112
<30> D/C# DTR1#/SBUSY/GPG1/ID7(Dn) RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn) PCH_RSMRST# <5>
95
94 CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)
CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)
R136 *SHORT_4 PCH_SPI_CLK_EC 105
<6> SPI_SCK SPI_CS0#_UR_ME 101 FSCK/GPG7
R152 *SHORT_4
<6> SPI_CS PCH_SPI_SO_EC 102 FSCE#/GPG3 RF_EN <24>
R137 *SHORT_4 EXTERNAL SERIAL FLASH ICM
<6>
<6>
SPI_SDO
SPI_SDI
R150 *SHORT_4 PCH_SPI_SI_EC 103 FMOSI/GPG4
FMISO/GPG5 ADC0/GPI0(X)
66
67
ICM <30>
HWPG(KBC) +3V
C393 10u/6.3V_6 ECAGND
MY16 56 ADC1/GPI1(X) 68
<28> MY16 KSO16/SMOSI/GPC3(Dn) ADC2/GPI2(X) TPD_INT# <28>
MY17 57 69 VRON R193 *SHORT_4 R212
<28> MY17 KSO17/SMISO/GPC5(Dn) ADC3/GPI3(X) FB_CLAMP_REQ# VDDA_PWRGD <34>
32 70
PWM6/SSCK/GPA6(Up) ADC4/WUI28/GPI4(X) TP46
S5_ON 100
<31,33,35> S5_ON SSCE0#/GPG2(X) A/D D/A 10K_4
B 106 SPI ENABLE D13 1N4148WS HWPG B
SSCE1#/GPG0(X) 76 <34> VRM_PWRGD HWPG <8>
36 TACH2/GPJ0(X) 77 dGPU_FB_CLAMP DGPU_AC_DC# <12>
D16 1N4148WS
<28> MY0 KSO0/PD0 GPJ1(X) <35> HWPG_1.8VS5
37 78 TP43
<28> MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(X)
38 79 D18 1N4148WS
<28> MY2 KSO2/PD2 DAC3/TACH1B/GPJ3(X) USBON# <27> <32> HWPG_1.5V
39
<28> MY3 KSO3/PD3
40 KBMX D11 1N4148WS
<28> MY4 KSO4/PD4 <33> HWPG_0.95VS5
41
<28> MY5 KSO5/PD5
42 D17 1N4148WS
<28> MY6 KSO6/PD6 <31> SYS_HWPG
43
<28> MY7 44 KSO7/PD7
<28> MY8 45 KSO8/ACK#
<28> MY9 46 KSO9/BUSY
<28> MY10 KSO10/PE
51 2
<28> MY11
Power sequence
KSI3/SLIN#
KSO11/ERR# CK32KE/GPJ7
KSI0/STB#
KSI1/AFD#
KSI2/INIT#
52 128 R154 *SHORT_4

<28> MY12 KSO12/SLCT CK32K/GPJ6
53
VCORE
<28> MY13 KSO13

AVSS
54 CLOCK
KSI4
KSI5
KSI6
KSI7
<28> MY14
VSS
VSS
VSS
VSS
VSS
VSS
55 KSO14 NBSWON#
<28> MY15 KSO15 TP37
IT8587E/FX DNBSWON# TP39 SW1
58
59
60
61
62
63
64
65
27
49
91
113
122
75
12
*TME-532W-Q-T/R(439)
SUSON TP38
<28> MX0
C355 SUSB# TP41 1 2 NBSWON#
<28> MX1
ECAGND
<28> MX2 PWROK_EC

0.1u/10V_4
<28> MX3 SM BUS ARRANGEMENT TABLE TP48
<28> MX4
PLTRST# 3 4
<28> MX5 TP45
<28> MX6 SM Bus 1 Battery
L26 HWPG TP47
<28> MX7
5
EMI FILTER FCM1608KF-121T04(120,0.4A)
SM Bus 2 PCH/VGA MAINON TP42
A PCH_RSMRST# A
TP33
SM Bus 3 N/A
S5_ON
TP35
SM Bus 4

PROJECT : ZQN
1A
WPCE885 & FLASH
5 4 3 2 1
5 4 3 2 1
VA2 PR27
VA1 PQ6 PD3 0.02/F_0612 PQ3
AOL1413 SBR1045SP5-13 VIN AOL1413
CN4
1 1 1
2 5 3 2 5
1 3 2 3
2 PR16
3
1
*SHORT_4
4 PC36 PC37 PC13 PR12 24737_ACN PC23 PC18 PR23
4
0.1u/50V_6 2200p/50V_4 0.1u/50V_6 220K/F_4 PR19 0.1u/50V_6 2200p/50V_4 33K/F_4
DC-IN PC35 PD4 *SHORT_4
0.1u/50V_6 P4SMAFJ20A 24737_ACP
2
D D
1 6
PR5 2 5 PR24
D/C# <29>
recommend 200mA at least. 220K/F_4 10K_4
3 4
PQ2
3
PD2 IMD2AT108
1N4148WS
2
24737_ACP
PQ5
2N7002K
24737_ACN
1
PC22 PC20 PC107
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6
PR18
63.4K/F_4
VIN
1
PR15 PC2
ACP
ACN
10K/F_4 1u/16V_6
+3VPCU +3VPCU 24737_ACDET 6 16 24737_REGN
ACDET REGN
C C
PD1
24737_VCC 20 RB500V-40 PC3 PC19
PR155 PR25 VCC 2200p/50V_4 4.7u/25V_6
100K_4 100K_4 PR22
20_1206 PC103 17 24737_BST
BTST
5
0.47u/25V_6
<29> ACIN
PC14
3
47n/50V_6
PQ4
18 24737_DH 4 MDV1528
2 5 HIDRV
ACOK#
PQ1 19 24707_LX
PHASE
3
2
1
2N7002K PR154
0.01/F_0612
1
MBDATA 8 PU8 PL1

SDA BQ24737RGRR 6.8uH_7X7X3
15 24737_DL
LCDRV
MBCLK 9
SCL
5
+3VPCU PR2
14
PGND 2.2/F_6 24737_SRP
PR153 10K_4 24737_BM# 11 4
BM# PQ32 BAT-V
MDV1528
B 24737_CMPOUT B
BAT-V PR156 *10K_4 3 PR227 10/F_6 PC8 PC4 PC104 PC105
CMPOUT
3
2
1
13 24737_SRP 0.1u/25V_4 PC9 2200p/50V_4 10u/25V_8 10u/25V_8
SRP 2200p/50V_6
PC11 PR1 316K/F_4 24737_ILIM 10 PC101
PJ1 ILIM 0.1u/25V_4 BAT-V
0.1u/50V_6
PR228 7.5_6
10 1 PR7 24737_CMPIN 4 12 BAT-V
2 BATT_EN# 100_4 CMPIN SRN PC7 PC174 PC175
3 TEMP_MBAT 0.1u/25V_4
IOUT
GND
GND
GND
GND
GND
4 MBCLK_R TEMP_MBAT <29>
1000p/50V_4 0.01u/25V_4
5 MBDATA_R
6 PR8 PR245 PR17
7
21
22
23
24
25
1M_4 *100K_4 *100K_4
9 8
+3VPCU
PC5 PC1
C114F3-108A1-L_Batt_CONN *47p/50V_4 *47p/50V_4
+3V
PR11 PC6
03/17 short Pad 100K/F_4 0.01u/25V_4
REGN MAX voltage 6.5V
3
PR6 PR247
*SHORT_4 PR4 PR3
100_4 100_4 PR246
*100K_4 V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
24737_BM# 2 PR244
REV:A 上件, MBCLK <29>
*1.62K/F_4
*0_4
=0.793V for 3.965A current limit
CORE_PWM_PROCHOT# [4,5,30,35]
PQ72
REV:B有外殼改不上件
3
MBDATA <29> *2N7002K
ICM
Pin10 ILIM=0.793V
<29> ICM
Rsr = 0.01ohm
1
A A
PU1 24737_CMPOUT 2
CM1293A-04SO
1 6 MBDATA PQ71
CH1 CH4 *2N7002K
2 5 PC12
VN VP +3VPCU
1
100p/50V_4
TEMP_MBAT 3 4 MBCLK
CH2 CH3
PROJECT :
Add ESD diode base on EC FAE suggestion Size Document Number Rev
1A
Charger(BQ24737RGRR)
5 4 3 2 1
5 4 3 2 1
MAIND SYS_SHDN#
MAIND <32,33,35> SYS_SHDN# <12,35,36>
PR117 *SHORT_6
+3VPCU VL 3V_LDO
PR224
10K/F_4
<29> SYS_HWPG
VIN VIN
D D
SYS_SHDN#
10u/6.3V_6
0.1u/25V_4
4.7u/6.3V_6
1
+
PC168 PC166 PC167 PC162 PC161
33u/25V_6x4.5 4.7u/25V_6 2200p/50V_4 PR223 PR122 PR120 2200p/50V_4 4.7u/25V_6
2
*SHORT_4 *SHORT_4 *100K/F_4
PC80
PC81
51225_VIN
PC165
+5VPCU
5
+3VPCU
5
+5VPCU PQ49 +3VPCU
5 Volt +/- 5% MDV1528 3.3 Volt +/- 5%
13
12
3
4
TDC : 6.2A PQ51 4 TDC : 5.1A
VREG5
VREG3
VIN
PEAK : 8.3A MDV1528
7 6 SYS_SHDN# PEAK : 6.8A
OCP : 10A PGOOD EN2
OCP : 9A
3
2
1
51225_EN1 51225_DH2
1
2
3
20 10
Width : 260mil EN1 DRVH2 PR118 PC84 Width : 220mil
PL10 51225_DH1 16 9 51225_VBST2 PL9
3.3uH_7X7X3 PC83 PR119 DRVH1 VBST2 3.3uH_7X7X3
51225_VBST1 17 8 51225_SW2 1/F_6 0.1u/50V_6
VBST1 PU6 SW2
0.1u/50V_6 1/F_6 51225_SW1 18 TPS51225RUKR 11 51225_DL2
SW1 DRVL2
5
PR123 51225_DL1 15 4 51225_FB2 PR225
15.4K/F_4 DRVL1 VFB2 PQ48 PR116 6.49K/F_4
PQ50 51225_FB1 2 21 MDV1595S
PR121 MDV1595S 4 VFB1 GND 4 2.2/F_6
+ +
C 2.2/F_6 14 22 C
PC160 PC79 VO1 GND PC159 PC158
VCLK
GND
GND
GND
GND
CS1
CS2
220u/6.3V_6X4.2 0.1u/50V_6 0.1u/50V_6 220u/6.3V_6X4.2
1
2
3
3
2
1
PC78
PR124 2200p/50V_6 PR125
19
26
25
24
23
10K/F_4 PC82 10K/F_4
2200p/50V_6
51225_CS1
51225_CS2
51225_VCLK
OCP:9A
100K/F_4
100K/F_4
PC87
L(ripple current)
2 0.1u/50V_6 =(9-3.3)*3.3/(3.3u*0.355M*9)
PD6
3
PR128 *SHORT_6 ~1.784A
1PS302
OCP:10A Iocp=9-(1.784/2)=8.108A
1 Vth=(8.108A*14mOhm)+1mV=114.512mV
L(ripple current) PC88 PR127 *SHORT_6 R(Ilim)=(114.512mV*8)/10uA
PR226
PR126
=(9-5)*5/(3.3u*0.3M*9) 0.1u/50V_6 =91.609K
=2.244A 2
+5VPCU +3VPCU +3VPCU
Iocp=10-(2.244/2)=8.877A PD5
Vth=(8.877A*14mOhm)+1mV=125.287mV 1PS302 3 PC86
R(Ilim)=(125.287mV*8)/10uA 1
0.1u/50V_6
5
~100.23K
3
+15V_ALWP
+15V
B PR129 MAIND 4 MAIND 2 S5D 2 B
22_8 PC85 PQ22
0.1u/50V_6 MDV1528Q
PQ15 PQ21
3
2
1
AO3404 AO3404
1
+5V +3V +3V_S5
TDC : 3.2A TDC : 1.8A TDC : 0.3A

PEAK : 4.3A PEAK : 2.4A PEAK : 0.4A
Width : 140mil Width : 80mil Width : 20mil
VIN +3V_S5 +5V_S5 +15V VIN +5VPCU VIN +1.5V_SUS VIN BOT
TOP
PC178 1000p/50V_4 PC186 1000p/50V_4 PC192 1000p/50V_4
PR110 PR115 PR114 PR113 PR112
5
1M_6 22_8 22_8 1M_6 *1M_6 PC179 0.1u/25V_4 PC187 0.1u/25V_4 PC193 0.1u/25V_4
VIN +3VPCU
+1.5V_SUS
S5D 4
PQ23 PC180 1000p/50V_4 PC188 1000p/50V_4
3
MDV1528Q PC194 1000p/50V_4

PC181 0.1u/25V_4 PC189 0.1u/25V_4
3
2
1
2 PC195 0.1u/25V_4
<29,33,35> S5_ON VIN
A 2 2 2 A
+5V_S5
PR111 PQ20 PQ19 PQ18 PC77
1
PQ17 1M_6 2N7002K 2N7002K 2N7002K *2200p/50V_4 PC182 1000p/50V_4

DTC144EUA
TDC : 3A
1
PC183 0.1u/25V_4
PEAK : 4A
Width : 120mil +3VPCU Quanta Computer Inc.
PC184 1000p/50V_4 PROJECT :
PC185 0.1u/25V_4 1A
SYSTEM 5V/3V (TPS51225)
5 4 3 2 1
5 4 3 2 1
TDC : 0.75A +SMDDR_VTT

PEAK : 1A +1.5V_SUS
Width : 40mil
3
PC99 PC94
10u/6.3V_6 10u/6.3V_6
TDC : 0.64A
D TDC : 0.38A 2 PEAK : 0.85A D
<31,33,35> MAIND
PEAK : 0.5A +SMDDR_VREF
Width : 20mil
Width : 20mil PQ24
AO3404
1
Greater than or equal 40mil
PC92
+1.5V
0.22u/10V_4
+5V_S5
+3V
PC96 PC95
10u/6.3V_6 1u/10V_4
22
21
2
PR137
VIN
100K/F_4
VTTREF
VTT
PAD
PAD
VTTGND
VLDOIN
VTTSNS
5
20 12 PC169 PC93
<29> HWPG_1.5V PGOOD V5IN
C
2200p/50V_4 4.7u/25V_6 C
51216_S3 17 14 51216_DRVH 4
<29,35> MAINON S3 DRVH
PR144 *SHORT_4 PR138 PC98
2_6 0.1u/50V_6 PQ53
1
2
3
51216_S5 16 15 51216_VBST AON6414AL
<29> SUSON S5 VBST
PR143 *SHORT_4 PU7
TPS51216RUKR PL11
51216_MODE 19 13 51216_SW +1.5V_SUS
PR141 200K/F_4 MODE SW 0.68uH_7X7X3
51216_TRIP 18 11 51216_DRVL
TRIP DRVL
5
PR140 53.6K/F_4 PR134
+1.5V_SUS
VDDQSNS
26
PAD PGND
10 *2.2/F_6 1.5 Volt +/- 5%
REFIN
4
TDC : 10.42A
GND
PAD
PAD
PAD
REF
+
PQ52 PC163 PC164
PEAK : 13.85A
1
2
3
VREF=1.8V AON6756 PC97 0.1u/50V_6 330u/2.5V_6X4.2
OCP : 18A
6
25
24
23
7 *2200p/50V_6
51216_REF PR145 *SHORT_6 Width : 415mil
51216_REFIN
RDSon=4.3mohm
B PC90 B
51216_S3 PR139 51216_S5 0.1u/10V_4
*0_4 PC91 PR132
PR133 *0.1u/50V_6 *SHORT_4
10K/F_4
PR130
SUSON PR142 *100_4
100K_4 VDDIO_MEM_S_SENSE_PR
VDDIO_MEM_S_SENSE <4>
PR131 PC89
51K/F_4 0.01u/25V_4 Mode Frequency Discharge mode
200K 400K Tracking Discharge

OCP=18A
L ripple current 100K 300K Tracking Discharge
=(19-1.5)*1.5/(0.68u*400k*19)
=5.079A
Vtrip=18-(5.079/2)*4.3mohm
A
=0.06647V S3 S5 +1.35VSUS REF VTT A
Rlimit=0.06647/10uA*8~53.183Kohm
S0 1 1 ON ON ON
S3 (mainon off) 0 1 ON ON OFF PROJECT :
S4/S5 0 0 OFF OFF OFF DDR 1.5V(TPS51216) 1A

5 4 3 2 1
5 4 3 2 1
VIN
D D
+5VPCU
PC76 PC75
2200p/50V_4 4.7u/25V_6
+3V
PC73
1u/10V_4
5
PR103
100K/F_4
7
PQ16
MDV1528
V5IN
51211V_DRVH 4
1 9 PR109 PC74 +0.95V_S5
<29> HWPG_0.95VS5 PGOOD DRVH *SHORT_6 0.1u/50V_6
PR101 *SHORT_4 3 10 51211V_VBST PL8
<29,31,35> S5_ON EN VBST
3
2
1
2.2uH_7X7X3
2 PU5 8 51211V_SW
PR218 73.2K/F_4 TRIP TPS51211DSCR SW
PR217 5 6 51211V_DRVL
*100K/F_4 PR108 464K/F_4 TST DRVL
5
12 11
C GND GND
PR222
PR104 PC68 PC155
+
PC156 +0.95V_S5 C
GND
GND
GND
GND
*2.2/F_6 *0.1u/50V_6 0.1u/50V_6 330u/2.5V_6X4.2 0.95 Volt +/- 5%
FB
*SHORT_4
4 TDC : 3.9A
13
14
15
16
4
51211V_FB PEAK : 5.2A
PQ47 PC157 OCP : 7A
3
2
1
VFB=0.7V MDV1595S *2200p/50V_6
Width : 160mil
PR100
3.65K/F_4
OCP=7A PR106
*100_4
L ripple current PR215
=(19-0.95)*0.95/(2.2u*290k*19) VDD_095_FB_H <4>
10K/F_4
=1.415A
Vtrip=[7-(1.415/2)]*14mohm VDD_095_FB_L <4>
=88.097mV PR107
B Rlimit=88.097mV/10uA*8=70.48Kohm PR219 *0_4 B
*SHORT_4
+0.95V_S5
5
MAIND 4
<31,32,35> MAIND
PQ46
MDV1528Q +0.95V
TDC : 2.7A
3
2
1
PEAK : 3.6A
Width : 120mil
+0.95V
A A

PROJECT :
+0.95V_S5(TPS51211) 1A

5 4 3 2 1
5 4 3 2 1
+VDDNB_CORE
PC116
PR59 330p/50V_4
10_4
Load line setting

PR46
<4> APU_VDDNB_RUN_FB_H PR58 *SHORT_4 2.2/F_6 VIN
+5V_S5 BOOT_NB
PR38
1.54K/F_4
2200p/50V_4
0.1u/50V_6
4.7u/25V_6
4.7u/25V_6
5
Close to the RC time PC33
PC39
PC40
PC125
PC126
0.22u/25V_6
D CPU side. constant D
PC27 PR40
1000p/50V_4 300/F_4 VSUMG+ UGATE_NB 4
PR45
1
2
3
PC26 PR39 PR157 PQ33 PL4 DCR=1.1mOhm
PR44
*SHORT_6
1/F_6
680p/50V_4 2K/F_4 2.61K/F_4 AON6414AL 0.36uH_10X10X4
47n/16V_4
0.15u/10V_4
PHASE_NB 1 2
PC25
PC113
+VDDNB_CORE
PR162
11K/F_4
5
PR166 PC30 PR42 Close with
4
41.2K/F_4 390p/50V_4 133K/F_4
PR49
PHASE_NB inductor
+ +
2.2_6
PR177 LGATE_NB 4 PC46 PC45
1u/10V_4
1u/10V_4
0.1u/10V_4
10u/6.3V_6
PC29 PR36 NTC_10K/F_4 330u/2V_7343 *330u/2V_7343
100p/50V_4 330_4
62771_VSEN_NB
PC48
PC49
1000p/50V_6
1
2
3
62771_FB_NB VSUMG- PQ36
PC43
62771_VDDP
62771_EN AON6752
62771_VDD
OCP
PC120
PC121
ISUMN_NB
PC112
62771_COMP_NB
0.1u/10V_4
PR160 +3V
VSUMG+ PR34 3.65K/F_4
36
37
38
25
26
40
39
100K/F_4
VDD
COMP_NB
FB_NB
VSEN_NB
VDDP
ISUMP_NB
ISUMN_NB
PR171
10K/F_4 VSUMG- PR163 1/F_4
PR168 *SHORT_4 35 34 LGATE_NB

PGOOD_NB LGATE_NB
VRM_PWRGD 20 33 PHASE_NB
<29> VRM_PWRGD PGOOD PHASE_NB
PR33 *SHORT_4 62771_SVC 3 32 UGATE_NB

<4> APU_SVC SVC UGATE_NB
C C
4 31 BOOT_NB
<4,5,29> CORE_PWM_PROCHOT# VR_HOT_L BOOT_NB
62771_SVD 5 30
AMD Beema 25W
PR32 *SHORT_4
<4> APU_SVD SVD BOOT2
PR31 *SHORT_4 62771_VDDIO 6 29

<4,7> APU_VDD_18 VDDIO UGATE2
PU2
PR30 *SHORT_4 62771_SVT 7 ISL62771HRZ-T 28
<4> APU_SVT SVT PHASE2
62771_EN
+VDD_CORE +VDDNB_CORE
8 27
<29> VDDA_PWRGD PR29 *SHORT_4
ENABLE LGATE2 TDC : 20A TDC : 13A
<4> APU_PWRGD_SVID_REG
PR28 *SHORT_4 62771_PWROK 9
PWROK LGATE1
24 LGATE_1 PEAK : 25A PEAK : 17A
OCP : 31A OCP : 22A
NTC_NB PHASE_1
1
NTC_NB PHASE1
23
Width : 840mil Width : 680mil
NTC 11 22 UGATE_1 Load Line = -40mV/A Load Line = -40mV/A
NTC UGATE1
NTC_470K_4
27.4K/F_4
NTC_470K_4
27.4K/F_4
IMON_NB 2 21 BOOT_1
PR52
PR50
PR176
PR174
IMON_NB BOOT1
IMON 10 41
IMON EP
0.1u/10V_4
0.1u/10V_4
ISUMN
ISUMP
COMP
ISEN1
ISEN2
VSEN
PC111
PC109
133K/F_4
133K/F_4
RTN
Add 9 GND VIAs

PR161
PR159
FB
10K/F_4
10K/F_4
for thermal pad

PR53
PR51
19
18
16
17
15
14
13
12
PR35 +5V_S5
B B
1K_4
62771_VSEN
ISEN2
62771_RTN
62771_FB
ISUMN
62771_COMP PR164 PR47

Place NTC close to the Place NTC close to the
VDDNB Hot-Spot. VDDCORE Hot-Spot. 10K_4 2.2/F_6 VIN
PC32 ISEN1 BOOT_1
OCP=100'C OCP=100'C 100p/50V_4
33u/25V_6x4.5
1
2200p/50V_4
0.1u/50V_6
4.7u/25V_6
4.7u/25V_6
5
PC34 +
PC42
PC124
PC127
PR170 PC31 PR43 0.22u/25V_6
PC41
PC123
*0_4 390p/50V_4 133K/F_4
2
UGATE_1 4
PC122 PR172
1
2
3
680p/50V_4 2K/F_4 PQ34
AON6414AL
PL3
0.36uH_10X10X4
DCR=1.1mOhm
VSUM+
PHASE_1 1 2 +VDD_CORE
5
PC119 PR173
PR48
4
1000p/50V_4 300/F_4 PR167
*2.2_6
+VDD_CORE 2.61K/F_4
47n/16V_4
0.15u/10V_4
LGATE_1 4 + +
PC28
PC115
PR165
11K/F_4
0.1u/10V_4
10u/6.3V_6
PC117 PR169 PC44 PC129
330p/50V_4 2.26K/F_4 330u/2V_7343 *330u/2V_7343
PC128
PC47
*1000p/50V_6
1
2
3
PR56 Close with PQ35
PC38
10_4 PR175 phase1 inductor AON6752
Load line setting PR41 NTC_10K/F_4
487/F_4
<4> APU_VDD_RUN_FB_H PR55 *SHORT_4 VSUM-
1Phase VSUM+ PR37 3.65K/F_4

OCP PC110
<4> APU_VDD_RUN_FB_L PR54 *SHORT_4 1Phase 0.1u/10V_4
RC time
constant
A PR57 VSUM- PR158 1/F_4 A
10_4
PC118
0.01u/16V_4
Close to the
CPU side.

PROJECT :
VDD / VDDNB CORE (ISL62771) 1A
5 4 3 2 1
5 4 3 2 1
+3VPCU
+1.8V_S5 +1.8V_S5
+1.8V_S5
1.8 Volt +/- 5%
TDC : 2.26A
3
PC65 PC66
+3V 10u/6.3V_6 0.1u/25V_6 PEAK : 3A
PU3 TPS54318RTER Width : 90mil TDC : 1.13A
16
VIN PH
10 MAIND 2 PEAK : 1.5A
D
PR79 1
VIN PH
11 PL7 Width : 50mil D
100K/F_4 1uH_7X7X3 PQ45

2 12 AO3404
VIN PH
1
14 13
<29> HWPG_1.8VS5 PWRGD BOOT +1.8V
PR92 *SHORT_4 15 6 PC60
<29,31,33> S5_ON EN VSNS
7 3
0.1u/50V_6 R1 PR80
100K/F_4
COMP GND PC144 PC145 PC147
PC64 8 4 0.1u/10V_4 10u/6.3V_6 10u/6.3V_6
1000p/50V_4 RT/CLK GND 1.8V_VSNS
PAD
PAD
PAD
PAD
PAD
PAD
9 5
SS AGND
PR78
10K/F_4
PR77
121K/F_4 VFB=0.8V R2 PR83
22
21
20
19
18
17
78.7K/F_4
PC63 PC61 PC57

*100p/50V_4 1200p/50V_4 0.01u/25V_4
Vo=0.8*[(R1+R2)/R2]
C C
VIN
PD7
DA2J10100L
Thermal protection PR189

1M_6
1
PQ42
AO3409
2
3
S5_ON 2
B B
PQ44 PR182
1
DTC144EUA *SHORT_6
VL VL
NTC_R for setting TEMP.
SYS_SHDN# <12,31,36>
887/F_4 for 86'C --->now
(CS18872FB01)
1.5K/F_4 for 70'C PR187 PR186 PC132 PR184
(CS21502FB14) 1.54K/F_4 200K/F_4 0.1u/50V_6 200K_6
3
8
VIN +3V +5V +1.8V +1.5V +0.95V +15V PR188
NTC_10K/F_4 2.469V 3
+ 1 2
2
PR147 PR149 PR152 PR135 PR150 PR151 PR136 - PQ41
3
1M_4 22_8 22_8 22_8 22_8 22_8 1M_4 PU10A 2N7002K
4
AS393MTR-E1 PC133
1
0.1u/50V_6
MAINON_ON_G MAIND S5_ON 2
MAIND <31,32,33> PR185
3
PQ43 200K/F_4
3
2N7002K
PR148
1
2 PQ31 1M_4 2 2 2 2 2 2
<29,32> MAINON
DTC144EUA PC100
PQ26 PQ30 PQ27 PQ28 PQ29 PQ25 *2200p/50V_4
2N7002K 2N7002K 2N7002K 2N7002K 2N7002K 2N7002K
1
PR146
1
*100K/F_6 5
+ 7
6
-
A A
PU10B
AS393MTR-E1
For EC control thermal protection (output 3.3V)

PROJECT :
+1.8V/+1.5V/Thermal 1A

5 4 3 2 1
5 4 3 2 1
+3V_GFX
Default 0.9V
H_VID0
PR84 *EV@10K/F_4
+3V_S5 H_VID1
PR86 *EV@10K/F_4
PR208 *EV@100K_4 H_VID2
PR88 *EV@10K/F_4
H_VID3
2
PR91 *EV@10K/F_4
PQ14 H_VID4 VIN
*EV@PDTC143TT PR94 *EV@10K/F_4 PR82
D H_VID5 *EV@2.2/F_6 D
THAL_GPU_VR 1 3 PR96 *EV@10K/F_4 51728_VBST2
*EV@10K/F_4
*EV@10K/F_4
*EV@10K/F_4
*EV@10K/F_4
*EV@10K/F_4
*EV@2200p/50V_4
SYS_SHDN# <12,31,35>
*EV@10K/F_4
*EV@0.1u/50V_6
*EV@4.7u/25V_6
*EV@4.7u/25V_6
5
PC140
PC62
PC138
PC136
PC142
+3V *EV@0.22u/25V_6
51728_DRVH2 4
PR209
PR205
PR201
PR197
PR193
*EV@10K/F_4
*EV@100K/F_4
*EV@100K/F_4
PR194
PR212
*EV@200_4
1
2
3
*EV@10K/F_4 PQ39 PL6
51728_LL2
*EV@AON6414AL *EV@0.24uH_7X7X3 DCR=1.1mOhm
1 2 +VGPU_CORE
+1.8V_GFX +5V_S5
*EV@2.2_6
4
5
PR76
*EV@10u/6.3V_6
*EV@16.2K/F_4
PR90
PR87
PR98
PR105
PR229 +
*SHORT_4
*EV@10K/F_4 51728_DRVL2 4 PC131
*EV@0.1u/10V_4
*EV@330u/2V_7343
PC52
PC55
PC143
*EV@1000p/50V_6
1
2
3
*EV@2.2u/10V_6 PQ38
PC59
GPU_PG_EN *EV@AON6752
<37> GPU_PG_EN
PR73
PR70
26
<12> GPU_DPRSLPVR
V5IN
PR213 *EV@100K/F_4 33 30 51728_DRVH2
PGD DRVH2 51728_CSP2
C 34 29 51728_VBST2 C
PG VBST2
*EV@28.7K/F_4
PR214 *EV@2.2K_4
51728_PCNT 13 28 51728_LL2 PC148
Opal-XT 25W/Jet-XT 25W
PR74
PCNT LL2 *EV@0.1u/25V_4
*EV@0.015u/16V_4
PR206 *EV@100K/F_4 12 27 51728_DRVL2
Check EN level Close to the
*EV@412K/F_4
SLP DRVL2
VR side.
PC153
51728_EN 35 3 51728_CSP2
PR89 *SHORT_4
+VGPU_CORE
PR220
<37> 0.95_GFX_EN EN CSP2
THAL_GPU_VR 51728_CSN2 51728_CSN2
10
THAL CSN2
4
Countinue current:32A
H_VID0 20
<12> PWRCNTRL0
PR192 *SHORT_4
VID0
PC149
*EV@0.1u/25V_4 Peak current:42.6A
H_VID1 19 21 51728_DRVH1
<12> PWRCNTRL1
PR195 *SHORT_4
VID1 DRVH1 OCP:52A
H_VID2 18 22 51728_VBST1
<12> PWRCNTRL2
PR198 *SHORT_4
VID2 VBST1
PR183
*EV@NTC_100K/F_4 Load Line=0mV/A
PR203 *SHORT_4 H_VID3 17 23 51728_LL1
<12> PWRCNTRL3 VID3 LL1
PR207 *SHORT_4 H_VID4 16 24 51728_DRVL1
<12> PWRCNTRL4 VID4 DRVL1
PR211 *SHORT_4 H_VID5 15 6 51728_CSP1
<12> PWRCNTRL5 VID5 CSP1
14 5 51728_CSN1
VID6 PU4 CSN1 +3V
51728_DROOP *EV@TPS51728RHAR
PC70 PR99 25
*EV@68p/50V_4 *EV@8.2K/F_4 PGND
39 PR85 PR81
PC69 DROOP *EV@0_4 *EV@2.2/F_6
51728_VBST1 VIN
*EV@1200p/50V_4
B
36 51728_TONSEL B
*EV@2200p/50V_4
TONSEL
*EV@0.1u/50V_6
*EV@4.7u/25V_6
*EV@4.7u/25V_6
51728_V5FILT +3V 51728_VREF
1
40
VREF 31 51728_TRIPSEL
5
PC141 +
PC58
PC137
PC135
PC139
PC152 TRIPSEL *EV@0.22u/25V_6 PC134
*EV@0.22u/10V_6 PR97 32 51728_OSRSEL *EV@33U/25V_6x4.5
OSRSEL
2
51728_DRVH1 4
PR210 *EV@0_4
*EV@316K/F_4 PR200 PR190
1
2
3
51728_SLEW37 *SHORT_4 *EV@10K/F_4 PQ40 PL5
SLEW
PR204 PR93 PR95 PR196
51728_LL1
*EV@AON6414AL *EV@0.24uH_7X7X3
1 2
DCR=1.1mOhm
*EV@0_4 *EV@0_4 *SHORT_4 *SHORT_4 +VGPU_CORE
9
PR179 THRM 1
*EV@2.2_6
PU
4
*EV@16.2K/F_4
*EV@330u/2.5V_6X4.2
5
*EV@4.02K/F_4
PR75
*EV@0_4
*EV@0_4
*SHORT_4
*EV@0.1u/10V_4
*EV@10u/6.3V_6
51728_TONSEL PR178 38 51728_V5FILT + +
V5FILT
TPAD10
TPAD11
TPAD12
TPAD13
TPAD14
TPAD15
TPAD16
*EV@NTC_100K/F_4 PC51
TPAD1
TPAD2
TPAD3
TPAD4
TPAD5
TPAD6
TPAD7
TPAD8
TPAD9
51728_DRVL1 4 *EV@330u/2V_7343
PwPd
IMON
GND
GFB
*EV@1000p/50V_6
VFB
THRM=0.75V/60uA=12.5K
PC53
PC54
PC130
TEMP=87C
PC56
1
2
3
PC146 PQ37
PR202
PR199
8
11
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
+VGPU_CORE *EV@2.2u/10V_6 *EV@AON6752
PR72
PR69
51728_CSP1
PR68
*EV@28.7K/F_4
51728_IMON
*EV@100_4
PC151
PR181
*EV@0.015u/16V_4
*EV@0.1u/25V_4
PR67 *SHORT_4 51728_VFB
A <15> GPUVDDC_SENSE Close to the A
*EV@412K/F_4
VR side.
PC154
PR66 *SHORT_4 51728_GFB
PR221
<15> GPUVSS_SENSE
PR102 PC67
*EV@12.4K/F_4 *EV@3300p/50V_4 PR216 *SHORT_8
Parallel PR71 PC150
*EV@100_4 *EV@0.1u/25V_4
51728_CSN1
PR180
PROJECT :
Close to the PC72 PC71 *EV@NTC_100K/F_4 Size Document Number Rev
*EV@1000p/50V_4 *EV@1000p/50V_4 A1A
GPU side. +VGPU CORE(TPS51728)
5 4 3 2 1
5 4 3 2 1
+3VPCU
+PCIE_VDDC_GFX
+0.95V
0.95 Volt +/- 5%
+3V_GFX PC15 PC17 TDC : 1.64A
*EV@10u/6.3V_6 *EV@0.1u/25V_6
PU9 *EV@TPS54318RTER
PEAK : 2.18A
D 16
VIN PH
10 Width : 90mil D
PR26
*EV@10K/F_4 1 11 PL2
VIN PH *EV@1uH_7X7X3
2 12
VIN PH
PR21 HW PG_+PCIE_VDDC_GFX 14 13
<36> 0.95_GFX_EN PWRGD BOOT
*SHORT_4
PR20 15 6 PC108 PC24
+3V_GFX EN VSNS
*SHORT_4
7 3
*EV@0.1u/50V_6 R1 PR9 *EV@10u/6.3V_6
*EV@78.7K/F_4
COMP GND
PC21 8 4
*EV@1000p/50V_4 RT/CLK GND 1.5V_SN PC106 PC114
PAD
PAD
PAD
PAD
PAD
PAD
9 5 *EV@0.1u/10V_4 *EV@10u/6.3V_6
PR10 PR14 SS AGND
*EV@10K/F_4 *EV@121K/F_4 VFB=0.8V R2 PR13
22
21
20
19
18
17
*EV@412K/F_4
PC102
*EV@0.01u/25V_4
PC16 PC10
*EV@100p/50V_4 *EV@1200p/50V_4
C
Vo=0.8*[(R1+R2)/R2] C
VIN +15V +1.5V_SUS
+15V +1.8V_S5
TDC : 2.57A
5
PR65
VIN +1.8V_GFX +3V_GFX +1.5V_GFX
PR243
PR231 *EV@1M_4 PEAK : 3.42A
*EV@1M_4
Width : 100mil
3
*EV@1M_4
PX_MODE_D 4
PR64 PR62 PR61 PR232 PQ13
3
*EV@1M_4 *EV@22_8 *EV@22_8 *EV@22_8 2 *EV@MDV1528Q
3
2
1
3
+1.5V_GFX
PQ8 2
*EV@AO3404 PC50
1
3
3
2 PQ12 *EV@2200p/50V_4
PC173 *EV@2N7002K
PR63 PQ68 *EV@2200p/50V_4 PR230
1
0.95_GFX_EN 2 2 2 2 PQ55 *EV@2N7002K 2
*EV@1M_4 +1.8V_GFX <36> GPU_PG_EN *EV@1M_4
*EV@2N7002K
1
PQ11 PQ10 PQ9 PQ54
*EV@2N7002K *EV@2N7002K *EV@2N7002K TDC : 0.75A *EV@2N7002K
PEAK : 1A
1
1
Width : 40mil
B B
+3V +3V_GFX
PR234
+3V_GFX PR233
Q39 TDC : 0.02A *EV@10K/F_4
*EV@AO3413
PEAK : 0.025A *EV@10K/F_4
+3V
1 3 Width : 20mil PE_PW RGD <5>
3
2
C688 *EV@0.1u/10V_4 C681 2

R452 *EV@100K_4 *EV@0.1u/10V_4
+1.5V_GFX PQ57
3
PR236 *EV@2N7002K
3
*EV@1K_4
1
2 PQ56
2 *EV@MMBT3904-7-F_200MA
A <5> DGPU_PW REN A
Q40
1
*EV@2N7002K
1

PROJECT :
GPU_POWER/VDDC_GFX A1A

5 4 3 2 1

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5 4 3 2 1

ZQN BLOCK DIAGRAM

X'TAL VRAM DDR3-512MB*4 = 2GB

CLK USB-3 (TouchS) eDP/CCD Con.

USB 2.0 USB3

USB-7 MINI CARD

Connector MCU 25MHz

Universal Fan Driver Quanta Computer Inc.

+1.5V_RTC +1.5V RTC POWER ALWAYS ALWAYS PCI_RST#

+3VPCU +3.3V EC POWER ALWAYS ALWAYS

+5VPCU +5V CHARGE POWER ALWAYS ALWAYS

+15V +15V CHARGE PUMP POWER ALWAYS ALWAYS

+3V_S5 +3.3V LAN/ TPM POWER S5_ON S0-S5

+1.8V_S5 +1.8V APU POWER S5_ON S0-S5

+0.95V_S5 +0.95V APU CORE POWER S5_ON S0-S5 APU CORE_PWM_PROCHOT#

+1.5VSUS +1.5V CPU/SODIMM CORE POWER SUSON S0-S3

+VDDNB_CORE variation APU CORE POWER VRON S0

+VGPU_CORE variation GPU POWER DGPU_PWREN S0 NTC 3V/5 V

+1.5V_GFX +1.5V GPU POWER DGPU_PWREN S0

+3V_GFX +3V GPU POWER DGPU_PWREN S0

Quanta Computer Inc.

Quanta Computer Inc.

VSS_SENSE R85 *SHORT_4 APU_VDD_RUN_FB_L

Power trace tracking VDDCR_NB_SENSE R90 *SHORT_4 APU_VDDNB_RUN_FB_H

HDT(Hardware Debug Tool ) Connector SMBUS (Internal Thermal sensor)

*1K/F_4*1K/F_4*1K/F_4 *300/F_4 *300/F_4 *300/F_4 *2.2K_4

SVT R421 33_4

SVC R438 33_4 Q30

Date: Tuesday, April 29, 2014 Sheet 4 of 39

Test mode setting (Follow AMD's suggestion)

R447 *0_4 AY29 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63

GEVENT2# AV17 AN2 ACZ_BCLK_R

AU31 FANOUT0/GPIO52 PART 3 OF 9

PCH_AZ_CODEC_SDIN0 R323 *10K/F_4 FT3B_Beema

BOARD_ID0 d'TPM R82 *SHORT_4

Vender Size Quanta P/N Vender P/N

AY12 SPI_WP R369 *SHORT_4 SPI_WP_R

AV11 RTC_CLK <8> R72 *SHORT_4

+1.5V_SUS +VDD_CORE U24G U24H

+3V APU_VDD_33 R55 *SHORT_8 +0.95V

R308 *SHORT_8 R347 *SHORT_8 R51 *SHORT_8

STRAPS PINS OVERLAP COMMON PADS WHERE

+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5

R354 R358 R320 R415 R395

<5> GEVENT2# GEVENT2#

R353 R357 R319 R414 R394

RTC_CLK LPC_CLK0 LPC_CLK1 LFRAME# GEVENT2#

SYS_PWRGD_R R134 *SHORT_4

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

Power trace tracking Quanta Computer Inc.

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

Power trace tracking Quanta Computer Inc.

AA38 PCIE_RX0P PCIE_TX0P Y33 PEG_RXP0_C C531 *EV@0.1u/10V_4

Y35 PCIE_RX1P PCIE_TX1P W33 PEG_RXP1_C C528 *EV@0.1u/10V_4

W38 PCIE_RX2P PCIE_TX2P U33 PEG_RXP2_C C525 *EV@0.1u/10V_4

V35 PCIE_RX3P PCIE_TX3P U30 PEG_RXP3_C C523 *EV@0.1u/10V_4

1K/F_41K/F_41K/F_4 300/F_4 300/F_4 300/F_4 *2.2K_4

R308 SHORT_8 R347 SHORT_8 R51 *SHORT_8

EV@10u/6.3V_6 EV@1u/6.3V_4 *EV@0.1u/10V_4

VMA_DM[7..0] CHANNEL A: 512MB DDR3 (64M164pcs)

VMB_DM[7..0] CHANNEL B: 512MB DDR3 (64M164pcs)