You are on page 1of 43

1 2 3 4 5 6 7 8

PCB STACK UP
LAYER 1 : TOP
LAYER 2 : GND1
LAYER 3 : IN1
TE2D Block Diagram
LAYER 4 : VCC
A LAYER 5 : IN2 A

LAYER 6 : IN3
LAYER 7 : GND2 USB-0
LCD/CCD Con. P15
LAYER 8 : BOT
DDRIII-SODIMM1
DDRIII-SODIMM2 Arrandale (UMA+VGA) EXT_LVDS
P12,13 CRT Con.

DDR SYSTEM MEMORY


PCI-E x16 VGA EXT_CRT daughter board
Dual Channel DDR III PCI-E
Madison/Park P23

Graphics Interfaces
800/1066/1333 MHZ EXT_HDMI
P14,15,16,17
rPGA 989 HDMI Con.
VRAM DDR3-64M*16 P14
SATA - HDD Re-Driver P3,4, 5, 6,
P26 P26
VRAM DDR3-128M*16
FDI
DMI

DMI(x4)
SATA - ODD
P25 SATA 0
B FDI B
DMI
SATA 1
SATA
PCI-Express
SATA 5 PCI-E
USB-13 ESATA Con.
P25
PCIE-3 CK505
P2
USB-10 3G
USB Con. daughter board P24
USB-8 PCIE-4 POWER SYSTEM
P23 Ibex Peak-M ISL88731A P33
USB-4 USB 2.0 (Port0~13) RT8210B P34
SIM CARD. PCIE-5
USB UP6163 P35
P24 WLAN
PCH USB-5 UP6111A P36
USB-2 P24 RT015A P37
Bluetooth Con. P7,8, 9, 10, 11
ISL62882C P38
P31
PCIE-6 MAX8792 P40
USB-3 RTC Giga/10/100 Lan
Cardreader P28
C
P29 BATTERY +VCC_CORE C

USB Con. USB-9


P9
P25
+1.5V
Cardreader Con. +1.5VSUS
Azalia
3 IN 1 P29 IHDA
NVRAM
LPC
+VTT
+1.05V
LPC

+1.8V

Audio Codec EC +1.5V_S5


P27 P30 +3VPCU
+3V_S5
Port-B

Port-A

+3V
FAN K/B Con. HALL Sensor SPI Flash Touch Pad /B Power /B +5VPCU
MIC JACK HP SPK Con. Con. Con. +5V_S5
D MDC Con. D
P27 P27 P27 P27 P4 P31 P23 P23 P31 P31 +5V
+SMDDR_VTERM
+SMDDR_VREF

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
Block Diagram
Date: Thursday, February 25, 2010 Sheet 1 of 43
1 2 3 4 5 6 7 8
5 4 3 2 1

CLOCK Gen [CLK] Pin1/17/24


Sligo595 =>1.5V (AL000595000)
+3V Sligo590 =>3.3V (AL8SP590000)
+1.05V
+VDDIO_CLK 80mA(20mils)
L36 PBY160808T-601Y-N_1A 250mA(20mils) +3V_CK505_VDD L21 PBY160808T-601Y-N_1A

D C748 C753 C455 C439 D


C743 C402 C747
10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X U13 *10U/6.3V_8X 10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X
R229
+1.5V *590@0_6 5 VDD_27
29 VDD_REF VDD_SRC_I/O 15
VDD_CPU_I/O 18

L20 595@PBY160808T-601Y-N_1A 150mA(20mils) +1.5V_CK505_VDD 1 VDD_DOT_1.5 DOT_96 3 DREFCLK_R RP4


2 1 *short_4P2R
CLK_BUF_DREFCLKP [8]
17 4 DREFCLK#_R 4 3
VDD_SRC_1.5 DOT_96# CLK_BUF_DREFCLKN [8]
24 VDD_CPU_1.5
6 CLK_VGA_27M_R R258 *33_4
27M 27M_CLK [15]
C718 C427 C446 C434 XTAL_OUT 27 7 CLK_VGA_27M#_R R265 0_4
595@10U/6.3V_8X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X XTAL_IN XTAL_OUT 27M_SS C445 *15P/50V_4C
28 XTAL_IN
10 DREFSSCLK_R RP5 2 1 *short_4P2R
SRC_1/SATA CLK_BUF_DREFSSCLKP [8]
11 DREFSSCLK#_R 4 3
SRC_1#/SATA# CLK_BUF_DREFSSCLKN [8]
CPU_SEL 30 13 PCIE_3GPLL_R RP6 2 1 *short_4P2R
REF_0/CPU_SEL SRC_2 CLK_BUF_PCIE_3GPLLP [8]
14 PCIE_3GPLL#_R 4 3
SRC_2# CLK_BUF_PCIE_3GPLLN [8]
CGDAT_SMB 31
CGCLK_SMB SDA ICS_CPU_STOP# R298 10K_4
32 SCL *CPU_STOP# 16 +3V
C CLK_PCH_14M R226 33_4 2 20 CLK_BUF_BCLK1_P_R TP6 C
[8] CLK_PCH_14M VSS_DOT CPU_1
8 19 CLK_BUF_BCLK1_N_R TP7
VSS_27 CPU_1# CLK_BUF_BCLK0_P_R RP3 *short_4P2R
9 VSS_SATA CPU_0 23 4 3 CLK_BUF_BCLKP [8]
C399 12 22 CLK_BUF_BCLK0_N_R 2 1
VSS_SRC CPU_0# CLK_BUF_BCLKN [8]
21 VSS_CPU
*15P/50V_4C 26 25 VR_PWRGD_CLKEN
VSS_REF CKPWRGD/PD#
33 GND
SLG8SP595VTR

CLK POWERGOOD
CLK CRYSTAL CLK CPU_SEL CLK I2C Change to +3VPCU
(follow CRB)
B B

+3V
+3V

+3VPCU R243 10K/F_4 VR_PWRGD_CLKEN


R292

3
*10K_4
R317 R225
2 Q24 100K/F_4
[38] VR_PWRGD_CK505#

2
Y3 CPU_SEL 10K_4
XTAL_IN XTAL_OUT 2N7002_200MA
1 2
3 1 CGDAT_SMB
[8,24,28] SDATA CGDAT_SMB [12,13]
14.318MHZ_30 R291

1
C400 C401
10K_4 2N7002_200MA
33P/50V_4N 33P/50V_4N Q31 R316

+3V 10K_4

2
A A

0 1 3 1 CGCLK_SMB
[8,24,28] SCLK CGCLK_SMB [12,13]
Quanta Computer Inc.
CPU_SEL
CPU =133MHz CPU=100MHz 2N7002_200MA
Q32
PROJECT : TE2
(default) Size Document Number Rev
2A
CLOCK GENERATOR
Date: Friday, March 19, 2010 Sheet 2 of 45

5 4 3 2 1
1 2 3 4 5 6 7 8

U23A
PEG_ICOMPI B26 PEG_COMP R449 49.9/F_4
PEG_ICOMPO A26
[9] DMI_TXN0 A24 DMI_RX#[0] PEG_RCOMPO B27
[9] DMI_TXN1 C23 DMI_RX#[1] PEG_RBIAS A25 PEG_RBIAS R450 750/F_4
[9] DMI_TXN2 B22 DMI_RX#[2] PEG_RXN[0..15] [14]
[9] DMI_TXN3 A21 K35 PEG_RXN0
DMI_RX#[3] PEG_RX#[0] PEG_RXN1 U23B
PEG_RX#[1] J34
[9] DMI_TXP0 B24 J33 PEG_RXN2 R200 20/F_4 H_COMP3 AT23 A16 CLK_CPU_BCLKP [10]
DMI_RX[0] PEG_RX#[2] PEG_RXN3 R201 20/F_4 H_COMP2 AT24 COMP3 BCLK
[9] DMI_TXP1 D23 DMI_RX[1] PEG_RX#[3] G35 COMP2 BCLK# B16 CLK_CPU_BCLKN [10]
[9] DMI_TXP2 B23
A22
DMI_RX[2] PEG_RX#[4] G32
F34
PEG_RXN4
PEG_RXN5
R101
R196
49.9/F_4
49.9/F_4
H_COMP1 G16
H_COMP0 AT26 COMP1 MISC AR30
[9] DMI_TXP3 DMI_RX[3] PEG_RX#[5] COMP0 BCLK_ITP TP52
F31 PEG_RXN6 AH24 AT30 TP53
PEG_RX#[6] SKTOCC# BCLK_ITP#
DMI
[9] DMI_RXN0 D24 D35 PEG_RXN7 TP2
DMI_TX#[0] PEG_RX#[7]
A [9] DMI_RXN1
[9] DMI_RXN2
G24
F23
DMI_TX#[1]
DMI_TX#[2]
PEG_RX#[8]
PEG_RX#[9]
E33
C33
PEG_RXN8
PEG_RXN9 H_CATERR# AK14
CATERR#
CLOCKSPEG_CLK#
PEG_CLK E16
D16
CLK_PCIE_3GPLLP [8]
CLK_PCIE_3GPLLN [8]
A

[9] DMI_RXN3 H23 D32 PEG_RXN10 [10] H_PECI AT15 R451 *short_4
DMI_TX#[3] PEG_RX#[10] PECI
PEG_RX#[11] B32 PEG_RXN11 H_PROCHOT#_D AN26
PROCHOT# THERMAL DPLL_REF_SSCLK A18 CLK_DREFSSCLKP_R R448 3 4 *IV@0X2 CLK_DREFSSCLKP [8] DPLL_REF_SSCLK
D25 C31 PEG_RXN12 CPU_PM_THRMTRIP# AK15 A17 CLK_DREFSSCLKN_R 1 2
[9] DMI_RXP0
F24
DMI_TX[0] PEG_RX#[12]
B28 PEG_RXN13 THERMTRIP# DPLL_REF_SSCLK# R452 *short_4
CLK_DREFSSCLKN [8] Only for UMA
[9] DMI_RXP1 DMI_TX[1] PEG_RX#[13]
[9] DMI_RXP2 E23 B30 PEG_RXN14
DMI_TX[2] PEG_RX#[14] PEG_RXN15 H_CPURST#_R DDR3_DRAMRST#_C
[9] DMI_RXP3 G23 DMI_TX[3] PEG_RX#[15] A31 AP26 RESET_OBS# SM_DRAMRST# F6
AL15
PEG_RX[0] J35 PEG_RXP0
PEG_RXP[0..15] [14] [9] PM_SYNC
AN14
PM_SYNC
VCCPWRGOOD_1 DDR3 SM_RCOMP[0] AL1 SM_RCOMP_0 R521 100/F_4
2.7GT/s data rate H34 PEG_RXP1 [10] H_PWRGOOD AN27 AM1 SM_RCOMP_1 R520 24.9/F_4
[9] FDI_TXN[7:0]
FDI_TXN0 E22
PEG_RX[1]
PEG_RX[2] H33
F35
PEG_RXP2
PEG_RXP3
PM_DRAM_PWRGD AK13
VCCPWRGOOD_0
SM_DRAMPWROK MISC SM_RCOMP[1]
SM_RCOMP[2] AN1 SM_RCOMP_2 R519
R204
130/F_4
10K_4 +VTT
FDI_TXN1 FDI_TX#[0] PEG_RX[3] PEG_RXP4
D21 FDI_TX#[1] PEG_RX[4] G33 TP55 AM26 TAPPWRGOOD PM_EXT_TS#[0] AN15 PM_EXT_TS#0 R209 *short_4 PM_EXTTS#0 [12]
FDI_TXN2 D19 E34 PEG_RXP5 AP15 PM_EXT_TS#1 R212 *short_4 PM_EXTTS#1 [13]
FDI_TXN3 FDI_TX#[2] PEG_RX[5] PEG_RXP6 H_VTTPWRGD AM15 PM_EXT_TS#[1] R206 10K_4
D18 FDI_TX#[3] PEG_RX[6] F32 VTTPWRGOOD +VTT
FDI_TXN4 G21 D34 PEG_RXP7 [9,24,28,29,30] PLTRST# R161 1.5K/F_4 CPU_PLTRST# AL14
FDI_TXN5 FDI_TX#[4] PEG_RX[7] PEG_RXP8 RSTIN#
FDI_TXN6
E19
F21
FDI_TX#[5]
Intel(R) FDI PEG_RX[8] F33
B33 PEG_RXP9 PRDY# AT28
AP27 XDP_PREQ#
TP54

PCI EXPRESS -- GRAPHICS


FDI_TX#[6] PEG_RX[9] PREQ#
FDI_TXN7 G18 FDI_TX#[7] PEG_RX[10] D31
A32
PEG_RXP10
PEG_RXP11 R168 750/F_4
PWR MANAGEMENT TCK AN28 XDP_TCLK
PEG_RX[11] PEG_RXP12 XDP_TMS
[9] FDI_TXP[7:0] PEG_RX[12] C30 TMS AP28
FDI_TXP0 D22 A28 PEG_RXP13
FDI_TX[0] PEG_RX[13]

JTAG & BPM


FDI_TXP1 C21 B29 PEG_RXP14 AT27 XDP_TRST#
FDI_TXP2 FDI_TX[1] PEG_RX[14] PEG_RXP15 TRST#
D20 FDI_TX[2] PEG_RX[15] A30 TP51 AJ22 BPM#[0]
FDI_TXP3 C18 PEG_TXN[0..15] [14] TP59 AK22 AT29 XDP_TDI_R
FDI_TXP4 FDI_TX[3] PEG_TXN0_C C678 0.1U/10V_4X PEG_TXN0 BPM#[1] TDI XDP_TDO_R
G22 FDI_TX[4] PEG_TX#[0] L33 TP60 AK24 BPM#[2] TDO AR27
FDI_TXP5 E20 M35 PEG_TXN1_C C674 0.1U/10V_4X PEG_TXN1 TP58 AJ24 AR29 XDP_TDI_M
FDI_TXP6 FDI_TX[5] PEG_TX#[1] PEG_TXN2_C C667 0.1U/10V_4X PEG_TXN2 BPM#[3] TDI_M XDP_TDO_M
F20 FDI_TX[6] PEG_TX#[2] M33 TP57 AJ25 BPM#[4] TDO_M AP29
FDI_TXP7 G19 M30 PEG_TXN3_C C661 0.1U/10V_4X PEG_TXN3 TP61 AH22
FDI_TX[7] PEG_TX#[3] PEG_TXN4_C C657 0.1U/10V_4X PEG_TXN4 BPM#[5]
PEG_TX#[4] L31 TP50 AK23 BPM#[6]
F17 K32 PEG_TXN5_C C649 0.1U/10V_4X PEG_TXN5 TP56 AH23 AN25 SYS_RESET# [9]
[9] FDI_FSYNC0 FDI_FSYNC[0] PEG_TX#[5] BPM#[7] DBR#
E17 M29 PEG_TXN6_C C647 0.1U/10V_4X PEG_TXN6
[9] FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6]
J31 PEG_TXN7_C C645 0.1U/10V_4X PEG_TXN7 IC,AUB_CFD_rPGA,R1P0
PEG_TX#[7] PEG_TXN8_C C643 0.1U/10V_4X PEG_TXN8
[9] FDI_INT C17 FDI_INT PEG_TX#[8] K29
H30 PEG_TXN9_C C640 0.1U/10V_4X PEG_TXN9
PEG_TX#[9] PEG_TXN10_C C637 0.1U/10V_4X PEG_TXN10
[9] FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29
D17 F29 PEG_TXN11_C C633 0.1U/10V_4X PEG_TXN11
[9] FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11]
E28 PEG_TXN12_C C627 0.1U/10V_4X PEG_TXN12
PEG_TX#[12] PEG_TXN13_C C624 0.1U/10V_4X PEG_TXN13
PEG_TX#[13] D29
D27 PEG_TXN14_C C619 0.1U/10V_4X PEG_TXN14
B
PEG_TX#[14] JTAG MAPPING B

PEG_TX#[15] C26 PEG_TXN15_C C611 0.1U/10V_4X PEG_TXN15


PEG_TXP[0..15] [14]
+VTT Processor hot +VTT

L34 PEG_TXP0_C C671 0.1U/10V_4X PEG_TXP0


PEG_TX[0] PEG_TXP1_C C670 0.1U/10V_4X PEG_TXP1
PEG_TX[1] M34
M32 PEG_TXP2_C C665 0.1U/10V_4X PEG_TXP2 H_CATERR# R169 49.9/F_4 R203
PEG_TX[2] PEG_TXP3_C C659 0.1U/10V_4X PEG_TXP3 H_CPURST#_R R157 *68_4
PEG_TX[3] L30
M31 PEG_TXP4_C C650 0.1U/10V_4X PEG_TXP4 XDP_TDI_R Ra R184 0_4 68_4
PEG_TX[4] PEG_TXP5_C C648 0.1U/10V_4X PEG_TXP5 XDP_TMS R181 *51_4 XDP_TDO_M
PEG_TX[5] K31 Rb R182 *0_4
M28 PEG_TXP6_C C646 0.1U/10V_4X PEG_TXP6 XDP_TDI_R R186 *51_4
PEG_TX[6] PEG_TXP7_C C644 0.1U/10V_4X PEG_TXP7 XDP_PREQ# R197 *51_4
PEG_TX[7] H31 Rc
K28 PEG_TXP8_C C641 0.1U/10V_4X PEG_TXP8 R183 R208 0_4 H_PROCHOT#_D
PEG_TX[8] PEG_TXP9_C C638 0.1U/10V_4X PEG_TXP9 XDP_TCLK R179 *51_4 0_4 [38] H_PROCHOT#
PEG_TX[9] G30
G29 PEG_TXP10_C C634 0.1U/10V_4X PEG_TXP10
PEG_TX[10]
PEG_TX[11] F28 PEG_TXP11_C C629 0.1U/10V_4X PEG_TXP11 If R208 no stuff must change R203 to 50 ohm
E27 PEG_TXP12_C C625 0.1U/10V_4X PEG_TXP12 XDP_TDI_M Rd R185 *0_4
PEG_TX[12] PEG_TXP13_C C620 0.1U/10V_4X PEG_TXP13 XDP_TDO_R
PEG_TX[13] D28 Re R194 0_4
C27 PEG_TXP14_C C612 0.1U/10V_4X PEG_TXP14
PEG_TX[14] PEG_TXP15_C C608 0.1U/10V_4X PEG_TXP15 +3V
PEG_TX[15] C25
XDP_TRST#
IC,AUB_CFD_rPGA,R1P0 [30] HWPG R218 *short_4

5
2 R202 R215 Thermal Trip
R217 4HWPG_1 H_VTTPWRGD 51_4
*short_4 1 2K/F_4
+VTT
TC7SH08FU(F) R199

3
U11 1K/F_4

3
R214 *0_4 R213 *0_4
[9,30] MPWROK

2 Q26
+1.5VSUS [9,38] DELAY_VR_PWRGOOD
for S3 power reduction 2N7002_200MA

Discrete only

1
R90 1K/F_4 FDI_INT R69 Scan Chain STUFF -> Ra, Rc, Re
C C
[10] DDR3_DRAMRST#_PCH 1K_4
R91 1K/F_4 FDI_FSYNC0 (Default) NO STUFF -> Rb, Rd +VTT R242 R249
DDR3_DRAMRST# [12,13]
R92 1K/F_4 FDI_FSYNC1 CPU Only STUFF -> Ra, Rb 1K_4 100K_4

3
R87 C117 NO STUFF -> Rc, Rd, Re
R93 1K/F_4 FDI_LSYNC0 Q19 R246 Q27

2
*100K_4 0.1U/10V_4X
R102 1K/F_4 FDI_LSYNC1 2 R68 GMCH Only STUFF -> Rd, Re *56.2/F_4 MMBT3904-7-F_200MA
*0_4 CPU_PM_THRMTRIP# 1 3 SYS_SHDN#
NO STUFF -> Ra, Rb, Rc SYS_SHDN# [15,34]
FDI_FSYNC can gang all these 4 BSS138_NL_0.22MA
signals together and tie them with

1
R247 0_4 PM_THRMTRIP#
only one 1K resistor to GND ( DDR3_DRAMRST#_C
PM_THRMTRIP# [10]
Check list 1.0 ).

+1.5V_CPUVDDQ +3V_S5

CPU FAN CTRL


+3V_S5 +3V_S5
+3V
R16
10K/F_4
R17 +1.5V_CPUVDDQ_PG [35] R15 +3V
10K/F_4 R444
3mA(40mils)
3

10K/F_4 U1
2 10K_4
+5V CN9
4 R10 1.5K/F_4 R12 *short_4
2 1
PM_DRAM_PWRGD [9]
U2 40mils [30] FANSIG1 FANSIG1
3

2
C42 2.2U/6.3V_6X 2 3 TH_FAN_POWER1
TC7SH08FU(F) VIN VO 1
5
3

Q2 R11 TEMP_ALERT# CPUFAN#_ON_R_1 GND 2


[10,30] TEMP_ALERT# 1 3 1 /FON GND 6 3
R22 1K_4 2 2N7002_200MA Q1 2N7002_200MA 7
1

750/F_4 GND C41 C587 C586


[30] VFAN1 4 VSET GND 8
Q3 +1.5VSUS
D FDV301N_NL_200MA G995P1U 10U/6.3V_8X 0.01U/25V_4X *0.01U/25V_4X 85205-0300L D
+3V
1

FANPWR = 1.6*VSET

PM_DRAM_PWRGD: R13
*1.1K/F_4
Never drive hight before DDR3 voltage ramp to stable
2
PM_DRAM_PWRGD

VGA_THERM# 1 3
R14 [21] VGA_THERM# Q22 2N7002_200MA
*3K/F_4
Quanta Computer Inc.
PROJECT :TE2
Size Document Number Rev
2A
PROCESSER 1/4(HOST&PEX)
Date: Tuesday, March 09, 2010 Sheet 3 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)


04
A A
[13] M_B_DQ[63:0]
[12] M_A_DQ[63:0] U23C U23D
M_A_DQ0 A10 AA6 M_A_CLKP0 [12] M_B_DQ0 B5 W8 M_B_CLKP0 [13]
M_A_DQ1 C10 SA_DQ[0] SA_CK[0] M_B_DQ1 SB_DQ[0] SB_CK[0]
SA_DQ[1] SA_CK#[0] AA7 M_A_CLKN0 [12] A5 SB_DQ[1] SB_CK#[0] W9 M_B_CLKN0 [13]
M_A_DQ2 C7 P7 M_A_CKE0 [12] M_B_DQ2 C3 M3 M_B_CKE0 [13]
M_A_DQ3 SA_DQ[2] SA_CKE[0] M_B_DQ3 SB_DQ[2] SB_CKE[0]
A7 SA_DQ[3] B3 SB_DQ[3]
M_A_DQ4 B10 Y6 M_A_CLKP1 [12] M_B_DQ4 E4 V7 M_B_CLKP1 [13]
M_A_DQ5 D10 SA_DQ[4] SA_CK[1] M_B_DQ5 SB_DQ[4] SB_CK[1]
SA_DQ[5] SA_CK#[1] Y5 M_A_CLKN1 [12] A6 SB_DQ[5] SB_CK#[1] V6 M_B_CLKN1 [13]
M_A_DQ6 E10 P6 M_A_CKE1 [12] M_B_DQ6 A4 M2 M_B_CKE1 [13]
M_A_DQ7 SA_DQ[6] SA_CKE[1] M_B_DQ7 SB_DQ[6] SB_CKE[1]
A8 SA_DQ[7] C4 SB_DQ[7]
M_A_DQ8 D8 AE2 M_A_CS#0 [12] M_B_DQ8 D1 AB8 M_B_CS#0 [13]
M_A_DQ9 SA_DQ[8] SA_CS#[0] M_B_DQ9 SB_DQ[8] SB_CS#[0]
F10 SA_DQ[9] SA_CS#[1] AE8 M_A_CS#1 [12] D2 SB_DQ[9] SB_CS#[1] AD6 M_B_CS#1 [13]
M_A_DQ10 E6 M_B_DQ10 F2
M_A_DQ11 SA_DQ[10] M_B_DQ11 SB_DQ[10]
F7 SA_DQ[11] SA_ODT[0] AD8 M_A_ODT0 [12] F1 SB_DQ[11] SB_ODT[0] AC7 M_B_ODT0 [13]
M_A_DQ12 E9 AF9 M_A_ODT1 [12] M_B_DQ12 C2 AD1 M_B_ODT1 [13]
M_A_DQ13 B7 SA_DQ[12] SA_ODT[1] M_B_DQ13 SB_DQ[12] SB_ODT[1]
SA_DQ[13] M_A_DM[7:0] [12] F5 SB_DQ[13] M_B_DM[7:0] [13]
M_A_DQ14 E7 B9 M_A_DM0 M_B_DQ14 F3 D4 M_B_DM0
M_A_DQ15 C6 SA_DQ[14] SA_DM[0] SB_DQ[14] SB_DM[0]
SA_DQ[15] SA_DM[1] D7 M_A_DM1 DM signals are not present on Clarkfield M_B_DQ15 G4 SB_DQ[15] SB_DM[1] E1 M_B_DM1 DM signals are not present on Clarkfield
M_A_DQ16 H10 H7 M_A_DM2 processor. All DM signal can be left as M_B_DQ16 H6 H3 M_B_DM2 processor. All DM signal can be left as
M_A_DQ17 G8 SA_DQ[16] SA_DM[2] SB_DQ[16] SB_DM[2]
SA_DQ[17] SA_DM[3] M7 M_A_DM3 NC on Clarkfield and connect directly to M_B_DQ17 G2 SB_DQ[17] SB_DM[3] K1 M_B_DM3 NC on Clarkfield and connect directly to
M_A_DQ18 K7 AG6 M_A_DM4 M_B_DQ18 J6 AH1 M_B_DM4
M_A_DQ19 SA_DQ[18] SA_DM[4] GND on So-DIMM side for Clarkfield SB_DQ[18] SB_DM[4] GND on So-DIMM side for Clarkfield
J8 SA_DQ[19] SA_DM[5] AM7 M_A_DM5 M_B_DQ19 J3 SB_DQ[19] SB_DM[5] AL2 M_B_DM5
M_A_DQ20 G7 AN10 M_A_DM6 design only M_B_DQ20 G1 AR4 M_B_DM6 design only
SA_DQ[20] SA_DM[6] SB_DQ[20] SB_DM[6]

DDR SYSTEM MEMORY A


M_A_DQ21 G10 AN13 M_A_DM7 M_B_DQ21 G5 AT8 M_B_DM7

DDR SYSTEM MEMORY B


M_A_DQ22 SA_DQ[21] SA_DM[7] M_B_DQ22 SB_DQ[21] SB_DM[7]
J7 SA_DQ[22] M_A_DQSN[7:0] [12] J2 SB_DQ[22] M_B_DQSN[7:0] [13]
M_A_DQ23 J10 C9 M_A_DQSN0 M_B_DQ23 J1 D5 M_B_DQSN0
M_A_DQ24 SA_DQ[23] SA_DQS#[0] M_A_DQSN1 M_B_DQ24 SB_DQ[23] SB_DQS#[0] M_B_DQSN1
L7 SA_DQ[24] SA_DQS#[1] F8 J5 SB_DQ[24] SB_DQS#[1] F4
M_A_DQ25 M6 J9 M_A_DQSN2 M_B_DQ25 K2 J4 M_B_DQSN2
M_A_DQ26 M8 SA_DQ[25] SA_DQS#[2] M_A_DQSN3 M_B_DQ26 SB_DQ[25] SB_DQS#[2] M_B_DQSN3
SA_DQ[26] SA_DQS#[3] N9 L3 SB_DQ[26] SB_DQS#[3] L4
B M_A_DQ27 L9 AH7 M_A_DQSN4 M_B_DQ27 M1 AH2 M_B_DQSN4 B
M_A_DQ28 SA_DQ[27] SA_DQS#[4] SB_DQ[27] SB_DQS#[4]
L6 SA_DQ[28] SA_DQS#[5] AK9 M_A_DQSN5 M_B_DQ28 K5 SB_DQ[28] SB_DQS#[5] AL4 M_B_DQSN5
M_A_DQ29 K8 AP11 M_A_DQSN6 M_B_DQ29 K4 AR5 M_B_DQSN6
M_A_DQ30 N8 SA_DQ[29] SA_DQS#[6] SB_DQ[29] SB_DQS#[6]
SA_DQ[30] SA_DQS#[7] AT13 M_A_DQSN7 M_B_DQ30 M4 SB_DQ[30] SB_DQS#[7] AR8 M_B_DQSN7
M_A_DQ31 P9 M_A_DQSP[7:0] [12] M_B_DQ31 N5 M_B_DQSP[7:0] [13]
M_A_DQ32 AH5 SA_DQ[31] SB_DQ[31]
SA_DQ[32] SA_DQS[0] C8 M_A_DQSP0 M_B_DQ32 AF3 SB_DQ[32] SB_DQS[0] C5 M_B_DQSP0
M_A_DQ33 AF5 F9 M_A_DQSP1 M_B_DQ33 AG1 E3 M_B_DQSP1
M_A_DQ34 AK6 SA_DQ[33] SA_DQS[1] SB_DQ[33] SB_DQS[1]
SA_DQ[34] SA_DQS[2] H9 M_A_DQSP2 M_B_DQ34 AJ3 SB_DQ[34] SB_DQS[2] H4 M_B_DQSP2
M_A_DQ35 AK7 M9 M_A_DQSP3 M_B_DQ35 AK1 M5 M_B_DQSP3
M_A_DQ36 AF6 SA_DQ[35] SA_DQS[3] SB_DQ[35] SB_DQS[3]
SA_DQ[36] SA_DQS[4] AH8 M_A_DQSP4 M_B_DQ36 AG4 SB_DQ[36] SB_DQS[4] AG2 M_B_DQSP4
M_A_DQ37 AG5 AK10 M_A_DQSP5 M_B_DQ37 AG3 AL5 M_B_DQSP5
M_A_DQ38 AJ7 SA_DQ[37] SA_DQS[5] SB_DQ[37] SB_DQS[5]
SA_DQ[38] SA_DQS[6] AN11 M_A_DQSP6 M_B_DQ38 AJ4 SB_DQ[38] SB_DQS[6] AP5 M_B_DQSP6
M_A_DQ39 AJ6 AR13 M_A_DQSP7 M_B_DQ39 AH4 AR7 M_B_DQSP7
M_A_DQ40 AJ10 SA_DQ[39] SA_DQS[7] M_B_DQ40 SB_DQ[39] SB_DQS[7]
SA_DQ[40] M_A_A[15:0] [12] AK3 SB_DQ[40] M_B_A[15:0] [13]
M_A_DQ41 AJ9 Y3 M_A_A0 M_B_DQ41 AK4 U5 M_B_A0
M_A_DQ42 AL10 SA_DQ[41] SA_MA[0] M_A_A1 M_B_DQ42 SB_DQ[41] SB_MA[0] M_B_A1
SA_DQ[42] SA_MA[1] W1 AM6 SB_DQ[42] SB_MA[1] V2
M_A_DQ43 AK12 AA8 M_A_A2 M_B_DQ43 AN2 T5 M_B_A2
M_A_DQ44 AK8 SA_DQ[43] SA_MA[2] M_A_A3 M_B_DQ44 SB_DQ[43] SB_MA[2] M_B_A3
SA_DQ[44] SA_MA[3] AA3 AK5 SB_DQ[44] SB_MA[3] V3
M_A_DQ45 AL7 V1 M_A_A4 M_B_DQ45 AK2 R1 M_B_A4
M_A_DQ46 AK11 SA_DQ[45] SA_MA[4] M_A_A5 M_B_DQ46 SB_DQ[45] SB_MA[4] M_B_A5
SA_DQ[46] SA_MA[5] AA9 AM4 SB_DQ[46] SB_MA[5] T8
M_A_DQ47 AL8 V8 M_A_A6 M_B_DQ47 AM3 R2 M_B_A6
M_A_DQ48 AN8 SA_DQ[47] SA_MA[6] M_A_A7 M_B_DQ48 SB_DQ[47] SB_MA[6] M_B_A7
SA_DQ[48] SA_MA[7] T1 AP3 SB_DQ[48] SB_MA[7] R6
M_A_DQ49 AM10 Y9 M_A_A8 M_B_DQ49 AN5 R4 M_B_A8
M_A_DQ50 AR11 SA_DQ[49] SA_MA[8] M_A_A9 M_B_DQ50 SB_DQ[49] SB_MA[8] M_B_A9
SA_DQ[50] SA_MA[9] U6 AT4 SB_DQ[50] SB_MA[9] R5
M_A_DQ51 AL11 AD4 M_A_A10 M_B_DQ51 AN6 AB5 M_B_A10
M_A_DQ52 AM9 SA_DQ[51] SA_MA[10] M_A_A11 M_B_DQ52 SB_DQ[51] SB_MA[10] M_B_A11
SA_DQ[52] SA_MA[11] T2 AN4 SB_DQ[52] SB_MA[11] P3
M_A_DQ53 AN9 U3 M_A_A12 M_B_DQ53 AN3 R3 M_B_A12
M_A_DQ54 AT11 SA_DQ[53] SA_MA[12] M_A_A13 M_B_DQ54 SB_DQ[53] SB_MA[12] M_B_A13
SA_DQ[54] SA_MA[13] AG8 AT5 SB_DQ[54] SB_MA[13] AF7
M_A_DQ55 AP12 T3 M_A_A14 M_B_DQ55 AT6 P5 M_B_A14
M_A_DQ56 AM12 SA_DQ[55] SA_MA[14] M_A_A15 M_B_DQ56 SB_DQ[55] SB_MA[14] M_B_A15
C SA_DQ[56] SA_MA[15] V9 AN7 SB_DQ[56] SB_MA[15] N1 C
M_A_DQ57 AN12 M_B_DQ57 AP6
M_A_DQ58 AM13 SA_DQ[57] M_B_DQ58 SB_DQ[57]
SA_DQ[58] AP8 SB_DQ[58]
M_A_DQ59 AT14 M_B_DQ59 AT9
M_A_DQ60 AT12 SA_DQ[59] M_B_DQ60 SB_DQ[59]
SA_DQ[60] AT7 SB_DQ[60]
M_A_DQ61 AL13 M_B_DQ61 AP9
M_A_DQ62 AR14 SA_DQ[61] M_B_DQ62 SB_DQ[61]
SA_DQ[62] AR10 SB_DQ[62]
M_A_DQ63 AP14 M_B_DQ63 AT10
SA_DQ[63] SB_DQ[63]

[12] M_A_BS#0 AC3 SA_BS[0] [13] M_B_BS#0 AB1 SB_BS[0]


[12] M_A_BS#1 AB2 SA_BS[1] [13] M_B_BS#1 W5 SB_BS[1]
[12] M_A_BS#2 U7 SA_BS[2] [13] M_B_BS#2 R7 SB_BS[2]

[12] M_A_CAS# AE1 SA_CAS# [13] M_B_CAS# AC5 SB_CAS#


[12] M_A_RAS# AB3 SA_RAS# [13] M_B_RAS# Y7 SB_RAS#
[12] M_A_WE# AE9 SA_WE# [13] M_B_WE# AC6 SB_WE#
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0

D D

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
PROCESSER 2/4(DDR)
Date: Thursday, February 25, 2010 Sheet 4 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+15V +1.5VSUS
U23F 18A
+VCC_CORE AG35 VCC1 VTT0_1 AH14 +VTT
AG34 VCC2 VTT0_2 AH12
AG33 AH11 C684 10U/6.3V_8X
VCC3 VTT0_3 C677 10U/6.3V_8X R70
AG32 VCC4 VTT0_4 AH10

5
6
7
8
AG31 J14 C654 10U/6.3V_8X *100K_4
VCC5 VTT0_5 C602 10U/6.3V_8X R541 R598
AG30 VCC6 VTT0_6 J13
AG29 H14 C122 10U/6.3V_8X *0_8 *0_8
VCC7 VTT0_7 C658 10U/6.3V_8X MAIND
AG28 VCC8 VTT0_8 H12 [34,35,39] MAIND 4
AG27 G14 C133 10U/6.3V_8X U23G
A VCC9 VTT0_9 A
AG26 VCC10 VTT0_10 G13
C605 *330U/2V_7343P_E6b C113 Q9

+
AF35 VCC11 VTT0_11 G12 AT21 VAXG1 AO4466_9.4A

SENSE
LINES
AF34 VCC12 VTT0_12 G11 AT19 VAXG2 VAXG_SENSE AR22 T90 0.01U/25V_4X
AF33 VCC13 VTT0_13 F14 AT18 VAXG3 VSSAXG_SENSE AT22 T89
AF32 F13 AT16

3
2
1
C320 10U/6.3V_8X VCC14 VTT0_14 VAXG4
AF31 VCC15 VTT0_15 F12 AR21 VAXG5
C299 10U/6.3V_8X AF30 F11 AR19
C603 10U/6.3V_8X VCC16 VTT0_16 VAXG6
AF29 E14 AR18

GRAPHICS VIDs
C319 10U/6.3V_8X VCC17 VTT0_17 VAXG7
AF28 VCC18 VTT0_18 E12 AR16 VAXG8 GFX_VID[0] AM22 T37
C247 10U/6.3V_8X AF27 D14 AP21 AP22 T35
VCC19 VTT0_19 VAXG9 GFX_VID[1] +1.5V_CPUVDDQ
C110 10U/6.3V_8X AF26 D13 AP19 AN22 T36
C346 10U/6.3V_8X VCC20 VTT0_20 VAXG10 GFX_VID[2]
AD35 D12 AP18 AP23
C278 10U/6.3V_8X AD34
VCC21 VTT0_21
D11 AP16
VAXG11 GFX_VID[3]
AM23
T32
6A/maximum

1.1V RAIL POWER


VCC22 VTT0_22 VAXG12 GFX_VID[4] T33
C345 10U/6.3V_8X AD33 C14 AN21 AP24 T34
C348 10U/6.3V_8X VCC23 VTT0_23 VAXG13 GFX_VID[5]
AD32 VCC24 VTT0_24 C13 AN19 VAXG14 GFX_VID[6] AN24 T31

GRAPHICS
C685 10U/6.3V_8X AD31 C12 AN18
C249 10U/6.3V_8X VCC25 VTT0_25 VAXG15
AD30 VCC26 VTT0_26 C11 AN16 VAXG16
C321 10U/6.3V_8X AD29 B14 AM21 AR25 T92
C682 10U/6.3V_8X VCC27 VTT0_27 VAXG17 GFX_VR_EN
AD28 VCC28 VTT0_28 B12 AM19 VAXG18 GFX_DPRSLPVR AT25 T91
C347 10U/6.3V_8X AD27 A14 AM18 AM24 T38
C344 0.1U/10V_4X VCC29 VTT0_29 VAXG19 GFX_IMON
AD26 VCC30 VTT0_30 A13 AM16 VAXG20
C342 0.1U/10V_4X AC35 A12 AL21 R207 1K_4
AC34
VCC31 VTT0_31
A11 AL19
VAXG21 Discrete only
VCC32 VTT0_32 VAXG22
C251 *0.047U/10V_4X AC33 VCC33 VTT Rail Values are AL18 VAXG23
C252 *0.047U/10V_4X AC32 AL16 for S3 power reduction
C253 *0.047U/10V_4X AC31
VCC34 Auburndal VTT=1.05V AK21
VAXG24
AJ1
VCC35 VAXG25 VDDQ1 +1.5V_CPUVDDQ
C208 1U/6.3V_4X

- 1.5V RAILS
AC30 VCC36 VTT0_33 AF10 +VTT AK19 VAXG26 VDDQ2 AF1
AC29 AE10 AK18 AE7 C229 1U/6.3V_4X +1.5V_CPUVDDQ
VCC37 VTT0_34 C211 10U/6.3V_8X VAXG27 VDDQ3 C237 1U/6.3V_4X
AC28 VCC38 VTT0_35 AC10 AK16 VAXG28 VDDQ4 AE4
CPU CORE SUPPLY

C231 10U/6.3V_8X C218 1U/6.3V_4X

POWER
B AC27 VCC39 VTT0_36 AB10 AJ21 VAXG29 VDDQ5 AC1 B
AC26 Y10 AJ19 AB7 C194 1U/6.3V_4X
VCC40 VTT0_37 VAXG30 VDDQ6 C202 10U/6.3V_8X R446
AA35 VCC41 VTT0_38 W10 AJ18 VAXG31 VDDQ7 AB4
C188 10U/6.3V_8X
AA34 VCC42 VTT0_39 U10
Discrete only AJ16 VAXG32 VDDQ8 Y1
C197 *330U/2V_7343P_E6b
220_8

+
AA33 VCC43 VTT0_40 T10 AH21 VAXG33 VDDQ9 W7
AA32 J12 AH19 W4
C322 10U/6.3V_8X VCC44 VTT0_41 (15mils) VAXG34 VDDQ10
POWER

AA31 VCC45 VTT0_42 J11 AH18 VAXG35 VDDQ11 U1


AA30 VCC46 VTT0_43 J16 +VTT_43 R105 *short_6 AH16 VAXG36 VDDQ12 T7

3
C298 10U/6.3V_8X AA29 J15 +VTT_44 R99 *short_6 T4
VCC47 VTT0_44 R523 *short_8 VDDQ13
AA28 VCC48 VDDQ14 P1
C691 10U/6.3V_8X AA27 N7

DDR3
VCC49 PSI# VDDQ15
AA26 VCC50 PSI# AN33 PSI# [38] VDDQ16 N4 [12,35,39,40] MAINON_ON_G 2
C280 10U/6.3V_8X Y35 L1
VCC51 VDDQ17

FDI
Y34 +VTT J24 H1 Q56
C310 10U/6.3V_8X VCC52 VID0 C212 10U/6.3V_8X VTT1_45 VDDQ18 DMN601K-7_300MA
Y33 VCC53 VID[0] AK35 H_VID0 [38] J23 VTT1_46
Y32 AK33 VID1 C651 10U/6.3V_8X H25
H_VID1 [38]

1
C291 10U/6.3V_8X VCC54 VID[1] VID2 VTT1_47
Y31 VCC55 VID[2] AK34 H_VID2 [38]
Y30 AL35 VID3
VCC56 VID[3] H_VID3 [38]
C330 *10U/6.3V_8X Y29 AL33 VID4 P10
CPU VIDS

VCC57 VID[4] H_VID4 [38] VTT0_59 +VTT


Y28 AM33 VID5 +VTT K26 N10 C662 10U/6.3V_8X
VCC58 VID[5] H_VID5 [38] VTT1_48 VTT0_60

PEG & DMI


C349 *10U/6.3V_8X Y27 AM35 VID6 C604 10U/6.3V_8X J27 L10 C668 10U/6.3V_8X
VCC59 VID[6] H_VID6 [38] VTT1_49 VTT0_61
Y26 AM34 ICH_DPRSTP# ICH_DPRSTP# [38] C606 10U/6.3V_8X J26 K10 C652 10U/6.3V_8X
VCC60 PROC_DPRSLPVR C607 10U/6.3V_8X VTT1_50 VTT0_62 C653 10U/6.3V_8X
V35 J25 J22

1.1V
VCC61 C213 10U/6.3V_8X VTT1_51 VTT1_63
V34 VCC62 H27 VTT1_52 VTT1_64 J20
V33 VCC63 G28 VTT1_53 VTT1_65 J18
V32 VCC64 VTT_SELECT G15 TP47 G27 VTT1_54 VTT1_66 H21
V31 VCC65 G26 VTT1_55 VTT1_67 H20
V30 VCC66 H_VTTVID1=Low, 1.1V F26 VTT1_56 VTT1_68 H19
V29 E26
V28
VCC67 H_VTTVID1=High, 1.05V E25
VTT1_57
C VCC68 VTT1_58 C
V27 L26 +1.8V

1.8V
VCC69 VCCPLL1 C214 10U/6.3V_8X
V26 VCC70 VCCPLL2 L27
U35 M26 C355 4.7U/6.3V_6X
VCC71 VCCPLL3 C215 2.2U/6.3V_6X
U34 VCC72
U33 AN35 ISENSE C357 1U/6.3V_4X
SENSE LINES

VCC73 ISENSE ISENSE [38]


U32 IC,AUB_CFD_rPGA,R1P0 C656 1U/6.3V_4X
VCC74
U31 VCC75 VTT_SENSE B15 VTT_SENSE TP46
U30 VCC76 VSS_SENSE_VTT A15 TP_VSS_SENSE_VTT TP48
U29 VCC77
U28 VID0 R492 1K_4 +VTT
VCC78 R489 100/F_4 R490 *1K_4
U27 VCC79 +VCC_CORE
U26 AJ34 VCCSENSE [38] VID1 R495 1K_4
VCC80 VCC_SENSE R493 *1K_4
R35 VCC81 VSS_SENSE AJ35 VSSSENSE [38]
R34 R491 100/F_4 VID2 R497 1K_4
VCC82 R499 *1K_4
R33 VCC83
R32 VID3 R494 *1K_4
VCC84 R496 1K_4
R31 VCC85
R30 VID4 R501 *1K_4
VCC86 R502 1K_4
R29 VCC87
R28 VID5 R516 1K_4
VCC88 R512 *1K_4
R27 VCC89
R26 VID6 R498 *1K_4
VCC90 R500 1K_4
P35 VCC91
P34 ICH_DPRSTP# R507 1K_4
VCC92 R505 *1K_4
P33 VCC93
P32 PSI# R506 *1K_4
VCC94 R504 1K_4
P31 VCC95
P30 VCC96
P29 VCC97
D P28 VCC98 HFM_VID : Max 1.4V D
P27
P26
VCC99 +VCC_CORE LFM_VID : Min 0.65V
VCC100
IC,AUB_CFD_rPGA,R1P0

+
C676
+
C675 Quanta Computer Inc.
*330U/2V_7343P_E6b *330U/2V_7343P_E6b
PROJECT : TE2
Size Document Number Rev
2A
PROCESSER 3/4(POWER)
Date: Tuesday, March 09, 2010 Sheet 5 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)


U23H U23E
U23I
AT20 VSS1 VSS81 AE34 K27 VSS161 [12] DDR_VREF_DQ0 J17 SA_DIMM_VREF RSVD_NCTF_41 AT2
AT17 VSS2 VSS82 AE33 K9 VSS162 [13] DDR_VREF_DQ1 H17 SB_DIMM_VREF RSVD_NCTF_42 AT3
AR31 VSS3 VSS83 AE32 K6 VSS163 RSVD_NCTF_43 AR1
AR28 AE31 K3 CFG0 AM30 AL28
A VSS4 VSS84 VSS164 CFG[0] RSVD45 A
AR26 VSS5 VSS85 AE30 J32 VSS165 AM28 CFG[1] RSVD46 AL29
AR24 VSS6 VSS86 AE29 J30 VSS166 AP31 CFG[2] RSVD47 AP30
AR23 AE28 J21 CFG3 AL32 AP32
VSS7 VSS87 VSS167 CFG4 CFG[3] RSVD48
AR20 VSS8 VSS88 AE27 J19 VSS168 AL30 CFG[4] RSVD49 AL27
AR17 VSS9 VSS89 AE26 H35 VSS169 AM31 CFG[5] RSVD50 AT31
AR15 VSS10 VSS90 AE6 H32 VSS170 AN29 CFG[6]
AR12 AD10 H28 CFG7 AM32 AT32
VSS11 VSS91 VSS171 CFG[7] RSVD51
AR9 VSS12 VSS92 AC8 H26 VSS172 AK32 CFG[8] RSVD52 AP33
AR6 VSS13 VSS93 AC4 H24 VSS173 AK31 CFG[9] RSVD53 AR33
AR3 VSS14 VSS94 AC2 H22 VSS174 AK28 CFG[10] RSVD_NCTF_54 AT33
AP20 VSS15 VSS95 AB35 H18 VSS175 AJ28 CFG[11] RSVD_NCTF_55 AT34
AP17 VSS16 VSS96 AB34 H15 VSS176 AN30 CFG[12] RSVD_NCTF_56 AP35
AP13 VSS17 VSS97 AB33 H13 VSS177 AN32 CFG[13] RSVD_NCTF_57 AR35
AP10 VSS18 VSS98 AB32 H11 VSS178 AJ32 CFG[14] RSVD58 AR32
AP7 VSS19 VSS99 AB31 H8 VSS179 AJ29 CFG[15] RSVD_TP_59 E15
AP4 VSS20 VSS100 AB30 H5 VSS180 AJ30 CFG[16] RSVD_TP_60 F15
AP2 VSS21 VSS101 AB29 H2 VSS181 AK30 CFG[17]
AN34 AB28 G34 TP1 H16 A2
VSS22 VSS102 VSS182 RSVD_TP_86 KEY
AN31 VSS23 VSS103 AB27 G31 VSS183 RSVD62 D15
AN23 VSS24 VSS104 AB26 G20 VSS184 AP25 RSVD1 RSVD63 C15
AN20 VSS25 VSS105 AB6 G9 VSS185 AL25 RSVD2 RSVD64 AJ15 RSVD64_R R220 *0_4
AN17 AA10 G6 AL24 AH15 RSVD65_R R221 *0_4

RESERVED
VSS26 VSS106 VSS186 RSVD3 RSVD65
AM29 VSS27 VSS107 Y8 G3 VSS187 AL22 RSVD4 RSVD_TP_66 AA5
AM27 VSS28 VSS108 Y4 F30 VSS188 AJ33 RSVD5 RSVD_TP_67 AA4
AM25 VSS29 VSS109 Y2 F27 VSS189 AG9 RSVD6 RSVD_TP_68 R8
AM20 VSS30 VSS110 W35 F25 VSS190 M27 RSVD7 RSVD_TP_69 AD3
AM17 VSS31 VSS111 W34 F22 VSS191 L28 RSVD8 RSVD_TP_70 AD2
AM14 VSS32 VSS112 W33 F19 VSS192
AM11 VSS33 VSS113 W32 F16 VSS193 G25 RSVD11 RSVD_TP_71 AA2
B AM8 VSS34 VSS114 W31 E35 VSS194 G17 RSVD12 RSVD_TP_72 AA1 B
AM5 VSS35 VSS115 W30 E32 VSS195 E31 RSVD13 RSVD_TP_73 R9
AM2 VSS36 VSS116 W29 E29 VSS196 E30 RSVD14 RSVD_TP_74 AG7
AL34
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W28
W27
W26
E24
E21
E18
VSS197
VSS198
VSS199 VSS R88 *0_4 TP_RSVD17_R
B19
A19
A20
RSVD15
RSVD16
RSVD17
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
AE3
V4
V5
AL20 W6 E13 R94 *0_4 TP_RSVD18_R B20 N2
VSS40 VSS120 VSS200 RSVD18 RSVD_TP_78
AL17 VSS41 VSS121 V10 E11 VSS201 U9 RSVD19 RSVD_TP_79 AD5
AL12 VSS42 VSS122 U8 E8 VSS202 T9 RSVD20 RSVD_TP_80 AD7
AL9 VSS43 VSS123 U4 E5 VSS203
AL6 VSS44 VSS124 U2 E2 VSS204 AC9 RSVD21 RSVD_TP_81 W3
AL3 VSS45 VSS125 T35 D33 VSS205 AB9 RSVD22 RSVD_TP_82 W2
AK29 VSS46 VSS126 T34 D30 VSS206 C1 RSVD_NCTF_23 RSVD_TP_83 N3
AK27 VSS47 VSS127 T33 D26 VSS207 A3 RSVD_NCTF_24 RSVD_TP_84 AE5
AK25 VSS48 VSS128 T32 D9 VSS208 J29 RSVD26 RSVD_TP_85 AD9
AK20 VSS49 VSS129 T31 D6 VSS209 J28 RSVD27
AK17 VSS50 VSS130 T30 D3 VSS210 A34 RSVD_NCTF_28
AJ31 VSS51 VSS131 T29 C34 VSS211 A33 RSVD_NCTF_29
AJ23 T28 C32 C35 AP34 TP49
VSS52 VSS132 VSS212 RSVD_NCTF_30 VSS
AJ20 VSS53 VSS133 T27 C29 VSS213
AJ17 VSS54 VSS134 T26 C28 VSS214 B35 RSVD_NCTF_31
AJ14 VSS55 VSS135 T6 C24 VSS215 AJ13 RSVD32
AJ11 VSS56 VSS136 R10 C22 VSS216 AJ12 RSVD33
AJ8 VSS57 VSS137 P8 C20 VSS217 AH25 RSVD34
AJ5 VSS58 VSS138 P4 C19 VSS218 AK26 RSVD35
AJ2 VSS59 VSS139 P2 C16 VSS219 AL26 RSVD36
AH35 VSS60 VSS140 N35 B31 VSS220 AR2 RSVD_NCTF_37
AH34 VSS61 VSS141 N34 B25 VSS221 AJ26 RSVD38
AH33 VSS62 VSS142 N33 B21 VSS222 AJ27 RSVD39
C
AH32 VSS63 VSS143 N32 B18 VSS223 AP1 RSVD_NCTF_40 C
AH31 VSS64 VSS144 N31 B17 VSS224
AH30 N30 B13 IC,AUB_CFD_rPGA,R1P0
VSS65 VSS145 VSS225
AH29 VSS66 VSS146 N29 B11 VSS226
AH28 VSS67 VSS147 N28 B8 VSS227
AH27 VSS68 VSS148 N27 B6 VSS228
AH26 VSS69 VSS149 N26 B4 VSS229
AH20 VSS70 VSS150 N6 A29 VSS230
AH17 VSS71 VSS151 M10 A27 VSS231
AH13 VSS72 VSS152 L35 A23 VSS232
AH9 VSS73 VSS153 L32 A9 VSS233
AH6 VSS74 VSS154 L29
AH3 VSS75 VSS155 L8 AT35 VSS_NCTF1
AG10 VSS76 VSS156 L5 AT1 VSS_NCTF2 For Discrete only
AF8 L2 R188 *short_4 AR34
NCTF

VSS77 VSS157 R453 *short_4 VSS_NCTF3


AF4 VSS78 VSS158 K34 B34 VSS_NCTF4
AF2 K33 R447 *short_4 B2
VSS79 VSS159 VSS_NCTF5
AE35 VSS80 VSS160 K30 B1 VSS_NCTF6
A35 CFG0 R178 *3.01K/F_4
IC,AUB_CFD_rPGA,R1P0 VSS_NCTF7 CFG3 R174 3.01K/F_4
CFG4 R172 *3.01K/F_4
IC,AUB_CFD_rPGA,R1P0 CFG7 R175 *3.01K/F_4

1 0
CFG[ 1:0 ] - PCI_Epress Configuration Select
CFG4 Enabled; An external Display port * 11= 1 x 16 PEG
(Display Port Disabled; No Physical Display Port device is connected to the Embedded * 10= 2 x 8 PEG
D D
Presence) attached to Embedded Diplay Port Display port
The Clarkfield processor's PCI Express interface may
not meet PCI Express 2.0 jitter specifications. Intel CFG0
recommends placing a 3.01K +/- 5% pull down resistor to (PCI-Epress Single PEG Bifurcation enabled
VSS on CFG[7] pin for both rPGA and BGA components. Configuration Select)
This pull down resistor should be removed when this Quanta Computer Inc.
issue is fixed. CFG3
(PCI-Epress Static Normal Operation Lane Numbers Reversed PROJECT : TE2
Lane Reversal) 15 -> 0 , 14 -> 1 Size Document Number Rev
2A
PROCESSER 4/4 (GND)
Date: Tuesday, March 09, 2010 Sheet 6 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

INTVRMEN - Integrated SUS 1.1V VRM Enable


High - Enable Internal VRs

C760 12P/50V_4C
IBEX PEAK-M (LVDS,DDI)
2
IBEX PEAK-M (HDA,JTAG,SATA)
1
U30D
Y6 R582
+3V
U30A LAD0 [24,30] T48 L_BKLTEN Ibex-M SDVO_TVCLKINN BJ46
32.768KHZ_10 10M_4
LAD1 [24,30] T47 L_VDD_EN 4 OF 10 SDVO_TVCLKINP BG46
LAD2 [24,30]
3
4

RTC_X1 B13 RTCX1 Ibex-M FWH0 / LAD0 D33 LAD3 [24,30] Y48 L_BKLTCTL SDVO_STALLN BJ48
A C764 12P/50V_4C RTC_X2 D13 RTCX2 1 OF 10 FWH1 / LAD1 B33 R327
SDVO_STALLP BG48
A

LPC FWH2 / LAD2


FWH3 / LAD3
C32
A32
LFRAME# [24,30] 10K_4 AB48
Y45
L_DDC_CLK
L_DDC_DATA SDVO_INTN BF45
RTC_RST# C14 RTCRST# FWH4 / LFRAME# C34
A34 AB46
SDVO SDVO_INTP BH45
LDRQ0# L_CTRL_CLK
SRTC_RST# D17 SRTCRST# RTC (+3V) LDRQ1# / GPIO23
SERIRQ
F34
AB9
LDRQ#1 [24]
SERIRQ [24,30]
V48 L_CTRL_DATA SDVO_CTRLCLK
SDVO_CTRLDATA
T51
T53
+RTC_CELL R589 1M_4 SM_INTRUDER# A16 AP39
INTRUDER# LVD_IBG
SATA0RXN AK7 SATA_RXN0 [26] AP41 LVD_VBG DDPB_AUXN BG44
+RTC_CELL R586 330K_6 PCH_INVRMEN A14 AK6 SATA_RXP0 [26] BJ44
INTVRMEN SATA0RXP DDPB_AUXP

DISPLAY PORT B
SATA0TXN AK11
AK9
SATA_TXN0 [26] HDD AT43
AT42
LVD_VREFH DDPB_HPD AU38
SATA0TXP SATA_TXP0 [26] LVD_VREFL
DDPB_0N BD42
ACZ_BITCLK A30 AH6 LVDS--A BC42

Digital Display Interface


HDA_BCLK SATA1RXN SATA_RXN1 [26] DDPB_0P
ACZ_SYNC D29
P1
HDA_SYNC SATA1RXP AH5
AH9 SATA_TXN1_C C460 0.01U/25V_4X
SATA_RXP1 [26] ODD AV53
AV51
LVDSA_CLK# DDPB_1N BJ42
BG42
[10,27] PCBEEP SPKR SATA1TXN SATA_TXN1 [26] LVDSA_CLK DDPB_1P
ACZ_RST# C30 AH8 SATA_TXP1_C C459 0.01U/25V_4X SATA_TXP1 [26] BB40
HDA_RST# SATA1TXP DDPB_2N
[27] ACZ_SDIN0_AUDIO G30 HDA_SDIN0 BB47 LVDSA_DATA#0 DDPB_2P BA40

TP28
F30
E32
HDA_SDIN1
HDA_SDIN2
IHDA SATA2RXN
SATA2RXP
AF11
AF9
BA52
AY48
LVDSA_DATA#1
LVDSA_DATA#2
DDPB_3N
DDPB_3P
AW38
BA38
TP30 F32 AF7 AV47
TP31 ACZ_SDOUT HDA_SDIN3 SATA2TXN LVDSA_DATA#3
B29 HDA_SDO SATA2TXP AF6 DDPC_CTRLCLK Y49
H32 BB48 AB49
[10,30] PCH_GPIO33
J30
HDA_DOCK_EN# / GPIO33 (+3V) AH3 BA50
LVDSA_DATA0 DDPC_CTRLDATA
HDA_DOCK_RST# / GPIO13 (+3V_S5) SATA3RXN LVDSA_DATA1

DISPLAY PORT C
TP26
SATA SATA3RXP
SATA3TXN
AH1
AF3
AY49
AV48
LVDSA_DATA2
LVDSA_DATA3
DDPC_AUXN
DDPC_AUXP
BE44
BD44
SATA3TXP AF1 DDPC_HPD AV40
PCH_JTAG_TCK M3 JTAG_TCK
AD9 AP48
LVDS--B BE40
PCH_JTAG_TMS SATA4RXN LVDSB_CLK# DDPC_0N
K3 JTAG_TMS SATA4RXP AD8 AP47 LVDSB_CLK DDPC_0P BD40
SATA4TXN AD6 DDPC_1N BF41
PCH_JTAG_TDI K1 JTAG_TDI JTAG SATA4TXP AD5 AY53
AT49
LVDSB_DATA#0
LVDSB_DATA#1
DDPC_1P
DDPC_2N
BH41
BD38
PCH_JTAG_TDO J2 AD3 SATA_RXN5 [25] AU52 BC38
JTAG_TDO SATA5RXN LVDSB_DATA#2 DDPC_2P
SATA5RXP AD1 SATA_RXP5 [25] AT53 LVDSB_DATA#3 DDPC_3N BB36
PCH_JTAG_RST# J4 TRST# SATA5TXN AB3
AB1
SATA_TXN5 [25] ESATA AY51
DDPC_3P BA36
SATA5TXP SATA_TXP5 [25] LVDSB_DATA0
B AT48 LVDSB_DATA1 DDPD_CTRLCLK U50 B
AU50 LVDSB_DATA2 DDPD_CTRLDATA U52
SPI_CLK_R BA2 AF16 AT51
SPI_CLK SATAICOMPO LVDSB_DATA3

DISPLAY PORT D
DDPD_AUXN BC46
SPI_CS0#_R AV3 AF15 SATA_COMP R344 37.4/F_4 +1.05V AA52 BD46
SPI_CS0# SATAICOMPI CRT_BLUE DDPD_AUXP
AB53 CRT_GREEN DDPD_HPD AT38
TP67
SPI_CS1# AY3 SPI_CS1# SPI SATALED# T3 SATA_LED#
SATA_LED# [32] AD53 CRT_RED
CRT DDPD_0N BJ40
V51 CRT_DDC_CLK DDPD_0P BG40
SPI_SI_R AY1 V53 BJ38
[10] SPI_SI_R SPI_MOSI CRT_DDC_DATA DDPD_1N
Y9 R268 10K_4 BG38
SPI_SO AV1
(+3V) SATA0GP / GPIO21
V1 R544 10K_4
+3V
Y53
DDPD_1P
BF37
SPI_MISO (+3V_S5) SATA1GP / GPIO19 +3V
Y51
CRT_HSYNC DDPD_2N
BH37
IbexPeak-M_Rev1_0 CRT_VSYNC DDPD_2P
DDPD_3N BE36
R406 1K/F_4 DAC_IREF AD48 BD36
DAC_IREF DDPD_3P
AB51 CRT_IRTN
IbexPeak-M_Rev1_0

[RTC] Port Strap How to enable Port? How to disable Port?


RTC BATTERY LVDS L_DDC_DATA PU to 3.3V with 2.2k+/- 5% NC
+3VPCU +RTC_CELL
(20mils) Port B SDVO_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC
D39 CH501H-40PT_100MA (30mils)
C
(20mils) C

R_3VRTC D40 CH501H-40PT_100MA Port C DDPC_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC


C789

1U/10V_6X Port D DDPD_CTRLDATA PU to 3.3V with 2.2k+/- 5% NC


R610

1K_4
eDP CFG[4] PD to GND directly NC
RTC_N02 (20mils)
1 3 R608 1.91K/F_4 R607 1.91K/F_4 (20mils) +5VPCU
Q63
2

MMBT3904-7-F_200MA R611
CN8
6.8K/F_4
2
1
2
1
(20mils)
RTC_N03 R612 15K/F_4
AAA-BAT-046-K03

For AUDIO
[27] ACZ_RST#_AUDIO R595 33_4 ACZ_RST# RESET JUMP An RC delay circuit with a time delay in the range
PCH
[27] ACZ_SDOUT_AUDIO R592
C769
33_4 ACZ_SDOUT
*10P/50V_4C +RTC_CELL
of 18 ms to 25 ms should be provided
4M byte SPI ROM 2MB 4MB 8MB
[27] ACZ_SYNC_AUDIO R593 33_4 ACZ_SYNC PM55
C776 *10P/50V_4C R325 20K_6 RTC_RST#

D
[27] BIT_CLK_AUDIO R368 33_4 ACZ_BITCLK C468 G1 U17 HM55 D
C519 22P/50V_4N SPI_SO R277 0_4 SPI_SO_R 2 8 +3V
1U/6.3V_4X *SHORT_ PAD SO VDD
SPI_SI_R R300 0_4 SPI_SI 5 SI HOLD 7SPI_HOLD# R278 3.3K/F_4 HM57/PM57
+1.05V SPI_CLK_R R290 0_4 SPI_CLK 6 3 SPI_WP# R283 3.3K/F_4
SCK WP QM57/QS57
R549 *51_4 PCH_JTAG_TMS +RTC_CELL SPI_CS0#_R R266 0_4 SPI_CS0# 1 4 C454
CE VSS
R564 *51_4 PCH_JTAG_RST# W25Q32BVSSIG
R348 20K_6 SRTC_RST# 0.1U/10V_4X
R565 *51_4 PCH_JTAG_TDI
C484 G2
Quanta Computer Inc.
R548 *51_4 PCH_JTAG_TDO
1U/6.3V_4X *SHORT_ PAD PROJECT : TE2
R566 51_4 PCH_JTAG_TCK Size Document Number Rev
2A
PCH 1/5 (SATA,HDA,LPC)
Date: Tuesday, March 09, 2010 Sheet 7 of 45
1 2 3 4 5 6 7 8
5 4 3 2 1

IBEX PEAK-M (GND)


U30I
AY7 H49
B11
B15
VSS[159]
VSS[160]
VSS[259]
VSS[260] H5
J24
IBEX PEAK-M (PCI-E,SMBUS,CLK)
VSS[161] VSS[261] U30B
B19 VSS[162] VSS[262] K11
B23 VSS[163] VSS[263] K43
B31 VSS[164] VSS[264] K47
TP77 Ibex-M SMBus
B35
B39
VSS[165] VSS[265] K7
L14 TP78
BG30
BJ30
PERN1 2 OF 10 B9 SMBALERT#
D
B43
VSS[166] VSS[266]
L18 TP76 BF29
PERP1 (+3V_S5) SMBALERT# / GPIO11
H14 SCLK D
VSS[167] VSS[267] PETN1 SMBCLK SCLK [2,24,28]
B47 L2 TP75 BH29 C8 SDATA
VSS[168] VSS[268] PETP1 SMBDATA SDATA [2,24,28]
SMBL0ALERT#
B7 VSS[169] VSS[269] L22
TP22
(+3V_S5) SML0ALERT# / GPIO60 J14
SMB_CLK_ME0
BG12 VSS[170] VSS[270] L32 AW30 PERN2 SML0CLK C6
BB12 L36 TP25 BA30 G8 SMB_DATA_ME0
VSS[171] VSS[271] TP27 PERP2 SML0DATA SML1ALERT#
BB16 VSS[172] VSS[272] L40 BC30 PETN2 (+3V_S5) SML1ALERT# / GPIO74 M14
BB20 L52 TP24 BD30 E10 MBCLK2
BB24
VSS[173] VSS[273]
M12
PETP2 (+3V_S5) SML1CLK / GPIO58
G12 MBDATA2
BB30
VSS[174] VSS[274]
M16 [24] PCIE_RXN3 PCIE_RXN3 AU30 (+3V_S5) SML1DATA / GPIO75
VSS[175] VSS[275] PCIE_RXP3 PERN3
BB34 VSS[176] VSS[276] M20 [24] PCIE_RXP3 AT30 PERP3
BB38 N38 3G [24] PCIE_TXN3 C518 0.1U/10V_4X PCIE_TXN3_C AU32
VSS[177] VSS[277] C525 0.1U/10V_4X PCIE_TXP3_C AV32 PETN3
BB42 VSS[178] VSS[278] M34 [24] PCIE_TXP3 PETP3
BB49 M38 T13 CL_CLK1
VSS[179] VSS[279] +3V CL_CLK1 CL_CLK1 [24]
BB5
BC10
VSS[180] VSS[280] M42
M46
TP33
TP32
BA32
BB32
PERN4 Controller T11 CL_DATA1
VSS[181] VSS[281] PERP4 CL_DATA1 CL_DATA1 [24]
BC14
BC18
VSS[182] VSS[282] M49
M5
TP23
TP29
BD32
BE32
PETN4 Link T9 CL_RST#1
VSS[183] VSS[283] PETP4 CL_RST1# CL_RST#1 [24]
BC2 M8 PCIE_CLK_REQ1# R569 10K_4
VSS[184] VSS[284] PCIE_CLK_REQ2# R568 10K_4 PCIE_RXN5
BC22 VSS[185] VSS[285] N24 [24] PCIE_RXN5 BF33 PERN5
BC32 P11 [24] PCIE_RXP5 PCIE_RXP5 BH33
VSS[186] VSS[286] C770 0.1U/10V_4X PCIE_TXN5_C BG32 PERP5
BC36 VSS[187] VSS[287] AD15 WLAN [24] PCIE_TXN5 PETN5
BC40 P22 [24] PCIE_TXP5 C777 0.1U/10V_4X PCIE_TXP5_C BJ32
BC44
VSS[188]
VSS[189]
VSS[288]
VSS[289] P30
PCIE_RXN6
PETP5
PCI-E* PEG
BC52 VSS[190] VSS[290] P32 [28] PCIE_RXN6 BA34 PERN6
BH9 P34 [28] PCIE_RXP6 PCIE_RXP6 AW34 H1 PEG_CLKREQ#
BD48
VSS[191] VSS[291]
P42 LAN C540 0.1U/10V_4XPCIE_TXN6_C BC34
PERP6 (+3V_S5)PEG_A_CLKRQ# / GPIO47 AD43
VSS[192] VSS[292] [28] PCIE_TXN6 PETN6 CLKOUT_PEG_A_N CLK_PCIE_VGA# [14]
BD49 P45 [28] PCIE_TXP6 C533 0.1U/10V_4XPCIE_TXP6_C BD34 AD45
VSS[193] VSS[293] PETP6 CLKOUT_PEG_A_P CLK_PCIE_VGA [14]
BD5 VSS[194] VSS[294] P47 CLKOUT_DMI_N AN4 CLK_PCIE_3GPLLN [3]
BE12 VSS[195] VSS[295] R2 AT34 PERN7 CLKOUT_DMI_P AN2 CLK_PCIE_3GPLLP [3]
C BE16 VSS[196] VSS[296] R52 AU34 PERP7
C
BE20 VSS[197] VSS[297] T12 AU36 PETN7
BE24 T41 +3V_S5 AV36 AT1
VSS[198] VSS[298] PETP7 CLKOUT_DP_N / CLKOUT_BCLK1_N CLK_DREFSSCLKN [3]
BE30 VSS[199] VSS[299] T46 CLKOUT_DP_P / CLKOUT_BCLK1_P AT3 CLK_DREFSSCLKP [3]
BE34 T49 PCIE_CLK_REQ0# R326 10K_4 TP79 BG34
VSS[200] VSS[300] PCIE_CLK_REQ3# R538 *10K_4 TP80 PERN8
BE38 VSS[201] VSS[301] T5 BJ34 PERP8
BE42 T8 PCIE_CLK_REQ4# R294 10K_4 TP82 BG36 AW24 CLK_BUF_PCIE_3GPLLN [2]
VSS[202] VSS[302] PCIE_CLK_REQB# R355 10K_4 TP81 PETN8 CLKIN_DMI_N
BE46 VSS[203] VSS[303] U30 BJ36 PETP8 CLKIN_DMI_P BA24 CLK_BUF_PCIE_3GPLLP [2]
BE48 U31 PCIE_CLK_RQ5# R250 10K_4 AK48
VSS[204] VSS[304] SMBALERT# R559 10K_4 CLKOUT_PCIE0N
BE50 VSS[205] VSS[305] U32 AK47 CLKOUT_PCIE0P
BE6 U34 SMBL0ALERT# R349 10K_4 AP3 CLK_BUF_BCLKN [2]
VSS[206] VSS[306] SMB_CLK_ME0 R560 2.2K_4 PCIE_CLK_REQ0# CLKIN_BCLK_N
BE8 VSS[207] VSS[307] P38 P9 PCIECLKRQ0# / GPIO73 (+3V_S5) CLKIN_BCLK_P AP1 CLK_BUF_BCLKP [2]
BF3 V11 SMB_DATA_ME0 R561 2.2K_4 TP35 AM43

From CLK BUFFER


VSS[208] VSS[308] SML1ALERT# R351 10K_4 TP42 CLKOUT_PCIE1N
BF49 VSS[209] VSS[309] P16 AM45 CLKOUT_PCIE1P
BF51 V19 MBCLK2 R308 4.7K_4 F18 CLK_BUF_DREFCLKN [2]
VSS[210] VSS[310] MBDATA2 R324 4.7K_4 PCIE_CLK_REQ1# CLKIN_DOT_96N
BG18 V20 U4 E18
BG24
VSS[211] VSS[311]
V22 SCLK R306 2.2K_4 PCIECLKRQ1# / GPIO18 (+3V) CLKIN_DOT_96P CLK_BUF_DREFCLKP [2]
VSS[212] VSS[312] SDATA R307 2.2K_4 TP38
BG4 VSS[213] VSS[313] V30 AM47 CLKOUT_PCIE2N
BG50 V31 TP41 AM48 AH13 CLK_BUF_DREFSSCLKN [2]
VSS[214] VSS[314] CLKOUT_PCIE2P CLKIN_SATA_N / CKSSCD_N
BH11 VSS[215] VSS[315] V32 CLKIN_SATA_P / CKSSCD_P AH12 CLK_BUF_DREFSSCLKP [2]
BH15 V34 PEG_CLKREQ# R563 10K_4 PCIE_CLK_REQ2# N4
VSS[216] VSS[316] PCIECLKRQ2# / GPIO20 (+3V)
BH19 VSS[217] VSS[317] V35
BH23 V38 AH42 P41 R382 0_4 CLK_PCH_14M [2]
VSS[218] VSS[318] [28] CLK_PCIE_LAN# CLKOUT_PCIE3N REFCLK14IN
BH31 VSS[219] VSS[319] V43 LAN [28] CLK_PCIE_LAN AH41 CLKOUT_PCIE3P
BH35 V45 C541 *22P/50V_4N
VSS[220] VSS[320] PCIE_CLK_REQ3# CLK_PCI_FB
BH39 VSS[221] VSS[321] V46 [28] PCIE_CLK_REQ3# A8 PCIECLKRQ3# / GPIO25 (+3V_S5) CLKIN_PCILOOPBACK J42 CLK_PCI_FB [9]
BH43 VSS[222] VSS[322] V47
BH47 V49 Q58 2N7002_200MA AM51
VSS[223] VSS[323] [24] CLK_PCIE_3G# CLKOUT_PCIE4N
BH7 V5 MBCLK2 1 3 3G AM53 AH51 XTAL25_IN R613 0_4
VSS[224] VSS[324] 2ND_MBCLK [30] [24] CLK_PCIE_3G CLKOUT_PCIE4P XTAL25_IN
B
C12 VSS[225] VSS[325] V7 XTAL25_OUT AH53 XTAL25_OUT T95
B
C50 V8 PCIE_CLK_REQ4# M9
VSS[226] VSS[326] [24] PCIE_CLK_REQ4# PCIECLKRQ4# / GPIO26 (+3V_S5)
D51 W2 AF38 XCLK_RCOMP +1.05V
2

VSS[227] VSS[327] XCLK_RCOMP R389 90.9/F_4


E12 VSS[228] VSS[328] W52
E16 VSS[229] VSS[329] Y11 [24] CLK_PCIE_MINI# AJ50 CLKOUT_PCIE5N
E20 Y12 WLAN [24] CLK_PCIE_MINI AJ52 T45 CLK_FLEX0 R418 10K_4
E24
VSS[230] VSS[330]
Y15
CLKOUT_PCIE5P (+3V) CLKOUTFLEX0 / GPIO64 P43 CLK_FLEX1 T48
+3V
VSS[231] VSS[331] +3V_S5 (+3V_S5) (+3V) CLKOUTFLEX1 / GPIO65
E30 Y19 PCIE_CLK_RQ5# H6 T42 CLK_FLEX2 T50
E34
VSS[232] VSS[332]
Y23
[24] PCIE_CLK_RQ5# PCIECLKRQ5# / GPIO44 (+3V) CLKOUTFLEX2 / GPIO66 N50 CLK_CARD_5159
E38
VSS[233] VSS[333]
Y28
(+3V) CLKOUTFLEX3 / GPIO67 CLK_CARD_5159 [29]
VSS[234] VSS[334] TP83
E42 VSS[235] VSS[335] Y30 AK53 CLKOUT_PEG_B_N
2

E46
E48
VSS[236] VSS[336] Y31
Y32
TP84 AK51 CLKOUT_PEG_B_P Clock Flex C788 22P/50V_4N
VSS[237] VSS[337] MBDATA2 PCIE_CLK_REQB#
E6 VSS[238] VSS[338] Y38 1 3 2ND_MBDATA [30] P13 PEG_B_CLKRQ# / GPIO56(+3V_S5)
E8 VSS[239] VSS[339] Y43
F49 Y46 Q60 2N7002_200MA
VSS[240] VSS[340] IbexPeak-M_Rev1_0
F5 VSS[241] VSS[341] P49
G10 VSS[242] VSS[342] Y5
G14 VSS[243] VSS[343] Y6
G18 VSS[244] VSS[344] Y8
G2 VSS[245] VSS[345] P24
G22 VSS[246] VSS[346] T43
G32 VSS[247] VSS[347] AD51
G36 VSS[248] VSS[348] AT8
G40 VSS[249] VSS[349] AD47
G44 VSS[250] VSS[350] Y47
G52 VSS[251] VSS[351] AT12
AF39 VSS[252] VSS[352] AM6
H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
A H30 VSS[255] VSS[355] AK45 A
H34 VSS[256] VSS[356] AK39
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
IbexPeak-M_Rev1_0

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
PCH 2/5 (PCIE, SMBUS, CK)
Date: Tuesday, March 09, 2010 Sheet 8 of 45
5 4 3 2 1
1 2 3 4 5 6 7 8

IBEX PEAK-M (PCI,USB,NVRAM)


H40
U30E
Ibex-M AY9
IBEX PEAK-M (DMI,FDI,GPIO)
AD0 NV_CE#0
N34 AD1 5 OF 10 NV_CE#1 BD1
C44 AP15 U30C
AD2 NV_CE#2
A38 AD3 NV_CE#3 BD8 FDI_RXN0 BA18 FDI_TXN0 [3]
C36 AD4 [3] DMI_RXN0 BC24 DMI0RXN Ibex-M FDI_RXN1 BH17 FDI_TXN1 [3]
A
J34 AD5 NV_DQS0 AV9 [3] DMI_RXN1 BJ22 DMI1RXN 3 OF 10 FDI_RXN2 BD16 FDI_TXN2 [3] A
A40
D45
E36
AD6
AD7 NVRAM NV_DQS1 BG8

AP7
[3]
[3]
DMI_RXN2
DMI_RXN3
AW20
BJ20
DMI2RXN
DMI3RXN
FDI_RXN3
FDI_RXN4
BJ16
BA16
BE14
FDI_TXN3
FDI_TXN4
[3]
[3]
AD8 NV_DQ0 / NV_IO0 FDI_RXN5 FDI_TXN5 [3]
H48 AD9 NV_DQ1 / NV_IO1 AP6 [3] DMI_RXP0 BD24 DMI0RXP FDI_RXN6 BA14 FDI_TXN6 [3]
E40 AD10 NV_DQ2 / NV_IO2 AT6 [3] DMI_RXP1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_TXN7 [3]
C40 AD11 NV_DQ3 / NV_IO3 AT9 [3] DMI_RXP2 BA20 DMI2RXP
M48 AD12 NV_DQ4 / NV_IO4 BB1 [3] DMI_RXP3 BG20 DMI3RXP FDI_RXP0 BB18 FDI_TXP0 [3]
M45 AD13 NV_DQ5 / NV_IO5 AV6 FDI_RXP1 BF17 FDI_TXP1 [3]
F53 AD14 NV_DQ6 / NV_IO6 BB3 [3] DMI_TXN0 BE22 DMI0TXN FDI_RXP2 BC16 FDI_TXP2 [3]
M40
M43
AD15
AD16
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
BA4
BE4
[3]
[3]
DMI_TXN1
DMI_TXN2
BF21
BD20
DMI1TXN
DMI2TXN
DMI FDI FDI_RXP3
FDI_RXP4
BG16
AW16
FDI_TXP3
FDI_TXP4
[3]
[3]
J36 AD17 NV_DQ9 / NV_IO9 BB6 [3] DMI_TXN3 BE18 DMI3TXN FDI_RXP5 BD14 FDI_TXP5 [3]
K48 AD18 NV_DQ10 / NV_IO10 BD6 FDI_RXP6 BB14 FDI_TXP6 [3]
F40 AD19 NV_DQ11 / NV_IO11 BB7 [3] DMI_TXP0 BD22 DMI0TXP FDI_RXP7 BD12 FDI_TXP7 [3]
C42 AD20 NV_DQ12 / NV_IO12 BC8 [3] DMI_TXP1 BH21 DMI1TXP
K46 AD21 NV_DQ13 / NV_IO13 BJ8 [3] DMI_TXP2 BC20 DMI2TXP
M51 AD22 NV_DQ14 / NV_IO14 BJ6 [3] DMI_TXP3 BD18 DMI3TXP FDI_INT BJ14 FDI_INT [3]
J52 AD23 NV_DQ15 / NV_IO15 BG6 FDI_FSYNC0 BF13 FDI_FSYNC0 [3]
K51 AD24 FDI_FSYNC1 BH13 FDI_FSYNC1 [3]
L34 BD3 NV_ALE BH25 BJ12 FDI_LSYNC0 [3]
AD25 NV_ALE NV_ALE [10] DMI_ZCOMP FDI_LSYNC0
F42 AY6 +1.05V R591 49.9/F_4 DMI_COMP BF25 BG14 FDI_LSYNC1 [3]
AD26 NV_CLE DMI_IRCOMP FDI_LSYNC1
J40 AD27
G46 AD28
F44 AD29 NV_RCOMP AU2 NV_RCOMP R554 *32.4/F_4 System Power Management
PCI
M47 [3] SYS_RESET# SYS_RESET# T6 P12 SUSB# [30]
AD30 SYS_PWROK R297 *short_4 SYS_RESET# SLP_S3#
H36 AD31 NV_RB# AV7 M6 SYS_PWROK SLP_S4# H7 SUSC# [30]
R281 *short_4 B17
R296 *short_4 PWROK SLP_M#
J50 C/BE0# NV_WR#0_RE# AY8 K5 MEPWROK SLP_M# K8 TP12
G42 C/BE1# NV_WR#1_RE# AY5 TP23 N2
B H47 RSV_ICH_LAN_RST# A10 TP69 B
C/BE2# LAN_RST# SUS_PWR_ACK_R
G34 AV11 D9 M1
C/BE3# NV_WE#_CK0
BF5
[3] PM_DRAM_PWRGD
RSMRST# C16
DRAMPWROK (+3V_S5) SUS_PWR_DN_ACK / GPIO30 P7 AC_PRESENT
PCI_PIRQA# G38
NV_WE#_CK1 [30] RSMRST# RSMRST# (+3V_S5) ACPRESENT / GPIO31
Y1 CLKRUN#
PCI_PIRQB# H51
PIRQA# DNBSWON# P5
(+3V) CLKRUN# / GPIO32 P8
CLKRUN# [30]
RSV_SUS_SATA# TP10
PCI_PIRQC# PIRQB# [30] DNBSWON# PWRBTN# (+3V_S5) SUS_STAT# / GPIO61
PCI_PIRQD#
B37
A44
PIRQC# USBP0N H18
J18
USBP0- [23] CCD (+3V_S5)
(+3V_S5)
SUSCLK / GPIO62 F3
E4 SLP_S5# TP64
PIRQD# USBP0P USBP0+ [23] SLP_S5# / GPIO63
A18 PM_RI# F14 A6 PM_BATLOW# TP66
REQ0# F51
USBP1N
C18
TP14
PCIE_WAKE# J12
RI# (+3V_S5) BATLOW# / GPIO72
REQ0# USBP1P TP15 [24,28] PCIE_WAKE# WAKE#
REQ1# A46 N20 [3] PM_SYNC BJ10 F6
REQ1# / GPIO50 (+5V) USBP2- [31] (+3V_S5)
REQ2# B45 REQ2# / GPIO52 (+5V)
USBP2N
USBP2P P20 USBP2+ [31] Bluetooth PMSYNCH SLP_LAN# / GPIO29 TP68
REQ3# M53 J20
REQ3# / GPIO54 (+5V) USBP3- [29]
USBP3N
USBP3P L20 USBP3+ [29] Card Reader IbexPeak-M_Rev1_0
[10] GNT0# F48 F20 RSMRST# R338 10K_4
USBP4- [24]
[10] GNT1# K45
GNT0#
GNT1# / GPIO51 (+3V)
USBP4N
USBP4P G20 USBP4+ [24] SIM RSV_ICH_LAN_RST# R537 10K_4
TP34 F36 A20
GNT2# / GPIO53 (+3V) USBP5N USBP5- [24]
[10] GNT3# H53 GNT3# / GPIO55 (+3V) USBP5P C20 USBP5+ [24] WLAN +3V_S5
USBP6N M22 TP17
PIRQE# B41 N22 TP20
PIRQF# PIRQE# / GPIO2 (+5V) USBP6P
K53 PIRQF# / GPIO3 (+5V) USBP7N B21 TP72
PIRQG# A36 D21 +3V
INTH# PIRQG# / GPIO4 (+5V) USBP7P TP73
U16 C456
A48 PIRQH# / GPIO5 (+5V) USBP8N H22
J22
USBP8- [23]
USBP8+ [23]
USB *TC7SH08FU(F) *0.1U/10V_4X REQ2# R390 8.2K_4
USBP8P

5
R276 8.2K_4 PIRQE# R391 8.2K_4
+3V K6 PCIRST# USBP9N E22
F22
USBP9- [25] USB PLT_RST-R# 2 PIRQF# R600 8.2K_4
USBP9P USBP9+ [25]
USB
PCI_SERR# E44 A22 4 CLKRUN# R534 8.2K_4
SERR# USBP10N USBP10- [24] PLTRST# [3,24,28,29,30]
PCI_PERR# PIRQG# R375 8.2K_4
E50 PERR# USBP10P C22
G24
USBP10+ [24]
TP19
3G 1
SYS_RESET# R305 1K_4
USBP11N R260 R289
H24 TP21

3
PCI_IRDY# USBP11P
C
A42 IRDY# USBP12N L24 TP18 *100K/F_4 C
H44 M24 100K_4
PAR USBP12P TP16 +3V_S5
PCI_DEVSEL# F46 A24 R274 *short_4
DEVSEL# USBP13N USBP13- [25]
PCI_FRAME# C46 FRAME# USBP13P C24 USBP13+ [25] ESATA PM_RI# R332 10K_4
PCI_PLOCK# D49 PM_BATLOW# R539 10K_4
PLOCK#
USBRBIAS# B25 USB_BIAS R590 22.6/F_4 PCIE_WAKE# R310 10K_4
PCI_STOP# D41 SUS_PWR_ACK_R R567 10K_4
PCI_TRDY# STOP# R261 *short_4 AC_PRESENT R257 10K_4
C48 TRDY# USBRBIAS D25 VGA_PLTRST# [14]
DNBSWON# R272 *10K_4
TP9 M7 PME# USB_OC0#
N16
PLT_RST-R# D5
(+3V_S5)OC0# / GPIO59 J16 USB_OC1#
PLTRST# (+3V_S5)OC1# / GPIO40 F16 USB_OC2#
R601 22_4 CLK_33M_LPC_R N52
(+3V_S5)OC2# / GPIO41 L16 USB_OC3#
[24] PCLK_DEBUG
TP43 P53
CLKOUT_PCI0 (+3V_S5)OC3# / GPIO42 E14 USBOC#8 +3V_S5
TP36 P46
CLKOUT_PCI1 (+3V_S5)OC4# / GPIO43 G16 USB_OC5#
USBOC#8 [23,30] +3V_S5
R602 22_4 CLK_PCI_FB_R P51
CLKOUT_PCI2 (+3V_S5)OC5# / GPIO9 F12 USBOC#13_9 C457 0.1U/10V_4X
[8] CLK_PCI_FB
R403 22_4 CLK_PCI_EC CLKOUT_PCI3 (+3V_S5)OC6# / GPIO10 SCI#
USBOC#13_9 [25,30]
[30] PCLK_591 P48 CLKOUT_PCI4 (+3V_S5)OC7# / GPIO14 T15 SCI# [30]

2
Q28 2N7002_200MA

IbexPeak-M_Rev1_0 3 1 SUS_PWR_ACK_R
[30] SUS_PWR_ACK

5
[3,38] DELAY_VR_PWRGOOD 1
4 SYS_PWROK
C571 C560 C566 2
[3,30] MPWROK
U15

3
22P/50V_4N 22P/50V_4N 22P/50V_4N R542 *0_4 TC7SH08FU(F) R301

R259 100K_4 10K_4


D D

+3V_S5 +3V +3V


RP7 RP10 RP9
5 6 USB_OC1# 5 6 PCI_PLOCK# 5 6 PCI_PIRQD#
USBOC#13_9 4 7 USB_OC0# REQ3# 4 7 PCI_PERR# PCI_IRDY# 4 7 PCI_SERR#
USBOC#8
SCI#
3 8 USB_OC5#
USB_OC2#
PCI_DEVSEL#
PCI_TRDY#
3 8 REQ0#
PCI_PIRQB#
PCI_STOP#
PCI_PIRQA#
3 8 REQ1#
PCI_FRAME#
Quanta Computer Inc.
2 9 2 9 2 9
USB_OC3# 1 10 +3V_S5 INTH# 1 10 +3V PCI_PIRQC# 1 10 +3V PROJECT : TE2
8.2KX8 8.2KX8 8.2KX8 Size Document Number Rev
2A
PCH 3/5 (PCI,ONFI,USB,DMI)
Date: Tuesday, March 09, 2010 Sheet 9 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD) IBEX PEAK-M (GND)


U30F U30H
Ibex-M
BOARD_ID1 Y3 BMBUSY# / GPIO0 (+3V) 6 OF 10 CLKOUT_PCIE6N AH45 TP39 AB16 VSS[0] VSS[80] AK30

PCH Strap Pin Configuration Table


AH46 TP44 AA19 AK31
BOARD_ID6 CLKOUT_PCIE6P VSS[1] VSS[81]
C38 AA20 AK32
TACH1 / GPIO1 (+3V) AA22
VSS[2] VSS[82]
AK34
GPIO6 VSS[3] VSS[83]
D37 TACH2 / GPIO6 (+3V) TP40
AM19 VSS[4] VSS[84] AK35
CLKOUT_PCIE7N AF48 AA24 VSS[5] VSS[85] AK38
[24] CPUSB# BOARD_ID4 J32 TACH3 / GPIO7 (+3V) GPIO CLKOUT_PCIE7P AF47 TP37 AA26
AA28
VSS[6]
VSS[7]
VSS[86]
VSS[87]
AK43
AK46
GPIO8 F10 GPIO8 (+3V_S5) MISC AA30
AA31
VSS[8]
VSS[9]
VSS[88]
VSS[89]
AK49
AK5
SPKR
A GPIO12 K9 U2 GATEA20 GATEA20 [30] AA32 AK8 A
LAN_PHY_PWR_CTRL / GPIO12 (+3V_S5) A20GATE
AB11
VSS[10] VSS[90]
AL2
GPIO15 VSS[11] VSS[91] *1K/F_4 R556
T7 GPIO15 (+3V_S5) AB15 VSS[12] VSS[92] AL52 [7,27] PCBEEP +3V
AB23 VSS[13] VSS[93] AM11
GPIO16 AA2 AM3 AB30 BB44
SATA4GP / GPIO16 (+3V) CLKOUT_BCLK0_N/CLKOUT_PCIE8N CLK_CPU_BCLKN [3] VSS[14] VSS[94]
AB31 VSS[15] VSS[95] AD24 0 = Default Mode (Internal weak Pull-down)
GPIO17 F38 AM1 AB32 AM20
TACH0 / GPIO17(+3V) CLKOUT_BCLK0_P/CLKOUT_PCIE8P CLK_CPU_BCLKP [3] VSS[16] VSS[96] 1 = No Reboot Mode with TCO Disabled
AB39 VSS[17] VSS[97] AM22
GPIO22 Y7 BG10 PCH_PECI_R AB43 AM24
SCLOCK / GPIO22 (+3V) PECI H_PECI [3] VSS[18] VSS[98]
AB47 VSS[19] VSS[99] AM26
GPIO27 AB12 T1 RCIN# RCIN# [30] AB5 AM28 GNT3#/
GPIO27 (+3V_S5) RCIN# VSS[20] VSS[100]
GPIO28 V13 GPIO28 (+3V_S5)
CPU PROCPWRGD BE10 H_PWRGOOD [3]
AB8
AC2
VSS[21]
VSS[22]
VSS[101]
VSS[102]
BA42
AM30 GPIO55
AC52 VSS[23] VSS[103] AM31
ESATA_DN# AB7 BD10 PCH_THRMTRIP#_R R313 56.2/F_4 AD11 AM32
[25] ESATA_DN# SATA2GP / GPIO36 (+3V) THRMTRIP# PM_THRMTRIP# [3]
AD12
VSS[24] VSS[104]
AM34 R603 *10K/F_4
VSS[25] VSS[105] [9] GNT3#
GPIO37 AB13 BA22 AD16 AM35
SATA3GP / GPIO37 (+3V) TP1
AW22 R312 56.2/F_4 AD23
VSS[26] VSS[106]
AM38
TP2 +VTT VSS[27] VSS[107]
GPIO39 P3 BB22 AD30 AM39
SDATAOUT0 / GPIO39 (+3V) TP3
AY45 AD31
VSS[28] VSS[108]
AM42
TP4 VSS[29] VSS[109]
TP5 AY46 AD32 VSS[30] VSS[110] AU20 0 = Default Mode (Internal weak Pull-down)
GPIO46 F1 AV43 AD34 AM46
[3] DDR3_DRAMRST#_PCH PCIECLKRQ7# / GPIO46 (+3V_S5) TP6
AV45 AU22
VSS[31] VSS[111]
AV22
1 = No Reboot Mode with TCO Disabled
BOARD_ID5 TP7 VSS[32] VSS[112]
AB6 SDATAOUT1 / GPIO48 (+3V) TP8 AF13 AD42 VSS[33] VSS[113] AM49
TP9 M18 AD46 VSS[34] VSS[114] AM7
TEMP_ALERT# AA4 N18 AD49 AA50
[3,30] TEMP_ALERT# SATA5GP / GPIO49 (+3V) TP10 VSS[35] VSS[115]
RSVD TP11 AJ24
AK41
AD7
AE2
VSS[36] VSS[116] BB10
AN32
HDA_DOCK_EN
TP12
AK42 AE4
VSS[37] VSS[117]
AN50
#/GPIO33
TP13 VSS[38] VSS[118]
TP14 M32 AF12 VSS[39] VSS[119] AN52
GPIO24 H10 N32 Y13 AP12 JP1 *SHORT PAD
GPIO45 H3
GPIO24 (+3V_S5) TP15
M30 AH49
VSS[40] VSS[120]
AP42 R371 1K_4 2 1
PCIECLKRQ6# / GPIO45 (+3V_S5) TP16 VSS[41] VSS[121] [7,30] PCH_GPIO33
GPIO57 F8 N30 AU4 AP46
BOARD_ID2 M11
GPIO57 (+3V_S5) TP17
H12 AF35
VSS[42] VSS[122]
AP49
BOARD_ID3 V6
STP_PCI# / GPIO34 (+3V) TP18
AA23 AP13
VSS[43] VSS[123]
AP5
B
GPIO38 SATACLKREQ# / GPIO35(+3V) TP19 VSS[44] VSS[124] B
V3 SLOAD / GPIO38 (+3V) NC_1 AB45 AN34 VSS[45] VSS[125] AP8 0 = Top Block Swap Mode
AB38 AF45 AR2
NC_2
AB42 AF46
VSS[46] VSS[126]
AR52
1 = Default Mode (Internal pull-up)
NC_3 VSS[47] VSS[127]
NC_4 AB41 AF49 VSS[48] VSS[128] AT11
NC_5 T39 AF5 VSS[49] VSS[129] BA12
P6 TP8 AF8 AH48 GNT0#,
INIT3_3V# VSS[50] VSS[130] GNT0# R397 *1K/F_4
TP24 C10 AG2 VSS[51] VSS[131] AT32 [9] GNT0#
AG52 VSS[52] VSS[132] AT36 GNT1# [9] GNT1# GNT1# R599 *1K/F_4
A4 VSS_NCTF_1 VSS_NCTF_16 BH2 AH11 VSS[53] VSS[133] AT41
A49 VSS_NCTF_2 VSS_NCTF_17 BH52 AH15 VSS[54] VSS[134] AT47
A5 VSS_NCTF_3 VSS_NCTF_18 BH53 AH16 VSS[55] VSS[135] AT7
A50
A52
VSS_NCTF_4 NCTF VSS_NCTF_19 BJ1
BJ2
AH24
AH32
VSS[56] VSS[136] AV12
AV16 Boot BIOS Strap
VSS_NCTF_5 VSS_NCTF_20 VSS[57] VSS[137]
A53 VSS_NCTF_6 VSS_NCTF_21 BJ4 AV18 VSS[58] VSS[138] AV20
B2 BJ49 AH43 AV24 PCI_GNT0# GNT#1 Boot BIOS Location
VSS_NCTF_7 VSS_NCTF_22 VSS[59] VSS[139]
B4 VSS_NCTF_8 VSS_NCTF_23 BJ5 AH47 VSS[60] VSS[140] AV30
B52 BJ50 AH7 AV34 0 0 LPC
VSS_NCTF_9 VSS_NCTF_24 VSS[61] VSS[141]
B53 VSS_NCTF_10 VSS_NCTF_25 BJ52 AJ19 VSS[62] VSS[142] AV38
BE1 BJ53 AJ2 AV42 0 1 Reserved (NAND)
VSS_NCTF_11 VSS_NCTF_26 VSS[63] VSS[143]
BE53 VSS_NCTF_12 VSS_NCTF_27 D1 AJ20 VSS[64] VSS[144] AV46
BF1 D2 AJ22 AV49 1 0 PCI
VSS_NCTF_13 VSS_NCTF_28 VSS[65] VSS[145]
BF53 VSS_NCTF_14 VSS_NCTF_29 D53 AJ23 VSS[66] VSS[146] AV5
BH1 E1 AJ26 AV8 1 1 SPI
VSS_NCTF_15 VSS_NCTF_30 VSS[67] VSS[147]
VSS_NCTF_31 E53 AJ28 VSS[68] VSS[148] AW14
+3V AJ32 AW18
IbexPeak-M_Rev1_0 VSS[69] VSS[149]
AJ34 VSS[70] VSS[150] AW2 SPI_MOSI
AT5 VSS[71] VSS[151] BF9
RCIN# R557 10K_4 AJ4 AW32
VSS[72] VSS[152]
AK12 VSS[73] VSS[153] AW36
GATEA20 R543 10K_4 AM41 AW40
VSS[74] VSS[154] R279 *1K_4
AN19 VSS[75] VSS[155] AW52 [7] SPI_SI_R +3V
TEMP_ALERT# R573 10K_4 AK26 AY11
VSS[76] VSS[156]
AK22 VSS[77] VSS[157] AY43
ESATA_DN# R632 10K_4 AK23 AY47
VSS[78] VSS[158]
C
+3V_S5 GPIO6 R378 10K_4
AK28 VSS[79] NV_ALE C

IbexPeak-M_Rev1_0 R574 *10K_4 +1.8V


[9] NV_ALE
GPIO46 R562 10K_4
GPIO16 R572 10K_4 1 = Enabled
GPIO45 R540 *10K_4
GPIO17 R379 10K_4 0 = Disabled (Default)
GPIO24 R275 *10K_4
GPIO22 R302 10K_4 GPIO8
GPIO57 R311 10K_4 GPIO8 R309 10K_4 +3V_S5
GPIO27 R254 *10K_4

GPIO28 R252 10K_4 This signal has a weak internal pull up.
GPIO12 R264 10K_4 NOTE: This signal should not be pulled low
GPIO37 R334 10K_4

GPIO38 R570 10K_4


GPIO15
GPIO15 R267 1K_4 +3V_S5
GPIO39 R535 10K_4

0 = Intel ME Crypto Transport Layer Security (TLS) cipher


suite with no confidentiality
1 = Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality
BOARD ID SETTING GPIO27
Board ID ID1 ID2 ID3 ID4 ID5 ID6 +3V +3V +3V +3V
GPIO27 R271 *10K_4

UMA SKU H
D VGA SKU L 0 = Disables the VccVRM. Need to use D
on-board filter circuits for analog rails.
W/ MDC H +3V R380 10K_4 BOARD_ID4 R270 R251 R280 R545
W/O MDC L *10K_4 1 = Enables the internal VccVRM to have a clean supply for analog rails.
HM@10K_4 MDC@10K_4 *IV@10K_4 No need to use on-board filter circuit.
W/ HDMI H This signal has a weak internal pull-up.
W/O HDMI L BOARD_ID5 BOARD_ID3 BOARD_ID2 BOARD_ID1
+3V R377 10K_4 BOARD_ID6 BT_Detect# [31]
W/O 3G H
W/ 3G L
R288 R269 R295 R571 Quanta Computer Inc.
15" H
14" L 10K_4 *HM@10K_4 *MDC@10K_4 10K_4
PROJECT : TE2
W/O BT H Size Document Number Rev
W/ BT L PCH 4/5 (GPIO & Strap) 2A

Date: Friday, March 19, 2010 Sheet 10 of 45


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+VCCA_DAC_1_2=69mA(15mils)
+VCCA_DAC_1_2 R415 *short_6+3V
+1.05V R421 *0_6 +3V_LDO

*short_8 VCCCORE = 1.432A(80mils) C3A


R411 U30G POWER C569 10U/6.3V_8X
U30J POWER
+1.05V_VCCCORE_ICH AB24 VCCCORE[1] VCCADAC[1] AE50 C557 0.1U/10V_4X Ibex-M
A
C522 1U/6.3V_4X AB26 VCCCORE[2] Ibex-M TP85 VCCACLK AP51 VCCACLK[1] 10 OF 10VCCIO[5] V24 +1.05V_VCCUSBCORE R609 *short_6 +1.05V A
AB28 VCCCORE[3] 7 OF 10 VCCADAC[2] AE52 C555 0.01U/25V_4X
VCCIO[6] V26
C513 4.7U/6.3V_6X AD26 AP53 Y24 C512 1U/6.3V_4X
VCCCORE[4] VCCACLK[2] VCCIO[7]
AD28 VCCCORE[5] CRT VSSA_DAC[1] AF53 DCPSUSBYP Y20 DCPSUSBYP VCCIO[8] Y26
AF26
AF28
VCCCORE[6]
AF51 VCCALVDS= 59mA(15mils) C489 0.1U/10V_4X
USB V28 +3V_S5_VCCPUSB R359 *short_6
VCCCORE[7] VSSA_DAC[2] VCCSUS3_3[1] +3V_S5
AF30 U28
AF31
VCCCORE[8]
VCCCORE[9]
VCCLAN = 0.32A(30mils) VCCSUS3_3[2]
VCCSUS3_3[3] U26 C496 0.1U/10V_4X
AH26 AH38 R381 *short_6 +1.05V R420 *short_6 +1.05V_VCCAUX AF23 U24
+1.05V VCCCORE[10] VCCALVDS VCCLAN[1] VCCSUS3_3[4] C516 0.1U/10V_4X
AH28 VCCCORE[11] VSSA_LVDS AH39 VCCSUS3_3[5] P28
AH30
AH31
VCCCORE[12] LVDS AP43 VCCTX_LVDS R395 *short_6
AF24 VCCLAN[2] VCCSUS3_3[6] P26
N28 C515 *0.047U/10V_4X
VCCCORE[13] VCCTX_LVDS[1] C552 *10U/6.3V_8X VCCSUS3_3[7]
AJ30 VCCCORE[14] VCCTX_LVDS[2] AP45 VCCSUS3_3[8] N26
AJ31 AT46 C544 *0.1U/10V_4X AD38 M28
+1.05V *short_6 VCCCORE[15] VCCTX_LVDS[3] C547 *0.01U/25V_4X VCCME[1] VCCSUS3_3[9]
AT45 M26
40mA(15mils)
R393
VCC CORE
VCCTX_LVDS[4]
+1.05V R604 *short_8 +1.05V_VCCEPW AD39 VCCME[2]
VCCSUS3_3[10]
VCCSUS3_3[11] L28
VCCSUS3_3[12] L26
+1.05V_PCH_VCCDPLL_EXP AK24 AB34 +3V_VCC_GIO R374 *short_6 AD41 J28
R345 R353 VCCIO[24] VCC3_3[2] +3V VCCME = 1.849A(100mils) VCCME[3] VCCSUS3_3[13]
VCCSUS3_3[14] J26
TP74 +V1.1LAN_VCCAPLL_EXP BJ24 AB35 C535 0.1U/10V_4X AF43 H28
VCCAPLLEXP VCC3_3[3] VCCME[4] VCCSUS3_3[15]
*short_1206 *short_1206 AN20
HVCMOS AD35 C546 10U/6.3V_8X AF41
VCCSUS3_3[16] H26
G28
AN22
VCCIO[25]
VCCIO[26]
VCC3_3[4] VCC3_3 = 0.357A(30mils) VCCME[5] VCCSUS3_3[17]
VCCSUS3_3[18] G26
+V1.1S_VCC_EXP AN23 C545 10U/6.3V_8X AF42 F28
VCCIO[27] VCCME[6] VCCSUS3_3[19]

Clock and Miscellaneous


C782 C490 4.7U/6.3V_6X AN24 F26
+ AN26
VCCIO[28]
VCCIO[29]
VCCVRM= 196mA(15mils) C537 1U/6.3V_4X V39 VCCME[7]
VCCSUS3_3[20]
VCCSUS3_3[21] E28
C501 1U/6.3V_4X AN28 AT24 +1.8S_VCCADMI_VRM R581 *short_6 +1.8V E26
*330U/2V_7343P_E6b VCCIO[30] VCCVRM[2] C532 1U/6.3V_4X VCCSUS3_3[22]
BJ26 VCCIO[31] V41 VCCME[8] VCCSUS3_3[23] C28
C510 1U/6.3V_4X BJ28 AT16 VCCDMI R577 *short_6 VCCDMI=
+VTT C26
VCCIO[32] VCCDMI[1] VCCSUS3_3[24]
B C500 1U/6.3V_4X
AT26
AT28
VCCIO[33] DMI AU16 C475 1U/6.3V_4X 61mA(15mils)
C543 1U/6.3V_4X V42 VCCME[9] VCCSUS3_3[25] B27
A28 B
VCCIO[34] VCCDMI[2] VCCSUS3_3[26]
AU26 VCCIO[35] Y39 VCCME[10] VCCSUS3_3[27] A26
C498 1U/6.3V_4X AU28 VCCIO[36]
AV26 Y41 U23
C488 0.1U/10V_4X AV28
VCCIO[37]
PCI E* AM16
VCCME[11] VCCSUS3_3[28] V5REF_SUS< 1mA
AW26
VCCIO[38]
VCCIO[39]
VCCPNAND[1]
VCCPNAND[2] AK16 VCCPNAND= 156mA(15mils) Y42 VCCME[12] VCCIO[56] V23 +1.05V_VCCUSBCORE
C508 0.1U/10V_4X AW28 AK20
VCCIO[40] VCCPNAND[3] +V_NVRAM_VCCQR285 *short_8 +VCCRTCEXT V5REF_SUS R358 100/F_4 +5V_S5
BA26 VCCIO[41] VCCPNAND[4] AK19 +1.8V V9 DCPRTC V5REF_SUS F24
C495 0.1U/10V_4X BA28 AK15 C467 0.1U/10V_4X
VCCIO[42] VCCPNAND[5] C483 0.1U/10V_4X D14 CH501H-40PT_100MA
BB26 VCCIO[43] VCCPNAND[6] AK13 +3V_S5
BB28 VCCIO[44] VCCPNAND[7] AM12 +1.8V AU24 VCCVRM[3]
BC26 AM13 C509 1U/6.3V_4X
VCCIO = 3.062A(150mils) BC28
VCCIO[45]
VCCIO[46]
VCCPNAND[8]
VCCPNAND[9] AM15 68mA(15mils)
BD26 L41 10uh_8_100MA+V1.1LAN_VCCA_A_DPL BB51
BD28
VCCIO[47]
VCCIO[48] +1.05V C792 1U/6.3V_4X BB53
VCCADPLLA[1]
VCCADPLLA[2]
V5REF< 1mA
NAND / SPI

+
BE26 C790 *220U/2.5V_3528P_E35b K49 V5REF R402 100/F_4
BE28
VCCIO[49]
VCCIO[50]
VCCME3_3= 85mA(15mils) R606 0_8 V5REF +5V
BG26 AM8 BD51 D15 CH501H-40PT_100MA +3V
VCCIO[51] VCCME3_3[1] VCCADPLLB[1]
BG28 VCCIO[52] VCCME3_3[2] AM9 +3.3V_VCCME_SPIR553 *short_6 +3V +V1.1LAN_VCCA_B_DPL BD53 VCCADPLLB[2] PCI/GPIO/LPC
BH27 AP11 C787 1U/6.3V_4X C549 1U/6.3V_4X
C524 *0.1U/10V_4X VCCIO[53] VCCME3_3[3] C474 0.1U/10V_4X R605 *short_6 +1.05V_SSCVCC
AN30 VCCIO[54] VCCME3_3[4] AP9 +1.05V AH23 VCCIO[21]
AN31 C497 1U/6.3V_4X AJ35 J38 +3V_VCCPPCI R372 *short_6 +3V
VCCIO[55] VCCIO[22] VCC3_3[8]
AH35 VCCIO[23] VCC3_3[9] L38
+3V R384 *short_6 +3V_VCCA3GBG AN35 C528 1U/6.3V_4X AF34 M36
VCC3_3[1] VCCIO[2] VCC3_3[10] C527 0.1U/10V_4X
AH34 N36
VCCIO = 3.062A(150mils) C526 1U/6.3V_4X AF32
VCCIO[3]
VCCIO[4]
VCC3_3[11]
VCC3_3[12] P36 C536 0.1U/10V_4X
+1.8V R385 *short_6+VCCAFDI_VRM AT22 U35
VCCVRM[1] VCC3_3[13]
TP71 +V1.1LAN_VCCAPLL_FDI BJ18
FDI C472 0.1U/10V_4X +VCCSST V12
VCC3_3[14] AD13
VCCFDIPLL DCPSST
C C
+1.05V R398 *short_6 +1.05V_VCCDPLL_FDI AM23 VCCIO[1]
+V1.1LAN_INT_VCCSUS Y22 DCPSUS
C486 0.1U/10V_4X
37mA(15mils) IbexPeak-M_Rev1_0 +3V_LDO
PCI/GPIO/LPC AK3
VCCSUS3_3 = 0.163A(20mils) P18 VCCSUS3_3[29]
VCCSATAPLL[1]
VCCSATAPLL[2] AK1 +V1.1LAN_VCCAPLL TP70
+3V_S5 R352 *short_6 +3V_S5_VCCPSUS U19 VCCSUS3_3[30]
U20 VCCSUS3_3[31]
Reserve for clear CRT Power VCC3_3 = 0.357A(30mils) C477 0.1U/10V_4X U22 VCCSUS3_3[32] VCCVRM[4] AT20 R579 *short_6 +1.8V
U21 C575 V15 AH22 +VCC_SATA R585 *short_6 +1.05V
R425 R343 *short_6 +3V_VCCPCORE VCC3_3[5] VCCIO[9]
[30,35,36,37,39] MAINON 1 SHDN VO 5 +3V V16 VCC3_3[6] VCCIO[10] AH19
*10U/6.3V_8X *52.3K/F_4 Y16 AD20 C479 1U/6.3V_4X
+5V C480 0.1U/10V_4X VCC3_3[7] VCCIO[11]
2 GND VCCIO[12] AF22
AD19
3 VIN SET 4 V_CPU >1mA(15mils)+VTT R580 *short_6 +VTT_VCCPCPU AT18 V_CPU_IO[1]
VCCIO[13]
VCCIO[14] AF20 VCCIO = 3.062A(150mils)
C481 4.7U/6.3V_6X AU18 V_CPU_IO[2] SATA VCCIO[15] AF19
C577 *G913C R424 C478
C491
0.1U/10V_4X
0.1U/10V_4X
CPU VCCIO[16] AH20
VCCIO[17] AB19
*0.1U/10V_4X *0_4 AB20
VCCRTC= 2mA(15mils)
+RTC_CELL A12 VCCRTC
VCCIO[18]
VCCIO[19] AB22
C756 0.1U/10V_4X RTC VCCIO[20] AD22
VCCME = 1.849A(100mils)
C757 0.1U/10V_4X

+3V_S5 R363 *short_6 +V3.3A_1.5A_HDA_IO L30 AA34 +1.05V_VCCEPW


VCCSUSHDA VCCME[13]
VCCME[14] Y34
+1.5V_S5 R367 *0_6 HDA VCCME[15] Y35
VCCME[16] AA35
VCCSUSHDA= 6mA(15mils) C517 1U/6.3V_4X
IbexPeak-M_Rev1_0
D D

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
PCH 5/5 (POWER)
Date: Wednesday, March 10, 2010 Sheet 11 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

12
JDIM1A M_A_DQ[63:0] [4]
[4] M_A_A[15:0]
M_A_A0 98 5 M_A_DQ0
A
M_A_A1 A0 DQ0 M_A_DQ1 +1.5VSUS A
97 A1 DQ1 7
M_A_A2 96 15 M_A_DQ3
M_A_A3 A2 DQ2 M_A_DQ2
95 A3 DQ3 17
M_A_A4 92 4 M_A_DQ4
M_A_A5 A4 DQ4 M_A_DQ5 JDIM1B
91 A5 DQ5 6
M_A_A6 90 16 M_A_DQ7 75 44
M_A_A7 A6 DQ6 M_A_DQ6 VDD1 VSS16
86 A7 DQ7 18 76 VDD2 VSS17 48
M_A_A8 89 21 M_A_DQ8 81 49
M_A_A9 A8 DQ8 M_A_DQ9 VDD3 VSS18
85 A9 DQ9 23 82 VDD4 VSS19 54
M_A_A10 107 33 M_A_DQ10 87 55
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD5 VSS20
84 A11 DQ11 35 88 VDD6 VSS21 60
M_A_A12 83 22 M_A_DQ13 93 61
M_A_A13 A12/BC# DQ12 M_A_DQ12 VDD7 VSS22
SO-DIMMA SPD Address is 0XA0 119 A13 DQ13 24 94 VDD8 VSS23 65
SO-DIMMA TS Address is 0X30 M_A_A14 80 34 M_A_DQ14 99 66
M_A_A15 A14 DQ14 M_A_DQ15 VDD9 VSS24
78 A15 DQ15 36 100 VDD10 VSS25 71
39 M_A_DQ16 105 72
DQ16 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


[4] M_A_BS#0 109 41 M_A_DQ17 106 127
BA0 DQ17 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


[4] M_A_BS#1 108 51 M_A_DQ18 111 128
BA1 DQ18 M_A_DQ19 VDD13 VSS28
[4] M_A_BS#2 79 BA2 DQ19 53 112 VDD14 VSS29 133
[4] M_A_CS#0 114 40 M_A_DQ20 117 134
S0# DQ20 M_A_DQ21 VDD15 VSS30
[4] M_A_CS#1 121 S1# DQ21 42 118 VDD16 VSS31 138
101 50 M_A_DQ22 123 139 +SMDDR_VTERM
[4] M_A_CLKP0 CK0 DQ22 VDD17 VSS32
[4] M_A_CLKN0 103 52 M_A_DQ23 124 144
CK0# DQ23 M_A_DQ25 VDD18 VSS33
[4] M_A_CLKP1 102 CK1 DQ24 57 VSS34 145
[4] M_A_CLKN1 104 59 M_A_DQ24 +3V 199 150
CK1# DQ25 M_A_DQ26 VDDSPD VSS35 R198
[4] M_A_CKE0 73 CKE0 DQ26 67 VSS36 151
[4] M_A_CKE1 74 69 M_A_DQ27 77 155 22_4
CKE1 DQ27 M_A_DQ28 NC1 VSS37
[4] M_A_CAS# 115 CAS# DQ28 56 122 NC2 VSS38 156
[4] M_A_RAS# 110 58 M_A_DQ29 125 161
RAS# DQ29 M_A_DQ30 NCTEST VSS39
B [4] M_A_WE# 113 WE# DQ30 68 VSS40 162 B

3
R176 10K/F_4 DIMM0_SA0 197 70 M_A_DQ31 [3] PM_EXTTS#0 PM_EXTTS#0 198 167
R171 10K/F_4 DIMM0_SA1 SA0 DQ31 M_A_DQ32 EVENT# VSS41 Q23
201 SA1 DQ32 129 [3,13] DDR3_DRAMRST# 30 RESET# VSS42 168
[2,13] CGCLK_SMB 202 131 M_A_DQ33 +1.5VSUS R45 *1K/F_4 172 2N7002_200MA
SCL DQ33 M_A_DQ35 VSS43
[2,13] CGDAT_SMB 200 SDA DQ34 141 VSS44 173 [5,35,39,40] MAINON_ON_G 2
143 M_A_DQ34 R46 *0_4 SMDDR_VREF_DQ0 1 178
DQ35 M_A_DQ37 [6] DDR_VREF_DQ0 SMDDR_VREF_DIMM VREF_DQ VSS45
[4] M_A_ODT0 116 ODT0 DQ36 130 126 VREF_CA VSS46 179
[4] M_A_ODT1 120 132 M_A_DQ36 184
ODT1 DQ37 M_A_DQ38 VSS47
[4] M_A_DM[7:0] 140 185

1
M_A_DM0 DQ38 M_A_DQ39 R47 VSS48
11 DM0 DQ39 142 2 VSS1 VSS49 189
M_A_DM1 28 147 M_A_DQ40 3 190
M_A_DM2 DM1 DQ40 M_A_DQ41 100K/F_4 VSS2 VSS50
46 DM2 DQ41 149 8 VSS3 VSS51 195
M_A_DM3 M_A_DQ42

(204P)
(204P)

63 DM3 DQ42 157 9 VSS4 VSS52 196


M_A_DM4 136 159 M_A_DQ43 13 for S3 power reduction
M_A_DM5 DM4 DQ43 M_A_DQ44 VSS5
153 DM5 DQ44 146 14 VSS6
M_A_DM6 170 148 M_A_DQ45 19
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS7
187 DM7 DQ46 158 20 VSS8
[4] M_A_DQSP[7:0] 160 M_A_DQ47 25
M_A_DQSP0 DQ47 M_A_DQ48 VSS9
12 DQS0 DQ48 163 26 VSS10 VTT1 203 +SMDDR_VTERM
M_A_DQSP1 29 165 M_A_DQ49 31 204
M_A_DQSP2 DQS1 DQ49 M_A_DQ55 VSS11 VTT2
47 DQS2 DQ50 175 32 VSS12
M_A_DQSP3 64 177 M_A_DQ54 37
M_A_DQSP4 DQS3 DQ51 M_A_DQ52 VSS13
137 DQS4 DQ52 164 38 VSS14
M_A_DQSP5 154 166 M_A_DQ53 43

GND

GND
M_A_DQSP6 DQS5 DQ53 M_A_DQ50 VSS15
171 DQS6 DQ54 174
[4] M_A_DQSN[7:0] M_A_DQSP7 188 176 M_A_DQ51
M_A_DQSN0 DQS7 DQ55 M_A_DQ56 DDRSK-20401-TP4B
10 181

205

206
M_A_DQSN1 DQS#0 DQ56 M_A_DQ60
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ62
M_A_DQSN3 DQS#2 DQ58 M_A_DQ59
C
62 DQS#3 DQ59 193 C
M_A_DQSN4 135 180 M_A_DQ61
M_A_DQSN5 DQS#4 DQ60 M_A_DQ57
152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ63
M_A_DQSN7 DQS#6 DQ62 M_A_DQ58
186 DQS#7 DQ63 194

DDRSK-20401-TP4B

Place these Caps near So-Dimm0.

SMDDR_VREF_DQ0 +SMDDR_VTERM SMDDR_VREF_DIMM [13]


+1.5VSUS
C281 470P/50V_4X R149 *short_4 +SMDDR_VREF
C82 0.1U/10V_4X
C170 4.7U/6.3V_6X C359 1U/6.3V_4X R142 *10K/F_4 R141 *10K/F_4 +1.5VSUS
C78 2.2U/6.3V_6X
C234 4.7U/6.3V_6X C367 1U/6.3V_4X

C203 4.7U/6.3V_6X C366 1U/6.3V_4X

C165 4.7U/6.3V_6X SMDDR_VREF_DIMM C361 1U/6.3V_4X +1.5VSUS

C220 4.7U/6.3V_6X C239 0.1U/10V_4X C371 4.7U/6.3V_6X

C210 4.7U/6.3V_6X C262 2.2U/6.3V_6X +1.5VSUS


R42
D C199 0.1U/10V_4X C250 *0.047U/10V_4X 1K/F_4 D

C190 0.1U/10V_4X SMDDR_VREF_DQ0

C184 0.1U/10V_4X +3V + C142

C177 0.1U/10V_4X C353 2.2U/6.3V_6X R39 C85 C89 *330U/2.5V_7343P_E9a

C195 0.1U/10V_4X C358 *0.1U/10V_4X


1K/F_4 0.1U/10V_4X *0.047U/10V_4X Quanta Computer Inc.
C180 *0.047U/10V_4X C356 *0.047U/10V_4X PROJECT : TE2
Size Document Number Rev
C187 *0.047U/10V_4X 2A
DDR3 DIMM-0
Date: Wednesday, March 10, 2010 Sheet 12 of 43
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

13
JDIM2A M_B_DQ[63:0] [4]
[4] M_B_A[15:0] +1.5VSUS
M_B_A0 98 5 M_B_DQ4
M_B_A1 A0 DQ0 M_B_DQ5
A
97 A1 DQ1 7 A
M_B_A2 96 15 M_B_DQ7
M_B_A3 A2 DQ2 M_B_DQ6
95 A3 DQ3 17 JDIM2B
M_B_A4 92 4 M_B_DQ0
M_B_A5 A4 DQ4 M_B_DQ1
91 A5 DQ5 6 75 VDD1 VSS16 44
M_B_A6 90 16 M_B_DQ3 76 48
M_B_A7 A6 DQ6 M_B_DQ2 VDD2 VSS17
86 A7 DQ7 18 81 VDD3 VSS18 49
M_B_A8 89 21 M_B_DQ12 82 54
M_B_A9 A8 DQ8 M_B_DQ13 VDD4 VSS19
85 A9 DQ9 23 87 VDD5 VSS20 55
M_B_A10 107 33 M_B_DQ11 88 60
M_B_A11 A10/AP DQ10 M_B_DQ15 VDD6 VSS21
84 A11 DQ11 35 93 VDD7 VSS22 61
M_B_A12 83 22 M_B_DQ9 94 65
M_B_A13 A12/BC# DQ12 M_B_DQ8 VDD8 VSS23
119 A13 DQ13 24 99 VDD9 VSS24 66
M_B_A14 80 34 M_B_DQ14 100 71
M_B_A15 A14 DQ14 M_B_DQ10 VDD10 VSS25
78 A15 DQ15 36 105 VDD11 VSS26 72
39 M_B_DQ20 106 127
DQ16 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


PC2100 DDR3 SDRAM SO-DIMM
[4] M_B_BS#0 109 41 M_B_DQ21 111 128
BA0 DQ17 M_B_DQ23 VDD13 VSS28
[4] M_B_BS#1 108 BA1 DQ18 51 112 VDD14 VSS29 133
[4] M_B_BS#2 79 53 M_B_DQ22 117 134
BA2 DQ19 M_B_DQ16 VDD15 VSS30
[4] M_B_CS#0 114 S0# DQ20 40 118 VDD16 VSS31 138
[4] M_B_CS#1 121 42 M_B_DQ17 123 139
S1# DQ21 M_B_DQ19 VDD17 VSS32
[4] M_B_CLKP0 101 CK0 DQ22 50 124 VDD18 VSS33 144
[4] M_B_CLKN0 103 52 M_B_DQ18 145
CK0# DQ23 M_B_DQ29 VSS34
[4] M_B_CLKP1 102 CK1 DQ24 57 +3V 199 VDDSPD VSS35 150
[4] M_B_CLKN1 104 59 M_B_DQ28 151
CK1# DQ25 M_B_DQ26 VSS36
[4] M_B_CKE0 73 CKE0 DQ26 67 77 NC1 VSS37 155
[4] M_B_CKE1 74 69 M_B_DQ27 122 156
CKE1 DQ27 M_B_DQ24 NC2 VSS38
[4] M_B_CAS# 115 CAS# DQ28 56 125 NCTEST VSS39 161
[4] M_B_RAS# 110 58 M_B_DQ25 162
RAS# DQ29 M_B_DQ30 VSS40
[4] M_B_WE# 113 WE# DQ30 68 [3] PM_EXTTS#1 198 EVENT# VSS41 167
B R177 10K/F_4 DIMM1_SA0 197 70 M_B_DQ31 [3,12] DDR3_DRAMRST# 30 168 B
R180 10K/F_4 DIMM1_SA1 201 SA0 DQ31 M_B_DQ32 RESET# VSS42
+3V SA1 DQ32 129 VSS43 172
[2,12] CGCLK_SMB 202 131 M_B_DQ36 173
SCL DQ33 M_B_DQ34 R36 *0_4 SMDDR_VREF_DQ1 VSS44
[2,12] CGDAT_SMB 200 SDA DQ34 141 [6] DDR_VREF_DQ1 1 VREF_DQ VSS45 178
143 M_B_DQ35 [12] SMDDR_VREF_DIMM 126 179
DQ35 M_B_DQ37 VREF_CA VSS46
[4] M_B_ODT0 116 ODT0 DQ36 130 VSS47 184
[4] M_B_ODT1 120 132 M_B_DQ33 185
ODT1 DQ37 M_B_DQ38 R37 VSS48
[4] M_B_DM[7:0] DQ38 140 2 VSS1 VSS49 189
M_B_DM0 11 142 M_B_DQ39 3 190
M_B_DM1 DM0 DQ39 M_B_DQ40 100K/F_4 VSS2 VSS50
SO-DIMMB SPD Address is 0XA4 28 DM1 DQ40 147 8 VSS3 VSS51 195
M_B_DM2 M_B_DQ41

(204P)
SO-DIMMB TS Address is 0X34 46 DM2 DQ41 149 9 VSS4 VSS52 196
M_B_DM3 M_B_DQ42
(204P)

63 DM3 DQ42 157 13 VSS5


M_B_DM4 136 159 M_B_DQ43 14
M_B_DM5 DM4 DQ43 M_B_DQ45 VSS6
153 DM5 DQ44 146 19 VSS7
M_B_DM6 170 148 M_B_DQ44 20
M_B_DM7 DM6 DQ45 M_B_DQ46 VSS8
187 DM7 DQ46 158 25 VSS9
[4] M_B_DQSP[7:0] 160 M_B_DQ47 26 203 +SMDDR_VTERM
M_B_DQSP0 DQ47 M_B_DQ48 VSS10 VTT1
12 DQS0 DQ48 163 31 VSS11 VTT2 204
M_B_DQSP1 29 165 M_B_DQ49 32
M_B_DQSP2 DQS1 DQ49 M_B_DQ55 VSS12
47 DQS2 DQ50 175 37 VSS13
M_B_DQSP3 64 177 M_B_DQ51 38
M_B_DQSP4 DQS3 DQ51 M_B_DQ52 VSS14
137 164 43

GND

GND
M_B_DQSP5 DQS4 DQ52 M_B_DQ53 VSS15
154 DQS5 DQ53 166
M_B_DQSP6 171 174 M_B_DQ54
M_B_DQSP7 DQS6 DQ54 M_B_DQ50 DDRSK-20401-TP8D
[4] M_B_DQSN[7:0] 188 176

205

206
M_B_DQSN0 DQS7 DQ55 M_B_DQ61
10 DQS#0 DQ56 181
M_B_DQSN1 27 183 M_B_DQ60
M_B_DQSN2 DQS#1 DQ57 M_B_DQ58
45 DQS#2 DQ58 191
M_B_DQSN3 62 193 M_B_DQ62
M_B_DQSN4 DQS#3 DQ59 M_B_DQ56
C
135 DQS#4 DQ60 180 C
M_B_DQSN5 152 182 M_B_DQ57
M_B_DQSN6 DQS#5 DQ61 M_B_DQ63
169 DQS#6 DQ62 192
M_B_DQSN7 186 194 M_B_DQ59
DQS#7 DQ63

DDRSK-20401-TP8D

Place these Caps near So-Dimm1.

+1.5VSUS SMDDR_VREF_DIMM +SMDDR_VTERM

C161 4.7U/6.3V_6X C268 0.1U/10V_4X C370 1U/6.3V_4X

C164 4.7U/6.3V_6X C282 2.2U/6.3V_6X C372 1U/6.3V_4X


+1.5VSUS
C233 4.7U/6.3V_6X C258 *0.047U/10V_4X C375 1U/6.3V_4X
D3A: Remove C92 for cost down.
C217 4.7U/6.3V_6X C363 1U/6.3V_4X

C238 4.7U/6.3V_6X SMDDR_VREF_DQ1 C376 4.7U/6.3V_6X R31 +1.5VSUS


1K/F_4
C181 4.7U/6.3V_6X C73 0.1U/10V_4X
SMDDR_VREF_DQ1
C183 0.1U/10V_4X C80 2.2U/6.3V_6X

D C191 0.1U/10V_4X + C92 D


R30 C84 C88
C172 0.1U/10V_4X +3V 1K/F_4 0.1U/10V_4X *0.047U/10V_4X *330U/2.5V_7343P_E9a

C178 0.1U/10V_4X C362 2.2U/6.3V_6X

C201 0.1U/10V_4X C368 *0.1U/10V_4X

C200 *0.047U/10V_4X C365 *0.047U/10V_4X


Quanta Computer Inc.
C192 *0.047U/10V_4X PROJECT : TE2
Size Document Number Rev
2A
DDR3 DIMM-1
Date: Wednesday, March 10, 2010 Sheet 13 of 43
1 2 3 4 5 6 7 8
5 4 3 2 1

U24A PEG_TXP[0..15] PEG_RXP[0..15]


[3] PEG_TXP[0..15] [3] PEG_RXP[0..15]
PEG_TXN[0..15] PEG_RXN[0..15]
[3] PEG_TXN[0..15] [3] PEG_RXN[0..15]

PEG_TXP15 AA38 Y33 CPEG_RXP15 C179 0.1U/10V_4X


[3] PEG_TXP15 PCIE_RX0P PCIE_TX0P PEG_RXP15 [3]
PEG_TXN15 Y37 Y32 CPEG_RXN15 C176 0.1U/10V_4X
[3] PEG_TXN15 PCIE_RX0N PCIE_TX0N PEG_RXN15 [3]
D D
PEG_TXP14 Y35 W33 CPEG_RXP14 C185 0.1U/10V_4X
[3] PEG_TXP14 PCIE_RX1P PCIE_TX1P PEG_RXP14 [3]
PEG_TXN14 W36 W32 CPEG_RXN14 C189 0.1U/10V_4X
[3] PEG_TXN14 PCIE_RX1N PCIE_TX1N PEG_RXN14 [3]

[3] PEG_TXP13
[3] PEG_TXN13
PEG_TXP13
PEG_TXN13
W38
V37
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
U33
U32
CPEG_RXP13
CPEG_RXN13
C186
C182
0.1U/10V_4X
0.1U/10V_4X
PEG_RXP13 [3]
PEG_RXN13 [3]
JTAG
PEG_TXP12 V35 U30 CPEG_RXP12 C193 0.1U/10V_4X
[3] PEG_TXP12 PCIE_RX3P PCIE_TX3P PEG_RXP12 [3]
PEG_TXN12 U36 U29 CPEG_RXN12 C196 0.1U/10V_4X
[3] PEG_TXN12 PCIE_RX3N PCIE_TX3N PEG_RXN12 [3]

PEG_TXP11 U38 T33 CPEG_RXP11 C198 0.1U/10V_4X


[3] PEG_TXP11 PCIE_RX4P PCIE_TX4P PEG_RXP11 [3]
PEG_TXN11 T37 T32 CPEG_RXN11 C204 0.1U/10V_4X
[3] PEG_TXN11 PCIE_RX4N PCIE_TX4N PEG_RXN11 [3]

PCI EXPRESS INTERFACE


PEG_TXP10 T35 T30 CPEG_RXP10 C227 0.1U/10V_4X
[3] PEG_TXP10 PCIE_RX5P PCIE_TX5P PEG_RXP10 [3]
PEG_TXN10 R36 T29 CPEG_RXN10 C216 0.1U/10V_4X
[3] PEG_TXN10 PCIE_RX5N PCIE_TX5N PEG_RXN10 [3]

PEG_TXP9 R38 P33 CPEG_RXP9 C205 0.1U/10V_4X


[3] PEG_TXP9 PCIE_RX6P PCIE_TX6P PEG_RXP9 [3]
PEG_TXN9 P37 P32 CPEG_RXN9 C209 0.1U/10V_4X
[3] PEG_TXN9 PCIE_RX6N PCIE_TX6N PEG_RXN9 [3]
C C

PEG_TXP8 P35 P30 CPEG_RXP8 C245 0.1U/10V_4X


[3] PEG_TXP8 PCIE_RX7P PCIE_TX7P PEG_RXP8 [3]
PEG_TXN8 N36 P29 CPEG_RXN8 C236 0.1U/10V_4X
[3] PEG_TXN8 PCIE_RX7N PCIE_TX7N PEG_RXN8 [3]

PEG_TXP7 N38 N33 CPEG_RXP7 C246 0.1U/10V_4X


[3] PEG_TXP7 PCIE_RX8P PCIE_TX8P PEG_RXP7 [3]
PEG_TXN7 M37 N32 CPEG_RXN7 C259 0.1U/10V_4X
[3] PEG_TXN7 PCIE_RX8N PCIE_TX8N PEG_RXN7 [3]

PEG_TXP6 M35 N30 CPEG_RXP6 C270 0.1U/10V_4X


[3] PEG_TXP6 PCIE_RX9P PCIE_TX9P PEG_RXP6 [3]
PEG_TXN6 L36 N29 CPEG_RXN6 C264 0.1U/10V_4X
[3] PEG_TXN6 PCIE_RX9N PCIE_TX9N PEG_RXN6 [3]

PEG_TXP5 L38 L33 CPEG_RXP5 C275 0.1U/10V_4X


[3] PEG_TXP5 PCIE_RX10P PCIE_TX10P PEG_RXP5 [3]
PEG_TXN5 K37 L32 CPEG_RXN5 C284 0.1U/10V_4X
[3] PEG_TXN5 PCIE_RX10N PCIE_TX10N PEG_RXN5 [3]

PEG_TXP4 K35 L30 CPEG_RXP4 C294 0.1U/10V_4X


[3] PEG_TXP4 PCIE_RX11P PCIE_TX11P PEG_RXP4 [3]
PEG_TXN4 J36 L29 CPEG_RXN4 C305 0.1U/10V_4X
[3] PEG_TXN4 PCIE_RX11N PCIE_TX11N PEG_RXN4 [3]

PEG_TXP3 J38 K33 CPEG_RXP3 C313 0.1U/10V_4X


[3] PEG_TXP3 PCIE_RX12P PCIE_TX12P PEG_RXP3 [3]
PEG_TXN3 H37 K32 CPEG_RXN3 C326 0.1U/10V_4X
[3] PEG_TXN3 PCIE_RX12N PCIE_TX12N PEG_RXN3 [3]
B B

PEG_TXP2 H35 J33 CPEG_RXP2 C336 0.1U/10V_4X


[3] PEG_TXP2 PCIE_RX13P PCIE_TX13P PEG_RXP2 [3]
PEG_TXN2 G36 J32 CPEG_RXN2 C343 0.1U/10V_4X
[3] PEG_TXN2 PCIE_RX13N PCIE_TX13N PEG_RXN2 [3]

PEG_TXP1 G38 K30 CPEG_RXP1 C350 0.1U/10V_4X


[3] PEG_TXP1 PCIE_RX14P PCIE_TX14P PEG_RXP1 [3]
PEG_TXN1 F37 K29 CPEG_RXN1 C341 0.1U/10V_4X
[3] PEG_TXN1 PCIE_RX14N PCIE_TX14N PEG_RXN1 [3]

PEG_TXP0 F35 H33 CPEG_RXP0 C352 0.1U/10V_4X


[3] PEG_TXP0 PCIE_RX15P PCIE_TX15P PEG_RXP0 [3]
PEG_TXN0 E37 H32 CPEG_RXN0 C354 0.1U/10V_4X
[3] PEG_TXN0 PCIE_RX15N PCIE_TX15N PEG_RXN0 [3]

CLOCK
[8] CLK_PCIE_VGA AB35 PCIE_REFCLKP
[8] CLK_PCIE_VGA# AA36 PCIE_REFCLKN
For M97 only Madison and Park the PWRGOOD ball
CALIBRATION
is for test purposes and must be conneccted to ground
AJ21 Y30 R147 1.27K/F_4
NC#1 PCIE_CALRP
AK21 NC#2
R112 PARK_MAD@10K_4 R152 2K/F_4
A
AH16 PWRGOOD PCIE_CALRN Y29 +1V_GPU +1.0V A

R71 0_4 PERST#_BUF AA30


[9] VGA_PLTRST# PERSTB
Quanta Computer Inc.
No stuff when Debug Mode Madison/Park_M2
PROJECT : TE2
Size Document Number Rev
For M97, Broadway, Madison and Park PCIE_VDDC is 1.0V 2A
Madison/Park-HOST I/F
Date: Tuesday, March 09, 2010 Sheet 14 of 45
5 4 3 2 1
5 4 3 2 1

GPU Power-on sequence U24B

1 => +VGPU_CORE
2 => +VGPU_IO TXCAP_DPA3P
AU24 EXT_HDMICLK+
EXT_HDMICLK-
HDM@0.1U/10V_4X
HDM@0.1U/10V_4X
C267
C256
HDMICLK+ [22]
TXCAM_DPA3N AV23 HDMICLK- [22]
3 => +1V_GPU AT25 EXT_HDMITX0P HDM@0.1U/10V_4X C300
TX0P_DPA2P HDMITX0P [22]
4 => +1.5V_GPU MUTI GFX
DPA TX0M_DPA2N AR24 EXT_HDMITX0N HDM@0.1U/10V_4X C311
HDMITX0N [22]
AU26 EXT_HDMITX1P HDM@0.1U/10V_4X C289
5 => +3V_D TX1P_DPA1P
TX1M_DPA1N AV25 EXT_HDMITX1N HDM@0.1U/10V_4X C276
HDMITX1P [22]
HDMITX1N [22]
6 => +1.8V_GPU AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27 EXT_HDMITX2P
EXT_HDMITX2N
HDM@0.1U/10V_4X
HDM@0.1U/10V_4X
C323
C332
HDMITX2P [22]
AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26 HDMITX2N [22]
D 7 => +GPU_PWROK NC on Park
AP8
AW8
DVPCNTL_0
AR30
D
DVPCNTL_1 TXCBP_DPB3P T80 R482 R479 R485 R486 R484 R483 R487 R488
AR3 DVPCNTL_2 TXCBM_DPB3N AT29
AR1 T73 HDM@499/F_4 HDM@499/F_4 HDM@499/F_4 HDM@499/F_4 HDM@499/F_4 HDM@499/F_4 HDM@499/F_4 HDM@499/F_4
DVPCLK
[21] RAM_STRAP0 AU1 DVPDATA_0 TX3P_DPB2P AV31
AU3 AU30 T69
[21] RAM_STRAP1 DVPDATA_1 TX3M_DPB2N
[21]
[21]
RAM_STRAP2
RAM_STRAP3
AW3
AP6
DVPDATA_2
DVPDATA_3
DPB
TX4P_DPB1P AR32
T79
DP EXT_HDMICLK+ C817 *HM@4.7P/50V_4C EXT_HDMICLK-
AW5 AT31 T63
[21] RAM_STRAP4 DVPDATA_4 TX4M_DPB1N

3
AU5 T76 PLACE AC CAP EXT_HDMITX0P C819 *HM@4.7P/50V_4C EXT_HDMITX0N
DVPDATA_5
AR6 DVPDATA_6 TX5P_DPB0P AT33 CLOSE TO
1.8V GPIO AW6 DVPDATA_7 TX5M_DPB0N AU32 T61
CONNECTOR
EXT_HDMITX1P C816 *HM@4.7P/50V_4C EXT_HDMITX1N
AU6 T54 +5V 2
DVPDATA_8 EXT_HDMITX2P C818 *HM@4.7P/50V_4C EXT_HDMITX2N
AT7 DVPDATA_9 TXCCP_DPC3P AU14
AV7 AV13 T55
DVPDATA_10 TXCCM_DPC3N T64 R480 Q57
AN7 DVPDATA_11
AV9 AT15

1
DVPDATA_12 TX0P_DPC2P T65 HDM@100K_4 HDM@2N7002_200MA
AT9 DVPDATA_13 TX0M_DPC2N AR14
AR10 T70
DVPDATA_14 DPC
AW10 DVPDATA_15 TX1P_DPC1P AU16
AU10 AV15 T68
DVPDATA_16 TX1M_DPC1N T56
AP10 DVPDATA_17
AV11 DVPDATA_18 TX2P_DPC0P AT17
AT11 AR16 T60
DVPDATA_19 TX2M_DPC0N T59
AR12 DVPDATA_20
+3V_D
NC on Park AW12 DVPDATA_21 TXCDP_DPD3P AU20
AU12 DVPDATA_22 TXCDM_DPD3N AT19
AP12 DVPDATA_23
AT21 U24G
TX3P_DPD2P
TX3M_DPD2N AR20

R66 R64 DPD


TX4P_DPD1P AU22 NC on Park LVDS CONTROL
R85 10K/F_4

10K/F_4 10K/F_4 AV21 AK27


TX4M_DPD1N VARY_BL LVDS_PWM [23]
SCL must be tied high I2C DIGON AJ27 LVDS_DIGON [23]
AT23
if not used TX5P_DPD0P
AR22 R84 10K/F_4
TX5M_DPD0N
[21] SCL AK26 SCL
[21] SDA AJ26 SDA
SYS_SHDN# AK35
SYS_SHDN# [3,34] TXCLK_UP_DPF3P
R AD39 CRT_RED [23] TXCLK_UN_DPF3N AL36
C GENERAL PURPOSE I/O AD37 C
RB
3

[21] GPU_GPIO0 AH20 GPIO_0 TXOUT_U0P_DPF2P AJ38


[21] GPU_GPIO1 AH18 GPIO_1 G AE36 CRT_GRE [23] TXOUT_U0N_DPF2N AK37
[21] GPU_GPIO2 AN16 GPIO_2 GB AD35
VGA_TEMP_FAIL 2 Q14 AH23 AH35
[21] GPIO3_SMBDAT GPIO_3_SMBDATA TXOUT_U1P_DPF1P
2N7002_200MA [21] GPIO4_SMBCLK AJ23 GPIO_4_SMBCLK B AF37 CRT_BLU [23] TXOUT_U1N_DPF1N AJ36
[21] PWR_PSI# AH17 GPIO_5_AC_BATT BB AE38
[21] IO_VID0
[21,23] LVDS_BRIGHT
AJ17
AK17
GPIO_6
DAC1
AC36
R56 10K/F_4 +3V_D
CRT_HSYNC [23]
R53 R54 R57 TXOUT_U2P_DPF0P AG38
AH37 LVDS
1

GPIO_7_BLON HSYNC TXOUT_U2N_DPF0N


[21] GPU_GPIO8 AJ13 GPIO_8_ROMSO VSYNC AC38 CRT_VSYNC [23] 150/F_4 150/F_4 150/F_4
AH15 R55 10K/F_4 +3V_D AF35
[21] GPU_GPIO9 GPIO_9_ROMSI TXOUT_U3P
[21] GPU_GPIO10 AJ16 GPIO_10_ROMSCK TXOUT_U3N AG36
AK16 AB34 R474 499/F_4
[21] RAM_CFG0 GPIO_11 RSET
[21] RAM_CFG1 AL16 GPIO_12
AM16 AD34 AVDD LVTMDP
[21] RAM_CFG2 GPIO_13 AVDD
CLK_VGA_27M_SS_R T6 AM14 AE34
GPIO_14_HPD2 AVSSQ
[40] GFX_CORE_CNTRL1 AM13 GPIO_15_PWRCNTL_0 TXCLK_LP_DPE3P AP34 LCD_TXLCLKOUT+ [23]
R111 CLK_VGA_27M_SS_R AK14 AC33 VDD1DI AR34
GPIO_16_SSIN VDD1DI TXCLK_LN_DPE3N LCD_TXLCLKOUT- [23]
*10K/F_4 AG30 AC34
[21] ALT#_GPIO17 GPIO_17_THERMAL_INT VSS1DI
T14 AN14 AW37
GPIO_18_HPD3 TXOUT_L0P_DPE2P LCD_TXLOUT0+ [23]
VGA_TEMP_FAIL R86 0_4 AM17 AU35
GPIO_19_CTF TXOUT_L0N_DPE2N LCD_TXLOUT0- [23]
[40] GFX_CORE_CNTRL0 AL13 GPIO_20_PWRCNTL_1 R2 AC30
T25 AJ14 AC31 AR37
GPIO_21_BB_EN R2B TXOUT_L1P_DPE1P LCD_TXLOUT1+ [23]
R81 AK13 AU39
[21] GPU_GPIO22 GPIO_22_ROMCSB TXOUT_L1N_DPE1N LCD_TXLOUT1- [23]
10K/F_4 T71 AN13 AD30
T19 GPIO_23_CLKREQB G2
AM23 JTAG_TRSTB G2B AD31 TXOUT_L2P_DPE0P AP35 LCD_TXLOUT2+ [23]
T15 AN23 AR35
JTAG_TDI TXOUT_L2N_DPE0N LCD_TXLOUT2- [23]
T8 AK23 AF30
T3 JTAG_TCK B2
AL24 JTAG_TMS B2B AF31 TXOUT_L3P AN36
+3V_D T4 AM24 AP37
T16 JTAG_TDO TXOUT_L3N
AJ19 GENERICA
T13 AK19 AC32
T7 GENERICB C
AJ20 GENERICC Y AD32
T1 AK20 AF32
R73 GENERICD COMP
3

T9 AJ24
Q15 GENERICE_HPD4 DAC2 Madison/Park_M2
[22] HDMI_CON_HP 2 AH26 GENERICF
MMBT3904-7-F_200MA AH24 AD29 T24
GENERICG H2SYNC
NC on Park AC29 V2SYNC [21]
1

150K_4 V2SYNC

B +1.8V_GPU
HPD1 AK24 HPD1
AG31 VDD1DI
HDMI DDC (1.8V@70mA AVDD)
+1.8V_GPU
B
VDD2DI 120 ohm/300mA
+1.8V(20mA) VSS2DI AG32
+3V_D +3V_D
120 ohm/300mA R74 AVDD L34 BLM15BD121SN1D_300MA
+1.8V_GPU L4 BLM15BD121SN1D_300MA TS_VDD 10K_4
R96 AG33 +3V_D (3.3V@130mA A2VDD)
C121 C127 C132 A2VDD C622 C616 C609
499/F_4
AD33 A2VDDQ 0.1U/10V_4X 1U/6.3V_4X 4.7U/6.3V_6X
4.7U/6.3V_6X 1U/6.3V_4X 0.1U/10V_4X VREFG AH13 A2VDDQ C224 R75
VREFG 0.1U/10V_4X
A2VSSQ AF33

2
EHM@10K/F_4 Q12 EHM@FDV301N_NL_200MA (1.8V@100mA VDD1DI)
R97 C140 120 ohm/300mA
249/F_4 AA29 R140 715/F_4 EXT_HDMI_DDCCK 1 3 VDD1DI L14 BLM15BD121SN1D_300MA
R2SET HDMI_DDCCLK [22]
75mA (10mils) 0.1U/10V_4X
120 ohm/300mA
+1.8V_GPU L12 BLM15BD121SN1D_300MA DPLL_PVDD Place close to Chip DDC/AUX
C158 C157 C154
AM26 EXT_HDMI_DDCCK *HM@0_4 R59 0.1U/10V_4X 1U/6.3V_4X 4.7U/6.3V_6X
DDC1CLK
C144 C153 C168
DPLL_PVDD AM32
DPLL_PVDD
PLL/CLOCK
DDC1DATA AN26 EXT_HDMI_DDCDAT
HDMI
4.7U/6.3V_6X 1U/6.3V_4X 0.1U/10V_4X AN32 AM27
DPLL_PVSS AUX1P T17 +1.8V_GPU
AUX1N AL27
T11 (1.8V@2mA A2VDDQ)
DPLL_VDDC AN31
DPLL_VDDC DDC2CLK
DDC2DATA
AM19
AL19
CRT_DDCCLK [23]
CRT_DDCDAT [23]
CRT A2VDDQ
120 ohm/300mA
L15 BLM15BD121SN1D_300MA
R460 100/F_4
[2] 27M_CLK +3V_D +3V_D
27M_CLK_M R466 *short_4 XTALI_27M AV33 AN20
R459 120/F_4 T27 XTALO_27M XTALIN AUX2P C159 C160
AU34 XTALOUT AUX2N AM20
0.1U/10V_4X 1U/6.3V_4X
DDCCLK_AUX3P AL30
DDCDATA_AUX3N AM30
R76
AL29
[21] GPU_D+ AF29 DPLUS
DDCCLK_AUX4P
DDCDATA_AUX4N AM29 T5 NC on Park EHM@10K/F_4

2
AG29 THERMAL T20 Q13 EHM@FDV301N_NL_200MA
[21] GPU_D- DMINUS
DDCCLK_AUX5P AN21
AM21 EXT_HDMI_DDCDAT 1 3
DDCDATA_AUX5N HDM_DDCDATA [22]
T23 AK32 TS_FDO
TS_VDD AJ32
AJ33
TSVDD
TSVSS
DDC6CLK
DDC6DATA
AJ30
AJ31
LCD_EDIDCLK [23]
LCD_EDIDDATA [23]
LVDS
*HM@0_4 R60
A AK30 A

120 ohm/300mA
125mA (10mils)
NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N AK29 T2
T10
NC on Park
+1V_GPU L11 BLM15BD121SN1D_300MA DPLL_VDDC

C143 C152 C167


Madison/Park_M2
4.7U/6.3V_6X 1U/6.3V_4X 0.1U/10V_4X

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
Madison/Park-HOST I/F
Date: Wednesday, March 10, 2010 Sheet 15 of 45
5 4 3 2 1
5 4 3 2 1

VMA_DQ[63..0] VMB_DQ[63..0]
[17] VMA_DQ[63..0] [18] VMB_DQ[63..0]
VMA_DM[7..0] VMB_DM[7..0]
[17] VMA_DM[7..0] [18] VMB_DM[7..0]
U24C U24D
VMA_RDQS[7..0] DDR2 DDR2 VMB_RDQS[7..0] DDR2 DDR2
[17] VMA_RDQS[7..0] GDDR3/GDDR5 GDDR5/GDDR3 [18] VMB_RDQS[7..0] GDDR3/GDDR5 GDDR5/GDDR3
VMA_WDQS[7..0] DDR3 DDR3 VMB_WDQS[7..0] DDR3 DDR3
[17] VMA_WDQS[7..0] [18] VMB_WDQS[7..0]
VMA_DQ0 C37 G24 VMA_MA0 VMB_DQ0 C5 P8 VMB_MA0
VMA_DQ1 DQA0_0/DQA_0 MAA0_0/MAA_0 VMA_MA1 VMB_DQ1 DQB0_0/DQB_0 MAB0_0/MAB_0 VMB_MA1
C35 J23 C3 T9

MEMORY INTERFACE A
D
VMA_DQ2 DQA0_1/DQA_1 MAA0_1/MAA_1 VMA_MA2 VMB_MA[13..0] VMB_DQ2 DQB0_1/DQB_1 MAB0_1/MAB_1 VMB_MA2 D
A35 H24 E3 P9

MEMORY INTERFACE B
VMA_MA[13..0] DQA0_2/DQA_2 MAA0_2/MAA_2 [18] VMB_MA[13..0] DQB0_2/DQB_2 MAB0_2/MAB_2
VMA_DQ3 E34 J24 VMA_MA3 VMB_DQ3 E1 N7 VMB_MA3
[17] VMA_MA[13..0] DQA0_3/DQA_3 MAA0_3/MAA_3 DQB0_3/DQB_3 MAB0_3/MAB_3
VMA_DQ4 G32 H26 VMA_MA4 VMB_DQ4 F1 N8 VMB_MA4
VMA_DQ5 DQA0_4/DQA_4 MAA0_4/MAA_4 VMA_MA5 VMB_BA0 VMB_DQ5 DQB0_4/DQB_4 MAB0_4/MAB_4 VMB_MA5
D33 DQA0_5/DQA_5 MAA0_5/MAA_5 J26 [18] VMB_BA0 F3 DQB0_5/DQB_5 MAB0_5/MAB_5 N9
VMA_BA0 VMA_DQ6 F32 H21 VMA_MA6 VMB_BA1 VMB_DQ6 F5 U9 VMB_MA6
[17] VMA_BA0 DQA0_6/DQA_6 MAA0_6/MAA_6 [18] VMB_BA1 DQB0_6/DQB_6 MAB0_6/MAB_6
VMA_BA1 VMA_DQ7 E32 G21 VMA_MA7 VMB_BA2 VMB_DQ7 G4 U8 VMB_MA7
[17] VMA_BA1 DQA0_7/DQA_7 MAA0_7/MAA_7 [18] VMB_BA2 DQB0_7/DQB_7 MAB0_7/MAB_7
VMA_BA2 VMA_DQ8 D31 H19 VMA_MA8 VMB_DQ8 H5 Y9 VMB_MA8
[17] VMA_BA2 DQA0_8/DQA_8 MAA1_0/MAA_8 DQB0_8/DQB_8 MAB1_0/MAB_8
VMA_DQ9 F30 H20 VMA_MA9 VMB_DQ9 H6 W9 VMB_MA9
VMA_DQ10 DQA0_9/DQA_9 MAA1_1/MAA_9 VMA_MA10 VMB_DQ10 DQB0_9/DQB_9 MAB1_1/MAB_9 VMB_MA10
C30 DQA0_10/DQA_10 MAA1_2/MAA_10 L13 J4 DQB0_10/DQB_10 MAB1_2/MAB_10 AC8
VMA_DQ11 A30 G16 VMA_MA11 VMB_DQ11 K6 AC9 VMB_MA11
VMA_DQ12 DQA0_11/DQA_11 MAA1_3/MAA_11 VMA_MA12 VMB_DQ12 DQB0_11/DQB_11 MAB1_3/MAB_11 VMB_MA12
F28 DQA0_12/DQA_12 MAA1_4/MAA_12 J16 K5 DQB0_12/DQB_12 MAB1_4/MAB_12 AA7
VMA_DQ13 C28 H16 VMA_BA2 VMB_DQ13 L4 AA8 VMB_BA2
VMA_DQ14 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 VMA_BA0 VMB_DQ14 DQB0_13/DQB_13 MAB1_5/BA2 VMB_BA0
A28 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 J17 M6 DQB0_14/DQB_14 MAB1_6/BA0 Y8
VMA_DQ15 E28 H17 VMA_BA1 VMB_DQ15 M1 AA9 VMB_BA1
VMA_DQ16 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 VMB_DQ16 DQB0_15/DQB_15 MAB1_7/BA1
D27 DQA0_16/DQA_16 M3 DQB0_16/DQB_16
VMA_DQ17 F26 A32 VMA_DM0 VMB_DQ17 M5 H3 VMB_DM0
VMA_DQ18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 VMA_DM1 VMB_DQ18 DQB0_17/DQB_17 WCKB0_0/DQMB_0 VMB_DM1
C26 DQA0_18/DQA_18 WCKA0B_0/DQMA_1 C32 N4 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 H1
VMA_DQ19 A26 D23 VMA_DM2 VMB_DQ19 P6 T3 VMB_DM2
VMA_DQ20 DQA0_19/DQA_19 WCKA0_1/DQMA_2 VMA_DM3 VMB_DQ20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 VMB_DM3
F24 DQA0_20/DQA_20 WCKA0B_1/DQMA_3 E22 P5 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 T5
VMA_DQ21 C24 C14 VMA_DM4 VMB_DQ21 R4 AE4 VMB_DM4
VMA_DQ22 DQA0_21/DQA_21 WCKA1_0/DQMA_4 VMA_DM5 VMB_DQ22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 VMB_DM5
A24 DQA0_22/DQA_22 WCKA1B_0/DQMA_5 A14 T6 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 AF5
VMA_DQ23 E24 E10 VMA_DM6 VMB_DQ23 T1 AK6 VMB_DM6
VMA_DQ24 DQA0_23/DQA_23 WCKA1_1/DQMA_6 VMA_DM7 VMB_DQ24 DQB0_23/DQB_23 WCKB1_1/DQMB_6 VMB_DM7
C22 DQA0_24/DQA_24 WCKA1B_1/DQMA_7 D9 U4 DQB0_24/DQB_24 WCKB1B_1/DQMB_7 AK5
VMA_DQ25 A22 VMB_DQ25 V6
VMA_DQ26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 VMA_RDQS0 VMB_DQ26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 VMB_RDQS0
F22 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 C34 V1 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 F6
VMA_DQ27 D21 D29 VMA_RDQS1 VMB_DQ27 V3 K3 VMB_RDQS1
VMA_DQ28 DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 VMA_RDQS2 VMB_DQ28 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 VMB_RDQS2
A20 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 D25 Y6 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 P3
VMA_DQ29 F20 E20 VMA_RDQS3 QSA[7..0] VMB_DQ29 Y1 V5 VMB_RDQS3 QSB[7..0]
VMA_DQ30 DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 VMA_RDQS4 VMB_DQ30 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 VMB_RDQS4
D19 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 E16 Y3 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 AB5
VMA_DQ31 E18 E12 VMA_RDQS5 VMB_DQ31 Y5 AH1 VMB_RDQS5
VMA_DQ32 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 VMA_RDQS6 VMB_DQ32 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 VMB_RDQS6
C18 DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 J10 AA4 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 AJ9
VMA_DQ33 A18 D7 VMA_RDQS7 VMB_DQ33 AB6 AM5 VMB_RDQS7
VMA_DQ34 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 VMB_DQ34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
F18 DQA1_2/DQA_34 AB1 DQB1_2/DQB_34
VMA_DQ35 D17 A34 VMA_WDQS0 VMB_DQ35 AB3 G7 VMB_WDQS0
VMA_DQ36 DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 VMA_WDQS1 VMB_DQ36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 VMB_WDQS1
A16 DQA1_4/DQA_36 DDBIA0_1/QSA_1B/WDQSA_1 E30 AD6 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 K1
VMA_DQ37 F16 E26 VMA_WDQS2 VMB_DQ37 AD1 P1 VMB_WDQS2
VMA_DQ38 DQA1_5/DQA_37 DDBIA0_2/QSA_2B/WDQSA_2 VMA_WDQS3 VMB_DQ38 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 VMB_WDQS3
D15 DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3 C20 QSA#[7..0] AD3 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 W4 QSB#[7..0]
C VMA_DQ39 E14 C16 VMA_WDQS4 VMB_DQ39 AD5 AC4 VMB_WDQS4 C
VMA_DQ40 DQA1_7/DQA_39 DDBIA1_0/QSA_4B/WDQSA_4 VMA_WDQS5 VMB_DQ40 DQB1_7/DQB_39 DDBIB1_0/QSB_4B/WDQSB_4 VMB_WDQS5
F14 DQA1_8/DQA_40 DDBIA1_1/QSA_5B/WDQSA_5 C12 AF1 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 AH3
VMA_DQ41 D13 J11 VMA_WDQS6 VMB_DQ41 AF3 AJ8 VMB_WDQS6
VMA_DQ42 DQA1_9/DQA_41 DDBIA1_2/QSA_6B/WDQSA_6 VMA_WDQS7 VMB_DQ42 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 VMB_WDQS7
F12 DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 F8 AF6 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7 AM3
VMA_DQ43 A12 VMB_DQ43 AG4
VMA_DQ44 DQA1_11/DQA_43 VMB_DQ44 DQB1_11/DQB_43
D11 DQA1_12/DQA_44 ADBIA0/ODTA0 J21 VMA_ODT0 [17] AH5 DQB1_12/DQB_44 ADBIB0/ODTB0 T7 VMB_ODT0 [18]
VMA_DQ45 F10 G19 VMB_DQ45 AH6 W7
DQA1_13/DQA_45 ADBIA1/ODTA1 VMA_ODT1 [17] DQB1_13/DQB_45 ADBIB1/ODTB1 VMB_ODT1 [18]
VMA_DQ46 A10 VMB_DQ46 AJ4
VMA_DQ47 DQA1_14/DQA_46 VMA_CLK0 VMB_DQ47 DQB1_14/DQB_46 VMB_CLK0
C10 DQA1_15/DQA_47 CLKA0 H27 VMA_CLK0 [17] AK3 DQB1_15/DQB_47 CLKB0 L9 VMB_CLK0 [18]
VMA_DQ48 G13 G27 VMA_CLK0# VMB_DQ48 AF8 L8 VMB_CLK0#
DQA1_16/DQA_48 CLKA0B VMA_CLK0# [17] DQB1_16/DQB_48 CLKB0B VMB_CLK0# [18]
VMA_DQ49 H13 VMB_DQ49 AF9
VMA_DQ50 DQA1_17/DQA_49 VMA_CLK1 VMB_DQ50 DQB1_17/DQB_49 VMB_CLK1
J13 DQA1_18/DQA_50 CLKA1 J14 VMA_CLK1 [17] AG8 DQB1_18/DQB_50 CLKB1 AD8 VMB_CLK1 [18]
VMA_DQ51 H11 H14 VMA_CLK1# VMB_DQ51 AG7 AD7 VMB_CLK1#
DQA1_19/DQA_51 CLKA1B VMA_CLK1# [17] DQB1_19/DQB_51 CLKB1B VMB_CLK1# [18]
VMA_DQ52 G10 VMB_DQ52 AK9
VMA_DQ53 DQA1_20/DQA_52 VMA_RAS0# VMB_DQ53 DQB1_20/DQB_52 VMB_RAS0#
G8 DQA1_21/DQA_53 RASA0B K23 VMA_RAS0# [17] AL7 DQB1_21/DQB_53 RASB0B T10 VMB_RAS0# [18]
Place close to Chip VMA_DQ54 K9 DQA1_22/DQA_54 RASA1B K19 VMA_RAS1#
VMA_RAS1# [17]
VMB_DQ54 AM8 DQB1_22/DQB_54 RASB1B Y10 VMB_RAS1#
VMB_RAS1# [18]
VMA_DQ55 K10 DQA1_23/DQA_55 Place close to Chip VMB_DQ55 AM7 DQB1_23/DQB_55
VMA_DQ56 G9 K20 VMA_CAS0# VMB_DQ56 AK1 W10 VMB_CAS0#
DQA1_24/DQA_56 CASA0B VMA_CAS0# [17] DQB1_24/DQB_56 CASB0B VMB_CAS0# [18]
+1.5V_GPU VMA_DQ57 A8 K17 VMA_CAS1# VMB_DQ57 AL4 AA10 VMB_CAS1#
DQA1_25/DQA_57 CASA1B VMA_CAS1# [17] DQB1_25/DQB_57 CASB1B VMB_CAS1# [18]
VMA_DQ58 C8 +1.5V_GPU VMB_DQ58 AM6
DQA1_26/DQA_58 DQB1_26/DQB_58
(0.7*VDDR1) VMA_DQ59 E8 DQA1_27/DQA_59 CSA0B_0 K24 VMA_CS0#
VMA_CS0# [17]
VMB_DQ59 AM1 DQB1_27/DQB_59 CSB0B_0 P10 VMB_CS0#
VMB_CS0# [18]
VMA_DQ60 A6 K27 VMB_DQ60 AN4 L10
DQA1_28/DQA_60 CSA0B_1 DQB1_28/DQB_60 CSB0B_1
VMA_DQ61 C6 DQA1_29/DQA_61 (0.7*VDDR1) VMB_DQ61 AP3 DQB1_29/DQB_61
Ra R162 VMA_DQ62 E6 M13 VMA_CS1# VMB_DQ62 AP1 AD10 VMB_CS1#
DQA1_30/DQA_62 CSA1B_0 VMA_CS1# [17] DQB1_30/DQB_62 CSB1B_0 VMB_CS1# [18]
40.2/F_4 VMA_DQ63 A5 K16 Ra R146 VMB_DQ63 AP5 AC10
DQA1_31/DQA_63 CSA1B_1 40.2/F_4 DQB1_31/DQB_63 CSB1B_1
MVREFDA L18 K21 VMA_CKE0 U10 VMB_CKE0
MVREFDA CKEA0 VMA_CKE0 [17] CKEB0 VMB_CKE0 [18]
MVREFSA L20 J20 VMA_CKE1 MVREFDB Y12 AA11 VMB_CKE1
MVREFSA CKEA1 VMA_CKE1 [17] MVREFDB CKEB1 VMB_CKE1 [18]
MVREFSB AA12
R165 MAD@243/F_4 VMA_WE0# MVREFSB VMB_WE0#
+1.5V_GPU L27 MEM_CALRN0 WEA0B K26 VMA_WE0# [17] WEB0B N10 VMB_WE0# [18]
Rb R163 C337 R155 PARK@243/F_4 N12 L15 VMA_WE1# AB11 VMB_WE1#
MEM_CALRN1 WEA1B VMA_WE1# [17] WEB1B VMB_WE1# [18]
100/F_4 0.1U/10V_4X R129 MAD@243/F_4 AG12 Rb R144 C283
MEM_CALRN2 100/F_4 0.1U/10V_4X R132 *10K/F_4
+3V_D
R167 92_96_PARK@243/F_4 VMA_MA13 R131 10K_4 VMB_MA13 for Park/Madison 128x16 support
GDDR5

M12 H23 AD28 T8

GDDR5
R166 MAD@243/F_4 MEM_CALRP1 MAA0_8 TESTEN MAB0_8
M27 J19 W8
R120 MAD@243/F_4 AH12
MEM_CALRP0 MAA1_8
AK10
MAB1_8 [16M x 16 x 8] = 2048MBits
MEM_CALRP2 CLKTESTA
only for Madison 128x16 support AL10 CLKTESTB DRAM_RST AH11 R117 680_4
MEM_RST# [17,18]
+1.5V_GPU
B [16M x 16 x 8] = 2048MBits +1.5V_GPU B

AL31 R118 *4.7K_4 +1.5V_GPU


RSVD
(0.7*VDDR1) C169 C149
(0.7*VDDR1) *0.1U/10V_4X *0.1U/10V_4X
Ra R164 R116 C222
40.2/F_4 Madison/Park_M2 Ra R135 Madison/Park_M2 68P/50V_4C
40.2/F_4 R108 R107 10K_4
*51.1/F_4 *51.1/F_4

Rb R160 C338
Ball Name Madison Park M96 M92
100/F_4 0.1U/10V_4X Rb R136 C260
MVREFDA V V V V 100/F_4 0.1U/10V_4X
TESTEN Description
MVREFSA V V V V 0 Internal Debug use only
1 JTAG signals enable
MVREFDB V V V V
MVREFSB V V V V
MEM_CALRN0 V V
MEM_CALRN1 V V
MEM_CALRN2 V
MEM_CALRP0 V V
A
MEM_CALRP1 V V V V A

MEM_CALRP2 V

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
Madison/Park-MEM I/F
Date: Tuesday, March 09, 2010 Sheet 16 of 45
5 4 3 2 1
5 4 3 2 1

VMA_DQ[63..0]
[16] VMA_DQ[63..0]

[16] VMA_DM[7..0]
VMA_DM[7..0] CHANNEL A: 512MB DDR3 (64M*16*4pcs)
VMA_RDQS[7..0] QSA[7..0]
[16] VMA_RDQS[7..0]
VMA_WDQS[7..0] QSA#[7..0]
[16] VMA_WDQS[7..0]
VMA_MA[13..0] U28 U10 U9 U27
[16] VMA_MA[13..0]
VREFC_VMA1 M8 E3 VMA_DQ19 VREFC_VMA2 M8 E3 VMA_DQ29 VREFC_VMA3 M8 E3 VMA_DQ38 VREFC_VMA4 M8 E3 VMA_DQ57
VREFD_VMA1 VREFCA DQL0 VMA_DQ22 VREFD_VMA2 VREFCA DQL0 VMA_DQ24 VREFD_VMA3 VREFCA DQL0 VMA_DQ34 VREFD_VMA4 VREFCA DQL0 VMA_DQ60
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMA_DQ18 F2 VMA_DQ30 F2 VMA_DQ36 F2 VMA_DQ58
VMA_MA0 DQL2 VMA_DQ21 VMA_MA0 DQL2 VMA_DQ25 VMA_MA0 DQL2 VMA_DQ35 VMA_MA0 DQL2 VMA_DQ61
[16] VMA_MA0 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
VMA_MA1 P7 H3 VMA_DQ16 VMA_MA1 P7 H3 VMA_DQ28 VMA_MA1 P7 H3 VMA_DQ39 VMA_MA1 P7 H3 VMA_DQ56
[16] VMA_MA1 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
VMA_MA2 P3 H8 VMA_DQ20 VMA_MA2 P3 H8 VMA_DQ26 VMA_MA2 P3 H8 VMA_DQ32 VMA_MA2 P3 H8 VMA_DQ63
[16] VMA_MA2 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
VMA_MA3 N2 G2 VMA_DQ17 VMA_MA3 N2 G2 VMA_DQ31 VMA_MA3 N2 G2 VMA_DQ37 VMA_MA3 N2 G2 VMA_DQ59
D [16] VMA_MA3 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6 D
VMA_MA4 P8 H7 VMA_DQ23 VMA_MA4 P8 H7 VMA_DQ27 VMA_MA4 P8 H7 VMA_DQ33 VMA_MA4 P8 H7 VMA_DQ62
[16] VMA_MA4 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
VMA_MA5 P2 VMA_MA5 P2 VMA_MA5 P2 VMA_MA5 P2
[16] VMA_MA5 A5 A5 A5 A5
VMA_MA6 R8 VMA_MA6 R8 VMA_MA6 R8 VMA_MA6 R8
[16] VMA_MA6 A6 A6 A6 A6
VMA_MA7 R2 D7 VMA_DQ15 VMA_MA7 R2 D7 VMA_DQ1 VMA_MA7 R2 D7 VMA_DQ51 VMA_MA7 R2 D7 VMA_DQ43
[16] VMA_MA7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
VMA_MA8 T8 C3 VMA_DQ12 VMA_MA8 T8 C3 VMA_DQ4 VMA_MA8 T8 C3 VMA_DQ50 VMA_MA8 T8 C3 VMA_DQ44
[16] VMA_MA8 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
VMA_MA9 R3 C8 VMA_DQ13 VMA_MA9 R3 C8 VMA_DQ0 VMA_MA9 R3 C8 VMA_DQ49 VMA_MA9 R3 C8 VMA_DQ46
[16] VMA_MA9 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
VMA_MA10 L7 C2 VMA_DQ8 VMA_MA10 L7 C2 VMA_DQ7 VMA_MA10 L7 C2 VMA_DQ48 VMA_MA10 L7 C2 VMA_DQ42
[16] VMA_MA10 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
VMA_MA11 R7 A7 VMA_DQ14 VMA_MA11 R7 A7 VMA_DQ2 VMA_MA11 R7 A7 VMA_DQ55 VMA_MA11 R7 A7 VMA_DQ40
[16] VMA_MA11 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
VMA_MA12 N7 A2 VMA_DQ9 VMA_MA12 N7 A2 VMA_DQ6 VMA_MA12 N7 A2 VMA_DQ53 VMA_MA12 N7 A2 VMA_DQ47
[16] VMA_MA12 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
VMA_MA13 T3 B8 VMA_DQ11 VMA_MA13 T3 B8 VMA_DQ3 VMA_MA13 T3 B8 VMA_DQ52 VMA_MA13 T3 B8 VMA_DQ41
[16] VMA_MA13 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
T7 A3 VMA_DQ10 T7 A3 VMA_DQ5 T7 A3 VMA_DQ54 T7 A3 VMA_DQ45
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 A15 M7 A15 M7 A15 M7 A15
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2


[16] VMA_BA0 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMA_BA1 N8 D9 VMA_BA1 N8 D9 VMA_BA1 N8 D9 VMA_BA1 N8 D9
[16] VMA_BA1 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMA_BA2 M3 G7 VMA_BA2 M3 G7 VMA_BA2 M3 G7 VMA_BA2 M3 G7
[16] VMA_BA2 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
VMA_CLK0 J7 N9 VMA_CLK0 J7 N9 VMA_CLK1 J7 N9 VMA_CLK1 J7 N9
[16] VMA_CLK0 CK VDD#N9 CK VDD#N9 [16] VMA_CLK1 CK VDD#N9 CK VDD#N9
VMA_CLK0# K7 R1 VMA_CLK0# K7 R1 VMA_CLK1# K7 R1 VMA_CLK1# K7 R1
[16] VMA_CLK0# CK VDD#R1 CK VDD#R1 [16] VMA_CLK1# CK VDD#R1 CK VDD#R1
VMA_CKE0 K9 R9 VMA_CKE0 K9 R9 VMA_CKE1 K9 R9 VMA_CKE1 K9 R9
[16] VMA_CKE0 CKE VDD#R9 CKE VDD#R9 [16] VMA_CKE1 CKE VDD#R9 CKE VDD#R9
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 VMA_ODT1 K1 A1 VMA_ODT1 K1 A1


[16] VMA_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 [16] VMA_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMA_CS0# L2 A8 VMA_CS0# L2 A8 VMA_CS1# L2 A8 VMA_CS1# L2 A8
[16] VMA_CS0# CS VDDQ#A8 CS VDDQ#A8 [16] VMA_CS1# CS VDDQ#A8 CS VDDQ#A8
VMA_RAS0# J3 C1 VMA_RAS0# J3 C1 VMA_RAS1# J3 C1 VMA_RAS1# J3 C1
[16] VMA_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 [16] VMA_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMA_CAS0# K3 C9 VMA_CAS0# K3 C9 VMA_CAS1# K3 C9 VMA_CAS1# K3 C9
[16] VMA_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 [16] VMA_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMA_WE0# L3 D2 VMA_WE0# L3 D2 VMA_WE1# L3 D2 VMA_WE1# L3 D2
[16] VMA_WE0# WE VDDQ#D2 WE VDDQ#D2 [16] VMA_WE1# WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMA_RDQS2 F3 H2 VMA_RDQS3 F3 H2 VMA_RDQS4 F3 H2 VMA_RDQS7 F3 H2
VMA_RDQS1 DQSL VDDQ#H2 VMA_RDQS0 DQSL VDDQ#H2 VMA_RDQS6 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2
C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9

VMA_DM2 E7 A9 VMA_DM3 E7 A9 VMA_DM4 E7 A9 VMA_DM7 E7 A9


VMA_DM1 DML VSS#A9 VMA_DM0 DML VSS#A9 VMA_DM6 DML VSS#A9 VMA_DM5 DML VSS#A9
C D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 C

VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1


VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMA_WDQS2 G3 J2 VMA_WDQS3 G3 J2 VMA_WDQS4 G3 J2 VMA_WDQS7 G3 J2
VMA_WDQS1 DQSL VSS#J2 VMA_WDQS0 DQSL VSS#J2 VMA_WDQS6 DQSL VSS#J2 VMA_WDQS5 DQSL VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1
VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
MEM_RST# T2 P9 MEM_RST# T2 P9 MEM_RST# T2 P9 MEM_RST# T2 P9
[16,18] MEM_RST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
VMA_ZQ1 L8 T9 VMA_ZQ2 L8 T9 VMA_ZQ3 L8 T9 VMA_ZQ4 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1


VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
R511 D1 R238 D1 R191 D1 R528 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9

100-BALL 100-BALL 100-BALL 100-BALL


SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
VRAM _DDR3 VRAM _DDR3 VRAM _DDR3 VRAM _DDR3

TOP Left BOT Left BOT Right TOP Right


Group-A0 VREF Group-A1 VREF
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

B B
R503 R532 R236 R193 R190 R235 R530 R509
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4

VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2 VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4

R513 R531 R237 R192 R189 R234 R529 R510


4.99K/F_4 C703 4.99K/F_4 C735 4.99K/F_4 C423 4.99K/F_4 C374 4.99K/F_4 C373 4.99K/F_4 C413 4.99K/F_4 C723 4.99K/F_4 C705
0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X

Group-A0 decoupling CAP Group-A1 decoupling CAP MEM_A1 CLK


MEM_A0 CLK
+1.5V_GPU
+1.5V_GPU
VMA_CLK1
VMA_CLK0
VMA_CLK1#
VMA_CLK0# C414 C417 C415 C727 C726 C393 C411 C719
C731 C419 C416 C728 C734 C724 C721 C736 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X R233 R232
R239 R240 56.2/F_4 56.2/F_4
56.2/F_4 56.2/F_4
+1.5V_GPU
+1.5V_GPU

C412
C424 C737 C717 C733 C421 C418 C426 C730 C729 0.01U/25V_4X
0.01U/25V_4X C720 C392 C725 C422 C732 C722 C425 C420 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X
A 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X A

+1.5V_GPU
+1.5V_GPU

C431 C430 C395 C433 C740


C429 C409 C738 C741 C742 4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X
4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X Quanta Computer Inc.
PROJECT : TE2
Size Document Number Rev
2A
VRAM_A: DDR3-64M*16*4PCS
Date: Friday, March 19, 2010 Sheet 17 of 45
5 4 3 2 1
5 4 3 2 1

[16] VMB_DQ[63..0]
VMB_DQ[63..0] CHANNEL B: 512MB DDR3 (64M*16*4pcs)
VMB_DM[7..0]
[16] VMB_DM[7..0]
VMB_RDQS[7..0] QSA[7..0]
[16] VMB_RDQS[7..0]
VMB_WDQS[7..0] QSA#[7..0]
[16] VMB_WDQS[7..0]
U26 U8 U7 U22
VMB_MA[13..0]
[16] VMB_MA[13..0]
VREFC_VMB1 M8 E3 VMB_DQ2 VREFC_VMB2 M8 E3 VMB_DQ16 VREFC_VMB3 M8 E3 VMB_DQ55 VREFC_VMB4 M8 E3 VMB_DQ33
VREFD_VMB1 VREFCA DQL0 VMB_DQ4 VREFD_VMB2 VREFCA DQL0 VMB_DQ18 VREFD_VMB3 VREFCA DQL0 VMB_DQ52 VREFD_VMB4 VREFCA DQL0 VMB_DQ39
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMB_DQ1 F2 VMB_DQ23 F2 VMB_DQ54 F2 VMB_DQ38
VMB_MA0 DQL2 VMB_DQ5 VMB_MA0 DQL2 VMB_DQ19 VMB_MA0 DQL2 VMB_DQ51 VMB_MA0 DQL2 VMB_DQ36
[16] VMB_MA0 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
VMB_MA1 P7 H3 VMB_DQ0 VMB_MA1 P7 H3 VMB_DQ20 VMB_MA1 P7 H3 VMB_DQ49 VMB_MA1 P7 H3 VMB_DQ35
[16] VMB_MA1 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
VMB_MA2 P3 H8 VMB_DQ6 VMB_MA2 P3 H8 VMB_DQ17 VMB_MA2 P3 H8 VMB_DQ48 VMB_MA2 P3 H8 VMB_DQ32
[16] VMB_MA2 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
VMB_MA3 N2 G2 VMB_DQ3 VMB_MA3 N2 G2 VMB_DQ21 VMB_MA3 N2 G2 VMB_DQ53 VMB_MA3 N2 G2 VMB_DQ37
D [16] VMB_MA3 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6 D
VMB_MA4 P8 H7 VMB_DQ7 VMB_MA4 P8 H7 VMB_DQ22 VMB_MA4 P8 H7 VMB_DQ50 VMB_MA4 P8 H7 VMB_DQ34
[16] VMB_MA4 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
VMB_MA5 P2 VMB_MA5 P2 VMB_MA5 P2 VMB_MA5 P2
[16] VMB_MA5 A5 A5 A5 A5
VMB_MA6 R8 VMB_MA6 R8 VMB_MA6 R8 VMB_MA6 R8
[16] VMB_MA6 A6 A6 A6 A6
VMB_MA7 R2 D7 VMB_DQ15 VMB_MA7 R2 D7 VMB_DQ24 VMB_MA7 R2 D7 VMB_DQ41 VMB_MA7 R2 D7 VMB_DQ63
[16] VMB_MA7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
VMB_MA8 T8 C3 VMB_DQ10 VMB_MA8 T8 C3 VMB_DQ31 VMB_MA8 T8 C3 VMB_DQ47 VMB_MA8 T8 C3 VMB_DQ56
[16] VMB_MA8 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
VMB_MA9 R3 C8 VMB_DQ14 VMB_MA9 R3 C8 VMB_DQ28 VMB_MA9 R3 C8 VMB_DQ40 VMB_MA9 R3 C8 VMB_DQ60
[16] VMB_MA9 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
VMB_MA10 L7 C2 VMB_DQ8 VMB_MA10 L7 C2 VMB_DQ30 VMB_MA10 L7 C2 VMB_DQ46 VMB_MA10 L7 C2 VMB_DQ58
[16] VMB_MA10 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
VMB_MA11 R7 A7 VMB_DQ12 VMB_MA11 R7 A7 VMB_DQ26 VMB_MA11 R7 A7 VMB_DQ44 VMB_MA11 R7 A7 VMB_DQ62
[16] VMB_MA11 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
VMB_MA12 N7 A2 VMB_DQ9 VMB_MA12 N7 A2 VMB_DQ29 VMB_MA12 N7 A2 VMB_DQ45 VMB_MA12 N7 A2 VMB_DQ57
[16] VMB_MA12 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
VMB_MA13 T3 B8 VMB_DQ13 VMB_MA13 T3 B8 VMB_DQ25 VMB_MA13 T3 B8 VMB_DQ43 VMB_MA13 T3 B8 VMB_DQ61
[16] VMB_MA13 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
T7 A3 VMB_DQ11 T7 A3 VMB_DQ27 T7 A3 VMB_DQ42 T7 A3 VMB_DQ59
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 A15 M7 A15 M7 A15 M7 A15
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2


[16] VMB_BA0 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9
[16] VMB_BA1 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMB_BA2 M3 G7 VMB_BA2 M3 G7 VMB_BA2 M3 G7 VMB_BA2 M3 G7
[16] VMB_BA2 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
VMB_CLK0 J7 N9 VMB_CLK0 J7 N9 VMB_CLK1 J7 N9 VMB_CLK1 J7 N9
[16] VMB_CLK0 CK VDD#N9 CK VDD#N9 [16] VMB_CLK1 CK VDD#N9 CK VDD#N9
VMB_CLK0# K7 R1 VMB_CLK0# K7 R1 VMB_CLK1# K7 R1 VMB_CLK1# K7 R1
[16] VMB_CLK0# CK VDD#R1 CK VDD#R1 [16] VMB_CLK1# CK VDD#R1 CK VDD#R1
VMB_CKE0 K9 R9 VMB_CKE0 K9 R9 VMB_CKE1 K9 R9 VMB_CKE1 K9 R9
[16] VMB_CKE0 CKE VDD#R9 CKE VDD#R9 [16] VMB_CKE1 CKE VDD#R9 CKE VDD#R9
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

VMB_ODT0 K1 A1 VMB_ODT0 K1 A1 VMB_ODT1 K1 A1 VMB_ODT1 K1 A1


[16] VMB_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 [16] VMB_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMB_CS0# L2 A8 VMB_CS0# L2 A8 VMB_CS1# L2 A8 VMB_CS1# L2 A8
[16] VMB_CS0# CS VDDQ#A8 CS VDDQ#A8 [16] VMB_CS1# CS VDDQ#A8 CS VDDQ#A8
VMB_RAS0# J3 C1 VMB_RAS0# J3 C1 VMB_RAS1# J3 C1 VMB_RAS1# J3 C1
[16] VMB_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 [16] VMB_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMB_CAS0# K3 C9 VMB_CAS0# K3 C9 VMB_CAS1# K3 C9 VMB_CAS1# K3 C9
[16] VMB_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 [16] VMB_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMB_WE0# L3 D2 VMB_WE0# L3 D2 VMB_WE1# L3 D2 VMB_WE1# L3 D2
[16] VMB_WE0# WE VDDQ#D2 WE VDDQ#D2 [16] VMB_WE1# WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMB_RDQS0 F3 H2 VMB_RDQS2 F3 H2 VMB_RDQS6 F3 H2 VMB_RDQS4 F3 H2
VMB_RDQS1 DQSL VDDQ#H2 VMB_RDQS3 DQSL VDDQ#H2 VMB_RDQS5 DQSL VDDQ#H2 VMB_RDQS7 DQSL VDDQ#H2
C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9

VMB_DM0 E7 A9 VMB_DM2 E7 A9 VMB_DM6 E7 A9 VMB_DM4 E7 A9


VMB_DM1 DML VSS#A9 VMB_DM3 DML VSS#A9 VMB_DM5 DML VSS#A9 VMB_DM7 DML VSS#A9
C D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 C

VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1


VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMB_WDQS0 G3 J2 VMB_WDQS2 G3 J2 VMB_WDQS6 G3 J2 VMB_WDQS4 G3 J2
VMB_WDQS1 DQSL VSS#J2 VMB_WDQS3 DQSL VSS#J2 VMB_WDQS5 DQSL VSS#J2 VMB_WDQS7 DQSL VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1
VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
MEM_RST# T2 P9 MEM_RST# T2 P9 MEM_RST# T2 P9 MEM_RST# T2 P9
[16,17] MEM_RST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
VMB_ZQ1 L8 T9 VMB_ZQ2 L8 T9 VMB_ZQ3 L8 T9 VMB_ZQ4 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1


VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
R517 D1 R173 D1 R130 D1 R475 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
240/F_4 VSSQ#D8 D8 240/F_4 VSSQ#D8 D8 240/F_4 VSSQ#D8 D8 240/F_4 VSSQ#D8 D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9

100-BALL 100-BALL 100-BALL 100-BALL


SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
VRAM _DDR3 VRAM _DDR3 VRAM _DDR3
VRAM _DDR3

BOT Down TOP Down TOP Up BOT Up

Group-B0 VREF Group-B1 VREF


+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
B B

R211 R515 R158 R524 R145 R151 R478 R481


4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4

VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2 VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4

R205 C380 R508 C701 R159 C331 R522 C707 R139 C242 R148 C266 R477 C669 R476 C666
0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4

Group-B0 decoupling CAP Group-B1 decoupling CAP


MEM_B0 CLK MEM_B1 CLK
+1.5V_GPU +1.5V_GPU

VMB_CLK1

VMB_CLK0 VMB_CLK1#
C694 C681 C386 C379 C679 C175 C314 C631 C274 C334 C302 C698 C673 C174 C683
VMB_CLK0# 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X R133 R138
56.2/F_4
R187 R195 56.2/F_4
56.2/F_4 +1.5V_GPU +1.5V_GPU
56.2/F_4

A C230 A
C173 C378 C692 C369 C381 C706 C700 C697 C664 C632 C630 C695 C696 C688 C672 0.01U/25V_4X
C377 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X
0.01U/25V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X

+1.5V_GPU +1.5V_GPU

C708 C689 C315 C351 C628 C335 C686 C690 C364 C384
Quanta Computer Inc.
4.7U/6.3V_6X
4.7U/6.3V_6X
4.7U/6.3V_6X
4.7U/6.3V_6X
4.7U/6.3V_6X 4.7U/6.3V_6X
4.7U/6.3V_6X
4.7U/6.3V_6X
4.7U/6.3V_6X
4.7U/6.3V_6X PROJECT : TE2
Size Document Number Rev
2A
VRAM_B: DDR3-64M*16*4PCS
Date: Wednesday, March 10, 2010 Sheet 18 of 45
5 4 3 2 1
5 4 3 2 1

For Madison and Park VDDCI and VDDC can share one common regulator

VDD/VDDQ =1.5V at 1333 U24F


VDD/VDDQ =1.8V at 1600 and 1800 U24E +1.8V_GPU

+1.5V_GPU MEM I/O 180 ohm/1.5A


(1.5V@5A_VDDR1) PCIE (1.8V@400mA PCIE_VDDR) AB39 A3
PCIE_VDDR L3 HCB1608KF-181T15_1.5A PCIE_VSS#1 GND#1
AC7 VDDR1#1 PCIE_VDDR#1 AA31 E39 PCIE_VSS#2 GND#2 A37
AD11 VDDR1#2 PCIE_VDDR#2 AA32 F34 PCIE_VSS#3 GND#3 AA16
AF7 VDDR1#3 PCIE_VDDR#3 AA33 F39 PCIE_VSS#4 GND#4 AA18
C432 C739 C663 AG10 AA34 C263 C125 C115 C114 C112 G33 AA2
4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X VDDR1#4 PCIE_VDDR#4 0.1U/10V_4X 0.1U/10V_4X 1U/6.3V_4X 1U/6.3V_4X 4.7U/6.3V_6X PCIE_VSS#5 GND#5
AJ7 VDDR1#5 PCIE_VDDR#5 V28 G34 PCIE_VSS#6 GND#6 AA21
D
AK8 VDDR1#6 PCIE_VDDR#6 W29 H31 PCIE_VSS#7 GND#7 AA23 D
AL9 VDDR1#7 PCIE_VDDR#7 W30 H34 PCIE_VSS#8 GND#8 AA26
G11 VDDR1#8 PCIE_VDDR#8 Y31 H39 PCIE_VSS#9 GND#9 AA28
G14 VDDR1#9 J31 PCIE_VSS#10 GND#10 AA6
G17 VDDR1#10 J34 PCIE_VSS#11 GND#11 AB12
G20 G30 +1V_GPU K31 AB15
VDDR1#11 PCIE_VDDC#1 PCIE_VSS#12 GND#12
G23 VDDR1#12 PCIE_VDDC#2 G31 (1.0V@2A PCIE_VDDC) K34 PCIE_VSS#13 GND#13 AB17
G26 VDDR1#13 PCIE_VDDC#3 H29 K39 PCIE_VSS#14 GND#14 AB20
G29 VDDR1#14 PCIE_VDDC#4 H30 L31 PCIE_VSS#15 GND#15 AB22
H10 VDDR1#15 PCIE_VDDC#5 J29 L34 PCIE_VSS#16 GND#16 AB24
J7 J30 C324 C340 C309 C333 C297 C312 M34 AB27
VDDR1#16 PCIE_VDDC#6 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 4.7U/6.3V_6X PCIE_VSS#17 GND#17
J9 VDDR1#17 PCIE_VDDC#7 L28 M39 PCIE_VSS#18 GND#18 AC11
K11 VDDR1#18 PCIE_VDDC#8 M28 N31 PCIE_VSS#19 GND#19 AC13
K13 VDDR1#19 PCIE_VDDC#9 N28 N34 PCIE_VSS#20 GND#20 AC16
K8 VDDR1#20 PCIE_VDDC#10 R28 P31 PCIE_VSS#21 GND#21 AC18
C279 C339 C387 C710 C709 C398 L12 T28 P34 AC2
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X VDDR1#21 PCIE_VDDC#11 PCIE_VSS#22 GND#22
L16 VDDR1#22 PCIE_VDDC#12 U28 P39 PCIE_VSS#23 GND#23 AC21
L21 +VGPU_CORE R34 AC23
VDDR1#23 PCIE_VSS#24 GND#24
L23 VDDR1#24 (30A or more) T31 PCIE_VSS#25 GND#25 AC26
L26 VDDR1#25 VDDC#1 AA15 T34 PCIE_VSS#26 GND#26 AC28
L7 CORE AA17 T39 AC6
VDDR1#26 VDDC#2 PCIE_VSS#27 GND#27
M11 VDDR1#27 VDDC#3 AA20 U31 PCIE_VSS#28 GND#28 AD15
N11 AA22 C286 C285 C304 C325 C295 U34 AD17
C388 C660 C680 C290 C257 VDDR1#28 VDDC#4 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X PCIE_VSS#29 GND#29
P7 VDDR1#29 VDDC#5 AA24 V34 PCIE_VSS#30 GND#30 AD20
0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X0.1U/10V_4X 0.1U/10V_4X R11 AA27 V39 AD22
VDDR1#30 VDDC#6 PCIE_VSS#31 GND#31
U11 VDDR1#31 VDDC#7 AB16 W31 PCIE_VSS#32 GND#32 AD24
U7 VDDR1#32 VDDC#8 AB18 W34 PCIE_VSS#33 GND#33 AD27
Y11 VDDR1#33 VDDC#9 AB21 Y34 PCIE_VSS#34 GND#34 AD9
Y7 VDDR1#34 VDDC#10 AB23 Y39 PCIE_VSS#35 GND#35 AE2
VDDC#11 AB26 GND#36 AE6
VDDC#12 AB28 GND#37 AF10
VDDC#13 AC17 GND#38 AF16
VDDC#14 AC20 GND#39 AF18
LEVEL AC22 AF21
120 ohm/300mA (1.8V@110mA VDD_CT) TRANSLATION VDDC#15
VDDC#16 AC24 GND GND#40
GND#41 AG17

POWER
+1.8V_GPU L33 BLM15BD121SN1D_300MA VDDC_CT AF26 AC27 F15 AG2
VDD_CT#1 VDDC#17 GND#100 GND#42
AF27 VDD_CT#2 VDDC#18 AD18 F17 GND#101 GND#43 AG20
AG26 VDD_CT#3 VDDC#19 AD21 F19 GND#102 GND#44 AG22
C C618 C226 C244 AG27 AD23 F21 AG6 C
4.7U/6.3V_6X 1U/6.3V_4X 0.1U/10V_4X VDD_CT#4 VDDC#20 GND#103 GND#45
VDDC#21 AD26 F23 GND#104 GND#46 AG9
AF17 C318 C307 C308 C306 C296 C303 C261 C328 C292 C317 F25 AH21
I/O VDDC#22 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X GND#105 GND#47
(3.3V@60mA) VDDC#23 AF20 F27 GND#106 GND#48 AJ10
+3V_D AF23 VDDR3#1 VDDC#24 AF22 F29 GND#107 GND#49 AJ11
AF24 VDDR3#2 VDDC#25 AG16 F31 GND#108 GND#50 AJ2
AG23 VDDR3#3 VDDC#26 AG18 F33 GND#109 GND#51 AJ28
C228 C225 C223 AG24 AG21 F7 AJ6
4.7U/6.3V_6X 1U/6.3V_4X 1U/6.3V_4X VDDR3#4 VDDC#27 GND#110 GND#52 PowerXpress control signal for Madsion and Park only
VDDC#28 AH22 F9 GND#111 GND#53 AK11
AH27 G2 AK31 If not used, can be disconnected. (AL21 pin)
VDDC#29 C271 C273 C269 C277 C293 GND#112 GND#54
AF13 VDDR4#4 VDDC#30 AH28 G6 GND#113 GND#55 AK7
AF15 M26 4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X 4.7U/6.3V_6X H9 AL11 PX_EN = LOW, turn on
120 ohm/300mA VDDR4#5 VDDC#31 GND#114 GND#56
(1.8V@170mA) AG13 VDDR4#7 VDDC#32 N24 J2 GND#115 GND#57 AL14 PX_EN = HIGH, turn off
+1.8V_GPU L16 BLM15BD121SN1D_300MA VDDR4 AG15 N27 J27 AL17
VDDR4#8 VDDC#33 GND#116 GND#58
VDDC#34 R18 J6 GND#117 GND#59 AL2
VDDC#35 R21 J8 GND#118 GND#60 AL20
C232 C241 AD12 R23 K14 AL21
1U/6.3V_4X 0.1U/10V_4X VDDR4#1 VDDC#36 GND#119 GND#61
AF11 VDDR4#2 VDDC#37 R26 K7 GND#120 GND#62 AL23
AF12 VDDR4#3 VDDC#38 T17 L11 GND#121 GND#63 AL26
AG11 T20 L17 AL32 R104
VDDR4#6 VDDC#39 GND#122 GND#64 *0_4
VDDC#40 T22 L2 GND#123 GND#65 AL6
VDDC#41 T24 L22 GND#124 GND#66 AL8
+1.5V_GPU M96 ONLY T27 L24 AM11
VDDC#42 GND#125 GND#67
VDDC#43 U16 L6 GND#126 GND#68 AM31
L43 96@HCB1608KF-181T15_1.5A +VDDRHA M20 U18 M17 AM9
NC_VDDRHA VDDC#44 GND#127 GND#69 Pin AL21 to Ground for Broadway
M21 NC_VSSRHA VDDC#45 U21 M22 GND#128 GND#70 AN11
C793 U23 M24 AN2
96@0.1U/10V_4X VDDC#46 GND#129 GND#71
VDDC#47 U26 N16 GND#130 GND#72 AN30
+VDDRHB V12 V17 N18 AN6
NC_VDDRHB VDDC#48 GND#131 GND#73
U12 NC_VSSRHB VDDC#49 V20 N2 GND#132 GND#74 AN8
L42 9X@HCB1608KF-181T15_1.5A V22 N21 AP11
VDDC#50 GND#133 GND#75
VDDC#51 V24 N23 GND#134 GND#76 AP7
C795 V27 N26 AP9
9X@0.1U/10V_4X VDDC#52 GND#135 GND#77
VDDC#53 Y16 N6 GND#136 GND#78 AR5
120 ohm/300mA (1.8V@40mA PCIE_PVDD) PLL Y18 R15 AW34
L8 BLM15BD121SN1D_300MA PCIE_PVDD VDDC#54 GND#137 GND#79
+1.8V_GPU AB37 PCIE_PVDD VDDC#55 Y21 R17 GND#138 GND#80 B11
VDDC#56 Y23 R2 GND#139 GND#81 B13
MPV18 H7 Y26 +VGPU_CORE R20 B15
B
C138 C145 C139 MPV18#1 VDDC#57 GND#140 GND#82 B
H8 MPV18#2 VDDC#58 Y28 R22 GND#141 GND#83 B17
4.7U/6.3V_6X 1U/6.3V_4X 0.1U/10V_4X R24 B19
R470 0_8 GND#142 GND#84
Park,Madison ONLY R27 GND#143 GND#85 B21
SPV18 AM10 (DDR3 1.12V@4A VDDCI) or more R6 B23
120 ohm/300mA SPV18 ISOLATED_CORE R471 0_8 GND#144 GND#86
(1.8V@150mA MPV18) VDDCI#1 AA13 T11 GND#145 GND#87 B25
+1.8V_GPU L19 PARK_MAD@BLM15BD121SN1D_300MA SPV10 AN9 AB13 T13 B27
SPV10 VDDCI#2 GND#146 GND#88
VDDCI#3 AC12 T16 GND#147 GND#89 B29
AN10 AC15 C248 C327 C316 C255 T18 B31
C389 C390 C391 SPVSS VDDCI#4 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X GND#148 GND#90
VDDCI#5 AD13 T21 GND#149 GND#91 B33
PARK_MAD@4.7U/6.3V_6X
PARK_MAD@1U/6.3V_4X
PARK_MAD@0.1U/10V_4X AD16 T23 B7
VDDCI#6 GND#150 GND#92
VDDCI#7 M15 T26 GND#151 GND#93 B9
Park,Madison ONLY VDDCI#8 M16 U15 GND#153 GND#94 C1
VOLTAGE M18 U17 C39
120 ohm/300mA SENESE VDDCI#9 GND#154 GND#95
(1.8V@75mA SPV18) VDDCI#10 M23 U2 GND#155 GND#96 E35
+1.8V_GPU L13 PARK_MAD@BLM15BD121SN1D_300MA N13 U20 E5
VDDCI#11 GND#156 GND#97
[40] VGA_CORE_P AF28 FB_VDDC VDDCI#12 N15 U22 GND#157 GND#98 F11
N17 C272 C235 U24 F13
C147 C163 VDDCI#13 4.7U/6.3V_6X 4.7U/6.3V_6X GND#158 GND#99
VDDCI#14 N20 U27 GND#159
PARK_MAD@4.7U/6.3V_6X
PARK_MAD@0.1U/10V_4X T26 AG28 N22 U6
FB_VDDCI ISOLATED VDDCI#15 GND#160
R12 V11
CORE I/O VDDCI#16 R13 V16
GND#161
VDDCI#17 GND#163
AH29 FB_GND VDDCI#18 R16 V18 GND#164
(1.0V@120mA SPV10) [40] VSS_VCORE_P_SENSE VDDCI#19 T12 V21 GND#165
+1V_GPU L9 PARK_MAD@BLM15BD121SN1D_300MA T15 V23
VDDCI#20 GND#166
VDDCI#21 V15 V26 GND#167
+VGPU_CORE L44 9X@BLM15BD121SN1D_300MA Y13 W2
120 ohm/300mA C146 C162 VDDCI#22 GND#168
W6 GND#169
4.7U/6.3V_6X 0.1U/10V_4X Y15
Madison/Park_M2 GND#170
Y17 GND#171
Y20 GND#172
Y22 GND#173 VSS_MECH#1 A39
+3V
Route as differential Pair +3V +3V
Y24 GND#174 VSS_MECH#2 AW1
GPU all PWROK Y27
U13
GND#175 VSS_MECH#3 AW39
GND#152
R58 GPU +3V power V13 GND#162
1

10K_4 R61 Madison/Park_M2


A 9X@4.7K_4 A
R41 R89
10K_4 2 PARK_MAD@0_8
GPU_PWROK [30]
3

R410 9X@0_4 9X@AO3413_3A 0.5A


2 Q10 Q18
3

DMN601K-7_300MA +1.5V_GPU R82 *EV@0_4 2 Q17 +3V_D


3

9X@DDTC144EUA-7-F_30MA
R83 *EV@0_4 C116 C137 C134 C128
[30,40] GPU_VRON
2 Q8 9X@1U/6.3V_4X
+1.8V_GPU
Quanta Computer Inc.
1

DDTC144EUA-7-F_30MA *EV@10U/6.3V_8X *EV@1U/6.3V_4X *EV@0.1U/10V_4X

PROJECT : TE2
1

Size Document Number Rev


2A
Madison/Park PWR_GND
Date: Tuesday, March 09, 2010 Sheet 19 of 45
5 4 3 2 1
5 4 3 2 1

(1.8V@130mA DPA_VDD18)
U24H +1.8V_GPU
(1.8V@130mA DPA_VDD18) 120 ohm/300mA
+1.8V_GPU DP C/D POWER DP A/B POWER DPA_VDD18 L7 BLM15BD121SN1D_300MA
120 ohm/300mA
PARK_MAD@BLM15BD121SN1D_300MA L48 DPC_VDD18 AP20 AN24 DPA_VDD18
DPC_VDD18#1 DPA_VDD18#1 C120 C119 C124
AP21 DPC_VDD18#2 DPA_VDD18#2 AP24
D C811 C808 C809 4.7U/6.3V_6X 1U/6.3V_4X 0.1U/10V_4X D

PARK_MAD@0.1U/10V_4XPARK_MAD@1U/6.3V_4X PARK_MAD@4.7U/6.3V_6X
DPC_VDD10 AP13 AP31 DPA_VDD10
DPC_VDD10#1 DPA_VDD10#1
AT13 DPC_VDD10#2 DPA_VDD10#2 AP32
(1.0V@110mA DPA_VDD10) +1V_GPU
120 ohm/300mA
AN17 AN27 DPA_VDD10 L10 BLM15BD121SN1D_300MA
DPC_VSSR#1 DPA_VSSR#1
AP16 DPC_VSSR#2 DPA_VSSR#2 AP27
AP17 DPC_VSSR#3 DPA_VSSR#3 AP28
AW14 AW24 C141 C166 C151
DPC_VSSR#4 DPA_VSSR#4 4.7U/6.3V_6X 1U/6.3V_4X 0.1U/10V_4X
AW16 DPC_VSSR#5 DPA_VSSR#5 AW26
+1.8V_GPU

DPC_VDD18 AP22 AP25


DPD_VDD18#1 DPB_VDD18#1
AP23 DPD_VDD18#2 DPB_VDD18#2 AP26
(1.0V@110mA DPA_VDD10)
+1V_GPU +1V_GPU C617
120 ohm/300mA *0.1U/10V_4X
PARK_MAD@BLM15BD121SN1D_300MA L47 DPC_VDD10 AP14 AN33
DPD_VDD10#1 DPB_VDD10#1
AP15 DPD_VDD10#2 DPB_VDD10#2 AP33
C810 C812 C813
C329
PARK_MAD@0.1U/10V_4X PARK_MAD@1U/6.3V_4X PARK_MAD@4.7U/6.3V_6X *0.1U/10V_4X
C C
AN19 DPD_VSSR#1 DPB_VSSR#1 AN29
AP18 DPD_VSSR#2 DPB_VSSR#2 AP29
AP19 DPD_VSSR#3 DPB_VSSR#3 AP30
AW20 DPD_VSSR#4 DPB_VSSR#4 AW30
AW22 DPD_VSSR#5 DPB_VSSR#5 AW32 (1.8V@20mA DPA_PVDD)
Place close to IC Place close to IC 120 ohm/300mA
+1.8V_GPU

DPA_PVDD L32 BLM15BD121SN1D_300MA


R464 150/F_4 DPCD_CALR AW18 AW28 DPAB_CALR R465 150/F_4
DPCD_CALR DPAB_CALR
C610 C615 C621
DP E/F POWER DP PLL POWER 4.7U/6.3V_6X 1U/6.3V_4X 0.1U/10V_4X
AH34 AU28 +1.8V_GPU
DPE_VDD18 DPE_VDD18#1 DPA_PVDD
AJ34 DPE_VDD18#2 DPA_PVSS AV27

C623
AL33 AV29 +1.8V_GPU *0.1U/10V_4X
DPE_VDD10 DPE_VDD10#1 DPB_PVDD
AM33 DPE_VDD10#2 DPB_PVSS AR28

+1.8V_GPU (1.8V@400mA DPE/F_VDD18) C219


180 ohm/1.5A AN34 AU18 +1.8V_GPU *0.1U/10V_4X
L6 HCB1608KF-181T15_1.5A DPE_VDD18 DPE_VSSR#1 DPC_PVDD
AP39 DPE_VSSR#2 DPC_PVSS AV17
B AR39 DPE_VSSR#3
B
AU37 DPE_VSSR#4
C135 C129 C118 R622 EV@0_4 AW35 C207
0.1U/10V_4X 1U/6.3V_4X 4.7U/6.3V_6X DPE_VSSR#5 *0.1U/10V_4X
DPD_PVDD AV19
DPD_PVSS AR18

AF34 +1.8V_GPU
DPE_VDD18 DPF_VDD18#1 120 ohm/300mA
AG34 DPF_VDD18#2 (1.8V@40mA DPE/F_PVDD)
AM37 DPE_PVDD L35 BLM15BD121SN1D_300MA
DPE_PVDD
DPE_PVSS AN38
+1V_GPU (1.0V@400mA DPE/F_VDD10)
180 ohm/1.5A AK33 C636 C639 C642
L5 HCB1608KF-181T15_1.5A DPE_VDD10 DPE_VDD10 DPF_VDD10#1 4.7U/6.3V_6X 1U/6.3V_4X 0.1U/10V_4X
AK34 DPF_VDD10#2
AL38 R621 PARK_MAD@0_4
NC_DPF_PVDD
NC_DPF_PVSS AM35
C136 C131 C126
0.1U/10V_4X 1U/6.3V_4X 4.7U/6.3V_6X AF39 DPF_VSSR#1
AH39 DPF_VSSR#2
AK39 DPF_VSSR#3
AL34 R620
DPF_VSSR#4
AM34 DPF_VSSR#5 PARK_MAD@0_4
Place close to IC
R473 150/F_4 DPEF_CALR AM39
A DPEF_CALR A

Madison/Park_M2

DPF Quanta Computer Inc.


M92,M96-->NC
Madison,Park-->1.8V and GND PROJECT : TE2
Size Document Number Rev
2A
Madison/Park DPPW_GND
Date: Tuesday, March 09, 2010 Sheet 20 of 45
5 4 3 2 1
5 4 3 2 1

8
PIN STRAPS
CONFIGURATION STRAPS
+3V_D
Memory Aperture size ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
R124 10K/F_4
[15] GPU_GPIO0

[15] GPU_GPIO1
R123 10K/F_4 RAM_CFG[2:0] Size STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS DEFAULT REMARK

[15] GPIO3_SMBDAT
R126 *10K/F_4
000 128MB TX_PWRS_ENB GPIO0 0 = 50% TX OUTPUT SWING
1 = FULL TX OUTPUT SWING
0
D R125 *10K/F_4 D
[15] GPIO4_SMBCLK
001 256MB TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED 0
0 = TX DE-EMPHASIS DISABLED
R122 *10K/F_4 1 = TX DE-EMPHASIS ENABLED
[15] PWR_PSI#
010 64MB ENABLE EXTERNAL BIOS ROM (Only for GDDR5)
R170 *10K/F_4 BIOS_ROM_EN GPIO_22_ROMCSB 0 = DISABLE 0
[15] IO_VID0
1 = ENABLE
R463 *10K/F_4 011 32MB
[15,23] LVDS_BRIGHT
ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
NUMONYX M25P10A : 101
000 See ROM table

ROM Table BIF_GEN2_EN_A GPIO2 0 = PCIE DEVICE AS 2.5GT/S CAPABLE


1 = PCIE DEVICE AS 5GT/S CAPABLE
0
R106 *10K/F_4
[15] RAM_CFG2

[15] RAM_CFG1
R113 *10K/F_4
EXT_HSYNC EXT_VSYNC Discription GPIO_8_ROMSO
H2SYNC
GPIO8
H2SYNC Reserved Only 0
GPIO_21_BB_EN GPIO21
R98 10K/F_4
[15] RAM_CFG0
0 0 No Audio AUD[1:0]
AUD[1] HSYNC 00: NO AUDIO FUNCTION.
Any one by dectec 01: AUDIO FOR DISPLAYPORT AND HDMI IF
[15] GPU_GPIO2
R95 *10K/F_4 0 1 AUD[0] VSYNC ADAPTER IS DETECTED.
10: AUDIO FOR DISPLAYPORT ONLY.
11 See Audio table

R137 *10K/F_4
[15] V2SYNC
1 0 DP only 11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.
R110 *10K/F_4
[15] GPU_GPIO8
R127 *10K/F_4 1 1 Both DP & HDMI GPIO_9_ROMSI GPIO9 0 = VGA controller capacity enable 0
[15] GPU_GPIO9
R121 *10K/F_4
[15] GPU_GPIO10
VIP_DEVICE_STRAP_ENA V2SYNC 0 = DRIVER would ignore the value sample on VHAD_0 during RESET. 0
C R100 *10K/F_4 C
[15] GPU_GPIO22
DDR3 Memory TYPE VIP: Video Capture Port Interface

Hynix-1GB +1.8V_GPU
RAM_STRAP3 RAM_STRAP2 RAM_STRAP1 RAM_STRAP0 RAM_STRAP4
Vendor Vendor P/N STN B/S P/N Size R458 *10K/F_4
EEPROM DVPDATA_3 DVPDATA_2 DVPDATA_1 DVPDATA_0 15" 14" [15] RAM_STRAP4
R469 10K/F_4
U40
GPU_GPIO9 5 D Q 2 GPU_GPIO8 512MB 0 1 0 0 0 1
GPU_GPIO10 6 Hynix H5TQ1G63BFR AKD5LZGTW00
C R455 *10K/F_4
GPU_GPIO22 1 S
-12C (64M*16) 1GB 0 0 0 0 0 1 [15] RAM_STRAP3
R462 10K/F_4
+3V_D 7 HOLD
R618 *10K/F_4 3 W
8 VCC VSS 4
R617 R456 *10K/F_4
[15] RAM_STRAP2
C794 *9X@M25P10-AVMN6P
R467 10K/F_4

*9X@10K/F_4 *9X@0.1U/10V_4X
512MB 0 1 0 1 0 1
K4W1G1646E AKD5LGGT502 R457 *10K/F_4
[15] RAM_STRAP1
-HC12 (64M*16) R468 10K/F_4
Samsung 1GB 0 0 0 1 0 1
B R454 *10K/F_4 B
Thermal Sensor
+3V_D 1 [15] RAM_STRAP0
R461 10K/F_4

R67 R52 Vendor P/N


4.7K_4 4.7K_4 WINDBOND AL83L771K01
2

Q11 DMN601K-7_300MA GMT AL000780000


[30] 3ND_MBCLK 3 1
+3V_D Power Up/Down Sequence
+3V_D
2

R405
Q16 DMN601K-7_300MA 0_6
[30] 3ND_MBDATA 3 1
R43 R44 ADDRESS: 98H C109 0.1U/10V_4X +VGPU_CORE VDDC
10K_4 10K_4
U6
+VGPU_IO VDDCI
[15] SCL R63 *0_4 8 1
SCLK VCC GPU_D+ [15]

[15] SDA R65 *0_4 7 2 C108 +1.5V_GPU VDDR1


SDA DXP
2200P/50V_4X
+1V
[15] ALT#_GPIO17 6 ALERT# DXN 3
GPU_D- [15] IO
[3] VGA_THERM# 4 OVERT# GND 5
A A
+3V_D VDDR3
LM95245CIMM NOPB
GPIO3_SMBDAT R62 *0_4 ADDRESS: 98H
GPIO4_SMBCLK R51 *0_4
+1.8V_GPU VDD_CT

20ms 20ms
Quanta Computer Inc.
PROJECT : TE2
Size Document Number Rev
2A
Memory strip/Thermal/HDCP
Date: Tuesday, March 09, 2010 Sheet 21 of 45
5 4 3 2 1
5 4 3 2 1

HDMI Conn

D D

C C

[15] HDMI_DDCCLK
HDMI_DDCCLK
HDM_DDCDATA
Close to HDMI CONN
[15] HDM_DDCDATA
HDMITX0P 1 2 HDMITX0P
HDMITX0N 4 3 HDMITX0N

CN13 RP13 *DLP11SN900HL2L(90,0.15A)


B B
SHELL1 20
[15] HDMITX2P HDMITX2P 1 HDMITX2P 1 2 HDMITX2P
HDMITX2N R156 *HM@100_4 HDMITX2P D2+ HDMITX2N HDMITX2N
2 D2 Shield 4 3
[15] HDMITX2N HDMITX2N 3
HDMITX1N R150 *HM@100_4 HDMITX1P HDMITX1P D2- RP14 *DLP11SN900HL2L(90,0.15A)
[15] HDMITX1P 4 D1+
5 D1 Shield
HDMITX0N R153 *HM@100_4 HDMITX0P [15] HDMITX1N HDMITX1N 6 HDMITX1P 4 3 HDMITX1P
HDMITX0P D1- HDMITX1N HDMITX1N
[15] HDMITX0P 7 D0+ 1 2
HDMICLK- R143 *HM@100_4 HDMICLK+ 8
HDMITX0N D0 Shield RP12 *DLP11SN900HL2L(90,0.15A)
[15] HDMITX0N 9 D0- GND 23
HDMI_DDCCLK +5V HDMICLK+_R 10 CK+ HDMICLK+ HDMICLK+_R
11 CK Shield GND 22 [15] HDMICLK+ 1 2
HDM_DDCDATA HDMICLK-_R 12 [15] HDMICLK- HDMICLK- 4 3 HDMICLK-_R
CK-
13 CE Remote
14 RP11 DLP11SN900HL2L(90,0.15A)
C221 C243 R134 HM@2.2K_4 HDMI_DDCCLK NC
15 DDC CLK
*HM@56P/50V_4 *HM@56P/50V_4 R128 HM@2.2K_4 HDM_DDCDATA 16 DDC DATA
17 GND
DDC5V 18
HDMI_CON_HP +5V
[15] HDMI_CON_HP 19 HP DET
SHELL2 21

HM@C12826-11905-L

+5V

ESD3
HDMI_DDCCLK 1 10 HDMI_DDCCLK
30mils HDM_DDCDATA 2
1
2
10
9 9 HDM_DDCDATA
A F2 A
3 GND_3/8
D23 2 1 HM@RSX101M-30_1A 2 1 FUSE1A6V_POLY-1A-6V DDC5V 4 7 DDC5V
HDMI_CON_HP 4 7 HDMI_CON_HP
5 5 6 6
C687
*HM@RClamp0524P
*HM@10U/6.3V_8X C655

HM@0.1U/10V_4X
Quanta Computer Inc.
PROJECT : TE2
Size Document Number Rev
2A
HDMI CONN
Date: Wednesday, March 10, 2010 Sheet 22 of 45
5 4 3 2 1
5 4 3 2 1

CCD [CCD] LCD POWER SWITCH [LDS] HALL SENSOR&BACK LIGHT SWITCH [HSR]

+3VPCU R431 100K_4


+3V

USBP0+_LCD R5 *short_6 R407


USBP0+ [9]
USBP0-_LCD R4 *short_6 1 2 LID591#
USBP0- [9] +15V 1K_4
MR1
F1 2 1 *SMD1206P100TF +3V C573
D PT3661-BB D

3
R441 0.1U/10V_4X

3
D22 2 1 *SSM14LPT_1A
330K_6 1.5A(65mils) DISPON [30]
R442 *short_8 Q55
0.2A(20mils) +3VPCU LCDONG 2 LCDVCC
ME2306_4A
DISPON D18 RSX101M-30_1A
LID591# [30]
+3V 1 3 CCD_POWER
R439 C578 LCDVCC1 L28 0_6

1
3
C579 10U/6.3V_8X
+

Q54 100K_4 0.01U/25V_4X D17 RSX101M-30_1A


LVDS_BRIGHT [15,21]
2

C583 *1000P/50V_4X R443 C32 C585 C580


*AO3413_3A +3V 2 Q51 +3V
C584 *0.1U/10V_4X 22_8 0.1U/10V_4X 0.01U/25V_4X 10U/6.3V_8X
2N7002_200MA

3
LCDDISCHG
Q53 R408 R409

3
R440 2
[15] LVDS_DIGON

3
*4.7K_4 100K_4
10K_4
LCDON# 2 Q52

1
PDTC143TT_100MA 2
3
2N7002_200MA

3
R438 Q39
2

1
CCD_POWERON [30] 100K_4 2 2N7002_200MA
EC_FPBACK# [30]

1
2
Q50 Q41
1

*DDTC144EUA-7-F_30MA Q40

1
DDTC144EUA-7-F_30MA
2N7002_200MA

1
C C

LCD Panel Module [LDS] CRT [CRT]


CN3 +5V +3V +5VPCU +5VPCU
R6 0_6 LCD_BK_POWER LCDVCC 1 BLM18BA470SN1D_300MA
VIN
0.3A (20mils) LCDVCC
2
1
2 [15] CRT_RED
L31 RED_L
+3V 3 BLM18BA470SN1D_300MA C45 C44 C588 C581
C35 C26 C38 LCD_EDIDCLK 3 L30 GREEN_L
+ [15] LCD_EDIDCLK 4 [15] CRT_GRE
LCD_EDIDDATA 4 BLM18BA470SN1D_300MA 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X
[15] LCD_EDIDDATA 5 5
10U/25V_1206X 1000P/50V_4X 0.1U/25V_6X 6 L29 BULE_L
6 [15] CRT_BLU
LCD_TXLOUT0- 7
[15] LCD_TXLOUT0- 7
LCD_TXLOUT0+ 8
[15] LCD_TXLOUT0+ 8
9 9
LCD_TXLOUT1- 10 C598 C596 C594 C593 C595 C597
[15] LCD_TXLOUT1- 10
LCD_TXLOUT1+ 11
[15] LCD_TXLOUT1+ 11
12 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N 6.8P/50V_4N
LCD_TXLOUT2- 12
[15] LCD_TXLOUT2- 13 13
LCD_TXLOUT2+ 14
[15] LCD_TXLOUT2+ 14
15 15
LCD_TXLCLKOUT- 16
[15] LCD_TXLCLKOUT- 16
LCD_TXLCLKOUT+ 17
[15] LCD_TXLCLKOUT+ 17
18 18
LVDS_VADJ 19
DISPON 19
20 20
21 21
LCD_BK_POWER 22 22
23 23
24 24 34 34
USBP0+_LCD 25 25
USB To CRT Board[USB]
USBP0-_LCD 26 33
CCD_POWER 26 33
B 27 27 B
L45 BLM18PG471SN1D(470,1000MA) 28 32
[27] DMIC_CLK 28 32
+3V R9 2.2K_4 LCD_EDIDCLK [27] DMIC_IN L46 BLM18PG471SN1D(470,1000MA) 29 29 CN4
30 30 31 31
+5V 1
R8 2.2K_4 LCD_EDIDDATA 50373-03001-001 +5.5V [15] CRT_DDCCLK 2
C28 C27
I(max):0.1136A [15] CRT_DDCDAT 3
Power:0.625W +3V 4
22P/50V_4N 22P/50V_4N
[15] CRT_VSYNC 5
[15] CRT_HSYNC 6
+5VPCU 7
80 mils RED_L
8
80 mils C626 C814 GREEN_L 9
LCD_EDIDCLK LCD_EDIDDATA +3V LCDVCC 10
*0.1U/10V_4X 1U/10V_6X BULE_L 11
R2 0_4 U25 12
[15] LVDS_PWM 13
C30 C29 C31 C33 2
G545A2P8U
8
80 mils USBPWR3
[30] CRT_SENSE# 14
R3 *0_4 LVDS_VADJ IN1 OUT3 15
[30] CONTRAST 3 IN2 OUT2 7 16
*22P/50V_4N *22P/50V_4N *0.1U/25V_4X *0.1U/25V_4X 6
OUT1 17
[30] USB_EN1# 4 EN# [9] USBP8+ 18
C34 0.1U/10V_4X 1 C635
GND [9] USBP8- 19
9 5 R404 *10K_4 +3V_S5 10U/6.3V_8X
GND-C OC# 20

87213-2000-20p-r

[9,30] USBOC#8

A A

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
LCD/LED Panel/CCD
Date: Tuesday, March 09, 2010 Sheet 23 of 45
5 4 3 2 1
5 4 3 2 1

MINI Card Slot#1 +1.5V WIMAX_P


(WiFi) [WLN] +3V_S5 +1.5V
2.75A(120mils)
0.5A(30mils)
R369 *0_4 SERIRQ_debug
[7,30] SERIRQ
R366 *0_4 LDRQ#1__debug C469 C773 C473 C435
[7] LDRQ#1
PLTRST# R362 100K_4 PLTRST#_debug
+3V WIMAX_P R356 *0_4 PCLK__debug 0.1U/10V_4X 0.01U/25V_4X 0.1U/10V_4X 10U/6.3V_8X
[9] PCLK_DEBUG
CN16
L24 PBY201209T-330Y-N_4A 51 52
R364 *0_4 CL_RST#1_WLAN NC +3.3V
[8] CL_RST#1 49 C-Link_RST GND 50
R365 *0_4 PLTRST#_PCIE 47 48
D [8] CL_DATA1 C-Link_DAT +1.5V D
R357 *0_4 CL_CLK1_WLAN 45 46
[8] CL_CLK1 C-Link_CLK LED_WPAN#
43 GND LED_WLAN# 44
41 NC NC 42
39 NC NC 40
+3V_S5 37 38
GND USB_D+ USBP5+ [9]
+3V_S5 1 3 35 GND USB_D- 36 USBP5- [9]
[8] PCIE_TXP5 33 PETp0 GND 34
Q35 *AO3413_3A 31 32 WL_SMDATA WIMAX_P
[8] PCIE_TXN5 PETn0 SMB_DATA
29 30 WL_SMCLK
2

R341 GND SMB_CLK


27 GND +1.5V 28
*4.7K_4 25 26
[8] PCIE_RXP5
[8] PCIE_RXN5 23
PERp0
PERn0
GND
+3.3Vaux 24 +3V_S5
0.33A(30mils)

2
4
R472 0_4 21 22 PLTRST#
GND PERST# RF_EN RP8
19 NC W_DISABLE# 20 RF_EN [30]
Q34 17 18
3
WIMAX_P NC GND
15 16 LFRAME#_PCIE R303 *0_4 *4.7KX2
GND NC

2
2 13 14 LAD3_PCIE R293 *0_4 LFRAME# [7,30]
WMAX_P [30] [8] CLK_PCIE_MINI

1
3
REFCLK+ NC

2
11 12 LAD2_PCIE R282 *0_4 LAD3 [7,30]
Q64 *2N7002_200MA [8] CLK_PCIE_MINI# REFCLK- NC
9 10 LAD1_PCIE R273 *0_4 LAD2 [7,30] 3 1 WL_SMDATA
GND NC LAD1 [7,30] [2,8,28] SDATA
3 1 PCIE_CLK_RQ5#_C 7 8 LAD0_PCIE R263 *0_4
[8] PCIE_CLK_RQ5#
1

CLKREQ# NC LAD0 [7,30] Q38 *2N7002_200MA


5 BT_CHCLK +1.5V 6
*DDTC144EUA-7-F_30MA 3 4
TP86 BT_DATA GND
WLAN_WAKE# 1 2 R342 0_4
R7 *0_4 WAKE# +3.3V
80003-5121
Intel module use S5 power for WIMAX_P
+3.3V
Other module keep +3V for +3.3V [30] BT_EN# 3 1
C C
Q62 2N7002_200MA

2
2
WIMAX_P R392 *10K_4
WIMAX_P
R637 *10K_4 3 1 WL_SMCLK
[2,8,28] SCLK
Q37 *2N7002_200MA
C492 C779 C485 C494
[9,28] PCIE_WAKE# 3 1
0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 10U/6.3V_8X R335 0_4
Q25 *2N7002_200MA

2
R241 *10K_4
+3V_S5

MINI Card Slot#2 +3V_3G


+1.5V_3G
SIM CARD
3G [M3G]

+3V_3G +1.5V_3G
2.75A(120mils)
CN17
C778 C451 C444 C438 C462 C772 C449 51 52
NC +3.3V
49 C-Link_RST GND 50
3G@0.01U/25V_4X 3G@0.1U/10V_4X 3G@0.1U/10V_4X 3G@10U/6.3V_8X *3G@0.01U/25V_4X *3G@0.1U/10V_4X *3G@10U/6.3V_8X 47 48 JSIM1
C-Link_DAT +1.5V
45 C-Link_CLK LED_WPAN# 46
B
43 GND LED_WLAN# 44 1 B
41 42 UIM_CLK
+3.3V LED_WWAN# 2
39 +3.3V CPUSB# 40 CPUSB# [10] 3
37 38 USBP10+ [9] UIM_DATA
CPEE# USB_D+ 4
35 GND USB_D- 36 USBP10- [9] 5
33 34 UIM_RST
[8] PCIE_TXP3 PETp0 GND 6
31 32 UIM_VPP
[8] PCIE_TXN3 PETn0 SMB_DATA 7
29 30 UIM_PWR C394 3G@0.1U/10V_4X
GND SMB_CLK 8
27 GND +1.5V 28 9
[8] PCIE_RXP3 25 PERp0 GND 26 10 USBP4+ [9]
[8] PCIE_RXN3 23 RERn0 +3.3Vaux 24 1411 USBP4- [9]
21 22 PLTRST#
GND RESET# PLTRST# [3,9,28,29,30] 1312
19 20 3G_EN
MMC_DAT W_DISABLE# 3G_EN [30]
17 MMC_CMD GND 18
3G@88511-120N
+3V_S5 +3V_3G +3V_S5 +1.5V +1.5V_3G 15 16 UIM_VPP
GND UIM_VPP UIM_RST
[8] CLK_PCIE_3G 13 REFCLK+ UIM_RST 14
11 12 UIM_CLK
0.5A(30mils) [8] CLK_PCIE_3G#
9
REFCLK-
GND
UIM_CLK
UIM_DATA 10 UIM_DATA
7 8 UIM_PWR
[8] PCIE_CLK_REQ4# CLKREQ# UIM_PWR
1 3 5 6 C767
R314 R299 *3G@0_8 BT_CHCLK +1.5V
3 BT_DATA GND 4
Q30 3G@AO3413_3A 3G@4.7K_4 PCIE_WAKE# 3 1 3G_WAKE# 1 2 *3G@100P/50V_4N

54
53
WAKE# +3.3V
2

Q36 *3G@2N7002_200MA 80003-5121

54
53
2

R370 *3G@10K_4
+3V_3G
3

A Q29 A
2 3G_P [30]
3G@DDTC144EUA-7-F_30MA
1

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
MINI CARD(WLAN/3G/SIM Card)
Date: Friday, March 19, 2010 Sheet 24 of 45
5 4 3 2 1
5 4 3 2 1

E-SATA [ESA]

SATA HDD Re-driver IC ESATA_VCC

ESATA_VCC

C827 C826
D
*0.01U/25V_4X *0.1U/16V_4Y D

R631 *0_6
+3V 0.125A(20mils)
+1.5V R625 *0_6 ESATA_VCC

20

10

16

6
U31

VCC

VCC

VCC

VCC
SATA_TXP5 C831 *0.01U/25V_4X SATA_TXP5_C 1 15 BSATA_TXP5_C C823 0.01U/25V_4X BSATA_TXP5
[7] SATA_TXP5 AI+ AO+
SATA_TXN5 C206 *0.01U/25V_4X SATA_TXN5_C 2 14 BSATA_TXN5_C C829 0.01U/25V_4X BSATA_TXN5
[7] SATA_TXN5 AI- AO-
SATA_RXN5 C825 *0.01U/25V_4X SATA_RXN5_C 4 12 BSATA_RXN5_C C828 0.01U/25V_4X BSATA_RXN5
[7] SATA_RXN5 BO- BI-
SATA_RXP5 C824 *0.01U/25V_4X SATA_RXP5_C 5 11 BSATA_RXP5_C C830 0.01U/25V_4X BSATA_RXP5
[7] SATA_RXP5 BO+ BI+
R634 *0_4 7 9 R626 *100_4

GND_P
ESATA_VCC EN A_EM ESATA_VCC

Mode

GND
GND
GND
GND
8 R119 *100_4 ESATA_VCC
B_EM
Place close Place close
R633 *0_4 *PI3EQX4951STZDE
[10] ESATA_DN#

17

3
19
18
13

21
R48 R49

*10K_4 *10K_4
Place close
R115 *0_4

SATA_TXP5 R628 0_4 BSATA_TXP5_C


SATA_TXN5 R627 0_4 BSATA_TXN5_C

SATA_RXP5 R629 0_4 BSATA_RXP5_C


C
SATA_RXN5 R630 0_4 BSATA_RXN5_C C

USBP13+ 1 3 R_BUSBP13+
[9] USBP13+
USBP13- 2 4 R_BUSBP13-
[9] USBP13-
BSATA_RXP5 D6 *EGA10402V05AH
RP16 DLP11SN900HL2L(90,0.15A)
BSATA_RXN5 D7 *EGA10402V05AH
12

14
ESATA CONN CN14 BSATA_TXP5 D25 *EGA10402V05AH
Shield

Shield
BSATA_TXN5 D24 *EGA10402V05AH

USBPWR2 1 11
VCC GND BSATA_RXP5
B+ 10
R_BUSBP13- 2 9 BSATA_RXN5 R_BUSBP13- D8 *EGA10402V05AH
+ C360 D- B-
GND 8
R_BUSBP13+ 3 7 BSATA_TXN5 R_BUSBP13+ D9 *EGA10402V05AH
*100U/6.3V_3528P_E45b D+ A- BSATA_TXP5
A+ 6
4 5 USBPWR2 D5 *VPORT 0603 220K-V05
GND GND
Shield

Shield

3Q38111-R02C1B-7H
13

15

USB MB SIDE
B Close to CN25 B

D27 2 1 USBP9-_C
+5VPCU
+5.5V 80 mils *EGA10402V05AH
D29
I(max):0.1136A 80 mils C447 C453
2 1 USBP9+_C
*EGA10402V05AH
Power:0.625W
*0.1U/10V_4X 1U/10V_6X
U14

2
G545A2P8U
8
80 mils USBPWR2
IN1 OUT3
3 IN2 OUT2 7
OUT1 6
[30] USB_EN0# 4 EN#
1 C448 CN15
GND R245 *10K_4 10U/6.3V_8X
9 GND-C OC# 5 +3V_S5

6
USBPWR2
80 mils
USBP9-_C 1
USBP9+_C 2
3

1
+ C461 D32 4
*VPORT 0603 220K-V05

5
*100U/6.3V_3528P_E45b
[9,30] USBOC#13_9

2
020173MR004S555ZL

A A

1 3 USBP9+_C
[9] USBP9+
2 4 USBP9-_C
[9] USBP9-

RP17 DLP11SN900HL2L(90,0.15A)

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
TP/SW/ESATA/USB+Audio/LED
Date: Tuesday, March 09, 2010 Sheet 25 of 45
5 4 3 2 1
5 4 3 2 1

SATA ODD
[ODD]

R575 0_1206
0.2A(20mils)
CN19
GND14 14
+5V 1 3 +5V_ODD
D GND1 1 D
RXP 2 SATA_TXP1 [7]
3 Q59
SATA_TXN1 [7]

2
RXN
GND2 4
5 SATA_RXN1_C C774 0.01U/25V_4X *AO3413_3A +5V
TXN SATA_RXN1 [7]
6 SATA_RXP1_C C775 0.01U/25V_4X SATA_RXP1 [7]
TXP
GND3 7

8 R588 1K_4 R550


DP
+5V 9 1.6A(100mils) *4.7K_4
10 +5V_ODD
+5V
RSVD 11
GND 12

3
13 C766 C765 C761 C763 C758 + C755
GND
15 *0.1U/10V_4X *0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 10U/6.3V_8X *100U/6.3V_3528P_E45b 2
GND15 ODD_EN [30]
SLS-13DE1G
Q61

1
*DDTC144EUA-7-F_30MA

C C
HDD_VCC
SATA HDD Re-driver IC
R27 0_6
+3V 0.125A(20mils)
+1.5V R20 *0_6 HDD_VCC

20

10

16

6
U4

VCC

VCC

VCC

VCC
SATA_TXP0 C600 0.01U/25V_4X SATA_TXP0_C 1 15 BSATA_TXP0_C C62 0.01U/25V_4X BSATA_TXP0
[7] SATA_TXP0 AI+ AO+ HDD_VCC
SATA_TXN0 C601 0.01U/25V_4X SATA_TXN0_C 2 14 BSATA_TXN0_C C63 0.01U/25V_4X BSATA_TXN0
[7] SATA_TXN0 AI- AO-
SATA_RXN0 C94 0.01U/25V_4X SATA_RXN0_C 4 12 BSATA_RXN0_C C60 0.01U/25V_4X BSATA_RXN0
[7] SATA_RXN0 BO- BI-
SATA_RXP0 C95 0.01U/25V_4X SATA_RXP0_C 5 11 BSATA_RXP0_C C61 0.01U/25V_4X BSATA_RXP0 C75 C72
[7] SATA_RXP0 BO+ BI+
0.01U/25V_4X 0.1U/16V_4Y
7 9 R25 *100_4
GND_P

HDD_VCC EN A_EM HDD_VCC


Mode

GND
GND
GND
GND

8 R28 *100_4 HDD_VCC


B_EM
PI3EQX4951STZDE
17

3
19
18
13

21

R24 R29
Place close 10K_4 10K_4 Place close
R35 0_4

ESATA Re-driver Bypass


B B

SATA HDD
[HDD]
CN11

GND23 23

GND1 1
2 BSATA_TXP0
RXP BSATA_TXN0
RXN 3
GND2 4
5 BSATA_RXN0
TXN BSATA_RXP0
TXP 6
GND3 7

3.3V 8
3.3V 9
3.3V 10
GND 11
GND 12
GND 13
5V 14
5V 15
5V 16
GND 17
18
A
RSVD
GND 19 0.94A(80mils) A

12V 20
21 +5V_HDD1 R445 *short_8 +5V
12V
12V 22

24 C582 C589 C591 + C590


GND24
SAT-22HL0B 0.1U/10V_4X 0.1U/10V_4X 10U/6.3V_8X *100U/6.3V_3528P_E45b

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
HDD/ODD/MDC
Date: Tuesday, March 09, 2010 Sheet 26 of 45
5 4 3 2 1
5 4 3 2 1

AUDIO JACK
Codec (CX20583) [ADO] Output Output
FILT_1.65V AVDD_3.3

C503 C502 C507 C505

1U/6.3V_4X 0.1U/10V_4X 10U/6.3V_8X 0.1U/10V_4X Earphone


GND GND
+3V R373 0_6 1.2mA(20mils) +3AVDD
CN20
C487 C530 C493 1
D D
D3A: C506,C507,C523,C542,C550 change to 0805 footprint. HPOUT-L R596 5.1/F_6 HPOUT-L2 L39 BK1608LL121_150MA HPOUT-L3 2
AMD G HDA only +3V_S5 10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X 6 10
HPOUT-R R597 5.1/F_6 HPOUT-R2 L40 BK1608LL121_150MA HPOUT-R3
Intel either +1.5V_S5 or +3V_S5 Near chip 3
4
7
8
Port_A# 9
5
GND
+3V_S5 R416 0_6 C783 C781 C784 2SJ1012-023111

R417 *0_6 0.061mA(15mils) +1.5AVDD_S5_VDD_IO +5AVDD (100mils) L25 PBY160808T-601Y-N_1A *100P/50V_4N *100P/50V_4N *0.1U/25V_6X
Normal Open Jack
+1.5V_S5 +5V
Stuff C51,C52 100p GND
C565 C564 C523 C504

10U/6.3V_8X 0.1U/10V_4X 10U/6.3V_8X 0.1U/10V_4X


Determining HDA use +1.5V/+3V R383
0.1/F_1206 GND
*VPORT 0402 151 MV05
GND GND D36 2 1 HPOUT-L3 Port_A#

+3V_S5 R419 0_6 +3AVDD_S5 48.7mA(20mils) PIN 20,23,25 CLOSE +5AVDD GND D38
Close to MIC CONN
C567 C562
Output CLASSD_5V (30mils) *VPORT 0402 151 MV05
D37 2 1 HPOUT-R3 *VPORT 0603 220K-V05
10U/6.3V_8X 0.1U/10V_4X FILT_1.8V

C570 C558 C538 C539 C548 C550 C542 GND


Note: R619
In order for the audio codec to Wake on Jack, the CODECGND 10U/6.3V_8X 0.1U/10V_4X 10K_4 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 10U/6.3V_8X 10U/6.3V_8X
VAUX pin (VAUX_3.3, pin 4) must be powered by a rail
that is not removed unless AC power is removed.

11
24
34

37

35

36

17

20

22
7
2
6
U20 GND
GND

VDD_IO

AVDD_5V
AVDD_HP
FILT_1.8
VAUX_3.3
VAUX_3.3

DVDD_3.3

FILT_1.65

AVDD_3.3

LPWR_5.0

RPWR_5.0

CLASSDREF
GND C554 0.1U/10V_4X
External MIC
[7] ACZ_RST#_AUDIO 13 RESET#
C C
D3A: L26,L27 change to CX8LL121002. MIC1-VREFO
R413 0_4 BIT_CLK_AUDIO_R 9 50 SENSE_A
[7] BIT_CLK_AUDIO BIT_CLK SENSE_A
12 49 SENSE_B C780
[7] ACZ_SYNC_AUDIO SYNC SENSE_B
[7] ACZ_SDIN0_AUDIO R414 33_4 SDATA_IN 10 R635 R594
SDATA_IN T46 2.2K_4 *4.7U/6.3V_6X
[7] ACZ_SDOUT_AUDIO 8 SDATA_OUT PORTF_R 48 2.2K_4
47 T47
DIB_P L27 MDC@0_4 PORTF_L
DIB_N L26 MDC@0_4 DIB_P_R 56 46 MIC1-RR C529 2.2U/6.3V_6X MIC1_R1 GND CN18
DIB_N_R DIB_P PORTB_R MIC1-LL C520 2.2U/6.3V_6X MIC1_L1
55 DIB_N PORTB_L 45 1
R399 MDC@100K_4 44 MIC1-VREFO_B R361 0_4 MIC1-VREFO MIC1_L1 R584 100/F_6 MIC1_L2 L37 BK1608LL121_150MA MIC1_L3 2
B_BIAS
6 10
R401 33_4 PCBEEP_R C551 0.1U/10V_4XPCBEEP_C 15 42 T45 MIC1_R1 R587 100/F_6 MIC1_R2 L38 BK1608LL121_150MA MIC1_R3 3 7
[7,10] PCBEEP PC_BEEP C_BIAS
41 T41 4 8
T53 PORTC_R T44 C768 C759
54 SPDIF PORTC_L 40 9
Port_B# 5
R400 T52 53 CX20587 39 T43 100P/50V_4N 100P/50V_4N
C556 C553 *10K_4 T49 GPIO0/EAPD# PORTE_R T42 C771 2SJ1012-023111
52 GPIO1/SPK_MUTE# PORTE_L 38

MDC@100P/50V_4N
MDC@100P/50V_4N
T51 51 GPIO2/SPDIF2 C3A 33 T40 *0.1U/25V_6X
Normal Open Jack GND
PORTD_R T39
PORTD_L 32
GND 3 GND
GND GND R412 100_4 DMIC_3/4 HPOUT-R
[23] DMIC_CLK 4 DMIC_CLK0 PORTA_R 31
DMIC_IN 5 30 HPOUT-L
[23] DMIC_IN DMIC_1/2 PORTA_L GND
23 27 AVEE GND
AUXENABLE AVEE FLY_N
1 AUX_CLK FLY_N 26
FLY_P C521 1U/6.3V_4X Close to Earphone CONN Port_B#
EXT_MUTE#

FLY_P 25 *VPORT 0402 151 MV05


C511 C506
EP_GND
RIGHT+

D33 MIC1_L3
HPFILT

RIGHT-

For EMI 2 1
LEFT+

LEFT-

GND 0.1U/10V_4X 10U/6.3V_8X D35


GND
GND

GND *VPORT 0402 151 MV05


BIT_CLK_AUDIO_R
D34 2 1 MIC1_R3
14

43

16

18

19

21

29
28

57

C563 GND *VPORT 0603 220K-V05

*10P/50V_4C AMP_MUTE# GND


[30] AMP_MUTE#
B B

Low Active
GND GND D3A: 0-ohm change to 0.1-ohm for speaker issue.
Internal Speaker
R551 0_4
R514 0_4 CN5
R546 0_4 SPK_R+ R230 0.1_8 INSPKR+N
R518 0_4 SPK_R- R231 0.1_8 INSPKR-N 4
R396 0_4 SPK_L- R286 0.1_8 INSPKL-N 35
R576 0_4 SPK_L+ R287 0.1_8 INSPKL+N 26
1
88266-04001-06 MDC
CN10
GND 1 2
INSPKL-N SB_GPIO7 +3V
3 SB_GPIO27 GND 4
INSPKL+N D3A: remove ESD protector from Cost issue. 5 6
INSPKR-N DIB_P FM_INT AGND
7 DIB_P FM_L 8
INSPKR+N DIB_N 9 10
INSPKR+N INSPKR-N INSPKL+N INSPKL-N DIB_N FM_R
11 FM_DET# AGND 12
C403 C404 C442 C441
1000P/50V_4X 1000P/50V_4X 1000P/50V_4X 1000P/50V_4X D3 D4 D2 D1 MDC@88023-12101

C37 C36
GND GND GND GND *VPORT 0603 220K-V05 *VPORT 0603 220K-V05 *VPORT 0603 220K-V05 *VPORT 0603 220K-V05
GND *22P/50V_4N *22P/50V_4N

SENSE PIN A SENSE PIN B


DMIC_CLK +3AVDD_S5
DMIC_IN +3AVDD_S5
MIC1-LL
MIC1-RR

R388 R376
5.11K/F_4 5.11K/F_4
A C531 C514 C561 C572 A

*0.47U/6.3V_4X *0.47U/6.3V_4X *0.47U/6.3V_4X *0.47U/6.3V_4X


R387 39.2K/F_4 Port_A# SENSE_B
SENSE_A R386 20K/F_4 Port_B#

GND GND GND GND

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
Codec (CX20583)
Date: Friday, March 19, 2010 Sheet 27 of 45
5 4 3 2 1
5 4 3 2 1

Atheros Lan
U3

LAN_VDD33 LAN_VDD33 1 39 LAN_LINKLED#


VDD33 LED_LINK10/100n LAN_ACTLED
LED_ACTn 38
C105 C106 C91 C97 C96 23 CKREQ#
CLKREQn/LED2
G
I
G
A
:
S
T
U
F
F
R
a
10U/6.3V_8X 10U/6.3V_8X 1000P/50V_4X 1U/6.3V_4X 0.1U/10V_4X C77 1U/6.3V_4X
1
0
/
1 OU
0
0
:
S D
T ER
U
F
F
RL:
bDS

37 DVDDL C71 0.1U/10V_4X


DVDD_REG
MF
OF

P
L
T
R
S
T
#
24 DVDDL C49 0.1U/10V_4X
DVDDL
T

Atheros
2 31 AVDDL C56 0.1U/10V_4X
D [3,9,24,29,30] PLTRST# PCIE_WAKE# PERSTn AVDDL AVDDL C67 0.1U/10V_4X D
[9,24] PCIE_WAKE# 3 WAKEn AVDDL 34
C101 0.1U/10V_4X CKREQ_G# 4 VDDCT_REG/CKRn CLK_PCIE_LAN_R R26 *short_4
REFCLKP 33 CLK_PCIE_LAN [8]
LAN_VDD33 R72 4.7K_4 Ra Rc C102 *0.1U/10V_4X AVDD_CEN 5 VDDCT REFCLKN 32 CLK_PCIE_LAN#_R R23 *short_4
CLK_PCIE_LAN# [8]
RX_N 36 PCIE_TXN6 [8]
R50 *51@0_4 CKREQ_G# R109 52@0_4 AVDD_CEN 35
[8] PCIE_CLK_REQ3# RX_P PCIE_TXP6 [8]
AVDDL PCIE_RXP6_C C47 0.1U/10V_4X
AR8151/AR8152
6 AVDDL_REG TX_P 30 PCIE_RXP6 [8]
R18 52@0_4 CKREQ# C805 52@1U/6.3V_4X 29 PCIE_RXN6_C C48 0.1U/10V_4X
TX_N PCIE_RXN6 [8]
Rb C806 52@0.1U/10V_4X C99 C103 C107 33P/50V_4N XTLO_LAN_C 7 XTLO TEST_RST 28
TESTMODE 27

2
C807 52@10U/6.3V_8X 0.1U/10V_4X 1U/6.3V_4X Y1
XTLI_LAN_C 8 26 SB_SMBDATA1_LAN
XTLI SMDATA SB_SMBCLK1_LAN
SMCLK 25
25MHZ_30

1
C100 33P/50V_4N 40 LX L2 *51@4.7uh_C_1A AVDD_CEN
AVDDH LX
9 AVDDH_REG C76 C66 C70 C796
R38 2.37K/F_4 RBIAS 10 41
RBIAS GND1

L:
DR
Oe
Mo
Oe
DA
El
+3V_S5 C90 C93 *51@1000P/50V_4X *51@10U/6.3V_8X *51@0.1U/10V_4X 52@0.1U/10V_4X

m
v
l
TX0P 11
0.1U/10V_4X 1U/6.3V_4X TX0N TRXP0
12 TRXN0
22 AVDDH C50 0.1U/10V_4X
TX1P AVDDH
14 TRXP1
4
2

TX1N 15
RP2 +3V_S5 LAN_VDD33 TRXN1 AVDDH C68 0.1U/10V_4X
AVDDH 16
TX2P 17 19 AVDDL C64 0.1U/10V_4X
TX2N TRXP2 AVDDL AVDDL C81 0.1U/10V_4X
18 TRXN2 AVDDL 13
*4.7KX2
2

R34 0_6 +3V_S5 [30] LAN_P TX3P 20

GND10
3
1

TRXP3

GND2

GND3

GND4

GND5

GND6

GND7

GND8

GND9
Q6 *2N7002_200MA TX3N 21 TRXN3
[2,8,24] SDATA 3 1 SB_SMBDATA1_LAN
1 Over-clocking enable (default = 1)
C LED0 = LAN_ACTLED C
1 3 AR8151-AL1A-R
0 Over-clocking disable

42

43

44

45

46

47

48

49

50
R32 0_4 R19
Q5 *AO3413_3A
+3V_S5 C59 C57 SWR switch-mode regulator select

2
*4.7K_4
1 Giga LAN pull High (default = 1)

G
I
GA
A
:
A0
R1
8
1
5
10
-
A1
L
1
A
-
R
*0.01U/25V_4X *0.01U/25V_4X Q4
LED1 = LAN_LINKLED#

=
L
0
8
5
1
0
*DDTC144EUA-7-F_30MA
2

R21 *3.01K/F_4 3 1 LDO linear regulator select


Q7 *2N7002_200MA
0 10/100M LAN pull Low

1
0
/
1
0
0
:
A1
R5
8
1
5
2
-4
A
L
1
A
-
R
3 1 SB_SMBCLK1_LAN
[2,8,24] SCLK

=
A
L
0
0
8
2
0
0
R33 0_4
1 Normal function
CKREQ# or CKREQ_G#
ATE test mode
0
T
R
A
N
S
F
O
R
M
E
R

R
J
4
5
PLACE NEAR LAN IC SIDE
CN12

C800 1U/6.3V_4X AVDD_CEN_T L1 PBY160808T-601Y-N_1A AVDD_CEN X-TX3N 8 NC4/3-


TX3N

TX2N
TX3P

TX2P

B X-TX3P B
7 NC/3+
U5
AVDD_CEN_T 1 24 TERM4 X-TX1N 6
TX3P TCT1 MCT1 X-TX3P RX-/1-
2 TD1+ MX1+ 23
2
4

2
4

TX3N 3 22 X-TX3N X-TX2N 5


RN1 RN2 TD1- MX1- NC2/2-
AVDD_CEN_T 4 21 TERM3 X-TX2P 4
*51@49.9X2 *51@49.9X2 TX2P TCT2 MCT2 X-TX2P NC1/2+
5 20
1
3

1
3

TX2N TD2+ MX2+ X-TX2N X-TX1P


6 TD2- MX2- 19 3 RX+/1+
AVDD_CEN_T 7 18 TERM2 X-TX0N 2
TX1P TCT3 MCT3 X-TX1P TX-/0-
8 TD3+ MX3+ 17
C51 C58 C65 C69 C801 *1000P/50V_4X TX1N 9 16 X-TX1N X-TX0P 1
TD3- MX3- TX+/0+
GND 10
*51@1000P/50V_4X *51@0.1U/10V_4X *51@1000P/50V_4X *51@0.1U/10V_4X C53 0.1U/10V_4X AVDD_CEN_T 10 15 TERM1 9
TX0P TCT4 MCT4 X-TX0P GND
11 TD4+ MX4+ 14
C802 *1000P/50V_4X TX0N 12 13 X-TX0N
TD4- MX4-
C54 0.1U/10V_4X TRANSFORMER JM36111-R5K23-7H

C803 *1000P/50V_4X R77 R78 R79 R80


D3A: change footprint for SMT open issue.
C52 0.1U/10V_4X 75/F_8 75/F_8 0_8 0_8
Rd Re LAN_ACTLED R40 5.1K/F_6
C804 *1000P/50V_4X
LAN_LINKLED# R394 52@5.1K/F_6
C55 0.1U/10V_4X
TX1N

TX0N
TX1P

TX0P

1
0
/
1h
0
0
:
R
d
R
e
c
h
a
n
g
e
0
o
m
2
4

2
4

A RN3 RN4 A
C111 1500P/3KV_1808X TERM9
49.9X2 49.9X2
1
3

1
3

C74 C79 C83 C87

1000P/50V_4X 0.1U/10V_4X 1000P/50V_4X 0.1U/10V_4X


Quanta Computer Inc.
PROJECT : TE2
Size Document Number Rev
2A
Atheros Lan
Date: Wednesday, March 10, 2010 Sheet 28 of 45
5 4 3 2 1
5 4 3 2 1

3 IN 1 CARD READER
3 IN 1 CARD READER
+3V VCC_XD

CN21
R547 +3V 11
SD_DAT0/XD_D6/MS_D0 R340 33_4 SD_DAT0/XD_D6/MS_D0_R SD-VCC
18 SD-DAT0
*10K_4 XD_D4/SD_D1 R339 33_4 XD_D4/SD_D1_R 19
D SD_DAT2/XD_RE# R331 33_4 SD_DAT2/XD_RE#_R SD-DAT1 D
1 SD-DAT2
SD_DAT3/XD_WE# R330 33_4 SD_DAT3/XD_WE#_R 3
RTS5159_LED# SD_MS_CLK R333 33_4 SD_MS_CLK_R SD-DAT3
[32] TP_XD_LED 14 SD-CLK
R555 SD_CMD R328 33_4 SD_CMD_R 6
C746 *100K_4 SD_CD# R558 33_4 SD_CD#_R SD-CMD
21 SD-CD-SW GND 16
SD_WP R552 33_4 SD_WP_R 20
0.1U/10V_4X SD-WP-SW
GND 17
22 GND

[3,9,24,28,30] PLTRST# 4 MS-VCC


SD_DAT0/XD_D6/MS_D0 12
XD_D3/MS_D1 MS-DATA0
13 MS-DATA1
C750 XD_D2/MS_D2 10
1U/6.3V_4X XD_D7/MS_D3 MS-DATA2
7 MS-DATA3
SD_MS_CLK R329 *short_4SD_MS_CLK_RMS 5
MS_INS# MS-SCLK
8 MS-INS
XD_D5/MS_BS 15 23
MS-BS GND
2 GND
XTLO_CARD_C 9 GND

SD_DAT3/XD_WE#
MODE_SEL

SD_DAT2/XD_RE#
R223 CM3R-065
*270K_4

XTLI_CARD_C

[8] CLK_CARD_5159 R227 *short_4

C C

48

47

46

45

44

43

42

41

40

39

38

37
U29

XTLO

AG_PLL

MODE_SEL

RST#

XD_CLE

XD_CE#

XD_ALE

SD_DAT2/XD_RE#

SD_DAT3/XD_WE#

XD_RDY

SD_DAT4/XD_WP#/MS_D7
XTLI
+3V

+1.8V_VDD
+1.8V_VDD 1 36 SD_CMD
AV_PLL SD_CMD
R228 6.2K/F_4 CARDREF 2 35 C713 C714 C436 C437 C715 C405 C406 C408
RREF SD_DAT5/XD_D0/MS_D6
3 34 R578 33_4 SD_MS_CLK 10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 1U/6.3V_4X 0.1U/10V_4X 0.1U/10V_4X
NC SD_CLK/XD_D1/MS_CLK
[9] USBP3- 4 DM D3V3 33 +3V

[9] USBP3+ 5 32 C754


DP DGND
22P/50V_4N
6 31 XD_D7/MS_D3
AGND SD_DAT6/XD_D7/MS_D3
7 NC RTS5159-VDD-GR NC 30

MS_INS#
VCC_XD
+3V 8 3V3_IN MS_INS# 29
C407 C470 C466
VCC_XD 9 28 XD_D2/MS_D2
CARD_3V3 SD_DAT7/XD_D2/MS_D2 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X
+1.8V_VDD 10 27 SD_DAT0/XD_D6/MS_D0 MODE_SEL
B VREG SD_DAT0/XD_D6/MS_D0 B

+3V 11 26 XD_D3/MS_D1
D3V3 XD_D3/MS_D1 R536 C745
12 25 XD_D5/MS_BS
DGND XD_D5/MS_BS *0_4 *680p/50V_4
XTAL_CTR

XD_CD#

SD_CD#
SD_WP

MS_D4

MS_D5
XD_D4
GPIO0

EEDO

EECS

EESK

EEDI

MODE_SEL (Please refer to Realtek Application Notes for more detail description)
13

14

15

16

17

18

19

20

21

22

23

24

R49 C73 Power mode

RTS 5159 0-ohm NC USB Auto De-link mode:


XD_D4/SD_D1
RTS5159_LED#

XTAL_CTR CLK source


XTAL_CTR

SD_CD#
SD_WP
EEDO

EECS

EESK

EEDI

Pull-high 48MHz from CLK gen.

+3V R533 *short_4


Floating 12MHz from Crystal
TP4

TP62

TP63

TP65

A A

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
RTS5159 (Card Reader)
Date: Tuesday, March 09, 2010 Sheet 29 of 45
5 4 3 2 1
5 4 3 2 1

SM BUS PU
EC [KBC]
0.01A(20mils)
+3VPCU
+3V

L22 PBY160808T-601Y-N_1A +A3VPCU +3V_VDD_EC R284 *short_6 +3VPCU

R583 C463 C471 C452 C440 MBCLK R224 4.7K_4


2.2_6 MBDATA R222 4.7K_4
0.1U/10V_4X 10U/6.3V_8X 0.1U/10V_4X 10U/6.3V_8X 2ND_MBCLK R336 4.7K_4
0.03A(30mils) 2ND_MBDATA R337 4.7K_4
3ND_MBCLK R322 4.7K_4
3ND_MBDATA R323 4.7K_4
C762 C443 C428 C385 C410 C464 8769AGND

115

102
D D

19
46
76
88

4
10U/6.3V_8X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X U12

I/O Base Address

VCC1
VCC2
VCC3
VCC4
VCC5

AVCC

VDD
H=1.6mm R318 *100K/F_4
+3VPCU

TEMP_MBAT [33]
[7,24] LFRAME# 3 LFRAME AD0/GPI90 97
[7,24] LAD0 126 LAD0 AD1/GPI91 98 ICMNT [33] I/O Address
127 99 AC SET_EC
[7,24] LAD1 LAD1 AD2/GPI92 AC SET_EC [33]
128 A/D 100 USBOC#8 BADDR1-0 Index Data
[7,24] LAD2 LAD2 AD3/GPI93 USBOC#8 [9,23]
[7,24] LAD3 1 LAD3 AD4/GPIO05 108 GPU_VRON [19,40]
[9] PCLK_591 2 LCLK AD5/GPIO04 96 GPU_MAINON [40] 00 XOR TREE TEST MODE
95 NBSWON#
AD6/GPIO03 NBSWON# [31]
[9] CLKRUN# CLKRUN# 8 94 01 CORE DEFINED
CLKRUN/GPIO11 AD7/GPIO07 SUSB# [9]

[10] GATEA20 121 GA20 10 2Eh 2Fh


101 3CELL
DA0/GPI94
[10] RCIN# 122 KBRST DA1/GPI95 105 VFAN1 [3] 11 164Eh 164Fh
D10 SW1010CPT_100MA SCI#_uR
D/A DA2/GPI96 106 TP45 SHBM=0: Enable shared memory with host BIOS
[9] SCI# 29 ECSCI/GPIO54 LPC DA3/GPI97 107 SUSLED_EC [32]

[23] EC_FPBACK# 6 LDRQ/GPIO24


80 BAT_SAT0 BADDR0 BADDR0 R321 *10K_4
GPIO41(VBAT) BAT_SAT0 [32]
LPCPD# 124 LPCPD/GPIO10 BADDR1 R320 10K_4
GPIO GPIO42/TCK 17 RF_LED [32] BADDR1
[3,9,24,28,29] PLTRST# 7 LRESET GPIO43/TMS 20 AMP_MUTE# [27]
wake-up 21 SHBM RF_EN R248 10K_4
GPIO44/TDI ID [33]
[25] USB_EN0# 123 PWUREQ/GPIO67 capability GPIO50/TDO 25 D/C# [33]
CIRTX2/GPIO52/RDY 27 DISPON [23]
[7,24] SERIRQ 125 SERIRQ
no wake-up GPO82/TRIS 110 Disabled ('1') if using FWH device on LPC.
WMAX_P [24] Enabled ('0') if using SPI flash for both system BIOS and EC firmware
[32] BAT_SAT1 BAT_SAT1 9 capability GPO84/BADDR0 112 BADDR0
SMI/GPIO65
111 BADDR1
SOUT_CR/GPO83/BADDR1
[31]
[31]
MX0
MX1
54
55
KBSIN0
KBSIN1 SER
SIN_CR/CIRRX/GPIO87
GPIO06
113
93
TP_ON_OFF [31]
LID591# [23]
ID
[31] MX2 56 KBSIN2
C
[31] MX3 57 KBSIN3 A_PWM/GPIO15 32 CONTRAST [23] C
58 118 HWPG_VGA +3VPCU
[31] MX4 KBSIN4 B_PWM/GPIO21 U19
[31] MX5 59 KBSIN5 C_PWM/GPIO13 62 CCD_POWERON [23]
60 65 2ND_MBCLK 6 1
[31]
[31]
MX6
MX7 61
KBSIN6
KBSIN7 PWM
D_PWM/GPIO32
E_PWM/GPIO45 22
USBOC#13_9 [9,25]
SUSON [35]
2ND_MBDATA 5
SCL
SDA
A0
A1 2 0.003A(20mils)
F_PWM/GPIO40/CLKIN48 16 MAINON [11,35,36,37,39] A2 3
[31] MY0 53 KBSOUT0/JENK G_PWM/GPIO66 81 BT_POWERON [31]
52 66 PWRLED# +3V 7 8
[31] MY1 KBSOUT1/TCK H_PWM/GPIO33 PWRLED# [32] WP VCC
51 Q33 4
[31] MY2 KBSOUT2/TMS GND
50 C476
[31] MY3 KBSOUT3/TDI

2
49 KB 31 2N7002_200MA AF24BC08-SI-TE1(DCEF)
[31] MY4 KBSOUT4/JEN0 TA1/GPIO56 3G_P [24]
48 63 0.1U/10V_4X
[31] MY5 KBSOUT5/TDO TB1/GPIO14 FANSIG1 [3]
[31] MY6 47 KBSOUT6/RDY TA2/GPIO20 117 3 1 TEMP_ALERT# [3,10]
[31] MY7 43 KBSOUT7 TIMER TB2/GPIO01 64 ACIN [32,33] ADDRESS: A0H
[31] MY8 42 KBSOUT8 TA3/GPIO51 26 S5_ON [35,39]
41 15 R347 *0_4
[31] MY9 KBSOUT9 TB3/GPIO36 VRON [38]
[31] MY10 40 KBSOUT10
[31]
[31]
MY11
MY12
39
38
KBSOUT11
KBSOUT12/GPIO64 SPI_DI/GPIO77 84 BT_RESET [31]
SPI FLASH
37 SPI 83 RF_EN RF_EN [24]
[31] MY13 KBSOUT13/GPIO63 SPI_DO/GPO76/SHBM
36 82 ODD_EN ODD_EN [26]
[31] MY14 KBSOUT14/GPIO62 SPI_SCK/GPIO75
[31] MY15 35 KBSOUT15/GPIO61/XOR_OUT GPIO81 91 DNBSWON#_uR D30 SW1010CPT_100MA
DNBSWON# [9]
[31] MY16 34 KBSOUT16/GPIO60
33 75 RSMRST#
[31] MY17 KBSOUT17/GPIO57 IRRX1/GPIO72/SIN2 RSMRST# [9] +3VPCU
FIR IRRX2_IRSL0/GPIO70 73 SUSC# [9]
74 MPWROK
[33] MBCLK 70 SCL1/GPIO17
IRTX/GPIO71/SOUT2
CIRRXM/GPIO46/TRST 23 R636 0_4
MPWROK [3,9]
PCH_GPIO33 [7,10]
U18 0.025A(20mils)
69 14 SPI_SDI_uR R354 33_4 SPI_SDI 2 8
[33] MBDATA SDA1/GPIO22 GPIO34/CIRRXL BT_EN# [24] SO VDD
2ND_MBCLK 67 SMB CIR 114
[8] 2ND_MBCLK SCL2/GPIO73 CIRTX1/GPIO16 NUMLED [31]
2ND_MBDATA 68 109 SPI_SDO_uR R346 33_4 SPI_SDO 5 7 C482
[8] 2ND_MBDATA SDA2/GPIO74 CIRTX2/GPIO30 CAPSLED [31] SI HOLD
[21] 3ND_MBCLK 119 SCL3/GPIO23
120 SPI_SCK_uR R350 33_4 SPI_SCK 6 3 0.1U/10V_4X
[21] 3ND_MBDATA SDA3/GPIO31 SCK WP
24 86 SPI_SDI_uR R262 100K/F_4
[24] 3G_EN SCL4/GPO47 F_SDI/F_SDIO1
HWPG 28 87 SPI_SDO_uR SPI_CS0#_uR 1 4
SDA4/GPIO53 F_SDO/SDIO0 SPI_CS0#_uR CE VSS
FIU F_CS0 90
92 SPI_SCK_uR +3VPCU R360 10K_4 W25X40BVSSIG
F_SCK
[31] TPCLK 72 PSCLK1/GPIO37
B [31] TPDATA 71 PSDAT1/GPIO35 B
[35] S3_Reduce 10 PSCLK2/GPIO26 Intel 512KB W25X40BVSSIG
[23] USB_EN1# 11 PSDAT2/GPIO27 PS/2 CLKOUT/GPIO55 30 SUS_PWR_ACK [9]
[28] LAN_P 12 PSCLK3/GPIO25
[23] CRT_SENSE# 13 PSDAT3/GPIO12 VCC_POR 85 VCC_POR# R256 4.7K_4 +3VPCU AMD 2MB W25Q16BVSSIG
8768_32KX1 VREF_uR R319 0_4 +A3VPCU
VCORF

77 32KX1/32KCLKIN VREF 104


AGND

INTERNAL KEYBOARD STRIP SET


GND1
GND2
GND3
GND4
GND5
GND6

R527 20M_6 8768_32KX2 79 32KX2


WPCE775CA0DG +3VPCU
5
18
45
78
89
116

103

44

R525 WPCE775L: AJ007750F00 (w/o CIR)


+3VPCU MY0 R210 10K_4
VCORF_uR

Y5 33K/F_4
1 4
2 3
L23 0_6 R615 +3V
C716 32.768KHZ_10 C712 *IV@10K_4
C383
12P/50V_4C 12P/50V_4C
1U/10V_6X 3CELL HWPG R315
10K_6
8769AGND 8769AGND +3VPCU
R616
PCH_GPIO33 R253 10K_4 EV@10K_4 D13 SW1010CPT_100MA
[40] VGPU_IO_PG
D12 SW1010CPT_100MA HWPG_VGA
[19] GPU_PWROK
PCLK_591
+3V
Close to U16
R304

SMBUS Table LED PU/PD R526


*22_4 ICMNT AC SET_EC 10K_6

SMBUS Devices Address C458 C465 C702 HWPG


HWPG [3]
1 Battery 12H
A *10P/50V_4C *10U/6.3V_8X *10U/6.3V_8X +3VPCU +3VPCU D28 SW1010CPT_100MA A
[34] SYS_HWPG
8769AGND 8769AGND
CPU Board Thermal Sensor 98H LPCPD# R624 *10K_4 PWRLED# R216 10K_4
2 D31 SW1010CPT_100MA
[35] HWPG_1.5V
DNBSWON#_uR C450 *0.1U/10V_4X R623 10K_4 R219 *10K_4
D26 SW1010CPT_100MA
[36] HWPG_VTT
EC EEPROM A0H
VGA Board Thermal Sensor 98H NBSWON# SW1 *SHORT_ PAD
BAT_SAT0 R244 10K_4
3 BAT_SAT1 R255 10K_4 Quanta Computer Inc.
D11
*EGA10402V05AH
PROJECT : TE2
Size Document Number Rev
2A
EC-WPC8763LDG/WPC8769L(O)
Date: Wednesday, March 10, 2010 Sheet 30 of 45
5 4 3 2 1
5 4 3 2 1

INT KeyBoard [KBC] CN1


36 +5V
+3VPCU
K_LED_P
TP board [TPD]
1 MY16
RP1 MY16 [30]
MX7 2
10 1 10KX8 R154
MX0 9 2 MX6 3
4
MY17
MY17 [30] 0_8 (20mils)
MX1 8 3 MX5
MX3 MX4 5 K_LED_P TPCLK_L CN7
7 4 6
MX2 6 5 MY2 +5V_TP 1
7 MY2 [30] 1
MY1 TPDATA_L L18 SBK160808T-121Y-N_400MA TPCLK_L 2
8 MY1 [30] [30] TPCLK 2
MY0 L17 SBK160808T-121Y-N_400MA TPDATA_L 3
9 MY0 [30] [30] TPDATA 3
MY4 C301 C288 4
10 MY4 [30] 4
C15 *220P/50V_4X MX7 MY3 5
11 MY3 [30] [30] TP_ON_OFF 5
D C16 *220P/50V_4X MX2 MY5 C265 C254 4.7U/6.3V_6X 0.1U/10V_4X 6 D
12 MY5 [30] 6
C17 *220P/50V_4X MX3 MY14 220P/50V_4X 220P/50V_4X
13 MY14 [30]
C18 *220P/50V_4X MX4 MY6
14 MY6 [30]
MY7 88513-080N
15 MY7 [30]
MY13
16 MY13 [30]
MY8 C820
17 MY8 [30]
C4 *220P/50V_4X MX0 MY9 220P/50V_4X
18 MY9 [30]
C20 *220P/50V_4X MX5 MY10
19 MY10 [30]
C21 *220P/50V_4X MX6 MY11
20 MY11 [30]
C22 *220P/50V_4X MX1 MY12
21 MY12 [30]
MY15
22 MY15 [30]
MX7
23 MX7 [30]
MX2
24 MX2 [30]
C12 *220P/50V_4X MY7 MX3
25 MX3 [30]
C3 *220P/50V_4X MY13 MX4
26 MX4 [30]
C13 *220P/50V_4X MY12 MX0
C14 *220P/50V_4X MY15 27
28
MX5
MX0 [30]
MX5 [30]
0.18A(20mils) CN6
MX6 BT_POWER
29 MX6 [30] 1
30
31
MX1
K_LED_P
MX1 [30] Power board [PSW] Bluetooth
[BTM]
[30] BT_RESET
[9] USBP2+
BT_RESET
2
3
CAPSLED
32 CAPSLED [30] [9] USBP2- 4
C11 *220P/50V_4X MY3
33 [10] BT_Detect# 5
C1 *220P/50V_4X MY5 NUMLED
34 NUMLED [30] 6
C19 *220P/50V_4X MY14
C2 *220P/50V_4X MY6 88266-06001-06

5
CN2
35

5
91504-340N 1 C821
[30] NBSWON# 2
C6 *220P/50V_4X MY2 R114 0_8 220P/50V_4X
C7 *220P/50V_4X MY1 3
4
0.2A(20mils)

6
C9 *220P/50V_4X MY0 C25
C10 *220P/50V_4X MY4 1000P/50V_4X 88513-044N

6
+3V 1 3 BT_POWER
C C
NUMLED
CAPSLED C171 10U/6.3V_8X

+
C5 *100P/50V_4N MY17 K_LED_P Q21

2
C156 *1000P/50V_4X
*AO3413_3A +3V
C797 C798 C799 C155 *0.1U/10V_4X
C8 *100P/50V_4N MY16 220P/50V_4X 220P/50V_4X 220P/50V_4X

R103
(10mils) *4.7K_4
R1 150_4 K_LED_P +3V +3V
+3V

3
C148 C150

HOLE *4.7U/6.3V_6X *0.1U/10V_4X 2


BT_POWERON [30]

CPU VGA Q20

1
*DDTC144EUA-7-F_30MA
HOLE8 HOLE9 HOLE14 HOLE15 HOLE10 HOLE13 HOLE12

HDD&ODD
1

1
HOLE29 HOLE31 HOLE28 HOLE30
*H-TC276I150BC197D150P2 *H-TC276I150BC197D150P2 *H-TC276I150BC197D150P2 *H-TC276I150BC197D150P2 *H-C217I142D142P2 *H-C217I142D142P2 *H-C217I142D142P2

B B

1
MDC MINI CARD EMI PAD
HOLE5 HOLE18 HOLE20 HOLE19 HOLE21 PAD2 PAD4 *H-C131D91P2 *H-C131D91P2 *H-C131D91P2 *H-C131D91P2
7 6 7 6 7 6
8 5 8 5 8 5
9 4 9 4 9 4
1
2
3

1
2
3

1
2
3

1
*HG-C197D118P2 *H-C236I157D157P2 *H-C236I157D157P2 *HG-C236D157P2 *HG-C236D157P2 *EMI-PAD *EMI-PAD

HOLE1 HOLE3 HOLE2 HOLE6 HOLE7 HOLE16 HOLE27


7 6 6 7 6 HOLE4 7 6 7 6 7 6
8 5 5 8 5 8 5 8 5 8 5
9 4 4 9 4 9 4 9 4 9 4
1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
2
3

1
*H-C95D95N
1

*HG-C236D98P2 *HG-TE315X228BC315D98P2 *HG-C315D98P2 *HG-C315D98P2 *HG-C315D98P2 *HG-C315D98P2 *H-C118D118N

HOLE17 HOLE22 HOLE23 HOLE24 HOLE26 HOLE11 HOLE25


7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4
A A
3
1
2

1
2
3

1
2
3

1
2
3

1
2
3

*HG-C315D98P2 *HG-C315D98P2 *HG-C299D98P2 *HG-C236D98P2 *HG-C299D98P2 *h-tr315i138bc315d98p2 *H-C95D95N

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
KB/TP&TP/PB/FL/LEB/MMB/B-CAS
Date: Wednesday, March 10, 2010 Sheet 31 of 45

5 4 3 2 1
5 4 3 2 1

LED [LED]
BATERRY D3A : LED luminance to light,1K-ohm change 2.2K-ohm.
RF LED
BAT_SAT0
+5VPCU BAT_SAT0 [30]

2
2
3 1 3G_WIMAX_LED#_R R428 220_4 3G_WIMAX_LED#
RF_LED [30]
AC-IN 2 -BATLED0 R436 2.2K_4 3 1
LED5 12-21/S2C-AL1M2VY/2C/2C

R423 10K_4 Q45 2N7002_200MA


+5VPCU
1

3
D3A : LED luminance to light,560-ohm change 220-ohm.
2

D D
3 1 R429 1K_4 2 ACIN 3 -BATLED1 R433 1.2K/F_4 3 1
+5VPCU ACIN [30,33]
LED1 12-21/T3D-CP1Q2B12Y/2C LED3 12-22/S2ST3D-C30/2C Q46 2N7002_200MA
Q47 DDTC144EUA-7-F_30MA
Q43 MMBT3906_NL_200MA

2
BAT_SAT1
BAT_SAT1 [30]

HDD/ODD
+5V

CARDREADER R435
R422 10K_6 TP_XD_LED
TP_XD_LED [29]
POWER *10K_4

D3A : LED luminance to light,1K-ohm change 2.2K-ohm.


+5V 1 3 R434 1K_4 SATA_LED#_C HDDLED# Q42 MMBT3906_NL_200MA

2
PWRLED# Q48 12-21/T3D-CP1Q2B12Y/2C
+5VPCU PWRLED# [30] TP_XD_LED_R 3 1 R437 1K_4 LED4
+5V

2
R426 2 MMBT3906_NL_200MA LED6 12-21/T3D-CP1Q2B12Y/2C

0_4 +3V R430 10K_4


SATA_LED# [7]
2 -PWRLED R427 2.2K_4 3 1
Q49
1
*2N7002_200MA
C C

3 SUSLED R432 1.2K/F_4 ESD Protect


LED2 12-22/S2ST3D-C30/2C

FOR POWER LED FOR BATTERY LED FOR HDD/W-LAN LED FOR 3G/CARDREADER LED
3

D19 D20 D21


D16
Q44 2 SUSLED_EC -PWRLED -BATLED1 3G_WIMAX_LED#_R
SUSLED_EC [30] 1 1 1 1
DDTC144EUA-7-F_30MA
3 3 3 3
1

SUSLED -BATLED0 SATA_LED# TP_XD_LED_R


2 2 2 2
*PJMBZ5V6 *PJMBZ5V6 *PJMBZ5V6 *PJMBZ5V6

+5VPCU +3VPCU +5V +5V +5V +1.8V +1.8V LAN_VDD33

C382 C711 C23 C43 C104 C534 C568 C46

B 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X B

+5V +5V +5V +5V +3VPCU +3VPCU +3V_S5 +3V_S5 +3V_S5

C791 C744 C749 C499 C24 C592 C86 C559 C240

0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X 0.22U/6.3V_4X

VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN

C39 C574 C576 C599 C40 C822


C693 C699 C785 C786 C815
0.22U/25V_6X 0.22U/25V_6X 0.22U/25V_6X 0.22U/25V_6X 0.22U/25V_6X 0.22U/25V_6X 1U/25V_6X 1U/25V_6X 1U/25V_6X 1U/25V_6X 10U/25V_8X

A A

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
LED/HOLE
Date: Tuesday, March 09, 2010 Sheet 32 of 45
5 4 3 2 1
5 4 3 2 1

PCN2

4 DC_JACK 1
PF2

2 VA0
PL1
HI0805R800R-00_5A
VA1 PD3
SBR1045SP5-13_10A
1

2
3 VA2 1
0.01_3720
PR70
R1
2 VA3 3
PQ38
AOD425
4
VIN

3
PQ32
AOD425
4 BAT-V
33

1
3 FUSE_1206_15A PL2
HI0805R800R-00_5A PR14

1
1
PC127 PC128 PC35 PR40 PC13 PC10 33K_6
2 0.1U/50V_6X 0.1U/50V_6X PD4 0.1U/50V_6X 220K/F_6 0.1U/50V_6X 2200P/50V_6X
PD7

2
1
SMAJ20A_Little fuse_TVS PR60 PR59

2
D D
PD2 10/F_6 10/F_6
1 6 *SMAJ20A_Little fuse_TVS PR13
20277-044L SW1010CPT_100MA ( Near by sense R side) 10K/F_6
PR44 2 5
220K/F_6
3 4

3
PQ3
PQ1
IMD2AT108
PR156 CSIN PR42 *Short_4 2 DMN601K-7_300MA
[30] D/C#
82.5K/F_6
+3VPCU
CSIP
[30] AC SET_EC

1
PR27 VIN
PC41 PR158 10K/F_6 PC111
10K/F_6 1U/16V_6X
10U/10V_8X

PC157
PR29
( Near by IC side) PC115 4.7_6 PC107
0.1U/50V_6X 1U/16V_6X

5
6
7
8
4.7U/25V_8X
ACIN PC5 PC8
[30,32] ACIN PD1 0.1U/50V_6X10U/25V_1206X
PC4

33
32
31
30
28

27

26

21
4

1
C PC110 +3VPCU RB500V-40_100MA 2200P/50V_6X C
0.1U/50V_6X

CSSP

VDDP
NC
GND
GND
GND
GND

CSSN

VCC
PR139 PC22 PQ31
2.7_6 0.1U/50V_6X AO4468
MBDATA 11 25

3
2
1
VDDSMB BOOT
0.01_3720
MBCLK 9 24 88731A_U_GATE PR134
SDA UGATE
PL3
10 23 88731A_PHASE 1 2 BAT-V
SCL PHASE 3.3UH_7x7

5
6
7
8
13 20 88731A_L_GATE PR7
ACOK LGATE
PC108 4 2.2/F_6 PC103
PR16 0.1U/50V_6X 19 PR8 PR9 0.01U/50V_6X
49.9/F_6 PU8 PGND 10/F_6 10/F_6
DCIN 22 ISL88731A PQ34
DCIN AO4710 PC9 ( Near by sense R side)
PR43 2200P/50V_6X PC102
82.5K/F_6 3.2V 18 2200P/50V_6X

3
2
1
88731ACIN CSOP PC7 PC6
2 ACIN PC11 10U/25V_1206X 10U/25V_1206X
0.1U/50V_6X CSOP
PR153 3 VREF ( Near by IC side)
+3VPCU 22K/F_6 17 CSON
CSON

B
4 ICOMP B
NC 16
PR4 PR5 PR135 0_4
*100K_4 10K/F_6 5
PCN1 NC
PF1 15 PR12 100_4 BAT-V
FUSE_1206_20A VBF
11 6 VCOMP
9
MBAT+ 1 2 BAT-V
GND 29 (Please place this R near by battery pack side)

GND
8

ICM
ID PC167

NC

NC
7 ID [30]
0.1U/50V_6X
6 TEMP_MBAT_C 7

14

12
5 M-DATA
4 M-CLOCK PR151
3 2.21K/F_6
2 PC2 PC1 +3VPCU
1 47P/50V_6N 47P/50V_6N
10
PR2 PR3 PC122
BTJ-09HZ0B 100_4 100_4 PR6 0.01U/50V_6X PR45
100K/F_6 ICMNT [30]
MBDATA [30] 100_4

MBCLK [30] PC125 PC124 PC123 PC23


TEMP_MBAT [30]
*1U/16V_6X 0.01U/50V_6X *0.01U/50V_6X 10U/10V_8X
1

PU7 PR1
CM1213-04SO *100K/F_6 PC3
A 1 6 MBDATA 0.01U/50V_6X A
2

CH1 CH4
2 VN VP 5 +3VPCU
TEMP_MBAT_C3 4 MBCLK
CH2 CH3

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
1A
Charger (ISL88731)
Date: Wednesday, March 10, 2010 Sheet 33 of 43
5 4 3 2 1
5 4 3 2 1

34
MAIND 39K/F_4
MAIND [5,35,39] PR115

[3,15] SYS_SHDN# 2 1 VL For RT8210B or UP6184 0_4 & 10K_4


*Short_4 PR118
For ISL6237 ZD5.6V , 100K/F_4 & 200K/F_4
VIN VIN
PR122 PR121
VL

1
*Short_4
*Short_4
PR112 PD5 f : 500k Hz

2
D D

5V_EN

3V_EN
0_4 *ZD5.6V ESR : 17mΩ
PC144

2
4.7U/25V_8X Total capacitor : 342uF

1
(Peak 9A, AVG 7.623A)

1U/16V_6X
PC146
0.1U/50V_6X
PC145 PC95 PC92 PC98

2
PC94 PC93 PC97 PR111 0.1U/50V_6X 0.1U/50V_6X 2200P/50V_4X 10U/25V_1206X

0_4
PR108

PC149
0.1U/50V_6X 2200P/50V_6X 10U/25V_1206X 10K/F_4 PR113

5
6
7
8
PC147
*1U/10V_4X *Short_4
OCP:11.055~11.345A
09/10/15

1
+3VPCU
f : 400k Hz REF 4
3V_DH PQ53
11A

8
7
6
5
ESR : 17mΩ PR114 *0_6 AO4468_H
PR107
Total capacitor : 370 uF *200K/F_4

8
7
6
5
4
3
2
1
+5VPCU 4 5V_DH
(Peak 10.2 ,AVG 8.135A) PL11

LDOREFIN
LDO
VIN

ONLDO
NC

VCC
TON
REF

3
2
1
OCP:11A PQ54
AO4468_H PR116 3V_LX

5
6
7
8
+5VPCU 9 32 REFIN2 287K/F_6 2.2UH_10x10
PR119 280K/F_6 BYP REFIN2
10 31 1 2

1
2
3
PL9 OUT1 ILIM2 PR186
11 FB1 OUT2 30
5V_LX 1 2 12 PU10 29 SKIP 4 PC158
DDPWRGD_R 13 ILIM1 RT8210B SKIP# DDPWRGD_R 2.2/F_6
PGOOD1 PGOOD2 28
2

8
7
6
5
2.2UH_10x10 5V_EN 14 27 3V_EN PR179 +
PR176 PR185 EN1 EN2 0_6
15 DH1 DH2 26
C PC153 16 25 PC90 C
*0_6 2.2/F_6 5V_DL LX1 LX2 PC154 0.1U/50V_6X 330U/6.3V_105CS_E17f
4 37 PAD
+ 36 2200P/50V_6X
1

3
2
1
PAD

PGND
PVCC
PC81

BST1

BST2
GND
PAD
PAD
PAD

DL1

DL2
PC150 PC151 PQ50

NC
2

PC155 0.1U/50V_6X 0.1U/50V_6X AO4710_L


PR178 PQ49 PR183

35
34
33

17
18
19
20
21
22
23
24
2200P/50V_6X AO4710_L PR182 1/F_6
1
2
3

0_6 1/F_6 1 2
1 2 3V_DL
1

PR177
0.1U/50V_6X *0_6
VL PR184 SKIP PR117 *0_6 REF
330U/6.3V_105CS_E17f 0_6 F=500K
PC142
2 0.1U/50V_6X PC152 PR120 0_6 Rilim=Ilim*LRdson*10/5uA
PD8 1U/16V_6X
CHN21UPT_100MA 3 +3VPCU
OCP:11.12~11.9525A 1

AO4710 Rdson=14.2mOhm.max.
2
△I=[(Vin-Vout)*Vout]/Vin*L*f PC139
0.1U/50V_6X PR173 0_6 10K/F_6 PR181
3
Iocp=OCP-(△I/2)
Vth*10=R(Ilim)*5uA 1 PD9
PC143
0.1U/50V_6X OCP:11.055~11.345A
So,R(Ilim) use 2870 ==>
PR171
CHN21UPT_100MA
PR180 AO4710 Rdson=14.2mOhm.max.
B Vin=19V OCP=11.9525A , +15V
+15V_ALWP DDPWRGD_R
SYS_HWPG [30] △I=[(Vin-Vout)*Vout]/Vin*L*f B

Vin=9V OCP=11.12A 22_8 *Short_4 Iocp=OCP-(△I/2)


PC140
0.1U/50V_6X Vth*10=R(Ilim)*5uA
So,R(Ilim) use 287K ==>
Vin=19V OCP=11.345A ,
Vin=9V OCP=11.055A
+3VPCU
+5VPCU
+5VPCU

+3VPCU
5
6
7
8
5
6
7
8

1
2
5
6
S5D 4

1
2
5
6
S5D 3 PQ30
[39] S5D
MAIND 4 AO6402A
PQ29 MAIND 3 PQ28
AO4468_S AO6402A

4
PQ27
AO4468_S
+5V_S5
3
2
1

+3V 0.001A
3
2
1

A
2.834A A

+3V_S5
4.523A
+5V
4.984A Quanta Computer Inc.
PROJECT : TE2
Size Document Number Rev
1A
System 3V/5V(RT8210B)
Date: Wednesday, March 10, 2010 Sheet 34 of 43
5 4 3 2 1
5 4 3 2 1

35
PC53 10U/10V_8X

PR163
PC130 0.1U/50V_6X
+SMDDR_VTERM
0.5A 2.2/F_6
VIN
PC61 PC136
10U/10V_8X 10U/10V_8X

5
PQ36

D D
4
AOL1428

25

24

23

22

21

20

19

1
2
3
PC37 PC26 PC19
PC36 2200P/50V_6X10U/25V_1206X 10U/25V_1206X

GND

VLDOIN
VTT

VBST

DRVH

LL

DRVL
0.1U/50V_6X
PL5
1 18 +1.5VSUS
VTTGND PGND

5
1.5UH_10x10
2 VTTSNS CS_GND 17
PQ37 PC169
PR68 4 PR34 10U/10V_8X
3 GND CS 16
PU2 AOL1412 2.2/F_6

1
2
3
7.15K/F_6 PC52
+1.5VSUS 4 RT8207 15 +
MODE V5IN +5V_S5
PR69 5.1/F_6 PC21
5 14 2200P/50V_6X
+SMDDR_VREF VTTREF V5FILT

1
VDDQSNS
PC132 PC131

VDDQSET
+5VPCU 6 COMP PGOOD 13
0.1A 1U/10V_4X 1U/10V_4X 330U/2V_7343P_E9b

2
NC

NC
S3

S5
C PC60 PR164 100K/F_6 +3VPCU C
0.033U/50V_6X
7

10

11

12
FOR DDR III
HWPG_1.5V [30]
OCP 15A
PR71
VIN For RT8207 400KHZ (Peak 18.704A, AVG 13.103A)
620K/F_4
Total capacitor : 1380 uF
S5_1.5V PR72
SUSON [30]
0/F_6 ESR : 2.25mΩ
S3_1.5V
careful to this two net name. f : 400k Hz
PR73
*0/F_6
+5VPCU

PC135 PR169
Vout = (PR169/PR168) X 0.75 + 0.75
PC56
*10K/F_4 OCP: Min. 15A
*0.1U/50V_6X
FDMS0310 Rdson=5.15mOhm max
Iocp=(Vtrip/Rdson)+IL=((Rtrip*Itrip)/Rdson)+(△I))
*33P/50V_6N
△I={[1/(2*L*f)]*[Vout*(Vin-Vout)/Vin]}
B PR168 B

0_4 So,R(Ilim) use 7.15K ==>


Vin=19V OCP=15.9A ,
Vin=9V OCP=15.8A

+1.5VSUS

PU6
PR131 *0/F_6 3 5 +1.5V_S5
[30,39] S5_ON SHDN VO
S3_1.5V PR75 *0/F_6 2 GND
1
2
5
6
1 4 PC99
+3V_S5 MAIND PQ11 VIN NC
[5,34,39] MAIND 3 +3VPCU
AO6402A *G909
PC100 *1U/16V_6X
0.000427A
5

PU3 *2.2U/10V_6X
4

2 MAINON [11,30,36,37,39]
PR76 1 2 100K_4 4
1
+1.5V 0.5A
+1.5V_CPUVDDQ_PG [3]
PC101
TC7SH08FU(F) *0.1U/50V_6X
3

A A
3

PR84 *0_6
S3_Reduce [30]
PQ9 PR85
2 MAINON_ON_G [5,12,39,40]

DMN601K-7_300MA
0_6 Quanta Computer Inc.
PROJECT : TE2
1

Size Document Number Rev


1A
DDR 1.5V(TPS51116)
Date: Wednesday, March 10, 2010 Sheet 35 of 43
5 4 3 2 1
5 4 3 2 1

VIN
+5V_S5
PR128 Total capacitor : 1007 uF
PQ55 AOL1428
D ESR : 17mΩ D
10/F_6 PD6

5
RB500V-40_100MA PC79 F: 270k Hz
4.7U/10V_6X
PC78 (Peak 21.68, AVG 17.073A)
PR130 0.1U/50V_6X 4
1M/F_6
PR129
OCP 23A

1
2
3
PC83 PC84 PC87 PC88
PU5 2.2/F_6 2200P/50V_4X*0.1U/50V_6X 10U/25V_1206X 10U/25V_1206X
PR188 UP6111AQDD-B3 +1.05V
0_4 PC86
15 13 0.1U/50V_6X
[11,30,35,37,39] MAINON EN/DEM BOOT
+3V PC161 16 12 UGATE-VTT +VTT
TON UGATE PL10
0.1U/50V_6X 1 11 PHASE-VTT
PR123 VOUT PHASE
C C
2 VDD OC 10 PR127 2.7K/F_6 1.5UH_10x10
R1

5
10K/F_6 PC170
3 9 PR126 2.2/F_6 +5V_S5 PC89 PR125
FB VDDP

330U/2V_3528P_E35b
PQ51 PQ52 PC171 4.02K/F_6

330U/2V_3528P_E35b
4 8 LGATE-VTT 4 4 PR187 + + PC82
[30] HWPG_VTT PGOOD LGATE *33P/50V_6N
6 7 AOL1412 AOL1412 2.2/F_4

1
2
3

1
2
3
GND PGND

1
PC80
5 NC TPAD 17
1U/16V_6X PC156

2
14 2200P/50V_6X PC168 PR124
NC
1

PC85 PC91 PC96 *0.1U/50V_6X 10K/F_6

1U/16V_6X
PR189
100K/F_6 10U/10V_8X
R2
2

C3A

B B
*1000P/50V_6X 0.01U/50V_6X

VTT_FB

VOUT=(1+R1/R2)*0.75
TON=3.85p*RTON*Vout/(Vin-0.5) OCP:23.18~23.27A
FDMS0310 Rdson=5.15mOhm max
Frequency=Vout/(Vin*TON) Iocp=(Vtrip/Rdson)+IL=((Rtrip*Itrip)/Rdson)+(△I))
△I={[1/(2*L*f)]*[Vout*(Vin-Vout)/Vin]}
TON=3.85p*1M*1/(Vin-0.5)
Rdson*OCP=RIlim*20uA
A
So,R(Ilim) use 2.7K ==> Quanta Computer Inc. A

Frequency=1/(0.0036767)=272K Vin=19V OCP=23.18A ,


Vin=9V OCP=23.27A
PROJECT : TE2
Size Document Number Rev
1A
+VTT (UP6111A)
Date: Wednesday, March 10, 2010 Sheet 36 of 43
5 4 3 2 1
5 4 3 2 1

+5VPCU 37
D D
PR191

10K/F_6
PU11
PR190 PR192 10K/F_4 PC163 1000P/50V_4X
1 SHDN/RT COMP 10

806K/F_4 PR193
2 GND FB 9

3
240K/F_6
[11,30,35,36,39] MAINON 2 3 LX1 VDD 8 +5VPCU
PR194
R2 OCP Fellow IC spec~3.7A
PC165
PQ56 4 7 22P/50V_4N 301K/F_6

1
LX2 PVDD2
DTC144EUA-7-F_30MA
VOUT=(1+R1/R2)*0.8
5 6
R1
PGND PVDD1
11
FOR UMA 0.194A
TH_PAD
C RT8015A
PC164
10U/10V_8X
PC166
10U/10V_8X For VGA 1.345A C

PL8
+1.8V
2.2UH_7X7

PC159 PC160 PC162


10U/10V_8X *10U/10V_8X 0.1U/50V_6X

B B

A A

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
1A
+1.8V (RT8015A)
Date: Wednesday, March 10, 2010 Sheet 37 of 43
5 4 3 2 1
5 4 3 2 1

38
VR_PWRGD_CK505# [2] VIN

DELAY_VR_PWRGOOD [3,9]

1
1
+
PC58 PC54 PC59 PC134
PQ40 0.1U/50V_6X 100U/25V_105CE_f

2
5
AOL1428

4
4.7U/25V_8X 4.7U/25V_8X

1
2
3
+VCC_CORE
D VIN +3VPCU 0.36UH_10X10 D
PL6
CORE-PHASE1 1 2

2
PR152

4
5

5
2.2/F_6 PR79 PC137 PC71

PR33 PR30 PQ43 PQ44


2.2/F_4 + +
OCP 58.5~60A
+5V_S5 1.91K/F_4 4 4 Total capactor : 1450uF

1
1.91K/F_4
PC42 AOL1412 AOL1412 ESR:2.25mΩ

1
2
3

1
2
3
PR149 0.22U/25V_6X PC62 f:400k Hz
10/F_6 2200p/50V_4X
PR136 0_8 (Peak 58A,AVG 48A)
PR83 PR87

16

17

40

1
PU1 330U/2V_7343P_E9b

1
PC38 0_4 0_4

VDD

VIN

PGOOD
CLK_EN#
330U/2V_7343P_E9b
2 1U/16V_6X
41 PAD Load Line=1.9mV/A
+VTT

UGATE1 20 UGATE1 1.1m/2*0.763=419.65u


PR26 10K/F_4
BOOT1 19 1 2 419.65u/1.24k=338p
PR138
[5] PSI# PSI# PR24 10K/F_4 2 PSI#
PR57 VSUM+ PR28 3.65K/F_6 338p*2*2.8k=1.895m
68_4 2.2_6 PC45
PR22 147K/F_6 3 0.22U/25V_6X
RBIAS
PHASE1 21 VSUM- PR23 1/F_4 40u/2*1.24k=24.8m , 24.8m/0.768=32.29m
[3] H_PROCHOT# 4 VR_TT#
LGATE1a 23 LGATE1a 32.29m/(1.1m/2)=58.7
PR170 PR165 PR19 10K/F_4
Close to Phase 1 Inductor *470K_4 NTC *4.02K/F_4
VIN
5 NTC
C
PC14 C
*0.01U/50V_4X 24 LGATE1b
LGATE1b

1
1 2

1
22 +
VSSP1 PC50 PC55 PC51 PC133
11 0.1U/50V_6X 100U/25V_105CE_f

2
H_VID0 ISEN1
[5] H_VID0 31 VID0

1
H_VID1 32 PQ41
[5] H_VID1 VID1 PC20

5
H_VID2 33 0.22U/10V_4X AOL1428
[5] H_VID2
2
VID2 4.7U/25V_8X 4.7U/25V_8X
H_VID3 34 VSUM-
[5] H_VID3 VID3 PR162 0_6 4
H_VID4 35 25 +5V_S5
[5] H_VID4 VID4 VCCP
ISL62882

1
2
3
H_VID5 36 +VCC_CORE
[5] H_VID5 VID5 PC49 1 2 1U/10V_4X
H_VID6 37 0.36UH_10X10
[5] H_VID6 VID6 PL7
VR_ON 38 PC48 1 21U/16V_6X 1 2
[30] VRON VR_ON

5
[5] ICH_DPRSTP#
DPRSLPVR 39 29 UGATE2
48A

4
DPRSLPVR UGATE2
2

2
PC138 PC73

PR50
PR41
499/F_4 BOOT2 30 1 2 PQ42
4
PQ45
4
PR74
2.2/F_4
+ +
OCP 60A
100K/F_4 PR62
2.2_6 PC47 AOL1412 AOL1412
1

1
2
3

1
2
3

1
8 0.22U/25V_6X
FB CORE-PHASE2
PHASE2 28

PR21 PC16 26 LGATE2 PR82 PR86


*10K/F_4 22P/50V_4N LGATE2 PC57
9 27 2200p/50V_4X 0_4 0_4
FB2 VSSP2 330U/2V_7343P_E9b
PR15 10
412K/F_4 PC17 ISEN2 330U/2V_7343P_E9b
B B
2 1
1

150P/50V_4X 7 PC12
COMP 0.22U/10V_4X
2

VSUM-
PC18
10P/50V_4N PR20 6
8.06K/F_4 VW
IMON 18 ISENSE [5]
PR11 10K/F_4
1

PR63 PC44
PC15 10.2K/F_4 0.033U/16V_4X
1000P/50V_4X VSUM+ PR10 3.65K/F_6
2
ISUM+
ISUM-
VSEN

VSSSENSE
RTN

PR141 VSUM- PR18 1/F_4


12

13

14

15

2.8K/F_4 PR137 10K/F_4

PR142 PC112
562/F_4 390p/50V_4X VSUM+
0.33U/6.3V_4X
1

+VCC_CORE 1 2 PR46 PC121 PC119 PR166


PR32 10_4 82.5/F_4 *0.1U/50V_4X 2.61K/F_4
2

PC34
PC25 PR52
PR148 0_4 330P/50V_4X 11K/F_4
[5] VCCSENSE
PC29 PR167
2700P/50V_4X
2

[5] VSSSENSE
PR155 0_4 PC43 330P/50V_4X 10K _6_ NTC Panasonic
PC28
A 0.01U/50V_4X PR48 ERT-J1VR103J A
1

1 2 1000P/50V_4X 0_4
PR51 10_4
VSUM-

PR146
1.24K/F_4 PC109
0.1U/25V_4X

PC113
*1000P/50V_4X
PR39
*100/F_4
Quanta Computer Inc.
PROJECT : TE2
Size Document Number Rev
1A
CPU Core ( ISL62882)
Date: Tuesday, March 09, 2010 Sheet 38 of 43
5 4 3 2 1
5 4 3 2 1

39
VIN +3V_S5 +5V_S5 +15V

PR99 PR100 PR105 PR175


D 1M/F_6 22_8 22_8 1M/F_6 D

S5D
S5D [34]

3
[30,35] S5_ON 2
2 2 2
PC148
PR103

1
PQ18 1M/F_6 PQ21 PQ26 PQ48
PR96 DTC144EUA-7-F_30MA

1
100K_4 2200P/50V_4X

C C

DMN601K-7_300MA
DMN601K-7_300MA
DMN601K-7_300MA

VIN +3V +5V +1.5V +VTT +1.8V +1.05V +15V

PR109 PR102 PR95 PR98 PR97 PR101 PR106 PR172


B 1M/F_6 22_8 22_8 22_8 *22_8 22_8 22_8 1M/F_6 B

MAINON_ON_G MAIND
MAIND [5,34,35]

3
3

PQ46
PR110
2 1M/F_6 2 2 2 2 2 2 2
[11,30,35,36,37] MAINON PC141
2200P/50V_4X
PQ24 PQ22 PQ17 PQ19 PQ20 PQ23 PQ25 DMN601K-7_300MA
1

DTC144EUA-7-F_30MA
1

1
PR104
100K_4

A
DMN601K-7_300MA DMN601K-7_300MA DMN601K-7_300MA *DMN601K-7_300MA DMN601K-7_300MA DMN601K-7_300MA Quanta Computer Inc. A

PROJECT : TE2
Size Document Number Rev
[5,12,35,40] MAINON_ON_G 1A
Discharge
Date: Thursday, February 25, 2010 Sheet 39 of 43
5 4 3 2 1
5 4 3 2 1

+5VPCU
VIN 40

1
+3V PR38 PC27 PC116 PC30
EV@0/F_6 PC129 PC33 PC32 PC31

*EV@4.7U/25V_8X
PQ39

*EV@0.1U/50V_6X

EV@2200P/50V_4X
OCP=29.789~30.133A

EV@4.7U/25V_8X

EV@4.7U/25V_8X

*EV@4.7U/25V_8X

*EV@4.7U/25V_8X
PC114 PR159 EV@AOL1428

5
EV@4.7U/10V_6X EV@200K/F_4
PR140 EV@100K/F_4 2 VDD TON 7 8792TON
(Peak 28A, AVG 23.1A)
PR143 *EV@0_4 5 8792DH 4
[30] VGPU_IO_PG EV@1U/10V_4X PC118 8792VCC DH PR154
8792GND 13 VCC Total capacitor : 1400 uF
D EV@2.2_6 D

1
2
3
PR147
BST 6 8792BST1 2 PR17 ESR : 2.25mΩ
GFXPG_1V_EN 8792PGD 14 PGOOD
PR25 PC120 *EV@10K/F_4 EV@PCMB104T-R36MT_30A F: 297k Hz
EV@0_4 8792EN 1 PU9 EV@0.22U/25V_6X PL4
[19,30] GPU_VRON EN
4 8792LX 1 2 +VGPU_CORE
EV@0_4 PC24 PR150 LX
EV@MAX8792ETD+T
1 2 8792SKIP# 12

4
SKIP# 8792DL
DL 3

5
PR145 +3V_S5 EV@0.1U/25V_4X *EV@0_4 PQ33 PQ35

2
*EV@100K/F_4 8792REFIN 10 PC104 PC105 PC65
PR53 REFIN + + +
FB 8
R3 REF-2V

EV@330U/2.5V_7343P_E9b

EV@330U/2.5V_7343P_E9b

EV@330U/2.5V_7343P_E9b
8792GND EV@0_4 4 4 PR144
PR31
*EV@2.2_8
PR47 8792REF 11 98792ILIM

1
2
3

1
2
3

1
REF ILIM
EV@10K/F_4 R3 PC126 EV@AOL1412

EP
3
R1 PC117

EV@0.01U/50V_4X
*EV@1500P/50V_4X

15
PR49
2 PQ4 R1
EV@DMN601K-7_300MA EV@AOL1412

PR157 PR132 EV@0_4


3

EV@DMN601K-7_300MA EV@63.4K/F_4 [19] VSS_VCORE_P_SENSE


OCP=29.789~30.133A
1

PR56 EV@0_4 8792GND


[15] GFX_CORE_CNTRL0 2 PQ2 [19] VGA_CORE_P PR133 EV@0_4 Ton=Cton*(Rton+6.5k)*(Vfb/Vout),F=297kHz
PC40
PR161 Rdson=4.3//4.3=2.15mΩ
PR55
R4 R2 Ripple current=((Vin-Vo)/f*L)*(Vo/Vin)

*EV@1000P/50V_4X
PR54 PR37 PR160
1

EV@10K/F_4 R4 R2 EV@75K/F_4
+1.5VSUS
8792GND EV@0/F_6 (OCP-Ripple/2)=25.57
C C
+3V_S5 (OCP-Ripple/2)*Rds=Vref*((R2/(R1+R2))/20)

PQ16
+1.8V_GPU
0.996A R2=75KΩ,R1=63.4KΩ

5
6
7
8
PC39 PR67
8792GND +1.8V EV@AO6402A
3

EV@DMN601K-7_300MA
EV@0.01U/25V_4X EV@10K/F_4 PQ8
8792GND 6 GPU_MAIND 4
So,Vin=19V==>
5 4 OCP=30.133A;
2 2
1 PQ15 Vin=9V==>
PC75 PC76 PC77 EV@AO4430
PQ7 EV@10U/10V_8X OCP=29.789A

3
3

EV@10U/10V_8X

EV@10U/10V_8X
1

3
2
1
EV@DMN601K-7_300MA +1.5VSUS
PR61 EV@0_4
[15] GFX_CORE_CNTRL1 2
GPU_MAIND
+1.5V_GPU
1

1
PR65
PC74 AVG. 5.74A PU4
EV@10K/F_4
PEAK. 8.2A EV@RT9018B-18PSP

1
*EV@0.015U/50V_6X 3 VIN
PC69 PC66 NC 5
EV@10U/10V_8X EV@0.1U/25V_4X

2
PC46
EV@0.01U/25V_4X 8792GND
VOUT 6 +1V_GPU
GFXPG_1V_EN 2 EN

1
PC68 PC67 PC70
PR88 PC64 +5VPCU 4 VDD GND 8 AVG. 1.791A

EV@10U/10V_8X

EV@10U/10V_8X

EV@0.1U/25V_4X
B EV@0_4 B

2
ADJ
*EV@1000P/50V_4X
PC72
1 PGOOD GND1 9 PEAK. 2.544A
GFX_CORE_CNTRL0 GFX_CORE_CNTRL1 Madison/Park M92 M96 EV@1U/10V_4X

7
Madison/Park M92 M96 R1
LOW LOW 0.9V 0.9V 0.95V 1.2VADJ
R1 PR49 39.2K CS33922FB15 39.2K CS33922FB15 39.2K CS33922FB15
HIGH LOW 0.95V 0.95V 0.95V PR91
R2 PR55 60.4K CS36042FB10 60.4K CS36042FB10 49.9K CS34992FB10 1V_GPU_PG EV@25.5K/F_4
LOW HIGH 1.12V 1.1V 1.0V PR89 VO=(0.8(R1+R2)/R2)
R3 PR31 309K CS43092FB16 270K CS42702FB10 249K CS42492FB18 PR90 EV@100K/F_4R2 R2<120Kohm
HIGH HIGH N/A 1.2V 1.1V EV@10K/F_4
R4 PR37 88.7K CS38872FB18 93.1K CS39312FB15 140K CS41402FB14 +3V

PCIE_VDDC
M92,M96-->1.1V
Madison,Park-->1.0V
+1.5V_GPU +1.8V_GPU VIN +VGPU_CORE
VIN +15V
Madison,Park M92,M96

PR36 PR64 PR91 25.5K/F_4 39.2K/F_4


PR92 PR77 PR78 PR80 EV@1M/F_6 EV@22_8
EV@1M/F_6 EV@22_8 EV@22_8 EV@1M/F_6
(CS32552FB11) (CS33922FB15)
PR94
[5,12,35,39] MAINON_ON_G
PR89 100K/F_4 100K/F_4
*EV@0_4 GPU_MAIND
(CS41002FB28) (CS41002FB28)

3
3

GPU_VRON 2
A A
2 2
[30] GPU_MAINON 2 2 2
PR35 PQ6

1
PR93 PQ13 PQ14 PQ10 PQ5 EV@1M/F_6 EV@DMN601K-7_300MA
1

PQ12 EV@1M/F_6 PC63 PR58 EV@DTC144EUA-7-F_30MA

1
PR81 EV@2200P/50V_4X EV@100K/F_4
1

EV@100K/F_4

EV@DMN601K-7_300MA
Quanta Computer Inc.
EV@DTC144EUA-7-F_30MA EV@DMN601K-7_300MA EV@DMN601K-7_300MA
PROJECT : TE2
Size Document Number Rev
1A
+VGPU_CORE(MAX8792)
Date: Wednesday, March 10, 2010 Sheet 40 of 43
5 4 3 2 1
5 4 3 2 1

+VCC_CORE +-2%
2 VRON enable
41
Power Tree Table (Peak 58A,AVG 48A) OCP +5V_S5 +-5%
ISL82882C 58.5~60A
P.38 8 S5D
1 AO6402A
+5VPCU +-5% (AVG 0.001A) Inrush ?A
AC System AC/DC Insert enable P.34
Charger +5V +-5%
ISL88731 (Peak 10.2 ,AVG 8.135A) OCP 11.12~11.9525A MAIND
D 9 D
DC P.33
AO4496
3 P.34 (AVG 4.712A) Inrush ?A
RT8210B
P.34 AC/DC Insert enable +3V +-5%
+3VPCU +-5% 10 MAIND
AO6402A
(Peak 9A, AVG 7.623A) OCP 11.055~11.345A P.34 (AVG 1.404A) Inrush ?A

+3V_S5 +-5%
+VTT +-5% 11
+1.05V +-5% S5D
AO4496
4 MAINON enable
UPI6116A P.34
(AVG 4.909A) Inrush ?A
P.36 (Peak 21.68, AVG 17.073A)OCP 23.40~23.28A

+SMDDR_VTERM
SUSON enable

+SMDDR_VREF
C
5 C

UP6163 SUSON enable

P.35 +1.5V
+1.5VSUS 12 MAIND
SUSON enable AO6402A
P.35 (AVG 0.5A) Inrush ?A
For VGA (Peak 12.5A, AVG 9.77A)
OCP 15.8~15.9A
+1.5V_S5
13 MAIND
G909
P.35 (AVG 0.000427A) Inrush ?A
6
+1.5V_GPU
P.37
14 GPU_MAIND
+1.8V +-5% AO4496
MAINON enable P.40 (AVG 5.74A) Inrush ?A
RT8015A
FOR UMA 0.194A OCP 3.7A +1V_GPU
For VGA 1.345A 15 GFXPG_1V_EN
B RT9018B B
+VGPU_CORE+-2% (AVG 1.791A)Inrush ?A
7 P.40
GPU_VRON
MAX8792A OCP 29.769~30.133A
P.40 (Peak 28A, AVG 23.1A) +1.8V_GPU
16 GPU_MAIND
AO6402A
P.40 (AVG 0.966A)Inrush ?A

Power Distribution List

Power Distribution

A A

Quanta Computer Inc.


PROJECT : TE2
Size Document Number Rev
2A
Power Tree Table
Date: Thursday, February 25, 2010 Sheet 41 of 43
5 4 3 2 1
1 2 3 4 5 6 7 8

PAGE
Table of Contents
DESCRIPTION BOI-FUNCTIONS POWER PLANE VOLTAGE
CONTROL
SIGNAL
Power States

ACTIVE IN
42
1 Schematic Block Diagram
2 Front Page VIN 10V~+19V S0~S5
3 Clock Generator CLK
+VCCRTC +3.0V~+3.3V S0~S5
A 4-7 Processor CPU A

8-14 PCH CLG +3V +3.3V MAIN_ON S0


9 RTC RTC
15-16 DDRIII SO-DIMM DDR
17 VGA Connector VGA +3V_S5 +3.3V S5_ON S0~S5
18 LCD Panel LDS
+3V_HDP +3.3V MAIN_ON S0
CRT & CRT BUS SWITCH CRT
CCD CCD +3VPCU +3.3V AC/DC Insert enable S0
HALL SENSOR&BACK LIGHT SWITCH HSR
+5V +5V MAIN_ON S0
19 Display Port DPP
20 HDMI comm part HDM +5V_S5 +5V S5_ON S0~S5
HDMI for GM HMG
+5VPCU +5V AC/DC Insert enable S0~S5
21 SATA ODD ODD
Main SATA HDD & 2nd SATA HDD HDD +5V_TMA +5V MAIN_ON S0
G-Sensor H3D
WIMAX_P +3.3V WMAX_P for EC
B 22 5 IN 1 Card reader MMC B

IEEE1394 FIW +1.8V +1.8V MAIN_ON S0


23 MINI Card (Wi-Fi & WIMAX) WLN
+1.5V +1.5V MAIN_ON S0
MINI Card 2nd MNC
MINI Card 3nd MNC +1.5V_S5 +1.5V S5_ON S0~S5
TMA Connector TMA
+1.5V_SUS +1.5V SUSON S0~S3

24 INT KeyBoard & K/B LED Power KBC +VCC_CORE VRON S0


LED Board LED
+VTT +1.05V~+1.1V MAIN_ON S0
TP&FP board TPD,FPD
Bluetooth Connector BTM +1.05V +1.05V MAIN_ON S0
Felica Connector FEC
+VAXG GFXVR_EN S0
MMB Connector MMB
Power SW PSW
B-CAS Connector BCS GND PLANE PAGE
C C

GND_SIGNAL
25 New Card (Express Card) EXC 32
E-SATA comb USB ESA CARD_GND
21
USB Connector USB
AGND_DC/DC
Audio & USB Board USB,ADO 31
Light Sensor LSN
GND ALL
Satellite LED LED
RF LED / WIMAX LED / Kill SW KSW
26 EC WP8763LDG/WPC8769L(O) KBC
CIR CIR
27 Codec (CX20583) ADO PAGE DESCRIPTION BOI-FUNCTIONS
28 FM Tunner FMM 34 VAXG (ISL62881) PWM
Modem Connector MDM 35 +VTT (UP6111A) PWM
HOLE 36 +1.05V (UP6111AQDD) PWM
37 DDR 1.5V (TPS51116) PWM
D D
29 Atheros LAN LAN 38 Discharge (1.5V_S5/1.8V) PWM
30 NVRAM Connecyor NVR 39 Power Tree Table
40 PCH Power Plane
31 Charger (ISL6251A) PWM 41 Power Management Quanta Computer Inc.
32 System 5V/3V (ISL6237) PWM 42 Change List PROJECT : TE2
33 PWM Size Document Number Rev
CPU CORE (ISL62882) 2A
POWER STAGE AND BOI-FUNCTION
Date: Thursday, February 25, 2010 Sheet 42 of 43
1 2 3 4 5 6 7 8
5 4 3 2 1

MODEL TE2
Model REV CHANGE LIST PAGE FROM To

1 1A
PAGE (16) : Add BT_EN# for combo RF control for BT 2 1A
B2A PAGE (27) : Change DDR S3_1.5V ON circuit. 3 1A
TE2D MB 4 1A
5 1A
D C3A PAGE (07) : Add ESATA re-driver IC 6 1A D

7 1A
8 1A
D3A PAGE(32) : LED luminance to light,R436、R427 1K-ohm change 2.2K-ohm. 9 1A
PAGE(32) : LED luminance too low,R428 560-ohm change 220-ohm. 10 1A
PAGE(27) : Add R230,R231,R286,R287 0.1-ohm to avoid speaker burn. 11 1A
PAGE(16):Add Q62 to avoid leakage current. 12 1A
13 1A
14 1A
15 1A
16 1A
17 1A
18 1A
19 1A
20 1A
21 1A
22 1A
23 1A
24 1A
C
25 1A C

26 1A
27 1A
28 1A
29 1A
30 1A

B B

A A

PROJECT MODEL : TE2 APPROVED BY: Mosy Li DATE: 2009/10/27 Quanta Computer Inc.
DOC NO. 204 PROJECT : TE2
PART NUMBER: DRAWING BY: Mosy Li REVISON: 1A Size Document Number Rev
2A
Change list
Date: Friday, March 19, 2010 Sheet 31 of 33
5 4 3 2 1

You might also like