BD5 Block Diagram overview

1 2 3 4 5 6 7 8
BD5 Block Diagram 01

A
EXT_LVDS
s e USB-11
LCD/CCD Con. P29 A
U
PCI-E
VGA NVIDIA N14P-GV2 EXT_CRT
DDRIII-SODIMM1 Ivy Bridge(UMA+VGA) PCI-E x8 CRT Con. P29
VGA NVIDIA N14M-GL
DDRIII-SODIMM2 35W/45W
P14,15
DDR SYSTEM MEMORY

P16, 17, 18, 19, 20, 21, 22 EXT_HDMI
HDMI Level Shift
Dual Channel DDR III HDMI Con.
s
P28 P28
rPGA 989
VRAM DDR3-64M*16
u
VRAM DDR3-128M*16
P3, 4, 5, 6
SATA - HDD
o
P33
FDI DMI
DMI(x4)
B SATA - ODD
P33
SATA 0
SATA 4 SATA
FDI DMI
LCD
t H USB-11
LCD/CCD Con. P29
B
u
VIDEO CRT
USB-3 CRT Con. P29
Touch Panel
o
P38
HDMI HDMI Level Shift
HDMI Con.
y
USB-8 P28 P28
Card Reader
P36 PantherPoint
Daughter Board
USB 2.0 L1 Con.
USB 2.0 L2 Con. P31

USB-2
USB-9
USB2
PCH
L
P8, 9, 10, 11, 12, 13
a PCI-E
PCIE-3
PCIE-4
USB-10 WLAN
Giga/10/100 Lan
P30
n
P35
RTC
u
USB3
USB-0
USB 3.0 R1
BATTERY P31
C Port1 C
Y
P7
SPI
SPI Flash
Azalia IHDA
USB 3.0 R2
g
LPC P9 USB-1
Port2 P31
n
LPC
i a Audio Codec
P34
EC
P33
X
POWER SYSTEM
ISL88732HRTZ-T (Charge) P40
FAN K/B Con. HALL Sensor Touch Pad /B Power /B RT8223P (System 5V/3V) P41
r
MIC JACK HP SPK Con. Con. Con. TPS51216RUKR (DDR 1.5V) P42
P34 P34 P34 P3 P38 P29 P38 P38 RT8240BZQW (+VCCIO) P43
o
TPS51462RGER (+VCCSA) P44
D ISL95836HRZ-T (+VCC_CORE) P45 D
G9661-25ADJF12U (+1.8V) P46
F
RT8812A (NV_GPU_CORE) P47
(other GPU) P48
Quanta Computer Inc.

PROJECT : BD5
Size Document Number Rev
1A
Block Diagram
Date: Wednesday, January 16, 2013 Sheet 1 of 50
http://sualaptop365.edu.vn
1 2 3 4 5 6 7 8
5 4 3 2 1
02
e
Table of Contents
D
PAGE
1
2
3-6
8 - 13
DESCRIPTION
Schematic Block Diagram
Front Page
Processor
PCH
BOI-FUNCTIONS
CPU
CLG
POWER PLANE
+VIN
+3V_RTC
VOLTAGE
10V~+19V
+3.0V~+3.3V
CONTROL
SIGNAL
Power States
ACTIVE IN
S0~S5
S0~S5
D
Us
e
14 - 15 DDRIII SO-DIMM DDR
+3V +3.3V MAIN_ON S0
16 - 22 N14P-GV2/N14M-GL VGA
s
23 - 24 VRAM - DDR3 VGA +3V_S5 +3.3V S5_ON S0~S5
28 HDMI comm part HDM
+3VPCU +3.3V AC/DC Insert enable S0~S5
u
29 VGA Connector VGA
LCD Panel LDS +5V +5V MAIN_ON S0
CRT & CRT BUS SWITCH CRT
o
+5V_S5 +5V S5_ON S0~S5
CCD CCD
HALL SENSOR&BACK LIGHT SWITCH HSR +5VPCU +5V AC/DC Insert enable S0~S5
30 MINI Card (Wi-Fi & WIMAX) MNW
H
31 USB Connector USB +1.5VSUS +1.5V S5_ON S0~S3
USB Sleep Charger SLC
+1.5V +1.5V MAIN_ON S0
t
33 HDD HDD
ODD ODD +VCCIO +1.05V MAIN_ON S0
C C
u
34 Audio Codec ADO
+VCCSA ~ HWPG_VCCIO S0
35 Atheros LAN LAN
36 Card reader MMC +VCORE+VGFX ~ MPWROK S0
37
38
EC
KeyBoard
TP&FP board
Power SW
KBC
KBC
TPD,FPD
PSW
+3V_GPU
+VGPU_CORE
+3.3V
~
DGPU_PWR_EN_R
y
DGPU_PWR_EN_RC
o S0
S0
a
39 LED LED
+1.5V_GPU +1.5V GPU_PWR_GD S0
40 Charger PWM
L
41 System 5V/3V PWM +1.05V_GPU +1.05V GPU_PWR_GD S0
42 DDR 1.5V PWM
43 +VCCIO PWM
44 +VCCSA PWM
n
45 +VCORE+VGFX PWM
46 +1.8V / Discharge PWM
u
47 GPU_CORE PWM
48 other GPU PWM
Y
B B
n g
GND PLANE
GND_SIGNAL
PAGE
32
a
8769GND
i
37
GND
ALL
ADOGND
34
r X
A
Fo Quanta Computer Inc.

A
PROJECT : Chief River

1A
POWER STAGE & BOI-FUNCTION
5 4 3 2 1
5 4 3 2 1
Ivy Bridge Processor (DMI,PEG,FDI) <CPU/VGA> Ivy Bridge Processor (CLK,MISC,JTAG) <CPU>
{8} DMI_TXN0
{8} DMI_TXN1
B27
B25
A25
U18A
DMI_RX#[0]
DMI_RX#[1]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
J22
J21
H22
PEG_COMP
U18B
03
{8} DMI_TXN2 DMI_RX#[2] PEG_RXN[0..7] {16}
B24 K33 PEG_RXN0
{8} DMI_TXN3 DMI_RX#[3] PEG_RX#[0] M35 PEG_RXN1
B28 PEG_RX#[1] L34 PEG_RXN2 A28 CLK_CPU_BCLKP_R RP28 3 4 0X2
{8} DMI_TXP0 DMI_RX[0] PEG_RX#[2] BCLK CLK_CPU_BCLKP {10}
MISC
CLOCKS
B26 J35 PEG_RXN3 {9} H_SNB_IVB# C26 A27 CLK_CPU_BCLKN_R 1 2 CLK_CPU_BCLKN {10}
{8} DMI_TXP1 DMI_RX[1] PEG_RX#[3] PROC_SELECT# BCLK#
DMI
A24 J32 PEG_RXN4
e
{8} DMI_TXP2 DMI_RX[2] PEG_RX#[4]
B23 H34 PEG_RXN5 R522 LDS@1K_4
{8} DMI_TXP3 DMI_RX[3] PEG_RX#[5] H31 PEG_RXN6 SKTOCC# AN34
PEG_RX#[6] TP54 SKTOCC#
G21 G33 PEG_RXN7 A16 CLK_DPLL_SSCLKP_R RP9 1 2 PIVEDP@0X2 CLK_CPU_DPP {10}
{8} DMI_RXN0 DMI_TX#[0] PEG_RX#[7] DPLL_REF_CLK
E22 G30 A15 CLK_DPLL_SSCLKN_R 3 4 CLK_CPU_DPN {10}
{8} DMI_RXN1 DMI_TX#[1] PEG_RX#[8] DPLL_REF_CLK#
s
F21 F35
D {8} DMI_RXN2 DMI_TX#[2] PEG_RX#[9] D
D21 E34 C90
{8} DMI_RXN3 DMI_TX#[3] PEG_RX#[10] E32 *10P/50V_4C TP_CATERR# AL33 R521 LDS@1K_4 +VTT
PEG_RX#[11] TP4 CATERR#
G22 D33
{8} DMI_RXP0 DMI_TX[0] PEG_RX#[12]
D22 D31
THERMAL
F20 B33
PCI EXPRESS* - GRAPHICS

C21 C32 {37} EC_PECI AN33 R8 CPU_DRAMRST# {27}
{8} DMI_RXP3 DMI_TX[3] PEG_RX#[15] PECI SM_DRAMRST#
PEG_RXP[0..7] {16}
DDR3
MISC
J33 PEG_RXP0
PEG_RX[0] L35 PEG_RXP1
PEG_RX[1] K34 PEG_RXP2 H_PROCHOT# R93 56_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R92 140/F_4
PEG_RX[2] {45} H_PROCHOT# PROCHOT# SM_RCOMP[0]
A21 H35 PEG_RXP3 A5 SM_RCOMP_1 R525 25.5/F_4
{8} FDI_TXN0 FDI0_TX#[0] PEG_RX[3] SM_RCOMP[1]
H19 H32 PEG_RXP4 A4 SM_RCOMP_2 R518 200/F_4
{8} FDI_TXN1 FDI0_TX#[1] PEG_RX[4] SM_RCOMP[2]
E19 G34 PEG_RXP5
{8} FDI_TXN2 FDI0_TX#[2] PEG_RX[5]
F18 G31 PEG_RXP6 PM_THRMTRIP#_R AN32
Intel(R) FDI
{8} FDI_TXN3 FDI0_TX#[3] PEG_RX[6] THERMTRIP#
B21 F33 PEG_RXP7
e
C20 F30
D18 E35
E17 E33
{8} FDI_TXN7 FDI1_TX#[3] PEG_RX[10] F32 AP29 XDP_PRDY#_R TP47
s
PEG_RX[11] D34 PRDY# AP27 XDP_PREQ# C539 *E@0.1U/25V_4X
A22 PEG_RX[12] E31 PREQ#
{8} FDI_TXP0 FDI0_TX[0] PEG_RX[13]
G19 C33 AR26 XDP_TCLK
{8} FDI_TXP1 FDI0_TX[1] PEG_RX[14] TCK
PWR MANAGEMENT
E20 B32 AR27 XDP_TMS
JTAG & BPM

{8} FDI_TXP2 FDI0_TX[2] PEG_RX[15] TMS
G18 PEG_TXN[0..7] {16} {8} PM_SYNC AM34 AP30 XDP_TRST#
{8} FDI_TXP3 FDI0_TX[3] PM_SYNC TRST#
u
B20 M29 PEG_TXN0_C C605 EV@0.22U/10V_4X PEG_TXN0
{8} FDI_TXP4 FDI1_TX[0] PEG_TX#[0]
C19 M32 PEG_TXN1_C C586 EV@0.22U/10V_4X PEG_TXN1 C85 *E@0.1U/25V_4X AR28 XDP_TDI_R
{8} FDI_TXP5 FDI1_TX[1] PEG_TX#[1] TDI
D19 M31 PEG_TXN2_C C607 EV@0.22U/10V_4X PEG_TXN2 AP26 XDP_TDO_R
{8} FDI_TXP6 FDI1_TX[2] PEG_TX#[2] TDO
F17 L32 PEG_TXN3_C C588 EV@0.22U/10V_4X PEG_TXN3 {11} H_PWRGOOD R76 E@0_4 AP33
{8} FDI_TXP7 FDI1_TX[3] PEG_TX#[3] UNCOREPWRGOOD
L29 PEG_TXN4_C C609 EV@0.22U/10V_4X PEG_TXN4
J18 PEG_TX#[4] K31 PEG_TXN5_C C590 EV@0.22U/10V_4X PEG_TXN5 R78 10K_4
o
{8} FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5]
J17 K28 PEG_TXN6_C C611 EV@0.22U/10V_4X PEG_TXN6 AL35 XDP_DBR#_R R511 *SHORT_4 XDP_DBRST# {8}
{8} FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] DBR#
J30 PEG_TXN7_C C592 EV@0.22U/10V_4X PEG_TXN7 {27} PM_DRAM_PWRGD_R V8
H20 PEG_TX#[7] J28 C253 *E@0.1U/25V_4X SM_DRAMPWROK
{8} FDI_INT FDI_INT PEG_TX#[8] H29 AT28 XDP_OBS0 TP46
J19 PEG_TX#[9] G27 R50 *75/F_4 BPM#[0] AR29 XDP_OBS1 TP48
{8} FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] +VTT BPM#[1]
H17 E29 AR30 XDP_OBS2 TP50
{8} FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] BPM#[2]
F27 CPU_PLTRST# R72 *43_4 CPU_PLTRST#_R AR33 AT30 XDP_OBS3 TP49
PEG_TX#[12] D28 RESET# BPM#[3] AP32 XDP_OBS4 TP55
H
PEG_TX#[13] F26 BPM#[4] AR31 XDP_OBS5 TP52
PEG_TX#[14] E25 BPM#[5] AT31 XDP_OBS6 TP51
C C
A18 PEG_TX#[15] C82 C81 BPM#[6] AR32 XDP_OBS7 TP53
eDP_COMPIO PEG_TXP[0..7] {16} BPM#[7]
eDP_COMP A17 M28 PEG_TXP0_C C604 EV@0.22U/10V_4X PEG_TXP0 *39P/50V_4N *0.1U/10V_4X
B16 eDP_ICOMPO PEG_TX[0] M33 PEG_TXP1_C C585 EV@0.22U/10V_4X PEG_TXP1
{29} INT_EDP_HPD eDP_HPD PEG_TX[1]
t
M30 PEG_TXP2_C C606 EV@0.22U/10V_4X PEG_TXP2
PEG_TX[2] L31 PEG_TXP3_C C587 EV@0.22U/10V_4X PEG_TXP3
C15 PEG_TX[3] L28 PEG_TXP4_C C608 EV@0.22U/10V_4X PEG_TXP4 ACA-ZIF-069-K01
{29} INT_EDP_AUXP eDP_AUX PEG_TX[4]
D15 K30 PEG_TXP5_C C589 EV@0.22U/10V_4X PEG_TXP5
{29} INT_EDP_AUXN eDP_AUX# PEG_TX[5]
eDP
K27 PEG_TXP6_C C610 EV@0.22U/10V_4X PEG_TXP6

PEG_TX[6] J29 PEG_TXP7_C C591 EV@0.22U/10V_4X PEG_TXP7
u
C17 PEG_TX[7] J27
{29} INT_EDP_TXP0 eDP_TX[0] PEG_TX[8]
F16 H28
C16 G28
G15 E28
{29} INT_EDP_TXP3 eDP_TX[3] PEG_TX[11] F28
PEG_TX[12]
o
C18 D27
{29} INT_EDP_TXN0 eDP_TX#[0] PEG_TX[13]
E16 E26
D16 D25
F15
{29} INT_EDP_TXN3 eDP_TX#[3]
y
ACA-ZIF-069-K01
Thermal Trip & Process HOT<CPU>

FDI Disabling (Discrete Only) DP & PEG Compensation <CPU> Processor pull-up <CPU> Level <CPU> +3V_S5 Intel Turbo mode only <CPU>
a
+VTT
<OEV> Shift
+VTT C69
6
U3 *0.1U/10V_4X H_PROCHOT#
L
R122 OEV@1K_4 FDI_INT R523 24.9/F_4 eDP_COMP 1 5 2
+VTT NC VCC {8,45} DELAY_VR_PWRGOOD
Q9A
R120 OEV@1K_4 FDI_FSYNC0 {10,30,35,36,37,38} PLTRST# 2 C71
IN 2N7002KDW_115MA *47P/50V_4N
3
R119 OEV@1K_4 FDI_FSYNC1 H_PROCHOT# R94 62_4 3 4 CPU_PLTRST#
GND OUT R58 100K_4
R121 OEV@1K_4 FDI_LSYNC0 XDP_TMS R491 51_4 *74LVC1G07GW H_PROCHOT_EC 5
{37} H_PROCHOT_EC
XDP_TDI_R R489 51_4
B +VTT B
n
R118 OEV@1K_4 FDI_LSYNC1 XDP_TDO_R R488 *51_4 R65 Q9B
XDP_TCLK R493 51_4 R71 1.5K/F_4 CPU_PLTRST#_R
4
XDP_TRST# R70 51_4 1K_4 R69 2N7002KDW_115MA
R514 24.9/F_4 PEG_COMP R75 100K_4
Q8
2
750/F_4
u
METR3904-G_200MA
PM_THRMTRIP#_R 1 3 S5_ON
B2A
PM_THRMTRIP# {11}
CPU Thermal sensor / MB Local TEMP <THP/UGA/VGA>
Y
<THC> FAN Control-->For one FAN solution <THC>
S5_ON
+5V VIN +5VPCU

B2A
g
3
Q43B
5
*2N7002KDW_115MA
R481 R483 R485
n
Rset(Kohm)=0.0012T*T-0.9308T+96.147
4
3
U17 *IV@NTC_470K_4 *EV@NTC_470K_4

2 1 8 *499K/F_4 +3V
1 OUT VCC R105 EV@24.9K/F_4
Q45 2 7 55uA
1
1 IN- 2 OUT
a
*MMBT2222A_600MA U4
VFAN1 3
1 IN+ 2 IN-
6 0.5A R502 +3VPCU R108 150_4 +3VPCU_HW_SD 5
VCC SET
1 R107 IV@24.9K/F_4
i
TH_FAN_POWER1 R497 *100K_4 4 5 R486 R487 *10K_4 C123 2
GND 2 IN+
*IV@1M_4 *EV@1M_4
+5V 0.5A CN10 GND B2A
U16 {37} FANSIG1 FANSIG1 0.1U/16V_4Y
*LM358 R484 C538 2.2U/6.3V_4X 2 3 TH_FAN_POWER1 4 3 R761 0_4 S5_ON S5_ON {20,37,41}
VIN VO 1 HYST OT#
6
R498 R496 R482 *499K/F_4 5

Q43A 1 GND 6 2 G708T1U
*100K_4 *162K/F_4 *48.7K/F_4 2
B2A /FON GND 7 3 HYST=VCC for 10
R104 *470K_4 D2 *1SS355_100MA
GND degree Hys. +3VPCU
A 4 8 C537 A
{37} VFAN1 VSET GND HYST=GND for 30
X
*2N7002KDW_115MA
APE8872M 2.2U/6.3V_4X 85205-0300L degree Hys.
1
B2A
B2A
o r Size Document Number

PROJECT :BD5
Ivy Bridge 1/4
Rev
A1A
F
5 4 3 2 1
5 4 3 2 1
04
Ivy Bridge Processor (DDR3) <CPU>
U18D
s e D
U
U18C
AE2 M_B_CLKP0 {15}

{15} M_B_DQ[63:0] SB_CLK[0]
AB6 M_A_CLKP0 {14}
AD2 M_B_CLKN0 {15}
SA_CLK[0] AA6 M_B_DQ0 C9 SB_CLK#[0] R9
{14} M_A_DQ[63:0] SA_CLK#[0] M_A_CLKN0 {14} SB_DQ[0] SB_CKE[0] M_B_CKE0 {15}
M_A_DQ0 C5 V9 M_B_DQ1 A7
e
SA_DQ[0] SA_CKE[0] M_A_CKE0 {14} SB_DQ[1]
M_A_DQ1 D5 M_B_DQ2 D10
M_A_DQ2 D3 SA_DQ[1] M_B_DQ3 C8 SB_DQ[2]
M_A_DQ3 D2 SA_DQ[2] M_B_DQ4 A9 SB_DQ[3] AE1
SA_DQ[3] SB_DQ[4] SB_CLK[1] M_B_CLKP1 {15}
M_A_DQ4 D6 AA5 M_A_CLKP1 {14} M_B_DQ5 A8 AD1 M_B_CLKN1 {15}
s
M_A_DQ5 C6 SA_DQ[4] SA_CLK[1] AB5 M_B_DQ6 D9 SB_DQ[5] SB_CLK#[1] R10
SA_DQ[5] SA_CLK#[1] M_A_CLKN1 {14} SB_DQ[6] SB_CKE[1] M_B_CKE1 {15}
M_A_DQ6 C2 V10 M_A_CKE1 {14} M_B_DQ7 D8
M_A_DQ7 C3 SA_DQ[6] SA_CKE[1] M_B_DQ8 G4 SB_DQ[7]
M_A_DQ8 F10 SA_DQ[7] M_B_DQ9 F4 SB_DQ[8]
M_A_DQ9 F8 SA_DQ[8] M_B_DQ10 F1 SB_DQ[9] AB2
SA_DQ[9] SB_DQ[10] RSVD_TP[11]
u
M_A_DQ10 G10 AB4 M_B_DQ11 G1 AA2
M_A_DQ11 G9 SA_DQ[10] RSVD_TP[1] AA4 M_B_DQ12 G5 SB_DQ[11] RSVD_TP[12] T9
M_A_DQ12 F9 SA_DQ[11] RSVD_TP[2] W9 M_B_DQ13 F5 SB_DQ[12] RSVD_TP[13]
M_A_DQ13 F7 SA_DQ[12] RSVD_TP[3] M_B_DQ14 F2 SB_DQ[13]
M_A_DQ14 G8 SA_DQ[13] M_B_DQ15 G2 SB_DQ[14]
M_A_DQ15 G7 SA_DQ[14] M_B_DQ16 J7 SB_DQ[15] AA1
o
M_A_DQ16 K4 SA_DQ[15] AB3 M_B_DQ17 J8 SB_DQ[16] RSVD_TP[14] AB1
M_A_DQ17 K5 SA_DQ[16] RSVD_TP[4] AA3 M_B_DQ18 K10 SB_DQ[17] RSVD_TP[15] T10
M_A_DQ18 K1 SA_DQ[17] RSVD_TP[5] W10 M_B_DQ19 K9 SB_DQ[18] RSVD_TP[16]
M_A_DQ19 J1 SA_DQ[18] RSVD_TP[6] M_B_DQ20 J9 SB_DQ[19]
M_A_DQ20 J5 SA_DQ[19] M_B_DQ21 J10 SB_DQ[20]
M_A_DQ21 J4 SA_DQ[20] M_B_DQ22 K8 SB_DQ[21] AD3
SA_DQ[21] SB_DQ[22] SB_CS#[0] M_B_CS#0 {15}
M_A_DQ22 J2 AK3 M_A_CS#0 {14} M_B_DQ23 K7 AE3 M_B_CS#1 {15}
SA_DQ[22] SA_CS#[0] SB_DQ[23] SB_CS#[1]
H
M_A_DQ23 K2 AL3 M_A_CS#1 {14} M_B_DQ24 M5 AD6
M_A_DQ24 M8 SA_DQ[23] SA_CS#[1] AG1 M_B_DQ25 N4 SB_DQ[24] RSVD_TP[17] AE6
M_A_DQ25 N10 SA_DQ[24] RSVD_TP[7] AH1 M_B_DQ26 N2 SB_DQ[25] RSVD_TP[18]
M_A_DQ26 N8 SA_DQ[25] RSVD_TP[8] M_B_DQ27 N1 SB_DQ[26]
C C
M_A_DQ27 N7 SA_DQ[26] M_B_DQ28 M4 SB_DQ[27]
M_A_DQ28 M10 SA_DQ[27] M_B_DQ29 N5 SB_DQ[28] AE4 M_B_ODT0 {15}
DDR SYSTEM MEMORY B

M_A_DQ29 M9 SA_DQ[28] AH3 M_B_DQ30 M2 SB_DQ[29] SB_ODT[0] AD4
SA_DQ[29] SA_ODT[0] M_A_ODT0 {14} SB_DQ[30] SB_ODT[1] M_B_ODT1 {15}
M_A_DQ30 N9 AG3 M_B_DQ31 M1 AD5
DDR SYSTEM MEMORY A

SA_DQ[30] SA_ODT[1] M_A_ODT1 {14} SB_DQ[31] RSVD_TP[19]
M_A_DQ31 M7 AG2 M_B_DQ32 AM5 AE5
M_A_DQ32 AG6 SA_DQ[31] RSVD_TP[9] AH2 M_B_DQ33 AM6 SB_DQ[32] RSVD_TP[20]
M_A_DQ33 AG5 SA_DQ[32] RSVD_TP[10] M_B_DQ34 AR3 SB_DQ[33]
SA_DQ[33] SB_DQ[34]
u
M_A_DQ34 AK6 M_B_DQ35 AP3
M_A_DQ35 AK5 SA_DQ[34] M_B_DQ36 AN3 SB_DQ[35]
SA_DQ[35] SB_DQ[36] M_B_DQSN[7:0] {15}
M_A_DQ36 AH5 M_B_DQ37 AN2 D7 M_B_DQSN0
SA_DQ[36] M_A_DQSN[7:0] {14} SB_DQ[37] SB_DQS#[0]
M_A_DQ37 AH6 C4 M_A_DQSN0 M_B_DQ38 AN1 F3 M_B_DQSN1
M_A_DQ38 AJ5 SA_DQ[37] SA_DQS#[0] G6 M_A_DQSN1 M_B_DQ39 AP2 SB_DQ[38] SB_DQS#[1] K6 M_B_DQSN2
M_A_DQ39 AJ6 SA_DQ[38] SA_DQS#[1] J3 M_A_DQSN2 M_B_DQ40 AP5 SB_DQ[39] SB_DQS#[2] N3 M_B_DQSN3
o
M_A_DQ40 AJ8 SA_DQ[39] SA_DQS#[2] M6 M_A_DQSN3 M_B_DQ41 AN9 SB_DQ[40] SB_DQS#[3] AN5 M_B_DQSN4
M_A_DQ41 AK8 SA_DQ[40] SA_DQS#[3] AL6 M_A_DQSN4 M_B_DQ42 AT5 SB_DQ[41] SB_DQS#[4] AP9 M_B_DQSN5
M_A_DQ42 AJ9 SA_DQ[41] SA_DQS#[4] AM8 M_A_DQSN5 M_B_DQ43 AT6 SB_DQ[42] SB_DQS#[5] AK12 M_B_DQSN6
M_A_DQ43 AK9 SA_DQ[42] SA_DQS#[5] AR12 M_A_DQSN6 M_B_DQ44 AP6 SB_DQ[43] SB_DQS#[6] AP15 M_B_DQSN7
M_A_DQ44 AH8 SA_DQ[43] SA_DQS#[6] AM15 M_A_DQSN7 M_B_DQ45 AN8 SB_DQ[44] SB_DQS#[7]
y
M_A_DQ45 AH9 SA_DQ[44] SA_DQS#[7] M_B_DQ46 AR6 SB_DQ[45]
M_A_DQ46 AL9 SA_DQ[45] M_B_DQ47 AR5 SB_DQ[46]
M_A_DQ47 AL8 SA_DQ[46] M_B_DQ48 AR9 SB_DQ[47]
SA_DQ[47] SB_DQ[48] M_B_DQSP[7:0] {15}
M_A_DQ48 AP11 M_B_DQ49 AJ11 C7 M_B_DQSP0
SA_DQ[48] M_A_DQSP[7:0] {14} SB_DQ[49] SB_DQS[0]
M_A_DQ49 AN11 D4 M_A_DQSP0 M_B_DQ50 AT8 G3 M_B_DQSP1
a
M_A_DQ50 AL12 SA_DQ[49] SA_DQS[0] F6 M_A_DQSP1 M_B_DQ51 AT9 SB_DQ[50] SB_DQS[1] J6 M_B_DQSP2
M_A_DQ51 AM12 SA_DQ[50] SA_DQS[1] K3 M_A_DQSP2 M_B_DQ52 AH11 SB_DQ[51] SB_DQS[2] M3 M_B_DQSP3
M_A_DQ52 AM11 SA_DQ[51] SA_DQS[2] N6 M_A_DQSP3 M_B_DQ53 AR8 SB_DQ[52] SB_DQS[3] AN6 M_B_DQSP4
M_A_DQ53 AL11 SA_DQ[52] SA_DQS[3] AL5 M_A_DQSP4 M_B_DQ54 AJ12 SB_DQ[53] SB_DQS[4] AP8 M_B_DQSP5
M_A_DQ54 AP12 SA_DQ[53] SA_DQS[4] AM9 M_A_DQSP5 M_B_DQ55 AH12 SB_DQ[54] SB_DQS[5] AK11 M_B_DQSP6
M_A_DQ55 AN12 SA_DQ[54] SA_DQS[5] AR11 M_A_DQSP6 M_B_DQ56 AT11 SB_DQ[55] SB_DQS[6] AP14 M_B_DQSP7
SA_DQ[55] SA_DQS[6] SB_DQ[56] SB_DQS[7]
L
M_A_DQ56 AJ14 AM14 M_A_DQSP7 M_B_DQ57 AN14
M_A_DQ57 AH14 SA_DQ[56] SA_DQS[7] M_B_DQ58 AR14 SB_DQ[57]
M_A_DQ58 AL15 SA_DQ[57] M_B_DQ59 AT14 SB_DQ[58]
M_A_DQ59 AK15 SA_DQ[58] M_B_DQ60 AT12 SB_DQ[59]
SA_DQ[59] SB_DQ[60] M_B_A[15:0] {15}
M_A_DQ60 AL14 M_A_A[15:0] {14} M_B_DQ61 AN15 AA8 M_B_A0
M_A_DQ61 AK14 SA_DQ[60] AD10 M_A_A0 M_B_DQ62 AR15 SB_DQ[61] SB_MA[0] T7 M_B_A1
M_A_DQ62 AJ15 SA_DQ[61] SA_MA[0] W1 M_A_A1 M_B_DQ63 AT15 SB_DQ[62] SB_MA[1] R7 M_B_A2
M_A_DQ63 AH15 SA_DQ[62] SA_MA[1] W2 M_A_A2 SB_DQ[63] SB_MA[2] T6 M_B_A3
SA_DQ[63] SA_MA[2] SB_MA[3]
n
W7 M_A_A3 T2 M_B_A4
SA_MA[3] V3 M_A_A4 SB_MA[4] T4 M_B_A5
B SA_MA[4] V2 M_A_A5 SB_MA[5] T3 M_B_A6 B
SA_MA[5] W3 M_A_A6 AA9 SB_MA[6] R2 M_B_A7
SA_MA[6] {15} M_B_BS#0 SB_BS[0] SB_MA[7]
{14} M_A_BS#0
AE10 W6 M_A_A7 {15} M_B_BS#1
AA7 T5 M_B_A8
AF10 SA_BS[0] SA_MA[7] V1 R6 SB_BS[1] SB_MA[8] R3
u
{14} M_A_BS#1 M_A_A8 {15} M_B_BS#2 M_B_A9
V6 SA_BS[1] SA_MA[8] W5 M_A_A9 SB_BS[2] SB_MA[9] AB7 M_B_A10
{14} M_A_BS#2 SA_BS[2] SA_MA[9] SB_MA[10]
AD8 M_A_A10 R1 M_B_A11
SA_MA[10] V4 M_A_A11 SB_MA[11] T1 M_B_A12
SA_MA[11] W4 M_A_A12 AA10 SB_MA[12] AB10 M_B_A13
SA_MA[12] {15} M_B_CAS# SB_CAS# SB_MA[13]
{14} M_A_CAS# AE8 AF8 M_A_A13 {15} M_B_RAS# AB8 R5 M_B_A14
AD9 SA_CAS# SA_MA[13] V5 M_A_A14 AB9 SB_RAS# SB_MA[14] R4 M_B_A15
{14} M_A_RAS# SA_RAS# SA_MA[14] {15} M_B_WE# SB_WE# SB_MA[15]
{14} M_A_WE# AF9 V7 M_A_A15
SA_WE# SA_MA[15]
ACA-ZIF-069-K01
gY ACA-ZIF-069-K01
i a n
X
A A
o r Quanta Computer Inc.

PROJECT : BD5
F
A1A
Ivy Bridge 2/4
5 4 3 2 1
5 4 3 2 1
Ivy Bridge Processor (POWER) <CPU> Ivy Bridge Processor (GRAPHIC POWER) <CPU/OEV/PIV> 05
U18F POWER U18G
POWER
R504 PIV@100_4
VCCIO:8.5A VAXG:46A +VAXG
SENSE
LINES
e
+VAXG
AT24 AK35 VCC_AXG_SENSE {45}
+VCC_CORE AT23 VAXG1 VAXG_SENSE AK34
+VTT VAXG2 VSSAXG_SENSE VSS_AXG_SENSE {45}
AT21
AT20 VAXG3 R505 PIV@100_4
+ C564 AT18 VAXG4
s
D
AG35 *330U/2.5V_3528P_E9b AT17 VAXG5 D
AG34 VCC1 AH13 C74 C75 C541 C76 AR24 VAXG6
AG33 VCC2 VCCIO1 AH10 PIV@10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X AR23 VAXG7
VCC:94A AG32
AG31
VCC3
VCC4
VCCIO2
VCCIO3
AG10
AC10
AR21
AR20
VAXG8
VAXG9
VCC5 VCCIO4 VAXG10
VREF
AG30 Y10 AR18
AG29 VCC6 VCCIO5 U10 AR17 VAXG11
AG28 VCC7 VCCIO6 P10 AP24 VAXG12 AL1 +VDDR_REF_CPU
U
VCC8 VCCIO7 VAXG13 SM_VREF +VDDR_REF_CPU
AG27 L10 AP23
AG26 VCC9 VCCIO8 J14 C125 C135 C566 C150 C163 C569 C547 C548 C113 C116 AP21 VAXG14
AF35 VCC10 VCCIO9 J13 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X *10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X AP20 VAXG15
AF34 VCC11 VCCIO10 J12 AP18 VAXG16
AF33 VCC12 VCCIO11 J11 AP17 VAXG17
AF32 VCC13 VCCIO12 H14 AN24 VAXG18
AF31 VCC14 VCCIO13 H12 AN23 VAXG19
VCC15 VCCIO14 VAXG20
e
AF30 H11 AN21
AF29 VCC16 VCCIO15 G14 AN20 VAXG21
AF28 VCC17 VCCIO16 G13 AN18 VAXG22
DDR3 -1.5V RAILS

VDDQ:5A
PEG AND DDR

AF27 G12 C112 C120 C568 C181 C154 C567 C109 C542 C540 C108 AN17
GRAPHICS
AF26 F14 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X AM24 AF7
s
VCC20 VCCIO19 VAXG25 VDDQ1 +1.5V_CPU
AD35 F13 AM23 AF4
AD34 VCC21 VCCIO20 F12 AM21 VAXG26 VDDQ2 AF1
AD33 VCC22 VCCIO21 F11 AM20 VAXG27 VDDQ3 AC7 C178 C177 C176 C180
AD32 VCC23 VCCIO22 E14 AM18 VAXG28 VDDQ4 AC4 10U/6.3V_6X *10U/6.3V_6X *10U/6.3V_6X 10U/6.3V_6X
AD31 VCC24 VCCIO23 E12 AM17 VAXG29 VDDQ5 AC1
VCC25 VCCIO24 VAXG30 VDDQ6
u
C132 C553 C559 C563 C562 C155 AD30 AL24 Y7
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X AD29 VCC26 E11 AL23 VAXG31 VDDQ7 Y4
AD28 VCC27 VCCIO25 D14 AL21 VAXG32 VDDQ8 Y1
AD27 VCC28 VCCIO26 D13 C118 AL20 VAXG33 VDDQ9 U7
AD26 VCC29 VCCIO27 D12 OEV@0_6 AL18 VAXG34 VDDQ10 U4 +
AC35 VCC30 VCCIO28 D11 AL17 VAXG35 VDDQ11 U1 C104 C179 C91
o
AC34 VCC31 VCCIO29 C14 AK24 VAXG36 VDDQ12 P7 10U/6.3V_6X 10U/6.3V_6X *330U/2V_7343P_E9c
AC33 VCC32 VCCIO30 C13 AK23 VAXG37 VDDQ13 P4
AC32 VCC33 VCCIO31 C12 AK21 VAXG38 VDDQ14 P1
C554 C558 C161 C561 C555 C151 AC31 VCC34 VCCIO32 C11 AK20 VAXG39 VDDQ15
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X *10U/6.3V_6X 10U/6.3V_6X AC30 VCC35 VCCIO33 B14 AK18 VAXG40
AC29 VCC36 VCCIO34 B12 AK17 VAXG41
AC28 VCC37 VCCIO35 A14 AJ24 VAXG42
AC27 VCC38 VCCIO36 A13 AJ23 VAXG43
H
C AC26 VCC39 VCCIO37 A12 AJ21 VAXG44 C
AA35 VCC40 VCCIO38 A11 AJ20 VAXG45
AA34 VCC41 VCCIO39 AJ18 VAXG46
AA33 VCC42 J23 +VCCIO40_R R515 0_4 AJ17 VAXG47
VCC43 VCCIO40 +VTT VAXG48
C551 C549 C556 C560 AA32 AH24 B2A
SA RAIL
10U/6.3V_6X *10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X AA31 VCC44 AH23 VAXG49
VCCSA:6A
t
AA30 VCC45 AH21 VAXG50 M27
VCC46 VAXG51 VCCSA1 +VCCSA
AA29 AH20 M26
AA28 VCC47 AH18 VAXG52 VCCSA2 L26 +
AA27 VCC48 AH17 VAXG53 VCCSA3 J26 C172 C171 C570 C169
AA26 VCC49 VAXG54 VCCSA4 J25 *10U/6.3V_6X *10U/6.3V_6X 10U/6.3V_6X *330U/2.5V_3528P_E9b
VCC50 VCCSA5
u
Y35 J24
CORE SUPPLY
Y34 VCC51 VCCSA6 H26

Y33 VCC52 VCCSA7 H25
C134 C122 C129 C133 Y32 VCC53 VCCSA8
VCC54
1.8V RAIL
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X Y31
Y30 VCC55
o
Y29 VCC56
Y28
Y27
VCC57
VCC58 VCCPLL:1.2A B6 H23
VCC59 +1.8V VCCPLL1 VCCSA_SENSE VCCSA_VCCSSENSE {44}
MISC
Y26 A6
V35 VCC60 A2 VCCPLL2
VCC61 VCCPLL3
SVID
V34 AJ29 +
y
H_CPU_SVIDALRT#
C146 C121 C156 C565 V33 VCC62 VIDALERT# AJ30 H_CPU_SVIDCLK C200 C201 C202 C615 C22
VCC63 VIDSCLK FC_C22 VCCSA_VID0 {44}
39P/50V_4N 39P/50V_4N 10U/6.3V_6X 10U/6.3V_6X V32 AJ28 H_CPU_SVIDDAT *10U/6.3V_6X 1U/6.3V_4X 1U/6.3V_4X *330U/2V_7343P_E9c C24 VCCSA_VID1 {44}
V31 VCC64 VIDSOUT VCCSA_VID1
V30 VCC65
VCC66
a
V29
V28 VCC67 ACA-ZIF-069-K01
V27 VCC68
V26 VCC69
U35 VCC70
U34 VCC71
U33 VCC72
VCC73
L
U32
C158 C552 C557 C550 C159 C131 U31 VCC74
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X U30 VCC75 +VCCSA +VTT
U29 VCC76
U28 VCC77 H_CPU_SVIDCLK R100 0_4
VCC78 VR_SVID_CLK {45}
U27 70@0.01_3720
B
U26 VCC79 B
VCC80 PR257
R35 +VTT
R34 VCC81
n
R33 VCC82 1 2
R32 VCC83
R31 VCC84 R103
R30 VCC85
R29 VCC86 130/F_4
VCC87
u
SENSE LINES
R28 R507 100_4 +VCC_CORE

R27 VCC88 AJ35
R26 VCC89 VCC_SENSE AJ34
VCC_SENSE {45}
H_CPU_SVIDDAT R102 *SHORT_4
B2A
VCC90 VSS_SENSE VSS_SENSE {45} VR_SVID_DATA {45}
P35 R506 100_4
P34 VCC91
P33 VCC92 R520 10_4 +VTT
VCC93 +VTT
P32 B10 VCCP_SENSE {43}
P31 VCC94 VCCIO_SENSE A10
VCC95 VSSIO_SENSE VSSP_SENSE {43}
Y
P30 R519 10_4
P29 VCC96 R99
P28 VCC97
P27 VCC98 75/F_4
P26 VCC99
VCC100 H_CPU_SVIDALRT# R98 43_4
g
VR_SVID_ALERT# {45}
n
ACA-ZIF-069-K01
i a A
r X Quanta Computer Inc.

PROJECT : BD5
o
A1A
Ivy Bridge 3/4
5 4 3 2 1
F
5 4 3 2 1
U18H
Ivy Bridge Processor (GND) <CPU>
U18I
Ivy Bridge Processor (RESERVED, CFG) <CPU> 06
AT35 AJ22
AT32 VSS1 VSS81 AJ19
AT29 VSS2 VSS82 AJ16 T35 F22
AT27 VSS3 VSS83 AJ13 T34 VSS161 VSS234 F19
e
AT25 VSS4 VSS84 AJ10 T33 VSS162 VSS235 E30 U18E
AT22 VSS5 VSS85 AJ7 T32 VSS163 VSS236 E27
AT19 VSS6 VSS86 AJ4 T31 VSS164 VSS237 E24
AT16 VSS7 VSS87 AJ3 T30 VSS165 VSS238 E21 L7
s
AT13 VSS8 VSS88 AJ2 T29 VSS166 VSS239 E18 RSVD28 AG7
D
AT10 VSS9 VSS89 AJ1 T28 VSS167 VSS240 E15 CFG0 AK28 RSVD29 AE7 D
VSS10 VSS90 VSS168 VSS241 TP2 CFG[0] RSVD30
AT7 AH35 T27 E13 CFG1 AK29 AK2
VSS11 VSS91 VSS169 VSS242 TP3 CFG[1] RSVD31
AT4 AH34 T26 E10 CFG2 AL26 W8
AT3 VSS12 VSS92 AH32 P9 VSS170 VSS243 E9 CFG3 AL27 CFG[2] RSVD32
VSS13 VSS93 VSS171 VSS244 TP1 CFG[3]
AR25 AH30 P8 E8 CFG4 AK26
AR22 VSS14 VSS94 AH29 P6 VSS172 VSS245 E7 CFG5 AL29 CFG[4] AT26
AR19 VSS15 VSS95 AH28 P5 VSS173 VSS246 E6 AL30 CFG[5] RSVD33 AM33
U
CFG6
AR16 VSS16 VSS96 AH26 P3 VSS174 VSS247 E5 CFG7 AM31 CFG[6] RSVD34 AJ27
AR13 VSS17 VSS97 AH25 P2 VSS175 VSS248 E4 AM32 CFG[7] RSVD35
AR10 VSS18 VSS98 AH22 N35 VSS176 VSS249 E3 AM30 CFG[8]
AR2 VSS21 VSS101 AH7 N32 VSS179 VSS252 D35 AN28 CFG[11]
AP34 VSS22 VSS102 AH4 N31 VSS180 VSS253 D32 AN31 CFG[12] T8
e
AP31 VSS23 VSS103 AG9 N30 VSS181 VSS254 D29 AN26 CFG[13] RSVD37 J16
AP28 VSS24 VSS104 AG8 N29 VSS182 VSS255 D26 AM27 CFG[14] RSVD38 H16
AP25 VSS25 VSS105 AG4 N28 VSS183 VSS256 D20 AK31 CFG[15] RSVD39 G16
AP22 VSS26 VSS106 AF6 N27 VSS184 VSS257 D17 AN29 CFG[16] RSVD40
s
AP19 VSS27 VSS107 AF5 N26 VSS185 VSS258 C34 CFG[17]
AP16 VSS28 VSS108 AF3 M34 VSS186 VSS259 C31
AP13 VSS29 VSS109 AF2 L33 VSS187 VSS260 C28
AP10 VSS30 VSS110 AE35 L30 VSS188 VSS261 C27 AR35
AP7 VSS31 VSS111 AE34 L27 VSS189 VSS262 C25 AJ31 RSVD41 AT34
VSS32 VSS112 VSS190 VSS263 VAXG_VAL_SENSE RSVD42
u
AP4 AE33 L9 C23 AH31 AT33
AP1 VSS33 VSS113 AE32 L8 VSS191 VSS264 C10 AJ33 VSSAXG_VAL_SENSE RSVD43 AP35
AN30 VSS34 VSS114 AE31 L6 VSS192 VSS265 C1 AH33 VCC_VAL_SENSE RSVD44 AR34
AN27 VSS35 VSS115 AE30 L5 VSS193 VSS266 B22 VSS_VAL_SENSE RSVD45
AN25 VSS36 VSS116 AE29 L4 VSS194 VSS267 B19
AN22 VSS37
VSS VSS117 AE28 L3 VSS195
VSS VSS268 B17 AJ26
o
VSS38 VSS118 VSS196 VSS269 RSVD5
RESERVED
AN19 AE27 L2 B15
AN16 VSS39 VSS119 AE26 L1 VSS197 VSS270 B13
AN13 VSS40 VSS120 AE9 K35 VSS198 VSS271 B11 B34
AN10 VSS41 VSS121 AD7 K32 VSS199 VSS272 B9 SMDDR_VREF_DQ0_M3_R B4 RSVD46 A33
AN7 VSS42 VSS122 AC9 K29 VSS200 VSS273 B8 SMDDR_VREF_DQ1_M3_R D1 RSVD6 RSVD47 A34
AN4 VSS43 VSS123 AC8 K26 VSS201 VSS274 B7 RSVD7 RSVD48 B35
AM29 VSS44 VSS124 AC6 J34 VSS202 VSS275 B5 RSVD49 C35
VSS45 VSS125 VSS203 VSS276 RSVD50
H
AM25 AC5 J31 B3
AM22 VSS46 VSS126 AC3 H33 VSS204 VSS277 B2 F25
AM19 VSS47 VSS127 AC2 H30 VSS205 VSS278 A35 F24 RSVD8
AM16 VSS48 VSS128 AB35 H27 VSS206 VSS279 A32 F23 RSVD9
C C
AM13 VSS49 VSS129 AB34 H24 VSS207 VSS280 A29 D24 RSVD10 AJ32
AM10 VSS50 VSS130 AB33 H21 VSS208 VSS281 A26 G25 RSVD11 RSVD51 AK32
t
AM7 VSS51 VSS131 AB32 H18 VSS209 VSS282 A23 G24 RSVD12 RSVD52
AM4 VSS52 VSS132 AB31 H15 VSS210 VSS283 A20 E23 RSVD13
AM3 VSS53 VSS133 AB30 H13 VSS211 VSS284 A3 D23 RSVD14
AM2 VSS54 VSS134 AB29 H10 VSS212 VSS285 C30 RSVD15 AH27
AM1 VSS55 VSS135 AB28 H9 VSS213 A31 RSVD16 VCC_DIE_SENSE
VSS56 VSS136 VSS214 RSVD17
u
AL34 AB27 H8 B30
AL31 VSS57 VSS137 AB26 H7 VSS215 +3V B29 RSVD18
AL28 VSS58 VSS138 Y9 H6 VSS216 D30 RSVD19 AN35 CLK_XDP_ITPP TP56
AL25 VSS59 VSS139 Y8 H5 VSS217 B31 RSVD20 RSVD54 AM35 CLK_XDP_ITPN TP57
AL22 VSS60 VSS140 Y6 H4 VSS218 A30 RSVD21 RSVD55
AL19 VSS61 VSS141 Y5 H3 VSS219 R524 C29 RSVD22
o
AL16 VSS62 VSS142 Y3 H2 VSS220 RSVD23
AL13 VSS63 VSS143 Y2 H1 VSS221 *10K_4
AL10 VSS64 VSS144 W35 G35 VSS222 J20
AL7 VSS65 VSS145 W34 G32 VSS223 B18 RSVD24 AT2
AL4 VSS66 VSS146 W33 G29 VSS224 A19 RSVD25 RSVD56 AT1
y
AL2 VSS67 VSS147 W32 G26 VSS225 VCCIO_SEL RSVD57 AR1
AK33 VSS68 VSS148 W31 G23 VSS226 RSVD58
AK30 VSS69 VSS149 W30 G20 VSS227 J15
AK27 VSS70 VSS150 W29 G17 VSS228 RSVD27
AK25 VSS71 VSS151 W28 G11 VSS229
a
AK22 VSS72 VSS152 W27 F34 VSS230 B1
AK19 VSS73 VSS153 W26 F31 VSS231 KEY
AK16 VSS74 VSS154 U9 F29 VSS232
AK13 VSS75 VSS155 U8 VSS233
AK10 VSS76 VSS156 U6
AK7 VSS77 VSS157 U5
VSS78 VSS158
L
AK4 U3
AJ25 VSS79 VSS159 U2 ACA-ZIF-069-K01
VSS80 VSS160
ACA-ZIF-069-K01 ACA-ZIF-069-K01
n
B B
u
Processor Strapping CPU/VGA DDR3 VREF DQ (M3) S3P
R142 NM3@0_4
The CFG signals have a default value of '1' if not terminated on the board.
Y
SMDDR_VREF_DQ0_M3_R 1 3 +SMDDR_VREF_DQ0_M3 {14}
Q19
R145 *M3@ME2N7002E_200MA
Pin Name Configuration
2
g
*M3@1K_4
CFG2 1=Normal Operation
(PEG Static Lane Reversal --> 16 Lane) CFG2 R64 *EV@1K_4
0=Lane Reversed
DRAMRST_CNTRL
n
{27} DRAMRST_CNTRL
CFG3
(Reserved)
a
R141 NM3@0_4
i
CFG4 1=Disable; No physical DP attached to eDP CFG4 R54 PIVEDP@1K_4
(DP Presence Strap) SMDDR_VREF_DQ1_M3_R 1 3
0=Enable; An ext DP device is connected to eDP +SMDDR_VREF_DQ1_M3 {15}
Q20
R144 *M3@ME2N7002E_200MA
2
CFG5 00=x8,x4,x4 - Device 1 function 1 and 2 enable R89 EV@1K_4 *M3@1K_4
CFG5
CFG6 01=Reserved - (Device 1 function 1 disable ; function 2 enable)
X
(PCIE Bifurction) 10=x8,x8 -Device 1 function 1 enable ; function 2 enable
A 11=(Default) x16 -Device 1 function 1 and 2 disable CFG6 R90 *EV@1K_4 A
B2A DRAMRST_CNTRL
r
CFG7 1=PEG train immediately following xxRESETB de assertion CFG7 R79 *1K_4
B2A
(PEG Defer Training)
0=PEG wait for BIOS training
Fo 4 3 2
Size
Date:
Document Number
PROJECT : BD5
Ivy Bridge 4/4
Wednesday, January 16, 2013
1
Sheet 6 of 50
Rev
A1A
07
s e
e U
u s
Ho
ut
y o
L a
un
gY
i a n
r X
o
F
A1A
Thames_M2/ GND
5 4 3 2 1
08
<CLG>
Panther Point (DMI,FDI,PM) Panther Point (LVDS,DDI) <CLG/UGA/HMG>
U26C
U26D
e
{3} DMI_RXN0 BC24 BJ14
DMI0RXN FDI_RXN0 FDI_TXN0 {3}
{3} DMI_RXN1 BE20 AY14 J47 AP43
DMI1RXN FDI_RXN1 FDI_TXN1 {3} {29} LVDS_BRIGHT_I L_BKLTEN SDVO_TVCLKINN
{3} DMI_RXN2 BG18 BE14 M45 AP45
DMI2RXN FDI_RXN2 FDI_TXN2 {3} {29} INT_LVDS_DIGON L_VDD_EN SDVO_TVCLKINP
BG20 BH13
s
{3} DMI_RXN3 DMI3RXN FDI_RXN3 FDI_TXN3 {3}
BC12 P45 AM42
D FDI_RXN4 FDI_TXN4 {3} {29} INT_LVDS_PWM L_BKLTCTL SDVO_STALLN D
{3} DMI_RXP0 BE24 BJ12 AM40
DMI0RXP FDI_RXN5 FDI_TXN5 {3} SDVO_STALLP
{3} DMI_RXP1 BC20 BG10 T40
DMI1RXP FDI_RXN6 FDI_TXN6 {3} {29} INT_LVDS_EDIDCLK L_DDC_CLK
{3} DMI_RXP2 BJ18 BG9 K47 AP39
DMI2RXP FDI_RXN7 FDI_TXN7 {3} {29} INT_LVDS_EDIDDATA L_DDC_DATA SDVO_INTN
{3} DMI_RXP3
BJ20 AP40
DMI3RXP BG14 R699 PIVLDS@2.2K_4 L_CTRL_CLK T45 SDVO_INTP
FDI_RXP0 FDI_TXP0 {3} +3V L_CTRL_CLK
{3} DMI_TXN0 AW24 BB14 R323 PIVLDS@2.2K_4 L_CTRL_DATA P39
DMI0TXN FDI_RXP1 FDI_TXP1 {3} L_CTRL_DATA
AW20 BF14
U
{3} DMI_TXN1 DMI1TXN FDI_RXP2 FDI_TXP2 {3}
{3} DMI_TXN2 BB18 BG13 R305 PIVLDS@2.37K/F_4 LVD_IBG AF37 P38
DMI2TXN FDI_RXP3 FDI_TXP3 {3} LVD_IBG SDVO_CTRLCLK HDMI_DDCCLK {28}
{3} DMI_TXN3
AV18 BE12 T3
AF36 M39
DMI
FDI
DMI3TXN FDI_RXP4 FDI_TXP4 {3} LVD_VBG SDVO_CTRLDATA HDMI_DDCDATA {28}
BG12
FDI_RXP5 FDI_TXP5 {3}
{3} DMI_TXP0 AY24 BJ10 AE48
DMI0TXP FDI_RXP6 FDI_TXP6 {3} LVD_VREFH
{3} DMI_TXP1
AY20 BH9 AE47 AT49
DMI1TXP FDI_RXP7 FDI_TXP7 {3} LVD_VREFL DDPB_AUXN
{3} DMI_TXP2 AY18 AT47
AU18 DMI2TXP DDPB_AUXP AT40
e
{3} DMI_TXP3 DMI3TXP DDPB_HPD HDMI_CON_HP_PCH {28}
AW16 INT_TXLCLKOUT- AK39
LVDS
FDI_INT FDI_INT {3} {29} INT_TXLCLKOUT- LVDSA_CLK#
INT_TXLCLKOUT+ AK40 AV42
{29} INT_TXLCLKOUT+ LVDSA_CLK DDPB_0N IV_HDMITX2# {28}
BJ24 AV12 AV40
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 {3} DDPB_0P IV_HDMITX2 {28}
INT_TXLOUT0- AN48 AV45
{29} INT_TXLOUT0- IV_HDMITX1# {28}
s
R656 49.9/F_4 DMI_COMP BG25 BC10 INT_TXLOUT1- AM47 LVDSA_DATA#0 DDPB_1N AV46
+1.05V
Digital Display Interface

DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 {3} {29} INT_TXLOUT1- LVDSA_DATA#1 DDPB_1P IV_HDMITX1 {28}
INT_TXLOUT2- AK47 AU48
{29} INT_TXLOUT2- LVDSA_DATA#2 DDPB_2N IV_HDMITX0# {28}
R655 750/F_4 DMI2RBIAS BH21 AV14 TP66 AJ48 AU47
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 {3} LVDSA_DATA#3 DDPB_2P IV_HDMITX0 {28}
AV47
DDPB_3N IV_HDMICLK# {28}
BB10 INT_TXLOUT0+ AN47 AV49
FDI_LSYNC1 FDI_LSYNC1 {3} {29} INT_TXLOUT0+ LVDSA_DATA0 DDPB_3P IV_HDMICLK {28}
u
INT_TXLOUT1+ AM49
{29} INT_TXLOUT1+ LVDSA_DATA1
INT_TXLOUT2+ AK49
{29} INT_TXLOUT2+ LVDSA_DATA2
TP67 AJ47 P46
A18 LVDSA_DATA3 DDPC_CTRLCLK P42
DSWVRMEN DSWVREN {9} DDPC_CTRLDATA
System Power Management

INT_TXUCLKOUT- AF40
o
{29} INT_TXUCLKOUT- LVDSB_CLK#
SUSACK#_R C12 E22 DPWROK_R INT_TXUCLKOUT+ AF39 AP47
SUSACK# DPWROK {29} INT_TXUCLKOUT+ LVDSB_CLK DDPC_AUXN AP49
INT_TXUOUT0- AH45 DDPC_AUXP AT38
{29} INT_TXUOUT0- LVDSB_DATA#0 DDPC_HPD
{3} XDP_DBRST# R696 E@0_4 XDP_DBRST#_R K3 B9 PCIE_WAKE# PCIE_WAKE# {30,35} INT_TXUOUT1- AH47
SYS_RESET# WAKE# {29} INT_TXUOUT1- LVDSB_DATA#1
C711 *E@0.1U/25V_4X INT_TXUOUT2- AF49 AY47
{29} INT_TXUOUT2- LVDSB_DATA#2 DDPC_0N
TP25 AF45 AY49
SYS_PWROK_R P12 N3 CLKRUN# LVDSB_DATA#3 DDPC_0P AY43
SYS_PWROK +3V CLKRUN# / GPIO32 CLKRUN# {37} DDPC_1N
H
C698 *E@0.1U/25V_4X INT_TXUOUT0+ AH43 AY45
{29} INT_TXUOUT0+ LVDSB_DATA0 DDPC_1P
INT_TXUOUT1+ AH49 BA47
{29} INT_TXUOUT1+ LVDSB_DATA1 DDPC_2N
MPWROK R399 0_4 EC_PWROK_R L22 +3V_S5 G8 SUS_STAT# T4 INT_TXUOUT2+ AF47 BA48
PWROK SUS_STAT# / GPIO61 {29} INT_TXUOUT2+ LVDSB_DATA2 DDPC_2P
C TP24 AF43 BB47 C
LVDSB_DATA3 DDPC_3N BB49
C450 *E@0.1U/25V_4X L10 N14 DDPC_3P
+3V_S5 SUSCLK {37}
t
APWROK SUSCLK / GPIO62
INT_CRT_BLU N48 M43
{29} INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK
{27} PM_DRAM_PWRGD PM_DRAM_PWRGD B13 +3V_S5 D10 SLP_S5# T6 INT_CRT_GRN P49 M36
DRAMPWROK SLP_S5# / GPIO63 {29} INT_CRT_GRN CRT_GREEN DDPD_CTRLDATA
INT_CRT_RED T49
{29} INT_CRT_RED CRT_RED
C710 *E@0.1U/25V_4X
u
{37} RSMRST# RSMRST# C21 H4 SUSC# {37} AT45
CRT
RSMRST# SLP_S4# INT_CRT_DDCCLK T39 DDPD_AUXN AT43
{29} INT_CRT_DDCCLK
INT_CRT_DDCDAT M40 CRT_DDC_CLK DDPD_AUXP BH41
1 -- LVDS ENABLE
{29} INT_CRT_DDCDAT CRT_DDC_DATA DDPD_HPD
SUS_PWR_ACK_R K16 F4
SUSWARN#/SUSPWRDNACK/GPIO30 +3V_S5
SLP_S3# SUSB# {37}
BB43
L_DDC_DATA
R706 PICRT@33_4 INT_HSYNC_R M47 DDPD_0N BB45
o
E20 G10 SLP_A#
{29} INT_HSYNC
R702 PICRT@33_4 INT_VSYNC_R M49 CRT_HSYNC DDPD_0P BF44
0 -- LVDS DISABLE
{37} DNBSWON# PWRBTN# SLP_A# T5 {29} INT_VSYNC CRT_VSYNC DDPD_1N BE44
DDPD_1P BF42
AC_PRESENT_R H20 G16 SLP_SUS#_R DAC_IREF T43 DDPD_2N BE42
ACPRESENT / GPIO31 DSW SLP_SUS# DAC_IREF DDPD_2P 1 -- PORT B Detected
T42 BJ42
y
CRT_IRTN DDPD_3N BG42
DDPD_3P SDVO_CTRLDATA
PM_BATLOW# E10 AP14 R328
BATLOW# / GPIO72 +3V_S5 PMSYNCH PM_SYNC {3}
1K/D_4 CougarPoint_R1P0
0 -- PORT B Disable
PM_RI# A10 +3V_S5 K14 GPIO29
a
RI# SLP_LAN# / GPIO29
CougarPoint_R1P0 CRT IMPEDANCE MATCHING <CLG>
L
R693 PICRT@150/F_4 INT_CRT_BLU
R690 PICRT@150/F_4 INT_CRT_GRN
R685 PICRT@150/F_4 INT_CRT_RED
n
B B
u
PCH Pull-high/low <CLG> System PWR_OK <CLG> Deep Sx <CLG>
CLKRUN#
XDP_DBRST#_R
R692
R697
8.2K_4
1K_4
+3V
gY R751 *SHORT_4 AC_PRESENT_R

Co-Lay
R762
R427
R426
R417
NDS3@10K_4
NS3@10K_4
DS3@10K_4
DS3@0_4
+3V_S5
+3V_S5
+VCCPDSW
n
AC_PRESENT {37}
+V3A
Net Name Deep Sx Support Deep Sx No Support
PM_RI# R735 10K_4 +V3A
Reserve for DS3
a
AC_PRESENT V NA
B2A SUSACK#_R R736 DS3@0_4 SUSACK# {37}
i
SUS_PWR_ACK V NA
PCIE_WAKE# R715 10K_4 R763 *DS3@0_4 R377 0_4 SUS_PWR_ACK {37}
C716
GPIO29 R395 10K_4 *0.1U/10V_4X SUS_PWR_ACK_R SUSACK#_R V V
B2A
5
DPWROK V NA
+VCCPDSW 2
DELAY_VR_PWRGOOD {3,45} Co-Lay
X
{27} SYS_PWROK_R SYS_PWROK_R 4
1 MPWROK MPWROK {37,45} R764 NDS3@0_4 C713 *E@0.1U/25V_4X SLP_SUS V NA
A PM_BATLOW# R369 8.2K_4 A
SUS_PWR_ACK_R R397 10K_4 U29 *TC7SH08FU(F) R724 NS3@0_4 Rf RSMRST#
3
PM_DRAM_PWRGD R720 S3@200/F_4

R738 DPWROK_R R380 DS3@0_4 SYS_HWPG {37,41}
r
*100K_4
RSMRST# R725 10K_4

B2A
SLP_SUS#_R R376 DS3@0_4 SLP_SUS# {12,37}
SYS_PWROK_R R422 100K_4
o
LVDS_BRIGHT_I R339 *PIV@100K_4
B2A
PROJECT : BD5
F
1A
Panther Point 1/6
5 4 3 2 1
5 4 3 2 1
RTC Circuitry <RTC>

09
+3V_RTC
B2A
D14 *RB500V-40_100MA R432 20K_4 RTC_RST#
Panther Point (HDA,JTAG,SATA) <CLG>
+3VPCU
C715 15P/50V_4C
C481 G3
2
1
D11
BAT54C-7-F_200MA 1U/6.3V_4X U26A
*SHORT_ PAD1 Y4 R710
32.768KHZ_10 10M_4 RTC_X1 A20 C38 LAD0 {30,37}
RTCX1 FWH0 / LAD0 A38
e
LAD1 {30,37}
3
4
FWH1 / LAD1
LPC
C714 15P/50V_4C RTC_X2 C20 B37 LAD2 {30,37}
RTCX2 FWH2 / LAD2 C37
+R_3VRTC D12 *RB500V-40_100MA R433 20K_4
B2A SRTC_RST# RTC_RST# D20 FWH3 / LAD3 LAD3 {30,37}
RTCRST# D36
s
+R_3VRTC_R FWH4 / LFRAME# LFRAME# {30,37}
C466 C482 G1 SRTC_RST# G22
R443 SRTCRST# E36 PCH_DRQ#0
LDRQ0# TP35
K22 K36
RTC
1U/6.3V_4X 1U/6.3V_4X +3V_RTC R378 1M_4 SM_INTRUDER# +3V BOARD_ID17
D INTRUDER# LDRQ1# / GPIO23 BOARD_ID17 {11} D
1K_4 *SHORT_ PAD1
PCH_INVRMEN C17 V5 SERIRQ SERIRQ {37}
INTVRMEN SERIRQ
B2A
AM3
U
SATA0RXN SATA_RXN_1ST_HDD# {33}
1
CN13 ACZ_BITCLK_R N34 AM1

HDA_BCLK SATA0RXP SATA_RXP_1ST_HDD {33}
AP7
SATA 6G
SATA0TXN SATA_TXN_1ST_HDD# {33} SATA HDD/SSD
ACZ_SYNC_R L34 AP5
HDA_SYNC SATA0TXP SATA_TXP_1ST_HDD {33}
PCBEEP T10 AM10
{34} PCBEEP SPKR SATA1RXN AM8
AAA-BAT-054-K01 ACZ_RST#_R K34 SATA1RXP AP11 HM70 don't support SATA1
e
2
HDA_RST# SATA1TXN AP10

SATA1TXP
ACZ_SDIN0_AUDIO E34 AD7 SATA2RXN TP22
HDA_SDIN0 SATA2RXN AD5 SATA2RXP TP23
s
G34 SATA2RXP AH5 SATA2TXN
HDA_SDIN1 SATA2TXN TP21
AH4 SATA2TXP TP20
C34 SATA2TXP
PU & Password Clear <CLG> +3V HDA_SDIN2 AB8
IHDA
A34 SATA3RXN AB10
HDA_SDIN3 SATA3RXP
u
AF3 HM70 don't support SATA3
SATA3TXN AF1
+3V GPIO21 R307 10K_4 ACZ_SDOUT_R A36 SATA3TXP
HDA_SDO Y7
SATA
SATA4RXN SATA_RXN_ODD# {33}
G2 Y5
SATA4RXP SATA_RXP_ODD {33}
SERIRQ R318 8.2K_4 TP71 C36 +3V AD3 SATA ODD
o
HDA_DOCK_EN# / GPIO33 SATA4TXN SATA_TXN_ODD# {33}
GPIO19 R682 10K_4 *SHORT_ PAD AD1
SATA4TXP SATA_TXP_ODD {33}
{11} BOARD_ID16 BOARD_ID16 N32 +3V_S5
HDA_DOCK_RST# / GPIO13 Y3
SATA5RXN Y1
B2A SATA5RXP AB3
PCH_JTAG_TCK J3 SATA5TXN AB1
+5V JTAG_TCK SATA5TXP
HDA Bus <CLG>
H
PCH_JTAG_TMS H7 Y11
JTAG_TMS SATAICOMPO
JTAG
R424 PCH_JTAG_TDI K5 Y10 SATA_COMP R319 37.4/F_4 +1.05V
JTAG_TDI SATAICOMPI
C446 *33P/50V_4N *33K/F_4 TP70 PCH_JTAG_TDO H1
JTAG_TDO AB12
t
SATA3RCOMPO
C457
B2A AB13 SATA3_COMP R312 49.9/F_4
SATA3COMPI
C C
2
{34} BIT_CLK_AUDIO R362 33_4 ACZ_BITCLK_R *33P/50V_4N

PCH_SPI_CLK_R2 T3 AH1 SATA3_RBIAS R663 750/F_4
SPI_CLK SATA3RBIAS
u
{34} ACZ_SYNC_AUDIO R415 33_4 ACZ_SYNC_R1 ACZ_SYNC_R1 1 3 ACZ_SYNC_R
PCH_SPI_CS0#_R2 Y14
R363 33_4 ACZ_RST#_R Q36 SPI_CS0#
{34} ACZ_RST#_AUDIO
R423 *2N7002K_300MA PCH_SPI_CS1#_R2 T1
SPI_CS1#
SPI
{34} ACZ_SDOUT_AUDIO R727 33_4 ACZ_SDOUT_R P3 SATA_LED# R680 10K_4 +3V
*1M_4 R414 0_4 SATALED#
o
{34} ACZ_SDIN0_AUDIO ACZ_SDIN0_AUDIO PCH_SPI_SI_R2 V4 +3V V14 GPIO21
SPI_MOSI SATA0GP / GPIO21
PCH_SPI_SO_R2 U3 +3V P1 GPIO19
SPI_MISO SATA1GP / GPIO19
y
CougarPoint_R1P0
PCH JTAG Debug <CLG> +V3A
B2A
R348
*51_4
R341
*210/F_4
R340
*100/F_4
R350
*210/F_4
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TCK
R351
*100/F_4
PCH Strap Table
Pin Name
SPKR
GNT3# / GPIO55
Strap description
L a
No reboot mode setting
Top-Block Swap Override

Sampled
PWROK
PWROK
Configuration
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode
0 = "top-block swap" mode

1 = Default (weak pull-up 20K)
+3V R325
R352
*1K_4
*1K_4
PCBEEP
PCI_GNT3# {10}
n
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +3V_RTC R723 330K_4 PCH_INVRMEN
u
PCH Dual SPI <CLG> GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK GNT1# GPIO19 Boot Location
EC+BIOS @4M {37} PCH_SPI_CS0# R541
R540
33_4
33_4
PCH_SPI_CS0#_R2R
PCH_SPI_CLK_R2R
1 1 SPI * R695 *1K_4 GNT1# {10}
B {37} PCH_SPI_CLK B
{37} PCH_SPI_SO R538 33_4 PCH_SPI_SI_R2R GPIO19 Boot BIOS Selection 0 [bit-0] PWROK 0 0 LPC R681 *1K_4 GPIO19
{37} PCH_SPI_SI R539 33_4 PCH_SPI_SO_R2R
Y
0 = Override R728 *1K_4 ACZ_SDOUT_R
HDA_SDO Flash Descriptor Security RSMRST 1 = Default (weak pull-up 20K) +3V_S5 ACZ_SDOUT_R {37}
8M 18mA +V3A
U11
B2A
g
0 = Set to Vss R660 2.2K_4 +1.8V
PCH_SPI_CS0#_R2 R196 33_4 PCH_SPI_CS0#_R2R 1 8 DF_TVS DMI/FDI Termination voltage PWROK R661 1K_4
PCH_SPI_CLK_R2 R182 33_4 PCH_SPI_CLK_R2R 6 CE# VDD 1 = Set to Vcc (weak pull-down 20K) DF_TVS {11}
SCK H_SNB_IVB# {3}
PCH_SPI_SI_R2 R178 33_4 PCH_SPI_SI_R2R 5
PCH_SPI_SO_R2 R190 33_4 PCH_SPI_SO_R2R 2 SI 7 SPI_HOLD# R189 3.3K/F_4 R338 *10K_4
SO HOLD# 0 = Disable +V3A
GPIO28 On-die PLL Voltage Regulator RSMRST#
n
3 4 1 = Enable (Default) R337 *1K_4
C265 WP# VSS C271
B2A PLL_ODVR_EN {11}
*E@22P/50V_4N W25Q64FVSSIG 0 = Support by 1.8V (weak pull-down)
0.1U/16V_4Y HDA_SYNC On-Die PLL VR Voltage Select RSMRST +3V_S5 R418 1K_4 ACZ_SYNC_R
1 = Support by 1.5V
a
+V3A R185 3.3K/F_4 SPI_WP#
i
B2A INIT3_3V# Reserved PWROK 1 = Default (weak pull-up 20K) Should not pull low. leave as No Connect
ME@2M 2M +V3A
U10
18mA B2A GNT2#/ 1 = Default. Should not be pulled low
PCH_SPI_CS1#_R2 R195 *0_4 PCH_SPI_CS1#_R2R 1 8 GPIO53 ESI Strap (Server Only) PWROK for desktop and mobile Should not pull low for desktop and mobile
PCH_SPI_CLK_R2 R181 *33_4 PCH_SPI_CLK_R2R_R 6 CE# VDD
PCH_SPI_SI_R2 R177 *33_4 PCH_SPI_SI_R2R_R 5 SCK
SI 0 = Default. TLS no Confidentiality
X
PCH_SPI_SO_R2 R191 *33_4 PCH_SPI_SO_R2R_R 2 7 SPI_HOLD1# R192 *3.3K/F_4 GPIO15 TLS Confidentiality RSMRST +V3A R708 1K_4 GPIO15 {11}
SO HOLD# 1 = TLS Confidentiality
3 4
B2A
C269 WP# VSS C275
*E@22P/50V_4N *W25Q16BVSSIG
LVDS Detected 0 = Default. Not Detected 1= PU to 3V
*0.1U/16V_4Y
L_DDC_DATA PWROK 1 = Detected
r
+V3A R186 *3.3K/F_4 SPI_WP1# Port B Detected 0 = Default. Not Detected 1= PU to 3V
SDVO_CTRLDATA PWROK 1 = Detected
B2A
Port C Detected 0 = Default. Not Detected 0=NC
o
DDPC_CTRLDATA PWROK 1 = Detected
A A
Port D Detected 0 = Default. Not Detected 0=NC
DDPD_CTRLDATA PWROK 1 = Detected
F
SATA3GP/ Reserved
GPIO37 PWROK 0 = Default Should not be pulled high when strap is sampled
SATA2GP/ Reserved
GPIO36 PWROK 0 = Default Should not be pulled high when strap is sampled
Deep S4/S5 Well On -Die 0 = Disable DSWVREN {8}

DSWVRMEN Voltage Regulator Enable ALWAYS 1 = Enable
+3V_RTC R722 330K_4 R721 *330K_4 Quanta Computer Inc.
PROJECT : BD5
1A
Panther Point 2/6
5 4 3 2 1
5 4 3 2 1
Panther Point-M (PCI,USB,NVRAM) <CLG>

<CLG,U3B,MNW>
Panther Point-M (PCI-E,SMBUS,CLK)
U26B
10
BG34
U26E BJ34 PERN1 E12 SMBALERT#
PERP1 +3V_S5 SMBALERT# / GPIO11
AY7 AV32
RSVD1 AV7 AU32 PETN1 H14 SCLK
RSVD2 PETP1 SMBCLK SCLK {14,30}
BG26 AU3
BJ26 TP1 RSVD3 BG4 BE34 C9 SDATA DDR / PCIE Mini Card/LAN
e
TP2 RSVD4 PERN2 SMBDATA SDATA {14,30}
BH25 BF34
BJ16 TP3 AT10 BB32 PERP2
BG16 TP4 RSVD5 BC8 AY32 PETN2
SMBUS
AH38 TP5 RSVD6 PETP2 A12 DRAMRST_CNTRL_PCH
+3V_S5
s
TP6 SML0ALERT# / GPIO60 DRAMRST_CNTRL_PCH {27}
AH37 AU2 {30} PCIE_RXN_WLAN# BG36
AK43 TP7 RSVD7 AT4 BJ36 PERN3 C8 SMB_ME0_CLK
TP8 RSVD8 {30} PCIE_RXP_WLAN PERP3 SML0CLK
AK45 AT3 WLAN {30} PCIE_TXN_WLAN# C532 0.1U/10V_4X PCIE_TXN_WLAN#_C AV34
D C18 TP9 RSVD9 AT1 C533 0.1U/10V_4X PCIE_TXP_WLAN_C AU34 PETN3 G12 SMB_ME0_DAT D
TP10 RSVD10 {30} PCIE_TXP_WLAN PETP3 SML0DATA
N30 AY3
H3 TP11 RSVD11 AT5 BF36
TP12 RSVD12 {35} PCIE_RXN_LAN# PERN4
AH12 AV3 {35} PCIE_RXP_LAN BE36
AM4 TP13 RSVD13 AV1 AY34 PERP4 C13
U
LAN {35} PCIE_TXN_LAN# C379 LAN@0.1U/10V_4X PCIE_TXN_LAN#_C +3V_S5 SML1ALERT#_R
AM5 TP14 RSVD14 BB1 C378 LAN@0.1U/10V_4X PCIE_TXP_LAN_C BB34 PETN4 SML1ALERT# / PCHHOT# / GPIO74
TP15 RSVD15 {35} PCIE_TXP_LAN PETP4
Y13 BA3 +3V_S5 E14 SMB_ME1_CLK PCH Temp
PCI-E*
K24 TP16 RSVD16 BB5 BG37 SML1CLK / GPIO58
L24 TP17 RSVD17 BB3 BH37 PERN5 M16 SMB_ME1_DAT
TP18 RSVD18 PERP5 +3V_S5 SML1DATA / GPIO75
AB46 BB7 HM70 don't support PCIE-5 AY36
AB45 TP19 RSVD19 BE8 BB36 PETN5
RSVD
TP20 RSVD20 BD4 PETP5
e
RSVD21 BF6 BJ38
RSVD22 BG38 PERN6
Controller
B21 AV5 NV_ALE AU36 PERP6 M7
M20 TP21 RSVD23 AV10
TP18 HM70 don't support PCIE-6 AV36 PETN6 CL_CLK1
s
AY16 TP22 RSVD24 PETP6
Link
BG46 TP23 AT8 BG40 T11
HM70 don't support USB3-port3/4 TP24 RSVD25 BJ40 PERN7 CL_DATA1
AY5
HM70 don't support PCIE-7 AY40 PERP7
USB 3.0(R1) RSVD26 PETN7
USB 3.0(R2) BA2 BB40 P10
RSVD27 PETP7 CL_RST1#
u
{31} USB30_RXN1_R
BE28 USB30_RX1N
BC30 TP25 AT12 BE38
{31} USB30_RXN2_R TP26 USB30_RX2N RSVD28 PERN8
BE32 BF3 HM70 don't support PCIE-8 BC38
TP27 USB30_RX3N RSVD29 PERP8
BJ32 AW38
TP28 USB30_RX4N PETN8
USB30 Combo Port

BC28 USB30_RX1P AY38
{31} USB30_RXP1_R TP29 PETP8
BE30
o
{31} USB30_RXP2_R TP30 USB30_RX2P
BF32 +3V_S5 M10 CLK_PEGA_REQ# CLK_PEGA_REQ# {16}
TP31 USB30_RX3P PEG_A_CLKRQ# / GPIO47
BG32 C24 {35} CLK_PCIE_LAN# RP23 1 2 LAN@0X2 CLK_PCIE_LAN#_R Y40
TP32 USB30_RX4P USBP0N USB20#_R1 {31} CLKOUT_PCIE0N
{31} USB30_TXN1_R
AV26 USB30_TX1N A24 USB 2.0(R1) LAN {35} CLK_PCIE_LAN
3 4 CLK_PCIE_LAN_R Y39
TP33 USBP0P USB20_R1 {31} CLKOUT_PCIE0P
{31} USB30_TXN2_R BB26 USB30_TX2N C25 AB37 CLK_PCIE_VGAN_R R303 1 2 EV@0X2 CLK_PCIE_VGAN {16}
TP34 USBP1N USB20#_R2 {31} CLKOUT_PEG_A_N
CLOCKS
AU28 B25 USB 2.0(R2) {35} PCIE_CLK_LAN_REQ# PCIE_CLK_LAN_REQ# J2 +3V_S5 AB38 CLK_PCIE_VGAP_R 3 4 CLK_PCIE_VGAP {16}
TP35 USB30_TX3N USBP1P USB20_R2 {31} PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
AY30 C26
TP36 USB30_TX4N USBP2N USB20#_L1 {31}
{31} USB30_TXP1_R AU26 A26 USB 2.0(L1)
TP37 USB30_TX1P USBP2P USB20_L1 {31}
H
{31} USB30_TXP2_R
AY26 K28 USBP3N CLKOUT_PCIE1N AB49 AV22 CLK_CPU_BCLKN {3}
TP38 USB30_TX2P USBP3N USBP3N {38} T7 CLKOUT_PCIE1N CLKOUT_DMI_N
AV28 H28 USBP3P USB Touch EHCI1 CLKOUT_PCIE1P AB47 AU22 CLK_CPU_BCLKP {3}
TP39 USB30_TX3P USBP3P USBP3P {38} T8 CLKOUT_PCIE1P CLKOUT_DMI_P
AW30 E28
TP40 USB30_TX4P USBP4N D28 M1
PCIE_CLK_3G_REQ# +3V
USBP4P C28
B2A PCIECLKRQ1# / GPIO18 AM12 CLK_CPU_DPN_R R294 1 2 PIVEDP@0X2
USBP5N CLKOUT_DP_N CLK_CPU_DPN {3}
A28 、 USB5、
HM70 don't support USB4、、 USB6、
、 USB7 AM13 CLK_CPU_DPP_R 3 4 CLK_CPU_DPP {3}
t
USBP5P C29 AA48 CLKOUT_DP_P
USBP6N B29 AA47 CLKOUT_PCIE2N
PCI_PIRQA# K40 USBP6P N28 CLKOUT_PCIE2P BF18 CLK_BUF_PCIE_3GPLLN
PCI_PIRQB# K38 PIRQA# USBP7N M28 PCIECLKRQ2# V10 CLKIN_DMI_N BE18 CLK_BUF_PCIE_3GPLLP
C +3V C
PCI
PCI_PIRQC# H38 PIRQB# USBP7P L30 PCIECLKRQ2# / GPIO20 CLKIN_DMI_P

PIRQC# USBP8N USB_CARD# {36}
u
PCI_PIRQD# G38 K30 USB_CARD {36} CARD READER RP22
PIRQD# USBP8P G30 1 2 0X2 CLKOUT_PCIE3N Y37 BJ30 CLK_BUF_BCLKN
USBP9N USB20#_L2 {31} {30} CLK_PCIE_WLAN# CLKOUT_PCIE3N CLKIN_GND1_N
{16} DGPU_HOLD_RST# DGPU_HOLD_RST# C46 +3V E30 USB 2.0(L2) WLAN {30} CLK_PCIE_WLAN 3 4 CLKOUT_PCIE3P Y36 BG30 CLK_BUF_BCLKP
USB
REQ1# / GPIO50 USBP9P USB20_L2 {31} CLKOUT_PCIE3P CLKIN_GND1_P

{11,38} GPIO52 GPIO52 C44 +3V C30
REQ2# / GPIO52 USBP10N USB_WLAN# {30}
DGPU_PWR_EN E40 +3V A30 WLAN {30} PCIE_CLK_WLAN_REQ# PCIE_CLK_MINI_REQ# A8 +3V_S5
REQ3# / GPIO54 USBP10P USB_WLAN {30} PCIECLKRQ3# / GPIO25
L32 G24 CLK_BUF_DREFCLKN
o
USBP11N USB_CCD# {29} CLKIN_DOT_96N
{9} GNT1# GNT1# D47 +3V K32 CCD EHCI2 E24 CLK_BUF_DREFCLKP
GNT1# / GPIO51 USBP11P USB_CCD {29} CLKIN_DOT_96P
GNT2# E42 +3V G32 Y43
PCI_GNT3# F46 GNT2# / GPIO53 USBP12N E32 Y45 CLKOUT_PCIE4N
{9} PCI_GNT3# GNT3# / GPIO55 +3V USBP12P CLKOUT_PCIE4P
C32 、 USB13
HM70 don't support USB12、 AK7 CLK_BUF_DREFSSCLKN
USBP13N A32 PCIE_CLK_USB30_REQ# L12 CLKIN_SATA_N AK5 CLK_BUF_DREFSSCLKP
+3V_S5
y
ODD_MD# G42 USBP13P PCIECLKRQ4# / GPIO26 CLKIN_SATA_P
{33} ODD_MD# PIRQE# / GPIO2 +3V
{11} BOARD_ID14 G40 +3V
C42 PIRQF# / GPIO3 C33 USB_BIAS R726 22.6/F_4 V45 K45 CLK_PCH_14M
{11} BOARD_ID3 PIRQG# / GPIO4 +3V USBRBIAS# CLKOUT_PCIE5N REFCLK14IN
{11} BOARD_ID0
D44 +3V V46
PIRQH# / GPIO5 CLKOUT_PCIE5P
a
B33 GPIO44 L14 +3V_S5 H45 CLK_PCI_FB C704 12P/50V_4C
TP33 PCI_PME# K10 USBRBIAS PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK
PME# B2A
2
1
PCI_PLTRST# C6 +3V_S5 A14 USB_SC_OC#_R USB 2.0(R1) AB42 V47 XTAL25_IN
PLTRST# OC0# / GPIO59 K20 USB_OC1# AB40 CLKOUT_PEG_B_N XTAL25_IN V49 XTAL25_OUT R677 Y3
+3V_S5 OC1# / GPIO40 USB 2.0(R2) CLKOUT_PEG_B_P XTAL25_OUT
+3V_S5 B17 GPIO41 R754 0_4 USB_Normal_OC#_L_Q EHCI1 1M_4 25MHZ_30
OC2# / GPIO41
L
TP69 CLKOUT_PCI0 H49 +3V_S5 C16 GPIO42 S3_STRAP E6 +3V_S5
3
4
TP29 CLKOUT_PCI1 H43 CLKOUT_PCI0 OC3# / GPIO42 L16 USB_OC4# R752 0_4 USB_Normal_OC#_L_Q PEG_B_CLKRQ# / GPIO56 C708 12P/50V_4C
CLKOUT_PCI1 +3V_S5 OC4# / GPIO43 USB 2.0(L1)(L2)
CLK_PCI_FB R346 22_4 CLK_PCI_FB_R J48 +3V_S5 A16 USB30_SMI# Y47 XCLK_RCOMP R667 90.9/F_4
R365 NMP@22_4 PCLK_DEBUG_R K42 CLKOUT_PCI2
+3V_S5 OC5# / GPIO9 D14 GPIO10 V40 XCLK_RCOMP +1.05V B2A
{30} PCLK_DEBUG CLKOUT_PCI3 OC6# / GPIO10 EHCI2 CLKOUT_PCIE6N
R364 22_4 PCLK_591_R H40 +3V_S5 C14 SCI#_R V42
{37} PCLK_591 CLKOUT_PCI4 OC7# / GPIO14 B2A CLKOUT_PCIE6P
GPIO45 T13 +3V_S5
CougarPoint_R1P0 PCIECLKRQ6# / GPIO45
n
C447 C429 V38 +3V K43 CLK_FLEX0
TP27
FLEX CLOCKS
V37 CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
E@4.7P/50V_4C E@4.7P/50V_4C CLKOUT_PCIE7P F47 CLK_FLEX1
+3V CLKOUTFLEX1 / GPIO65 TP34
GPIO46 K12 +3V_S5
B2A {11} GPIO46 PCIECLKRQ7# / GPIO46
+3V H47 CLK_FLEX2
CLKOUTFLEX2 / GPIO66 TP32
AK14
u
CLKOUT_ITPXDP_N
T1 CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P AK13 +3V K49 CLK_FLEX3
T2 CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 TP68
CougarPoint_R1P0
B
PLTRST# <CLG,VGA> PCI/USBOC# Pull-up <CLG> +3V B
Y
+V3A
PCI_PIRQA#
PCI_PIRQB#
R709
R739
8.2K_4
8.2K_4
CLK_REQ/Strap Pin <CLG,VGA> SMBus/Pull-up <CLG>
+V3A R748
B2A PCI_PIRQC# R403 8.2K_4
B2A B2A 10 1 GPIO42 PCI_PIRQD# R402 8.2K_4
9 2
g
SCI#_R USB30_SMI#
USB_OC1# 8 3 GPIO41 DGPU_PWR_EN R404 10K_4
USB_OC4# 7 4 GPIO10 DGPU_HOLD_RST# R703 10K_4
C717 USB_SC_OC#_R 6 5 ODD_MD# R707 10K_4
*0.1U/10V_4X
10KX8 GNT2# R407 *10K_4 +V3A
n
5
+V3A +V3A
PCI_PLTRST# 2
B2A
4
B2A
PLTRST# {3,30,35,36,37,38}
1 R705 10K_4 PCIE_CLK_LAN_REQ#
2
Q55A DS3@2N7002KDW_115MA R714 10K_4 PCIE_CLK_MINI_REQ#
a
U28 R398 10K_4 PCIE_CLK_USB30_REQ# R756
3
*TC7SH08FU(F) R757 USB_SC_OC#_R 1 6 R368 10K_4 GPIO44 2.2K_4

USB_SC_OC# {31,37}
2
i
100K_4 R326 10K_4 GPIO45
R766 NDS3@0_4 {37} 2ND_MBCLK 6 1 SMB_ME1_CLK

R768 NS3@0_4 33MHz 27MHz 48/24MHz 14.318MHz 25MHz
+3V Q53A *2N7002KDW_115MA
R746 0_4 PCI_PLTRST#_R R745 EV@0_4 VGA_PLTRST# {16} Co-Lay R311 10K_4 PCIECLKRQ2# CLK_FLEX0
+V3A R694 10K_4 PCIE_CLK_3G_REQ# +V3A
B2A
X
+V3A CLK_FLEX1
B2A
5
Q55B DS3@2N7002KDW_115MA R355 NS3@10K_4 S3_STRAP

USB_OC1# 4 3 R356 S3@10K_4 R747 CLK_FLEX2
+3V USB_Normal_OC#_R {31,37}
2.2K_4
5
r
R755 NDS3@0_4 CLK_FLEX3
R769 NS3@0_4 +V3A 3 4 SMB_ME1_DAT
B2A {37} 2ND_MBDATA
R758 R353 10K_4 CLK_PEGA_REQ# Q53B *2N7002KDW_115MA
PX@1K_4
Co-Lay +V3A
o
R354 *10K_4
DGPU_PWR_EN_R +V3A
DGPU_PWR_EN_R {48} B2A
2
Q56A DS3@2N7002KDW_115MA
R370 10K_4 SMBALERT#
A A
USB_Normal_OC#_L_Q 1 6 CLK_BUF_DREFCLKN R345 10K_4 R737 10K_4 SML1ALERT#_R
F
USB_Normal_OC#_L {31,37}
3
CLK_BUF_DREFCLKP R344 10K_4

CLK_BUF_DREFSSCLKN R302 10K_4 R396 2.2K_4 SCLK
R770 NDS3@0_4 CLK_BUF_DREFSSCLKP R300 10K_4 R734 2.2K_4 SDATA
{20} DGPU_PWR_EN DGPU_PWR_EN 2 R772 NS3@0_4 CLK_BUF_BCLKN R657 10K_4 R713 2.2K_4 SMB_ME0_CLK
CLK_BUF_BCLKP R658 10K_4 R373 2.2K_4 SMB_ME0_DAT
Q54 CLK_BUF_PCIE_3GPLLN R290 10K_4
PX@ME2N7002E_200MA
Co-Lay CLK_BUF_PCIE_3GPLLP R291 10K_4 R719 1K_4 DRAMRST_CNTRL_PCH
+V3A
1
R718 *10K_4
CLK_PCH_14M R334 10K_4
5
Q56B DS3@2N7002KDW_115MA
SCI#_R 4 3
SCI# {37} Quanta Computer Inc.
R767 NDS3@0_4 PROJECT : BD5
R773 NS3@0_4
1A
Co-Lay B2A Panther Point 3/6
5 4 3 2 1
5 4 3 2 1
BOARD ID SETTING <CLG> 11

Board ID ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7 ID8 ID12 ID13 ID14 ID15 ID16 ID17
HM70 H
HM76 L
UMA SKU H
VGA SKU L
e
VRAM-1000MHz H
VRAM-900MHz L
Panther Point (GPIO,VSS_NCTF,RSVD) <CLG>
s
Standard H
D
ULV L D
17" H
14" L
U26F GV2 H
U
GL L
BOARD_ID4 T7 +3V +3V C40 PCH_ODD_EN PCH_ODD_EN {33}
BMBUSY# / GPIO0 TACH4 / GPIO68
W/ 4K2K H
BOARD_ID5 A42 +3V +3V B41 BOARD_ID13 W/O 4K2K L
TACH1 / GPIO1 TACH5 / GPIO69
BOARD_ID6 H36 +3V +3V C41 BOARD_ID11 W/ HDMI H
W/O HDMI L
BOARD_ID2 E38 +3V +3V A40 BOARD_ID12
e
W/ CRT H
GPIO8 C10 +3V_S5 W/O CRT L
GPIO8
Box_Vendor C4 +3V_S5 Only VGA H
s
LAN_PHY_PWR_CTRL / GPIO12
Optimus L
{9} GPIO15 GPIO15 G2 +3V_S5 P4 GATEA20 {37}
GPIO15 A20GATE
WIN7 H
AU16 WIN8 L
PECI TP19
{33} ODD_PRSNT# ODD_PRSNT# U2 +3V
SATA4GP / GPIO16
u
P5 RCIN# RCIN# {37} HM75_76 H
RCIN#
NM70 L
GPIO
{16,22,37} DGPU_PWROK D40 +3V AY11 H_PWRGOOD {3}
CPU/MISC
TACH0 / GPIO17 PROCPWRGD
EDP H
BOARD_ID10 T5 +3V AY10 PCH_THRMTRIP# R293 390_4 PM_THRMTRIP# {3} LVDS L
SCLOCK / GPIO22 THRMTRIP#
o
GPIO24 E8 T14 C383 *E@0.1U/25V_4X
GPIO24 / MEM_LED +3V_S5 INIT3_3V# TP26 Celeron H
I3/I5/I7 L
{37} GPIO27 GPIO27 E16 DSW AY1 DF_TVS {9}
GPIO27 DF_TVS
45W H
{9} PLL_ODVR_EN PLL_ODVR_EN P8 +3V_S5 35W L
GPIO28 AH8
BOARD_ID9 K1 TS_VSS1
STP_PCI# / GPIO34 +3V
H
AK11
BOARD_ID7 K4 TS_VSS2
GPIO35 +3V
AH10
GPIO36 V8 TS_VSS3 +3V +3V +3V +3V
SATA2GP / GPIO36 +3V
AK10
GPIO37 M5 TS_VSS4
+3V
t
SATA3GP / GPIO37
C BOARD_ID1 N2 +3V P37 R406 R686 R383 R744 C
SLOAD / GPIO38 NC_1
BOARD_ID8 M3 +3V 70@10K_4 IV@10K_4 1000M@10K_4 10K_4
SDATAOUT0 / GPIO39
DSW
u
BOARD_ID15 V13 +3V BG2 BOARD_ID0 BOARD_ID0 {10} BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID3 {10}
SDATAOUT1 / GPIO48 VSS_NCTF_15
TEMP_ALERT# V3 +3V BG48
B2A
{37} TEMP_ALERT# SATA5GP / GPIO49 VSS_NCTF_16
ID_Detect D6 +3V_S5 BH3 +VCCPDSW R385 R683 R382 R732
GPIO57 VSS_NCTF_17
o
BH47 R374 *10K_4 GPIO27 R375 10K_4 76@10K_4 EV@10K_4 900M@10K_4 *10K_4
VSS_NCTF_18 B2A
A4 BJ4
VSS_NCTF_1 VSS_NCTF_19
A44 BJ44
y
A45 BJ45
B2A +3V +3V +3V +3V +3V
VSS_NCTF_3 VSS_NCTF_21 +V3A
{10} GPIO46
NCTF
A46 BJ46
a
A5 BJ5 R372 *10K_4 R371 10K_4 R317 R743 R401 R704 R778
VSS_NCTF_5 VSS_NCTF_23 HM@10K_4 CRT@10K_4
10K_4 GV2@10K_4 *10K_4
A6 BJ6 R716 *10K_4 GPIO8 R717 10K_4
B3 C2 R360 10K_4 GPIO24 R361 *10K_4 BOARD_ID4 BOARD_ID5 BOARD_ID6 BOARD_ID7 BOARD_ID8
L
B47 C48
BD1 D1 R731 R381 R701 R691
GL@10K_4 10K_4
BD49 D49 NHM@10K_4 NCRT@10K_4
BE1 E1 GPIO Pull-up/Pull-down <CLG> B2A B2A
VSS_NCTF_11 VSS_NCTF_29 B2A
n
BE49 E49
VSS_NCTF_12 VSS_NCTF_30 +3V
BF1 F1 +3V +3V
BF49 F49 PCH_ODD_EN R740 10K_4
Description ID9 ID10
u
USB3.0*2 H
R700 R322 USB3.0*1&USB2.0*1 L
CougarPoint_R1P0 U3_2@10K_4 S&C@10K_4
B ODD_PRSNT# R679 10K_4 B
S&C H
TEMP_ALERT# R670 10K_4 Non S&C L
RCIN# R333 10K_4 BOARD_ID9 BOARD_ID10
GATEA20 R332 10K_4
Y
R698 R321
GPIO36 R310 10K_4 U2_2@10K_4 NS&C@10K_4
GPIO37 R347 10K_4
B2A C3A
n g +3V
R306
EDP@10K_4
+V3A
R780
70@10K_4
+3V
R782
45W@10K_4
a
BOARD_ID15 BOARD_ID16 BOARD_ID17
+3V
B2A B2A BOARD_ID16 {9} BOARD_ID17 {9}
+3V
i
+V3A +V3A R779 R781 R783
LDS@10K_4 76@10K_4 35W@10K_4
R749
10K_4 R358 R712 R733
Metal_IMR@10K_4 10K_4 10K_4 B2A
BOARD_ID11 BOARD_ID11 {34}
X
ID_Detect Box_Vendor Box_Vendor {34} GPIO52 GPIO52 {10,38}
+3V +3V +3V
C3A R357 R711
TEXTURE@10K_4 *10K_4
r
R741 R742 R405
OEV@10K_4
W7@10K_4 76@10K_4
GPIO52 BOARD_ID12 BOARD_ID13 BOARD_ID14 {10}

A A
o
W/O KB Backlight H
R729 R730 R384
W KB Backlight L PX@10K_4 W8@10K_4 NM70@10K_4

Box Vendor Board_ID11
F
GPIO12 GPIO70 GPIO57
L L ID_Detect Speaker Touch Pad KB Backlight
B2A
ONKYO L H 3.3V Metal(Y)
H Metal/IMR Box
Harman-Kardon H L (IDTP) IMR(X) Quanta Computer Inc.
Non-brand H H L TEXTURE Boxless 5V(NMTP) X PROJECT : BD5
1A
C3A Panther Point 4/6
5 4 3 2 1
5 4 3 2 1
+1.05V +1.05V_PCH_VCC
Panther POINT (POWER) <CLG>
+VCCA_DAC_1_2
+3V
+1.05V R313 *0_4

Panther Point-M (POWER) <CLG> +1.05V_VCCUSBCORE
R297 0_8
+1.05V
12
VccADAC =63mA
L16 FCM1608KF-102T01_100MA
U26G POWER
R662 0_6 C413
C436 C435 C433 C420 +VCCPDSW 1U/6.3V_4X
VccCORE =1.73A POWER
R308 0_1206 AA23 U48 0.01U/25V_4X 0.1U/10V_4X *10U/6.3V_8X 22U/6.3V_8X U26J
AC23 VCCCORE[1] VCCADAC B2A +V3A
e
VCCCORE[2]
CRT
AD21 +VCCACLK AD49 N26
C400 C405 C396 C700 AD23 VCCCORE[3] U47 +VCCALVDS +3V VCCACLK VCCIO[29] R388 0_6
VCCCORE[4] VSSADAC VCCSUS3_3 = 65mA
VCC CORE
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 10U/6.3V_6X AF21 VccALVDS=1mA VCCDSW3_3= 1mA P26
AF23 VCCCORE[5] R296 PIVLDS@0_4 R416 NDS3@0_4 +VCCPDSW T16 VCCIO[30]
VCCCORE[6] +3V_S5 VCCDSW3_3
s
AG21 P28 C410
D +1.05V +1.05V_PCH_VCCDPLL_EXP AG23 VCCCORE[7] R295 OEV@0_4 R796 NS3@0_4 VCCIO[31] 0.1U/10V_4X D
AG24 VCCCORE[8] AK36 R784 PIVEDP@0_4
Co-Lay +PCH_VCCDSW V12 T27
R301 0_6 AG26 VCCCORE[9] VCCALVDS B2A DCPSUSBYP VCCIO[32]
AG27 VCCCORE[10] AK37 +1.8V B2A C414 T29
AG29 VCCCORE[11] VSSALVDS +VCC_TX_LVDS 0.1U/10V_4X C416 +3V_SUS_CLKF33 T38 VCCIO[33] R387 0_6
+1.05V +1.05V_VCCAPLL_EXP AJ23 VCCCORE[12] +1.05V +VCCAPLL_CPY_PCH *0.1U/10V_4X VCC3_3[5]
VccTX_LVDS=40mA
LVDS
AJ26 VCCCORE[13] AM37 L14 PIVLDS@0.1uh_8_250MA T23 +3V_VCCPUSB
U
L33 *1uh_6_25MA AJ27 VCCCORE[14] VCCTX_LVDS[1] R288 OEV@0_4 L32 *10uh_8_100MA BH23 VCCSUS3_3[7] C425
AJ29 VCCCORE[15] AM38 C388 R785 PIVEDP@0_4 VCCAPLLDMI2 T24 0.1U/10V_4X
AJ31 VCCCORE[16] VCCTX_LVDS[2] C377 C376 R298 0_4 +VCCDPLL_CPY AL29 VCCSUS3_3[8]
C688 VCCCORE[17] AP36 PIVLDS@0.01U/25V_4X *PIVLDS@10U/6.3V_8X
Co-Lay C689
+1.05V VCCIO[14] V23
B2A
USB
*10U/6.3V_6X VCCTX_LVDS[3] PIVLDS@0.01U/25V_4X *10U/6.3V_6X VCCSUS3_3[9]
AP37 +VCCSUS1 AL24 V24 R331 0_6 +1.05V
AN19 VCCTX_LVDS[4] DCPSUS[3] VCCSUS3_3[10]
VCCIO[28] P24 +3V_VCCAUBG
e
+1.05V +1.05V_VCCIO C392 VCCSUS3_3[6] C412
BJ22 +3V_VCC_GIO +3V *1U/6.3V_4X AA19 *1U/6.3V_4X
R285 0_8 VCCAPLLEXP VCCASW[1] T26 +VCCAUPLL
V33 R343 0_6 +1.05V +1.05V_VCCEPW AA21 VCCIO[34]
VccIO =3.799 A VCC5REFSUS=1mA
HVCMOS
s
R281 0_1206 AN16 VCC3_3[6] VCCASW[2]
VCCIO[15] VccASW =0.803 A
VCCDMI = 47mA R314 0_1206 AA24 M26 +5V_PCH_VCC5REFSUS R419 10/F_4 +V5A
AN17 C418 VCCASW[3] V5REF_SUS
VCCIO[16]
Clock and Miscellaneous

C393 C390 C387 V34 0.1U/10V_4X +1.1V_VCC_DMI +VTT AA26 D10 RB500V-40_100MA
VCC3_3[7] VCCASW[4] +V3A
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X C408 C403 C406 AN23 +VCCA_USBSUS C460
DCPSUS[4]
u
AN21 R284 0_4 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X AA27 0.1U/10V_4X
VCCIO[17] VCCASW[5] AN24 +3V_VCCPSUS
AN26 AA29 VCCSUS3_3[1] C391
VCCIO[18] C375 VCCASW[6] *1U/6.3V_4X
AN27 AT16 +VCCAFDI_VRM +VCCAFDI_VRM 1U/6.3V_4X AA31 V5REF= 1mA
VCCIO[19] VCCVRM[3] VCCASW[7]
o
C385 C389 + C369 AP21 AC26 P34 +5V_PCH_VCC5REF R408 10/F_4 +5V
1U/6.3V_4X 10U/6.3V_6X *220U/2.5V_3528P_E35b VCCIO[20] C402 C409 + C401 VCCASW[8] V5REF
VCCCLKDMI = 75mA
AP23 AT20 10U/6.3V_8X 10U/6.3V_8X *220U/2.5V_3528P_E35b AC27 D9 RB500V-40_100MA +3V
VCCIO[21] VCCDMI[1] +VCC_DMI_CCI VCCASW[9] N20 C421
DMI
PCI/GPIO/LPC
AP24 +1.1V_VCC_DMI_CCI +1.05V AC29 VCCSUS3_3[2] 1U/6.3V_4X
VCCIO
VCCIO[22] VCCASW[10] N22
AP26 AB36 L15 *10uh_8_100MA R349 *1/F_4 AC31 VCCSUS3_3[3]
VCCIO[23] VCCCLKDMI VCCASW[11] P20 +3V_VCCPSUS R386 0_6
H
VCCSUS3_3[4] +V3A
AT24 R342 0_4 AD29
+3V +3V_VCC_EXP VCCIO[24] C427 C428 VCCASW[12] P22
C
VCCSUS3_3[5] VCCSUS3_3 = 65mA C
1U/6.3V_4X *10U/6.3V_6X AD31 C424
R649 0_8 AN33 VCCASW[13] 1U/6.3V_4X
VCCIO[25] W21 AA16
VCCASW[14] VCC3_3[1] Vcc3_3 =0.178 A
t
AN34 AG16
C692 VCCIO[26] VCCDFTERM[1] +VCCP_NAND +1.8V W23 W16 +3V_VCCPCORE R324 0_6
VccDFTERM = 2 mA VCCASW[15] VCC3_3[8] +3V
0.1U/10V_4X
BH29 AG17 R304 0_8 W24 T34
DFT / SPI
VCC3_3[3] VCCDFTERM[2] VCCASW[16] VCC3_3[4] +3V
C419
W26 0.1U/10V_4X
u
AJ16 C399 VCCASW[17] C434
VccVRM =0.147 A VCCDFTERM[3] 0.1U/10V_4X W29 0.1U/10V_4X Vcc3_3 =0.178 A
+VCCAFDI_VRM AP16 VCCASW[18]
+VCCAFDI_VRM VCCVRM[2] +1.05V
AJ17 W31 AJ2 +3V
VCCDFTERM[4] VCCASW[19] VCC3_3[2]
o
+1.05V R653 *0_4 +1.05V_VCCAPLL_FDI BG6 R292 0_6 W33
VccAFDIPLL VCCASW[20] AF13 C397
+3V_VCCME_SPI +V3A VCCIO[5] 0.1U/10V_4X
VCCSPI = 10mA
R286 0_6 +1.05V_VCCDPLL_FDI AP17 C382 C423 0.1U/10V_4X +VCCRTCEXT N16
VCCIO[27] DCPRTC
FDI
V1 R678 0_6 1U/6.3V_4X AH13 +V1.05S_SATA3 R664 0_8

VCCSPI B2A VCCIO[12] +1.05V
y
+1.1V_VCC_DMI AU20 +VCCAFDI_VRM +VCCAFDI_VRM Y49 AH14
VCCDMI[2] C705 R668 0_6 VCCVRM[4] VCCIO[13] C394
1U/6.3V_4X 1U/6.3V_4X
CougarPoint_R1P0 AF14
C702 BD47 VCCIO[6]
a
75mA +1.05V_VCCA_A_DPL
SATA
1U/6.3V_4X VCCADPLLA AK1 +V1.1LAN_VCCAPLL L36 *10uh_8_100MA
VCCAPLLSATA +1.05V
75mA +1.05V_VCCA_B_DPL BF47
VCCADPLLB C701
R299 0_6 AF11 +VCCAFDI_VRM *10U/6.3V_6X
+VCCDIFFCLK AF17 VCCVRM[1]
+VCCDIFFCLKN AF33 VCCIO[7]
VCCDIFFCLKN[1]
L
C386 AF34 AC16 +VCC_SATA R320 0_6 +1.05V
1U/6.3V_4X AG34 VCCDIFFCLKN[2] VCCIO[2]
+1.05V
VCCDIFFCLKN= 50mA VCCDIFFCLKN[3] AC17
VCCIO[3] C407
VCCSSC= 95mA VccVRM =0.147 A
R327 *0_6 +V1.05V_SSCVCC AG33 AD17 1U/6.3V_4X
VCCSSC VCCIO[4]
C417 C411 0.1U/10V_4X +VCCSST V16 +1.05V_VCCEPW

B DCPSST B
n
*1U/6.3V_4X
T17 T21
Internal PLL and VRMs Display PLL A/B Analog Power +VTT +V1.05M_VCCSUS V19 DCPSUS[1] VCCASW[22]
MISC
DCPSUS[2]
2mA
R654 0_4 +VTT_VCCPCPU V21
u
VCCASW[23]
CPU
BJ8
C687 C691 C690 V_PROC_IO T19
4.7U/6.3V_6X 0.1U/10V_4X *0.1U/10V_4X VCCASW[21]
+3V_RTC
VCCRTC<1mA VCCSUSHDA= 10mA
+1.05V L35 PIV@10uh_8_100MA +1.05V_VCCA_A_DPL
RTC
A22 P32 +V3.3A_1.5A_HDA_IO R400 0_4
HDA
VCCRTC VCCSUSHDA +V3A
B2A
Y
+1.5V +VCCAFDI_VRM + C695 C697 R659
*PIV@220U/2.5V_3528P_E35b 1U/6.3V_4X 0_6 C437 C438 C467 CougarPoint_R1P0 C452 C422
1U/6.3V_4X 0.1U/10V_4X *0.1U/10V_4X *1U/6.3V_4X 0.1U/10V_4X
R309 0_6
g
L34 OEV@0_8 +1.05V_VCCA_B_DPL
C404 + C682 C694

*10U/6.3V_6X *PIV@220U/2.5V_3528P_E35b 1U/6.3V_4X +3V_S5 Co-Lay +V3A +5V_S5 Co-Lay +V5A
n
B2A R786 NS3@0_6
B2A R787 NS3@0_6
R420 NDS3@0_6 R421 NDS3@0_6
a
1 3 1 3
i
C470 R434 Q38 DS3@ME1303_3A C469 R431 Q37 DS3@ME1303_3A
B2A B2A
2
*DS3@0.33U/6.3V_4X DS3@100K_4 *DS3@0.33U/6.3V_4X DS3@100K_4
A
Deep Sx power well Clock power on core well R429 R430 A
X
DS3@0_4 DS3@0_4
+3V
R366 *0_6
3
R379 1/F_4 L17 10uh_8_100MA +3V_SUS_CLKF33
r
{8,37} SLP_SUS# 2 5
+3VPCU +VCCPDSW Q40A Q39B
C439 C415
10U/6.3V_6X 1U/6.3V_4X DS3@2N7002KDW_115MA DS3@2N7002KDW_115MA
1
4
D13 DS3@RB500V-40_100MA
o
B2A
PROJECT :BD5
1A
Panther Point 5/6
F
5 4 3 2 1
5 4 3 2 1
13
U26I
AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
e
AY8 VSS[161] VSS[261] K39
B11 VSS[162] VSS[262] K46
B15 VSS[163] VSS[263] K7
Panther Point-M (GND) <CLG> B19 VSS[164] VSS[264] L18
s
B23 VSS[165] VSS[265] L2
D
B27 VSS[166] VSS[266] L20 D
B31 VSS[167] VSS[267] L26
B35 VSS[168] VSS[268] L28
B39 VSS[169] VSS[269] L36
B7 VSS[170] VSS[270] L48
U26H F45 VSS[171] VSS[271] M12
H5 BB12 VSS[172] VSS[272] P16
U
VSS[0] BB16 VSS[173] VSS[273] M18
AA17 AK38 BB20 VSS[174] VSS[274] M22
AA2 VSS[1] VSS[80] AK4 BB22 VSS[175] VSS[275] M24
AB11 VSS[5] VSS[84] AL16 BB38 VSS[179] VSS[279] M38
e
AB4 VSS[8] VSS[87] AL2 BC14 VSS[182] VSS[282] M46
AB43 VSS[9] VSS[88] AL21 BC18 VSS[183] VSS[283] M8
s
AB5 VSS[10] VSS[89] AL23 BC2 VSS[184] VSS[284] N18
AB7 VSS[11] VSS[90] AL26 BC22 VSS[185] VSS[285] P30
AC19 VSS[12] VSS[91] AL27 BC26 VSS[186] VSS[286] N47
AC2 VSS[13] VSS[92] AL31 BC32 VSS[187] VSS[287] P11
VSS[15] VSS[94] VSS[189] VSS[289]
u
AC24 AL34 BC36 T33
AC34 VSS[17] VSS[96] AM11 BC42 VSS[191] VSS[291] P43
AC48 VSS[18] VSS[97] AM14 BC48 VSS[192] VSS[292] P47
AD10 VSS[19] VSS[98] AM36 BD46 VSS[193] VSS[293] P7
AD11 VSS[20] VSS[99] AM39 BD5 VSS[194] VSS[294] R2
o
AD12 VSS[21] VSS[100] AM43 BE22 VSS[195] VSS[295] R48
AD13 VSS[22] VSS[101] AM45 BE26 VSS[196] VSS[296] T12
AD19 VSS[23] VSS[102] AM46 BE40 VSS[197] VSS[297] T31
AD24 VSS[24] VSS[103] AM7 BF10 VSS[198] VSS[298] T37
AD26 VSS[25] VSS[104] AN2 BF12 VSS[199] VSS[299] T4
AD27 VSS[26] VSS[105] AN29 BF16 VSS[200] VSS[300] W34
AD33 VSS[27] VSS[106] AN3 BF20 VSS[201] VSS[301] T46
VSS[28] VSS[107] VSS[202] VSS[302]
H
AD34 AN31 BF22 T47
AD36 VSS[29] VSS[108] AP12 BF24 VSS[203] VSS[303] T8
AD37 VSS[30] VSS[109] AP19 BF26 VSS[204] VSS[304] V11
C C
AD39 VSS[32] VSS[111] AP30 BD3 VSS[206] VSS[306] V26
t
AD45 VSS[37] VSS[116] AP46 BG17 VSS[211] VSS[311] V39
AD46 VSS[38] VSS[117] AP8 BG21 VSS[212] VSS[312] V43
VSS[39] VSS[118] VSS[213] VSS[313]
u
AD8 AR2 BG33 V7
AE2 VSS[40] VSS[119] AR48 BG44 VSS[214] VSS[314] W17
AE3 VSS[41] VSS[120] AT11 BG8 VSS[215] VSS[315] W19
AF10 VSS[42] VSS[121] AT13 BH11 VSS[216] VSS[316] W2
AF12 VSS[43] VSS[122] AT18 BH15 VSS[217] VSS[317] W27
AD14 VSS[44] VSS[123] AT22 BH17 VSS[218] VSS[318] W48
o
AD16 VSS[45] VSS[124] AT26 BH19 VSS[219] VSS[319] Y12
AF16 VSS[46] VSS[125] AT28 H10 VSS[220] VSS[320] Y38
AF19 VSS[47] VSS[126] AT30 BH27 VSS[221] VSS[321] Y4
y
AF29 VSS[51] VSS[130] AT42 BH39 VSS[225] VSS[325] BG29
AF31 VSS[52] VSS[131] AT46 BH43 VSS[226] VSS[328] N24
AF38 VSS[53] VSS[132] AT7 BH7 VSS[227] VSS[329] AJ3
AF4 VSS[54] VSS[133] AU24 D3 VSS[228] VSS[330] AD47
a
AF42 VSS[55] VSS[134] AU30 D12 VSS[229] VSS[331] B43
AF46 VSS[56] VSS[135] AV16 D16 VSS[230] VSS[333] BE10
AF5 VSS[57] VSS[136] AV20 D18 VSS[231] VSS[334] BG41
AF7 VSS[58] VSS[137] AV24 D22 VSS[232] VSS[335] G14
AF8 VSS[59] VSS[138] AV30 D24 VSS[233] VSS[337] H16
AG19 VSS[60] VSS[139] AV38 D26 VSS[234] VSS[338] T36
VSS[61] VSS[140] VSS[235] VSS[340]
L
AG2 AV4 D30 BG22
AG31 VSS[62] VSS[141] AV43 D32 VSS[236] VSS[342] BG24
AG48 VSS[63] VSS[142] AV8 D34 VSS[237] VSS[343] C22
AH11 VSS[64] VSS[143] AW14 D38 VSS[238] VSS[344] AP13
AH3 VSS[65] VSS[144] AW18 D42 VSS[239] VSS[345] M14
AH36 VSS[66] VSS[145] AW2 D8 VSS[240] VSS[346] AP3
AH39 VSS[67] VSS[146] AW22 E18 VSS[241] VSS[347] AP1
AH40 VSS[68] VSS[147] AW26 E26 VSS[242] VSS[348] BE16
VSS[69] VSS[148] VSS[243] VSS[349]
n
AH42 AW28 G18 BC16
AH46 VSS[70] VSS[149] AW32 G20 VSS[244] VSS[350] BG28
B
AH7 VSS[71] VSS[150] AW34 G26 VSS[245] VSS[351] BJ28 B
AJ19 VSS[72] VSS[151] AW36 G28 VSS[246] VSS[352]
AJ21 VSS[73] VSS[152] AW40 G36 VSS[247]
AJ24 VSS[74] VSS[153] AW48 G48 VSS[248]
u
AJ33 VSS[75] VSS[154] AV11 H12 VSS[249]
AJ34 VSS[76] VSS[155] AY12 H18 VSS[250]
AK12 VSS[77] VSS[156] AY22 H22 VSS[251]
AK3 VSS[78] VSS[157] AY28 H24 VSS[252]
VSS[79] VSS[158] H26 VSS[253]
CougarPoint_R1P0 H30 VSS[254]
H32 VSS[255]
VSS[256]
Y
H34
F3 VSS[257]
VSS[258]
g
CougarPoint_R1P0
i a n
X
A A

PROJECT : BD5
F
1A
Panther Point 6/6
5 4 3 2 1
1 2 3 4 5 6 7 8
<DDR>
14
H=8 (Rev)
JDIM2A M_A_DQ[63:0] {4}
{4} M_A_A[15:0]
M_A_A0 98 5 M_A_DQ4
M_A_A1 97 A0 DQ0 7 M_A_DQ5 +1.5VSUS
e
M_A_A2 96 A1 DQ1 15 M_A_DQ3
M_A_A3 95 A2 DQ2 17 M_A_DQ7
M_A_A4 92 A3 DQ3 4 M_A_DQ0
M_A_A5 91 A4 DQ4 6 M_A_DQ1 JDIM2B
s
M_A_A6 90 A5 DQ5 16 M_A_DQ6 75 44
A
M_A_A7 86 A6 DQ6 18 M_A_DQ2 76 VDD1 VSS16 48 A
M_A_A8 89 A7 DQ7 21 M_A_DQ9 81 VDD2 VSS17 49
M_A_A11 84 A10/AP DQ10 35 M_A_DQ8 88 VDD5 VSS20 60
119 A12/BC# DQ12 24 94 VDD7 VSS22 65
U
M_A_A13 M_A_DQ10
A15 DQ15 39 M_A_DQ17 105 VDD10 VSS25 72
109 DQ16 41 M_A_DQ20 106 VDD11 VSS26 127
PC2100 DDR3 SDRAM SO-DIMM

{4} M_A_BS#0 BA0 DQ17 VDD12 VSS27
{4} M_A_BS#1
108 51 M_A_DQ19 111 128
BA1 DQ18 VDD13 VSS28

{4} M_A_BS#2 79 53 M_A_DQ22 112 133
114 BA2 DQ19 40 M_A_DQ16 117 VDD14 VSS29 134
e
{4} M_A_CS#0 S0# DQ20 VDD15 VSS30
{4} M_A_CS#1 121 42 M_A_DQ21 118 138
101 S1# DQ21 50 M_A_DQ23 123 VDD16 VSS31 139
{4} M_A_CLKP0 CK0 DQ22 VDD17 VSS32
{4} M_A_CLKN0 103 52 M_A_DQ18 124 144
102 CK0# DQ23 57 M_A_DQ31 VDD18 VSS33 145
{4} M_A_CLKP1
s
104 CK1 DQ24 59 M_A_DQ30 199 VSS34 150
{4} M_A_CLKN1 CK1# DQ25 +3V VDDSPD VSS35
{4} M_A_CKE0 73 67 M_A_DQ25 151
74 CKE0 DQ26 69 M_A_DQ27 77 VSS36 155
{4} M_A_CKE1 CKE1 DQ27 NC1 VSS37
{4} M_A_CAS#
115 56 M_A_DQ28 +3V R480 *10K_4 122 156
110 CAS# DQ28 58 M_A_DQ26 125 NC2 VSS38 161
{4} M_A_RAS# RAS# DQ29 NCTEST VSS39
u
{4} M_A_WE#
113 68 M_A_DQ24 C203 *E@0.1U/25V_4X 162
R468 10K_4 DIMM0_SA0 197 WE# DQ30 70 M_A_DQ29 PM_EXTTS#0 198 VSS40 167
R467 10K_4 DIMM0_SA1 201 SA0 DQ31 129 M_A_DQ36 30 EVENT# VSS41 168
SA1 DQ32 {15,27} DDR3_DRAMRST# RESET# VSS42
{15,30,38} CGCLK_SMB CGCLK_SMB 202 131 M_A_DQ37 172
CGDAT_SMB 200 SCL DQ33 141 M_A_DQ35 VSS43 173
{15,30,38} CGDAT_SMB SDA DQ34 VSS44
143 M_A_DQ34 R166 0_4 +SMDDR_VREF_DQ0 1 178
o
116 DQ35 130 M_A_DQ32 {6} +SMDDR_VREF_DQ0_M3 +SMDDR_VREF_DIMM 126 VREF_DQ VSS45 179
{4} M_A_ODT0 ODT0 DQ36 VREF_CA VSS46
{4} M_A_ODT1 120 132 M_A_DQ33 +SMDDR_VREF_DQ0_M1 R165 0_4 184
ODT1 DQ37 140 M_A_DQ39 VSS47 185
11 DQ38 142 M_A_DQ38 2 VSS48 189
28 DM0 DQ39 147 M_A_DQ45 3 VSS1 VSS49 190
46 DM1 DQ40 149 M_A_DQ44 8 VSS2 VSS50 195
63 DM2 DQ41 157 M_A_DQ47 9 VSS3 VSS51 196
(204P)
(204P)
DM3 DQ42 VSS4 VSS52
H
136 159 M_A_DQ46 13
153 DM4 DQ43 146 M_A_DQ40 14 VSS5
170 DM5 DQ44 148 M_A_DQ41 19 VSS6
187 DM6 DQ45 158 M_A_DQ42 20 VSS7
B B
DM7 DQ46 160 M_A_DQ43 25 VSS8
{4} M_A_DQSP[7:0] DQ47 VSS9
M_A_DQSP0 12 163 M_A_DQ48 26 203 +SMDDR_VTERM
t
M_A_DQSP1 29 DQS0 DQ48 165 M_A_DQ53 31 VSS10 VTT1 204
M_A_DQSP2 47 DQS1 DQ49 175 M_A_DQ55 32 VSS11 VTT2
M_A_DQSP3 64 DQS2 DQ50 177 M_A_DQ54 37 VSS12
GND
GND
DQS5 DQ53 VSS15
u
M_A_DQSP6 171 174 M_A_DQ51
M_A_DQSP7 188 DQS6 DQ54 176 M_A_DQ50
{4} M_A_DQSN[7:0] DQS7 DQ55
M_A_DQSN0 10 181 M_A_DQ57 DDRRK-20401-TP8D
205
206
M_A_DQSN1 27 DQS#0 DQ56 183 M_A_DQ60
o
DQS#7 DQ63
y
DDRRK-20401-TP8D
L a
n
C C
u
DDR Power Decoupling <DDR> DDR3 VREF CA <DDR> SMBUS ISOLATE
Y
+SMDDR_VREF_DIMM
+SMDDR_VREF_DIMM {15}
+3V
+1.5VSUS +SMDDR_VREF_DQ0
C241 0.1U/10V_4X C83 0.1U/10V_4X R67 0_4 +SMDDR_VREF

C110 *4.7U/6.3V_6X
g
C236 *2.2U/6.3V_6X
C103 4.7U/6.3V_6X R63
4.7K_4
C137 4.7U/6.3V_6X
R73 *1K/F_4 R91 *1K/F_4
n
+1.5VSUS
2
C160 *4.7U/6.3V_6X +SMDDR_VREF_DIMM
C115 *4.7U/6.3V_6X C96 0.1U/10V_4X 6 1 CGDAT_SMB

{10,30} SDATA
C100 *4.7U/6.3V_6X C88 *2.2U/6.3V_6X Q6A 2N7002KDW_115MA
a
C102 0.1U/10V_4X DDR3 VREF DQ (M1) <DDR>
i
C149 0.1U/10V_4X +SMDDR_VTERM R43
+3V 4.7K_4
C126 0.1U/10V_4X
+3V C61 1U/6.3V_4X
C128 0.1U/10V_4X +1.5VSUS
C59 1U/6.3V_4X
5
C66 *2.2U/6.3V_6X
X
C60 1U/6.3V_4X
C63 0.1U/10V_4X +1.5VSUS 3 4 CGCLK_SMB
{10,30} SCLK
D C62 1U/6.3V_4X R164 D
1K/F_4 Q6B 2N7002KDW_115MA
+SMDDR_VREF_DQ0_M1
r
R172 + C164
*220U/2.5V_3528P_E35b
C254 C255
1K/F_4 0.1U/10V_4X *0.047U/10V_4X
Fo 2 3 4 5 6 7
Size
Date:
Document Number
PROJECT : BD5
DDR3 DIMM-0
Wednesday, January 16, 2013 Sheet
8
14 of 50
Rev
1A
1 2 3 4 5 6 7 8
15
e
<DDR>
s
A A
H=4 (Rev)
JDIM1A M_B_DQ[63:0] {4}
{4} M_B_A[15:0]
M_B_A0 98 5 M_B_DQ4
97 A0 DQ0 7
U
M_B_A1 M_B_DQ1
M_B_A2 96 A1 DQ1 15 M_B_DQ2
M_B_A3 95 A2 DQ2 17 M_B_DQ6
M_B_A4 92 A3 DQ3 4 M_B_DQ5 +1.5VSUS
M_B_A5 91 A4 DQ4 6 M_B_DQ0
M_B_A6 90 A5 DQ5 16 M_B_DQ3
M_B_A7 86 A6 DQ6 18 M_B_DQ7
M_B_A8 89 A7 DQ7 21 M_B_DQ13 JDIM1B
e
M_B_A9 85 A8 DQ8 23 M_B_DQ8 75 44
M_B_A10 107 A9 DQ9 33 M_B_DQ14 76 VDD1 VSS16 48
M_B_A11 84 A10/AP DQ10 35 M_B_DQ15 81 VDD2 VSS17 49
s
M_B_A13 119 A12/BC# DQ12 24 M_B_DQ9 87 VDD4 VSS19 55
A15 DQ15 39 M_B_DQ21 94 VDD7 VSS22 65
109 DQ16 41 M_B_DQ22 99 VDD8 VSS23 66

{4} M_B_BS#0 BA0 DQ17 VDD9 VSS24
u
{4} M_B_BS#1
108 51 M_B_DQ19 100 71
79 BA1 DQ18 53 M_B_DQ17 105 VDD10 VSS25 72
{4} M_B_BS#2 BA2 DQ19 VDD11 VSS26
{4} M_B_CS#0 114 40 M_B_DQ20 106 127
121 S0# DQ20 42 M_B_DQ16 111 VDD12 VSS27 128
{4} M_B_CS#1 S1# DQ21 VDD13 VSS28

{4} M_B_CLKP0 101 50 M_B_DQ18 112 133
103 CK0 DQ22 52 M_B_DQ23 117 VDD14 VSS29 134
o
{4} M_B_CLKN0 CK0# DQ23 VDD15 VSS30
{4} M_B_CLKP1 102 57 M_B_DQ25 118 138
104 CK1 DQ24 59 M_B_DQ29 123 VDD16 VSS31 139
{4} M_B_CLKN1 CK1# DQ25 VDD17 VSS32
{4} M_B_CKE0
73 67 M_B_DQ30 124 144
74 CKE0 DQ26 69 M_B_DQ27 VDD18 VSS33 145
{4} M_B_CKE1 CKE1 DQ27 VSS34
{4} M_B_CAS# 115 56 M_B_DQ28 199 150
CAS# DQ28 +3V VDDSPD VSS35
{4} M_B_RAS# 110 58 M_B_DQ24 151
113 RAS# DQ29 68 M_B_DQ26 R23 *10K_4 77 VSS36 155
{4} M_B_WE# WE# DQ30 +3V NC1 VSS37
H
R19 10K_4 DIMM1_SA0 197 70 M_B_DQ31 122 156
R22 10K_4 DIMM1_SA1 201 SA0 DQ31 129 M_B_DQ32 125 NC2 VSS38 161
+3V SA1 DQ32 NCTEST VSS39
{14,30,38} CGCLK_SMB
202 131 M_B_DQ33 C199 *E@0.1U/25V_4X 162
200 SCL DQ33 141 M_B_DQ34 PM_EXTTS#1 198 VSS40 167
B {14,30,38} CGDAT_SMB B
SDA DQ34 143 M_B_DQ35 30 EVENT# VSS41 168
DQ35 {14,27} DDR3_DRAMRST# RESET# VSS42
{4} M_B_ODT0 116 130 M_B_DQ36 172
t
120 ODT0 DQ36 132 M_B_DQ37 VSS43 173
{4} M_B_ODT1 ODT1 DQ37 VSS44
140 M_B_DQ38 {6} +SMDDR_VREF_DQ1_M3 R149 0_4 +SMDDR_VREF_DQ1 1 178
11 DQ38 142 M_B_DQ39 126 VREF_DQ VSS45 179
28 DM0 DQ39 147 M_B_DQ40 +SMDDR_VREF_DQ1_M1 R156 0_4 VREF_CA VSS46 184
46 DM1 DQ40 149 M_B_DQ41 VSS47 185
DM2 DQ41 {14} +SMDDR_VREF_DIMM VSS48
u
63 157 M_B_DQ47 2 189
(204P)
136 DM3 DQ42 159 M_B_DQ43 3 VSS1 VSS49 190
153 DM4 DQ43 146 M_B_DQ44 8 VSS2 VSS50 195
170 DM5 DQ44 148 M_B_DQ45 9 VSS3 VSS51 196
(204P)
187 DM6 DQ45 158 M_B_DQ46 13 VSS4 VSS52
DM7 DQ46 160 M_B_DQ42 14 VSS5
o
{4} M_B_DQSP[7:0] DQ47 VSS6
M_B_DQSP0 12 163 M_B_DQ52 19
M_B_DQSP1 29 DQS0 DQ48 165 M_B_DQ53 20 VSS7
M_B_DQSP3 64 DQS2 DQ50 177 M_B_DQ51 26 VSS9 203
DQS3 DQ51 VSS10 VTT1 +SMDDR_VTERM
M_B_DQSP4 137 164 M_B_DQ49 31 204
y
M_B_DQSP5 154 DQS4 DQ52 166 M_B_DQ48 32 VSS11 VTT2
{4} M_B_DQSN[7:0] DQS7 DQ55 VSS14
M_B_DQSN0 10 181 M_B_DQ61 43
GND
GND
M_B_DQSN1 27 DQS#0 DQ56 183 M_B_DQ60 VSS15
a
M_B_DQSN2 45 DQS#1 DQ57 191 M_B_DQ63
M_B_DQSN3 62 DQS#2 DQ58 193 M_B_DQ59 DDRRK-20401-TP4B
205
206
DQS#7 DQ63
L
DDRRK-20401-TP4B
n
C C
<DDR> DDR Power Decoupling
Y u DDR3 VREF DQ (M1) <DDR>
+1.5VSUS
C99
C114
4.7U/6.3V_6X
*4.7U/6.3V_6X
+SMDDR_VREF_DIMM
n g
a
C87 0.1U/10V_4X
C127 *4.7U/6.3V_6X
+1.5VSUS
i
C86 *2.2U/6.3V_6X
C106 4.7U/6.3V_6X
C136 4.7U/6.3V_6X
R158
C153 4.7U/6.3V_6X 1K/F_4 +1.5VSUS
+SMDDR_VREF_DQ1 +SMDDR_VTERM
C107 0.1U/10V_4X
X
C240 0.1U/10V_4X C56 1U/6.3V_4X +SMDDR_VREF_DQ1_M1
C117 0.1U/10V_4X
D C244 *2.2U/6.3V_6X C54 1U/6.3V_4X D
C124 0.1U/10V_4X R157 + C98
C53 1U/6.3V_4X C243 C242 *220U/2.5V_3528P_E35b
C152 0.1U/10V_4X *0.047U/10V_4X 0.1U/10V_4X
+3V
r
C55 1U/6.3V_4X 1K/F_4
C65 2.2U/6.3V_4X
C3A
o
C64 *0.1U/10V_4X

PROJECT : BD5
F
1A
DDR3 DIMM-1
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+1.05V_GPU
C594
C595
C217
EV@10U/6.3V_6X
EV@10U/6.3V_6X
EV@10U/6.3V_6X
U24A
N14P_GV2GK208 N14M_GL GF119
NC PEX_WAKE AB6 C636 *EV@0.1U/10V_4X

16
C596 EV@10U/6.3V_6X AA22 PEX_IOVDD
AB23 PEX_IOVDD PEX_RST AC7 VGA_RST# R537 EV@100_4 PEGX_RST#
e
C216 EV@4.7U/6.3V_6X AC24 PEX_IOVDD PCI_EXPRESS
AD25 PEX_IOVDD PEX_CLKREQ AC6 PEX_CLKREQ# R188 EV@10K_4 +3V_GPU
C287 EV@1U/6.3V_4X AE26 PEX_IOVDD
AE27 AE8
s
PEX_IOVDD PEX_REFCLK CLK_PCIE_VGAP {10}
C277 EV@1U/6.3V_4X PEX_REFCLK AD8 CLK_PCIE_VGAN {10}
PEX_TX0 AC9 C_PEG_RX0 C223 EV@0.22U/10V_4X

A PEG_RXP0 {3} A
AB9 C_PEG_RX#0 C222 EV@0.22U/10V_4X
PEX_IOVDD + PEX_IOVDDQ = 3.3A PEX_TX0 PEG_RXN0 {3}
PEX_RX0 AG6
U
PEG_TXP0 {3}
+1.05V_GPU AA10 PEX_IOVDDQ PEX_RX0 AG7 PEG_TXN0 {3}
AA12 PEX_IOVDDQ
C214 EV@10U/6.3V_6X AA13 PEX_IOVDDQ PEX_TX1 AB10 C_PEG_RX1 C205 EV@0.22U/10V_4X PEG_RXP1 {3}
AA16 PEX_IOVDDQ PEX_TX1 AC10 C_PEG_RX#1 C206 EV@0.22U/10V_4X PEG_RXN1 {3}
C593 EV@10U/6.3V_6X AA18 PEX_IOVDDQ
AA19 AF7
e
PEX_IOVDDQ PEX_RX1 PEG_TXP1 {3}
C215 EV@10U/6.3V_6X AA20 PEX_IOVDDQ PEX_RX1 AE7
PEG_TXN1 {3}
AA21 PEX_IOVDDQ
C213 EV@10U/6.3V_6X AB22 PEX_IOVDDQ PEX_TX2 AD11 C_PEG_RX2 C208 EV@0.22U/10V_4X PEG_RXP2 {3}
s
AC23 PEX_IOVDDQ PEX_TX2 AC11 C_PEG_RX#2 C207 EV@0.22U/10V_4X PEG_RXN2 {3}
C270 EV@4.7U/6.3V_6X AD24 PEX_IOVDDQ
AE25 PEX_IOVDDQ PEX_RX2 AE9
PEG_TXP2 {3}
C286 EV@1U/6.3V_4X AF26 PEX_IOVDDQ PEX_RX2 AF9 PEG_TXN2 {3}
u
AF27 PEX_IOVDDQ
C278 EV@1U/6.3V_4X PEX_TX3 AC12 C_PEG_RX3 C225 EV@0.22U/10V_4X PEG_RXP3 {3}
PEX_TX3 AB12 C_PEG_RX#3 C224 EV@0.22U/10V_4X PEG_RXN3 {3}
o
PEX_RX3 AG9 PEG_TXP3 {3}
PEX_RX3 AG10 PEG_TXN3 {3}
PEX_TX4 AB13 C_PEG_RX4 C227 EV@0.22U/10V_4X PEG_RXP4 {3}

PEX_TX4 AC13 C_PEG_RX#4 C226 EV@0.22U/10V_4X PEG_RXN4 {3}
PEX_PLL_HVDD + PEX_SVDD_3V3 AF10
H
PEX_RX4 PEG_TXP4 {3}
= 210mA PEX_RX4 AE10 PEG_TXN4 {3}
PEX_TX5 AD14 C_PEG_RX5 C210 EV@0.22U/10V_4X PEG_RXP5 {3}

+3V_GPU AA8 PEX_PLL_HVDD PEX_TX5 AC14 C_PEG_RX#5 C209 EV@0.22U/10V_4X PEG_RXN5 {3}
t
AA9 PEX_PLL_HVDD
C288 EV@0.1U/10V_4X PEX_RX5 AE12 PEG_TXP5 {3}
PEX_RX5 AF12 PEG_TXN5 {3}
B C359 EV@4.7U/6.3V_6X AB8 PEX_SVDD_3V3 B
u
PEX_TX6 AC15 C_PEG_RX6 C228 EV@0.22U/10V_4X PEG_RXP6 {3}
C284 EV@4.7U/6.3V_6X PEX_TX6 AB15 C_PEG_RX#6 C229 EV@0.22U/10V_4X PEG_RXN6 {3}
PEX_RX6 AG12 PEG_TXP6 {3}
o
PEX_RX6 AG13
PEG_TXN6 {3}
PEX_TX7 AB16 C_PEG_RX7 C212 EV@0.22U/10V_4X PEG_RXP7 {3}

PEX_TX7 AC16 C_PEG_RX#7 C211 EV@0.22U/10V_4X PEG_RXN7 {3}
y
PEX_RX7 AF13
PEG_TXP7 {3}
PEX_RX7 AE13 PEG_TXN7 {3}
a
PEX_TX8 AD17
NC
PEX_TX8 AC17
NC
AE15 +3V
NC
NC
PEX_RX8
PEX_RX8 AF15 PCIE (RESET)
L
{47} VGA_VCCSENSE F2 VDD_SENSE PEX_TX9 AC18
NC
NC PEX_TX9 AB18
U9 C248
{47} VGA_VSSSENSE F1 GND_SENSE PEX_RX9 AG15 PX@TC7SH08FU(F) PX@0.1U/10V_4X
NC
PEX_RX9 AG16
NC
5
n
PEX_TX10 AB19 2
NC {10} VGA_PLTRST#
PEX_TX10 AC19 4 PEGX_RST#
NC PEGX_RST# {20}
{10} DGPU_HOLD_RST# 1
PEX_RX10 AF16
NC
u
PEX_RX10 AE16
NC
3
R160
AD20 PX@100K_4
NC PEX_TX11
PEX_TX11 AC20
B2A
NC
R527 *EV@200/F_4 PEX_TSTCLK R163 OEV@0_4
PEX_RX11 AE18
NC
Y
C PEX_RX11 AF18 C
NC
PEX_TSTCLK# AC21
NC
NC
PEX_TX12
PEX_TX12 AB21 PCIE (CLK_REQ) +3V_GPU
CLK_PEGA_REQ# {10}
g
AF22 AG18
PEX_PLLVDD = 150mA AE22
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
NC
NC
PEX_RX12
PEX_RX12 AG19 R180
*EV@4.7K_4
3
L24 EV@HCB1608KF-181T15_1.5A AD23
n
+1.05V_GPU NC PEX_TX13
NC PEX_TX13 AE23
CLKREQ_C1 2 Q24
C616 EV@4.7U/6.3V_6X PEX_PLLVDD AA14 PEX_PLLVDD PEX_RX13 AF19 *EV@LTC044EUBFS8TL_30MA
NC
a
AA15 PEX_PLLVDD NC PEX_RX13 AE19
C285 EV@1U/6.3V_4X
1
AF24 R179 *EV@0_4
i
NC PEX_TX14 {11,22,37} DGPU_PWROK
C627 EV@0.1U/10V_4X PEX_TX14 AE24
NC
3
PEX_RX14 AE21
NC
PEX_RX14 AF21 PEX_CLKREQ# 2
NC
R533 EV@10K_4 TESTMODE AD9 TESTMODE
PEX_TX15 AG24
X
NC
NC PEX_TX15 AG25 Q25
1
*EV@LTC044EUBFS8TL_30MA
PEX_RX15 AG21
NC
PEX_RX15 AG22
NC
r
GK208 GF119
R526 EV@2.49K/F_4 PEX_TERMP AF25 PEX_TERMP N14M_GL
N14P_GV2
o
bga595-nvidia-n13p-gv2-s-a2 COMMON +3V_GPU
2
F
D D
PEX_CLKREQ# 1 3 CLK_PEGA_REQ#
EV@2N7002K_300MA
Q57
B2A

A1A
N14x (PCIE I/F)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U24B
17
VMA_DQ[63:0]
VMA_DQ[63:0] {23,24}
R575 EV@10K_4 FB_CLAMP_R F3 FB_CLAMP FBA_D0 E18 VMA_DQ0
F18 VMA_DQ1 +1.5V_GPU
FBA_D1
E16 VMA_DQ2 +1.5V_GPU
FBA_D2
F17 VMA_DQ3
FBA_D3
D20 VMA_DQ4 FBVDDQ + FBVDD = 4.88A
{20,37,48} FB_CLAMP R574 GC6@0_4 FBA FBA_D4
FBA_D5 D21 VMA_DQ5
F20 VMA_DQ6 +1.5V_GPU U24D
FBA_D6
FBA_D7 E21 VMA_DQ7
FBA_D8 E15 VMA_DQ8
FBA_D9 D15 VMA_DQ9 C331 EV@0.1U/10V_4X B26 FBVDDQ
FBA_D10 F15 VMA_DQ10 C25 FBVDDQ R568 R559
F13 VMA_DQ11 C303 EV@0.1U/10V_4X E23 R223 R580
e
FBA_D11 FBVDDQ
FBA_D12 C13 VMA_DQ12 E26 FBVDDQ EV@100_4 EV@100_4
FBA_D13 B13 VMA_DQ13 C317 EV@1U/10V_6X F14 FBVDDQ EV@100_4 EV@100_4
FBA_D14 E13 VMA_DQ14 F21 FBVDDQ FBA_CMD26
D13 VMA_DQ15 C295 EV@1U/10V_6X G13 FBA_CMD28 FBA_CMD30
s
FBA_D15 FBVDDQ
FBA_D16 B15 VMA_DQ16 G14 FBVDDQ FBA_CMD11
A A
FBA_D17 C16 VMA_DQ17 C649 EV@4.7U/6.3V_6X G15 FBVDDQ
FBA_D18 A13 VMA_DQ18 G16 FBVDDQ R569 R560 C650
FBA_D19 A15 VMA_DQ19 C329 EV@4.7U/6.3V_6X G18 FBVDDQ R224 R581 C575
FBA_D20 B18 VMA_DQ20 G19 FBVDDQ EV@100_4 EV@100_4 EV@0.1U/10V_4X
FBA_D21 A18 VMA_DQ21 C327 EV@10U/6.3V_6X G20 FBVDDQ EV@100_4 EV@100_4 EV@0.1U/10V_4X
FBA_D22 A19 VMA_DQ22 G21 FBVDDQ
C19 VMA_DQ23 H24
U
FBA_D23 C328 EV@10U/6.3V_6X FBVDDQ
FBA_D24 B24 VMA_DQ24 H26 FBVDDQ
FBA_D25 C23 VMA_DQ25 J21 FBVDDQ
FBA_D26 A25 VMA_DQ26 K21 FBVDDQ
FBA_D27 A24 VMA_DQ27 L22 FBVDDQ
FBA_D28 A21 VMA_DQ28 L24 FBVDDQ
B21 VMA_DQ29 L26
DUAL RANK (Mode E) FBA_D29
FBA_D30 C20 VMA_DQ30 M21
FBVDDQ
FBVDDQ
e
C21 VMA_DQ31 N21 +1.5V_GPU
FBA_D31 FBVDDQ
R22 VMA_DQ32 R21 +1.5V_GPU
FBA_D32 FBVDDQ
{23,24} FBA_CMD0 C27 FBA_CMD0 Rank 0/1 [31:0] ODT FBA_D33 R24 VMA_DQ33 T21 FBVDDQ
{24} FBA_CMD1 C26 FBA_CMD1 Rank1 [31:0] CS1# FBA_D34 T22 VMA_DQ34 V21 FBVDDQ
s
{23} FBA_CMD2
E24 FBA_CMD2 Rank0 [31:0] CS0# FBA_D35 R23 VMA_DQ35 W21 FBVDDQ
{23,24} FBA_CMD3 F24 FBA_CMD3 Rank 0/1 [31:0] CKE FBA_D36 N25 VMA_DQ36
{23,24} FBA_CMD4 D27 FBA_CMD4 [Rank0:A9],[Rank1:A11] FBA_D37 N26 VMA_DQ37
{23,24} FBA_CMD5
D26 FBA_CMD5 [Rank0:A6],[Rank1:A7] FBA_D38 N23 VMA_DQ38
{23,24} FBA_CMD6 F25 FBA_CMD6 [Rank0:A3],[Rank1:BA1] FBA_D39 N24 VMA_DQ39
u
F26 [Rank0:A0],[Rank1:A12] V23 VMA_DQ40 R229 R225
{23,24} FBA_CMD7
{23,24} FBA_CMD8 F23
FBA_CMD7
FBA_CMD8 [Rank0:A8],[Rank1:A8]
FBA_D40
FBA_D41 V22 VMA_DQ41 FBVDDQ R212 R562
{23,24} FBA_CMD9 G22 FBA_CMD9 [Rank0:A12],[Rank1:A0] FBA_D42 T23 VMA_DQ42 EV@100_4 EV@100_4
{23,24} FBA_CMD10 G23 FBA_CMD10 [Rank0:A1],[Rank1:A2] FBA_D43 U22 VMA_DQ43 EV@100_4 EV@100_4
{23,24} FBA_CMD11 G24 [Rank0:RAS#],[Rank1:RAS#]
FBA_CMD11 FBA_D44 Y24 VMA_DQ44 FBA_CMD9
F27 FBA_CMD12 [Rank0:A13],[Rank1:A14] AA24 VMA_DQ45 FBA_CMD23 FBA_CMD15
o
{23,24} FBA_CMD12 FBA_D45
{23,24} FBA_CMD13 G25 FBA_CMD13 [Rank0:BA1],[Rank1:A3] FBA_D46 Y22 VMA_DQ46 FBA_CMD24
{23,24} FBA_CMD14 G27 FBA_CMD14 [Rank0:A14],[Rank1:A13] FBA_D47 AA23 VMA_DQ47
{23,24} FBA_CMD15
G26 [Rank0:CAS#],[Rank1:CAS#]
FBA_CMD15 FBA_D48 AD27 VMA_DQ48 R230 R226 C685
{23,24} FBA_CMD16 M24 FBA_CMD16 Rank 0/1 [63:32] ODT FBA_D49 AB25 VMA_DQ49 R213 R563 C349
{24} FBA_CMD17 M23 FBA_CMD17 Rank1 [63:32] CS1# FBA_D50 AD26 VMA_DQ50 EV@100_4 EV@100_4 EV@0.1U/10V_4X
{23} FBA_CMD18 K24 FBA_CMD18 Rank0 [63:32] CS0# FBA_D51 AC25 VMA_DQ51 EV@100_4 EV@100_4 EV@0.1U/10V_4X
{23,24} FBA_CMD19 K23 FBA_CMD19 Rank 0/1 [63:32] CKE FBA_D52 AA27 VMA_DQ52
H
{23,24} FBA_CMD20
M27 FBA_CMD20 [Rank0:RST],[Rank1:RST] FBA_D53 AA26 VMA_DQ53
{23,24} FBA_CMD21 M26 FBA_CMD21 [Rank0:A7],[Rank1:A6] FBA_D54 W26 VMA_DQ54
{23,24} FBA_CMD22
M25 FBA_CMD22 [Rank0:A4],[Rank1:A5] FBA_D55 Y25 VMA_DQ55
B {23,24} FBA_CMD23 K26 FBA_CMD23 [Rank0:A11],[Rank1:A9] FBA_D56 R26 VMA_DQ56 B
{23,24} FBA_CMD24 K22 FBA_CMD24 [Rank0:A2],[Rank1:A1] FBA_D57 T25 VMA_DQ57
{23,24} FBA_CMD25 J23 FBA_CMD25 [Rank0:A10],[Rank1:WE#] FBA_D58 N27 VMA_DQ58
t
{23,24} FBA_CMD26 J25 FBA_CMD26 [Rank0:A5],[Rank1:A4] FBA_D59 R27 VMA_DQ59
{23} FBA_CMD27
J24 FBA_CMD27 Rank0 BA2 FBA_D60 V26 VMA_DQ60
{23,24} FBA_CMD28 K27 FBA_CMD28 [Rank0:WE#],[Rank1:A10] FBA_D61 V27 VMA_DQ61 FB_CAL_PD_VDDQD22 FB_CAL_PD_VDDQ R244 EV@40.2/F_4 +1.5V_GPU
K25 W27 VMA_DQ62 +1.5V_GPU +1.5V_GPU
{23,24} FBA_CMD29 FBA_CMD29 [Rank0:BA0],[Rank1:BA0] FBA_D62
{24} FBA_CMD30
J27 FBA_CMD30 Rank1 BA2 FBA_D63 W25 VMA_DQ63
u
TP58 FBA_CMD31 J26 FBA_CMD31 N/A FB_CAL_PU_GND C24 FB_CAL_PU_GND R594 EV@42.2/F_4
FBA_DQM0 D19 VMA_DM0

VMA_DM[7:0] {23,24}
FBA_DQM1 D14 VMA_DM1 FB_CALTERM_GND B25 FB_CAL_TERM_GND R591 EV@51.1/F_4
FBA_DQM2 C17 VMA_DM2
C22 VMA_DM3
o
FBA_DQM3
FBA_DQM4 P24 VMA_DM4 bga595-nvidia-n13p-gv2-s-a2
FBA_DQM5 W24 VMA_DM5 COMMON R215 R564 R221 R576

FBA_DQM6 AA25 VMA_DM6
+1.5V_GPU R238 *EV@60.4/F_4 FBA_DEBUG F22 FBA_DEBUG0 FBA_DQM7 U25 VMA_DM7 EV@100_4 EV@100_4 EV@100_4 EV@100_4
R220 *EV@60.4/F_4 FBA_DEBUG1 J22 FBA_DEBUG1
y
FBA_CMD21 FBA_CMD8
FBA_DQS_WP0 E19 VMA_WDQS0 VMA_WDQS[7:0] {23,24}
FBA_CMD22 FBA_CMD4
FBA_DQS_WP1 C15 VMA_WDQS1
{23,24} VMA_CLK0
D24 FBA_CLK0 FBA_DQS_WP2 B16 VMA_WDQS2
D25 FBA_DQS_WP3 B22 VMA_WDQS3 R216 R565 C283 R222 R577 C643
a
{23,24} VMA_CLK0# FBA_CLK0
{23,24} VMA_CLK1
N22 FBA_CLK1 FBA_DQS_WP4 R25 VMA_WDQS4
{23,24} VMA_CLK1# M22 FBA_CLK1 FBA_DQS_WP5 W23 VMA_WDQS5 EV@100_4 EV@100_4 EV@0.1U/10V_4X EV@100_4 EV@100_4 EV@0.1U/10V_4X
FBA_DQS_WP6 AB26 VMA_WDQS6
FBA_DQS_WP7 T26 VMA_WDQS7
L
D18 FBA_WCK01 FBA_DQS_RN0 F19 VMA_RDQS0
VMA_RDQS[7:0] {23,24}
C18 FBA_WCK01 FBA_DQS_RN1 C14 VMA_RDQS1
D17 A16 VMA_RDQS2 +1.5V_GPU
FBA_WCK23 FBA_DQS_RN2
D16
T24
FBA_WCK23
FBA_WCK45
FBA_DQS_RN3
FBA_DQS_RN4
A22
P25
VMA_RDQS3
VMA_RDQS4
ODTx, CKEx,RST (Termination) +1.5V_GPU
U24 FBA_WCK45 FBA_DQS_RN5 W22 VMA_RDQS5

V24 FBA_WCK67 FBA_DQS_RN6 AB27 VMA_RDQS6
V25 FBA_WCK67 FBA_DQS_RN7 T27 VMA_RDQS7
n
FB_PLLAVDD = 62mA *2
C C
FBA_ODT_L FBA_CMD0 R259 EV@10K_4
+1.05V_GPU L10 EV@HCB1608KF-181T15_1.5A +FB_PLLAVDD F16 FB_PLLAVDD R585 R233
FBA_ODT_H FBA_CMD16 R536 EV@10K_4 R241 R239
P22
u
C330 EV@10U/6.3V_6X FB_PLLAVDD EV@100_4 EV@100_4
C340 EV@0.1U/10V_4X FBA_RST# FBA_CMD20 R217 EV@10K_4 EV@100_4 EV@100_4
C322 EV@0.1U/10V_4X H22 FB_DLLAVDD FBA_CMD10
C321 EV@0.1U/10V_4X FBA_CKE_L FBA_CMD3 R260 EV@10K_4 FBA_CMD27 FBA_CMD6
FBA_CMD13
FBA_CKE_H FBA_CMD19 R170 EV@10K_4 C251
R586 R234
R242 R240 C664 EV@0.1U/10V_4X
Y
FB_DLLAVDD = 35mA EV@100_4 EV@100_4
EV@100_4 EV@100_4 EV@0.1U/10V_4X
FB_VREF_PROBE D23 FB_VREF_PROBE TP12
g
bga595-nvidia-n13p-gv2-s-a2 COMMON
+1.5V_GPU
n
+1.5V_GPU +1.5V_GPU
i a FBA_CMD12
FBA_CMD7
R572
EV@100_4
R566
EV@100_4
FBA_CMD25
FBA_CMD5
R557
EV@100_4
R589
EV@100_4
FBA_CMD29
FBA_CMD14
R208
EV@100_4
R236
EV@100_4
X
R209 R237 C653
D R573 R567 C304 R558 R590 C372 D
EV@100_4 EV@100_4 EV@0.1U/10V_4X
EV@100_4 EV@100_4 EV@0.1U/10V_4X EV@100_4 EV@100_4 EV@0.1U/10V_4X

F
A1A
N14x (Memory I/F)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U24G
18
R546 OEVEDP@1K/F_4 U24I
R200 *EV@1K/F_4
IFPAB
IFPA_TXC AC4
EV_TXLCLKOUT- {29}
AC3 U6
IFPA_TXC EV_TXLCLKOUT+ {29} +3V_GPU
IFPD_RSET
IFPD
e
AA6 IFPAB_RSET 110mA *2
IFPA_TXD0 Y3
+3V_GPU EV_TXLOUT0- {29}
IFPA_TXD0 Y4 L30 OEVEDP@HCB1608KF-181T15_1.5A T7 IFPD_PLLVDD IFPD_AUX P4 EV_EDP_AUXN
EV_TXLOUT0+ {29} EV_EDP_AUXN {29}
125mA P3 EV_EDP_AUXP
s
IFPD_AUX EV_EDP_AUXP {29}
V7 C638 OEVEDP@4.7U/6.3V_6X R7
A
L6 OEVLDS@HCB1608KF-181T15_1.5A
IFPAB_PLLVDD
AA2
IFPD_PLLVDD B2A A
W7 IFPAB_PLLVDD
LVDS A IFPA_TXD1
IFPA_TXD1 AA3
EV_TXLOUT1- {29}
EV_TXLOUT1+ {29}
C640 OEVEDP@1U/6.3V_4X IFPD_L3 R5
EV_EDP_TXN3 {29}
C261 OEVLDS@4.7U/6.3V_6X IFPD_L3 R4
EV_EDP_TXP3 {29}
C641 OEVEDP@0.1U/10V_4X IFPD_PLLVDD
C293 OEVLDS@1U/6.3V_4X IFPA_TXD2 AA1 IFPD_L2 T5
EV_TXLOUT2- {29} EV_EDP_TXN2 {29}
IFPA_TXD2 AB1 C725 OEVEDP@0.1U/10V_4X IFPD_L2 T4
EV_TXLOUT2+ {29} EV_EDP_TXP2 {29}
U
C294 OEVLDS@0.1U/10V_4X IFPAB_PLLVDD
C726 OEVEDP@0.1U/10V_4X IFPD_L1 U4
EV_EDP_TXN1 {29}
IFPA_TXD3 AA5 IFPD_L1 U3
EV_EDP_TXP1 {29}
AA4
IFPA_TXD3 B2A IFPD_L0 V4
+1.05V_GPU EV_EDP_TXN0 {29}
IFPD_L0 V3
+1.05V_GPU EV_EDP_TXP0 {29}
IFPB_TXC AB4 88mA
EV_TXUCLKOUT- {29}
115mA *2 IFPB_TXC AB5
e
EV_TXUCLKOUT+ {29}
L31 OEVEDP@HCB1608KF-181T15_1.5A
L4 OEVLDS@HCB1608KF-181T15_1.5A R6 IFPD_IOVDD GPIO17 D4
HPD_D EV_EDP_HPD {29}
W6 IFPA_IOVDD IFPB_TXD4 AB2
EV_TXUOUT0- {29}
C237 OEVLDS@4.7U/6.3V_6X IFPB_TXD4 AB3 C648 OEVEDP@4.7U/6.3V_6X
EV_TXUOUT0+ {29}
s
Y6 IFPB_IOVDD
C238 OEVLDS@1U/6.3V_4X C646 OEVEDP@1U/6.3V_4X
AD2
C252 OEVLDS@0.1U/10V_4X LVDS B IFPB_TXD5
IFPB_TXD5 AD3
EV_TXUOUT1- {29}
EV_TXUOUT1+ {29}
C647 OEVEDP@0.1U/10V_4X IFPD_IOVDD
u
C245 OEVLDS@0.1U/10V_4X IFPAB_IOVDD C727 OEVEDP@0.1U/10V_4X
AD1
IFPB_TXD6
IFPB_TXD6 AE1
EV_TXUOUT2- {29} B2A
EV_TXUOUT2+ {29}
EV_EDP_AUXN
EV_EDP_AUXP
AD5
o
IFPB_TXD7
IFPB_TXD7 AD4
R788 R789
OEVEDP@100K_4 OEVEDP@100K_4
HPD_A GPIO14 B3
H
B2A
B B
t
U24J
u
GK208(N14P-GV2) GF119 (N14M-GL)
DVI-DL DVI-SL/HDMI DP
I2CY_SDA IFPE_AUX J3
GF119 (N14M-GL) GK208(N14P-GV2) I2CY_SDA J2
I2CY_SCL I2CY_SCL IFPE_AUX
TP11 J7
o
IFPEF_PLLVDD NC
TXC TXC IFPE_L3 J1

NC
TXC TXC IFPE_L3 K1
NC
K7 IFPEF_PLLVDD NC
TXD0 IFPE_L2 K3
y
NC TXD0
R544 OEHM@1K/F_4 TXD0 IFPE_L2 K2
NC TXD0
U24H
TP10 K6 IFPEF_RSET TXD1 TXD1 IFPE_L1 M3
NC NC
TXD1 TXD1 IFPE_L1 M2
NC
a
T6 IFPC_RSET IFPC NC TXD2 TXD2 IFPE_L0 M1
N1
+3V_GPU HDMI NC TXD2 TXD2 IFPE_L0
100mA
L13 OEHM@HCB1608KF-181T15_1.5A
M7
N7
IFPC_PLLVDD DDC DATA IFPC_AUX N5
N4
EV_HDMI_DDCDAT {28} IFPE
IFPC_PLLVDD DDC CLK IFPC_AUX EV_HDMI_DDCCLK {28}
L
C347 OEHM@4.7U/6.3V_6X NC HPD_E HPD_E GPIO18 C2
TX CLK- IFPC_L3 N3
EXT_HDMICLK- {28}
C345 OEHM@1U/6.3V_4X TX CLK+ IFPC_L3 N2
EXT_HDMICLK+ {28} GF119 GK208
C316 OEHM@0.1U/10V_4X R3 (N14M-GL) (N14P-GV2)
TX Data0 - IFPC_L2 EXT_HDMITX0N {28}
TX Data0 + IFPC_L2 R2 TP9 H6 IFPE_IOVDD NC
EXT_HDMITX0P {28}
C351 OEHM@0.1U/10V_4X GK208(N14P-GV2) GF119 (N14M-GL)
n
TX Data1 - IFPC_L1 R1 J6 IFPF_IOVDD
EXT_HDMITX1N {28} NC DVI-DL DVI-SL/HDMI
C344 OEHM@0.1U/10V_4X IFPC_PLLVDD TX Data1 + IFPC_L1 T1 DP
C EXT_HDMITX1P {28} C
I2CZ_SDA IFPF_AUX H4
TX Data2 - IFPC_L0 T3 I2CZ_SCL IFPF_AUX H3
EXT_HDMITX2N {28}
TX Data2 + IFPC_L0 T2
EXT_HDMITX2P {28}
u
TXC IFPF_L3 J5
NC
TXC IFPF_L3 J4
+1.05V_GPU NC
P6 IFPC_IOVDD HPD_C GPIO15 C3
EXT_HDMI_HPD {28}
72mA TXD0 IFPF_L2 K5
NC TXD3
TXD0 IFPF_L2 K4
bga595-nvidia-n13p-gv2-s-a2 COMMON NC TXD3
L9 OEHM@HCB1608KF-181T15_1.5A
IFPF NC TXD4 TXD1 IFPF_L1 L4
Y
C273 OEHM@4.7U/6.3V_6X TXD4 TXD1 IFPF_L1 L3
NC
C276 OEHM@1U/6.3V_4X TXD2 IFPF_L0 M5
NC TXD5
TXD2 IFPF_L0 M4
NC TXD5
C299 OEHM@0.1U/10V_4X
g
C309 OEHM@0.1U/10V_4X IFPC_IOVDD
NC HPD_F GPIO19 F7
i a n bga595-nvidia-n13p-gv2-s-a2 COMMON
X
D D

F
A1A
N14x (Display I/F)
1 2 3 4 5 6 7 8
19
PLLVDD = 52mA
+1.05V_GPU L12 EV@HCB1608KF-181T15_1.5A NV_PLLVDD
C320 EV@0.1U/10V_4X
C341 EV@10U/6.3V_6X
e
SP_PLLVDD = 71mA
s
VID_PLLVDD = 41mA
L11 EV@HCB1608KF-181T15_1.5A U24M
+1.05V_GPU
SP_PLLVDD
C311 EV@0.1U/10V_4X L6 PLLVDD
XTAL_PLL
U
M6 SP_PLLVDD
C315 EV@0.1U/10V_4X
N6 VID_PLLVDD
C338 EV@4.7U/6.3V_6X
CLK_27M_XTAL_IN C666 EV@12P/50V_4C
e
C339 EV@10U/6.3V_6X
2
1
s
R635 EV@10K_4 XTAL_SSIN A10 XTALSSIN XTALOUTBUFF C10 BXTALOUT R255 EV@10K_4 Y2
EV@27MHZ_10
3
4
CLK_27M_XTAL_IN C11 XTALIN XTALOUT B10 CLK_27M_XTAL_OUT R790 EV@0_4 CLK_27M_XTAL_OUT_R C665 EV@12P/50V_4C
u
B2A
+3V_GPU
120mA
Ho
t
L7 OECRT@HCB1608KF-181T15_1.5A
C262 OECRT@4.7U/6.3V_6X
EXT_CRT_RED R530 OECRT@150/F_4
u
C268 OECRT@1U/6.3V_4X
EXT_CRT_GRN R531 OECRT@150/F_4
C292 OECRT@0.1U/10V_4X U24K
EXT_CRT_BLU R529 OECRT@150/F_4
o
C267 OECRT@0.1U/10V_4X
W5
CRT
C266 OECRT@0.1U/10V_4X DACA_VDD DACA_VDD I2CA_SCL B7 EV_CRTDCLK {29}
I2CA_SDA A7
+3V_GPU
y
AE2 EV_CRTDDAT {29}
C628 OECRT@0.1U/10V_4X DACA_VREF DACA_VREF
R528 OECRT@124/F_4 DACA_RESET AF2 DACA_RSET DACA_HSYNC AE3 EXT_HSYNC {29}
a
DACA_VSYNC AE4 EXT_VSYNC {29}
R632 R633
OECRT@2.2K_4 OECRT@2.2K_4
DACA_RED AG3 EXT_CRT_RED {29}

EV_CRTDCLK
L
DACA_GREEN AF4 EXT_CRT_GRN {29}
EV_CRTDDAT
DACA_BLUE AF3 EXT_CRT_BLU {29}
R249 R250
n
PIV@2.2K_4 PIV@2.2K_4
u
B2A
gY
i a n
r X
Fo Size
Date:
Document Number
N14x (XTAL/CRT I/F)
Wednesday, January 16, 2013 Sheet 19 of 50
Rev
A1A
1 2 3 4 5 6 7 8
U24N
I2CS_SCL D9 GFx_SCL
20
e
+3V_GPU +3V_GPU
I2CS_SDA D8 GFx_SDA
MISC1
s
I2CC_SCL A9
A EV_LVDS_DDCCLK A
EV_LVDS_DDCCLK {29}
I2CC_SDA B9 EV_LVDS_DDCDAT
EV_LVDS_DDCDAT {29}
R615 R614
OEVLDS@2.2K_4 OEVLDS@2.2K_4
TP14 THERM- E12 THERMDN
U
I2CB_SCL C9 N12E_SCL R634 EV@2.2K_4
TP15 THERM+ F12 THERMDP I2CB_SDA C8 N12E_SDA R613 EV@2.2K_4
EV_LVDS_DDCCLK
EV_LVDS_DDCDAT
AE5
e
JTAG_TCK
AD6 JTAG_TMS
AE6 JTAG_TDI R248 R247
GPIO
s
AF6 JTAG_TDO PIV@2.2K_4 PIV@2.2K_4
JTAG_TRST# AG4 JTAG_TRST FB_CLAMP_MON GPIO0 C6 FB_CLAMP_RR R570 GC6@0_4
FB_CLAMP {17,37,48}
B2 TP59
MEM_VDD_CLT GPIO1 B2A
u
LCD_BL_PWM GPIO2 D6 EV_LVDS_BRIGHT
EV_LVDS_BRIGHT {29}
LCD_VCC GPIO3 C7 EV_LVDS_DIGON
EV_LVDS_DIGON {29}
LCD_BLEN GPIO4 F9 DGPU_BLON
DGPU_BLON {29}
A3 R611 *EV@0_4
o
Reserved GPIO5 VGA_STBY {47}
FB_CLAMP_TGL_REQ GPIO6 A4 FB_CLAMP_TGL_REQ#_Q
3DVision GPIO7 B6 3DVision
OVERT GPIO8 A6 VGA_OVT#
B ALERT GPIO9 F8 VGA_ALERT B
H
C5 NV_MEM_VERF_CTRL
MEM_VREF_CTRL
PWM_VID
GPIO10
GPIO11 E7
B2A
GPU_VID0 {47}
PWM_LEVEL GPIO12 D7 VGA_PWR_LEVEL
VGA_PWR_LEVEL {37}
PSI B4 VGA_PSI R631 EV@10K_4
t
GPIO13 +3V_GPU
GPU_PSI {47}
u
FRM_CLK GPIO16 D5 GPU_GPIO16 TP13
Reserved GPIO20 E6 TP17
GPIO21 C4 TP60
Reserved
GPIO PU/PD
y o DGPU_PWR_EN {10}
B2A +3V_GPU
a
VGA_PWR_LEVEL R251 EV@100K_4
2
PEGX_RST# {16}
VGA_OVT# R612 EV@100K_4
2
L
FB_CLAMP_RR 3 1 FB_CLAMP
C VGA_ALERT R252 EV@100K_4 C
VGA_OVT# 1 3 S5_ON {3,37,41} GC6@ME2303T1
Q50 FB_CLAMP_TGL_REQ#_Q R646 GC6@10K_4
Q49 *EV@ME2N7002E_200MA
B2A
n
EV_LVDS_BRIGHT R262 OEV@100K_4
SMBUS [Thermal] +3V_GPU +3V_GPU EV_LVDS_DIGON R254 *OEV@100K_4
u
+3V_GPU
DGPU_BLON R256 *OEV@100K_4
R268 R267 JTAG_TRST# R532 EV@10K_4
2
Y
EV@10K_4 EV@10K_4 FB_CLAMP_RR R648 GC6@10K_4
2
FB_CLAMP_TGL_REQ#_Q 1 3 3DVision R791 *EV@100K_4

FB_CLAMP_TGL_REQ# {37}
NV_MEM_VERF_CTRL R792 *EV@100K_4
g
6 1 GFx_SCL 3 4 GFx_SDA Q51 GC6@ME2N7002E_200MA
{31,37} 3ND_MBCLK {31,37} 3ND_MBDATA
Q30A EV@2N7002KDW_115MA Q30B EV@2N7002KDW_115MA
B2A
i a n Quanta Computer Inc.

PROJECT :Chief River
D
X
A1A
N14x (GPIO)
r
1 2 3 4 5 6 7 8
Fo
5 4 3 2 1
U24L
E10
F10
GF119 (N14M_GL) GK208(N14P_GV2)
VMON_IN0
VMON_IN1
NC
NC ROM_CS D12 ROM_CS TP16
21
ROM_SI B12 ROM_SI TP64
ROM_SO A12 ROM_SO TP63
STRAP0 D1 C12 ROM_SCLK TP62
STRAP1 D2
STRAP0
STRAP1 MISC 2 ROM_SCLK
MULT STRIP [N14P_GV2]
STRAP2 E4
e
STRAP2
STRAP3 E3 STRAP3
STRAP4 D3 STRAP4 0x1292 -->QS
PCI_DEVID STRAP PCI DEVICE ID 0x12AD -->ES DP_PLL_VDD33 1 [Default]
s
GF119 (N14M_GL) GK208(N14P_GV2)
D
PCIE PLL termination D
C1 STRAP5 NC RAM_CFG RAM_CFG[3:0] for memory configuration PEX_PLL_EN_TERM 0:Disable [Default] ; 1:Enable
BUFRST D11
MSTRAP_REF0_GND F6 MULTISTRAP_REF0_GND PGOOD D10 NV_PWG SUB_VENDOR 0:No VBIOS ROM ; 1 BIOS ROM [Default] 3GIO_PADCFG [0000] --> Gen3 support
NC
GF119 (N14M_GL) GK208(N14P_GV2) GK208 GF119
U
(N14P_GV2)(N14M_GL) FB[1:0] [1:0] --> 256MB PCIE_MAX_SPEED [1] -->Allow boot to PCIE Gen3
F4 MULTISTRAP_REF1_GNDNC R257
NC CEC E9 EV@10K_4
F5 MULTISTRAP_REF2_GNDNC VGA_DEVICE 0:3D Device ; 1:VGA Device PCIE_SPEED_CHANG_ GEN3 [1] -->Enable Gen3
GK208 GF119
(N14P_GV2)(N14M_GL) SOR0_EXP=0,SOR1_EXP=1
I2CS_Slave Address 0:9E [Default] ; 1:9C SORx_EXPOSED [IFPA/B:LVDS] ; [IFPC:HDMI]
e
USER STRAP Panel EDID Support
s
Strap Pin name Strapping Bits 3 Strapping Bits 2 Strapping Bits 1 Strapping Bits 0 SETTING NOTE
Vendor P/N STN B/S P/N Size Strap Note ROM_SCLK
u
ROM_SCLK PCI_DEVID[4] SUB_VENDER PCI_DEVID[5] PEX_PLL_EN_TERM
+3V_GPU R639 GV2@4.99K/F_4 R623 *15K/F_4
H5TQ2G63DFR-N0C GL:0x06 GV2:0x06
H1
x4=1GB 1000MHz ROM_SI

N14P_GV2 H1/H2 S1/S2 M1/M2 S3 M3
(128M*16) GL/GV2 0110 0110 ROM_SI RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]
R642 *15K/F_4 R626 Strap_GV2@15K/F_4 34.8K 45.3K 30.1K 20K 10K
o
+3V_GPU
GV2:0x06 ROM_SO
B2A Co-Lay ROM_SI CS33482FB22 CS34532FB18 CS33012FB18 CS32002FB29 CS31002FB26
x8=2GB 1000MHz ROM_SO FB[1] FB[0] SMB_ALT_ADDR VGA_DEVICE +3V_GPU R793 PIV_GV2@4.99K/F_4
0110 +3V_GPU R641 OEV_GV2@10K/F_4 R625 *15K/F_4
Hynix
STRAP0
H5TQ2G63DFR-11C GL:0x06 GV2:0x06 STRAP0 USER[3] USER[2] USER[1] USER[0]
H2
H
x4=1GB 900MHz +3V_GPU R605 GV2@45.3K/F_4 R606 *15K/F_4
(128M*16) GL/GV2 0110 0110
STRAP1
C STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0] C
GV2:0x06 +3V_GPU R609 *15K/F_4 R610 GV2@45.3K/F_4
x8=2GB 900MHz
t
0110 STRAP2
STRAP2 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
+3V_GPU R578 *15K/F_4 R584 GV2@15K/F_4
128M (2G bit)
K4W2G1646E-BC1A GL:0x05 GV2:0x07

S1
x4=1GB 1000MHz
(128M*16) GL/GV2
u
0101 0111 STRAP3 SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
STRAP3
Samsung
GV2:0x07 +3V_GPU R587 *15K/F_4 R588 OEV_GV2@15K/F_4

x8=2GB 1000MHz
0111
o
STRAP3
K4W2G1646E-BC11 GL:0x05 GV2:0x07
S2
x4=1GB 900MHz +3V_GPU R597 *15K/F_4 R598 PIV_GV2@4.99K/F_4

(128M*16) GL/GV2 0101 0111
y
GV2:0x07 STRAP4
x8=2GB 900MHz
0111 R620 *15K/F_4 R630 GV2@45.3K/F_4
a
+3V_GPU
STRAP4 RESERVED PCIE_SPEED_CHAN PCIE_MAX_SPEED DP_PLL_VDD33V
CE_GEN3
MT41J128M16JT-107G:K GL:0x01 GV2:0x05
x4=1GB 900MHz 4.99K 1000 0000 24.9K 1100 0100
M1
(128M*16) GL/GV2 0001 0101

10K 1001 0001 30.1K 1101 0101
L
GV2:0x05 15K 1010 0010 34.8K 1110 0110 MSTRAP_REF0_GND R235 GV2@40.2K/F_4
Micron
x8=2GB 900MHz
0101 20K 1011 0011 45.3K 1111 0111
Resistor Value VDD33 GND Resistor Value VDD33 GND
MT41J128M16JT-093G:K GL:0x01 GV2:0x05
x4=1GB 1000MHz
M2
(128M*16) GL/GV2
n
0001 0101
B
Binary Strap [N14M_GL] B
GV2:0x05
x8=2GB 1000MHz Strap Pin name Strap Mapping Polarity SETTING
u
0101
ROM_SCLK
Pull-down to GND
Micron
MT41K256M16HA-107G:E GL:0x0D GV2:0x01 ROM_SCLK SMB_ALT_ADDR R638 *10K_4 R622 GL@10K_4

M3
+3V_GPU
x4=2GB 900MHz N14M_GL Strap3 Strap2 Strap1 Strap0
(256M*16) GL/GV2 1101 0001
ROM_SI SUB_VENDER Pull-UP to 3V3 if VBIOS ROM Exists ROM_SI H1 D0 C1 B1 A0
Y
GV2:0x01 Pull-down to GND if no VBIO ROM +3V_GPU R643 *10K_4 R627 GL@10K_4 H2 D0 C1 B1 A0
x8=4GB 900MHz
0001 ROM_SO H3 D0 C0 B1 A1
ROM_SO VGA_DEVICE Pull-down to GND ( no dispaly )
256M (4Gbit)
+3V_GPU R640 *10K_4 R624 GL@10K_4 H4 D0 C1 B0 A0

Samsung
g
K4W4G1646B-HC11 GL:0x0B GV2:0x03
S3
x4=2GB 900MHz STRAP0 S1 D0 C1 B0 A1

(256M*16) GL/GV2 1011 0011 STRAP0 RAMCFG[0] USER defined A1 A0
+3V_GPU R601 Strap_GL@10K_4 R602 Strap_GL@10K_4 S2 D0 C1 B0 A1
GV2:0x03 STRAP1 S3 D1 C0 B1 A1
n
x8=4GB 900MHz STRAP1 RAMCFG[1] USER defined B1 B0
0011 +3V_GPU R616 Strap_GL@10K_4 R617 Strap_GL@10K_4 M1 D0 C0 B0 A1
STRAP2 M2 D0 C0 B0 A1
a
H5TQ4G63MFR-11C GL:0x03 STRAP2 RAMCFG[2] USER defined C1 C0
H3
x4=2GB 900MHz +3V_GPU R583 Strap_GL@10K_4 R579 Strap_GL@10K_4 M3 D1 C1 B0 A1

(256M*16) GL 0011
i
STRAP3
STRAP3 RAMCFG[3] USER defined D1 D0
+3V_GPU R592 Strap_GL@10K_4 R593 Strap_GL@10K_4
Hynix
N/A
STRAP4 PCIE_MAX_SPEED Pull-down to GND STRAP4 R621 GL@10K_4
H5TQ4G63AFR-11C GL:0x04
H4
X
x4=2GB 900MHz
(256M*16) GL 0100
A A
N/A

F
A1A
MSIC & STRAP
5 4 3 2 1
+VGPU_CORE
A2
AB17
AB20
AB24
AC2
U24F
GND
GND
GND
GND
GND
GND
GND
GND
GND
M13
M15
M17
N10
N12
22
NVDD = 34~55 A GND GND
AC22 N14
U24E U24C VDD33 = 85mA AC26
GND
GND
GND
GND N16
B2A XVDD/VDD33 AC5 GND GND N18
C290 EV@0.1U/10V_4X K10 VDD AC8 GND GND P11
e
C312 *EV@0.1U/10V_4X K12 VDD AD10 NC VDD33 G10 AD12 GND GND P13
+3V_GPU
C289 EV@0.1U/10V_4X K14 AD7 G12 AD13 P15
C318 EV@0.1U/10V_4X K16
VDD
VDD NVVDD B19
NC
NC
VDD33
VDD33 G8 A26
GND
GND
GND
GND P17
C323 EV@0.1U/10V_4X K18 VDD VDD33 G9 AD15 GND GND P2
s
C297 EV@4.7U/6.3V_6X L11 VDD AD16 GND GND P23
C363 EV@4.7U/6.3V_6X L13 VDD F11 3V3AUX C360 EV@4.7U/6.3V_6X AD18 GND GND P26
NC
C368 EV@4.7U/6.3V_6X L15 VDD AD19 GND GND P5
C362 EV@4.7U/6.3V_6X L17 VDD V5 NC_V5 C637 EV@1U/10V_6X AD21 GND GND R10
C366 EV@4.7U/6.3V_6X M10 VDD V6 NC_V6 AD22 GND GND R12
C300 EV@4.7U/6.3V_6X M12 VDD AE11 GND GND R14
C296 EV@4.7U/6.3V_6X M14 VDD GF119 GK208 C326 EV@0.1U/10V_4X AE14 GND GND R16
U
C302 EV@4.7U/6.3V_6X M16 VDD (N14M-GL) (N14P-GV2) C337 EV@0.1U/10V_4X B2A AE17 GND GND R18
C298 EV@4.7U/6.3V_6X M18 VDD C639 *EV@0.1U/10V_4X AE20 GND GND T11
C319 EV@4.7U/6.3V_6X N11 C325 EV@0.1U/10V_4X AB11 T13
N13
VDD
VDD
* nc on substrate AF1
GND
GND
GND
GND T15
N15 VDD AF11 GND GND T17
N17 VDD AF14 GND GND U10
P10 G1 AF17 U12
e
VDD NC_G1 GND GND
P12 VDD G2 NC_G2 AF20 GND GND U14
s
R11 VDD G6 NC_G6 AG2 GND GND U23
C367 EV@10U/6.3V_6X R13 VDD G7 NC_G7 AG26 GND GND U26
C230 EV@10U/6.3V_8X R15 VDD AB14 GND GND U5
R17 VDD B1 GND GND V11
u
C313 EV@4.7U/10V_6X T10 VDD V1 NC_V1 B11 GND GND V13
C232 EV@4.7U/10V_6X T12 VDD V2 NC_V2 B14 GND GND V15
C310 EV@4.7U/10V_6X T14 VDD B17 GND GND V17
C364 EV@4.7U/10V_6X T16 VDD B20 GND GND Y2
C301 EV@4.7U/10V_6X T18 VDD B23 GND GND Y23
o
U11 VDD B27 GND GND Y26
U13 VDD W1 NC_W1 B5 GND GND Y5
U15 VDD W2 NC_W2 B8 GND
U17 VDD W3 NC_W3 E11 GND
V10 VDD W4 NC_W4 E14 GND
V12 VDD E17 GND
V14 E2
H
VDD GND
V16 VDD
bga595-nvidia-n13p-gv2-s-a2 COMMON E20 GND
V18 VDD E22 GND
E25 GND
E5 GND
bga595-nvidia-n13p-gv2-s-a2 E8 GND
t
COMMON H2 GND
H23 GND
H25 GND
H5 GND
K11
u
GND
K13 GND
K15 GND
K17 GND
L10
Power down GND
o
L12 GND
L14
sequence L16
GND
GND
L18 GND
L2 GND
y
L23 GND
L25 GND
L5 AA7
for meet Power down sequence for +3V_GFX M11
GND
GND
GND
GND AB7
a
+VGPU_CORE D3 EV@RB500V-40_100MA
+3V_GPU
L
+1.5V_GPU D4 NGC6@RB500V-40_100MA
GC6 no stuff B2B
+3V +3V_GPU
un VDD33
+3.3V_GFX
Power up
sequence
Y
+1.5V_GPU DGPU_PGOK-1 R127
R136 EV@4.7K_4 NVVDD t>0
3
EV@4.7K_4
R131 *EV@4.7K_4 DGPU_POK4 2 Q16 +VCC_DGFX_CORE
*EV@METR3904-G_200MA t>0
DGPU_PWROK {11,16,37}
g
FBVDDQ
1
C191
+1.5V_GFX
3
*EV@1000P/50V_4X
R124 EV@0_4 2 Q14 R128 PEX_VDD t>0
n
EV@LTC044EUBFS8TL_30MA EV@100K/F_4
+1.05V_GFX
+1.05V_GPU
t>=0
1
C198 IFP(CDEF)_IOVDD
3
a
EV@1000P/50V_4X
R132 EV@4.7K_4 DGPU_POK2 2 Q15 +1.05V_GFX
EV@METR3904-G_200MA
i
1
C192
*EV@1000P/50V_4X
r X
N14x (Power/GND) A1A
5 4 3 2 1
{17,24} VMA_DQ[63..0]
{17,24} VMA_DM[7..0]
{17,24} VMA_WDQS[7..0]
{17,24} VMA_RDQS[7..0] DataBus [0:31]
RANK0: 256MB/512MB DDR3
DataBus [64:32]
23
e
VRAM7 VRAM8 VRAM6 VRAM5
VREFC_VMA1 M8 E3 VMA_DQ13 VREFC_VMA1 M8 E3 VMA_DQ25 VREFC_VMA3 M8 E3 VMA_DQ40 VREFC_VMA3 M8 E3 VMA_DQ62
s
{24} VREFC_VMA1 H1 VREFCA DQL0 F7 H1 VREFCA DQL0 F7 {24} VREFC_VMA3 H1 VREFCA DQL0 F7 H1 VREFCA DQL0 F7
VREFD_VMA1 VMA_DQ9 VREFD_VMA1 VMA_DQ28 VREFD_VMA3 VMA_DQ45 VREFD_VMA3 VMA_DQ59
{24} VREFD_VMA1 VREFDQ DQL1 F2 VREFDQ DQL1 F2 {24} VREFD_VMA3 VREFDQ DQL1 F2 VREFDQ DQL1 F2
D VMA_DQ14 VMA_DQ27 VMA_DQ42 VMA_DQ60 D
N3 DQL2 F8 VMA_DQ8 FBA_CMD7 N3 DQL2 F8 VMA_DQ29 FBA_CMD7 N3 DQL2 F8 VMA_DQ46 FBA_CMD7 N3 DQL2 F8 VMA_DQ56
{17,24} FBA_CMD7 P7 A0 DQL3 H3 P7 A0 DQL3 H3 P7 A0 DQL3 H3 P7 A0 DQL3 H3
VMA_DQ12 FBA_CMD10 VMA_DQ26 FBA_CMD10 VMA_DQ43 FBA_CMD10 VMA_DQ61
{17,24} FBA_CMD24 N2 A2 DQL5 G2 N2 A2 DQL5 G2 N2 A2 DQL5 G2 N2 A2 DQL5 G2
U
{17,24} FBA_CMD22 P2 A4 DQL7 P2 A4 DQL7 P2 A4 DQL7 P2 A4 DQL7
FBA_CMD26 FBA_CMD26 FBA_CMD26
{17,24} FBA_CMD26 R8 A5 R8 A5 R8 A5 R8 A5
{17,24} FBA_CMD5 R2 A6 D7 R2 A6 D7 R2 A6 D7 R2 A6 D7
{17,24} FBA_CMD21 T8 A7 DQU0 C3 T8 A7 DQU0 C3 T8 A7 DQU0 C3 T8 A7 DQU0 C3
{17,24} FBA_CMD8 R3 A8 DQU1 C8 R3 A8 DQU1 C8 R3 A8 DQU1 C8 R3 A8 DQU1 C8
{17,24} FBA_CMD4 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
e
L7 C2 VMA_DQ2 FBA_CMD25 L7 C2 VMA_DQ21 FBA_CMD25 L7 C2 VMA_DQ38 FBA_CMD25 L7 C2 VMA_DQ51
{17,24} FBA_CMD25 R7 A10/AP DQU3 A7 R7 A10/AP DQU3 A7 R7 A10/AP DQU3 A7 R7 A10/AP DQU3 A7
{17,24} FBA_CMD23 N7 A11 DQU4 A2 N7 A11 DQU4 A2 N7 A11 DQU4 A2 N7 A11 DQU4 A2
{17,24} FBA_CMD9 T3 A12/BC DQU5 B8 T3 A12/BC DQU5 B8 T3 A12/BC DQU5 B8 T3 A12/BC DQU5 B8
s
{17,24} FBA_CMD12 T7 A13 DQU6 A3 T7 A13 DQU6 A3 T7 A13 DQU6 A3 T7 A13 DQU6 A3
{17,24} FBA_CMD14 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7
A15 A15 A15 A15
u
M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2
{17,24} FBA_CMD29 N8 BA0 VDD#B2 D9 +1.5V_GPU N8 BA0 VDD#B2 D9 N8 BA0 VDD#B2 D9 +1.5V_GPU N8 BA0 VDD#B2 D9
{17,24} FBA_CMD13 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7
{17} FBA_CMD27 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
o
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
J7 VDD#N1 N9 VMA_CLK0 J7 VDD#N1 N9 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9
{17,24} VMA_CLK0 CK VDD#N9 CK VDD#N9 {17,24} VMA_CLK1 CK VDD#N9 CK VDD#N9
K7 R1 VMA_CLK0# K7 R1 K7 R1 VMA_CLK1# K7 R1
{17,24} VMA_CLK0# CK VDD#R1 CK VDD#R1 {17,24} VMA_CLK1# CK VDD#R1 CK VDD#R1 +1.5V_GPU
K9 R9 FBA_CMD3 K9 R9 K9 R9 FBA_CMD19 K9 R9
{17,24} FBA_CMD3 CKE VDD#R9 CKE VDD#R9 +1.5V_GPU {17,24} FBA_CMD19 CKE VDD#R9 CKE VDD#R9
H
K1 A1 FBA_CMD0 K1 A1 K1 A1 FBA_CMD16 K1 A1
{17,24} FBA_CMD0 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8 {17,24} FBA_CMD16 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8
FBA_CMD2 FBA_CMD18
{17} FBA_CMD2 J3 CS VDDQ#A8 C1 J3 CS VDDQ#A8 C1 {17} FBA_CMD18 J3 CS VDDQ#A8 C1 J3 CS VDDQ#A8 C1
{17,24} FBA_CMD11 K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9
{17,24} FBA_CMD15 L3 CAS VDDQ#C9 D2 L3 CAS VDDQ#C9 D2 L3 CAS VDDQ#C9 D2 L3 CAS VDDQ#C9 D2
t
C {17,24} FBA_CMD28 WE VDDQ#D2 E9 WE VDDQ#D2 E9 WE VDDQ#D2 E9 WE VDDQ#D2 E9 C
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
VMA_WDQS1 F3 VDDQ#F1 H2 VMA_WDQS3 F3 VDDQ#F1 H2 VMA_WDQS5 F3 VDDQ#F1 H2 VMA_WDQS7 F3 VDDQ#F1 H2
VMA_RDQS1 G3 DQSL VDDQ#H2 H9 VMA_RDQS3 G3 DQSL VDDQ#H2 H9 VMA_RDQS5 G3 DQSL VDDQ#H2 H9 VMA_RDQS7 G3 DQSL VDDQ#H2 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9
VMA_DM1
VMA_DM0
VMA_WDQS0
VMA_RDQS0
E7
D3
C7
B7
DML
DMU
DQSU
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
A9
B3
E1
G8
J2
J8
M1
VMA_DM3
VMA_DM2
VMA_WDQS2
VMA_RDQS2
E7
D3
C7
B7
DML
DMU
DQSU
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
A9
B3
E1
G8
J2
J8
M1
u
VMA_DM5
VMA_DM4
o
VMA_WDQS4
VMA_RDQS4
E7
D3
C7
B7
DML
DMU
DQSU
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
A9
B3
E1
G8
J2
J8
M1
VMA_DM7
VMA_DM6
VMA_WDQS6
VMA_RDQS6
E7
D3
C7
B7
DML
DMU
DQSU
DQSU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
A9
B3
E1
G8
J2
J8
M1
y
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9
{17,24} FBA_CMD20 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1
a
VMA_ZQ1 L8 VSS#T1 T9 VMA_ZQ2 L8 VSS#T1 T9 VMA_ZQ3 L8 VSS#T1 T9 VMA_ZQ4 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#B9 D1
L
Should be 240 R647 Should be 240 R650 Should be 240 R561 Should be 240 R534
EV@243/F_4 VSSQ#D1 D8 EV@243/F_4 VSSQ#D1 D8 EV@243/F_4 VSSQ#D1 D8 EV@243/F_4 VSSQ#D1 D8
Ohms +-1% VSSQ#D8 Ohms +-1% VSSQ#D8 Ohms +-1% VSSQ#D8 Ohms +-1% VSSQ#D8
E2 E2 E2 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
n
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
EV@VRAM _DDR3_HYNIX_128MX16 EV@VRAM _DDR3_HYNIX_128MX16 EV@VRAM _DDR3_HYNIX_128MX16 EV@VRAM _DDR3_HYNIX_128MX16
u
B B
CLK-A0 Termination MEM Reference Voltage (Low) CLK-A1 Termination MEM Reference Voltage (High Bus)
+1.5V_GPU +1.5V_GPU
Y
VMA_CLK0 +1.5V_GPU +1.5V_GPU VMA_CLK1
R231 EV@162/F_4 VMA_CLK0# R214 EV@162/F_4 VMA_CLK1# R135 R535
g
R652 R282 EV@1.33K/F_4 EV@1.33K/F_4
EV@1.33K/F_4 EV@1.33K/F_4
R227 R228 R218 R219 VREFC_VMA3 VREFD_VMA3

*EV@121/F_4 *EV@121/F_4 VREFC_VMA1 VREFD_VMA1 *EV@121/F_4 *EV@121/F_4
n
R134 C632 R169 C307
R651 C658 R283 C674 EV@1.33K/F_4 EV@0.1U/10V_4X EV@1.33K/F_4 EV@0.1U/10V_4X
C324 EV@1.33K/F_4 EV@0.1U/10V_4X EV@1.33K/F_4 EV@0.1U/10V_4X C314
a
*EV@0.01U/25V_4X *EV@0.01U/25V_4X
VRAM De-Coupling
+1.5V_GPU
C659
C657
EV@1U/6.3V_4X
EV@1U/6.3V_4X
Xi +1.5V_GPU
C673
C598
EV@1U/6.3V_4X
EV@1U/6.3V_4X
+1.5V_GPU
C577
C677
EV@1U/6.3V_4X
EV@1U/6.3V_4X
+1.5V_GPU
C580
C576
EV@1U/6.3V_4X
EV@1U/6.3V_4X
r
C655 EV@1U/6.3V_4X C654 EV@1U/6.3V_4X C631 EV@1U/6.3V_4X C574 EV@1U/6.3V_4X
A A
C672 EV@1U/6.3V_4X C683 EV@1U/6.3V_4X C579 EV@1U/6.3V_4X C630 EV@1U/6.3V_4X
o
C656 EV@0.1U/10V_4X C684 EV@0.1U/10V_4X C652 EV@0.1U/10V_4X C578 EV@0.1U/10V_4X
C679 EV@0.1U/10V_4X C686 EV@0.1U/10V_4X C651 EV@0.1U/10V_4X C612 EV@0.1U/10V_4X
F
A1A
N14x (DDR/Rank0)
5 4 3 2 1
RANK1: 256MB/512MB DDR3
{17,23} VMA_DQ[63..0]
{17,23} VMA_DM[7..0]
24
{17,23} VMA_WDQS[7..0]
{17,23} VMA_RDQS[7..0]
DataBus [0:31] DataBus [64:32]

VRAM3 VRAM4 VRAM2 VRAM1
e
VREFC_VMA1 M8 E3 VMA_DQ13 VREFC_VMA1 M8 E3 VMA_DQ25 VREFC_VMA3 M8 E3 VMA_DQ40 VREFC_VMA3 M8 E3 VMA_DQ62
{23} VREFC_VMA1 VREFCA DQL0 VREFCA DQL0 {23} VREFC_VMA3 VREFCA DQL0 VREFCA DQL0
VREFD_VMA1 H1 F7 VMA_DQ9 VREFD_VMA1 H1 F7 VMA_DQ28 VREFD_VMA3 H1 F7 VMA_DQ45 VREFD_VMA3 H1 F7 VMA_DQ59
{23} VREFD_VMA1 VREFDQ DQL1 VREFDQ DQL1 {23} VREFD_VMA3 VREFDQ DQL1 VREFDQ DQL1
F2 VMA_DQ14 F2 VMA_DQ27 F2 VMA_DQ42 F2 VMA_DQ60
s
N3 DQL2 F8 VMA_DQ8 FBA_CMD9 N3 DQL2 F8 VMA_DQ29 FBA_CMD9 N3 DQL2 F8 VMA_DQ46 FBA_CMD9 N3 DQL2 F8 VMA_DQ56
{17,23} FBA_CMD10 N2 A2 DQL5 G2 N2 A2 DQL5 G2 N2 A2 DQL5 G2 N2 A2 DQL5 G2
{17,23} FBA_CMD26 P2 A4 DQL7 P2 A4 DQL7 P2 A4 DQL7 P2 A4 DQL7
U
{17,23} FBA_CMD22 R8 A5 R8 A5 R8 A5 R8 A5
{17,23} FBA_CMD21 R2 A6 D7 R2 A6 D7 R2 A6 D7 R2 A6 D7
{17,23} FBA_CMD5 T8 A7 DQU0 C3 T8 A7 DQU0 C3 T8 A7 DQU0 C3 T8 A7 DQU0 C3
{17,23} FBA_CMD8 R3 A8 DQU1 C8 R3 A8 DQU1 C8 R3 A8 DQU1 C8 R3 A8 DQU1 C8
{17,23} FBA_CMD23 L7 A9 DQU2 C2 L7 A9 DQU2 C2 L7 A9 DQU2 C2 L7 A9 DQU2 C2
{17,23} FBA_CMD28 R7 A10/AP DQU3 A7 R7 A10/AP DQU3 A7 R7 A10/AP DQU3 A7 R7 A10/AP DQU3 A7
{17,23} FBA_CMD4 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
e
N7 A2 VMA_DQ3 FBA_CMD7 N7 A2 VMA_DQ22 FBA_CMD7 N7 A2 VMA_DQ37 FBA_CMD7 N7 A2 VMA_DQ50
{17,23} FBA_CMD7 T3 A12/BC DQU5 B8 T3 A12/BC DQU5 B8 T3 A12/BC DQU5 B8 T3 A12/BC DQU5 B8
{17,23} FBA_CMD14 T7 A13 DQU6 A3 T7 A13 DQU6 A3 T7 A13 DQU6 A3 T7 A13 DQU6 A3
{17,23} FBA_CMD12 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7
s
A15 A15 A15 A15
M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2

{17,23} FBA_CMD29 N8 BA0 VDD#B2 D9 +1.5V_GPU N8 BA0 VDD#B2 D9 N8 BA0 VDD#B2 D9 +1.5V_GPU N8 BA0 VDD#B2 D9
{17,23} FBA_CMD6 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
u
M3 G7 FBA_CMD30 M3 G7 FBA_CMD30 M3 G7 FBA_CMD30 M3 G7
{17} FBA_CMD30 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
J7 VDD#N1 N9 VMA_CLK0 J7 VDD#N1 N9 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9
o
{17,23} VMA_CLK0 CK VDD#N9 CK VDD#N9 {17,23} VMA_CLK1 CK VDD#N9 CK VDD#N9
{17,23} VMA_CLK0#
K7 R1 VMA_CLK0# K7 R1 {17,23} VMA_CLK1#
K7 R1 VMA_CLK1# K7 R1
K9 CK VDD#R1 R9 FBA_CMD3 K9 CK VDD#R1 R9 K9 CK VDD#R1 R9 FBA_CMD19 K9 CK VDD#R1 R9 +1.5V_GPU
{17,23} FBA_CMD3 CKE VDD#R9 CKE VDD#R9 +1.5V_GPU {17,23} FBA_CMD19 CKE VDD#R9 CKE VDD#R9
K1 A1 FBA_CMD0 K1 A1 K1 A1 FBA_CMD16 K1 A1
{17,23} FBA_CMD0 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8 {17,23} FBA_CMD16 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8
FBA_CMD1 FBA_CMD17
H
{17} FBA_CMD1 J3 CS VDDQ#A8 C1 J3 CS VDDQ#A8 C1 {17} FBA_CMD17 J3 CS VDDQ#A8 C1 J3 CS VDDQ#A8 C1
{17,23} FBA_CMD11 K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9
{17,23} FBA_CMD15 L3 CAS VDDQ#C9 D2 L3 CAS VDDQ#C9 D2 L3 CAS VDDQ#C9 D2 L3 CAS VDDQ#C9 D2
{17,23} FBA_CMD25 WE VDDQ#D2 E9 WE VDDQ#D2 E9 WE VDDQ#D2 E9 WE VDDQ#D2 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
t
VMA_WDQS1 F3 VDDQ#F1 H2 VMA_WDQS3 F3 VDDQ#F1 H2 VMA_WDQS5 F3 VDDQ#F1 H2 VMA_WDQS7 F3 VDDQ#F1 H2
VMA_RDQS1 G3 DQSL VDDQ#H2 H9 VMA_RDQS3 G3 DQSL VDDQ#H2 H9 VMA_RDQS5 G3 DQSL VDDQ#H2 H9 VMA_RDQS7 G3 DQSL VDDQ#H2 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9
u
VMA_DM1 E7 A9 VMA_DM3 E7 A9 VMA_DM5 E7 A9 VMA_DM7 E7 A9
VMA_DM0 D3 DML VSS#A9 B3 VMA_DM2 D3 DML VSS#A9 B3 VMA_DM4 D3 DML VSS#A9 B3 VMA_DM6 D3 DML VSS#A9 B3
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
VMA_WDQS0 C7 VSS#G8 J2 VMA_WDQS2 C7 VSS#G8 J2 VMA_WDQS4 C7 VSS#G8 J2 VMA_WDQS6 C7 VSS#G8 J2
o
VMA_RDQS0 B7 DQSU VSS#J2 J8 VMA_RDQS2 B7 DQSU VSS#J2 J8 VMA_RDQS4 B7 DQSU VSS#J2 J8 VMA_RDQS6 B7 DQSU VSS#J2 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
y
T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9
{17,23} FBA_CMD20 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1
VMA_ZQ5 L8 VSS#T1 T9 VMA_ZQ6 L8 VSS#T1 T9 VMA_ZQ7 L8 VSS#T1 T9 VMA_ZQ8 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
a
B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R232 VSSQ#B9 D1 R258 VSSQ#B9 D1 R168 VSSQ#B9 D1 R133 VSSQ#B9 D1
Should be 240 VSSQ#D1 Should be 240 VSSQ#D1 Should be 240 VSSQ#D1 Should be 240 VSSQ#D1
Ohms +-1% GV2_8@243/F_4 D8 Ohms +-1% GV2_8@243/F_4 D8 Ohms +-1% GV2_8@243/F_4 D8 Ohms +-1% GV2_8@243/F_4 D8
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
L
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
n
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
GV2_8@VRAM _DDR3_HYNIX_128MX16 GV2_8@VRAM _DDR3_HYNIX_128MX16 GV2_8@VRAM _DDR3_HYNIX_128MX16 GV2_8@VRAM _DDR3_HYNIX_128MX16
u
VRAM De-Coupling
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
C333 GV2_8@1U/6.3V_4X C357 GV2_8@1U/6.3V_4X C194 GV2_8@1U/6.3V_4X C306 GV2_8@1U/6.3V_4X
Y
g
C355 GV2_8@0.1U/10V_4X C371 GV2_8@0.1U/10V_4X C308 GV2_8@0.1U/10V_4X C193 GV2_8@0.1U/10V_4X
n
C356 GV2_8@0.1U/10V_4X C374 GV2_8@0.1U/10V_4X C305 GV2_8@0.1U/10V_4X C195 GV2_8@0.1U/10V_4X
i a
r X
Fo Size
Date:
Document Number
N14x (DDR/Rank1)
Wednesday, January 16, 2013 Sheet 24 of 50
Rev
A1A
25
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A1A
Thames_M2/ MEM Interface
http://sualaptop365.edu.vn Date: Wednesday, January 16, 2013 Sheet 25 of 50

5 4 3 2 1
26
D
s e D
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B
L a B
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A
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r X Size Document Number

VRAM_A: DDR3*4PCS
Rev
A1A
o
5 4 3 2 1
F
5 4 3 2 1
S3 power Reduction (SM_DRAMRST#) <S3P> S3 power Reduction (SM_DRAMPWROK) <S3P> 27

+1.5VSUS +3V_S5
e
R151 R161 NS3@0_4 +1.5V_CPU
1K/F_4 C235
s
S3@0.1U/10V_4X
D D
{14,15} DDR3_DRAMRST# R150 1K/F_4 DDR3_DRAMRST#_R 3 1

CPU_DRAMRST# {3}
R143
5
Q22 U7 200/F_4
S3@ME2N7002E_200MA {8} SYS_PWROK_R 2
2
{6} DRAMRST_CNTRL DRAMRST_CNTRL 4 PM_DRAM_PWRGD_Q R147 130/F_4 PM_DRAM_PWRGD_R PM_DRAM_PWRGD_R {3}
1
U
{8} PM_DRAM_PWRGD
R173
C239 S3@4.99K/F_4 S3@TC7SH08FU(F)
3
{10} DRAMRST_CNTRL_PCH R171 NDS3@0_4 S3@0.047U/10V_4X R153 *S3@39/F_4 3 1
{37} EC_DRAMRST_CTRL R162 DS3@0_4 Q23 *S3@2N7002K_300MA
2
e
MAINON_ON_G {27,46}
R176 NS3@0_4
+3VPCU
s
R154 DS3@1K_4 EC_DRAMRST_CTRL
For S3 power Reduction Sequence <S3P> S3 power Reduction (CPU Power) <S3P>
o u
H
+3V_S5 +1.5V_CPU
C R167 NS3@0_6 C
+3V_S5
t
R155
5
R148 5A
2 S3@10K_4
MAINON {37,43,46}
{42} S3_1.5V R159 S3@100K_4 4 S3@10K_4
u
1 +SMDDR_VREF +VDDR_REF_CPU +1.5VSUS +1.5V_CPU
3
3
U8 S3@TC7SH08FU(F) R96 NS3@0_1206
3
R62 NS3@0_8 R101 NS3@0_1206
o
5 2 R139 S3@1K_4
Q18B Q21 Q7B C148 S3@0.1U/10V_4X

S3@2N7002KDW_115MA S3@FDV301N_200MA 3 4
4 C204 C119 S3@0.1U/10V_4X
1
y
6
*S3@0.1U/10V_4X S3@2N7002KDW_115MA
C139 S3@0.1U/10V_4X
5
2 MAINON_ON_G {27,46} {41,42,46} MAIND MAIND R53
100K_4 C130 S3@0.1U/10V_4X
Q18A
a
S3@2N7002KDW_115MA
1
6
5 4
2
1
L
Q13
S3@AO6402A
3
MAIND
C170 R130
*S3@470P/50V_4X S3@220_8
For S3 power Reduction VTT discharge <S3P>
3
B B
{27,46} MAINON_ON_G
2
u
Q17
S3@ME2N7002E_200MA
1
+SMDDR_VTERM
Y
R49
S3@22_4
g
6
{27,46} MAINON_ON_G 2 Q7A
n
S3@2N7002KDW_115MA
1
i a
X
A A

PROJECT : BD5
F
1A
S3 power Reduction
5 4 3 2 1
5 4 3 2 1
HDMI Conn <HDM>

28
{8} IV_HDMITX2 IV_HDMITX2 C342 PIHM@0.1U/10V_4X HDMITX2_R
from PCH {8} IV_HDMITX2# IV_HDMITX2# C343 PIHM@0.1U/10V_4X HDMITX2#_R
{18} EXT_HDMITX2P EXT_HDMITX2P C660 OEHM@0.1U/10V_4X
from NV EXT_HDMITX2N C661 OEHM@0.1U/10V_4X
e
{18} EXT_HDMITX2N

from PCH IV_HDMITX1# C352 PIHM@0.1U/10V_4X HDMITX1#_R
s
{8} IV_HDMITX1#
D D
from NV {18} EXT_HDMITX1N EXT_HDMITX1N C668 OEHM@0.1U/10V_4X

from PCH {8} IV_HDMITX0# IV_HDMITX0# C348 PIHM@0.1U/10V_4X HDMITX0#_R
U
from NV {18} EXT_HDMITX0N EXT_HDMITX0N C663 OEHM@0.1U/10V_4X
{8} IV_HDMICLK IV_HDMICLK C353 PIHM@0.1U/10V_4X HDMICLK_R

from PCH {8} IV_HDMICLK# IV_HDMICLK# C354 PIHM@0.1U/10V_4X HDMICLK#_R CN16
{18} EXT_HDMICLK+ EXT_HDMICLK+ C669 OEHM@0.1U/10V_4X 20
EXT_HDMICLK- C670 OEHM@0.1U/10V_4X HDMITX2_R 1 SHELL1
from NV {18} EXT_HDMICLK- D2+
2
e
HDMITX2#_R 3 D2 Shield
HDMITX1_R 4 D2-
5 D1+
HDMITX1#_R 6 D1 Shield
s
HDMITX0_R 7 D1-
8 D0+
HDMITX0#_R 9 D0 Shield 23
HDMICLK_R 10 D0- GND
11 CK+ 22
CK Shield GND
u
HDMICLK#_R 12
13 CK-
14 CE Remote
R794 HM@0_6 HDMI_CON_DDCCLK 15 NC
HDMI_CON_DDCDATA 16 DDC CLK
0.5A DDC DATA
17
o
F3 *HM@SMD1206P110TFT +DDC5V 2 1 *HM@B220LFA-13-F_2A +5V_HDMI 18 GND
+5V +5V
D21 HDMI_CON_HP 19
HP DET 21
U25 SHELL2
3 1 C675 C361 HM@2HE1655-000111F
IN OUT 2
GND *HM@220P/50V_4X HM@0.1U/16V_4Y
H
HM@AP2337 C676 D20
*HM@AZ5125-01J
C678 *HM@0.1U/16V_4Y
C C
*HM@0.1U/16V_4Y
t
B2A
u
HDMI-passive level shift <HMP/HMG>
HDMITX0#_R1 R608 PIHM@680_4 HDMITX0#_R
o
+3V_HDMI HDMITX0_R1 R604 PIHM@680_4 HDMITX0_R
R607 OEHM@499/F_4
R603 OEHM@499/F_4
R571
y
HM@0_6 HDMITX1#_R1 R629 PIHM@680_4 HDMITX1#_R
3
HDMITX1_R1 R619 PIHM@680_4 HDMITX1_R

Q48 R628 OEHM@499/F_4
R618 OEHM@499/F_4
2
a
HDMITX2#_R1 R599 PIHM@680_4 HDMITX2#_R
HM@2N7002K_300MA HDMITX2_R1 R595 PIHM@680_4 HDMITX2_R
R582 R600 OEHM@499/F_4
1
HM@100K_4 R596 OEHM@499/F_4
L
HDMICLK#_R1 R644 PIHM@680_4 HDMICLK#_R
HDMICLK_R1 R636 PIHM@680_4 HDMICLK_R
R645 OEHM@499/F_4
R637 OEHM@499/F_4
n
B B
HDMI-HPD <HMP/HMG> FOR EMI <EMC>
+3V_HDMI +3V_HDMI
u
HDMITX2_R HDMITX1_R
R243 R246
R272 *E@120/F_4 *E@120/F_4
HM@1M_4
2
Q33 HM@2N7002K_300MA HDMITX2#_R HDMITX1#_R
Y
R273 PIHM@0_4 HDMI_CON_HP_PCH_R 1 3 HDMI_CON_HP HDMITX0_R HDMICLK_R
{8} HDMI_CON_HP_PCH
R245 R253
R269 *E@120/F_4 *E@120/F_4
R274 OEHM@0_4 R266
{18} EXT_HDMI_HPD
g
HDMITX0#_R HDMICLK#_R
PIHM@20K_4 OEHM@100K_4
HDMI-SMBus
+3V R278
<HDM>
PIHM@0_4 +3V_HDMI
i a +3V_HDMI +5V
n +3V_HDMI +5V
X
D5 D6
A +3V_GPU R277 OEHM@0_4 HM@RB500V-40_100MA HM@RB500V-40_100MA A
r
R270 R264
HM@2.2K_4 R271 R265
HM@2.2K_4 HM@2.2K_4
HM@2.2K_4
o
2
HDMI_DDCCLK R276 PIHM@0_4 HDMI_DDCCLK_ACT 1 3 HDMI_CON_DDCCLK HDMI_DDCDATA R279 PIHM@0_4 HDMI_DDCDATA_ACT 1 3 HDMI_CON_DDCDATA
{8} HDMI_DDCCLK {8} HDMI_DDCDATA
PROJECT : BD5
F
EV_HDMI_DDCCLK R275 OEHM@0_4 Q31 HM@FDV301N_200MA EV_HDMI_DDCDAT R280 OEHM@0_4 Q32 HM@FDV301N_200MA Size Document Number Rev
{18} EV_HDMI_DDCCLK {18} EV_HDMI_DDCDAT
1A
HDMI CONN
5 4 3 2 1
5 4 3 2 1
Panel backlight control

{37} LVDS_BRIGHT
<LDS>
LVDS_BRIGHT R32 PIV@0_4
LVDS_BRIGHT_I {8}
LCD POWER SWITCH <LDS>
+5V R16
R14
EDP@0_8
LDS@0_8
+LDS_IN
+LCDVCC
HALL Sensor <HSR>
29
+3V
R36 C45 U1
OEV@0_4 B2A 1U/6.3V_4X
6 1 R461 100K_4
IN OUT +3VPCU
DISPON_O 4 2
e
DISPON_O {37} DGPU_BLON {20} IN GND C34 C35
R9 PIV@0_4 3 5 C32
{8} INT_LVDS_DIGON ON/OFF GND 0.1U/16V_4Y *0.01U/25V_4X *10U/6.3V_6X
1 2 LID591#
s
LID591# {37}
R10 OEV@0_4 AP2821KTR-G1
{20} EV_LVDS_DIGON
D
R4 MR1 D
*100K_4 C517 APX9132H AI-TRG
3
R6 R7 0.1U/16V_4Y
U
PIV@100K_4 OEV@100K_4
B2A
B2A
CRT <CRT>
{8} INT_CRT_RED
R547 PICRT@0_4 CRT_R L27 CRT@BLM18BA470SN1D_300MA CRT_R1
s e
16
R549 PICRT@0_4 CRT_G L28 CRT@BLM18BA470SN1D_300MA CRT_G1
{8} INT_CRT_GRN
u
R551 PICRT@0_4 CRT_B L29 CRT@BLM18BA470SN1D_300MA CRT_B1 6
{8} INT_CRT_BLU
CRT_R1 1 11
7
R548 OECRT@0_4 C642 CRT_G1 2 12 CRTDDAT
{19} EXT_CRT_RED +5V_CRT
R542 C644 R543 C645 R545 C629 C626 C617 8
o
R550 OECRT@0_4 CRT@6.8P/50V_4N 2mA CRT_B1 3 13 CRTHSYNC
{19} EXT_CRT_GRN
CRT@150/F_4 CRT@6.8P/50V_4N CRT@150/F_4 CRT@6.8P/50V_4N CRT@150/F_4 CRT@6.8P/50V_4N CRT@6.8P/50V_4N CRT@6.8P/50V_4N D18 CRT@SS14L_1A +5V_CRT1 F2 CRT@SMD1206P110TFT 9
+5V
R552 OECRT@0_4 4 14 CRTVSYNC
{19} EXT_CRT_BLU
10
D19 5 15 CRTDCLK
*CRT@AZ5125-01J
C633 CRT@0.1U/16V_4Y U23 CN15
H
R206 PICRT@0_4 DDCCLK +5V_CRT
1 16 CRTVSYNC
{8} INT_CRT_DDCCLK
17
C258 *CRT@0.1U/16V_4Y VCC_SYNC SYNC_OUT2 14 CRTHSYNC CRT@10256-00011
R205 PICRT@0_4 DDCDAT 7 SYNC_OUT1
{8} INT_CRT_DDCDAT +5V VCC_DDC
C259 CRT@0.22U/10V_4X 8 C279 C280
R204 PICRT@0_4 HSYNC BYP 15 VSYNC
{8} INT_HSYNC SYNC_IN2
2 13 HSYNC CRT@10P/50V_4C CRT@10P/50V_4C
C B2A C
t
+3V VCC_VIDEO SYNC_IN1
R203 PICRT@0_4 VSYNC C28 *CRT@0.1U/16V_4Y
{8} INT_VSYNC
CRT_R1 3 10 DDCCLK
R556 OECRT@0_4 CRT_G1 4 VIDEO_1 DDC_IN1 11 DDCDAT
{19} EV_CRTDCLK VIDEO_2 DDC_IN2
CRT_B1 5
VIDEO_3
u
R555 OECRT@0_4 9 CRTDCLK
{19} EV_CRTDDAT DDC_OUT1
6 12 CRTDDAT DDCCLK R199 PICRT@2.2K_4
GND DDC_OUT2 +3V
R554 OECRT@0_4 DDCDAT R198 PICRT@2.2K_4
{19} EXT_HSYNC
CRT@CM2009-02QR C281 C282
R553 OECRT@0_4
{19} EXT_VSYNC
*CRT@10P/50V_4C *CRT@10P/50V_4C CRTDCLK R207 CRT@2.7K_4
o
+5V_CRT
CRTDDAT R197 CRT@2.7K_4
y
LCD Panel Module <LDS> CCD <CCD>
INT_LVDS_EDIDCLK RP20 4 3 PIVLDS@0X2 LCD_EDIDCLK_L
{8} INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA 2 1 LCD_EDIDDATA_L
a
{8} INT_LVDS_EDIDDATA
EV_LVDS_DDCCLK RP14 2 1 OEVLDS@0X2 USB_CCD_R R465 0_4
{20} EV_LVDS_DDCCLK USB_CCD {10}
EV_LVDS_DDCDAT 4 3 USB_CCD#_R R464 0_4
{20} EV_LVDS_DDCDAT USB_CCD# {10}
CN8
INT_TXLOUT0+ RP19 4 3 PIVLDS@0X2 LCD_TXLOUT0+_L_RR RP1 4 3 LDS@0X2 LCD_TXLOUT0+_L +3V F1 2 1 LITTLE-0603-2A-32V +CCD_POWER
{8} INT_TXLOUT0+
L
INT_TXLOUT0- 2 1 LCD_TXLOUT0-_L_RR 2 1 LCD_TXLOUT0-_L
{8} INT_TXLOUT0-
C33 *10U/6.3V_6X
+
0.15A Check
EV_TXLOUT0+ RP13 3 4 OEVLDS@0X2 C521 OEVEDP@0.1U/10V_4X
G_5
{18} EV_TXLOUT0+
EV_TXLOUT0- 1 2 C520 OEVEDP@0.1U/10V_4X LCD_TXUCLKOUT+
{18} EV_TXLOUT0- 40
LCD_TXUCLKOUT-
EV_EDP_TXP0 RP32 1 2 OEVEDP@0X2 C37 PIVEDP@0.1U/10V_4X 39
{18} EV_EDP_TXP0 {3} INT_EDP_TXP0 38
{18} EV_EDP_TXN0 EV_EDP_TXN0 3 4 {3} INT_EDP_TXN0 C36 PIVEDP@0.1U/10V_4X LCD_TXUOUT2+
LCD_TXUOUT2- 37 VIN +3V DISPON_O_R
36
n
LCD_EDIDCLK_L LCD_EDIDDATA_L
INT_TXLOUT1+ RP18 1 2 PIVLDS@0X2 LCD_TXLOUT1+_L_RR RP2 1 2 LDS@0X2 LCD_TXLOUT1+_L LCD_TXUOUT1+ 35
{8} INT_TXLOUT1+ 34
INT_TXLOUT1- 3 4 LCD_TXLOUT1-_L_RR 3 4 LCD_TXLOUT1-_L LCD_TXUOUT1-
{8} INT_TXLOUT1- 33 C29 D1
EV_TXLOUT1+ RP12 3 4 OEVLDS@0X2 C523 OEVEDP@0.1U/10V_4X LCD_TXUOUT0+ 32 C26 C30 C519
+ LCP0G050M0R2R
LVDS-Down {18} EV_TXLOUT1+
1 2 31 G_4 *47P/50V_4N
u
B EV_TXLOUT1- C522 OEVEDP@0.1U/10V_4X LCD_TXUOUT0- B
{18} EV_TXLOUT1- 30 *10U/25V_1206X
EV_EDP_TXP1 RP31 1 2 OEVEDP@0X2 C40 PIVEDP@0.1U/10V_4X LCD_TXLCLKOUT+_L 29 *2200P/50V_4X *2200P/50V_4X
{18} EV_EDP_TXN1 EV_EDP_TXN1 3 4 {3} INT_EDP_TXN1 C38 PIVEDP@0.1U/10V_4X LCD_TXLCLKOUT-_L
27
LCD_TXLOUT2+_L 26
INT_TXLOUT2+ RP17 1 2 PIVLDS@0X2 LCD_TXLOUT2+_L_RR RP3 1 2 LDS@0X2 LCD_TXLOUT2+_L LCD_TXLOUT2-_L 25
{8} INT_TXLOUT2+ 24
INT_TXLOUT2- 3 4 LCD_TXLOUT2-_L_RR 3 4 LCD_TXLOUT2-_L
{8} INT_TXLOUT2- 23
Y
LCD_TXLOUT1+_L
EV_TXLOUT2+ RP11 2 1 OEVLDS@0X2 C525 OEVEDP@0.1U/10V_4X LCD_TXLOUT1-_L 22 +VTT +VTT
{18} EV_TXLOUT2+
{18} EV_TXLOUT2-
EV_TXLOUT2- 4 3 C524 OEVEDP@0.1U/10V_4X
LCD_TXLOUT0+_L
21
20 EDP HPD
EV_EDP_TXP2 RP30 1 2 OEVEDP@0X2 C43 PIVEDP@0.1U/10V_4X LCD_TXLOUT0-_L 19 R17 R18
3 4 C41
g
{18} EV_EDP_TXN2 EV_EDP_TXN2 {3} INT_EDP_TXN2 PIVEDP@0.1U/10V_4X
USB_CCD_R 17 LDS@10K_4 PIVEDP@1K_4
USB_CCD#_R 16
INT_TXLCLKOUT+ RP16 1 2 PIVLDS@0X2 LCD_TXLCLKOUT+_L_RR RP4 1 2 LDS@0X2 LCD_TXLCLKOUT+_L LCD_EDIDDATA_L 15
{8} INT_TXLCLKOUT+ 14 INT_EDP_HPD {3}
INT_TXLCLKOUT- 3 4 LCD_TXLCLKOUT-_L_RR 3 4 LCD_TXLCLKOUT-_L LCD_EDIDCLK_L
{8} INT_TXLCLKOUT- 13
DISPON_O R5 1.2K/F_4 DISPON_O_R
n
EV_TXLCLKOUT+ RP10 2 1 OEVLDS@0X2 C527 OEVEDP@0.1U/10V_4X LVDS_VADJ 12
{18} EV_TXLCLKOUT+ 11
EV_TXLCLKOUT- 4 3 C526 OEVEDP@0.1U/10V_4X {34} INT_DMIC_CLK L23 FCM1005KF-221T03_300MA INT_DMIC_CLK_R
{18} EV_TXLCLKOUT- 10 G_1
3
L22 FCM1005KF-221T03_300MA INT_DMIC_DATA_R
{34} INT_DMIC_DATA 9
{18} EV_EDP_TXP3 EV_EDP_TXP3 RP29 1 2 OEVEDP@0X2 {3} INT_EDP_TXP3 C48 PIVEDP@0.1U/10V_4X Q1
EV_EDP_TXN3 3 4 C46 PIVEDP@0.1U/10V_4X R3 LDS@0_6 +CCD_POWER 8
a
{18} EV_EDP_TXN3 {3} INT_EDP_TXN3 +3V PIVEDP@2N7002K_300MA
EDP_PHD_R R2 EDP@0_6 7 EDP_PHD_R 2
6
5
i
+LCDVCC +LCDVCC
4
INT_TXUOUT0+ RP21 1 2 PIVLDS@0X2 LCD_TXUOUT0+_L_RR RP5 4 3 LDS@0X2 LCD_TXUOUT0+ 3 R11
{8} INT_TXUOUT0+
1
INT_TXUOUT0- 3 4 LCD_TXUOUT0-_L_RR 2 1 LCD_TXUOUT0- 2
{8} INT_TXUOUT0- VIN EDP@100K_4
1
G_0
C529 OEVEDP@0.1U/10V_4X
{18} EV_EDP_AUXP EV_EDP_AUXP RP33 1 2 OEVEDP@0X2 C528 OEVEDP@0.1U/10V_4X
{18} EV_EDP_AUXN EV_EDP_AUXN 3 4
X
{3} INT_EDP_AUXP C52 PIVEDP@0.1U/10V_4X R15 OEVEDP@0_4 EV_EDP_HPD {18}
EV_TXUOUT0+ RP15 3 4 OEVLDS@0X2 {3} INT_EDP_AUXN C49 PIVEDP@0.1U/10V_4X 7300L40-000000-G4
{18} EV_TXUOUT0+
EV_TXUOUT0- 1 2
{18} EV_TXUOUT0-
B2A
{8} INT_TXUOUT1+ INT_TXUOUT1+ RP25 2 1 PIVLDS@0X2 LCD_TXUOUT1+
{20} EV_LVDS_BRIGHT
R261 OEV@0_4 EDP PU/PD SMBus
r
{8} INT_TXUOUT1- INT_TXUOUT1- 4 3 LCD_TXUOUT1- R263 PIV@0_4 LVDS_VADJ
{8} INT_LVDS_PWM
A
LVDS-Up {18} EV_TXUOUT1+
EV_TXUOUT1+ RP6 1 2 OEVLDS@0X2 +3V
A
EV_TXUOUT1- 3 4
{18} EV_TXUOUT1-
o
{8} INT_TXUOUT2+ INT_TXUOUT2+ RP27 2 1 PIVLDS@0X2 LCD_TXUOUT2+ +3V R462 PIVLDS@2.2K_4 LCD_EDIDCLK_L
{8} INT_TXUOUT2- INT_TXUOUT2- 4 3 LCD_TXUOUT2- INT_DMIC_CLK_R INT_DMIC_DATA_R R463 PIVLDS@2.2K_4 LCD_EDIDDATA_L
EV_TXUOUT2+ RP7 4 3 OEVLDS@0X2 R472 R470

{18} EV_TXUOUT2+
EV_TXUOUT2- 2 1 *OEVEDP@100K_4 OEVEDP@100K_4
{18} EV_TXUOUT2-
C31 C27
F
LCD_TXUOUT0+
INT_TXUCLKOUT+ RP26 2 1 PIVLDS@0X2 LCD_TXUCLKOUT+ LCD_TXUOUT0-
{8} INT_TXUCLKOUT+
{8} INT_TXUCLKOUT-
INT_TXUCLKOUT- 4 3 LCD_TXUCLKOUT- *E@15P/50V_4C *E@15P/50V_4C Quanta Computer Inc.
EV_TXUCLKOUT+ RP8 4 3 OEVLDS@0X2 R473 R471
{18} EV_TXUCLKOUT+
EV_TXUCLKOUT- 2 1 OEVEDP@100K_4 *OEVEDP@100K_4 PROJECT : BD5
{18} EV_TXUCLKOUT-
1A
B2A LCD/CRT/CCD
5 4 3 2 1
5 4 3 2 1
MINI Card Slot#1(WiFi / Wimax / Combo) <MNW>

+1.5V +WIMAX_P
AOAC <MNW>
+3V
R490 NAOAC@0_8
+WIMAX_P 30
+WIMAX_P +WIMAX_P
R492 NAOAC@0_8
e
R477 0.5A 2.75A
10K_4 +3V_S5 1 3
+3V_S5
Q44 AOAC@ME1303_3A
2
s
C44 C531 C543 C536 C42 C534 C530 C535 C545
2
D D
3 1 PCIE_CLK_WLAN_REQ#_R *47P/50V_4N *0.01U/25V_4X *0.1U/16V_4Y *10U/6.3V_6X 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y *10U/6.3V_6X *47P/50V_4N C546 C544 R501
{10} PCIE_CLK_WLAN_REQ#
AOAC@4.7K_4
Q42 ME2N7002E_200MA AOAC@0.01U/25V_4X *AOAC@0.01U/25V_4X
U
R474 *0_4 R503 AOAC@3.01K/F_4
Q47
3
CN9
BT_DISABLE#_INTEL 51 52
49 NC +3.3V 50 2
C-Link_RST GND WMAX_P {37}
PLTRST# R495 NMP@0_4 PLTRST#_debug 47 48
{3,10,35,36,37,38} PLTRST# C-Link_DAT +1.5V
R494 NMP@0_4 PCLK__debug_R 45 46
{10} PCLK_DEBUG C-Link_CLK LED_WPAN#
43 44 AOAC@LTC044EUBFS8TL_30MA
1
41 GND LED_WLAN# 42
39 NC NC 40
37 NC NC 38
GND USB_D+ USB_WLAN {10}
35 36
USB_WLAN# {10}
s
33 GND USB_D- 34
{10} PCIE_TXP_WLAN PETp0 GND
31 32 SDATA_WLAN
{10} PCIE_TXN_WLAN# PETn0 SMB_DATA
29 30 SCLK_WLAN
27 GND SMB_CLK 28
25 GND +1.5V 26 +WIMAX_P
{10} PCIE_RXP_WLAN PERp0 GND SMBus(DDR3/WLAN/3G)
u
23 24
+WIMAX_P {10} PCIE_RXN_WLAN# PERn0 +3.3Vaux
21 22 PLTRST#
19 GND PERST# 20 RF_EN
NC W_DISABLE# RF_EN {37}
17 18
NC GND
R500 15 16 LFRAME#_PCIE R479 NMP@0_4 R48 R47
o
10K_4 13 GND NC 14 LAD3_PCIE R478 NMP@0_4 LFRAME# {9,37} AOAC@4.7K_4
{10} CLK_PCIE_WLAN AOAC@4.7K_4
11 REFCLK+ NC 12 LAD2_PCIE R476 NMP@0_4 LAD3 {9,37}
{10} CLK_PCIE_WLAN# REFCLK- NC
9 10 LAD1_PCIE R475 NMP@0_4 LAD2 {9,37}
GND NC
2
PCIE_CLK_WLAN_REQ#_R 7 8 LAD0_PCIE R13 NMP@0_4 LAD1 {9,37}
BT_DISABLE#_OTHER 5 CLKREQ# NC 6 LAD0 {9,37}
R499 0_4 BT_DISABLE#_INTEL 3 BT_CHCLK +1.5V 4 6 1 SDATA_WLAN
B2A BT_DATA GND {10,14} SDATA
BT_RFCTRL_BT
PCIE_WAKE#_MINI 1 2
WAKE# +3.3V
H
R797 *0_4 BT_DISABLE#_OTHER Q5A AOAC@2N7002KDW_115MA
AAA-PCI-052-P01
R60 NAOAC@0_4
{14,15,38} CGDAT_SMB
C
B2A +WIMAX_P +WIMAX_P
C
+WIMAX_P
t
3
R469
2 Q46 AOAC@10K_4
{37} BT_RFCTRL
5
u
LTC044EUBFS8TL_30MA
2
3 4 SCLK_WLAN
{10,14} SCLK
1
3 1 PCIE_WAKE#_MINI Q5B AOAC@2N7002KDW_115MA

{8,35} PCIE_WAKE#
Q41 AOAC@ME2N7002E_200MA R59 NAOAC@0_4
o
{14,15,38} CGCLK_SMB
R466 *AOAC@0_4
y
B2A
L a
n
B B
Y u
n g
i a
X
A A

PROJECT : BD5
F
1A
MINI CARD(WLAN)
5 4 3 2 1
5 4 3 2 1
+5V_S5
USB CONNECT RIGHT1 <U3B> <USB>

C709
+3V_S5
R359
+5V_S5
U13
2.5A
31
0.1U/16V_4Y 10K_4 2 8 +5VSUS_USBP0
3 IN1 OUT3 7
IN2 OUT2 6
USB_SC_EN# 4 OUT1 C431 R367
{37} USB_SC_EN# EN#
1 C432 C712
R5 GND
e
9 5 *470P/50V_4X *10U/6.3V_6X 220U/6.3V_105CS_E18e 470/F_4
USB20#_R1 R674 *S&C@0_4 U27 GND-C OC#
{10} USB20#_R1
from PCH USB20_R1 C453 BD82035FVJ-E2
{10} USB20_R1
1U/6.3V_4X
R1 R675 *S&C@0_4 5 6 USB20_R1 R335 NS&C@0_4
C3A
s
{37} USB_BUS_SW4 VCC TDP
3
D D
7 USB20#_R1 R329 NS&C@0_4
TDM
USB30_RXN1_R
R2 R673 *S&C@0_4 1
{10} USB30_RXN1_R {37} USB_BUS_SW3 CEN# / INT
from PCH USB30_RXP1_R 8 2
{10} USB30_RXP1_R CB0 / SDA 3 USB20P_CONN_R
USB30_TXN1_R
R6 R671 S&C@0_4 DP 2 USB20N_CONN_R USB_SC_OC# Q35
{10} USB30_TXN1_R {37} USB_BUS_SW2 DM {10,37} USB_SC_OC#
from PCH USB30_TXP1_R ME2N7002E_200MA
{10} USB30_TXP1_R
1
9 4 R687 *S&C@0_4 USB_BUS_SW2
USB_BUS_SW3
R7 R672 *S&C@0_4 GND CB1 / SCL
S&C@MAX14641ETA+T
R3 R688 S&C@0_4 USB_BUS_SW3
+5V_S5 +3V_S5 SC_SDA
R8 R676 *S&C@0_4
B2A R9 R684 *S&C@0_4 SC_SCL
e
CN21
+5VSUS_USBP0 1
R4 R689 *S&C@0_4 USB20N_CONN_R RN12 1 2 U3@MCM2012B900GBE USB20N_CONN 2 1 VBUS
2 D-
R669 USB20P_CONN_R 4 3 USB20P_CONN 3
4 3 D+
C3A
s
*S&C@10K_4 USB30_RXN1_R 5 4 GND
USB30_RXP1_R 6 5 SSRX-
R1 R2 R3 R4 R5 R6 R7 R8 R9 6
2
7 SSRX+
USB30_TXN1_R C426 U3@0.1U/10V_4X USB30_TX1-_C1 8 7 GND
14566 V V 8 SSTX-
SC_SCL 6 1 USB30_TXP1_R C430 U3@0.1U/10V_4X USB30_TX1+_C1 9
3ND_MBCLK {20,37} 9 SSTX+
u
14600 V V
13
12
11
10
Q52A *S&C@2N7002KDW_115MA
14617(with CB2) V V V
13
12
11
10
U3@C19066-90905-L
+5V_S5 +3V_S5
14617(no CB2) V V V
o
14641/14642/14644 V V
B2A
14640 V V
R665 CN20
+5VSUS_USBP0 1
1 VBUS
*S&C@10K_4 USB20N_CONN 2
2 D-
USB20P_CONN 3
3 D+
5
SW2 SW3 14600 SW2 SW3 14644 4
H
C D8 5 4 GND C
SC_SDA 3 4 6 5 SSRX-
3ND_MBDATA {20,37} CB0 CB1 Status CB1 CB0 Status *AZ5125-01J 6 SSRX+
7
Q52B *S&C@2N7002KDW_115MA 8 7 GND
2012 Chief River/Brazos
0 0 Auto mode Charger , AM 0 0 2A Auto mode for Apple device Charger , AM2
9 8 SSTX-
9 SSTX+
0 1 Force dedicated charger mode Charger , FM 1 0 Force dedicated charger mode Charger , FM
13
12
11
10
t
1 0 Pass-Through(USB) mode USB , PM 0 1 Pass-Through(USB) mode USB , PM
13
12
11
10
*U2@UARC8-4K1986
1 1 pass-through(USB) with CDP USB , CM 1 1 pass-through(USB) with CDP USB , CM
Emulation Emulation C3A
SW2
CB1
SW3
CB0
14641
Status
SW2
CB1
SW3
CB0
ou14642
Status
USB30_RXN1_R USB30_RXP1_R USB30_TX1-_C1 USB30_TX1+_C1 USB20N_CONN USB20P_CONN
1
2013 Shark bay / Kabini
0 0 2A Auto mode for Apple device Charger , AM2
X 0 2A Auto mode for Apple device Charger , AM2 D22 D23 D24 D25 D28 D29
1 0 Force 1A for Apple device Charger , AP1
Pass-Through(USB) mode USB , PM *U3@TVUFB0201AD0 *U3@TVUFB0201AD0 *U3@TVUFB0201AD0 *U3@TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0
0 1
y
0 1 Pass-Through(USB) mode USB , PM
2
1 1 pass-through(USB) with CDP USB , CM
1 1 pass-through(USB) with CDP USB , CM Emulation
Emulation
a
C3A
USB30_RXN2_R USB30_RXP2_R USB30_TX2-_C1 USB30_TX2+_C1 USB20N_CONN_R2 USB20P_CONN_R2

USB CONNECT Right2 <U3B>
1
CN18 D31 D30 D32 D33 D34 D35
+5VSUS_USBP1 1
VBUS
from PCH RN13 1 2 U3_2@MCM2012B900GBE USB20N_CONN_R2 2 1 CN17 *U3_2@TVUFB0201AD0 *U3_2@TVUFB0201AD0 *U3_2@TVUFB0201AD0 *U3_2@TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0
{10} USB20#_R2 2 D-
4 3 USB20P_CONN_R2 3 +5VSUS_USBP1 1
{10} USB20_R2 VBUS
2
B
4 3 D+ USB20N_CONN_R2 2 1 B
C3A 5 4 GND USB20P_CONN_R2 3 2 D-
{10} USB30_RXN2_R 5 SSRX- 3 D+
6 4
n
{10} USB30_RXP2_R 6 SSRX+ 4 GND
7 D7 5
C380 U3_2@0.1U/10V_4X USB30_TX2-_C1 8 7 GND 6 5 SSRX-
{10} USB30_TXN2_R
C381 U3_2@0.1U/10V_4X USB30_TX2+_C1 9 8 SSTX-
*AZ5125-01J
7 6 SSRX+ C3A
from PCH {10} USB30_TXP2_R 9 SSTX+ 7 GND
8
B2A C3A
13
12
11
10
9 8 SSTX-
9 SSTX+
13
12
11
10
13
12
11
10
U3_2@C19066-90905-L
13
12
11
10
U2_2@UARC8-4K1986
B2A
C3A
Y
+3V_S5
+5V_S5
R316 2.5A
U12
USB CONNECT Left1/Left2 <U2B>
g
10K_4 2 8 +5VSUS_USBP1
3 IN1 OUT3 7
IN2 OUT2 6
+5V_S5 USB_Normal_EN# 4 OUT1 C384 R315
{37} USB_Normal_EN# EN#
1 C398 C699
GND
n
CN11 9 5 *470P/50V_4X *10U/6.3V_6X 220U/6.3V_105CS_E18e 470/F_4
GND-C OC#
+3V_S5 1 C395 BD82035FVJ-E2
2 1U/6.3V_4X
3
4
3
a
R508 5
6
7
i
10K_4 2
8
9 Q34
USB_Normal_EN# 10 USB_Normal_OC#_R ME2N7002E_200MA
11 {10,37} USB_Normal_OC#_R
A A
1
RN10 1 2 E@MCM2012B900GBE USB20P_L1 12
{10} USB20_L1 13
from PCH USB 2.0(L2)-Up port2 4 3 USB20N_L1
{10} USB20#_L1 14
15
X
{10} USB20_L2 RN11 1 2 E@MCM2012B900GBE USB20P_L2
4 3 USB20N_L2 16
from PCH USB 2.0(L1)-Down port9 {10} USB20#_L2 17 C3A
USB_Normal_OC#_L
C3A 18
{10,37} USB_Normal_OC#_L 19
USB_Normal_EN#
20
r
88511-200N
PROJECT : BD5
o
1A
USB3 S&C(R)&(Right)/USB2 (Left)
5 4 3 2 1
F
5 4 3 2 1
32
s e D
e U
u s
C
Ho C
ut
y o
L a
n
B B
Y u
n g
i a
X
A A

PROJECT : BD5
F
1A
NC
5 4 3 2 1
5 4 3 2 1
SATA HDD <HDD> SATA ODD <ODD> ODD Zero power . (Only for Intel) <OZP>
33
CN19
23 +5V +5V_ODD
GND
7
GND1 6 SATA_TXP_1ST_HDD_C C680 0.01U/25V_4X
e
RXP SATA_TXP_1ST_HDD {9}
5 SATA_TXN_1ST_HDD#_C C681 0.01U/25V_4X CN14 L8 ZRP-N@0_1206
RXN SATA_TXN_1ST_HDD# {9} +5V
4 14
GND2 3 SATA_RXN_1ST_HDD#_C C693 0.01U/25V_4X GND14
TXN SATA_RXN_1ST_HDD# {9}
2 SATA_RXP_1ST_HDD_C C696 0.01U/25V_4X 1 1 3
s
TXP SATA_RXP_1ST_HDD {9} GND1
1 2 SATA_TXP_ODD_C C573 0.01U/25V_4X
D GND3 RXP SATA_TXP_ODD {9} D
3 SATA_TXN_ODD#_C C581 0.01U/25V_4X
RXN SATA_TXN_ODD# {9}
4 C291 Q26 C274 R211
2
22 GND2 5 SATA_RXN_ODD#_C C584 0.01U/25V_4X ZRP@4.7K_4
3.3V TXN SATA_RXN_ODD# {9}
21 6 SATA_RXP_ODD_C C597 0.01U/25V_4X SATA_RXP_ODD {9} ZRP@0.01U/25V_4X ZRP@ME1303_3A *ZRP@0.01U/25V_4X
3.3V 20 TXP 7
3.3V 19 GND3 R210 ZRP@3.01K/F_4
GND 18
U
GND
3
17 1A 8 ODD_PRSNT# {11} 1.6A
GND 16 +5V_HDD1 R666 0_8 DP 9
5V +5V +5V +5V_ODD
15 10 +5V_ODD +5V_ODD 2
5V 14 +5V 11 PCH_ODD_EN {11}
5V MD ODD_MD# {10}
13 C706 C707 + C703 12
GND 12 GND 13 C624 C634 + C272 Q29
1
RSVD 11 *0.1U/16V_4Y *10U/6.3V_6X *100U/6.3V_3528P_E45b GND R187
e
GND 10 15 ZRP@0.1U/16V_4Y *10U/6.3V_6X *100U/6.3V_3528P_E45b ZRP@LTC044EUBFS8TL_30MA
12V 9 GND15 ZRP@22_8
12V 8 10300-00001
12V
s
24
GND
3
6030H-22G05
B2A
2
u
Q27
ZRP@ME2N7002E_200MA
1
C
Ho C
u t
y o
L a
n
B B
Y u
n g
i a
X
A A

PROJECT : BD5
F
1A
HDD/ODD
5 4 3 2 1
5 4 3 2 1
Codec (CX20756-11Z) <ADO> External MIC <ADO>
C487 C485
+FILT_1.65V +MIC1-VREFO
34
R750 R753
1U/6.3V_4X 0.1U/16V_4Y 2.2K_4 2.2K_4
CN6
e
ADOGND 3
MIC1_L1 C461 1U/10V_6X MIC1_L2 L19 HCB1608KF-121T20_2A MIC1_L3 1 7
1.2mA(20mils)
R760 0_6 +3AVDD Port_B# 5
s
+3V
6
D D
C483 C721 C484 MIC1_R1 C456 1U/10V_6X MIC1_R2 L18 HCB1608KF-121T20_2A MIC1_R3 2
4
*4.7U/6.3V_6X 0.1U/16V_4Y *0.1U/16V_4Y
2SJ3061-003111F Shield_GND
C451 C471 C474 Normal Open Jack
U
GND 100P/50V_4N 100P/50V_4N *0.1U/16V_4Y
+3V R459 0_6 +3V_VDDIO
C513
1U/6.3V_4X
MIC1_L3 MIC1_R3 ADOGND
C3A
e
GND 0.061mA(15mils)
+3V_S5 R450 0_6 +3AVDD_S5 +AVDD_3.3
1
C502 C497 C490 C492 D36 D37 MIC1_L3 C468 *0.1U/10V_4X
s
*10U/6.3V_8X 0.1U/16V_4Y 2.2U/6.3V_4X 0.1U/16V_4Y *TVUFB0201AD0 *TVUFB0201AD0 C454 *0.1U/10V_4X
MIC1_R3
2
B2A
u
GND ADOGND
48.7mA(20mils) 1A(100mils)
+3AVDD +5AVDD R759 0_6 +5V
C722 C720 C718 C719
o
*10U/6.3V_8X 0.1U/16V_4Y *10U/6.3V_8X 0.1U/16V_4Y Headphone <ADO>
GND GND (40mils)
+FILT_1.8V +CLASSD_5V R458 0_1206 +5V
CN7
H
C488 C489 C511 C512 C516 C515 3
HPOUT-L R447 5.1/F_6 HPOUT-L2 L21 HCB1608KF-121T20_2A HPOUT-L3 1 7
4.7U/6.3V_6X 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 4.7U/6.3V_6X 4.7U/6.3V_6X
C C514 Port_A# 5 C
6
0.1U/16V_4Y HPOUT-R R444 5.1/F_6 HPOUT-R2 L20 HCB1608KF-121T20_2A HPOUT-R3 2
t
GND GND 4
2SJ3061-003111F Shield_GND
18
24
29
27
28
13
16
11
3
2
7
U15 +3AVDD C491 C504 C473 Normal Open Jack
VDD_IO
CLASS-D_REF
VDDO33
DVDD33
LPWR_5.0
RPWR_5.0
FILT_1.8V
AVDD_HP
FILT_1.65V
AVDD_3.3V
AVDD_5V
u
GND C503 *0.1U/16V_4Y *100P/50V_4N *100P/50V_4N *0.1U/16V_4Y
R439
{9} ACZ_RST#_AUDIO 9 5.11K/F_4
RESET#
R446 0_4 ACZ_BITCLK_RR 5 R440 39.2K/F_4 Port_A# ADOGND
o
{9} BIT_CLK_AUDIO BIT_CLK
8 38 SENSE_A R441 20K/F_4 Port_B#
{9} ACZ_SYNC_AUDIO SYNC JSENSE
{9} ACZ_SDIN0_AUDIO R449 33_4 SDATA_IN 6 35 TP38
4 SDATA_IN MICBIASC 34 +MIC1-VREFO_B R438 0_4 +MIC1-VREFO HPOUT-L3 HPOUT-R3
{9} ACZ_SDOUT_AUDIO SDATA_OUT MICBIASB
y
33 MIC1-RR R436 100/F_6 MIC1_R1
PORTB_R_LINE 32 MIC1-LL R437 100/F_6 MIC1_L1
1
AMP_MUTE# 39 PORTB_L_LINE HPOUT-L3 C496 *0.1U/10V_4X
{37} AMP_MUTE# SPKR_MUTE# D38 D39
26 R445 0_4
C510 0.1U/16V_4Y 10 HGNDB 25 R448 0_4 *TVUFB0201AD0 *TVUFB0201AD0
PCBEEP_C HPOUT-R3 C486 *0.1U/10V_4X
a
{9} PCBEEP PCBEEP HGNDA 31 TP40
2
PORTD_B_MIC 30 TP44
PORTD_A_MIC ADOGND
INT_DMIC_DATA 1 23 HPOUT-R
{29} INT_DMIC_DATA DMIC_DAT/GPIO1 PORTA_R
R435 33_4 DMIC_CLK 40 22 HPOUT-L
{29} INT_DMIC_CLK DMIC_CLK/MUSIC_REQ/GPIO0 PORTA_L B2A
L
21 AVEE
AVEE
FLY_N
20
19
FLY_N
FLY_P C505 1U/6.3V_4X C498 C501
Internal Speaker <ADO> 88266-080L
TP36 37 FLY_P 10
TP37 36 GPIO1/PORTC_R_MIC *0.1U/16V_4Y 2.2U/6.3V_4X 10 9
MUSIC_REQ/GPIO0/PORTC_L_MIC SPK_L+ R112 BLM18PG471SN1D_1A INSPKL+N 8 9
C3A SPK_L- R113 BLM18PG471SN1D_1A INSPKL-N 7 8
7
n
SPK_R- R114 BLM18PG471SN1D_1A INSPKR-N 6
SPK_R+ R115 BLM18PG471SN1D_1A INSPKR+N 5 6
EP_GND
B
GND 4 5 B
RIGHT+
RIGHT-
{11} Box_Vendor
LEFT+
4
LEFT-
3
2 3
{11} BOARD_ID11 2
1
u
GND
CX20756-11Z 1
12
14
15
17
41
CN3
C478 *0.47U/6.3V_4X DMIC_CLK MIC1-RR C479 *0.47U/6.3V_4X

C3A
C477 *0.47U/6.3V_4X INT_DMIC_DATA C464 0.1U/16V_4Y MIC1-LL C480 *0.47U/6.3V_4X
INSPKL-N
Y
C506 *10P/50V_4C ACZ_RST#_AUDIO C508 0.1U/16V_4Y INSPKL+N
INSPKR-N
C494 *10P/50V_4C BIT_CLK_AUDIO C509 *0.1U/16V_4Y GND INSPKR+N
C493 *10P/50V_4C ACZ_SDOUT_AUDIO C445 *0.1U/16V_4Y C145 C144 C142 C143
g
E@1000P/50V_4X E@1000P/50V_4X E@1000P/50V_4X E@1000P/50V_4X
GND
GND ADOGND
n
SPK_R+ INSPKL-N INSPKL+N INSPKR-N INSPKR+N
SPK_R-
SPK_L-
a
1
1
D40 D41 D42 D43
SPK_L+
*TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0
i
2
2
B2A
X
A A

PROJECT : BD5
F
A1A
Audio Codec (CX20671)
5 4 3 2 1
5 4 3 2 1
35
LX L5 LAN@4.7uh_C_1A DVDDL
Atheros Lan <LAN/LN1.LNG> L2,C1,C2,C3 L2 C263

C1 C260
C2 C264
C3
*LAN@1000P/50V_4X LAN@10U/6.3V_6X LAN@0.1U/16V_4Y
Switch mode LAN_LED1#
Mount LAN_LED0#
LDO mode C622 LAN@1U/6.3V_4X

NC
DVDDL C623 LAN@0.1U/16V_4Y
PCIE_TXN_LAN# {10}
L1 AVDDVCO PCIE_TXP_LAN {10} C621 LAN@0.1U/16V_4Y
e
AVDDVCO L25 LAN@HCB1608KF-601T10_1A AVDDL L26 LAN@HCB1608KF-601T10_1A DVDDL CLK_PCIE_LAN {10} C620 *LAN@1U/6.3V_4X
C618 LAN@0.1U/16V_4Y CLK_PCIE_LAN# {10}
AVDDL
s
C635 *LAN@4.7U/6.3V_6X
D D
41
42
43
44
45
46
47
48
49
50
40
39
38
37
36
35
34
33
32
31
U6
L1 0.163A(20mils)
DVDDL_REG
GND
RX_N
REFCLK_N
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
LED1
LED0
AVDDL
AVDDL
LX
RX_P
REFCLK_P
+LAN_VDD33 +LAN_VDD33
Switch mode
Mount
U
C625 C147 C165 C166 C614
LDO mode LAN@10U/6.3V_6X *LAN@10U/6.3V_6X *LAN@1000P/50V_4X LAN@1U/6.3V_4X LAN@0.1U/16V_4Y

NC
1 30 PCIE_RXP6_C C257 LAN@0.1U/10V_4X
VDD33 TX_P PCIE_RXP_LAN {10}
2 29 PCIE_RXN6_C C256 LAN@0.1U/10V_4X
{3,10,30,36,37,38} PLTRST# PERSTn TX_N PCIE_RXN_LAN# {10}
PCIE_LAN_WAKE# 3 28
CKREQ_G# 4 WAKEn
Atheros NC 27 TP8
e
R152 LAN@30K/F_4 5 CLKREQn TESTMODE[2] 26
+LAN_VDD33 DEBUGMODE[0] TESTMODE[1]
AVDDL 6 25 TP7
C234 LAN@15P/50V_4C LAN_XTLO 7 AVDDL_REG TESTMODE[0] 24 TP5
LAN_XTLI 8 XTLO
AR8161/8162 PPS 23 LAN_LED2# TP6
s
XTLI LED2
2
1
C599 C613 AVDDH 9 22 AVDDH C219 LAN@0.1U/16V_4Y
RBIAS 10 AVDDH_REG AVDDH 21 TX3N
+3V_S5 +LAN_VDD33 LAN@0.1U/16V_4Y LAN@1U/6.3V_4X Y1 RBIAS TRXN3
LAN@25MHZ_30
3
4
u
C221 LAN@15P/50V_4C
R109 *LAN@0_6 C220 C603 R140
AVDD33
LAN@2.37K/F_4
AVDDL
AVDDL
TRXN0
TRXN1
TRXN2
TRXP0
TRXP1
TRXP2
TRXP3
LAN@0.1U/16V_4Y LAN@1U/6.3V_4X
o
+3V_S5 61_62LAN@AR8161-A
B2A
11
12
13
14
15
16
17
18
19
20
LAN_P {37}
1 3
R111
TX0P
TX1P
TX2P
TX3P
TX0N
TX1N
TX2N
C157 Q11 C138
2
H
LAN@4.7K_4
LAN@0.01U/25V_4X LAN@ME1303_3A *LAN@0.01U/25V_4X Q12
C LAN@LTC044EUBFS8TL_30MA C
R110 LAN@3.01K/F_4 3 1 AVDDL C619 61LAN@0.1U/16V_4Y C600 LAN@1U/6.3V_4X
t
AVDDH_C C601 LAN@0.1U/16V_4Y
AVDDL C602 LAN@0.1U/16V_4Y R516 LAN@0_6 +LAN_VDD33
R J 4 5
T R A N S F O R M E R
<LAN>
o
<LAN/LN1.LNG> CN12
y
X-TX3N 8
+LAN_VDD33 +LAN_VDD33 NC4/3-
X-TX3P 7
NC/3+
U20 X-TX1N 6
a
C190 LAN@0.1U/16V_4Y AVDD_CEN_T 1 24 TERM1 RX-/1-
R202 TX0P 2 TCT1 MCT1 23 X-TX0P X-TX2N 5
LAN@10K_4 TX0N 3 TD1+ MX1+ 22 X-TX0N U22 NC2/2-
TD1- MX1- TX0P 1 6 TX1P X-TX2P 4
CH1 CH4 NC1/2+
2
C184 LAN@0.1U/16V_4Y AVDD_CEN_T 4 21 TERM2

TX1P 5 TCT2 MCT2 20 X-TX1P 2 5 X-TX1P 3
TD2+ MX2+ GND VDD +LAN_VDD33 RX+/1+
L
6 1 PCIE_LAN_WAKE# TX1N 6 19 X-TX1N
{8,30} PCIE_WAKE# TD2- MX2- TX0N 3 4 TX1N X-TX0N 2
Q28A LAN@2N7002KDW_115MA C174 61LAN@0.1U/16V_4Y AVDD_CEN_T 7 18 TERM3 CH2 CH3 TX-/0-
TX2P 8 TCT3 MCT3 17 X-TX2P *LAN@AZ1013-04S.R7G X-TX0P 1
TX2N 9 TD3+ MX3+ 16 X-TX2N TX+/0+ 9
R201 *LAN@0_4 TD3- MX3- GND 10
C168 61LAN@0.1U/16V_4Y AVDD_CEN_T 10 15 TERM4 GND
TX3P 11 TCT4 MCT4 14 X-TX3P
TD4+ MX4+ 13
n
TX3N 12 X-TX3N
TD4- MX4- LAN@2RJ3057-008211F
B B
61LAN@GST5009BLF C167 C182 C185 C189
+LAN_VDD33 +LAN_VDD33 B2A U19
LAN@0.01U/100V_6X LAN@0.01U/100V_6X LAN@0.01U/100V_6X LAN@0.01U/100V_6X TX2N 1 6 TX3N
TERM2_C
TERM1_C
CH1 CH4
u
TERM4_C TERM3_C 2 5 +LAN_VDD33
R193 GND VDD
LAN@4.7K_4 TX2P 3 4 TX3P
U21 R117 R116 R123 R125 R126 R129 CH2 CH3
AVDD_CEN_T 1 24 TERM1 *LAN@AZ1013-04S.R7G
TCT1 MCT1
5
TX0P 2 23 X-TX0P 61LAN@75/F_8 62LAN@0_8 61LAN@75/F_8 62LAN@0_8 LAN@75/F_8 LAN@75/F_8

TX0N 3 TD1+ MX1+ 22 X-TX0N
TD1- MX1-
Y
3 4 CKREQ_G# +LAN_VDD33
{10} PCIE_CLK_LAN_REQ#
AVDD_CEN_T 4 21 TERM2
Q28B LAN@2N7002KDW_115MA TX1P 5 TCT2 MCT2 20 X-TX1P R184 *LAN@10K_4 LAN_LED1# R175 *LAN@10K_4
TX1N 6 TD2+ MX2+ 19 X-TX1N R183 *LAN@10K_4 LAN_LED0# R174 *LAN@10K_4
TD2- MX2- R517 *LAN@10K_4 LAN_LED2# R146 *LAN@10K_4
R194 *LAN@0_4 7 18
g
AVDD_CEN_T TERM3
TERM9
TERM9
TX2P 8 TCT3 MCT3 17 X-TX2P
TX2N 9 TD3+ MX3+ 16 X-TX2N
TD3- MX3-
AVDD_CEN_T 10 15 TERM4
TX3P 11 TCT4 MCT4 14 X-TX3P C141 C140
n
TX3N 12 TD4+ MX4+ 13 X-TX3N 61LAN@10P/3KV_1808N 62LAN@220P/3KV_1808X
TD4- MX4-
62LAN@TST1284ALF
1 High core voltage(default=1)
a
LED0 = LAN_ACTLED
0 Low core voltage
i
1 Switch mode regulator (SWR) select
LED1 = LAN_LINKLED#
0 Linear regulator (LDO) select
TX0P C583 E@6.8P/50V_4N TX2P C730 *E@6.8P/50V_4N
TX0N C582 E@6.8P/50V_4N TX2N C728 *E@6.8P/50V_4N 25 MHz external clock input
TX1P C572 E@6.8P/50V_4N TX3P C729 *E@6.8P/50V_4N LED2 1
TX1N C571 E@6.8P/50V_4N TX3N C731 *E@6.8P/50V_4N 48 MHz external clock input
0
X
B2A
A A
TERM1 TERM2 TERM3 TERM4
r
1
D44 D45 D46 D47

*GDT_BS401N *GDT_BS401N *GDT_BS401N *GDT_BS401N
o
2

B2A PROJECT : BD5
F
Quanta P/N : CYBS401N201 A1A
Atheros LAN (AR8161B/62B)
5 4 3 2 1
5 4 3 2 1
2 IN 1 Card Reader <MMC>
CTRL1 R452
EMI E@0_4 SD_WP
36
CTRL3 R428 E@0_4 SD_CD#
+VCC_XD
11
12
CN22
4
PSDBT0-09GLBS1N14H1
VDD
C/D
WP
D D
10
DATA2 R394 E@BLM15BD121SN1D_300MA SD_D2 9 W/P(GND)
DATA1 R389 E@BLM15BD121SN1D_300MA SD_D1 8 DATA2
DATA0 R390 E@BLM15BD121SN1D_300MA SD_D0 7 DATA1
6 DATA0 16
CTRL0 R391 E@BLM15BD121SN1D_300MA SD_CLK 5 VSS2 GND4 15
3 CLK GND3
U
VSS1
GND1
GND2
CTRL2 R392 E@0_4 SD_CMD 2
DATA3 R393 E@BLM15BD121SN1D_300MA SD_D3 1 CMD
DATA3
13
14
B2A
EMI
Card Reader (GL834L) <MMC>
s
SD_CLK
e C448 E@4.7P/50V_4C
B2A
+VCC_XD
u
C449 C444
4.7U/6.3V_6X 0.1U/16V_4Y
C465
0.1U/16V_4Y
C455 0.1U/16V_4Y
+3V_DVDD33_Card
+3V_DVDD33_Card
Card_PLTRST#
H
SD_D0 SD_D1 SD_D2 SD_D3
SD_GPIO0
+VCC_XD
CTRL3
C C
C441 C440 C443 C442
t
+3V E@12P/50V_4C E@12P/50V_4C E@12P/50V_4C E@12P/50V_4C
R412 0_8 +3V_DVDD33_Card
24
23
22
21
20
19
u
C462 C458 U14
B2A
RSTZ
SD_CDZ
DVDD33
GPIO0
DVDD33
PMOS
4.7U/6.3V_6X 0.1U/16V_4Y
1 18 +1.8V_Card
+3V 2 DVDD33 VDD18 17 DATA2
o
{10} USB_CARD# DM SB13
{10} USB_CARD
3 16 DATA3
R442 0_8 +3V_AVDD33_Card 4 DP SB12 15 CTRL2 C463
TP41 5 AVDD33 GL834L SD_CMD 14 CTRL0
TP39 6 MS_INS QFN24-3.3V SD_CLK 13 DATA0 1U/6.3V_4X
C476 C472 SB0 SB9
MS_BS
2.2U/6.3V_4X 0.1U/16V_4Y
SB1
SB3
SB4
SB5
SB8
G1
C3A GL834L-OGY03
a
25
7
8
9
10
11
12
SB0 SD_D7
CTRL1
DATA1
SB1 SD_D6
SB3 SD_D5
TP43
TP45
TP42
L
SB4 SD_D4
SB5 SD_WP
SB8 SD_D1
SB9 SD_D0
SB12 SD_D3
SB13 SD_D2
+3V
n
B B
R410
SD_GPIO0 R413 *10K_4
*1K_4
u
R409 0_4 Card_PLTRST#
B2A
{3,10,30,35,37,38} PLTRST#
R413
C459 R411 NC Power Saving Mode (default)
10K Normal Mode
*0.1U/16V_4Y *100K_4
gY
i a n
X
A A

PROJECT : BD5
F
A1A
Card Reader(GL834L)
5 4 3 2 1
5 4 3 2 1
37
SMBUS Devices Address
EC <KBC> SM BUS PU/Address <KBC>
1 Battery(A)
+3VPCU +3V PCH(S5)
1mA +3VPCU
R97 HCB1608KF-181T15_1.5A +A3VPCU +3V_VDD_EC R68 2.2_6 G-sensor(S0)
MBCLK R41 4.7K_4 2
R106 C89 C97 C77 C78 MBDATA R38 4.7K_4 IDROM(A)
2.2_6 2ND_MBCLK R30 4.7K_4
35mA 0.1U/16V_4Y 10U/6.3V_6X 0.1U/16V_4Y 10U/6.3V_6X 2ND_MBDATA R35 4.7K_4
+A3VPCU_R VGA Thermal(S0)
e
C105 C92 C57 C73 C70 C68 8769AGND +3VPCU
3 CEC(A)
115
102
TEMP_MBAT C93 *10U/6.3V_6X
19
46
76
88
4
10U/6.3V_6X 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y 0.1U/16V_4Y *0.1U/16V_4Y U2
3ND_MBCLK R85 4.7K_4
s
AVCC
VDD
VCC1
VCC2
VCC3
VCC4
VCC5
R88 *100K/F_4 ICMNT C94 *10U/6.3V_6X 3ND_MBDATA R86 4.7K_4
D H=1.6mm +3VPCU D
3 97 AC SET_EC C95 *10U/6.3V_6X

{9,30} LFRAME# LFRAME/GPIOF6 GPIO90/AD0 TEMP_MBAT {40}
126 98 ICMNT
{9,30} LAD0
{9,30} LAD1
127
128
LAD0/GPIOF1
LAD1/GPIOF2 A/D
GPIO91/AD1
GPIO92/AD2
99
100
AC SET_EC
SKU_STRAP_4
ICMNT {40}
AC SET_EC {40}
R800 *0_4
TP <KBC> +TP_PWR
{9,30} LAD2 LAD2/GPIOF3 GPIO93/AD3 USB_BUS_SW4 {31}
1 108
U
TPCLK R138 10K_4
{9,30} LAD3 LAD3/GPIOF4 GPIO05/AD4 USB_SC_OC# {10,31}
2 96 TPDATA R137 10K_4
{10} PCLK_591 LCLK/GPIOF5 GPIO04/AD5 95 NBSWON#_R
USB_BUS_SW2 {31}
R74 1.2K/F_4
B2A
GPIO03/AD6 NBSWON# {38}
{8} CLKRUN# CLKRUN# 8 94
GPIO11/CLKRUN GPIO07/AD7/VD_IN2 SUSB# {8}
+5VPCU
{11} GATEA20
121
GPIO85/GA20 101
LED PU/PD <LED>
122
D/A GPIO94/DA0 105
USB_BUS_SW3 {31}
e
{11} RCIN# KBRST/GPIO86 GPIO95/DA1 VFAN1 {3}
106 RF_LED# R28 NAOAC@10K_4 +5V
GPIO96/DA2 LAN_P {35}
SCI#_uR 29 LPC SUSLED_EC# R84 10K_4
{10} SCI# ECSCI/GPIO54 BAT_SAT0# R20 10K_4 R25 AOAC@10K_4 +5V_S5
6 BAT_SAT1# R27 10K_4
DISPON_O {29}
s
GPIO24 64 PWRLED# R83 10K_4
GPIO01/TB2 ACIN {40} +5V
R87 *DS3@0_4 124 79 SKU_STRAP_2 R795 *10K_4
{11} GPIO27 GPIO10/LPCPD GPIO02/SPI_CS 93
B2A
GPIO06/IOX_DOUT LID591# {29}
7 114
{3,10,30,35,36,38} PLTRST# LREST/GPIOF7 GPIO16
GPIO30/F_WP
109 PWRLED#
GFX_MAINON {48}
PWRLED# {38} Strap(795) <KBC>
u
123 15 SHBM RF_EN R57 10K_4
{31} USB_Normal_EN# GPIO67/N2TMS GPIO36 VRON {45}
80 SKU_STRAP_3
125 GPIO41/F_WP 17 H_PROCHOT_EC
{9} SERIRQ SERIRQ/GPIOF0 GPIO42/TCK H_PROCHOT_EC {3}
20
GPIO43/TMS AMP_MUTE# {34}
9 21
{10,31} USB_Normal_OC#_R GPIO65/SMI GPIO44/TDI FB_CLAMP_TGL_REQ# {20}
GPIO GPO47/SCL4/N2TCK 24
o
WMAX_P {30}
25
{38} MX0
54
55 KBSIN0/GPIOA0/N2TCK
GPIO50/PSCLK3/TDO
GPIO51/N2TCK
26
27
D/C# {40}
S5_ON {3,20,41} INTERNAL KEYBOARD STRIP SET <KBC>
{38} MX1 KBSIN1/GPIOA1/N2TMS GPIO52/PSDAT3/RDY LVDS_BRIGHT {29}
56 28 HWPG MY0 R21 10K_4 +3VPCU
{38} MX2 KBSIN2/GPIOA2 GPIO53/SDA4/N2TMS
57 73
{38} MX3 KBSIN3/GPIOA3 GPIO70 SUSC# {8}
58 74
{38} MX4 KBSIN4/GPIOA4 GPIO71 MPWROK {8,45}
59 75
{38} MX5 KBSIN5/GPIOA5 GPIO72 RSMRST# {8}
ID EEPROM <KBC>
H
60 82
{38} MX6 KBSIN6/GPIOA6 GPIO75/SPI_SCK SLP_SUS# {8,12}
61 83 RF_EN RF_EN {30} +3VPCU
{38} MX7 KBSIN7/GPIOA7 GPO76/SPI_MOSI U5
84 3mA
GPIO77/SPI_MISO ID {40}
C 53 91 DNBSWON# 2ND_MBCLK 6 1 C
{38} MY0 KBSOUT0/GPIOB0/SOUT_CR/JENK GPIO81/FW_P/F_SDIO2 DNBSWON# {8} SCL A0
52 110 2ND_MBDATA 5 2
{38} MY1 KBSOUT1/GPIOB1/TCK GPO82/IOX_LDSH/VD_OUT1 NUMLED {38} SDA A1
51 112 3
t
{38} MY2 KBSOUT2/GPIOB2/TMS GPO84/IOX_SCLK/VD_OUT2 SUSACK# {8} A2
50 107 EC_PXSTATE R82 0_4
{38} MY3 KBSOUT3/GPIOB3/TDI GPIO97/DA3 DGPU_PWROK {11,16,22,37}
49 KB 7 8
{38} MY4 KBSOUT4/GPIOB4/JENO WP VCC
48 4
{38} MY5 KBSOUT5/GPIOB5/TDO GND
47 31 SKU_STRAP_1 C101
{38} MY6 KBSOUT6/GPIOB6/RDY GPIO56/TA1
43 TIMER GPIO20/TA2/IOX_DIN_DIO 117 TEMP_ALERT# {11} M24C08-WMN6TP
{38} MY7 KBSOUT7/GPIOB7
u
42 63 0.1U/16V_4Y
{38} MY8 KBSOUT8/GPIOC0 GPIO14/TB1 FANSIG1 {3}
41
{38} MY9 KBSOUT9/GPIOC1/SDP_VIS
40 ADDRESS: A0H
{38} MY10 KBSOUT10&P80_CLK/GPIOC2
39 32 RF_LED#
{38} MY11 KBSOUT11&P80_DAT/GPIOC3 GPIO15/A_PWM RF_LED# {39}
38 118 SUSLED_EC#
{38} MY12 KBSOUT12/GPO64/TEST GPIO21/B_PWM SUSLED_EC# {39}
37 TIMER 62 BAT_SAT0#
o
{38} MY13 KBSOUT13/GPIO63/TRIST GPIO13/C_PWM BAT_SAT0# {39}
36 65 BAT_SAT1#
{38}
{38}
MY14
MY15
35
34
KBSOUT14/GPIO62/XORTR
KBSOUT15/GPIO61/XOR_OUT
GPIO32/D_PWM
GPIO45/E_PWM
22
16
BAT_SAT1# {39}
SUSON {42} SPI FLASH <KBC>
{38} MY16 GPIO60/KBSOUT16 GPIO40/F_PWM/1_WIRE MAINON {27,43,46}
33 81
{38} MY17 GPIO57/KBSOUT17 GPIO66/G_PWM KB_LED {38}
66
y
GPO33/H_PWM/VD1_EN CAPSLED {38}
MBCLK 70 14
{40} MBCLK
MBDATA 69 GPIO17/SCL1/N2TCK GPIO34 BT_RFCTRL {30} B2A SPI_SDI_uR
{40} MBDATA GPIO22/SDA1/N2TMS PCH_SPI_SI {9}
2ND_MBCLK 67 SMB
{10} 2ND_MBCLK GPIO73/SCL2/N2TCK
2ND_MBDATA 68 113 SPI_SDO_uR
a
{10} 2ND_MBDATA GPIO74/SDA2/N2TMS GPIO87/SIN_CR FB_CLAMP {17,20,48} PCH_SPI_SO {9}
3ND_MBCLK 119 IR 23 R44 1K_4
{20,31} 3ND_MBCLK GPIO23/SCL3/N2TCK GPIO46/TRST ACZ_SDOUT_R {9}
3ND_MBDATA 120 111 EC_DRAMRST_CTRL {27} SPI_SCK_uR
{20,31} 3ND_MBDATA GPIO31/SDA3/N2TMS GPIO83/SOUT_CR PCH_SPI_CLK {9}
R42 *10K_4 +3VPCU
R61 *100K/F_4 SPI_CS0#_uR
PCH_SPI_CS0# {9}
TPCLK 72 86 SPI_SDI_uR
{38} TPCLK GPIO37/PSCLK1 F_SDI&F_SDIO1
TPDATA 71 87 SPI_SDO_uR +3V_S5 R66 10K_4
{38} TPDATA GPIO35/PSDAT1 F_SDIO&F_SDIO0
L
10 PS/2 FIU 90 SPI_CS0#_uR
{8} AC_PRESENT GPIO26/PSCLK2 F_CS0
11 92 SPI_SCK_uR
{31} USB_SC_EN# GPIO27PSDAT2 F_SCK
77 30
{8} SUSCLK GPIO00/EXTCLK/F_SDIO3 GPIO55/CLKOUT/IOX_DIN_DIO SUS_PWR_ACK {8}
85 VCC_POR# R56 4.7K_4 +3VPCU
12 EST_RST
VCORF
+VTT VTT
AGND
GND1
GND2
GND3
GND4
GND5
GND6
R55 43_4 EC_PECR_R 13 104 VREF_uR R80 *0_4 +A3VPCU

{3} EC_PECI PECI GPIO80/VD_IN1 B2A
n
B
R81 0_4 USB_Normal_OC#_L
USB_Normal_OC#_L {10,31} HWPG circuit <KBC> +3VPCU B
5
18
45
78
89
116
103
44
NPCE985LA0DX
VCORF_uR
u
PCLK_591 +VTT
R39
C72
L1 *short_6 10K_4
R77 *0.1U/16V_4Y
C58
*22_4 R40 OEV@0_4
{11,16,22,37} DGPU_PWROK
1U/6.3V_4X
Y
C84 8769AGND
*10P/50V_4C
SKU_STRAP_1 R33 *10K_4 +3VPCU
g
R37 *10K_4
R24 *SHORT_4 HWPG

{44} HWPG_VCCSA
n
SKU_STRAP_2 R45 *10K_4 +3VPCU
Capetown@/Aswan@ EV@ / IV@ R26 *SHORT_4
{46} HWPG_1.8V
R46 10K_4
a
MS Strap SKU_STRAP_2 SKU_STRAP_3
R34 *SHORT_4
{8,41} SYS_HWPG
i
14'' Capetown UMA 1 0
Power Button <KBC> 14'' Capetown DIS 1 1
R29 *SHORT_4
{42} HWPG_1.5V
17'' Aswan UMA 0 0
SKU_STRAP_3 R51 EV@10K_4 +3VPCU 17'' Aswan DIS 0 1
X
DNBSWON# C79 *0.1U/16V_4Y R52 IV@10K_4
A A
NBSWON#_R C80 *0.1U/16V_4Y
r
SKU_STRAP_4 R799 *10K_4 +3VPCU VGA_PWR_LEVEL {20}
3
R798 10K_4
Q4
o
SKU_STRAP_1 2
SKU_STRAP_4
B2A Quanta Computer Inc.
EV@ME2N7002E_200MA
H Shark Bay PROJECT : BD5
F
1
L Chief River Size Document Number Rev
B2A 1A
EC-NPCE795L
5 4 3 2 1
5 4 3 2 1
CN1
TP board <TPD>
38
36
INT KeyBoard <KBC> K_LED_P
Power board w LED <PSW>
1 MY16
2 MY16 {37}
3 MY17
4 MY17 {37}
+3VPCU 5 PWRLED#_Q
6 MY2 +TP_PWR CN4
7 MY2 {37}
RP24 MY1
8 MY1 {37} +5V 1
3
10 1 10KX8 MX7 MY0 R95
9 MY0 {37} {37} NBSWON# 2
MX1 9 2 MX2 MY4 L3 NMTP@0_6 PWRLED#_Q
e
MY4 {37} +5V *0_4
MX6 8 3 MX3 10 MY3 3
11 MY3 {37} 4
MX5 7 4 MX4 MY5 3mA CN5 PWRLED# 2 Q10
12 MY5 {37} {37} PWRLED#
MX0 6 5 MY14 +3V L2 IDTP@0_6 6 50503-0040N-001
13 MY14 {37} 6
MY6 TPDATA 5
s
14 MY6 {37} {37} TPDATA 5
MY7 TPCLK 4 ME2N7002E_200MA
D 15 MY7 {37} {37} TPCLK 4 D
MY13 3
MY13 {37} B2A
1
C15 *220P/50V_4X MX7 16 MY8 C218 CGCLK_SMB 2 3
17 MY8 {37} {14,15,30} CGCLK_SMB 2
C16 *220P/50V_4X MX2 MY9 E@1000P/16V_4X CGDAT_SMB 1
18 MY9 {37} {14,15,30} CGDAT_SMB 1
C17 *220P/50V_4X MX3 MY10
19 MY10 {37}
C18 *220P/50V_4X MX4 MY11 50503-0060N-001
20 MY12
MY11 {37} B2A B2A
21 MY12 {37}
U
MY15 C233
22 MX7
MY15 {37} B2A
23 MX7 {37}
C19 *220P/50V_4X MX0 MX2 *E@10P/50V_4C
24 MX2 {37}
C20 *220P/50V_4X MX5 MX3
25 MX3 {37}
C21 *220P/50V_4X MX6 MX4
26 MX4 {37}
C22 *220P/50V_4X MX1 MX0
27 MX0 {37}
MX5 TPCLK
28 MX5 {37}
MX6
e
29 MX6 {37}
MX1
30 MX1 {37}
C11 *220P/50V_4X MY7 K_LED_P
C12 *220P/50V_4X MY13 31 CAPSLED
32 CAPSLED {37}
C13 *220P/50V_4X MY12 C197
K/B LED power <KBP>
s
C14 *220P/50V_4X MY15 33
34 *E@10P/50V_4C
35 NUMLED CN2
NUMLED {37}
u
C7 *220P/50V_4X MY3 91504-340N +5V
C8 *220P/50V_4X MY5 GPIO52 1
{10,11} GPIO52 2
C9 *220P/50V_4X MY14 KB_LED_DET#
C10 *220P/50V_4X MY6 3 6
4 5
KBP@87060-0040N
o
C3 *220P/50V_4X MY2
B2A B2A
C4 *220P/50V_4X MY1
C5 *220P/50V_4X MY0 KB_LED_ON#
C6 *220P/50V_4X MY4
3
C2 *100P/50V_4N MY17 C732
KB_LED R12 KBP@300_4 2 KB_LED R8 *KBP@300_4 2 Q2
C {37} KB_LED *KBP@680P/50V_4X C
Q3
1
C1 *100P/50V_4N MY16 C47 KBP@MMBT2222A_600MA C39 *KBP@MMBT2222A_600MA
t
*KBP@1U/6.3V_4X *KBP@1U/6.3V_4X
R1 150_4 K_LED_P
+3V B2A
u
+5V
GPIO52
C23 C24
o
*KBP@1000P/50V_4X *KBP@220P/50V_4X
HOLE
a y
TOUCH PANEL <TPP>
+5V
+3V
L41
L42
*TPP@0_6
TPP@0_6
+TPP_PWR
L
HOLE14 HOLE1 HOLE2 HOLE3 HOLE5 HOLE4
7 6 7 6 7 6 7 6 7 6 C723 C724
8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 TPP@4.7U/6.3V_6X TPP@0.1U/10V_4X
1
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
n
B B
*PAD *EMI-PAD *EMI-PAD *EMI-PAD *EMI-PAD *EMI-PAD
+TPP_PWR
u
CN2021
HOLE7 HOLE10 HOLE9 HOLE12 HOLE13 1
7 6 7 6 7 6 7 6 7 6 R777 TPP@0_4 USB_Touch#_R 2 1
{10} USBP3N 2
8 5 8 5 8 5 8 5 8 5 {10} USBP3P R776 TPP@0_4 USB_Touch_R 3
HOLE15 9 4 9 4 9 4 9 4 9 4 4 3
R775 *TPP@0_4 TOUCH_RST# 5 4
{3,10,30,35,36,37} PLTRST# 5
R774 *TPP@0_4 TOUCH_PA4 6
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
Y
TPP@50273-0060N-001
*PAD *EMI-PAD *EMI-PAD *EMI-PAD *EMI-PAD *EMI-PAD
1
C3A
n g B2A
a
VGA HOLE CPU HOLE
i
MINI Card NUT
HOLE8 HOLE6 HOLE11
HOLE16
2
X
HOLE17
1
A A
1
*PAD *PAD *PAD
r
*AMD-APU-BRACKET *PAD
o Quanta Computer Inc.

1
PROJECT : BD5
F
B2A 1A
KB/TP/PB/HOLE
5 4 3 2 1
5 4 3 2 1
LED-Battery <LED><W+A> LED-Power <LED><W+A>

39
0.05A
2 12-12Z/S2ST3D-C31/2C(QN) -BATLED0 R451 2.2K_4
BAT_SAT0# {37}
e
+5VPCU LED1 1
0.05A
2
3 -BATLED1 R460 1.2K/F_4 LED2 1 3 12-11Z/T3D-CP2Q2B12Y/2C(QN) -SUSLED R457 1.2K/F_4 SUSLED_EC#
s
BAT_SAT1# {37} +5VPCU SUSLED_EC# {37}
D D
B2A
LED-WiFi
+5V R454
<LED>
NAOAC@1.2K/F_4
0.025A
LED3 2 3 1 12-21/S2C-AQ2R2B/2C RF_LED_R R456 0_4

ESD Protect <EMC>
FOR BATTERY LED
-BATLED1
D17
B2A
FOR POWER
LED D16
e U FOR RF LED
D15
s
RF_LED# {37} 1 1 1
R455 AOAC@1.2K/F_4 3 3 3
+5V_S5
-BATLED0 -SUSLED RF_LED_R
2 2 *PJMBZ5V6 2 *PJMBZ5V6
u
*PJMBZ5V6
o
EMI
VIN VIN
C
C25
*E@0.1U/10V_4X
C111
*E@0.1U/10V_4X
C358
*E@0.1U/10V_4X
C67
*E@0.1U/10V_4X
C187
*E@0.1U/10V_4X
C495
*E@0.1U/10V_4X
C507
*E@0.1U/10V_4X
C499
*E@0.1U/10V_4X
C500
*E@0.1U/10V_4X
C475
*E@0.1U/10V_4X
t H C
+1.5VSUS +1.5VSUS
ou
y
C173 C51 C247 C175 C50 C246
*E@0.1U/10V_4X *E@0.1U/10V_4X *E@0.1U/10V_4X *E@150P/50V_4N *E@150P/50V_4N *E@150P/50V_4N
L a
n
B B
Y u
n g
i a
X
A A

PROJECT : BD5
F
1A
LED/EMI
5 4 3 2 1
5 4 3 2 1
B2A
PCN2
6 DC_JACK
PF2
F1206HA15V024TM
1 2 VA0
VA1 PD4
1
3 VA2 1
0.01_3720
PR132
2
R1
VA3 3
PQ7
AOD403
4
VIN
B2A
1
2
PQ9
AP4439GMT
5 BAT-V
P1
2 3
5
SBR1045SP5-13 PC87
1
1
e
4 PC110 PC121 PC116 PC139 PR163 PC89 E@2200P/50V_4X
4
E@2200P/50V_4X E@0.1U/25V_4X E@1U/25V_6X 0.1U/25V_6X 220K/F_4 E@1U/25V_6X PR110
PD2 33K_6
3
s
PR23 PR24
2
D 2 PD1 TVS_SMAJ20A 10/F_6 10/F_6 D
PR115
1 1SS355_100MA ( Near by sense R side)
1 6
B2A 10K/F_6
50302-00641-001
U
PR162 2 5
3
220K/F_4
3 4
PQ6
PR32 CSIN PQ14 2 2N7002K_300MA
{37} D/C#
82.5K/F_6
e
+3VPCU IMD2AT108
CSIP
s
{37} AC SET_EC
1
VIN
PR42
10U/6.3V_6X
PR25 10K/F_4 PC29 PC26 1U/6.3V_4X

PC24
u
10K/F_4 0.1U/10V_4X 1 2
10U/25V_8X
10U/25V_8X
*10U/25V_8X
*10U/25V_8X
*2200P/50V_4X
*0.1U/25V_4X
PC20
PC21
PC16
PC130
PC136
PC135
o
PR28
( Near by IC side) 4.7_6
PC34 1U/6.3V_4X
1 2
ACIN
H
33
32
31
30
28
27
26
21
{37} ACIN
5
+3VPCU
PC51 0.1U/10V_4X
CSSP
VDDP
NC
GND
GND
GND
GND
CSSN
VCC
PQ12
C PR29 PC25 C
t
2.7_6 0.1U/25V_6X 4 AON7410
{37,40} MBDATA 11 25
VDDSMB BOOT
0.01_3720
3
2
1
u
{37,40} MBCLK 9 24 88731A_U_GATE PR148
SDA UGATE
PL3
10 23 88731A_PHASE 1 2 BAT-V
SCL PHASE
5
PD3 3.3UH_7X7_TOK
10U/25V_8X
10U/25V_8X
TVLST2304AD0 13 20 88731A_L_GATE
ID 1 6 MBDATA ACOK LGATE PQ11 PR20
PC125
PC126
CH1 CH4 PC39 E@2.2/F_6
y
2 5 PR37 0.1U/25V_6X 19 4 AON7410
VN VP +3VPCU PGND
49.9/F_6 PU2 PR153 PR154
TEMP_MBAT 3 4 MBCLK DCIN 22 ISL88732HRTZ-T 10/F_6 10/F_6
CH2 CH3 DCIN
a
PC18
3
2
1
PR36 E@1000P/50V_4X
82.5K/F_6 3.2V 18
88731ACIN 2 CSOP
ACIN ( Near by sense R side)
PC44
0.1U/10V_4X CSOP
L
+3VPCU
PR39 3 ( Near by IC side)
22K/F_6 VREF 17 CSON
PC93 *E@0.1U/25V_4Y CSON
4
PR101 ICOMP 16
NC
*SHORT_4
n
PR116 5
*100K_4 NC
PCN1 PF1 15 PR152 100_4 BAT-V
B F1206HA15V024TM 6 VBF B
10 VCOMP
u
MBAT+ 1 2 BAT-V 29 (Please place this R near by battery pack side)
1 GND
GND
12 2
ICM
PR95 1K_4 NC
NC
3 ID {37}
BAT-GND
4 TEMP_MBAT_C
7
14
12
5 M-DATA
6
Y
M-CLOCK PR40
7 2.21K/F_6
13 8 PC88 +3VPCU
9 PC40 PC43 PC45
11
2
g
PC107 47P/50V_4N
PR131 PR105
100/F_4 PR104 *1U/6.3V_4X 2200P/50V_4X 0.01U/25V_4X PR41
1
100/F_4 ICMNT {37}

100K_4
n
BTJ-09BJAB 47P/50V_4N MBDATA {37,40} 100_4
1K_4
MBCLK {37,40} 10U/6.3V_6X
PC50
TEMP_MBAT {37}
a
PR123
i
1
PC97
0.01U/25V_4X
2
r X A
Fo 4 3 2
Size
Date:
Document Number
CHARGER-ISL88731C
1
Sheet 40 of 50
Rev
A1A
5 4 3 2 1
VIN
VIN
P2
10U/25V_8X
E@2200P/50V_4X
VIN
PC78
PC206
+5VPCU PC204
10U/25V_8X
E@2200P/50V_4X
0.1U/25V_6X
e
PC79
1 2
PC77
PC205
PC203
0.1U/25V_6X PR69
s
D 2.2/F_8 10U/6.3V_6X D
+3VPCU +2VREF
10U/6.3V_6X
1
1
PC80 PC83
PC84
B2A 0.1U/25V_6X 1U/6.3V_4X
2
e
PR80
B2A *0_2/S
16
17
5
5
s
PQ36 PU4 PQ35
B2A AON6414AL
TP72 B2A
VIN
VREG3
VREG5
REF
(Peak 13.16A ,AVG 9.52A) 13 4 AON7410 (Peak 10.6A ,AVG 7.4A)
EN TONSEL
OCP:15.8A ~ 17.1A OCP:12.7A ~ 13.8A
u
4 5V_UGATE1 21 10 3V_UGATE2 4
+5V_S5
B2A PR72 UGATE1 UGATE2 PR73 PC82
+3V_S5
PC81 0.1U/25V_6X 1 25V_BST1 22 9 1 2
BOOT1 BOOT2
DCR=19mOhm DCR=19mOhm
1
2
o
3
3
2
1
PL12 2.2_6 RT8223P 2.2_6 0.1U/25V_6X PL13
5V_PHASE1 20 11 3V_PHASE2
2.2UH_10X10 PHASE1 TOP Side PHASE2 2.2UH_7X7_TOK
5
5V_LGATE1 19 12 3V_LGATE2
B2A
220U/6.3V_105CS_E18e
220U/6.3V_105CS_E18e
PR229 LGATE1 LGATE2
H
24
PC197
PC198
ENTRIP1
ENTRIP2
SKIPSEL
+ *E@2.2/F_6 5V_FB1 2 VOUT1 7 PR230 +
C FB1 OUT2 C
4 4
EMC
GND
GND
PR79 PR77 DDPW RGD_R 23 5 3V_FB2 *E@2.2/F_6
t
*0_2/S PGOOD FB2 PR78 PR81
*0_2/S
PQ37 Rds=5.6mOhm PQ34 *0_2/S *0_2/S
1
2
3
18
14
25
15
3
2
1
PC201 AON6758 AON7752 PC202
*E@1000P/50V_4X
u
PR83 Rds=13mOhm *E@1000P/50V_4X
147K/F_4 PR82
o
PR237 *0_4/S
+3VPCU
124K/F_4
y
PR84
15.4K/F_4
1
PR85 PR238
0_6 PR86
10K/F_4 PR70
a
10K_4
PR71
2
*SHORT_4 6.8K/F_4
PC212 +3VPCU
L
2 {3,20,37} S5_ON
0.1U/25V_6X PR236
PD7
BAV99W -7-F_150MA 3
10K/F_4
1
PC209
n
3V_LGATE2 PR74
0.1U/25V_6X
B B
2 *10K_4
PD6
BAV99W -7-F_150MA
3
u
PC208
1 0.1U/25V_6X DDPW RGD_R
SYS_HW PG {8,37}
PR231
+15V_ALW P
Y
+15V +5V_S5
22_8 B2A +3V_S5

PC207
0.1U/25V_6X
5
PQ30
n 5
AON7410
PQ28
AON7410 MAIND 4
a
MAIND 4
i
3
2
1
{27,42,46} MAIND MAIND
3
2
1
X
A A
+3V +5V
(Peak 5.6A ,AVG 3.9A) B2A (Peak 6.6A ,AVG 4.6A)
r
Fo 4 3 2
Size
Date:
Document Number
System 3V/5V(TPS51123A)
W ednesday, January 16, 2013
1
Sheet 41 of 50
Rev
A1A
5 4 3 2 1
Be careful to this two net name.

B2A
P3
35.7K/F_4 PR30
VIN
PR26 *SHORT_4
E@2200P/50V_4X
10U/25V_8X
PR33
S3_1.5V {27}
200K_4
e
+3VPCU
PC118
PC128
*100K_4 S5_1.5V PC122
SUSON {37}
PR21 *SHORT_4 0.1U/25V_6X
s
D D
{37} HWPG_1.5V PR19
PR31
PC14 0.1U/25V_6X
2.2/F_6
U
B2A
23
22
21
20
19
18
17
16
PU1 Rds=2.8mOhm
PR35 PQ8
PGOOD
MODE
TRIP
PwPad-2
PwPad-1
PwPad
S3
S5
e
1 15 HP8S36TB
VTTSNS VBST
2
B2A
G1
D1
D1
D1
+1.5VSUS_SRC *0_2/S 2 14 1.5SUS_HG
s
VLDOIN DRVH
(Peak 16.7A ,AVG 11.7)
3 TPS51216RUKR 13 DCR=4.2mOhm
+SMDDR_VTERM VTT SW OCP:20A ~ 21.7A
10U/6.3V_6X
10U/6.3V_6X
S1/D2
PC36
PC35
VDDQSNS
4 12 PL1
VTTGND V5IN
PwPad-3
PwPad-4
PwPad-5
1.5SUS_PHASE 9
+1.5VSUS
REFIN
PGND
5 11
VREF
GND
VTTREF DRVL
o
1.5UH_10X10
+5V_S5
G2
S2
S2
S2
ESR=10mOhm
PR96 PC114
24
B2A
25
26
10
5
PR34 PC12 1 2 1U/6.3V_4X + PC119
+SMDDR_VREF
390U/2.5V_105CS_E10f
C *E@2.2/F_6 C
H
0_8 1.5SUS_LG PR155 PR161 *10U/6.3V_6X
PC37 *SHORT_4 *0_8/S
(Peak 0.1A, AVG 0.07A) 0.22U/10V_4X
t
PC90
*E@1000P/50V_4X PC120
u
*0.1U/10V_4X
B2A
+1.5VSUS_SRC
PR27
10K/F_4 R1
a y +1.5VSUS B2A
L
PC27
B 0.1U/10V_4X PC23 B
1
2
5
6
0.01U/25V_4X
PR22
52.3K/F_4 MAIND 3
n
PQ1
{27,41,46} MAIND AO6402A
R2
4
Vout = 1.8 * (R2/R1+R2)
gY (Peak 1.1A ,AVG 0.78A)

+1.5V
i a n Quanta Computer Inc.

A
X
A1A
DDR1.5V
5
o r 4 3 2
Date: Wednesday, January 16, 2013 Sheet
1
42 of 50
F
5 4 3 2 1
+3V_S5
P4
e
D D
*E@2200P/50V_4X
PR48 PR50
10K_4 *0_4
+5V_S5 PR55 10/F_6
s VIN
RT8240BTON
RT8240BVCC
1
10U/25V_8X
PC70
U
+3V_S5
1U/6.3V_4X B2APC171
PC172
B2A
2
0.1U/25V_4X
PC64
Rds=2.8mOhm
e
PQ24
PR62 HP8S36TB (Peak 18.75A ,AVG 13,12A)
11
B2A PR45 PC65
2
s
10K_4 PU3
OCP:22.5A ~ 24.4A
G1
D1
D1
D1
3 RT8240BDH
VCC
G0
PR54 UGATE
10
CS 4 RT8240BBST_1 2.2_6 0.1U/25V_6X +VTT +1.05V
*Celeron@330U/2V_7343P_E9c
C 66.5K/F_4 BOOST B2A B2A C
S1/D2
9 RT8240BZQW PL9
{44} HWPG_VCCIO PGOOD 2 RT8240BLX 9
o
8 PHASE
EN 1 RT8240BDL 1.0UH_10X10
330U/2V_7343P_E9c
G2
LGATE
S2
S2
S2
RGND
GND
13
PC166 10U/6.3V_6X
PC165 0.1U/10V_4X
PR196
FB
5
PAD
H
ESR=10mOhm
*E@2.2/F_6
12
6
t
PR61
0_4 + +
RT8240BFB
PC170
u
{27,37,46} MAINON
PC168
PC224
*E@1000P/50V_4X
B PC71 PC73 B
0.1U/10V_4X
*100P/50V_4N
PR65
PR67 0_4
y o VCCP_SENSE {5}
PR57
100_4
a
0_4
R1
PR63
PR59 0_4
*10K/F_4
VSSP_SENSE {5}
n
R2 PR60
*0_4
L Quanta Computer Inc. A
5 4
Y u VOUT=(1+R1/R2)*0.5
3 2
Size
Date:
Document Number
+VCCIO(RT8240BGQW)
Sheet
1
43 of 50
Rev
A1A
n g
i a
r X
Fo
1 2 3 4 5
PR177 76@2.2K_4
{37} HWPG_VCCSA
VCCSA_VID1 {5}
B2A P5
e
A A
+5V_S5 VCCSA_VID0 {5}
B2A
PC60
PC152
76@1U/6.3V_4X
76@2.2U/10V_6X
HWPG_VCCIO {43}
PR178 76@2.2K_4
Us
PC151 *76@0.033U/10V_4X
s e
18
17
16
15
14
13
u
V5DRV
VID1
VID0
V5FILT
PGOOD
EN
PC153 (Peak 6A ,AVG 4.2A)
19 12
B PGND BST OCP:7A ~ 8A B
o
76@0.1U/25V_6X +VCCSA
20 11
PGND SW
PL8 B2A
H
21 10
PGND SW
76@100_4
PC154 PC62 PC155 76@TPS51462RGER 76@0.47UH_7X7
76@10U/6.3V_6X 76@10U/6.3V_6X 76@0.1U/10V_4X PU8
t
22 9
VIN SW PC150 PC156 PC59 PC63
76@22U/6.3V_8X76@22U/6.3V_8X76@22U/6.3V_8X 76@22U/6.3V_8X
u
23 8
VIN SW
PR43
o
+5V_S5 24 7
VIN SW
COMP
MODE
SLEW
VOUT
VREF
VCCSA_VCCSSENSE_R
GND
VCCSA_VCCSSENSE {5}
PR44 76@0_4
y
C C
1
6 a
R +VCCSA
76@0.01U/25V_4X
76@3300P/50V_4X
OPEN *0.8V
76@5.1K/F_4
VCCSA_VID0 VCCSA_VID1 +VCCSA PR179 *76@33K/F_4
L
PC160 33K *0.85V
0 0 0.9V R
76@0.22U/10V_4X
0 1 *0.8V
n
PR181
PC158
0 1 *0.85V PR180
PC159
u
1 0 0.725V *76@10K_4
1 1 0.675V
D
Quanta Computer Inc. D
Y
*0.8V FOR SV TYPE
*0.85V FOR LV/ULV TYPE PROJECT : Chief River
g
A1A
+VCCSA(TI51461)
n
1 2 3 4 5
i a
r X
Fo
5 4 3 2 1
PR159
95836_BOOT1G
PIV@2.2/F_6 VIN
P6
PIV@10U/25V_8X
PIV@10U/25V_8X
*PIV@2200P/50V_4X
*PIV@10U/25V_8X
*PIV@0.1U/25V_4X
PC19
PC13
PC28
PC33
PC138
PC134
PIV@0.22U/25V_6X PQ15
2
PIV@HP8S36TB
G1
D1
D1
D1
95836_UGATE1G
B2A
PR16 PC11
S1/D2
PC1 PIV@2K/F_4 PIV@1000P/50V_4X PL6 PIV@0.24UH_7X7
*PIV@330P/50V_4X 95836_PHASE1G 9 B2A +VAXG
e
PR4 PR252 35WPIV@2.55K/F_4 PR251 35W@33.2K/F_4
*PIV@2.2/F_6
*PIV@330U/2V_7343P_E9c
PIV@560U/2V_7343P_E4.5a_3pin
G2
S2
S2
S2
PR38
PIV@0_4
VCC_AXG_SENSE_R
PC141
+ +
*PIV@10U/10V_8X
+VCC_AXG
*PIV@0.1U/10V_4X
{5} VCC_AXG_SENSE
PC52
PR168
PR173
PR3 45WPIV@3.65K/F_4 PR15 45W@40.2K/F_4
TDC : 38A
s
{5} VSS_AXG_SENSE VSS_AXG_SENSE_R PR18 PC17 95836_LGATE1G
PC46
PC42
PC131 PIV@267K/F_4 PIV@150P/50V_4N
PR5 PEAK : 46A
PC38
PIV@0_4
OCP : 55A
*PIV@1000P/50V_4X
D ISUMPG D
*0_2/S
*0_2/S
PIV@0.01U/25V_4X PC2 PR7 PC15
+5V_S5
Width : 1840mil
PIV@390P/50V_4X PIV@499/F_4 PIV@47P/50V_4N
ISUMNG B2A
ISUMPG PR142 PIV@3.65K/F_6 GFX_CORE Load Line :
U
VSUMG-
45WPIV@0.22U/10V_4X
45WPIV@0.22U/10V_4X
PR158 -3.9mV/A for GT2
PC115
OEV@1K_4 PR143 ISEN1G
+5V_S5
PC111
PC230
PC113
PIV@2.61K/F_4 PR130 45WPIV@10K/F_4
PC112
PIV@0.1U/10V_4X PR144
PIV@11K/F_4
+5V_S5
45WPIV@0.1U/10V_4X
35WPIV@0.047U/10V_4X
ISEN1G
ISUMNG
e
PR10 PR14 ISEN2G PR172
*SHORT_6 *SHORT_6 PR250 35WPIV@442/F_4 PIV@NTC_10K_4 B2A
PR89
VSUMG- PR88 ISEN2G
39
38
37
40
1
3
PR136 45WPIV@392/F_4
s
PR145 connect to +5V PC108 PIV@1/F_4 45WPIV@10K/F_4
B2A
RTNG
FBG
COMPG
ISUMPG
ISUMNG
ISEN1G
ISEN2G
+3V_S5 +3V_S5 +1.05V 35WPIV@1K/F_4 (disable AXG-2)
PC6 PC5 PIV@0.1U/10V_4X
1U/6.3V_4X 1U/6.3V_4X B2A PC103 PR138
*100K/F_4
C518 0.1U/10V_4X 95836_VCCP 26 35 95836_PWM2G PIV@4700P/25V_4X PIV@649/F_4

*1.91K/F_4
VCCP PWM2G
1.91K/F_4
*499/F_4
45WPIV@10U/25V_8X
45WPIV@10U/25V_8X
*45WPIV@2200P/50V_4X
*45WPIV@10U/25V_8X
*45WPIV@0.1U/25V_4X
VIN
u
PR1
PR2
PR6
25 31
PR114
PR140 95836_VDD 95836_BOOT1G 95836_UGATE2G

VDD BOOT1G
PC9
PC22
PC132
PC140
PC137
{8,37} MPWROK PR137 0_4 100K_4
32 95836_UGATE1G 95836_PHASE2G
UGATE1G
PR127 *0_4 95836_VRON 9 33 95836_PHASE1G PQ13
{37} VRON VR_ON PHASE1G
2
45WPIV@HP8S36TB
G1
D1
D1
D1
36 34 95836_LGATE1G +5V_S5
o
GFX_PWRGD PGOODG LGATE1G
19 30 95836_BOOT2
{3,8} DELAY_VR_PWRGOOD PGOOD BOOT2
S1/D2
8 PU5 29 95836_UGATE2 PL5 45WPIV@0.24UH_7X7
{3} H_PROCHOT# VR_HOT# ISL95836HRZ-T UGATE2 PU6
45WPIV@ISL6208BCRZ-T
PR149 95836_PHASE2G 9 B2A +VAXG
5 28 95836_PHASE2 45WPIV@0_6
{5} VR_SVID_CLK SCKL PHASE2
PC3 95836_UGATE2G 1 8
*45WPIV@1000P/50V_4X *45WPIV@2.2/F_6
G2
UGATE PHASE
S2
S2
S2
45WPIV@560U/2V_7343P_E4.5a_3pin
43P/50V_4N 6 27 95836_LGATE2 45WPIV@0.22U/25V_6X
{5} VR_SVID_ALERT# ALERT# LGATE2 95836_BOOT2G 2 7
PR151
Check pull up resister to PC124 +
*45WPIV@10U/10V_8X
*45WPIV@0.1U/10V_4X
8
5
7 20 BOOT FCCM
PC145
95836_BOOT1 PR150
1.05V for H_PROCHOT# {5} VR_SVID_DATA SDA BOOT1 3 6
PR167
PR171
45WPIV@2.2/F_6 95836_PWM2G
45WPIV@1U/6.3V_4X
PWM VCC
PC53
PC54
4 21
PC117
95836_NTCG 95836_UGATE1
PAD
+1.05V NTCG UGATE1 4 5 95836_LGATE2G
GND LGATE
1
95836_NTC 10 22 95836_PHASE1
B2A NTC PHASE1 +5V_S5
PC127
9
t
23 95836_LGATE1
*0_2/S
*0_2/S
2
PR13 LGATE1
*1000P/50V_4X
PR8
PR9
24
PR11
PIV@27.4K/F_4 PR124 95836_PWM3

130/F_4
*75/F_4
54.9/F_4
PWM3
PC219
27.4K/F_4 PR12
ISEN3/FB2
41 35W@1K/F_4
C VR_SVID_CLK PAD C
ISUMN
ISUMP
COMP
ISEN1
ISEN2 95836_LGATE2G
u
PR166 PR128
RTN
PIV@NTC_470K_4 NTC_470K_4
FB
VR_SVID_ALERT# ISUMPG PR99 45WPIV@3.65K/F_6

PR17 PR106
B2A
18
17
16
15
14
13
12
11
VR_SVID_DATA PIV@3.83K/F_4 3.83K/F_4 PC99 35W@10P/50V_4C

95836_COMP ISEN2G
PR87 45WPIV@10K/F_4
o
ISEN1 VSUMG- ISEN1G
PR100 45WPIV@1/F_4 PR112 45WPIV@10K/F_4
95836_COMP ISEN2
B2A
ISEN3
y
PC95
0.22U/10V_4X
0.22U/10V_4X
PC100
PC92 PR134 PC104

68P/50V_4C 499/F_4 390P/50V_4X PC91
45W@0.22U/10V_4X 95836_UGATE1 B2A VIN
+VCC_CORE
TDC : 56A
1
PC216
VSUM- PR141
10U/25V_8X
10U/25V_8X
0.1U/25V_4X
*2200P/50V_4X
a
PC102 2.2/F_6 PQ10 + PEAK : 94A
PC4
PC8
PC7
150P/50V_4N 95836_BOOT1 HP8S36TB PC106
PR133 PR121 45W@3.57K/F_4 VSUM+ 100U/25V_105CE_f
OCP : 112A
2
Width : 3760mil
2
35W@0.1U/10V_4X
45W@0.15U/10V_4X
G1
D1
D1
D1
267K/F_4 PC109
PR253 PR103 PR254 35W@2K/F_4 PR107 0.22U/25V_6X
0.1U/10V_4X
2.61K/F_4 VCORE Load Line :
L
35W@20.5K/F_4
45W@5.62K/F_4
PR120 PR91
S1/D2
-1.9mV/A
PC85
2K/F_4 11K/F_4 PL2 0.24UH_7X7

95836_PHASE1 9 B2A +VCC_CORE
PC98 PR139
*2.2/F_6
B2A
G2
S2
S2
S2
PC86
PC231
PR156
1000P/50V_4X PR255 35W@442/F_4 NTC_10K_4
560U/2V_7343P_E4.5a_3pin
8
PR146
PR147
VSUM-
PR102 45W@576/F_4 95836_LGATE1
B2A + B2A
n
PC129
PC157
PC94
*1000P/50V_4X
PR90 0.1U/10V_4X
*330U/2V_7343P_E9c
PC96
*0_2/S
*0_2/S
PC221
4700P/25V_4X 649/F_4 +
PC105
B2A
u
*330P/50V_4X VSUM+ PR98 3.65K/F_6
PR122 10K/F_4
ISEN1 PR97 10K/F_4 ISEN2
{5} VCC_SENSE PR129 0_4 VCC_SENSE_R
{5} VSS_SENSE PR125 0_4 VSS_SENSE_R VSUM- PR135 1/F_4 ISEN3

+VAXG PR108 45W@10K/F_4
Y
B B
45W 不不不 PC101 ( Near by IC side) B2A

PIV@22U/6.3V_8X
PIV@22U/6.3V_8X
PIV@22U/6.3V_8X
PIV@22U/6.3V_8X
35W@
*PIV@22U/6.3V_8X
*PIV@22U/6.3V_8X
*PIV@22U/6.3V_8X
*PIV@22U/6.3V_8X
0.01U/25V_4X 95836_UGATE2 VIN

35WPIV@ 35W 不不
PC55
PC56
PC58
PC57
PC148
PC149
PC146
PC147
PC217
10U/25V_8X
10U/25V_8X
0.1U/25V_4X
*2200P/50V_4X
g
PR157 PQ16
PC30
PC32
PC31
2.2/F_6
95836_BOOT2 HP8S36TB
2
45W@ 45W 不不
G1
D1
D1
D1
45WPIV@ 35W 不不不 PC123
0.22U/25V_6X
n
B2A B2A PL4
S1/D2
+VCC_CORE 0.24UH_7X7
95836_PHASE2 9
+VCC_CORE
Only Discrete
OEV@
G2
S2
S2
S2
a PR160
22U/6.3V_8X
22U/6.3V_8X
22U/6.3V_8X
22U/6.3V_8X
22U/6.3V_8X
22U/6.3V_8X
VCORE Load Line :
*2.2/F_6
560U/2V_7343P_E4.5a_3pin
8
1.9mV/A
PR165
PR164
PC227
PC225
PC226
PC228
PC229
PC232
95836_LGATE2
i
PC41
+
*1000P/50V_4X
35W@ 35W & 45W
45W@ 不不
Value不
PC133
*0_2/S
*0_2/S
PR111
X
3.65K/F_6
VSUM+
B2A
VIN ISEN2 PR109 ISEN1
10K/F_4 PR94 10K/F_4
45W@10U/25V_8X
45W@10U/25V_8X
45W@0.1U/25V_4X
*45W@2200P/50V_4X
PC218
95836_PHASE_3 95836_UGATE_3
r
PC49
PC48
PC47
VSUM- PR92 ISEN3

PQ17 PR93 45W@10K/F_4
+5V_S5 45W@HP8S36TB 1/F_4
1
2
G1
D1
D1
D1
o
PU7 PR169 PL7 45W@0.24UH_7X7
45W@ISL6208BCRZ-T 45W@0_6 B2A +VCC_CORE
S1/D2
45W@560U/2V_7343P_E4.5a_3pin
95836_UGATE_3 1 8
UGATE PHASE 95836_PHASE_3 9
B2A
*45W@2.2/F_6
PR176 45W@2.2/F_6 95836_BOOT_3 2 7

45W@330U/2V_7343P_E9c
BOOT FCCM
F
PR170
PC144 +
G2
S2
S2
S2
A 3 6 A
PC61
PC10
45W@0.22U/25V_6X 95836_PWM3
*0_2/S
*0_2/S
+
PWM VCC
PAD
4 5
GND LGATE
1
95836_LGATE_3
45W@1U/6.3V_4X
*45W@1000P/50V_4X
PC143
PR174
PR175
9
PC142
95836_LGATE_3
PR119 45W@1/F_4 VSUM-
B2A VSUM+PR126 45W@3.65K/F_6 PR117 45W@10K/F_4ISEN1
PR118 45W@10K/F_4ISEN2
PR113
45W@10K/F_4
ISEN3
A1A
+VCC_CORE+VGFX (ISL95836) 35W
5 4 3 2 1
5 4 3 2 1
+5V_S5
+3V_S5
PR232 *10K_4
{27,37,43,46} MAINON
PC215 0.1U/10V_4X 4
PU10
G9661-25ADJF12U
VPP PGOOD
1
HWPG_1.8V {37} P7
e
2 6
VEN VO +1.8V
PR233 0_4
s
D (Peak 1.242A, AVG 0.869A) D
+3V_S5 3
VIN
10U/6.3V_6X
8
GND
ADJ
PC214
9 5
GND NC
U
10U/6.3V_6X
PC213
R1
7
PC211 PC210 PR235
e
0.1U/10V_4X *0.1U/10V_4X
12.7K/F_4
Vout =0.8(1+R1/R2)
R2 PR234
10K/F_4
u s
C
VIN +3V +5V

B2A +SMDDR_VTERM
Ho
+1.8V +1.5V +15V
C
PR47
1M_4
PR64
22_8
PR68
22_8
u
PR76
*22_8
t PR245
*22_8
PR75
22_8
PR56
1M_4
o
{27,41,42} MAIND
a y
3
3
PR46 PQ4A PQ4B PQ38A PQ38B PQ5A PQ5B
2 1M_4 2 5 2 5 2 5 PC67
L
{27,37,43,46} MAINON 2200P/50V_4X
B B
2N7002KDW_115MA 2N7002KDW_115MA *2N7002KDW_115MA *2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA
PQ2
1
4
n
PR51
100K_4
LTC044EUBFS8TL_30MA
Y u
MAINON_ON_G
n g
a
{27} MAINON_ON_G
A
Quanta Computer Inc. A
Xi Size Document Number

+1.8V/Discharge
PROJECT :Chief River
Rev
A1A
r
5 4 3 2 1
Fo
5 4 3 2 1
B2A VIN
Single Phase Operation

B2A
P7
*EV@2200P/50V_4X
EV@10U/25V_8X
EV@10U/25V_8X
EV@0.1U/25V_6X
0924
1
+3V_GPU
PR223
PC222
PC199
PC200
PC76
8812A-VREF PR218 *EV@82.5K/F_4
2
2
D D
+5V_S5
e
PR244 *EV@43K/F_4
*EV@10K_4
PR212
B2A
PQ25
+VGPU_CORE
1
s
8812A-PSI EV@HP8S36TB
2
Rds=2.8mOhm TDC : 35A
G1
D1
D1
D1
EV@0_6
PC183
PEAK : 50A
OCP : 60A
8812A-PVCC
PR202 1 2
S1/D2
*EV@0_4 Width : 1400mil
U
9
PC188
EV@1U/10V_4X
1 2
18
Fsw setting=300KHz
G2
S2
S2
S2
PU9 PR205 PC178 +VGPU_CORE
EV@0.01U/25V_4X PR219 1 8812A-BOOT1
PVCC
5
PR217 EV@499K/F_4 8812A-TON 9 BOOT1
TON 2 8812A-UGATE1 EV@2.2/F_6 EV@0.1U/25V_6X
e
EV@1/F_4 UGATE1 PL10
20 8812A-PHASE1 CORE-PHASE1
EV@0_4 PR200 8812A-EN 3 PHASE1 EV@0.22UH_7X7X4
{48} DGPU_PWR_EN_RC EN 19 8812A-LGATE1
B2A
s
PC176 1 2 *EV@0.1U/10V_4X LGATE1
EV@330U/2V_7343P_E6b
EV@330U/2V_7343P_E6b
8812A-PSI 4 PR206
C {20} GPU_PSI PSI C
EV@330U/2V_7343P_E6b
PR203 EV@0_4 EV@RT8812A PR209 *EV@2.2/F_6
PR222 PC187 + +
PR204 8812A-VID 5 15 8812A-BOOT2 B2A EV@11.5K/F_4 +
u
{20} GPU_VID0 VID BOOT2
PC184 B2A VIN
PC173
PC181
EV@0_4 14 8812A-UGATE2 EV@2.2/F_6 EV@0.1U/25V_6X
UGATE2
PC75
1 2 8812A-VREF 8 8812A-UGATE2
8812A-RGND VREF
PHASE2
16 CORE-PHASE2 PR220 *EV@0_4 PC180 B2A
EV@0.1U/10V_4X *EV@1000P/50V_4X
o
8812A-REFADJ 6 17 8812A-LGATE2 PR225 EV@10K_4
REFADJ LGATE2
*EV@2200P/50V_4X
EV@10U/25V_8X
EV@10U/25V_8X
EV@0.1U/25V_6X
GL@30K/F_4
GV2@20K/F_4
1 2
+3V_S5
1
PR240
PR213
PC223
PC175
7
R2 REFIN B2A
PC174
PC69
13 8812A-PG PR224
B2A R1 PG GPU_PWR_GD {48}
G1
D1
D1
D1
*E@0.01U/25V_4X
8812A-REFIN
EV@0_4 PQ31
2
PC182
12 8812A-VSNS EV@HP8S36TB
H
PR210 GV2@20K/F_4 VSNS
Rds=2.8mOhm
GND
10 8812A-RGND
SS
S1/D2
RGND PC186
GL@3K/F_4
GV2@2K/F_4
*EV@47P/50V_4N
*EV@47P/50V_4N
PR239 GL@39K/F_4 PR216 CORE-PHASE2 9
R3
8812A-SS
11
21
PR221
1
PR241
PR211
*EV@2.2/F_6
B2A
t
PC191 PC190 *EV@1000P/50V_4X
C
G2
S2
S2
S2
EV@100/F_4
EV@100/F_4
8812A-RGND
2
GL@1800P/50V_4X
EV@2700P/50V_4X
PR208 *EV@5.1K/F_4
*EV@0_8
5
1
*EV@0_4
PR198
PR197
PC220
PC185
PR226
B B
EV@22P/50V_4N
u
2
1
8812A-RGND 8812A-LGATE2
GL@24K/F_4
GV2@18K/F_4
PC192
+VGPU_CORE
*EV@22P/50V_4N
2
PR227
PR242
PR214
PC189 EV@0_4
o
B2B 1 1 2
R4 VGA_VCCSENSE {16}
PC193
PR228
*EV@47P/50V_4N EV@0_4 PL11
2
3
8812A-RGND PQ27 CORE-PHASE2

VGA_VSSSENSE {16}
EV@0.22UH_7X7X4
y
PR199
EV@22U/6.3V_6X
EV@22U/6.3V_8X
EV@22U/6.3V_8X
EV@22U/6.3V_8X
EV@22U/6.3V_8X
EV@22U/6.3V_8X
GV2@0_4
GL@3K/F_4
PR215
2 1 2
VGA_STBY {20}
PC194
PC196
PC74
PC68
PC195
PC72
GV2 GL
PR243
EV@82.5/F_4
a
1
R1 20K 39K EV@2N7002K_300MA

PC177
R5
1
R2 20K 30K EV@1U/10V_4X

2
R3 2K 3K
8812A-RGND 8812A-RGND
L
R4 18K 24K
R5 0K 3K
A A
C 2700pF 1800pF
n
PROJECT :2013_PROJECT
u
GPU Core (RT8812A) A1A

5 4 3 2 1
gY
i a n
r X
Fo
1.Level 1 Environment-related Substances Should Never be Used.
2.Recycled Resin and Coated Wire should be procured from Green Partners.
5 4 3 2 1
VIN
+1.05V_GPU +15V +1.05V

P9
+3V_S5 PR192 PR189
PQ21
EV@AON7406
s e
5
D EV@1M_4 EV@1M_4 D
PR190
EV@22_8
U
PR195 PQ22B 4
*EV@10K_4 EV@2N7002KDW_115MA (Peak 3.5A ,AVG 2.45A)
3
+1.05V_GPU
3
2
1
e
6
PR194 EV@1K_4 2
{47,48} GPU_PWR_GD
5 2 PC167
s
PR191
1
EV@1M_4 EV@2200P/50V_4X PC163
PC169 PC164 EV@10U/6.3V_6X
u
4
1
PR193 PQ22A *EV@10U/6.3V_6X
EV@0.1U/16V_4X *EV@100K_4 EV@2N7002KDW_115MA
B2A
PQ23
EV@LTC044EUBFS8TL_30MA
VIN
Ho
C
+3V_S5
PR185
+1.5V_GPU +15V
u
PR182
t +1.5VSUS
PQ20
B2A
EV@AON7516
C
5
EV@1M_4
B2B EV@1M_4
PR183
PR184 NGC6@0_4 EV@22_8
y
PR188
*EV@10K_4 PQ18B 4
EV@2N7002KDW_115MA
a
3
+1.5V_GPU
(Peak 7.38A ,AVG 5.16A)
3
2
1
3
6
{47,48} GPU_PWR_GD 2
L
{17,20,37} FB_CLAMP
5 2 PC161
PD5 PR186
1
GC6@BAT54C-7-F_200MA PR187 EV@1M_4 EV@2200P/50V_4X

*EV@100K_4 PC162
1
PQ18A EV@10U/6.3V_6X
n
EV@2N7002KDW_115MA
u
PQ19
EV@LTC044EUBFS8TL_30MA +3V_S5
B B
1
2
5
6
VIN +3V_GPU +15V
(Peak 0.794A ,AVG 0.566A)
3 PQ29
g
EV@AO6402A
+3V_GPU
4
PR201
PR207 EV@1M_4
{47} DGPU_PWR_EN_RC
EV@22_8
i a PR58
PC179
EV@10U/6.3V_6X
3
6
EV@1M_4
5 2
PR52 PIV@0_4
X
{10} DGPU_PWR_EN_R
B2A
3
PQ26B
EV@2N7002KDW_115MA
4
1
PR53 OEV@0_4 2 PR66 PQ26A
{37} GFX_MAINON
r
EV@1M_4 EV@2N7002KDW_115MA
PR49
1
OEV@100K_4
o
PC66
A *EV@1U/10V_4X A
PQ3
EV@LTC044EUBFS8TL_30MA
5
F 4 3 2
Size
Date:
Document Number
+VGACORE
Wednesday, January 16, 2013 Sheet

1
48 of 50
Rev
A1A
5 4 3 2 1
+5V_S5
S5_ON enable
AON7410
low switch +5V
B2A (Peak
MAIND enable
6.6A ,AVG 4.6A)
P10
e
(Peak 13.16A ,AVG 9.52A) TPS51462 +VCCSA HWPG_VCCIO enable
AC B2A PWM
s
OCP:15.8A
D
System SYSTEM POWER (Peak 6A ,AVG 4.2A) D
OCP:8.12A
Charger RT8223
ISL88732 AON7410
U
DC PWM low switch +3V MAIND enable
+3V_S5 (Peak 5.6A ,AVG 3.9A)
S5_ON enable B2A
PWM
e
B2A (Peak 10.6A ,AVG 7.4A) G9661-25AD
OCP:12A +1.8V MAINON enable
s
LDO
(Peak 1.242A, AVG 0.869A)
TPS51216
+SMDDR_VTERM
SUSON enable
+SMDDR_VREF
AON6402A
low switch
+3V_GPU
o
DGPU_PWR_EN_R
(Peak 0.794A ,AVG 0.566A)
u
H
C
PWM SUSON enable C
AO6402A +1.5V MAIND enable

+1.5VSUS
SUSON enable
(Peak 16.7A ,AVG 11.7)
low switch
u t
(Peak 1.1A ,AVG 0.78A)
+1.5V_GPU GPU_PWR_GD
B2A
o
B2A OCP:20A AON7516
(Peak 7.38A ,AVG 5.16A)
low switch
RT8240 +VTT +1.05V
a
AON7406 y +1.05V_GPU GPU_PWR_GD
L
PWM MAINON enable low switch (Peak 3.5A ,AVG 2.45A)
(Peak 18.75A ,AVG 13,12A)
OCP:23A
n
B B
Y u
+VCC_CORE
VRON enable
(Peak 94A ,AVG 56A)
OCP:112A
g
ISL95836HRZ-T
PWM
+VAXG
i a n VRON enable
(Peak 46A ,AVG 38A)
OCP:55A
X
A A
+VGPU_CORE
r
RT8812A Quanta Computer Inc.
PWM GFX_MAINON
PROJECT : BU8E
o
(Peak 50A ,AVG 35A)
OCP:60A 1A
POWER TREE TABLE
F
Date: W ednesday, January 16, 2013 Sheet 49 of 50
5 4 3 2 1
5 4 3 2 1
MODEL BD5
Model REV CHANGE LIST PAGE FROM To
1
A1A First Release 2
B2A PAGE 3: Change C537,C538 size and stuff R761 3
BD5 MB
e
PAGE 5: add PR257 4
PAGE 6: modify R142,Q19,R145,R141,Q20,R144 value for DDR3 VREF DQ (M3). 5
s
D
PAGE 8: modify R735,R715,R395,R369,R397,R720 value to S3 6 D
PAGE 9: change GPIO13 to BOARD_ID16,GPIO23 to BOARD_ID17 7
PAGE 10: add USB port3 for Touch Panel function,add R766,R768,R755,R769,R770,R772,R767,R773,Q55,Q56 for S3,change C704,C708 to 12PF 8
U
PAGE 11: change R406,R385,R743,R731,R401,R381,R778,R691,R700,R698,R306,R779,R780,R781,R405,R384 for BOARD_ID select 9
PAGE 12: change C420,R295,R784,L14,R288,R785,R416,R796 value and change R786,R420,C470,R787,R421,C469 value for S3 10
PAGE 16: change R180,R179,Q25,Q24,Q57 value for CLK PEG 11
PAGE 18: change C725,C726,C727 value,and add R788,R789 for EDP PD 12
e
PAGE 19: add R790 for XTAL,and change R249,R250 value 13
s
PAGE 20: change R251,R612,R252,R791,R792 value 14
PAGE 21: add R793 for co-lay 15
PAGE 22: change C312,C639 value 16
u
PAGE 28: change R794,F3,U25,D21 value for HDMI 17
PAGE 29: change R14,R16,R7,MR1,CN15,CN8,F1,R472,R470,R473,R471 value 18
o
PAGE 30: change R499,R797,Q41,R466 value for AOAC 19
PAGE 31: add D7,D22,D23,D24,D25,D28,D29,D31,D30,D32,D33,D34,D35 for ESD,change C380,C381,CN18,CN17,R316,R395,U12,C384,C398,C699,R315,Q34 value 20
PAGE 33: change CN14 value 21
PAGE 34: add D36,D37,D38,D39,D40,D41,D42,D43 for ESD 22
C
PAGE 35: change C234,C221,C190,C184,C174,C168 value,and add C730,C728,C729,C731 for EMI,add D44,D45,D46,D47 for ESD
PAGE 36: change R413,R394,R389,R390,R391,R392,R393,C448,C441,C440,C442,C443 value
PAGE 37: change R80,Q4 value,add R799,R798 for STRAP select
t H
PAGE 38: change CN1,CN2,CN5,CN4,R95,Q10 value and change C218 value for EMI,and add L41,L42,C723,C724,CN2021,R777,R776,R775,R774 for Touch PAD Panel function
23
24
25
26
C
u
PAGE 39: change LED2 symbol 27
B2B PAGE 20: change R570 value 28
PAGE 22: change D4 value 29
o
C3A PAGE 15: change C65 size to 0402 30
PAGE 31: change RN10,RN11,RN12,RN13 pin define 31
y
PAGE 34: change C490,C501 size to 0402 32
PAGE 36: change C476 size to 0402 33
a
34
35
36
L
37
38
39
40
un 41
42
43 B
gY
i a n
A
r X A
DOC NO. 204

5
Fo PROJECT MODEL :
PART NUMBER:
4
BD5 APPROVED BY:
DRAWING BY:
3
Kent Su
Kent Su
DATE:
REVISON:
2
2012/12/14
Size
Date:
Document Number
Change list
PROJECT : BD5

1
Sheet 50 of 50
Rev
D2A

BD5 Block Diagram overview

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BD5 Block Diagram overview

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1 2 3 4 5 6 7 8

BD5 Block Diagram 01

DDR SYSTEM MEMORY

USB 2.0 L2 Con. P31

G9661-25ADJF12U (+1.8V) P46

Quanta Computer Inc.

Fo Quanta Computer Inc.

PROJECT : Chief River

PCI EXPRESS* - GRAPHICS

JTAG & BPM

K27 PEG_TXP6_C C610 EV@0.22U/10V_4X PEG_TXP6

Thermal Trip & Process HOT<CPU>

CPU Thermal sensor / MB Local TEMP <THP/UGA/VGA>

+5V VIN +5VPCU

U17 *IV@NTC_470K_4 *EV@NTC_470K_4

R498 R496 R482 *499K/F_4 5

o r Size Document Number

AE2 M_B_CLKP0 {15}

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY A

o r Quanta Computer Inc.

DDR3 -1.5V RAILS

PEG AND DDR

Y34 VCC51 VCCSA6 H26

R28 R507 100_4 +VCC_CORE

r X Quanta Computer Inc.

Digital Display Interface

System Power Management

CougarPoint_R1P0 CRT IMPEDANCE MATCHING <CLG>

R690 PICRT@150/F_4 INT_CRT_GRN

R685 PICRT@150/F_4 INT_CRT_RED

gY R751 *SHORT_4 AC_PRESENT_R

PM_DRAM_PWRGD R720 S3@200/F_4

RSMRST# R725 10K_4

RTC Circuitry <RTC>

CN13 ACZ_BITCLK_R N34 AM1

HDA_RST# SATA1TXN AP10

{34} BIT_CLK_AUDIO R362 33_4 ACZ_BITCLK_R *33P/50V_4N

Top-Block Swap Override

0 = "top-block swap" mode

Deep S4/S5 Well On -Die 0 = Disable DSWVREN {8}

Panther Point-M (PCI,USB,NVRAM) <CLG>

USB30 Combo Port

PCI_PIRQC# H38 PIRQB# USBP7P L30 PCIECLKRQ2# / GPIO20 CLKIN_DMI_P

REQ1# / GPIO50 USBP9P USB20_L2 {31} CLKOUT_PCIE3P CLKIN_GND1_P

Q55A DS3@2N7002KDW_115MA R714 10K_4 PCIE_CLK_MINI_REQ#

*TC7SH08FU(F) R757 USB_SC_OC#_R 1 6 R368 10K_4 GPIO44 2.2K_4

R766 NDS3@0_4 {37} 2ND_MBCLK 6 1 SMB_ME1_CLK

Q55B DS3@2N7002KDW_115MA R355 NS3@10K_4 S3_STRAP

CLK_BUF_DREFCLKP R344 10K_4

BOARD ID SETTING <CLG> 11

GPIO52 BOARD_ID12 BOARD_ID13 BOARD_ID14 {10}

W KB Backlight L PX@10K_4 W8@10K_4 NM70@10K_4

+1.05V R313 *0_4

Clock and Miscellaneous

V1 R678 0_6 1U/6.3V_4X AH13 +V1.05S_SATA3 R664 0_8

C417 C411 0.1U/10V_4X +VCCSST V16 +1.05V_VCCEPW

C404 + C682 C694

R420 NDS3@0_6 R421 NDS3@0_6

o r Quanta Computer Inc.

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

U17 IV@NTC_470K_4 EV@NTC_470K_4