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5 4 3 2 1

ZB1 SYSTEM BLOCK DIAGRAM


PCI-Express X 2
Yonah/Merom 479 Docking
DVI / 7307 CPU Connector TV out / CRT
X'TAL uFCPGA U44 Thermal Sensor Switch
Chrontel P41 14.318MHZ P3,P4 U64 P5 with PCIE1~2 , Lan TV in
D ,Ser & Par Port , D

PS2 , VGA, DVI , SPDIF


Clock Generator FSB DVI
TVOUT SM BUS
MAX4892
ICS954310BGLF P2
P25 Audio
DDR II 2N7002
Dual Channel DDR2 P42 10/100/1G
SVIO SODIMM0 MAX4892
TFT LCD Panel TVout CN36 Switch
CALISTOGA
WXGA LVDS 945GM/PM 533/667 Mhz DDR II
WSXGA+ VGA 1466 SODIMM1
WUXGA P25 FCBGA U43 CN37 P12,P13
SPIF3811 SATA0 PCI-Express 16X Lan
P6,P7,P8,P9,P10,P11 USB7 USB8
U51 P37
LVDS
CRT HOT SWAP X4 DMI interface VGA/TV out ATI
C
P26 BAY M52/54 MiniCard / C
HDD Master WLAN New Card
PATA VRAM X 4 U34
CN41 P35
U30,33,6,10 P23 P18,P19,P20,P21, P29 P33
P22,P24
SATA1
ICH7M PCI-Express
ODD Slave PATA
82801
CN24 P35 652 BGA
U49 PCI Bus interface X'TAL
USB 2.0
25M
X'TAL24.576MHZ
P14,P15,P16,P17
DDR2
Bluetooth X'TAL 16M X 16 Broadcom
USB4 P29 32.768KHZ
32M X 16 5789/87/88
PCMCIA+1394 MINI-PCI /
USB Port x 4 +Cardreader
USB0~3 P29
Int MIC TV Card 4401E 10/100
P29
B
P36 Controller 5705E GLAN B

P27
CCD TI PCI7412
USB7 P29 LPC
X'TAL OSC
Azalia Audio 32.768K 48MHZ P30,P31
EEPROM Transformer
Controller Azalia
Audio Amplifier KBC NS P27 P27
P37 ALC883 P36
PC97541V
P39
RJ45
IEEE 1394 6 in 1 Cardreader PCMCIA Slot
Port Fan Header
P30 Socket P32 P31 P5,P40
MIC Jack Line in
BIOS
P39 TPM Primary Battery
2nd 8/6 Cell
A Connector A

Speaker Phone Jack MDC 1.5 Super I/O FIR


P37 P36 Touch Pad SMSC CIR PROJECT : ZB1
(Dual-Point) SIO1000 Connector
P40 P38 Quanta Computer Inc.
Size Document Number Rev
BLOCK DIAGRAM C
Date: Tuesday, February 07, 2006 Sheet 1 of 50
5 4 3 2 1
A B C D E

4 Close to IC <500mils VDD_A 4

C277 27P-50V_4 CG_XIN


Place these termination to close CK410M.

45

46
2
U15
L38 25 mils Y6 58 60 14M_REF R222 33_4

VDDA

GNDA
X1 REF0 14M_ICH <16>
ACB2012L-120-T_8 14.318MHZ RP58
+3V VDD_SRC_CPU C257 27P-50V_4 CG_XOUT 57 52 RHCLK_CPU 1 2 33_4P2R_S
X2 CPUCLKT0 CLK_CPU_BCLK <3>
RHCLK_CPU# C309

1
CPUCLKC0 51 3 4 CLK_CPU_BCLK# <3>
120 ohms@100Mhz C772 C771 C300 C786 C279 +3V R196 *10K_4 CK-410M RP57 *10P-50V_4
.1U-10V_4 10U-10V_8
<16,43> VR_PWRGD_CK410# 10 49 RHCLK_MCH 1 2 33_4P2R_S
Vtt_PwrGd#/PD CPUCLKT1 CLK_MCH_BCLK <6>
.1U-10V_4 .1U-10V_4 .1U-10V_4 <16> PM_STPCPU# PM_STPCPU# 62 48 RHCLK_MCH# 3 4
CPU_STOP# CPUCLKC1 CLK_MCH_BCLK# <6>
<16> PM_STPPCI# PM_STPPCI# 63 RP56
R234 2.2_6 VDD_A PCI/PCIE_STOP# CLK_PCIE_MINI1_
CPUCLKT2/PCIET8 44 1 2 33_4P2R_S CLK_PCIE_MINI1 <29>
CGCLK_SMB 54 43 CLK_PCIE_MINI1_# 3 4
<13> CGCLK_SMB SCLK CPUCLKC2/PCIEC8 RP55 CLK_PCIE_MINI1# <29>
C298 C314 CGDAT_SMB 55
<13> CGDAT_SMB SDATA
.1U-10V_4 10U-10V_8 R195 33_4 41 1 2 RP62
<16> CLKUSB_48 REQ1#/PCIET7 CLK_PCIE_EZ2 <42>
CLK_BSEL0 R502 4.7K_4 12 40 3 4 CLK_CPU_BCLK 1 249.9_4P2R_S
FSA/USB_48MHz REQ2#/PCIEC7 CLK_PCIE_EZ2# <42>
CLK_BSEL1 16 RP54 CLK_CPU_BCLK# 3 4
CLK_BSEL2 R224 4.7K_4 FSB/TEST_MODE RSRC_MCH
61 REF1/FSLC/TEST_SEL PCIET6 39 1 2 33_4P2R_S CLK_PCIE_3GPLL <8>
RP61
R223 33_4 38 RSRC_MCH# 3 EZ@33_4P2R_S
4 CLK_MCH_BCLK 1 249.9_4P2R_S
<38> SIO_14M PCIEC6 RP53 CLK_PCIE_3GPLL# <8>
VDD_REF 56 CLK_MCH_BCLK# 3 4
VDD_SRC_CPU VDD_REF RP10
50 VDDCPU PCIET5 36 1 2 CLK_PCIE_EZ1 <42>
C310 35 3 4 CLK_PCIE_MINI1 1 249.9_4P2R_S
PCIEC5 CLK_PCIE_EZ1# <42>
*10P-50V_4 VDD_PCI 1 RP46 CLK_PCIE_MINI1# 3 4
VDD_PCI_1 CLK_PCIE_NEW
7 VDD_PCI_2 PCIET4 30 3 4 EX@33_4P2R_S CLK_PCIE_NEW_C <33>
RP120
25 mils 31 CLK_PCIE_NEW# 1 EZ@33_4P2R_S
2 CLK_PCIE_LAN G7_G9@49.9_4P2R_S
3 4
PCIEC4 CLK_PCIE_NEW_C# <33>
VDD_SRC_CPU 21 RP47 CLK_PCIE_LAN# 1 2
L74 VDD_PCI VDD_PCIE RSRC_SATA
3
+3V 28 VDDPCIE SATA_CKT 26 3 433_4P2R_S CLK_PCIE_SATA <14>
RP59 3
ACB2012L-120-T_8 42 27 RSRC_SATA# 1 2 CLK_PCIE_3GPLL 1 249.9_4P2R_S
VDD_PCIE SATA_CKC CLK_PCIE_SATA# <14>
C768 C767 C760 RP48 CLK_PCIE_3GPLL# 3 4
.1U-10V_4 .1U-10V_4 10U-10V_8 VDD_48 11 24 RSRC_ICH 3 4 33_4P2R_S RP122
VDD_48 PCIET3 CLK_PCIE_ICH <15>
25 RSRC_ICH# 1 2 CLK_PCIE_SATA 3 449.9_4P2R_S
PCIEC3 CLK_PCIE_ICH# <15>
CLKGN_REQ3_PCIE 32 RP49 CLK_PCIE_SATA# 1 2
R191 2.2_6 VDD_48 CLKGN_REQ4_PCIE REQ3(PCIE)
33 REQ4(PCIE) PCIET2 22 3 4 G7_G9@33_4P2R_S CLK_PCIE_LAN <27>
PCIEC2 23 1 2 CLK_PCIE_LAN# <27>
C769 C770 Iref=5mA, R510 475/F_6 IREF 47
.1U-10V_4 10U-10V_8 IREF RP121
Ioh=4*Iref
PCIET1 19
20 CLK_PCIE_ICH
3 449.9_4P2R_S
PCIEC1 RP51 CLK_PCIE_ICH#
RP52 1 2
DREFCLK 1 2 R_DOT96 14 17 R_DREFSSCLK 3 4 IV@33_4P2R_S RP123 EX@49.9_4P2R_S
<8> DREFCLK DOT96MHz 27Mfix/LCD_SSCGT/PCIE0T DREFSSCLK <8>
R233 1_6 VDD_REF DREFCLK# 3 4 R_DOT96# 15 18 R_DREFSSCLK# 1 2 CLK_PCIE_NEW_C 3 4
<8> DREFCLK# DOT96MHz# 27SS/LCD_SSCGC/PCIE0C DREFSSCLK# <8>
CLK_PCIE_NEW_C# 1 2
C297 C308 33_4P2R_S R_PCLK_SIO R199 33_4 RP45
selPCIEX0_LCD#/PCI5 5 PCI_CLK_SIO <38>
.1U-10V_4 10U-10V_8 T38 34 4 R_PCLK_7411 R201 33_4 DREFSSCLK 3 4

GND_PCI_1
GND_PCI_2
PWRSAVE# PCI4 PCI_CLK_7412 <30>

GND_SRC
3 R_PCLK_LAN R202 NL_G5@33_4 DREFSSCLK# 1 2
PCI3 PCLK_LAN <27> RP117

GND_48
INTERNAL PULL HIGH 64 PCLK_MINI_LPC R225 33_4
PCICLK2/REQ_SEL PCLK_MINI <29>
9 R_PCLK_ICH R500 33_4 DREFCLK 3 4

GND

GND

GND
PCIF1/selLCD_27# PCLK_ICH <15>
8 R_PCLK_591 R499 33_4 DREFCLK# 1 IV@49.9_4P2R_S
2
PCIF0/ITP_EN PCLK_591 <39>
RP60
ICS954310BGLF CLK_PCIE_EZ2 1 2EZ@49.9_4P2R_S

53
13
59

29
37
+3V C757 C236 C234 CLK_PCIE_EZ2# 3 49.9_4P2R_S

2
6
4
R220 *10K_4 RP4
+3V
*10P-50V_4 *10P-50V_4 CLK_PCIE_EZ1 1 2EZ@49.9_4P2R_S
CLKGN_REQ3_PCIE R206 10K_4 R197 10K_4 C756 C302 C235 CLK_PCIE_EZ1# 3 4
<33> NEW_CLKREQ# RP116
CLKGN_REQ4_PCIE R217 10K_4
<42> EZ_CLKREQ#
R198 10K_4 NL_G5@10P-50V_4 CLK_PCIE_M56 1 2
2 *10P-50V_4 *10P-50V_4 *10P-50V_4 CLK_PCIE_M56# 2
3 4
BSEL strappings need to be set for 533MHz Moby Dick (Intel?915GM - Calistoga Interposer)
(if Calistoga is designed for 667MHz board).
EV@: Stuff when external VGA used EV@49.9_4P2R_S
IV@: Stuff when internal VGA used
RP118 EV@33_4P2R_S
R_DREFSSCLK 1 2 CLK_PCIE_M56 <18>
R_DREFSSCLK# 3 4 CLK_PCIE_M56# <18>
CLK_BSEL0 R493 1K_4 MCH_BSEL0 <8>
<3> CPU_BSEL0
+3V
CLK_BSEL1 R192 1K_4 MCH_BSEL1 <8> R689 EV@10K_4
<3> CPU_BSEL1
CLK_BSEL2 R235 1K_4 R_PCLK_SIO R200 IV@10K_4
<3> CPU_BSEL2 MCH_BSEL2 <8>

+3V

Q15 R218 R216


2

RHU002N06 10K_4 10K_4 FSC FSB FSA CPU SRC PCI


3 1 CGDAT_SMB 1 0 1 100 100 33
<16,27,29,33,42> PDAT_SMB

1 0 0 1 133 100 33 1

+3V
0 1 1 166 100 33
Q14
0 1 0 200 100 33
PROJECT : ZB1
2

RHU002N06 0 0 0 266 100 33


3 1 CGCLK_SMB 1 0 0 333 100 33
<16,27,29,33,42> PCLK_SMB Quanta Computer Inc.
1 1 0 400 100 33 Size Document Number Rev
1 1 1 200 100 33 CLOCK GENERATOR C
Date: Wednesday, March 01, 2006 Sheet 2 of 50
A B C D E
5 4 3 2 1

T17
U44A
<6> H_A#[31:3] +1.05V
H_A#3 J4 H1
A[3]# ADS# H_ADS# <6>
H_A#4 L4 E2
A[4]# BNR# H_BNR# <6>
H_A#5 M3 G5 +1.05V +1.05V <4,6,9,10,14,17,46>
A[5]# BPRI# H_BPRI# <6>
H_A#6 K5
H_A#7 M1 A[6]#
A[7]# DEFER# H5 H_DEFER# <6>

ADDR GROUP 0
H_A#8 N2 F21
A[8]# DRDY# H_DRDY# <6>
H_A#9 J1 E1 R230 Near to MCH <500mils
A[9]# DBSY# H_DBSY# <6>
H_A#10 N3 56.2/F_4

CONTROL
H_A#11 P5 A[10]#
A[11]# BR0# F1 H_BREQ#0 <6>
D H_A#12 P2 D
H_A#13 L1 A[12]#
A[13]# IERR# D20 <6> H_D#[63:0] H_D#[63:0] <6>
H_A#14 P4 B3
A[14]# INIT# H_INIT# <14>
H_A#15 P1 T98 U44B
H_A#16 R1 A[15]# H_D#0 E22
A[16]# LOCK# H4 H_LOCK# <6> D[0]# D[32]# AA23 H_D#32
L2 H_D#1 F24 AB24 H_D#33
<6> H_ADSTB0# ADSTB[0]# H_CPURST# <6> D[1]# D[33]#
B1 H_D#2 E26 V24 H_D#34
<6> H_REQ#[4:0] RESET# D[2]# D[34]#
H_REQ#0 K3 F3 H_RS#0 H_D#3 H22 V26 H_D#35
REQ[0]# RS[0]# D[3]# D[35]#

DATA GRP 0
H_REQ#1 H_RS#1 H_D#4 F23 W25 H_D#36

DATA GRP 2
H2 REQ[1]# RS[1]# F4 D[4]# D[36]#
H_REQ#2 K2 G3 H_RS#2 H_RS#[2:0] <6> H_D#5 G25 U23 H_D#37
H_REQ#3 REQ[2]# RS[2]# H_D#6 E25 D[5]# D[37]#
J3 REQ[3]# TRDY# G2 H_TRDY# <6> D[6]# D[38]# U25 H_D#38
H_REQ#4 L5 T12 H_D#7 E23 U22 H_D#39
REQ[4]# H_D#8 K24 D[7]# D[39]#
<6> H_A#[31:3] HIT# G6 H_HIT# <6> D[8]# D[40]# AB25 H_D#40
H_A#17 Y2 E4 H_D#9 G24 W22 H_D#41
A[17]# HITM# H_HITM# <6> D[9]# D[41]#
H_A#18 U5 H_D#10 J24 Y23 H_D#42
H_A#19 A[18]# T14 H_D#11 J23 D[10 D[42]#
R3 A[19]# BPM[0]# AD4 D[11]# D[43]# AA26 H_D#43
H_A#20 W6 AD3 T18 XDP PU_R < 0.2" H_D#12 H26 Y26 H_D#44
H_A#21 A[20]# BPM[1]# T74 H_D#13 F26 D[12]# D[44]#
Y22 H_D#45

XDP/ITP SIGNALS
U4 A[21]# BPM[2]# AD1 D[13]# D[45]#
H_A#22 Y5 AC4 T13 H_D#14 K22 AC26 H_D#46
H_A#23 A[22]# BPM[3]# T75 H_D#15 H25 D[14]# D[46]#
U2 A[23]# PRDY# AC2 D[15]# D[47]# AA24 H_D#47
H_A#24 R4 AC1 XDP_BPM#5 H23 W24
A[24]# PREQ# <6> H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 <6>
H_A#25 T5 AC5 XDP_TCK G22 Y25
A[25]# TCK +1.05V <6> H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 <6>
H_A#26 T3 AA6 XDP_TDI T76 J26 V23
A[26]# TDI <6> H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 <6>
H_A#27 W3 AB3 XDP_TDO
C A[27]# TDO <6> H_D#[63:0] H_D#[63:0] <6> C
H_A#28 W5 AB5 XDP_TMS
H_A#29 A[28]# TMS XDP_TRST# H_D#16 N22
Y4 A[29]# TRST# AB6 D[16]# D[48]# AC22 H_D#48
H_A#30 W2 C20 XDP_DBRESET# R236 H_D#17 K25 AC23 H_D#49
H_A#31 A[30]# DBR# 68_4 H_D#18 P26 D[17]# D[49]#
Y1 A[31]# D[18]# D[50]# AB22 H_D#50
<6> H_ADSTB1# V4 D21 H_PROCHOT_R# H_D#19 R23 AA21 H_D#51
ADSTB[1]# PROCHOT D[19]# D[51]#

DATA GRP 1
H_D#20 L25 AB21 H_D#52

DATA GRP 3
THERMDA A24 H_THERMDA <5> D[20]# D[52]#
THERM

A6 A25 H_D#21 L22 AC25 H_D#53


<14> H_A20M# A20M# THERMDC H_THERMDC <5> D[21]# D[53]#
A5 H_D#22 L23 AD20 H_D#54
<14> H_FERR# FERR# D[22]# D[54]#
<14> H_IGNNE# C4 IGNNE# THERMTRIP# C7 THERMTRIP#_PWR R497 *0_4
PM_THRMTRIP# <8,14>
H_D#23 M23
D[23]# D[55]# AE22 H_D#55
H_D#24 P25 AF23 H_D#56
R154 0_4 H_STPCLK_R# D5 H_D#25 P22 D[24]# D[56]#
<14> H_STPCLK# STPCLK# D[25]# D[57]# AD24 H_D#57
C6 T102 H_D#26 P23 AE21 H_D#58
H CLK

<14> H_INTR LINT0 +1.05V D[26]# D[58]#


<14> H_NMI B4 A22 H_D#27 T24 AD21 H_D#59
LINT1 BCLK[0] CLK_CPU_BCLK <2> D[27]# D[59]#
<14> H_SMI# A3 A21 H_D#28 R24 AE25 H_D#60
SMI# BCLK[1] CLK_CPU_BCLK# <2> D[28]# D[60]#
H_D#29 L26 AF25 H_D#61
T78 TP_A32# T101 H_D#30 T25 D[29]# D[61]#
AA1 RSVD[01]# D[30]# D[62]# AF22 H_D#62
T81 TP_A33# AA4 T22 TP_EXTBREF T49 H_D#31 N24 AF26 H_D#63
T77 TP_A34# RSVD[02]# RSVD[12]# R251 D[31]# D[63]#
AB2 RSVD[03]# <6> H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 <6>
T82 TP_A35# 1K/F_4
RESERVED

AA3 RSVD[04]# <6> H_DSTBP#1 N25 DSTBP[1]# DSTBP[3]# AE24 H_DSTBP#3 <6>
T71 TP_A36# M4 D2 TP_SPARE0 T22 M26 AC20
RSVD[05]# RSVD[13]# <6> H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 <6> +1.05V
T70 TP_A37# N5 F6 TP_SPARE1 T31
T69 TP_A38# RSVD[06]# RSVD[14]# TP_SPARE2 T26 H_GTLREF COMP0 27.4/F_6 R252
T2 RSVD[07]# RSVD[15]# D3 AD26 GTLREF COMP[0] R26
T79 TP_A39# V3 C1 TP_SPARE3 T72 MISC U26 COMP1 54.9/F_4 R250
T80 TP_APM0# RSVD[08]# RSVD[16]# TP_SPARE4 T73 COMP[1] COMP2 27.4/F_6 R142
B B2 RSVD[09]# RSVD[17]# AF1 COMP[2] U1 B
T27 TP_APM1# TP_SPARE5 T43 R525 *1K/F_4 COMP3 54.9/F_4 R143 25/25mils R152
C3 RSVD[10]# RSVD[18]# D22 C26 TEST1 COMP[3] V1
C23 TP_SPARE6 T42 20/15mils T16 T112 *200/F_6
T111 TP_HFPLL RSVD[19]# TP_SPARE7 T113 R524 51/F_4 D25
B25 RSVD[11]# RSVD[20]# C24 TEST2 DPRSTP# E5 ICH_DPRSTP# <14>
R253 B5
DPSLP# H_DPSLP# <14>
PZ47903-2741-01 2K/F_6 D24
DPWR# H_DPWR# <6>
<2> CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD <14>
Add D34, C948, <2> CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# <6,14>
+1.05V C21 AE6
R238 H_PROCHOT_R#
0_4
Change R291 to <2> CPU_BSEL2 BSEL[2] PSI# PSI# <43> H_PWRGD is CMOS driving by ICH
<43> H_PROCHOT# 470K
XDP_DBRESET# R228 *54.9/F_4 PZ47903-2741-01
+1.05V +1.05V TO VRD
XDP_TMS R156 39.2/F_4
<8,16,43> DELAY_VR_PWRGOOD
R509
+1.05V *330_6
3

XDP_TDI R155 150_4


XDP_TCK PD 27.4/1%
1

*BAS316
XDP_TRST PD 680ohm /5%

2
2 D34 Q35
XDP_BPM#5 R157 54.9/F_4 XDP_TDI PU 150ohm /1.05V R290 R291
56_4 *10K_4 XDP_DBRESET# 1 3
XDP_TMS PU 39.2/1% SYS_RST# <16>
Q51 *MMBT3904
BSS301
2

A A
XDP_TCK R159 27.4/F_4 R511 0_4
1

PROJECT : ZB1
2

C948 *1U-16V_6

XDP_TRST# R158 680_4 THERMTRIP#_PWR R292 0_4 1 3 1999_SHT# <44>


Size Document Number
Quanta Computer Inc.Rev
Q17 MMBT3904
CPU(1 OF 2 ) C
Date: Wednesday, March 01, 2006 Sheet 3 of 50

5 4 3 2 1
5 4 3 2 1

U44D VCC_CORE VCC_CORE


A4 P6 +1.05V +1.05V <3,6,9,10,14,17,46>
VSS[001] VSS[082] U44C VCC_CORE
A8 VSS[002] VSS[083] P21 VCC_CORE <43>
A11 P24 A7 AB20 +1.5V +1.5V <10,15,17,29,33,44,45>
VSS[003] VSS[084] VCC[001] VCC[68]
A14 VSS[004] VSS[085] R2 A9 VCC[002] VCC[69] AB7
A16 VSS[005] VSS[086] R5 A10 VCC[003] VCC[70] AC7
A19 VSS[006] VSS[087] R22 A12 VCC[004] VCC[71] AC9
A23 VSS[007] VSS[088] R25 A13 VCC[005] VCC[72] AC12
A26 VSS[008] VSS[089] T1 A15 VCC[006] VCC[73] AC13
B6 VSS[009] VSS[090] T4 A17 VCC[007] VCC[74] AC15
D D
B8 VSS[010] VSS[091] T23 A18 VCC[008] VCC[75] AC17
B11 T26 A20 AC18 VCC_CORE
VSS[011] VSS[092] VCC[009] VCC[76]
B13 VSS[012] VSS[093] U3 B7 VCC[010] VCC[77] AD7
B16 VSS[013] VSS[094] U6 B9 VCC[011] VCC[78] AD9
B19 VSS[014] VSS[095] U21 B10 VCC[012] VCC[79] AD10
B21 U24 VCC_CORE B12 AD12 C328 C327 C326 C325
VSS[015] VSS[096] VCC[013] VCC[80]
B24 VSS[016] VSS[097] V2 B14 VCC[014] VCC[81] AD14
C5 V5 B15 AD15 *22U-6.3V_8 *22U-6.3V_8 *22U-6.3V_8 *22U-6.3V_8
VSS[017] VSS[098] VCC[015] VCC[82]
C8 VSS[018] VSS[099] V22 B17 VCC[016] VCC[83] AD17
C11 VSS[019] VSS[100] V25 B18 VCC[017] VCC[84] AD18
C14 W1 C254 C774 C789 C777 B20 AE9 reserve dummy cap--Allen
VSS[020] VSS[101] 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 VCC[018] VCC[85]
C16 VSS[021] VSS[102] W4 C9 VCC[019] VCC[86] AE10
C19 VSS[022] VSS[103] W23 C10 VCC[020] VCC[87] AE12
C2 VSS[023] VSS[104] W26 C12 VCC[021] VCC[88] AE13
C22 VSS[024] VSS[105] Y3 C13 VCC[022] VCC[89] AE15
C25 VSS[025] VSS[106] Y6 C15 VCC[023] VCC[90] AE17
D1 Y21 C264 C247 C791 C282 C17 AE18
VSS[026] VSS[107] 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 VCC[024] VCC[91]
D4 VSS[027] VSS[108] Y24 C18 VCC[025] VCC[92] AE20
D8 VSS[028] VSS[109] AA2 D9 VCC[026] VCC[93] AF9
D11 VSS[029] VSS[110] AA5 D10 VCC[027] VCC[94] AF10
D13 VSS[030] VSS[111] AA8 D12 VCC[028] VCC[95] AF12
D16 AA11 D14 AF14 +1.05V
C VSS[031] VSS[112] C295 C283 C775 C793 VCC[029] VCC[96] C
D19 VSS[032] VSS[113] AA14 D15 VCC[030] VCC[97] AF15
D23 AA16 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 D17 AF17
VSS[033] VSS[114] VCC[031] VCC[98]
D26 VSS[034] VSS[115] AA19 D18 VCC[032] VCC[99] AF18
E3 AA22 E7 AF20 +1.05V C304 C250 C305 C249 C213 C206
VSS[035] VSS[116] VCC[033] VCC[100] .1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4 .1U-10V_4
E6 VSS[036] VSS[117] AA25 E9 VCC[034]
E8 VSS[037] VSS[118] AB1 E10 VCC[035] VCCP[01] V6
E11 AB4 C792 C259 C278 C261 E12 G21 C187
VSS[038] VSS[119] 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 VCC[036] VCCP[02]
E14 VSS[039] VSS[120] AB8 E13 VCC[037] VCCP[03] J6

330U-2.5V_7343
E16 AB11 E15 K6 +
VSS[040] VSS[121] VCC[038] VCCP[04]
E19 VSS[041] VSS[122] AB13 E17 VCC[039] VCCP[05] M6
E21 VSS[042] VSS[123] AB16 E18 VCC[040] VCCP[06] J21
E24 AB19 E20 K21 +1.5V
VSS[043] VSS[124] C290 C276 C779 C274 VCC[041] VCCP[07]
F5 VSS[044] VSS[125] AB23 F7 VCC[042] VCCP[08] M21
F8 AB26 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 F9 N21
VSS[045] VSS[126] VCC[043] VCCP[09]
F11 VSS[046] VSS[127] AC3 F10 VCC[044] VCCP[10] N6
F13 VSS[047] VSS[128] AC6 F12 VCC[045] VCCP[11] R21
F16 VSS[048] VSS[129] AC8 F14 VCC[046] VCCP[12] R6
F19 AC11 F15 T21 C815 C816
VSS[049] VSS[130] C285 C790 C294 C329 VCC[047] VCCP[13]
F2 VSS[050] VSS[131] AC14 F17 VCC[048] VCCP[14] T6
F22 AC16 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 *22U-6.3V_8 F18 V21 .01U-16V_4 10U/X5R-6.3V_8
VSS[051] VSS[132] VCC[049] VCCP[15] +1.5V
F25 VSS[052] VSS[133] AC19 F20 VCC[050] VCCP[16] W21
G4 VSS[053] VSS[134] AC21 AA7 VCC[051]
B B
G1 VSS[054] VSS[135] AC24 AA9 VCC[052] VCCA B26
G23 VSS[055] VSS[136] AD2 AA10 VCC[053]
G26 AD5 C788 C778 C299 C255 AA12
VSS[056] VSS[137] 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 VCC[054]
H3 VSS[057] VSS[138] AD8 AA13 VCC[055] VID[0] AD6 H_VID0 <43> VCC_CORE
H6 VSS[058] VSS[139] AD11 AA15 VCC[056] VID[1] AF5 H_VID1 <43>
H21 VSS[059] VSS[140] AD13 AA17 VCC[057] VID[2] AE5 H_VID2 <43>
H24 VSS[060] VSS[141] AD16 AA18 VCC[058] VID[3] AF4 H_VID3 <43>
J2 VSS[061] VSS[142] AD19 AA20 VCC[059] VID[4] AE3 H_VID4 <43>
J5 AD22 C296 C306 C776 C248 AB9 AF2
VSS[062] VSS[143] VCC[060] VID[5] H_VID5 <43>
J22 AD25 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 22U-6.3V_8 AC10 AE2
VSS[063] VSS[144] VCC[061] VID[6] H_VID6 <43>
J25 AE1 AB10 R203
VSS[064] VSS[145] VCC[062] 100/F_4
K1 VSS[065] VSS[146] AE4 AB12 VCC[063]
K4 VSS[066] VSS[147] AE8 AB14 VCC[064]
K23 VSS[067] VSS[148] AE11 change to 0805 AB15 VCC[065] VCCSENSE AF7 VCCSENSE <43>
K26 VSS[068] VSS[149] AE14 AB17 VCC[066]
L3 VSS[069] VSS[150] AE16 AB18 VCC[067] VSSSENSE AE7 VSSSENSE <43>
L6 AE19 R194 100/F_4
VSS[070] VSS[151] PZ47903-2741-01
L21 VSS[071] VSS[152] AE23
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] AF3
M5 VSS[074] VSS[155] AF6
M22 VSS[075] VSS[156] AF8
A A
M25 VSS[076] VSS[157] AF11
N1 AF13
N4
VSS[077]
VSS[078]
VSS[158]
VSS[159] AF16 PROJECT : ZB1
N23 VSS[079] VSS[160] AF19
N26 AF21
P3
VSS[080]
VSS[081]
VSS[161]
VSS[162] AF24
Size Document Number
Quanta Computer Inc.Rev
PZ47903-2741-01 CPU(2 OF 2 ) C
Date: Friday, February 24, 2006 Sheet 4 of 50

5 4 3 2 1
5 4 3 2 1

+3V
+3V

Q38 R257 25mils

2
RHU002N06 200_6
D D
<19,39,48> MBCLK 3 1 LM86VCC

C323
R254 R258 .1U-10V_4 10/20mils
+3V 10K_4 10K_4
U18

2
LM86__SMC 8 1
Q37 SCLK VCC H_THERMDA
H_THERMDA <3>
<19,39,48> MBDATA 3 1 LM86_SMD 7 2 C324
RHU002N06 SDA DXP 2200P-50V_4
<16> THERM_ALERT# 1 2 R260 6 3 H_THERMDC
ALERT# DXN H_THERMDC <3>
*0_4
THERM_OVER# 4 5
OVERT# GND
+3V R708 10K_4
MAX6657
ADDRESS: 98H
C C

CPU FAN
+3V

R134
10K_4
FANPWR = 1.6*VSET
CN26
<39> FANSIG
U64
2 3 TH_FAN_POWER
+5V VIN VO 1
GND 5 C178 2
<19> CPUFANON# THERM_OVER# 1 6
B FON# GND C176 C177 3 B
GND 7 .01U-16V_4
FAN_VSET 4 8
<39> CPUFAN# VSET GND 10U-10V_8 .01U-16V_4
G995 FAN_CON

A A

PROJECT : ZB1
Size Document Number Quanta Computer Inc.
Rev
Thermal Sensor LM86 C
Date: Friday, February 24, 2006 Sheet 5 of 50

5 4 3 2 1
5 4 3 2 1

H_XRCOMP
<3> H_D#[63:0] H_A#[31:3] <3>
U43A
H_D#0 F1 H9 H_A#3
R150 H_D#1 H_D#_0 H_A#_3 H_A#4 +1.05V
15 mils/10mils J1 H_D#_1 H_A#_4 C9 +1.05V <3,4,9,10,14,17,46>
24.9/F_4 H_D#2 H1 E11 H_A#5
H_D#3 H_D#_2 H_A#_5 H_A#6
J6 H_D#_3 H_A#_6 G11
H_D#4 H3 F11 H_A#7
H_D#5 H_D#_4 H_A#_7 H_A#8
K2 H_D#_5 H_A#_8 G12
H_D#6 G1 F9 H_A#9
H_D#7 H_D#_6 H_A#_9 H_A#10
G2 H_D#_7 H_A#_10 H11
D H_D#8 H_A#11 D
K9 H_D#_8 H_A#_11 J12
+1.05V H_D#9 K1 G14 H_A#12
H_D#10 H_D#_9 H_A#_12 H_A#13
K7 H_D#_10 H_A#_13 D9
H_D#11 J8 J14 H_A#14
H_D#12 H_D#_11 H_A#_14 H_A#15
H4 H_D#_12 H_A#_15 H13
R164 H_D#13 J3 J15 H_A#16
54.9/F_4 H_D#14 H_D#_13 H_A#_16 H_A#17
K11 H_D#_14 H_A#_17 F14
H_D#15 G4 D12 H_A#18
H_XSCOMP H_D#16 H_D#_15 H_A#_18 H_A#19
T10 H_D#_16 H_A#_19 A11
H_D#17 W11 C11 H_A#20
H_D#18 H_D#_17 H_A#_20 H_A#21
T3 H_D#_18 H_A#_21 A12
H_D#19 U7 A13 H_A#22
+1.05V H_D#20 H_D#_19 H_A#_22 H_A#23
U9 H_D#_20 H_A#_23 E13
H_D#21 U11 G13 H_A#24
H_D#22 H_D#_21 H_A#_24 H_A#25
T11 H_D#_22 H_A#_25 F12
H_D#23 W9 B12 H_A#26
H_D#24 H_D#_23 H_A#_26 H_A#27
T1 H_D#_24 H_A#_27 B14
R138 H_D#25 T8 C12 H_A#28
221/F_4 H_D#26 H_D#_25 H_A#_28 H_A#29 +1.05V
T4 H_D#_26 H_A#_29 A14
H_D#27 W7 C14 H_A#30
H_XSWING H_D#28 H_D#_27 H_A#_30 H_A#31
U5 H_D#_28 H_A#_31 D14
H_D#29 T9
H_D#30 H_D#_29 R189
W6 H_D#_30 H_ADS# E8 H_ADS# <3>
H_D#31 T5 B9 100/F_4 H_VREF :10 mils/20 mils space
C H_D#_31 H_ADSTB#_0 H_ADSTB0# <3> C
R139 C186 H_D#32 AB7 C13
H_D#_32 H_ADSTB#_1 H_ADSTB1# <3>
100/F_4 H_D#33 AA9 J13 H_VREF
.1U-10V_4 H_D#34 H_D#_33 H_VREF_0
W4 H_D#_34 H_BNR# C6 H_BNR# <3>
H_D#35 W3 F6

HOST
H_D#_35 H_BPRI# H_BPRI# <3>
H_D#36 Y3 C7 C232 R190
H_D#_36 H_BREQ#0 H_BREQ#0 <3>
H_D#37 Y7 B7 R476 0_4 .1U-10V_4 200/F_4
H_D#_37 H_CPURST# H_CPURST# <3>
H_D#38 W5 A7
H_D#_38 H_DBSY# H_DBSY# <3>
H_D#39 Y10 C3
+1.05V H_D#_39 H_DEFER# H_DEFER# <3>
H_D#40 AB8 J9
H_D#_40 H_DPWR# H_DPWR# <3>
H_D#41 W2 H8
H_D#_41 H_DRDY# H_DRDY# <3>
H_D#42 AA4 K13 H_VREF
H_D#43 H_D#_42 H_VREF_1
AA7 H_D#_43 H_DINV#[3:0] <3>
R498 H_D#44 AA2 J7 H_DINV#0
54.9/F_4 H_D#45 H_D#_44 H_DINV#_0 H_DINV#1 C231
AA6 H_D#_45 H_DINV#_1 W8
H_D#46 AA10 U3 H_DINV#2 .1U-10V_4
H_YSCOMP H_D#47 H_D#_46 H_DINV#_2 H_DINV#3
Y8 H_D#_47 H_DINV#_3 AB10
H_D#48 AA1 H_D#_48 H_DSTBN#[3:0] <3>
H_D#49 AB4 K4 H_DSTBN#0
H_D#50 H_D#_49 H_DSTBN#_0 H_DSTBN#1
AC9 H_D#_50 H_DSTBN#_1 T7
+1.05V H_D#51 AB11 Y5 H_DSTBN#2
H_D#52 H_D#_51 H_DSTBN#_2 H_DSTBN#3
AC11 H_D#_52 H_DSTBN#_3 AC4
H_D#53 AB3 H_D#_53 H_DSTBP#[3:0] <3>
H_D#54 AC2 K3 H_DSTBP#0
H_D#55 H_D#_54 H_DSTBP#_0 H_DSTBP#1
B AD1 H_D#_55 H_DSTBP#_1 T6 B
R503 H_D#56 AD9 AA5 H_DSTBP#2
221/F_4 H_D#57 H_D#_56 H_DSTBP#_2 H_DSTBP#3
AC1 H_D#_57 H_DSTBP#_3 AC5
H_D#58 AD7
H_YSWING H_D#59 H_D#_58
AC6 H_D#_59
H_D#60 AB5 D3
H_D#_60 H_HIT# H_HIT# <3>
H_D#61 AD10 D4
H_D#_61 H_HITM# H_HITM# <3>
H_D#62 AD4 B3
H_D#_62 H_LOCK# H_LOCK# <3>
R504 C766 H_D#63 AC8
100/F_4 H_D#_63
.1U-10V_4 H_XRCOMP E1 H_XRCOMP H_REQ#[4:0] <3>
H_XSCOMP H_REQ#0
H_XSWING
E2
E4
H_XSCOMP H_REQ#_0 D8
G8 H_REQ#1 COMPONENTS P/N
H_XSWING H_REQ#_1 H_REQ#2
H_YRCOMP Y1
H_REQ#_2 B8
F8 H_REQ#3 945GM AJ009450T04
H_YSCOMP H_YRCOMP H_REQ#_3 H_REQ#4
H_YRCOMP H_YSWING
U1
W1
H_YSCOMP H_REQ#_4 A8 945PM AJ009450T12
H_YSWING H_RS#[2:0] <3>
T100 B4 H_RS#0
H_RS#_0 H_RS#1
<2> CLK_MCH_BCLK AG2 H_CLKIN H_RS#_1 E6
R505 AG1 D6 H_RS#2
<2> CLK_MCH_BCLK# H_CLKIN# H_RS#_2
24.9/F_4 T103
H_SLPCPU# E3 H_CPUSLP# <3,14>
15 mils/10mils H_TRDY# E7 H_TRDY# <3>
Short Stub < 100mils
A Calistoga A
extract from same point
PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
GMCH HOST(1 OF 6 ) C

Date: Friday, February 24, 2006 Sheet 6 of 50


5 4 3 2 1
5 4 3 2 1

<13> M_B_DQ[63:0]
U43E
M_B_DQ0 AK39
D M_B_DQ1 SB_DQ0 D
AJ37 SB_DQ1 SB_BS_0 AT24 M_B_BS#0 <12,13>
M_B_DQ2 AP39 AV23
SB_DQ2 SB_BS_1 M_B_BS#1 <12,13>
M_B_DQ3 AR41 AY28
SB_DQ3 SB_BS_2 M_B_BS#2 <12,13>
M_B_DQ4 AJ38 SB_DQ4 M_B_CAS# <12,13>
M_B_DQ5 AK38 AR24
SB_DQ5 SB_CAS# M_B_DM[7:0] <13>
M_B_DQ6 AN41 AK36 M_B_DM0
M_B_DQ7 SB_DQ6 SB_DM_0 M_B_DM1
AP41 SB_DQ7 SB_DM_1 AR38
M_B_DQ8 AT40 AT36 M_B_DM2
M_B_DQ9 SB_DQ8 SB_DM_2 M_B_DM3
AV41 SB_DQ9 SB_DM_3 BA31
M_B_DQ10 AU38 AL17 M_B_DM4
M_B_DQ11 SB_DQ10 SB_DM_4 M_B_DM5
AV38 SB_DQ11 SB_DM_5 AH8
M_B_DQ12 AP38 BA5 M_B_DM6
<13> M_A_DQ[63:0] SB_DQ12 SB_DM_6
U43D M_B_DQ13 AR40 AN4 M_B_DM7
M_A_DQ0 M_A_BS#0 M_B_DQ14 SB_DQ13 SB_DM_7
AJ35 SA_DQ0 SA_BS_0 AU12 M_A_BS#0 <12,13> AW38 SB_DQ14 M_B_DQS[7:0] <13>
M_A_DQ1 AJ34 AV14 M_A_BS#1 M_B_DQ15 AY38 AM39 M_B_DQS0

B
SA_DQ1 SA_BS_1 M_A_BS#1 <12,13> SB_DQ15 SB_DQS_0
M_A_DQ2 AM31 BA20 M_A_BS#2 M_B_DQ16 BA38 AT39 M_B_DQS1
SA_DQ2 SA_BS_2 M_A_BS#2 <12,13> SB_DQ16 SB_DQS_1
M_A_DQ3 AM33 M_B_DQ17 AV36 AU35 M_B_DQS2
SA_DQ3 M_A_CAS# <12,13> SB_DQ17 SB_DQS_2
M_A_DQ4 AJ36 AY13 M_A_CAS# M_B_DQ18 AR36 AR29 M_B_DQS3
SA_DQ4 SA_CAS# M_A_DM[7:0] <13> SB_DQ18 SB_DQS_3
M_A_DQ5 AK35 AJ33 M_A_DM0 M_B_DQ19 AP36 AR16 M_B_DQS4
M_A_DQ6 SA_DQ5 SA_DM_0 M_A_DM1 M_B_DQ20 SB_DQ19 SB_DQS_4 M_B_DQS5
AJ32 AM35 BA36 AR10

MEMORY
M_A_DQ7 SA_DQ6 SA_DM_1 M_A_DM2 M_B_DQ21 SB_DQ20 SB_DQS_5 M_B_DQS6
AH31 SA_DQ7 SA_DM_2 AL26 AU36 SB_DQ21 SB_DQS_6 AR7
M_A_DQ8 AN35 AN22 M_A_DM3 M_B_DQ22 AP35 AN5 M_B_DQS7
SA_DQ8 SA_DM_3 SB_DQ22 SB_DQS_7 M_B_DQS#[7:0] <13>
M_A_DQ9 AP33 AM14 M_A_DM4 M_B_DQ23 AP34 AM40 M_B_DQS#0
M_A_DQ10 SA_DQ9 SA_DM_4 M_A_DM5 M_B_DQ24 SB_DQ23 SB_DQS#_0 M_B_DQS#1
C AR31 SA_DQ10 SA_DM_5 AL9 AY33 SB_DQ24 SB_DQS#_1 AU39 C
M_A_DQ11 AP31 AR3 M_A_DM6 M_B_DQ25 BA33 AT35 M_B_DQS#2
M_A_DQ12 SA_DQ11 SA_DM_6 M_A_DM7 M_B_DQ26 SB_DQ25 SB_DQS#_2 M_B_DQS#3
AN38 SA_DQ12 SA_DM_7 AH4 AT31 SB_DQ26 SB_DQS#_3 AP29
M_A_DQ13 AM36 M_B_DQ27 AU29 AP16 M_B_DQS#4
SA_DQ13 M_A_DQS[7:0] <13> SB_DQ27 SB_DQS#_4
M_A_DQ14 AM34 AK33 M_A_DQS0 M_B_DQ28 AU31 AT10 M_B_DQS#5
M_A_DQ15
M_A_DQ16
AN33
AK26
SA_DQ14
SA_DQ15
SA_DQ16
A SA_DQS_0
SA_DQS_1
SA_DQS_2
AT33
AN28
M_A_DQS1
M_A_DQS2
M_B_DQ29
M_B_DQ30
AW31
AV29
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AT7
AP5
M_B_DQS#6
M_B_DQS#7
M_A_DQ17 AL27 AM22 M_A_DQS3 M_B_DQ31 AW29
SA_DQ17 SA_DQS_3 SB_DQ31 M_B_A[13:0] <12,13>
M_A_DQ18 AM26 AN12 M_A_DQS4 M_B_DQ32 AM19 AY23 M_B_A0
M_A_DQ19 SA_DQ18 SA_DQS_4 M_A_DQS5 M_B_DQ33 SB_DQ32 SB_MA_0 M_B_A1

SYSTEM
AN24 AN8 AL19 AW24
MEMORY
M_A_DQ20 SA_DQ19 SA_DQS_5 M_A_DQS6 M_B_DQ34 SB_DQ33 SB_MA_1 M_B_A2
AK28 SA_DQ20 SA_DQS_6 AP3 AP14 SB_DQ34 SB_MA_2 AY24
M_A_DQ21 AL28 AG5 M_A_DQS7 M_B_DQ35 AN14 AR28 M_B_A3
SA_DQ21 SA_DQS_7 M_A_DQS#[7:0] <13> SB_DQ35 SB_MA_3
M_A_DQ22 AM24 AK32 M_A_DQS#0 M_B_DQ36 AN17 AT27 M_B_A4
M_A_DQ23 SA_DQ22 SA_DQS#_0 M_A_DQS#1 M_B_DQ37 SB_DQ36 SB_MA_4 M_B_A5
AP26 SA_DQ23 SA_DQS#_1 AU33 AM16 SB_DQ37 SB_MA_5 AT28
M_A_DQ24 AP23 AN27 M_A_DQS#2 M_B_DQ38 AP15 AU27 M_B_A6
M_A_DQ25 SA_DQ24 SA_DQS#_2 M_A_DQS#3 M_B_DQ39 SB_DQ38 SB_MA_6 M_B_A7
AL22 SA_DQ25 SA_DQS#_3 AM21 AL15 SB_DQ39 SB_MA_7 AV28
M_A_DQ26 AP21 AM12 M_A_DQS#4 M_B_DQ40 AJ11 AV27 M_B_A8
M_A_DQ27 SA_DQ26 SA_DQS#_4 M_A_DQS#5 M_B_DQ41 SB_DQ40 SB_MA_8 M_B_A9
AN20 SA_DQ27 SA_DQS#_5 AL8 AH10 SB_DQ41 SB_MA_9 AW27
M_A_DQ28 AL23 AN3 M_A_DQS#6 M_B_DQ42 AJ9 AV24 M_B_A10
M_A_DQ29 SA_DQ28 SA_DQS#_6 M_A_DQS#7 M_B_DQ43 SB_DQ42 SB_MA_10 M_B_A11
AP24 SA_DQ29 SA_DQS#_7 AH5 AN10 SB_DQ43 SB_MA_11 BA27
M_A_DQ30 AP20 M_B_DQ44 AK13 AY27 M_B_A12
SA_DQ30 M_A_A[13:0] <12,13> SB_DQ44 SB_MA_12
M_A_DQ31 AT21 AY16 M_A_A0 M_B_DQ45 AH11 AR23 M_B_A13
SA_DQ31 SA_MA_0 SB_DQ45 SB_MA_13

DDR
M_A_DQ32 M_A_A1 M_B_DQ46
SYSTEM

AR12 SA_DQ32 SA_MA_1 AU14 AK10 SB_DQ46


M_A_DQ33 AR14 AW16 M_A_A2 M_B_DQ47 AJ8 AU23
SA_DQ33 SA_MA_2 SB_DQ47 SB_RAS# M_B_RAS# <12,13>
B M_A_DQ34 AP13 BA16 M_A_A3 M_B_DQ48 BA10 AK16 TP_MB_RCVENIN# B
M_A_DQ35 SA_DQ34 SA_MA_3 M_A_A4 M_B_DQ49 SB_DQ48 SB_RCVENIN# TP_MB_RCVENOUT# T39
AP12 SA_DQ35 SA_MA_4 BA17 AW10 SB_DQ49 SB_RCVENOUT# AK18 T40
M_A_DQ36 AT13 AU16 M_A_A5 M_B_DQ50 BA4 AR27
SA_DQ36 SA_MA_5 SB_DQ50 SB_WE# M_B_WE# <12,13>
M_A_DQ37 AT12 AV17 M_A_A6 M_B_DQ51 AW4
M_A_DQ38 SA_DQ37 SA_MA_6 M_A_A7 M_B_DQ52 SB_DQ51
AL14 SA_DQ38 SA_MA_7 AU17 AY10 SB_DQ52
M_A_DQ39 AL12 AW17 M_A_A8 M_B_DQ53 AY9
M_A_DQ40 SA_DQ39 SA_MA_8 M_A_A9 M_B_DQ54 SB_DQ53
AK9 SA_DQ40 SA_MA_9 AT16 AW5 SB_DQ54
M_A_DQ41 AN7 AU13 M_A_A10 M_B_DQ55 AY5
M_A_DQ42 SA_DQ41 SA_MA_10 M_A_A11 M_B_DQ56 SB_DQ55
AK8 SA_DQ42 SA_MA_11 AT17 AV4 SB_DQ56
M_A_DQ43 AK7 AV20 M_A_A12 M_B_DQ57 AR5
M_A_DQ44 SA_DQ43 SA_MA_12 M_A_A13 M_B_DQ58 SB_DQ57
AP9 SA_DQ44 SA_MA_13 AV12 AK4 SB_DQ58
DDR

M_A_DQ45 AN9 M_B_DQ59 AK3


M_A_DQ46 SA_DQ45 M_B_DQ60 SB_DQ59
AT5 SA_DQ46 SA_RAS# AW14 M_A_RAS# <12,13> AT4 SB_DQ60
M_A_DQ47 AL5 AK23 TP_MA_RCVENIN# M_B_DQ61 AK5
M_A_DQ48 SA_DQ47 SA_RCVENIN# TP_MA_RCVENOUT# T37 M_B_DQ62 SB_DQ61
AY2 SA_DQ48 SA_RCVENOUT# AK24 T36 AJ5 SB_DQ62
M_A_DQ49 AW2 AY14 M_B_DQ63 AJ3
SA_DQ49 SA_WE# M_A_WE# <12,13> SB_DQ63
M_A_DQ50 AP1
M_A_DQ51 SA_DQ50 Calistoga
AN2 SA_DQ51
M_A_DQ52 AV2
M_A_DQ53 SA_DQ52
AT3 SA_DQ53
M_A_DQ54 AN1
M_A_DQ55 SA_DQ54
AL2 SA_DQ55
M_A_DQ56 AG7
M_A_DQ57 SA_DQ56
AF9 SA_DQ57
A M_A_DQ58 AG4 A
M_A_DQ59 SA_DQ58
AF6 SA_DQ59
M_A_DQ60 AG9
M_A_DQ61 AH6
SA_DQ60
SA_DQ61
PROJECT : ZB1
M_A_DQ62 AF4
M_A_DQ63 SA_DQ62
AF8 SA_DQ63 Quanta Computer Inc.
Calistoga
Size Document Number Rev
GMCH DDR(2 OF 6 ) C

Date: Friday, February 24, 2006 Sheet 7 of 50


5 4 3 2 1
5 4 3 2 1

U43B +V1.5_PCIE +V1.5_PCIE <10>


T25 CLK_MCH_OE# H32 RSVD_0 +3V +3V <2,5,10,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,46>
T33 MCH_RSVD_1 T32 RSVD_1 AY35 SMDDR_VREF SMDDR_VREF <13,45> 20mils/20mils space
SM_CK_0 M_CLK_DDR0 <13> +V1.5_PCIE
T32 MCH_RSVD_2 R32 RSVD_2 AR1 +1.8VSUS +1.8VSUS <9,13,20,44,45>
SM_CK_1 M_CLK_DDR1 <13>
T92 MCH_RSVD_3 F3 RSVD_3 AW7
SM_CK_2 M_CLK_DDR2 <13>
T94 MCH_RSVD_4 F7 RSVD_4 AW40 U43C
SM_CK_3 M_CLK_DDR3 <13>

RSVD
T35 MCH_RSVD_5 AG11 RSVD_5 T20 D32 D40 EXP_A_COMPX R162 24.9/F_4
T34 MCH_RSVD_6 R170
IV@0_4 L_BKLTCTL EXP_A_COMPI
AF11 RSVD_6 SM_CK#_0 AW35 M_CLK_DDR#0 <13> <20,25> LVDS_BLON J30 L_BKLTEN EXP_A_COMPO D38
T23 MCH_RSVD_7 H7 RSVD_7 AT1 +3V R180 L_CLKCTLA
IV@10K/F_4 H30
SM_CK#_1 M_CLK_DDR#1 <13> L_CLKCTLA PEG_RXN[15:0] <18,41>
T28 MCH_RSVD_8 J19 RSVD_8 AY7 R181 L_CLKCTLB
IV@10K/F_4 H29 F34 PEG_RXN0
SM_CK#_2 M_CLK_DDR#2 <13> L_CLKCTLB EXP_A_RXN_0
T29 TV_DCONSEL0 K30 RSVD_9 AY40 EDIDCLK G26 G38 PEG_RXN1
SM_CK#_3 M_CLK_DDR#3 <13> <25> EDIDCLK L_DDC_CLK EXP_A_RXN_1
T24 TV_DCONSEL1 J29 RSVD_10 EDIDDATA G25 H34 PEG_RXN2
<25> EDIDDATA L_DDC_DATA EXP_A_RXN_2
T86 MCH_RSVD_11 A41 RSVD_11 AU20 L_IBG B38 J38 PEG_RXN3
SM_CKE_0 M_CKE0 <12,13> L_IBG EXP_A_RXN_3
T91 MCH_RSVD_12 A35 RSVD_12 AT20 T11 L_VBG C35 L34 PEG_RXN4
D SM_CKE_1 M_CKE1 <12,13> DISP_ON R638 L_VBG EXP_A_RXN_4 D
T90 MCH_RSVD_13 A34 RSVD_13 BA29 IV@0_4 F32 M38 PEG_RXN5
SM_CKE_2 M_CKE2 <12,13> <20,25> LVDS_DIGON L_VDDEN EXP_A_RXN_5
T21 MCH_RSVD_14 D28 RSVD_14 AY29 L_VREFH C33 N34 PEG_RXN6
SM_CKE_3 M_CKE3 <12,13> L_VREFH EXP_A_RXN_6
T85 MCH_RSVD_15 D27 RSVD_15 L_VREFL C32 P38 PEG_RXN7
L_IBG L_VREFL EXP_A_RXN_7 PEG_RXN8
SM_CS#_0 AW13 M_CS#0 <12,13> EXP_A_RXN_8 R34
AW12 LA_CLK# A33 T38 PEG_RXN9
SM_CS#_1 M_CS#1 <12,13> LA_CLK# EXP_A_RXN_9

MUXING
K16 AY21 LA_CLK A32 V34 PEG_RXN10
<2> MCH_BSEL0 CFG_0 SM_CS#_2 M_CS#2 <12,13> LA_CLK EXP_A_RXN_10
K18 AW21 LB_CLK# E27 W38 PEG_RXN11
<2> MCH_BSEL1 CFG_1 SM_CS#_3 M_CS#3 <12,13> LB_CLK# EXP_A_RXN_11
<2> MCH_BSEL2 J18 15mils/15mils LB_CLK E26 Y34 PEG_RXN12
MCH_CFG_3 CFG_2 M_OCDCOMP_0 R160 LB_CLK EXP_A_RXN_12 PEG_RXN13
F18 CFG_3 SM_OCDCOMP_0 AL20 EXP_A_RXN_13 AA38

LVDS
T10 MCH_CFG_4 E15 AF10 M_OCDCOMP_1 LA_DATAN0 C37 AB34 PEG_RXN14
T19 MCH_CFG_5 CFG_4 SM_OCDCOMP_1 IV@1.5K/F_4 LA_DATAN1 LA_DATA#_0 EXP_A_RXN_14 PEG_RXN15
F15 CFG_5 B35 LA_DATA#_1 EXP_A_RXN_15 AC38
MCH_CFG_6 E18 BA13 LA_DATAN2 A37
CFG_6 SM_ODT_0 M_ODT0 <12,13> LA_DATA#_2 PEG_RXP[15:0] <18,41>
MCH_CFG_7 D19 BA12 R214 R221 D34 PEG_RXP0
CFG_7 SM_ODT_1 M_ODT1 <12,13> +1.8VSUS EXP_A_RXP_0
MCH_CFG_8 D16 AY20 F38 PEG_RXP1
M_ODT2 <12,13>

GRAPHICS
CFG_8 SM_ODT_2 EXP_A_RXP_1

CFG
T15 MCH_CFG_9 G16 AU21 *40.2/F_4 *40.2/F_4 G34 PEG_RXP2
CFG_9 SM_ODT_3 M_ODT3 <12,13> EXP_A_RXP_2
MCH_CFG_10 E16 LA_DATAP0 B37 H38 PEG_RXP3

DDR
MCH_CFG_11 CFG_10 M_RCOMP# Layout as short as passable LA_DATAP1 LA_DATA_0 EXP_A_RXP_3 PEG_RXP4
D15 CFG_11 SM_RCOMP# AV9 B34 LA_DATA_1 EXP_A_RXP_4 J34
MCH_CFG_12 G15 AT9 M_RCOMP NC from WW45 LA_DATAP2 A36 L38 PEG_RXP5
MCH_CFG_13 CFG_12 SM_RCOMP R239 LA_DATA_2 EXP_A_RXP_5 PEG_RXP6
K15 CFG_13 EXP_A_RXP_6 M34
MCH_CFG_14 C15 AK1 SMDDR_VREF_MCH R237 0_6 SMDDR_VREF 80.6/F_4 N38 PEG_RXP7
T9 MCH_CFG_15 CFG_14 SM_VREF_0 R227 *10K_6 LB_DATAN0 EXP_A_RXP_7 PEG_RXP8
H16 CFG_15 SM_VREF_1 AK41 +1.8VSUS G30 LB_DATA#_0 EXP_A_RXP_8 P34
T30 MCH_CFG_16 G18 R705 *10K_6 M_RCOMP# LB_DATAN1 D30 R38 PEG_RXP9
MCH_CFG_17 CFG_16 LB_DATAN2 LB_DATA#_1 EXP_A_RXP_9 PEG_RXP10
H15 CFG_17
15mils/10mils F29 LB_DATA#_2 EXP_A_RXP_10 T34
T8 MCH_CFG_18 J25 AF33 M_RCOMP V38 PEG_RXP11
CFG_18 G_CLKIN# CLK_PCIE_3GPLL# <2> EXP_A_RXP_11
MCH_CFG_19 K27 AG33 W34 PEG_RXP12
CFG_19 G_CLKIN CLK_PCIE_3GPLL <2> EXP_A_RXP_12
MCH_CFG_20 J26 A27 Y38 PEG_RXP13
DREFCLK# <2>
CLK
R735 0_4 CFG_20 D_REFCLKIN# LB_DATAP0 EXP_A_RXP_13 PEG_RXP14
<13> PM_EXTTS#1 D_REFCLKIN A26 DREFCLK <2> F30 LB_DATA_0 EXP_A_RXP_14 AA34
<16> PM_BMBUSY# G28 C40 R240 LB_DATAP1 D29 AB38 PEG_RXP15

PCI-EXPRESS
PM_BMBUSY# D_REFSSCLKIN# DREFSSCLK# <2> LB_DATA_1 EXP_A_RXP_15
<13> PM_EXTTS#0 F25 D41 80.6/F_4 LB_DATAP2 F28
PM_EXTTS#_0 D_REFSSCLKIN DREFSSCLK <2> LB_DATA_2
PM

C <13> PM_EXTTS#1 R736 *0_4 EXTTS1 H26 F36 C_PEG_TXN0 C220 CT_EV@.1U-10V_4
PEG_TXN0 C
PM_EXTTS#_1 DMI_TXN[3:0] <15> EXP_A_TXN_0
<3,14> PM_THRMTRIP# G6 PM_THRMTRIP# EXP_A_TXN_1 G40 C_PEG_TXN1 C747 CT_EV@.1U-10V_4
PEG_TXN1
3,16,43> DELAY_VR_PWRGOOD AH33 PWROK DMI_RXN_0 AE35 DMI_TXN0 EXP_A_TXN_2 H36 C_PEG_TXN2 C210 CT_EV@.1U-10V_4
PEG_TXN2
AH34 RSTIN# DMI_RXN_1 AF39 DMI_TXN1 EXP_A_TXN_3 J40 C_PEG_TXN3 C749 CT_EV@.1U-10V_4
PEG_TXN3
R508 RST IN# MCH AG35 DMI_TXN2 TV_COMP1 A16 L36 C_PEG_TXN4 C230 EV@.1U-10V_4
PEG_TXN4
<15> PLT_RST-R# DMI_RXN_2 <25> INT_TV_COMP TV_DACA_OUT EXP_A_TXN_4
100/F_4 AH39 DMI_TXN3 TV_Y/G1 C18 M40 C_PEG_TXN5 C752 EV@.1U-10V_4
PEG_TXN5
DMI_RXN_3 <25> INT_TV_Y/G TV_DACB_OUT EXP_A_TXN_5
MISC

H28 TV_C/R1 A19 N36 C_PEG_TXN6 C237 EV@.1U-10V_4


PEG_TXN6
<41> SDVO_CTRLCLK SDVO_CTRLCLK <25> INT_TV_C/R TV_DACC_OUT EXP_A_TXN_6

TV
<41> SDVO_CTRLDATA H27 SDVO_CTRLDATA EXP_A_TXN_7 P40 C_PEG_TXN7 C758 EV@.1U-10V_4
PEG_TXN7
K28 AC35 DMI_TXP0 R471 IV@150/F_4 R186 TVIREF J20 R36 C_PEG_TXN8 C246 EV@.1U-10V_4
PEG_TXN8
<15> MCH_ICH_SYNC LT_RESET# DMI_RXP_0 TV_IREF EXP_A_TXN_8
AE39 DMI_TXP1 R470 IV@150/F_4 B16 T40 C_PEG_TXN9 C761 EV@.1U-10V_4
PEG_TXN9
DMI_RXP_1 DMI_TXP2 R469 IV@150/F_4 IV@4.99K/F_6 TV_IRTNA EXP_A_TXN_9
DMI_RXP_2 AF35 B18 TV_IRTNB EXP_A_TXN_10 V36 C_PEG_TXN10C253 EV@.1U-10V_4
PEG_TXN10
T93 TP_MCH_NC0 D1 AG39 DMI_TXP3 B19 W40 C_PEG_TXN11C765 EV@.1U-10V_4
PEG_TXN11
NC0 DMI_RXP_3 DMI_TXP[3:0] <15> TV_IRTNC EXP_A_TXN_11
T97 TP_MCH_NC1 C41 Y36 C_PEG_TXN12C262 EV@.1U-10V_4
PEG_TXN12
NC1 DMI_RXN[3:0] <15> EXP_A_TXN_12
T83 TP_MCH_NC2 C1 AA40 C_PEG_TXN13C780 EV@.1U-10V_4
PEG_TXN13
TP_MCH_NC3 NC2 EXP_A_TXN_13
T110 BA41 NC3 DMI_TXN_0 AE37 DMI_RXN0 EXP_A_TXN_14 AB36 C_PEG_TXN14C273 EV@.1U-10V_4
PEG_TXN14
T105 TP_MCH_NC4 BA40 AF41 DMI_RXN1 < 0.1" . 15mils/15mils space AC40 C_PEG_TXN15C784 EV@.1U-10V_4
PEG_TXN15
NC4 DMI_TXN_1 EXP_A_TXN_15
NC

T109 TP_MCH_NC5 BA39 AG37DMI_RXN2


TP_MCH_NC6 NC5 DMI_TXN_2
T46 BA3 NC6 DMI_TXN_3 AH41 DMI_RXN3 <26> INT_VGA_BLU
CRT_BLUE E23 CRT_BLUE EXP_A_TXP_0 D36 C_PEG_TXP0 C222 CT_EV@.1U-10V_4
PEG_TXP0
T47 TP_MCH_NC7 BA2 D23 F40 C_PEG_TXP1 C745 CT_EV@.1U-10V_4
PEG_TXP1
DMI

TP_MCH_NC8 NC7 CRT_GREEN CRT_BLUE# EXP_A_TXP_1


T48 BA1 NC8 <26> INT_VGA_GRN C22 CRT_GREEN EXP_A_TXP_2 G36 C_PEG_TXP2 C214 CT_EV@.1U-10V_4
PEG_TXP2

VGA
T87 TP_MCH_NC9 B41 AC37 DMI_RXP0 B22 H40 C_PEG_TXP3 C748 CT_EV@.1U-10V_4
PEG_TXP3
TP_MCH_NC10 NC9 DMI_TXP_0 CRT_GREEN# EXP_A_TXP_3
T84 B2 NC10 DMI_TXP_1 AE41 DMI_RXP1 <26> INT_VGA_RED
CRT_RED A21 CRT_RED EXP_A_TXP_4 J36 C_PEG_TXP4 C227 EV@.1U-10V_4
PEG_TXP4
T41 TP_MCH_NC11 AY41 AF37 DMI_RXP2 R472 IV@150/F_4 B21 L40 C_PEG_TXP5 C750 PEG_TXP5
EV@.1U-10V_4
TP_MCH_NC12 NC11 DMI_TXP_2 CRT_RED# EXP_A_TXP_5
T45 AY1 NC12 DMI_TXP_3 AG41 DMI_RXP3 R473 IV@150/F_4
EXP_A_TXP_6 M36 C_PEG_TXP6 C233 EV@.1U-10V_4
PEG_TXP6
T104 TP_MCH_NC13 AW41 R468 IV@150/F_4 N40 C_PEG_TXP7 C755 EV@.1U-10V_4
PEG_TXP7
TP_MCH_NC14 NC13 EXP_A_TXP_7
T44 AW1 NC14 <26> INT_DDCCLK C26 CRT_DDC_CLK EXP_A_TXP_8 P36 C_PEG_TXP8 C245 EV@.1U-10V_4
PEG_TXP8
T96 TP_MCH_NC15 A40 C25 R40 C_PEG_TXP9 C759 EV@.1U-10V_4
PEG_TXP9
NC15 <26> INT_DDCDAT CRT_DDC_DATA EXP_A_TXP_9
T88 TP_MCH_NC16 A4 G23 T36 C_PEG_TXP10C252 EV@.1U-10V_4
PEG_TXP10
NC16 DMI_RXP[3:0] <15> CRT_HSYNC EXP_A_TXP_10
T89 TP_MCH_NC17 A39 J22 V40 C_PEG_TXP11C763 EV@.1U-10V_4
PEG_TXP11
+3V TP_MCH_NC18 NC17 HSYNC1 CRT_IREF EXP_A_TXP_11
B
T95 A3 NC18 <26> INT_HSYNC H23 CRT_VSYNC EXP_A_TXP_12 W36 C_PEG_TXP12C258 EV@.1U-10V_4
PEG_TXP12
B
EXP_A_TXP_13 Y40 C_PEG_TXP13C773 EV@.1U-10V_4
PEG_TXP13
Calistoga R185 CRTIREF AA36 C_PEG_TXP14C265 EV@.1U-10V_4
PEG_TXP14
R167 10K/F_4 PM_EXTTS#0 IV@255/F_6 EXP_A_TXP_14
< 0.1" . 15mils/15mils space EXP_A_TXP_15 AB40 C_PEG_TXP15C782 EV@.1U-10V_4
PEG_TXP15
R184 *10K/F_4 PM_EXTTS#1 VSYNC1
use 1% R <26> INT_VSYNC
Calistoga
R737 0_4 EXTTS1
<16,43> PM_DPRSLPVR
GMCH Strap pin
RP29 IV@0_4P2R_S
PEG_TXP0 PEG_TXP[15:0] <18,41>
MCH_CFG_5 R140 *2.2K_4 3 4 LA_CLK#
<20,25> TXLCLKOUT- PEG_TXP1
1 2 LA_CLK
<20,25> TXLCLKOUT+ PEG_TXP2
MCH_CFG_6 R145 *2.2K_4 RP42 IV@0_4P2R_S PEG_TXP3
PEG_TXP4 PEG_TXN[15:0] <18,41>
1.MCH_CFG_5 Low = DMI X2, High=DMIX4 3 4 LB_CLK# PEG_TXN0
<20,25> TXUCLKOUT- PEG_TXP5
1 2 LB_CLK PEG_TXN1
<20,25> TXUCLKOUT+ PEG_TXP6
2.MCH_CFG_6 DDR : Low =Moby Dick, High= Calistoga (Default) MCH_CFG_7 R144 *2.2K_4 PEG_TXN2
RP31 IV@0_4P2R_S PEG_TXP7 PEG_TXN3
3.MCH_CFG_7 CPU Strap Low=RSVD, High=Mobile CPU 1 2 LA_DATAN0 PEG_TXP8 PEG_TXN4
<20,25> TXLOUT0-
MCH_CFG_9 R169 *2.2K_4 3 4 LA_DATAP0 PEG_TXP9 PEG_TXN5
<20,25> TXLOUT0+
4.MCH_CFG_9 PCI Exp Graphics Lane: Low =Reserved,High=Mobility PEG_TXP10 PEG_TXN6
RP27 IV@0_4P2R_S PEG_TXP11 PEG_TXN7
5.MCH_CFG_10 Host PLL VCC Select: Low=Reserved, High=Mobility MCH_CFG_10 R161 *2.2K_4 1 2 LB_DATAN0 PEG_TXP12 PEG_TXN8
<20,25> TXUOUT0-
3 4 LB_DATAP0 PEG_TXP13 PEG_TXN9
<20,25> TXUOUT0+
6.MCH_CFG_11: Low=Calistoga, High=Reserved PEG_TXP14 PEG_TXN10
MCH_CFG_11 R141 *2.2K_4 RP38 IV@0_4P2R_S PEG_TXP15 PEG_TXN11
7.MCH_CFG_16 FSB Dynmic ODT: Low=Dynamic ODT Disabled, <20,25> TXLOUT1+ 1 2 LA_DATAP1 PEG_TXN12
<20,25> TXLOUT1- 3 4 LA_DATAN1 PEG_TXN13
High=Dynamic ODT Enabled. MCH_CFG_12 R173 *2.2K_4 PEG_TXN14
8.MCH_CFG_18 VCC Select: LOW=1.05V, High=1.5V RP36 IV@0_4P2R_S PEG_TXN15
A <20,25> TXUOUT1+ 3 4 LB_DATAP1 A
9.MCH_CFG_19 DMI LANE Reversal: Low=Normal,High=LANES Reversed. MCH_CFG_13 R188 *2.2K_4 1 2 LB_DATAN1
<20,25> TXUOUT1-
10.MCH_CFG_20 PCIE Backward interpoerability mode: Low= only RP40 IV@0_4P2R_S
MCH_CFG_16 R168 *2.2K_4 +3V 1 2 LA_DATAN2
SDVO or PCIE x1 is operational (defaults) ,High=SDVO and <20,25> TXLOUT2-
3 4 LA_DATAP2
PCIE x1 are operation simultaneously via the PEG port. R187 <20,25> TXLOUT2+ PROJECT : ZB1
MCH_CFG_18 R179 *1K/F_4CFG_RSVD_0_R RP33 IV@0_4P2R_S
*0_4 <20,25> TXUOUT2- 1 2 LB_DATAN2
<20,25> TXUOUT2+ 3 4 LB_DATAP2 Quanta Computer Inc.
MCH_CFG_19 R182 *1K/F_4 +3V Size Document Number Rev
GMCH DMI/VEDIO(3 OF 6 ) C
MCH_CFG_20 R183 *1K/F_4 near conn.
+3V Date: Friday, February 24, 2006 Sheet 8 of 50
5 4 3 2 1
5 4 3 2 1

U43G U43F
+1.05V C194 AA33 +1.05V AD27
VCC_0 VCC_NCTF0
W33 VCC_1 AC27 VCC_NCTF1 VSS_NCTF0 AE27

330U-2.5V_7343
P33 VCC_2
25mils + AB27 VCC_NCTF2 VSS_NCTF1 AE26
+ N33 C281 C269 C268 C266 C244 C242 C272 AA27 AE25
VCC_3 C313 .47U-10V_6 10U/X5R-6.3V_8 1U-16V_6 .1U-10V_4 VCC_NCTF3 VSS_NCTF2
L33 VCC_4 VCC_SM_0 AU41 Y27 VCC_NCTF4 VSS_NCTF3 AE24
J33 VCC_5 VCC_SM_1 AT41 VCC_SM1 330U-2.5V_7343 10U/X5R-6.3V_8 .1U-10V_4 .1U-10V_4 W27 VCC_NCTF5 VSS_NCTF4 AE23
AA32 VCC_6 VCC_SM_2 AM41VCC_SM2 C301 .47U-10V_6 V27 VCC_NCTF6 VSS_NCTF5 AE22
Y32 VCC_7 VCC_SM_3 AU40 U27 VCC_NCTF7 VSS_NCTF6 AE21
W32 VCC_8 VCC_SM_4 BA34 T27 VCC_NCTF8 VSS_NCTF7 AE20
V32 VCC_9 VCC_SM_5 AY34 R27 VCC_NCTF9 VSS_NCTF8 AE19
P32 VCC_10 VCC_SM_6 AW34 AD26 VCC_NCTF10 VSS_NCTF9 AE18
N32 AV34 +1.8VSUS AC26 AC17
VCC_11 VCC_SM_7 VCC_NCTF11 VSS_NCTF10
D
M32 VCC_12 VCC_SM_8 AU34 120mils AB26 VCC_NCTF12 VSS_NCTF11 Y17 D
L32 VCC_13 VCC_SM_9 AT34 AA26 VCC_NCTF13 VSS_NCTF12 U17
J32 VCC_14 VCC_SM_10 AR34 Y26 VCC_NCTF14
AA31 BA30 + C322 W26
VCC_15 VCC_SM_11 C292 C293 C311 C316 C317 C318 VCC_NCTF15
W31 VCC_16 VCC_SM_12 AY30 V26 VCC_NCTF16
V31 AW30 330U-2.5V_7343 10U/X5R-6.3V_8 .47U-10V_6 .1U-10V_4 .1U-10V_4 .1U-10V_4 U26 +1.5V_AUX
VCC_17 VCC_SM_13 10U/X5R-6.3V_8 VCC_NCTF17
T31 VCC_18 VCC_SM_14 AV30 T26 VCC_NCTF18
R31 VCC_19 VCC_SM_15 AU30 R26 VCC_NCTF19 VCCAUX_NCTF0 AG27
P31 VCC_20 VCC_SM_16 AT30 AD25 VCC_NCTF20 VCCAUX_NCTF1 AF27 100mils
N31 VCC_21 VCC_SM_17 AR30 AC25 VCC_NCTF21 VCCAUX_NCTF2 AG26
M31 VCC_22 VCC_SM_18 AP30 AB25 VCC_NCTF22 VCCAUX_NCTF3 AF26
AA30 VCC_23 VCC_SM_19 AN30 AA25 VCC_NCTF23 VCCAUX_NCTF4 AG25
Y30 VCC_24 VCC_SM_20 AM30 Y25 VCC_NCTF24 VCCAUX_NCTF5 AF25
W30 VCC_25 VCC_SM_21 AM29 W25 VCC_NCTF25 VCCAUX_NCTF6 AG24
V30 VCC_26 VCC_SM_22 AL29 V25 VCC_NCTF26 VCCAUX_NCTF7 AF24
U30 VCC_27 VCC_SM_23 AK29 U25 VCC_NCTF27 VCCAUX_NCTF8 AG23
T30 VCC_28 VCC_SM_24 AJ29 T25 VCC_NCTF28 VCCAUX_NCTF9 AF23
R30 VCC_29 VCC_SM_25 AH29 R25 VCC_NCTF29 VCCAUX_NCTF10 AG22
P30 VCC_30 VCC_SM_26 AJ28 AD24 VCC_NCTF30 VCCAUX_NCTF11 AF22
N30 VCC_31 VCC_SM_27 AH28 AC24 VCC_NCTF31 VCCAUX_NCTF12 AG21
M30 VCC_32 VCC_SM_28 AJ27 AB24 VCC_NCTF32 VCCAUX_NCTF13 AF21
L30 VCC_33 VCC_SM_29 AH27 AA24 VCC_NCTF33 VCCAUX_NCTF14 AG20
AA29 VCC_34 VCC_SM_30 BA26 Y24 VCC_NCTF34 VCCAUX_NCTF15 AF20
Y29 VCC_35 VCC_SM_31 AY26 W24 VCC_NCTF35 VCCAUX_NCTF16 AG19
W29 VCC_36 VCC_SM_32 AW26 V24 VCC_NCTF36 VCCAUX_NCTF17 AF19
V29 VCC_37 VCC_SM_33 AV26 U24 VCC_NCTF37 VCCAUX_NCTF18 R19
U29 VCC_38 VCC_SM_34 AU26 T24 VCC_NCTF38 VCCAUX_NCTF19 AG18
R29 VCC_39 VCC_SM_35 AT26 R24 VCC_NCTF39 VCCAUX_NCTF20 AF18
P29 VCC_40 VCC_SM_36 AR26 AD23 VCC_NCTF40 VCCAUX_NCTF21 R18
M29 VCC_41 VCC_SM_37 AJ26 V23 VCC_NCTF41 VCCAUX_NCTF22 AG17
C L29 VCC_42 VCC_SM_38 AH26 U23 VCC_NCTF42 VCCAUX_NCTF23 AF17 C
AB28 VCC_43 VCC_SM_39 AJ25 T23 VCC_NCTF43 VCCAUX_NCTF24 AE17
AA28 VCC_44 VCC_SM_40 AH25 R23 VCC_NCTF44 VCCAUX_NCTF25 AD17
Y28 VCC_45 VCC_SM_41 AJ24 AD22 VCC_NCTF45 VCCAUX_NCTF26 AB17
V28 VCC_46 VCC_SM_42 AH24 V22 VCC_NCTF46 VCCAUX_NCTF27 AA17
U28 VCC_47 VCC_SM_43 BA23 U22 VCC_NCTF47 VCCAUX_NCTF28 W17
T28 VCC_48 VCC_SM_44 AJ23 T22 VCC_NCTF48 VCCAUX_NCTF29 V17
R28 BA22 C320 R22 T17
VCC_49 VCC_SM_45 C291 .47U-10V_6 VCC_NCTF49 VCCAUX_NCTF30
P28 AY22 AD21 R17
N28
M28
VCC_50
VCC_51
VCC_52
VCC_SM_46
VCC_SM_47
VCC_SM_48
AW22
AV22
.47U-10V_6 V21
U21
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
NCTF VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
AG16
AF16
L28 VCC_53 VCC_SM_49 AU22 T21 VCC_NCTF53 VCCAUX_NCTF34 AE16
P27 VCC_54 VCC_SM_50 AT22 R21 VCC_NCTF54 VCCAUX_NCTF35 AD16
N27 VCC_55 VCC_SM_51 AR22 AD20 VCC_NCTF55 VCCAUX_NCTF36 AC16
M27 VCC_56 VCC_SM_52 AP22 V20 VCC_NCTF56 VCCAUX_NCTF37 AB16
L27 VCC_57 VCC_SM_53 AK22 U20 VCC_NCTF57 VCCAUX_NCTF38 AA16
P26 VCC_58 VCC_SM_54 AJ22 T20 VCC_NCTF58 VCCAUX_NCTF39 Y16
N26 AK21 <10> +1.5V_AUX +1.5V_AUX R20 W16
VCC_59 VCC_SM_55 VCC_NCTF59 VCCAUX_NCTF40
L26 VCC_60 VCC_SM_56 AK20 AD19 VCC_NCTF60 VCCAUX_NCTF41 V16
N25 BA19 <3,4,6,10,14,17,46> +1.05V +1.05V V19 U16
VCC_61 VCC_SM_57 VCC_NCTF61 VCCAUX_NCTF42
M25 VCC_62 VCC_SM_58 AY19 U19 VCC_NCTF62 VCCAUX_NCTF43 T16
L25 AW19 <8,13,20,44,45> +1.8VSUS +1.8VSUS T19 R16
VCC_63 VCC_SM_59 VCC_NCTF63 VCCAUX_NCTF44
P24 VCC_64 VCC_SM_60 AV19 AD18 VCC_NCTF64 VCCAUX_NCTF45 AG15
N24 VCC_65 VCC_SM_61 AU19 AC18 VCC_NCTF65 VCCAUX_NCTF46 AF15
M24 VCC_66 VCC_SM_62 AT19 AB18 VCC_NCTF66 VCCAUX_NCTF47 AE15
AB23 VCC_67 VCC_SM_63 AR19 AA18 VCC_NCTF67 VCCAUX_NCTF48 AD15
AA23 AP19 Y18 AC15
Y23
P23
VCC_68
VCC_69
VCC_70
VCC VCC_SM_64
VCC_SM_65
VCC_SM_66
AK19
AJ19
W18
V18
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
AB15
AA15
B
N23 VCC_71 VCC_SM_67 AJ18 U18 VCC_NCTF71 VCCAUX_NCTF52 Y15 B
M23 VCC_72 VCC_SM_68 AJ17 T18 VCC_NCTF72 VCCAUX_NCTF53 W15
L23 VCC_73 VCC_SM_69 AH17 VCCAUX_NCTF54 V15
AC22 VCC_74 VCC_SM_70 AJ16 VCCAUX_NCTF55 U15
AB22 VCC_75 VCC_SM_71 AH16 VCCAUX_NCTF56 T15
Y22 VCC_76 VCC_SM_72 BA15 VCCAUX_NCTF57 R15
W22 VCC_77 VCC_SM_73 AY15
P22 AW15 C321 Calistoga
VCC_78 VCC_SM_74 .47U-10V_6
N22 VCC_79 VCC_SM_75 AV15
M22 VCC_80 VCC_SM_76 AU15
L22 VCC_81 VCC_SM_77 AT15
AC21 VCC_82 VCC_SM_78 AR15
AA21 VCC_83 VCC_SM_79 AJ15
W21 VCC_84 VCC_SM_80 AJ14
N21 VCC_85 VCC_SM_81 AJ13
M21 VCC_86 VCC_SM_82 AH13
L21 VCC_87 VCC_SM_83 AK12
AC20 VCC_88 VCC_SM_84 AJ12
AB20 VCC_89 VCC_SM_85 AH12
Y20 VCC_90 VCC_SM_86 AG12
W20 VCC_91 VCC_SM_87 AK11
P20 VCC_92 VCC_SM_88 BA8
N20 VCC_93 VCC_SM_89 AY8
M20 VCC_94 VCC_SM_90 AW8
L20 VCC_95 VCC_SM_91 AV8
AB19 VCC_96 VCC_SM_92 AT8
AA19 VCC_97 VCC_SM_93 AR8
Y19 VCC_98 VCC_SM_94 AP8
N19 VCC_99 VCC_SM_95 BA6
M19 VCC_100 VCC_SM_96 AY6
A L19 VCC_101 VCC_SM_97 AW6 A
N18 VCC_102 VCC_SM_98 AV6
M18 VCC_103 VCC_SM_99 AT6
L18 VCC_104 VCC_SM_100 AR6
P17 VCC_105 VCC_SM_101 AP6
N17 AN6
M17
VCC_106
VCC_107
VCC_SM_102
VCC_SM_103 AL6 25mils PROJECT : ZB1
N16 VCC_108 VCC_SM_104 AK6
M16 AJ6
L16
VCC_109
VCC_110
VCC_SM_105
VCC_SM_106 AV1 VCC_SM106 C312 .47U-10V_6 Quanta Computer Inc.
VCC_SM_107 AJ1 VCC_SM107
C289 .47U-10V_6 Size Document Number Rev
Calistoga GMCH PW & STRAP(4 OF 6) C
25mils
Date: Friday, February 24, 2006 Sheet 9 of 50
5 4 3 2 1
5 4 3 2 1

+V3.3_TVDAC +2.5V +1.05V


+1.5V +V1.5_DPLLA
80mils +V3.3_ATVBG
L69 L68 C212 C179
10uH_8 10uH_8 +V3.3_ATVBG U43H
.1U-10V_410U/X5R-6.3V_8 H22 +1.05V
C720 C733 C721 VCCSYNC
VTT_0 AC14
+ C717 C729 C30 AB14
.1U-10V_4 10U-10V_8 .1U-10V_4.022U-16V_4 VCC_TXLVDS0 VTT_1
+2.5V B30 VCC_TXLVDS1 VTT_2 W14
330U-2.5V_7343 +V1.5_PCIE A30 V14 C216 + C270 C240 C243 C267
+V3.3_ATVBG VCC_TXLVDS2 VTT_3
VTT_4 T14
+V1.5_DPLLB +2.5V AJ41 R14 330U-2.5V_7343 2.2U-6.3V_6
L70 +V3.3_ATVBG VCC3G0 VTT_5 4.7U-10V_8 .1U-10V_410U/X5R-6.3V_8
AB41 VCC3G1 VTT_6 P14
D 10uH_8 Y41 N14 D
C735 C723 +V1.5_3GPLL C221 VCC3G2 VTT_7
V41 VCC3G3 VTT_8 M14
.022U-16V_4 .1U-10V_4 R41 L14
+ C718 C727 .1U-10V_4 VCC3G4 VTT_9 +1.05V
N41 VCC3G5 VTT_10 AD13
.1U-10V_4 C795 C794 L41 AC13
330U-2.5V_7343 +V3.3_ATVBG VCC3G6 VTT_11
AC33 VCCA_3GPLL VTT_12 AB13
.1U-10V_410U/X5R-6.3V_8 G41 AA13
+V1.5_HPLL +V3.3_ATVBG VCCA_3GBG VTT_13 C241 C238 C239 C271
H41 VSSA_3GBG VTT_14 Y13
L40 W13
BK1608LL121_6 C734 C722 +V2.5_CRTDAC VTT_15 .22U-6.3V_4.22U-6.3V_4.47U-10V_6
F21 VCCA_CRTDAC0 VTT_16 V13
.1U-10V_4.022U-16V_4 E21 U13 .47U-10V_6
C284 C287 VCCA_CRTDAC1 VTT_17
G21 VSSA_CRTDAC VTT_18 T13
.1U-10V_4 C225 C218 +V1.5_DPLLA R13
10U/X5R-6.3V_8 +V1.5_DPLLB VTT_19
B26 VCCA_DPLLA VTT_20 N13
.1U-10V_4.022U-16V_4 +V1.5_HPLL C39 M13
+V1.5_MPLL VCCA_DPLLB VTT_21
AF1 VCCA_HPLL VTT_22 L13
L39 +2.5V AB12
BK1608LL121_6 VTT_23 +2.5V
A38 VCCA_LVDS VTT_24 AA12
B39 VSSA_LVDS VTT_25 Y12
C280 C275 C203 +V1.5_MPLL W12
C200 VTT_26
AF2 VCCA_MPLL VTT_27 V12
10U/X5R-6.3V_8 .1U-10V_4 .1U-10V_4
.01U-16V_4 U12 C224 C173
VTT_28
H20 VCCA_TVBG VTT_29 T12
G20 R12 .1U-10V_4
+V3.3_ATVBG VSSA_TVBG VTT_30 4.7U-10V_8
VTT_31 P12
+2.5V R174 25mils D10 +1.05V N12
10_4 PDZ5.6B +V3.3_ATVBG VTT_32
VTT_33 M12
C 1 2 C726 C725 E19 L12 C
+V3.3_ATVBG VCCA_TVDACA0 VTT_34
F19 VCCA_TVDACA1 VTT_35 R11
+V2.5_CRTDAC .1U-10V_4.022U-16V_4 C20 P11
VCCA_TVDACB0 VTT_36
D20 VCCA_TVDACB1 VTT_37 N11
L34 VCCGFOLLOW BK1608LL121_6 +V3.3_ATVBG E20 M11
F20
VCCA_TVDACC0
VCCA_TVDACC1 POWER VTT_38
VTT_39
VTT_40
R10
P10
+1.5V AH1 N10
VCCD_HMPLL0 VTT_41
AH2 VCCD_HMPLL1 VTT_42 M10
+V1.5_PCIE 60mils +1.5V P9
L73 VTT_43
A28 VCCD_LVDS0 VTT_44 N9
100nH_8 B28 M9
PCIE_L VCCD_LVDS1 VTT_45
C28 VCCD_LVDS2 VTT_46 R8
+3V +1.5V +V1.5_TVDAC P8
+ C716 VTT_47
D21 VCCD_TVDAC VTT_48 N8
C740 C737 220U-6.3V_7343 M8
10U/X5R-6.3V_8
10U/X5R-6.3V_8 +3V VTT_49
A23 VCC_HV0 VTT_50 P7
C715 C195 C288 C303 B23 N7
.1U-10V_4 VCC_HV1 VTT_51
B25 VCC_HV2 VTT_52 M7
10U/X5R-6.3V_8 .1U-10V_4 40mils +V1.5_QTVDAC R6
10U/X5R-6.3V_8 VTT_53
H19 VCCD_QTVDAC VTT_54 P6
+1.5V_AUX M6
+V1.5_3GPLL +1.5V VTT_55
60mils 60mils AK31 VCCAUX0 VTT_56 A6
R512 L75 AF31 R5
0.5/F_6 1uH_6 VCCAUX1 VTT_57
AE31 VCCAUX2 VTT_58 P5
3GPLL_FB_R 3GPLL_FB_L AC31 N5
VCCAUX3 VTT_59
AL30 VCCAUX4 VTT_60 M5
B AK30 VCCAUX5 VTT_61 P4 B
60mils AJ30 VCCAUX6 VTT_62 N4
+V1.5_TVDAC +1.5V AH30 M4
+1.5V_AUX +1.5V VCCAUX7 VTT_63
L71 AG30 VCCAUX8 VTT_64 R3
AF30 VCCAUX9 VTT_65 P3
R514 0_8 AE30 N3
VCCAUX10 VTT_66
AD30 VCCAUX11 VTT_67 M3
C286 BK1608LL121_6 AC30 R2
.1U-10V_4 C201 C204 VCCAUX12 VTT_68
AG29 VCCAUX13 VTT_69 P2
AF29 VCCAUX14 VTT_70 M2
.022U-16V_4 .1U-10V_4 AE29 D2
VCCAUX15 VTT_71
AD29 VCCAUX16 VTT_72 AB1
AC29 VCCAUX17 VTT_73 R1
+3V +V1.5_QTVDAC AG28 P1
VCCAUX18 VTT_74
L72 AF28 VCCAUX19 VTT_75 N1
AE28 VCCAUX20 VTT_76 M1
+1.5V AH22 VCCAUX21
30mils AJ21 VCCAUX22
D20 PDZ5.6B BK1608LL121_6 AH21
C226 C215 VCCAUX23
AJ20 VCCAUX24
V1_5SFOLLOW 1 2 AH20
.022U-16V_4 .1U-10V_4 VCCAUX25
AH19 VCCAUX26
P19 VCCAUX27
R463 P16
+V3.3_TVDAC VCCAUX28
AH15 VCCAUX29
10_4 P15 VCCAUX30
AH14 VCCAUX31
A R455 0_8 AG14 A
VCCAUX32
AF14 VCCAUX33
AE14 VCCAUX34
Y14 VCCAUX35
AF13
AE13
VCCAUX36
VCCAUX37
PROJECT : ZB1
+1.05V +1.05V <3,4,6,9,14,17,46> AF12
+1.5V VCCAUX38
AE12
+V1.5_PCIE
+1.5V <4,15,17,29,33,44,45>
+V1.5_PCIE <8> AD12
VCCAUX39
VCCAUX40
Quanta Computer Inc.
+2.5V +2.5V <19,20,25,41,44,45>
+3V Size Document Number Rev
+3V <2,5,8,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,46>
Calistoga GMCH POWER (5 OF 6) C

Date: Friday, February 24, 2006 Sheet 10 of 50


5 4 3 2 1
5 4 3 2 1

U43I U43J
AC41 VSS_0 VSS_97 AK34 AT23 VSS_180 VSS_273 J11
AA41 VSS_1 VSS_98 AG34 AN23 VSS_181 VSS_274 D11
W41 VSS_2 VSS_99 AF34 AM23 VSS_182 VSS_275 B11
T41 VSS_3 VSS_100 AE34 AH23 VSS_183 VSS_276 AV10
P41 VSS_4 VSS_101 AC34 AC23 VSS_184 VSS_277 AP10
M41 VSS_5 VSS_102 C34 W23 VSS_185 VSS_278 AL10
J41 VSS_6 VSS_103 AW33 K23 VSS_186 VSS_279 AJ10
F41 VSS_7 VSS_104 AV33 J23 VSS_187 VSS_280 AG10
AV40 VSS_8 VSS_105 AR33 F23 VSS_188 VSS_281 AC10
D AP40 VSS_9 VSS_106 AE33 C23 VSS_189 VSS_282 W10 D
AN40 VSS_10 VSS_107 AB33 AA22 VSS_190 VSS_283 U10
AK40 VSS_11 VSS_108 Y33 K22 VSS_191 VSS_284 BA9
AJ40 VSS_12 VSS_109 V33 G22 VSS_192 VSS_285 AW9
AH40 VSS_13 VSS_110 T33 F22 VSS_193 VSS_286 AR9
AG40 VSS_14 VSS_111 R33 E22 VSS_194 VSS_287 AH9
AF40 VSS_15 VSS_112 M33 D22 VSS_195 VSS_288 AB9
AE40 VSS_16 VSS_113 H33 A22 VSS_196 VSS_289 Y9
B40 VSS_17 VSS_114 G33 BA21 VSS_197 VSS_290 R9
AY39 VSS_18 VSS_115 F33 AV21 VSS_198 VSS_291 G9
AW39 VSS_19 VSS_116 D33 AR21 VSS_199 VSS_292 E9
AV39 VSS_20 VSS_117 B33 AN21 VSS_200 VSS_293 A9
AR39 VSS_21 VSS_118 AH32 AL21 VSS_201 VSS_294 AG8
AN39 VSS_22 VSS_119 AG32 AB21 VSS_202 VSS_295 AD8
AJ39 VSS_23 VSS_120 AF32 Y21 VSS_203 VSS_296 AA8
AC39 VSS_24 VSS_121 AE32 P21 VSS_204 VSS_297 U8
AB39 VSS_25 VSS_122 AC32 K21 VSS_205 VSS_298 K8
AA39 VSS_26 VSS_123 AB32 J21 VSS_206 VSS_299 C8
Y39 VSS_27 VSS_124 G32 H21 VSS_207 VSS_300 BA7
W39 VSS_28 VSS_125 B32 C21 VSS_208 VSS_301 AV7
V39 VSS_29 VSS_126 AY31 AW20 VSS_209 VSS_302 AP7
T39 AV31 AR20 AL7
R39
P39
VSS_30
VSS_31
VSS_32
VSS_127
VSS_128
VSS_129
AN31
AJ31
AM20
AA20
VSS_210
VSS_211
VSS_212
VSS VSS_303
VSS_304
VSS_305
AJ7
AH7
N39 AG31 K20 AF7
M39
L39
VSS_33
VSS_34
VSS_35
VSS VSS_130
VSS_131
VSS_132
AB31
Y31
B20
A20
VSS_213
VSS_214
VSS_215
VSS_306
VSS_307
VSS_308
AC7
R7
C J39 VSS_36 VSS_133 AB30 AN19 VSS_216 VSS_309 G7 C
H39 VSS_37 VSS_134 E30 AC19 VSS_217 VSS_310 D7
G39 VSS_38 VSS_135 AT29 W19 VSS_218 VSS_311 AG6
F39 VSS_39 VSS_136 AN29 K19 VSS_219 VSS_312 AD6
D39 VSS_40 VSS_137 AB29 G19 VSS_220 VSS_313 AB6
AT38 VSS_41 VSS_138 T29 C19 VSS_221 VSS_314 Y6
AM38 VSS_42 VSS_139 N29 AH18 VSS_222 VSS_315 U6
AH38 VSS_43 VSS_140 K29 P18 VSS_223 VSS_316 N6
AG38 VSS_44 VSS_141 G29 H18 VSS_224 VSS_317 K6
AF38 VSS_45 VSS_142 E29 D18 VSS_225 VSS_318 H6
AE38 VSS_46 VSS_143 C29 A18 VSS_226 VSS_319 B6
C38 VSS_47 VSS_144 B29 AY17 VSS_227 VSS_320 AV5
AK37 VSS_48 VSS_145 A29 AR17 VSS_228 VSS_321 AF5
AH37 VSS_49 VSS_146 BA28 AP17 VSS_229 VSS_322 AD5
AB37 VSS_50 VSS_147 AW28 AM17 VSS_230 VSS_323 AY4
AA37 VSS_51 VSS_148 AU28 AK17 VSS_231 VSS_324 AR4
Y37 VSS_52 VSS_149 AP28 AV16 VSS_232 VSS_325 AP4
W37 VSS_53 VSS_150 AM28 AN16 VSS_233 VSS_326 AL4
V37 VSS_54 VSS_151 AD28 AL16 VSS_234 VSS_327 AJ4
T37 VSS_55 VSS_152 AC28 J16 VSS_235 VSS_328 Y4
R37 VSS_56 VSS_153 W28 F16 VSS_236 VSS_329 U4
P37 VSS_57 VSS_154 J28 C16 VSS_237 VSS_330 R4
N37 VSS_58 VSS_155 E28 AN15 VSS_238 VSS_331 J4
M37 VSS_59 VSS_156 AP27 AM15 VSS_239 VSS_332 F4
L37 VSS_60 VSS_157 AM27 AK15 VSS_240 VSS_333 C4
J37 VSS_61 VSS_158 AK27 N15 VSS_241 VSS_334 AY3
H37 VSS_62 VSS_159 J27 M15 VSS_242 VSS_335 AW3
B G37 VSS_63 VSS_160 G27 L15 VSS_243 VSS_336 AV3 B
F37 VSS_64 VSS_161 F27 B15 VSS_244 VSS_337 AL3
D37 VSS_65 VSS_162 C27 A15 VSS_245 VSS_338 AH3
AY36 VSS_66 VSS_163 B27 BA14 VSS_246 VSS_339 AG3
AW36 VSS_67 VSS_164 AN26 AT14 VSS_247 VSS_340 AF3
AN36 VSS_68 VSS_165 M26 AK14 VSS_248 VSS_341 AD3
AH36 VSS_69 VSS_166 K26 AD14 VSS_249 VSS_342 AC3
AG36 VSS_70 VSS_167 F26 AA14 VSS_250 VSS_343 AA3
AF36 VSS_71 VSS_168 D26 U14 VSS_251 VSS_344 G3
AE36 VSS_72 VSS_169 AK25 K14 VSS_252 VSS_345 AT2
AC36 VSS_73 VSS_170 P25 H14 VSS_253 VSS_346 AR2
C36 VSS_74 VSS_171 K25 E14 VSS_254 VSS_347 AP2
B36 VSS_75 VSS_172 H25 AV13 VSS_255 VSS_348 AK2
BA35 VSS_76 VSS_173 E25 AR13 VSS_256 VSS_349 AJ2
AV35 VSS_77 VSS_174 D25 AN13 VSS_257 VSS_350 AD2
AR35 VSS_78 VSS_175 A25 AM13 VSS_258 VSS_351 AB2
AH35 VSS_79 VSS_176 BA24 AL13 VSS_259 VSS_352 Y2
AB35 VSS_80 VSS_177 AU24 AG13 VSS_260 VSS_353 U2
AA35 VSS_81 VSS_178 AL24 P13 VSS_261 VSS_354 T2
Y35 VSS_82 VSS_179 AW23 F13 VSS_262 VSS_355 N2
W35 VSS_83 D13 VSS_263 VSS_356 J2
V35 VSS_84 B13 VSS_264 VSS_357 H2
T35 VSS_85 AY12 VSS_265 VSS_358 F2
R35 VSS_86 AC12 VSS_266 VSS_359 C2
P35 VSS_87 K12 VSS_267 VSS_360 AL1
N35 VSS_88 H12 VSS_268
M35 VSS_89 E12 VSS_269
A L35 VSS_90 AD11 VSS_270 A
J35 VSS_91 AA11 VSS_271
H35 VSS_92 Y11 VSS_272
G35 VSS_93
F35
D35
VSS_94
VSS_95
Calistoga PROJECT : ZB1
AN34 VSS_96
Quanta Computer Inc.
Calistoga
Size Document Number Rev
GMCH GND(6 OF 6) C

Date: Tuesday, February 07, 2006 Sheet 11 of 50


5 4 3 2 1
1 2 3 4 5 6 7 8

DDRII DUAL CHANNEL A,B.


A A

DDRII A CHANNEL DDRII B CHANNEL


M_A_A[13..0]
M_A_A[13..0] <7,13>
SMDDR_VTERM
SMDDR_VTERM <44,45>
SMDDR_VTERM
SMDDR_VTERM

SMDDR_VTERM

C407 C406 C405 C379 C376 C374 C378 C375 C436 C442 C424 C410 C380
C404 C423 C420 C437 C441 C421 C440 C422 C439 C425 C438 C409 C408 .1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4
.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4

Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM

B B

M_B_A0 RP99 1 2 56_4P2R_S


<8,13> M_ODT0 M_ODT0 RP83 1 2 56_4P2R_S M_B_BS#1 3 4
<7,13> M_B_BS#1
M_A_A13 3 4 M_B_A3 RP88 1 2 56_4P2R_S
M_A_A7 RP75 1 2 56_4P2R_S M_B_A1 3 4
M_A_A5 3 4 M_B_A12 RP87 1 2 56_4P2R_S
M_A_A3 RP71 1 2 56_4P2R_S M_B_A5 3 4 SMDDR_VTERM
M_A_A1 3 4 SMDDR_VTERM
M_B_A2 RP98 1 2 56_4P2R_S
M_A_A11 RP78 1 2 56_4P2R_S M_B_A4 3 4
M_CKE1 3 4 M_B_A8 RP86 1 2 56_4P2R_S
<8,13> M_CKE1
M_A_A10 RP72 1 2 56_4P2R_S M_B_A9 3 4
M_A_BS#0 3 4 M_B_A6 RP97 1 2 56_4P2R_S
<7,13> M_A_BS#0
M_A_A8 RP79 1 2 56_4P2R_S M_B_A11 3 4
M_A_A6 3 4 M_CKE2 RP85 1 2 56_4P2R_S
<8,13> M_CKE2
M_A_A2 RP80 1 2 56_4P2R_S <7,13> M_B_BS#2 M_B_BS#2 3 4 SMDDR_VTERM
M_A_A4 3 4 SMDDR_VTERM
M_CS#3 RP100 1 2 56_4P2R_S
<8,13> M_CS#3
M_A_A0 RP81 1 2 56_4P2R_S <7,13> M_B_RAS# M_B_RAS# 3 4
M_A_BS#1 3 4 <7,13> M_B_WE# M_B_WE# RP91 1 2 56_4P2R_S
<7,13> M_A_BS#1
M_A_A12 RP70 1 2 56_4P2R_S <7,13> M_B_CAS# M_B_CAS# 3 4
M_A_A9 3 4 M_B_A10 RP89 1 2 56_4P2R_S
M_A_CAS# RP73 1 2 56_4P2R_S M_B_BS#0 3 4 SMDDR_VTERM
<7,13> M_A_CAS# <7,13> M_B_BS#0
C M_CS#1 3 4 SMDDR_VTERM C
<8,13> M_CS#1

<7,13> M_A_RAS# M_A_RAS# RP82 1 2 56_4P2R_S


M_CS#0 3 4
<8,13> M_CS#0
<8,13> M_ODT2 M_ODT2 RP101 1 2 56_4P2R_S
M_B_A[13..0] M_B_A13 3 4
M_B_A[13..0] <7,13>
+1.8VSUS <8,13> M_ODT3 M_ODT3 RP90 1 2 56_4P2R_S
+1.8VSUS <8,9,13,20,44,45>
+3V M_CS#2 3 4
+3V <2,5,8,10,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,46> <8,13> M_CS#2
M_A_WE# RP74 1 2 56_4P2R_S
<7,13> M_A_WE#
M_ODT1 3 4
<8,13> M_ODT1
M_B_A7 RP96 1 2 56_4P2R_S
M_CKE3 3 4
<8,13> M_CKE3
M_A_BS#2 RP76 1 2 56_4P2R_S
<7,13> M_A_BS#2
M_CKE0 3 4 SMDDR_VTERM
<8,13> M_CKE0

D D

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
DDR RES. ARRAY C

Date: Friday, February 24, 2006 Sheet 12 of 50


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3V SMDDR_VREF_DIMM
+3V <2,5,8,10,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,46> M_A_DM[0..7] <7> M_B_DM[0..7] <7>
+1.8VSUS SMDDR_VREF_DIMM +1.8VSUS
+1.8VSUS <8,9,20,44,45> M_A_DQ[0..63] <7> M_B_DQ[0..63] <7>
SMDDR_VREF_DIMM Place these Caps near So-Dimm1.
M_A_DQS[0..7] <7> M_B_DQS[0..7] <7>
+1.8VSUS +1.8VSUS +1.8VSUS +1.8VSUS
M_A_DQS#[0..7] <7> M_B_DQS#[0..7] <7>
CN37
M_A_A[0..13] <7,12> M_B_A[0..13] <7,12>
CN36 1 2
VREF VSS46 M_B_DQ4
1 VREF VSS46 2 3 VSS47 DQ4 4
3 4 M_A_DQ4 M_B_DQ0 5 6 M_B_DQ1 C359 C358 C855
M_A_DQ1 VSS47 DQ4 M_A_DQ0 M_B_DQ5 DQ0 DQ5 2.2U-6.3V_62.2U-6.3V_62.2U-6.3V_6
5 DQ0 DQ5 6 7 DQ1 VSS15 8
M_A_DQ5 7 8 9 10 M_B_DM0
DQ1 VSS15 M_A_DM0 M_B_DQS#0 VSS37 DM0
9 VSS37 DM0 10 11 DQS#0 VSS5 12
M_A_DQS#0 11 12 M_B_DQS0 13 14 M_B_DQ2
M_A_DQS0 DQS#0 VSS5 M_A_DQ7 DQS0 DQ6 M_B_DQ6 +1.8VSUSPlace
13 DQS0 DQ6 14 15 VSS48 DQ7 16 these Caps near So-Dimm1.
A 15 16 M_A_DQ6 M_B_DQ7 17 18 A
M_A_DQ2 VSS48 DQ7 M_B_DQ3 DQ2 VSS16 M_B_DQ12
17 DQ2 VSS16 18 19 DQ3 DQ12 20
M_A_DQ3 19 20 M_A_DQ13 21 22 M_B_DQ13
DQ3 DQ12 M_A_DQ14 M_B_DQ9 VSS38 DQ13
21 VSS38 DQ13 22 23 DQ8 VSS17 24
M_A_DQ12 23 24 M_B_DQ8 25 26 M_B_DM1 C362 C849 C851 C363
M_A_DQ8 DQ8 VSS17 M_A_DM1 DQ9 DM1 .1U-10V_4 .1U-10V_4 .1U-10V_4 .1U-10V_4
25 DQ9 DM1 26 27 VSS49 VSS53 28
27 28 M_B_DQS#1 29 30 M_CLK_DDR3
VSS49 VSS53 DQS#1 CK0 M_CLK_DDR3 <8>
M_A_DQS#1 29 30 M_CLK_DDR0 M_B_DQS1 31 32 M_CLK_DDR#3
DQS#1 CK0 M_CLK_DDR0 <8> DQS1 CK0# M_CLK_DDR#3 <8>
M_A_DQS1 31 32 M_CLK_DDR#0 33 34
DQS1 CK0# M_CLK_DDR#0 <8> VSS39 VSS41
33 34 M_B_DQ11 35 36 M_B_DQ14
M_A_DQ9 VSS39 VSS41 M_A_DQ10 M_B_DQ10 DQ10 DQ14 M_B_DQ15
35 DQ10 DQ14 36 37 DQ11 DQ15 38
M_A_DQ15 37 38 M_A_DQ11 39 40 SMDDR_VREF_DIMM +3V
DQ11 DQ15 VSS50 VSS54
39 VSS50 VSS54 40
41 VSS18 VSS20 42
41 42 M_B_DQ20 43 44 M_B_DQ16
M_A_DQ21 VSS18 VSS20 M_A_DQ20 M_B_DQ17 DQ16 DQ20 M_B_DQ21
43 DQ16 DQ20 44 45 DQ17 DQ21 46
M_A_DQ17 45 46 M_A_DQ16 47 48 C411 C381 C373 C389
DQ17 DQ21 M_B_DQS#2 VSS1 VSS6 PM_EXTTS#1 .1U-10V_4 2.2U-6.3V_6 2.2U-6.3V_6 .1U-10V_4
47 VSS1 VSS6 48 49 DQS#2 NC3 50 PM_EXTTS#1 <8>
M_A_DQS#2
M_A_DQS2
49
51
DQS#2 SDRAM SO-DIMM
NC3 50
52
PM_EXTTS#0
M_A_DM2
PM_EXTTS#0 <8> M_B_DQS2 51
53
DQS2 DM2 52
54
M_B_DM2
DQS2 DM2 M_B_DQ19 VSS19 VSS21 M_B_DQ18
53 VSS19 VSS21 54 55 DQ18 DQ22 56

SDRAM SO-DIMM
M_A_DQ23 55 56 M_A_DQ18 M_B_DQ23 57 58 M_B_DQ22
PC4800 DDR2

M_A_DQ19 DQ18 DQ22 M_A_DQ22 DQ19 DQ23


57 58 59 60
59
DQ19
VSS22
DQ23
VSS24 60 M_B_DQ29 61
VSS22
DQ24
VSS24
DQ28 62 M_B_DQ24 Place these Caps near So-Dimm1.
M_A_DQ24 61 62 M_A_DQ29 M_B_DQ28 63 64 M_B_DQ25

PC4800 DDR2
M_A_DQ25 63
DQ24
DQ25
DQ28
DQ29 64 M_A_DQ28 65
DQ25
VSS23
DQ29
VSS25 66 No Vias Between the Trace of PIN to
M_A_DM3
65 VSS23 VSS25 66
M_A_DQS#3
M_B_DM3 67 DM3 DQS#3 68 M_B_DQS#3
M_B_DQS3
CAP.
67 DM3 DQS#3 68 69 NC4 DQS3 70
69 70 M_A_DQS3 71 72
B NC4 DQS3 VSS9 VSS10 B
(200P)

71 72 M_B_DQ31 73 74 M_B_DQ26
M_A_DQ26 VSS9 VSS10 M_A_DQ30 M_B_DQ30 DQ26 DQ30 M_B_DQ27
73 DQ26 DQ30 74 75 DQ27 DQ31 76
M_A_DQ27 75 76 M_A_DQ31 77 78 +1.8VSUS
DQ27 DQ31 VSS4 VSS8

(200P)
77 78 M_CKE2 79 80 M_CKE3 Place these Caps near So-Dimm2.
VSS4 VSS8 <8,12> M_CKE2 CKE0 CKE1 M_CKE3 <8,12>
M_CKE0 79 80 M_CKE1 81 82
<8,12> M_CKE0 CKE0 CKE1 M_CKE1 <8,12> VDD7 VDD8
81 VDD7 VDD8 82 83 NC1 A15 84
83 84 M_B_BS#2 85 86
NC1 A15 <7,12> M_B_BS#2 A16_BA2 A14
M_A_BS#2 85 86 87 88
<7,12> M_A_BS#2 A16_BA2 A14 VDD9 VDD11
87 88 M_B_A12 89 90 M_B_A11 C360 C852 C850
M_A_A12 VDD9 VDD11 M_A_A11 M_B_A9 A12 A11 M_B_A7 2.2U-6.3V_62.2U-6.3V_62.2U-6.3V_6
89 A12 A11 90 91 A9 A7 92
M_A_A9 91 92 M_A_A7 M_B_A8 93 94 M_B_A6
M_A_A8 A9 A7 M_A_A6 A8 A6
93 A8 A6 94 95 VDD5 VDD4 96
95 96 M_B_A5 97 98 M_B_A4
M_A_A5 VDD5 VDD4 M_A_A4 M_B_A3 A5 A4 M_B_A2
97 A5 A4 98 99 A3 A2 100
M_A_A3 99 100 M_A_A2 M_B_A1 101 102 M_B_A0 +1.8VSUSPlace these Caps near So-Dimm1.
M_A_A1 A3 A2 M_A_A0 A1 A0
101 A1 A0 102 103 VDD10 VDD12 104
103 104 M_B_A10 105 106 M_B_BS#1
VDD10 VDD12 A10/AP BA1 M_B_BS#1 <7,12>
M_A_A10 105 106 M_A_BS#1 <7,12> M_B_BS#0 M_B_BS#0 107 108 M_B_RAS#
A10/AP BA1 M_A_BS#1 <7,12> BA0 RAS# M_B_RAS# <7,12>
<7,12> M_A_BS#0 107 108 M_A_RAS# M_B_WE# 109 110 M_CS#2
BA0 RAS# M_A_RAS# <7,12> <7,12> M_B_WE# WE# S0# M_CS#2 <8,12>
M_A_WE# 109 110 M_CS#0 111 112 C364 C853 C848 C319
<7,12> M_A_WE# WE# S0# M_CS#0 <8,12> VDD2 VDD1
111 112 M_B_CAS# 113 114 M_ODT2 .1U-10V_4 .1U-10V_4 .1U-10V_4 .1U-10V_4
VDD2 VDD1 <7,12> M_B_CAS# CAS# ODT0 M_ODT2 <8,12>
M_A_CAS# 113 114 M_ODT0 M_CS#3 115 116 M_B_A13
<7,12> M_A_CAS# CAS# ODT0 M_ODT0 <8,12> <8,12> M_CS#3 S1# A13
M_CS#1 115 116 M_A_A13 117 118
<8,12> M_CS#1 S1# A13 VDD3 VDD6
117 118 M_ODT3 119 120
VDD3 VDD6 <8,12> M_ODT3 ODT1 NC2
M_ODT1 119 120 121 122
<8,12> M_ODT1 ODT1 NC2 VSS11 VSS12
121 122 M_B_DQ37 123 124 M_B_DQ32
M_A_DQ35 VSS11 VSS12 M_A_DQ32 M_B_DQ33 DQ32 DQ36 M_B_DQ36 SMDDR_VREF_DIMM +3V
123 DQ32 DQ36 124 125 DQ33 DQ37 126
M_A_DQ37 125 126 M_A_DQ36 127 128
DQ33 DQ37 M_B_DQS#4 VSS26 VSS28 M_B_DM4
C 127 VSS26 VSS28 128 129 DQS#4 DM4 130 C
M_A_DQS#4 129 130 M_A_DM4 M_B_DQS4 131 132
M_A_DQS4 DQS#4 DM4 DQS4 VSS42 M_B_DQ34
131 DQS4 VSS42 132 133 VSS2 DQ38 134
133 134 M_A_DQ33 M_B_DQ39 135 136 M_B_DQ38 C430 C418 C419 C427
M_A_DQ38 VSS2 DQ38 M_A_DQ34 M_B_DQ35 DQ34 DQ39 .1U-10V_4 2.2U-6.3V_6 2.2U-6.3V_6 .1U-10V_4
135 DQ34 DQ39 136 137 DQ35 VSS55 138
M_A_DQ39 137 138 139 140 M_B_DQ44
DQ35 VSS55 M_A_DQ44 M_B_DQ41 VSS27 DQ44 M_B_DQ45
139 VSS27 DQ44 140 141 DQ40 DQ45 142
M_A_DQ40 141 142 M_A_DQ45 M_B_DQ40 143 144
M_A_DQ41 DQ40 DQ45 DQ41 VSS43 M_B_DQS#5
143 DQ41 VSS43 144 145 VSS29 DQS#5 146
145 146 M_A_DQS#5 M_B_DM5 147 148 M_B_DQS5
M_A_DM5 147
VSS29
DM5
DQS#5
DQS5 148 M_A_DQS5 149
DM5
VSS51
DQS5
VSS56 150 Place these Caps near So-Dimm2.
149 150 M_B_DQ46 151 152 M_B_DQ47
M_A_DQ42 151
VSS51
DQ42
VSS56
DQ46 152 M_A_DQ43 M_B_DQ43 153
DQ42
DQ43
DQ46
DQ47 154 M_B_DQ42 No Vias Between the Trace of PIN to
M_A_DQ46 153 DQ43 DQ47 154 M_A_DQ47
M_B_DQ53
155 VSS40 VSS44 156
M_B_DQ52
CAP.
155 VSS40 VSS44 156 157 DQ48 DQ52 158
M_A_DQ48 157 158 M_A_DQ52 M_B_DQ49 159 160 M_B_DQ48
M_A_DQ49 DQ48 DQ52 M_A_DQ53 DQ49 DQ53
159 DQ49 DQ53 160 161 VSS52 VSS57 162
161 162 163 164 M_CLK_DDR2
VSS52 VSS57 NCTEST CK1 M_CLK_DDR2 <8>
163 164 M_CLK_DDR1 165 166 M_CLK_DDR#2
NCTEST CK1 M_CLK_DDR1 <8> VSS30 CK1# M_CLK_DDR#2 <8>
165 166 M_CLK_DDR#1 M_B_DQS#6 167 168
VSS30 CK1# M_CLK_DDR#1 <8> DQS#6 VSS45
M_A_DQS#6 167 168 M_B_DQS6 169 170 M_B_DM6
M_A_DQS6 DQS#6 VSS45 M_A_DM6 DQS6 DM6
169 DQS6 DM6 170 171 VSS31 VSS32 172
171 172 M_B_DQ51 173 174 M_B_DQ55
M_A_DQ50 VSS31 VSS32 M_A_DQ54 M_B_DQ54 DQ50 DQ54 M_B_DQ50
173 DQ50 DQ54 174 175 DQ51 DQ55 176
M_A_DQ51 175 176 M_A_DQ55 177 178 SMDDR_VREF_DIMM R293 0_4
DQ51 DQ55 VSS33 VSS35 SMDDR_VREF <8,45>
177 178 M_B_DQ60 179 180 M_B_DQ56
VSS33 VSS35 DQ56 DQ60 R322
M_A_DQ56 179 180 M_A_DQ61 M_B_DQ57 181 182 M_B_DQ61
M_A_DQ60 DQ56 DQ60 M_A_DQ57 DQ57 DQ61 R321 *10K/F_4
181 DQ57 DQ61 182 183 VSS3 VSS7 184 +1.8VSUS
183 184 M_B_DM7 185 186 M_B_DQS#7 *10K/F_4
D
M_A_DM7 VSS3 VSS7 M_A_DQS#7 DM7 DQS#7 M_B_DQS7 D
185 DM7 DQS#7 186 187 VSS34 DQS7 188
187 188 M_A_DQS7 M_B_DQ58 189 190
M_A_DQ62 VSS34 DQS7 M_B_DQ59 DQ58 VSS36 M_B_DQ62
189 DQ58 VSS36 190 191 DQ59 DQ62 192
M_A_DQ58 191 192 M_A_DQ59 193 194 M_B_DQ63
DQ59 DQ62 M_A_DQ63 CGDAT_SMB VSS14 DQ63
193 194 195 196
CGDAT_SMB 195
VSS14
SDA
DQ63
VSS13 196
<2> CGDAT_SMB
<2> CGCLK_SMB
CGCLK_SMB 197
SDA
SCL
VSS13
SA0 198 R320 10K_4 PROJECT : ZB1
CGCLK_SMB 197 198 R305 10K_4 +3V 199 200 R319 10K_4
SCL SA0 R306 10K_4 VDD(SPD) SA1
199 200
+3V VDD(SPD) SA1 2-1734073-2 +3V Quanta Computer Inc.
DDR2_SODIMM
CLOCK 0,1 SMbus address A0
CLOCK 3,4 SMbus address A4 Size Document Number Rev
CKE 0,1 H 5.2 CKE 2,3 H 9.2 DDR SO-DIMM(200P) C
Date: Friday, February 24, 2006 Sheet 13 of 50
1 2 3 4 5 6 7 8
5 4 3 2 1

CKL:C1/C2: 18pF -> CL:12.5pF


RTC VCCRTC
C1/C: 10pF -> CL Value =
D11 C415 8.5pF
VCCRTC
+3VPCU
CH500H-40
1U-16V_6

D12 R308 C843 CLK_32KX1


VCCRTC_3 18P-50V_4 +3V +3V
20K_6

1
CH500H-40
R310 R301 C414 Y9 R571
1K_4 32.768KHZ 10M_6
D D
R261 R275
1U-16V_6 U49A 10K_4 10K_4

2
1M/F_6 AB1 AA6
RTXC1 LAD0 LAD0 <38,39>
C831 CLK_32KX2 AB2 AB5 RCIN#
RTCX2 LAD1 LAD1 <38,39>
CN35 18P-50V_4 AC4 GATEA20
LAD2 LAD2 <38,39>

LPC
RTC
RTCRST# AA3 Y6
1 RTCRST# LAD3 LAD3 <38,39> +1.05V
2 SM_INTRUDER# LDRQ#0
Y5 INTRUDER# LDRQ0# AC3 LDRQ#0 <38>
FI_S2P_HF_JAE_RTC BAT ICH_INTVRMEN W4 AA5 LDRQ#1
Internal PU INTVRMEN LDRQ1#/GPIO23 T60
W1 EE_CS LFRAME# AB3 LFRAME# <38,39>
Y1 EE_SHCLK
Y2 AE22 GATEA20 R244 R245 +1.05V
EE_DOUT A20GATE GATEA20 <39>
+5VPCU *56.2/F_4 *56.2/F_4
20MIL 20MIL W3 EE_DIN A20M# AH28 H_A20M# <3>
Q36 V3 AG27 TP_H_CPUSLP# R256 *0_4
LAN_CLK CPUSLP# H_CPUSLP# <3,6>
R519 VCCRTC_1 R529 VCCRTC_2 3 1
1.2K_6 1K_4 U3 AF24 H_DPRSTP#_R R248 0_4 R263
LAN_RSTSYNC TP1/DPRSTP# ICH_DPRSTP# <3>

LAN
CPU
MMBT3904 AH25 H_DPSLP#_R R247 0_4 56.2/F_4
TP2/DPSLP# H_DPSLP# <3>
R518 U5 LAN_RXD0
2

V4 LAN_RXD1 FERR# AG26 H_FERR# <3>


4.7K_4 T5 LAN_RXD2 R259 0_4
GPIO49/CPUPWRGD AG24 H_PWRGD <3>
U7 LAN_TXD0
V6 LAN_TXD1
V7 LAN_TXD2 IGNNE# AG22 H_IGNNE# <3>
R522 AG21
INIT3_3V# T118
ACZ_BCLK U1 AF22
ACZ_BIT_CLK INIT# H_INIT# <3>
15K_4 ACZ_SYNC R6 AF25

AC-97/AZALIA
ACZ_SYNC INTR H_INTR <3> +1.05V
C C
ACZ_RST# R5 AG23 RCIN#
Internal PU ACZ_RST# RCIN# RCIN# <39>
ACZ_SDIN0 T2 AH24
<36> ACZ_SDIN0 ACZ_SDIN0 NMI H_NMI <3>
ACZ_SDIN1 T3 AF23 H_SMI#_R R262 0_4 R246
<36> ACZ_SDIN1 ACZ_SDIN1 SMI# H_SMI# <3>
ACZ_SDIN2 T1 56.2/F_4
T127 ACZ_SDIN2
STPCLK# AH22 H_STPCLK# <3>
ACZ_SDOUT T4 ACZ_SDOUT H_THERMTRIP_R R249 24.9/F_4
THERMTRIP# AF26 PM_THRMTRIP# <3,8>
SATA_LED# AF18 Should be 2" close ICH7
<40> SATA_LED# SATALED#
PDD[15:0] <35>
C834 SH@.01U-16V_4 SATA_RXN0_C AF3 AB15 PDD0
<34> SATA_RXN0 SATA0RXN DD0
CKL:1n ~ 20nF C833 SH@.01U-16V_4 SATA_RXP0_C AE3 AE14 PDD1
<34> SATA_RXP0 SATA0RXP DD1
C835 SH@.01U-16V_4 SATA_TXN0_C AG2 AG13 PDD2
<34> SATA_TXN0 SATA0TXN DD2
C836 SH@.01U-16V_4 SATA_TXP0_C AH2 AF13 PDD3
<34> SATA_TXP0 SATA0TXP DD3
AD14 PDD4
C823 HS@.01U-16V_4 SATA_RXN2_C DD4 PDD5
<35> SATA_RXN2 AF7 SATA2RXN DD5 AC13
C824 HS@.01U-16V_4 SATA_RXP2_C AE7 AD12 PDD6
<35> SATA_RXP2 SATA2RXP DD6
C826 HS@.01U-16V_4 SATA_TXN2_C AG6 AC12 PDD7
<35> SATA_TXN2 SATA2TXN DD7
C825 HS@.01U-16V_4 SATA_TXP2_C AH6 AE12 PDD8 ACZ_SDOUT R311 39_4
<35> SATA_TXP2 SATA2TXP DD8 ACZ_SDOUT_AUDIO <36>
AF12 PDD9
DD9 PDD10
<2> CLK_PCIE_SATA# AF1 SATA_CLKN DD10 AB13

SATA
AE1 AC14 PDD11 C832
<2> CLK_PCIE_SATA SATA_CLKP DD11
AF14 PDD12 *10P-50V_4
DD12 PDD13
AH10 SATARBIASN DD13 AH13
R294 24.9/F_4 SATA_BIAS AG10 AH14 PDD14
Place within 500 SATARBIASP DD14 PDD15
25mils/15mils DD15 AC15
+3V mils of ICH7 PDA[2:0] <35>
PDA0
<35> PDIOR# AF15
AH15
DIOR# IDE DA0 AH17
AE17 PDA1
B <35> PDIOW# DIOW# DA1 B
AF16 AF17 PDA2
<35> PDDACK# DDACK# DA2
IRQ14 AH16 ACZ_SYNC R317 39_4
<35> IRQ14 IDEIRQ ACZ_SYNC_AUDIO <36>
PIORDY AG16 AE16
<35> PIORDY IORDY DCS1# PDCS1# <35>
R289 R288 AE15 AD16
<35> PDDREQ DDREQ DCS3# PDCS3# <35>
8.2K_4 4.7K_4 C841
ICH7-M *10P-50V_4

PIORDY
IRQ14

ACZ_BCLK R314 39_4


BIT_CLK_AUDIO <36>

C837
*10P-50V_4
VCCRTC
ICH7 internal VR
enable strap
R309
INTVRMEN 330K_6

Enable ICH_INTVRMEN ACZ_RST# R316 39_4


ACZ_RST#_AUDIO <36>
(default) 1

A Disable 0 R300 A
*0_4

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
ICH7-M HOST (1 OF 4) C

Date: Wednesday, March 01, 2006 Sheet 14 of 50


5 4 3 2 1
5 4 3 2 1

U49D
F26 V26 +3V
<33> PCIE_RXN0 PERn1 DMI0RXN DMI_RXN0 <8>
New card F25 V25

Direct Media Interface


<33> PCIE_RXP0 PERp1 DMI0RXP DMI_RXP0 <8> RP126
C798 .1U-10V_4PCIE_TXN0_C E28 U28
<33> PCIE_TXN0 PETn1 DMI0TXN DMI_TXN0 <8>
C811 .1U-10V_4 PCIE_TXP0_C E27 U27 REQ2# 6 5
<33> PCIE_TXP0 PETp1 DMI0TXP DMI_TXP0 <8>
REQ1# 7 4 TRDY#
H26 Y26 FRAME# 8 3 REQ4#
<29> PCIE_RXN4 PERn2 DMI1RXN DMI_RXN1 <8>
STOP# DEVSEL#
MINI <29> PCIE_RXP4
C806 .1U-10V_4PCIE_TXN4_C
H25
G28
PERp2 DMI1RXP Y25
W28
DMI_RXP1 <8> 9
10
2
1 REQ3#
<29> PCIE_TXN4 DMI_TXN1 <8> +3V
CARD <29> PCIE_TXP4
C807 .1U-10V_4 PCIE_TXP4_C G27
PETn2
PETp2
DMI1TXN
DMI1TXP W27 DMI_TXP1 <8>
RP130 8.2K_10P8R

PCI-Express
EZ@0_4P2R_S 3 4 K26 AB26
<42> PCIE_RXN1 PERn3 DMI2RXN DMI_RXN2 <8>
EZ@.1U-10V_4 1
D EZ4 <42> PCIE_RXP1
C801
2 K25
J28
PERp3 DMI2RXP AB25
AA28
DMI_RXP2 <8>
+3V D
<42> PCIE_TXN1 PETn3 DMI2TXN DMI_TXN2 <8>
<42> PCIE_TXP1 J27 PETp3 DMI2TXP AA27 DMI_TXP2 <8> RP68
C800
EZ@.1U-10V_4 M26 AD25 INTE# 6 5
<42> PCIE_RXN2 PERn4 DMI3RXN DMI_RXN3 <8>
EZ@.1U-10V_4 +1.5V LOCK# LOCK#
EZ4 <42> PCIE_RXP2
C802
M25
L28
PERp4 DMI3RXP AD24
AC28
DMI_RXP3 <8>
SERR#
7
8
4
3 INTH#
<42> PCIE_TXN2 PETn4 DMI3TXN DMI_TXN3 <8>
L27 AC27 PERR# 9 2
<42> PCIE_TXP2 PETp4 DMI3TXP DMI_TXP3 <8>
C803 RP132 +3V 10 1 INTG#
+3V EZ@.1U-10V_4 3 4 P26 AE28
<27> PCIE_RXN5 PERn5 DMI_CLKN CLK_PCIE_ICH# <2>
1 2 P25 AE27 R265 8.2K_10P8R
<27> PCIE_RXP5 PERp5 DMI_CLKP CLK_PCIE_ICH <2>
C799 NZ_PCIEGL@.1U-10V_4 N28 24.9/F_4
<27> PCIE_TXN5 PETn5
C812 NZ_PCIEGL@.1U-10V_4 NZ_PCIEGL@0_4P2R_S N27 C25 15/15mils
<27> PCIE_TXP5 PETp5 DMI_ZCOMP
D25 DRI_IRCOMP_R Place within 500 +3V
DMI_IRCOMP
T25 PERn6
mils of ICH7 RP77
R313 R312 R318 T24 F1
PERp6 USBP0N USBP0- <29>
10K_4 10K_4 10K_4 R28 F2 INTF# 6 5
PETn6 USBP0P USBP0+ <29> REQ5#
R27 G4 7 4 INTA#
PETp6 USBP1N USBP1- <29> INTB#
G3 REQ0# 8 3
USBP1P USBP1+ <29>
PAD T123 SPI_SCLK R2 H1 IRDY# 9 2 INTC#
SPI_CLK USBP2N USBP2- <29>
SPI_CE# P6 H2 +3V 10 1 INTD#
SPI_CS# USBP2P USBP2+ <29>
PAD T124 SPI_ARB P1 J4

SPI
SPI_ARB USBP3N USBP3- <29>
J3 8.2K_10P8R
USBP3P USBP3+ <29>
SPI_SI P5 K1
SPI_MOSI USBP4N USBP4- <29>
SPI_SO P2 K2 Docking

USB
SPI_MISO USBP4P USBP4+ <29>
L4 +3V_S5
USBP5N USBP5- <33>
USBOC#0 D3 L5 Bluetooth Module
OC0# USBP5P USBP5+ <33> RP84
USBOC#1 C4 M1
OC1# USBP6N USBP6- <29>
USBOC#2 D5 M2 Mini PCI-E USBOC#5 6 5
OC2# USBP6P USBP6+ <29>
USBOC#3 D4 N4 USBOC#7 7 4 USBOC#4
OC3# USBP7N USBP7- <29>
C USBOC#4 E5 N3 NEW CARD USBOC#6 8 3 USBOC#2 C
OC4# USBP7P USBP7+ <29>
USBOC#5 C3 USBOC#1 9 2 USBOC#3
USBOC#6 OC5#/GPIO29 USBOC#0
A2 OC6#/GPIO30 USBRBIAS# D2 +3V_S5 10 1
USBOC#7 B3 D1 USB_RBIAS_PN
OC7#/GPIO31 USBRBIAS 8.2K_10P8R
25mils/15mils
ICH7-M
CKL use 10Kohm
Place within 500 R307
mils of ICH7 22.6/F_6
GLAN

ICH7 Boot BIOS select

U49B STRAP GNT5# GNT4#


<27,29,30> AD[0..31]
AD0 E18 D7 REQ0#
AD1 AD0 REQ0# GNT0#
REQ0# <30> R1 R2
AD2
C18
A16
AD1 PCI GNT0# E7
C16 REQ1#
GNT0# <30>
AD2 REQ1# REQ1# <27>
AD3 F18 D16 GNT1# LPC
AD3 GNT1# GNT1# <27>
AD4 E16 C17 REQ2# 11 UNSTUFF UNSTUFF
AD5 A18
AD4 REQ2#
D17
REQ2# <29> (default)
AD5 GNT2# REQ3# GNT2# <29>
AD6 E17 E13
AD7 AD6 REQ3#
A17 AD7 GNT3# F13
AD8 A15 A13 REQ4# PCI 10 UNSTUFF STUFF
AD9 AD8 REQ4#/GPIO22
B
C14 AD9 GNT4#/GPIO48 A14 B
AD10 E14 C8 REQ5#
AD11 AD10 GPIO1/REQ5#
D14 AD11 GPIO17/GNT5# D8
AD12 B12 SPI 01 STUFF UNSTUFF
AD13 AD12
C13 AD13 C/BE0# B15 CBE0# <27,29,30>
AD14 G15 C12
AD14 C/BE1# CBE1# <27,29,30>
AD15 G13 D12
AD15 C/BE2# CBE2# <27,29,30>
AD16 E12 C15
AD16 C/BE3# CBE3# <27,29,30>
AD17 C11
AD18 AD17 IRDY#
D11 AD18 IRDY# A7 IRDY# <27,29,30>
AD19 A11 E10
AD19 PAR PAR <27,29,30>
AD20 A10 B18
AD20 PCIRST# PCIRST# <27,29,30,38>
AD21 F11 A12 DEVSEL#
AD21 DEVSEL# DEVSEL# <27,29,30>
AD22 F10 C9 PERR#
AD22 PERR# PERR# <27,29,30>
AD23 E9 E11 LOCK#
AD24 AD23 PLOCK# SERR#
D9 AD24 SERR# B10 SERR# <27,29,30>
AD25 B9 F15 STOP#
AD25 STOP# STOP# <27,29,30>
AD26 A8 F14 TRDY#
AD26 TRDY# TRDY# <27,29,30>
AD27 A6 F16 FRAME#
AD27 FRAME# FRAME# <27,29,30>
AD28 C7
AD29 AD28 PLT_RST-R#
B6 AD29 PLTRST# C26 PLT_RST-R# <8>
AD30 E6 A9 PCLK_ICH PCI DEVICE IDSEL# REQ# / GNT# Interrupts
AD30 PCICLK PCLK_ICH <2>
AD31 D6 B19 R752 *0_4
AD31 PME# PCI_PME# <27,29,30,38>
PCI7411 AD25 REQ0# / GNT0# INT E/F/G#
INTA# A3
Interrupt I/F G8 INTE# +3V
PIRQA# GPIO2/PIRQE# INTE# <30>
INTB# B4 F7 INTF#
<27> INTB# PIRQB# GPIO3/PIRQF# INTF# <30>
INTC# C5 F8 INTG# Relteck Lan AD16 REQ1# / GNT1# INT B#
<29> INTC# PIRQC# GPIO4/PIRQG# INTG# <30>
INTD# B5 G7 INTH#
<29> INTD# PIRQD# GPIO5/PIRQH# T54 PAD
C386 MINI PCI AD19 REQ2# / GNT2# INT C/D#
A
PAD T59 TP_ICH_RSVD1 AE5
MISC AE9 TP_ICH_RSVD6 T56 PAD .1U-10V_4
A

PAD T58 TP_ICH_RSVD2 RSVD[1] RSVD[6]


AD5 RSVD[2] RSVD[7] AG8 TP_ICH_RSVD7 T57 PAD U46
5

PAD T121 TP_ICH_RSVD3 AG4 AH8 TP_ICH_RSVD8 T120 PAD


PAD T122 TP_ICH_RSVD4 RSVD[3] RSVD[8] RSVD9 PLT_RST-R#
AH4 RSVD[4] RSVD[9] F21 2
PAD T55 TP_ICH_RSVD5 AD9 AH20 4
RSVD[5] MCH_SYNC# MCH_ICH_SYNC <8>
1
PLTRST# <16,18,27,29,31,33,34,35,36,39,41,42> PROJECT : ZB1
ICH7-M
TC7SH08FU
R276 Quanta Computer Inc.
3

*1K/F_4
Size Document Number Rev
Don't connect to PCI device / Express card ICH7-M PCI E (2 OF 4) C

Date: Friday, February 24, 2006 Sheet 15 of 50


5 4 3 2 1
5 4 3 2 1

+3V_S5 +3V_S5
+3V_S5 +3V

PCLK_SMB R538 2.2K_4 RI# R532 10K_4 CLKRUN# R287 8.2K_4


PDAT_SMB R541 2.2K_4 SMB_LINK_ALERT# R533 10K_4 DNBSWON# R271 10K_4
PCIE_WAKE# R278 1K_4 SMLINK0 R534 10K_4 SYS_RST# R543 10K_4 SERIRQ R273 8.2K_4
EXTSMI#_R R759 10K_4 SMLINK1 R535 10K_4
PM_BATLOW#_R R269 10K_4 RUNTIME_SCI#_R R286 10K_4
WAKE_SCI#_R R280 10K_4
SMB_ALERT# R537 10K_4 RBAYID1 R296 10K_4
D D
RBAYID0 R549 10K_4
+3V to Clock Gen & DIMM

RSMRST# R297 10K_4


U49C
R550 PCLK_SMB C22 AF19
<2,27,29,33,42> PCLK_SMB SMBCLK GPIO21/SATA0GP T51 <2,43> VR_PWRGD_CK410#
*1K/F_4 PDAT_SMB B22 AH18

SMB
<2,27,29,33,42> PDAT_SMB SMBDATA GPIO19/SATA1GP
SMB_LINK_ALERT# RST_HDD#

SATA
GPIO
A26 LINKALERT# GPIO36/SATA2GP AH19 RST_HDD# <35>

2
T115 SMLINK0 RBAYON# Q13
<36> ACZ_SPKR T114 B25 SMLINK0 GPIO37/SATA3GP AE19 RBAYON# <35>
SMLINK1 A25 R274
T116 SMLINK1
AC1 14M_ICH 1 3 VR_PWRGD_CK410
CLK14 14M_ICH <2> +3V
RI# CLKUSB_48

Clocks
<30> RI# A28 RI# CLK48 B2 CLKUSB_48 <2>
+3V 100K_4
A19 C20 2N7002
SPKR SUSCLK SIO_32K <38>
LPC_PD# A27
<30,38> LPC_PD# SUS_STAT#
SYS_RST# A22 B24 R266 100/F_4
<3> SYS_RST# SYS_RST# SLP_S3# SUSB# <39> Consider change to logic IC next version
+3V R540 *10K_4 D23 R270 100/F_4
SLP_S4# SUSC# <39>
R285 0_4 AB18 F22
<8> PM_BMBUSY# GPIO0/BM_BUSY# SLP_S5#
R267 R284
*10K/F_4 *10K/F_4
T117
SMB_ALERT# B23 GPIO11/SMBALERT# PWROK AA4 ICH_PWROK Note: External pull-up 3V
No ASF support

Power MGT
R283 0_4 PM_STPPCI_ICH# AC20 AC22 PM_DPRSLPVR_R R264 100/F_4 CKL :100Kohm PD
C <2> PM_STPPCI# GPIO18/STPPCI# GPIO16/DPRSLPVR PM_DPRSLPVR <8,43> C
R268 0_4 PM_STPCPU_ICH# AF21

GPIO
<2> PM_STPCPU# GPIO20/STPCPU#
C21 PM_BATLOW#_R

SYS
BOARD_ID2 TP0/BATLOW#
A21 GPIO26
C23 DNBSWON# 1/25 by Max
PWRBTN# DNBSWON# <39>
Note: Connect to EC; Reserve PH/3V BOARD_ID3 B21 GPIO27 R551 100K_4
T50 E23 GPIO28
C19 R552 *0_4
LAN_RST# PLTRST# <15,18,27,29,31,33,34,35,36,39,41,42>
+3V CLKRUN# AG18
<29,30,38,39> CLKRUN# GPIO32/CLKRUN#
Y4 PM_RSMRST#_R R298 100/F_4 RSMRST#
RSMRST# RSMRST# <39>
T53 AC19 GPIO33/AZ_DOCK_EN#
R272 U2 E20
<35> RST_RBAY# GPIO34/AZ_DOCK_RST# GPIO9
10K/F_4 A20 DASP_ON
GPIO10 T119
PCIE_WAKE# F20 F19 EMAIL_LED#
<27,29> PCIE_WAKE# WAKE# GPIO12 EMAIL_LED# <40>
SERIRQ AH21 E19 WAKE_SCI#_R
<29,30,38,39> SERIRQ SERIRQ GPIO13
<5> THERM_ALERT# AF20 THRM# GPIO14 R4 LID591# <25,39>
GPIO15 E22 DOCKIN# <25,28,42>
VR_PWRGD_CK410 AD22 R3 BOARD_ID0
R277 10K_4 VRMPWRGD GPIO24 BOARD_ID1
+3V GPIO25 D20
AC21 AD21 RBAYID1
<26> CRT_SENSE# GPIO6 GPIO35 RBAYID1 <35>
RUNTIME_SCI#_R AC18 RBAYID0
<39> SCI#
EXTSMI#_R E21
GPIO7 GPIO GPIO38 AD20
AE20
RBAYID0 <35>
<39> KBSMI# GPIO8 GPIO39 T52
ICH7-M GPIO25 /Suspend rail is a HW strap , don't pull down .
B B
+3VSUS

Board ID ID3 ID2 ID1 ID0 Board ID ID3 ID2 ID1 ID0 CLKUSB_48 14M_ICH
C390
With EZ Dock
ZB1H 1 0 0 0 W/O CIR 0 0 0 0 .022U-16V_4 R303 R569
10_4 33_4

5
W/O EZ Dock U47
ZB1I 1 0 0 1 W/O CIR 0 0 0 1 <3,8,43> DELAY_VR_PWRGOOD 2
ICH_PWROK
4
With EZ Dock 1 C401 C839
<39> PWROK_EC
ZB1J 1 0 1 1 With CIR 0 0 1 0 10P-50V_4 10P-50V_4
R528 TC7SH08FU
W/O EZ Dock R520

3
ZB1J1 1 1 0 0 With CIR 0 0 1 1 100K_4 10K_4

ZB1J2 1 1 0 1 ZB1B 0 1 0 0 +3V +3V +3V +3V

ZB1J3 1 1 1 0 ZB1C 0 1 0 1
R544 R548 R530 R574
BID@10K_4 BID@10K_4 BID@10K_4 BID@10K_4
A ZB1K 1 1 1 1 ZB1F 0 1 1 0 A

BOARD_ID3 BOARD_ID2 BOARD_ID1 BOARD_ID0


ZB1G 0 1 1 1 PROJECT : ZB1
R545 R547 R536 R573
BID@10K_4 BID@10K_4 BID@10K_4 BID@10K_4 Quanta Computer Inc.
Size Document Number Rev
ICH7-M GPIO (3 OF 4) C

Date: Friday, February 24, 2006 Sheet 16 of 50


5 4 3 2 1
5 4 3 2 1

U49E +5V +3V +1.05V


A4 P28 U49F
VSS[1] VSS[98] V5REF(1)
A23 VSS[2] VSS[99] R1 G10 V5REF[1] Vcc1_05[1] L11

2
B1 VSS[3] VSS[100] R11 Vcc1_05[2] L12
B8 R12 D25 AD17 L14 + C365
VSS[4] VSS[101] R539 +5V_S5 +3V_S5 V5REF[2] Vcc1_05[3]
B11 VSS[5] VSS[102] R13 PDZ5.6B Vcc1_05[4] L16
B14 R14 15/15mils 100/F_4 V5REF_SUS F6 L17 C341 C343 330U-2.5V_7343
VSS[6] VSS[103] 15/15mils V5REF_Sus Vcc1_05[5] .1U-10V_4.1U-10V_4
B17 VSS[7] VSS[104] R15 Vcc1_05[6] L18

2
1
B20 VSS[8] VSS[105] R16 AA22 Vcc1_5_B[1] Vcc1_05[7] M11
B26 R17 D13 AA23 M18
VSS[9] VSS[106] C372 C344 R295 Vcc1_5_B[2] Vcc1_05[8]

CORE
B28 VSS[10] VSS[107] R18 PDZ5.6B AB22 Vcc1_5_B[3] Vcc1_05[9] P11
C2 T6 1U-16V_6 .1U-10V_4 10_4 AB23 P18
VSS[11] VSS[108] Vcc1_5_B[4] Vcc1_05[10]
C6 VSS[12] VSS[109] T12 AC23 Vcc1_5_B[5] Vcc1_05[11] T11
C342 C346 C345 C340

1
D
C27 VSS[13] VSS[110] T13 AC24 Vcc1_5_B[6] Vcc1_05[12] T18 D
D10 T14 AC25 U11 .1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4
VSS[14] VSS[111] C426 C416 Vcc1_5_B[7] Vcc1_05[13]
D13 VSS[15] VSS[112] T15 AC26 Vcc1_5_B[8] Vcc1_05[14] U18
D18 T16 1U-16V_6 .1U-10V_4 AD26 V11
VSS[16] VSS[113] Vcc1_5_B[9] Vcc1_05[15]
D21 VSS[17] VSS[114] T17 AD27 Vcc1_5_B[10] Vcc1_05[16] V12
D24 VSS[18] VSS[115] U4 AD28 Vcc1_5_B[11] Vcc1_05[17] V14
E1 U12 D26 V16 C350 C352 C356 C338 C355
VSS[19] VSS[116] Vcc1_5_B[12] Vcc1_05[18] .1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4.1U-10V_4 1/25 by Max
E2 VSS[20] VSS[117] U13 D27 Vcc1_5_B[13] Vcc1_05[19] V17
E4 U14 +1.5V +1.5V_PCIE_ICH D28 V18 +3V
VSS[21] VSS[118] Vcc1_5_B[14] VCC PAUX Vcc1_05[20]
E8 VSS[22] VSS[119] U15 L41 E24 Vcc1_5_B[15]
E15 VSS[23] VSS[120] U16 E25 Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1] V5
F3 U17 E26 V1 +3V
VSS[24] VSS[121] Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2]
F4 VSS[25] VSS[122] U24 F23 Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3] W2
F5 U25 BLM18PG121SN_6 F24 W7 C398
VSS[26] VSS[123] + C339 Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4] .1U-10V_4
F12 VSS[27] VSS[124] U26 G22 Vcc1_5_B[20]
F27 V2 220U-6.3V_7343
C335 C334 C336 G23 U6 +3V_S5
VSS[28] VSS[125] .1U-10V_4 .1U-10V_4 .1U-10V_4 Vcc1_5_B[21] Vcc3_3/VccHDA C337
F28 VSS[29] VSS[126] V13 H22 Vcc1_5_B[22]
G1 V15 H23 R7 .1U-10V_4
VSS[30] VSS[127] Vcc1_5_B[23] VccSus3_3/VccSusHDA C383
G2 VSS[31] VSS[128] V24 J22 Vcc1_5_B[24]
G5 V27 J23 AE23 .1U-10V_4 +1.05V
VSS[32] VSS[129] Vcc1_5_B[25] V_CPU_IO[1]
G6 VSS[33] VSS[130] V28 K22 Vcc1_5_B[26] V_CPU_IO[2] AE26
G9 W6 K23 AH26

VCCA3GP
VSS[34] VSS[131] Vcc1_5_B[27] V_CPU_IO[3]
G14 VSS[35] VSS[132] W24 L22 Vcc1_5_B[28]
G18 W25 L23 AA7 +3V
VSS[36] VSS[133] Vcc1_5_B[29] Vcc3_3[3] C348 C349 C369
G21 VSS[37] VSS[134] W26 M22 Vcc1_5_B[30] Vcc3_3[4] AB12
G24 Y3 M23 AB20 .1U-10V_4.1U-10V_44.7U-10V_1206
VSS[38] VSS[135] Vcc1_5_B[31] Vcc3_3[5]
G25 VSS[39] VSS[136] Y24 N22 Vcc1_5_B[32] Vcc3_3[6] AC16
G26 VSS[40] VSS[137] Y27 N23 Vcc1_5_B[33] Vcc3_3[7] AD13

IDE
H3 Y28 P22 AD18 C347
VSS[41] VSS[138] Vcc1_5_B[34] Vcc3_3[8] .1U-10V_4
H4 VSS[42] VSS[139] AA1 P23 Vcc1_5_B[35] Vcc3_3[9] AG12
C H5 VSS[43] VSS[140] AA24 R22 Vcc1_5_B[36] Vcc3_3[10] AG15 C
H24 AA25 R23 AG19 +3V
VSS[44] VSS[141] Vcc1_5_B[37] Vcc3_3[11]
H27 VSS[45] VSS[142] AA26 R24 Vcc1_5_B[38]
H28 VSS[46] VSS[143] AB4 R25 Vcc1_5_B[39] Vcc3_3[12] A5
J1 VSS[47] VSS[144] AB6 R26 Vcc1_5_B[40] Vcc3_3[13] B13
J2 VSS[48] VSS[145] AB11 T22 Vcc1_5_B[41] Vcc3_3[14] B16
J5 AB14 +3V T23 B7 C351 C366 C388 C361
VSS[49] VSS[146] Vcc1_5_B[42] Vcc3_3[15] .1U-10V_4 .1U-10V_4 .1U-10V_4 .1U-10V_4
J24 VSS[50] VSS[147] AB16 T26 Vcc1_5_B[43] Vcc3_3[16] C10

PCI
J25 VSS[51] VSS[148] AB19 T27 Vcc1_5_B[44] Vcc3_3[17] D15
J26 VSS[52] VSS[149] AB21 T28 Vcc1_5_B[45] Vcc3_3[18] F9
K24 VSS[53] VSS[150] AB24 U22 Vcc1_5_B[46] Vcc3_3[19] G11
K27 AB27 C354 U23 G12
VSS[54] VSS[151] .1U-10V_4 Vcc1_5_B[47] Vcc3_3[20] VCCRTC
K28 VSS[55] VSS[152] AB28 V22 Vcc1_5_B[48] Vcc3_3[21] G16
L13 VSS[56] VSS[153] AC2 V23 Vcc1_5_B[49]
L15 VSS[57] VSS[154] AC5 W22 Vcc1_5_B[50] VccRTC W5
L24 VSS[58] VSS[155] AC9 W23 Vcc1_5_B[51]
L25 AC11 Y22 P7 +3V_S5
VSS[59] VSS[156] Vcc1_5_B[52] VccSus3_3[1] C400 C391
L26 VSS[60] VSS[157] AD1 Y23 Vcc1_5_B[53]
M3 AD3 +1.5V +1.5V_GPLL_ICH 30mils A24 .1U-10V_4 .1U-10V_4
VSS[61] VSS[158] L42 VccSus3_3[2]
M4 VSS[62] VSS[159] AD4 B27 Vcc3_3[1] VccSus3_3[3] C24
M5 AD7 R282 R281 1uH_6 D19
VSS[63] VSS[160] 0_4 1_6 GPLL_R GPLL_R_L VccSus3_3[4] C382 C394
M12 VSS[64] VSS[161] AD8 AG28 VccDMIPLL VccSus3_3[5] D22
M13 AD11 G19 .1U-10V_4 .1U-10V_4
VSS[65] VSS[162] +1.5V VccSus3_3[6]
M14 VSS[66] VSS[163] AD15 AB7 Vcc1_5_A[1]
M15 AD19 C333 C331 AC6 K3
VSS[67] VSS[164] .01U-16V_4 Vcc1_5_A[2] VccSus3_3[7]
M16 VSS[68] VSS[165] AD23 AC7 Vcc1_5_A[3] VccSus3_3[8] K4
M17 AE2 10U/X5R-6.3V_8 AD6 K5 +3V_S5
VSS[69] VSS[166] Vcc1_5_A[4] VccSus3_3[9]

ARX
M24 VSS[70] VSS[167] AE4 AE6 Vcc1_5_A[5] VccSus3_3[10] K6
M27 AE8 +1.5V C370 AF5 L1
VSS[71] VSS[168] 1U-16V_6 Vcc1_5_A[6] VccSus3_3[11]
B
M28 VSS[72] VSS[169] AE11 AF6 Vcc1_5_A[7] VccSus3_3[12] L2 B

USB
N1 VSS[73] VSS[170] AE13 AG5 Vcc1_5_A[8] VccSus3_3[13] L3
N2 AE18 AH5 L6 C395 C396
VSS[74] VSS[171] Vcc1_5_A[9] VccSus3_3[14] .1U-10V_4 .1U-10V_4
N5 VSS[75] VSS[172] AE21 VccSus3_3[15] L7
N6 AE24 C399 AD2 M6
VSS[76] VSS[173] .1U-10V_4 VccSATAPLL VccSus3_3[16]
N11 VSS[77] VSS[174] AE25 VccSus3_3[17] M7
N12 AF2 +3V AH11 N7 +1.5V
VSS[78] VSS[175] Vcc3_3[2] VccSus3_3[18]
N13 VSS[79] VSS[176] AF4
N14 AF8 +1.5V AB10 AB17
VSS[80] VSS[177] C367 Vcc1_5_A[10] Vcc1_5_A[19] +1.5V
N15 VSS[81] VSS[178] AF11 30mils AB9 Vcc1_5_A[11] Vcc1_5_A[20] AC17
N16 AF27 .1U-10V_4 AC10
VSS[82] VSS[179] Vcc1_5_A[12] C371
N17 VSS[83] VSS[180] AF28 AD10 Vcc1_5_A[13] Vcc1_5_A[21] T7
N18 AG1 +3V AE10 F17 .1U-10V_4
VSS[84] VSS[181] Vcc1_5_A[14] Vcc1_5_A[22]

ATX
N24 AG3 R299 C357 AF10 G17 +1.5V
VSS[85] VSS[182] +3V_S5 *0_4 1U-16V_6 Vcc1_5_A[15] Vcc1_5_A[23] C387 C392
N25 VSS[86] VSS[183] AG7 AF9 Vcc1_5_A[16]
N26 AG11 R302 AG9 AB8 .1U-10V_4 .1U-10V_4
VSS[87] VSS[184] 0_4 Vcc1_5_A[17] Vcc1_5_A[24]
P3 VSS[88] VSS[185] AG14 AH9 Vcc1_5_A[18] Vcc1_5_A[25] AC8
P4 VSS[89] VSS[186] AG17
P12 AG20 +1.5V 3VS5_ICH_SUS3 E3 K7 TP_ICHVCCSUS1 C393
VSS[90] VSS[187] C377 VccSus3_3[19] VccSus1_05[1] .1U-10V_4
P13 VSS[91] VSS[188] AG25
P14 AH1 .1U-10V_4 C1 C28 TP_ICHVCCSUS2
VSS[92] VSS[189] VccUSBPLL VccSus1_05[2] TP_ICHVCCSUS3
P15 VSS[93] VSS[190] AH3 VccSus1_05[3] G20
P16 AH7 PAD T126 TPVCCSUSLAN1 AA2
VSS[94] VSS[191] C385 T125 TPVCCSUSLAN2 VccSus1_05/VccLAN1_05[1]
P17 VSS[95] VSS[192] AH12 Y7 VccSus1_05/VccLAN1_05[2]Vcc1_5_A[26] A1
P24 AH23 .1U-10V_4 PAD H6 +1.5V
VSS[96] VSS[193] Vcc1_5_A[27]

USB CORE
P27 VSS[97] VSS[194] AH27 Vcc1_5_A[28] H7
Vcc1_5_A[29] J6
ICH7-M J7
Vcc1_5_A[30]
ICH7-M C368
A .1U-10V_4 A

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
ICH7-M POWER (4 OF 4) C

Date: Tuesday, February 07, 2006 Sheet 17 of 50


5 4 3 2 1
5 4 3 2 1

<8,41> PEG_RXP[15:0]
<8,41> PEG_RXN[15:0]
NOTE: some of the PCIE testpoints will <8,41>
<8,41>
PEG_TXP[15:0]
PEG_TXN[15:0]
be available trought via on traces. U34A

PART 1 OF 7
PEG_TXP0 AJ31 AK27 V_GMCHEXP_RXP0 C652 EV@.1U-10V_4 PEG_RXP0
PEG_TXN0 PCIE_RX0P PCIE_TX0P
AH31 PCIE_RX0N PCIE_TX0N AJ27 V_GMCHEXP_RXN0 C653 EV@.1U-10V_4 PEG_RXN0
D D

PEG_TXP1 AH30 P AJ25 V_GMCHEXP_RXP1 C684 EV@.1U-10V_4 PEG_RXP1


PEG_TXN1 PCIE_RX1P PCIE_TX1P
AG30 PCIE_RX1N AH25 V_GMCHEXP_RXN1 C685 EV@.1U-10V_4 PEG_RXN1
C PCIE_TX1N

PEG_TXP2
I
AG32 PCIE_RX2P PCIE_TX2P AH28 V_GMCHEXP_RXP2 C654 EV@.1U-10V_4 PEG_RXP2
PEG_TXN2 AF32 - AG28V_GMCHEXP_RXN2 C655 EV@.1U-10V_4 PEG_RXN2
PCIE_RX2N PCIE_TX2N
E
PEG_TXP3 AF31 PCIE_RX3P
X PCIE_TX3P AG27V_GMCHEXP_RXP3 C686 EV@.1U-10V_4 PEG_RXP3
PEG_TXN3 AE31 AF27 V_GMCHEXP_RXN3 C687 EV@.1U-10V_4 PEG_RXN3
PCIE_RX3N P PCIE_TX3N
R
PEG_TXP4 AE30 AF25 V_GMCHEXP_RXP4 C656 EV@.1U-10V_4 PEG_RXP4
PEG_TXN4 PCIE_RX4P E PCIE_TX4P
AD30 PCIE_RX4N PCIE_TX4N AE25 V_GMCHEXP_RXN4 C657 EV@.1U-10V_4 PEG_RXN4
S
PEG_TXP5 AD32 PCIE_RX5P
S PCIE_TX5P AE28 V_GMCHEXP_RXP5 C688 EV@.1U-10V_4 PEG_RXP5
PEG_TXN5 AC32 AD28 V_GMCHEXP_RXN5 C689 EV@.1U-10V_4 PEG_RXN5
PCIE_RX5N PCIE_TX5N
I
PEG_TXP6 AC31 AD27 V_GMCHEXP_RXP6 C658 EV@.1U-10V_4 PEG_RXP6
PEG_TXN6 AB31
PCIE_RX6P N PCIE_TX6P
AC27 V_GMCHEXP_RXN6 C659 EV@.1U-10V_4 PEG_RXN6
C PCIE_RX6N PCIE_TX6N C
T
PEG_TXP7 AB30 E AC25 V_GMCHEXP_RXP7 C690 EV@.1U-10V_4 PEG_RXP7
PEG_TXN7 PCIE_RX7P PCIE_TX7P
AA30 PCIE_RX7N R PCIE_TX7N AB25 V_GMCHEXP_RXN7 C691 EV@.1U-10V_4 PEG_RXN7

F
PEG_TXP8 AA32 AB28 V_GMCHEXP_RXP8 C660 EV@.1U-10V_4 PEG_RXP8
PEG_TXN8 Y32
PCIE_RX8P A PCIE_TX8P
AA28 V_GMCHEXP_RXN8 C661 EV@.1U-10V_4 PEG_RXN8
PCIE_RX8N PCIE_TX8N
C
PEG_TXP9 Y31 E AA27 V_GMCHEXP_RXP9 C692 EV@.1U-10V_4 PEG_RXP9
PEG_TXN9 PCIE_RX9P PCIE_TX9P
W31 PCIE_RX9N PCIE_TX9N Y27 V_GMCHEXP_RXN9 C693 EV@.1U-10V_4 PEG_RXN9

PEG_TXP10 W30 Y25 V_GMCHEXP_RXP10 C662 EV@.1U-10V_4 PEG_RXP10


PEG_TXN10 PCIE_RX10P PCIE_TX10P
V30 PCIE_RX10N PCIE_TX10N W25 V_GMCHEXP_RXN10 C663 EV@.1U-10V_4 PEG_RXN10

PEG_TXP11 V32 W28 V_GMCHEXP_RXP11 C679 EV@.1U-10V_4 PEG_RXP11


PEG_TXN11 PCIE_RX11P PCIE_TX11P
U32 PCIE_RX11N PCIE_TX11N V28 V_GMCHEXP_RXN11 C680 EV@.1U-10V_4 PEG_RXN11

PEG_TXP12 U31 V27 V_GMCHEXP_RXP12 C664 EV@.1U-10V_4 PEG_RXP12


PEG_TXN12 PCIE_RX12P PCIE_TX12P
B T31 PCIE_RX12N PCIE_TX12N U27 V_GMCHEXP_RXN12 C651 EV@.1U-10V_4 PEG_RXN12 B

PEG_TXP13 T30 U25 V_GMCHEXP_RXP13 C666 EV@.1U-10V_4 PEG_RXP13


PEG_TXN13 PCIE_RX13P PCIE_TX13P
R30 PCIE_RX13N PCIE_TX13N T25 V_GMCHEXP_RXN13 C667 EV@.1U-10V_4 PEG_RXN13

PEG_TXP14 R32 T28 V_GMCHEXP_RXP14 C668 EV@.1U-10V_4 PEG_RXP14


PEG_TXN14 PCIE_RX14P PCIE_TX14P
P32 PCIE_RX14N PCIE_TX14N R28 V_GMCHEXP_RXN14 C669 EV@.1U-10V_4 PEG_RXN14

PEG_TXP15 P31 R27 V_GMCHEXP_RXP15 C671 EV@.1U-10V_4 PEG_RXP15


PEG_TXN15 PCIE_RX15P PCIE_TX15P
N31 PCIE_RX15N PCIE_TX15N P27 V_GMCHEXP_RXN15 C670 EV@.1U-10V_4 PEG_RXN15

Clock Calibration
<2> CLK_PCIE_M56 AL28 PCIE_REFCLKP
<2> CLK_PCIE_M56# AK28 PCIE_REFCLKN
AE24 R96 EV@2K/F_4 +1.1V_VGA
+3V PCIE_CALRN R98 EV@562/F_4
PCIE_CALRP AD24

AG24 AB24 R103 EV@1.47K/F_4


PERSTB PCIE_CALI
5

U66
PLTRST# 2 AA24
<15,16,27,29,31,33,34,35,36,39,41,42> PLTRST# PCIE_TEST
A 4 A
1

EV@TC7SH08FU AF24 PERSTB_MASK


Tie To VSS PROJECT : ZB1
3

EV@M56-P B11 LF Quanta Computer Inc.


Size Document Number Rev
M56P 1 OF 7 C

Date: Friday, February 24, 2006 Sheet 18 of 50


5 4 3 2 1
5 4 3 2 1

U34B
PART 2 OF 7

TXCM AL9 TXCM_EX <25>


Integrated AM9
TXCP TXCP_EX <25>
TMDS R65 EV@180_4
TX0M AK10 TX0M_EX <25>
AG8 GPIO_34 TX0P AL10 TX0P_EX <25>
TP12 AH7 R66 EV@180_4
TP10 GPIO_33
AG9 GPIO_32 TX1M AL11 TX1M_EX <25>
TP9 AH8 V AM11
GPIO_31 TX1P TX1P_EX <25>
TP13 AJ8 R67 EV@180_4
TP14 GPIO_30 I
AH9 GPIO_29 TX2M AL12 TX2M_EX <25>
TP15 AG10 D AM12
GPIO_28 TX2P TX2P_EX <25>
TP8 AF10 R74 EV@180_4
TP4 GPIO_27 E
<24> MEMTYP_0 AH6 AK9

Expand GPIO
D GPIO_26 TX3M D
<24> MEMTYP_1 AF8 GPIO_25 O TX3P AJ9
AF7 GPIO_24
TP5 AE9 AK11
GPIO_23 TX4M
MEMORY CLOCK SPREAD
TP16 AE10 AJ11
TP11 AG7
GPIO_22 & TX4P
TP6 GPIO_21
SPECTRUM
AF9 GPIO_20 TX5M AK12
TP7 AF13 AJ12 +TPVDD
TP18 GPIO_19 M TX5P +2.5V
AE13 GPIO_18
TP17 U AM8 L55
TPVDD EV@BLM18PG181SN1D_6
U37 L AL8 C592 C591
XT_IN XT_OUT L64 EV@BLM18PG181SN1D_6 TPVSS EV@1U-16V_6 EV@22U-16V_1210
1 XIN XOUT 8 T
2 7 MK1726_VDD C648 C665 AJ6
VSS VDD +3V TXVDDR_1
1726_S0 3 SRS PD 6 MK_PD EV@.1U-10V_4 AK4 NC_DVOVMODE_0
I TXVDDR_2 AK6
OSC_SPREAD R419 EV@33_41726_CKO 4 5 MK_27M 27MOUT AL4 AL6 TXVDDR
SSCLK REF R435 EV@22U-16V_1210 NC_DVOVMODE_1 M TXVDDR_3
AM6 +2.5V
EV@0_4 TXVDDR_4 L54
EV@CY25819 AF2 DVPCNTL_0 E
MK1726-8 AF1 DVPCNTL_1
EV@BLM18PG181SN1D_6
+3V AF3 D AJ7
DVPCNTL_2 TXVSSR_1 C586 C587 C588
AG1 DVPCLK I TXVSSR_2 AK7
AG2 DVPDATA_0 TXVSSR_3 AL7
EV@121/F_4 R433 MK_PD AG3 DVPDATA_1
A TXVSSR_4 AM7 EV@22U-16V_1210 EV@1U-16V_6 EV@.1U-10V_4
R421 27M_IN AH2 AK8
DVPDATA_2 TXVSSR_5
*10K_4 AH3 DVPDATA_3
C649 R432 AJ2
R429 EV@10P-50V_4 *10K_4 DVPDATA_4
AJ1 DVPDATA_5 R AK24 R_DAC1 <26>
AK2 DAC / CRT AM24
DVPDATA_6 G G_DAC1 <26>
1726_S0 EV@71.5/F_4 AK1 AL24
DVPDATA_7 B B_DAC1 <26>
AK3 DVPDATA_8
AL2 AJ23

VIP Host/External
DVPDATA_9 HSYNC HSYNC_DAC1 <24,26>
AL3 DVPDATA_10 VSYNC AJ22 VSYNC_DAC1 <24,26>
R420 CPIS_VDD_VCL GPIO2 AM3 AK22
*10K_4 DVPDATA_11 GENERICA R55 EV@0_4
AE6 DVPDATA_12
<24> DC_Strap2 VID/DVO_R13 AF4 AF23 VGA_ALERT#
VID/DVO_R14 DVPDATA_13 GENERICB
AF5 Ba3

TMDS
<24> DC_Strap3 DVPDATA_14
<24> DC_Strap4 VID/DVO_R15 AG4 AL22 R91 EV@499_4
DVPDATA_15 RSET +AVDD L61
AJ3 DVPDATA_16
C AH4 AL25 C626 +2.5V C
DVPDATA_17 AVDD_1 AVDD EV@BLM18PG181SN1D_6
<25> LVDS_DAT AJ4 DVPDATA_18 AVDD_2 AM25
<25> LVDS_CLK AG5 DVPDATA_19
AH5 AK23 C624 C628 EV@22U-16V_1210
DVPDATA_20 AVSSQ
AF6 DVPDATA_21 AVSSN_1 AK25
Stuff for Non-HDCP AE7 AJ24 EV@1U-16V_6 EV@.1U-10V_4 +VDDDI +2.5V
DVPDATA_22 AVSSN_2
AG6 DVPDATA_23
<24> GPIO[13..0] VDD1DI AM23
1/25 by Max GPIO0 AD4 L59 EV@BLM18PG181SN1D_6
GPIO1 GPIO_0 General
AD2 GPIO_1 VSS1DI AL23
+3V GPIO2 AD1 Purpose C619 C620 C618
+3V GPIO3 GPIO_2 I/O EV@1U-16V_6EV@.1U-10V_4EV@22U-16V_1210
AD3 GPIO_3 AK15
GPIO4 AC1 DAC2 (TV/CRT2) R2 AM15 PLACE CLOSE TO ASIC
GPIO5 GPIO_4 G2
AC2 GPIO_5 B2 AL15
C951 T68 GPIO7 GPIO6 AC3
R765 GPIO7 GPIO_6
AB2 GPIO_7_BLON H2SYNC AF15
HDCP@.1U-10V_4 U67 GPIO8 R_DAC1 R97 EV@150/F_4
*10K_4 AC6 GPIO_8 V2SYNC AG15
8 4 GPIO9 AC5 G_DAC1 R104 EV@150/F_4
VCC VSS GPIO10 GPIO_9 EXT_TV_Y/G B_DAC1 R99 EV@150/F_4
7 HOLD# WP# 3 AC4 GPIO_10 Y AJ15 Y_DAC2 <25>
GPIO10 6 2 GPIO8 GPIO11 AB3 AJ13 EXT_TV_C/R EXT_TV_Y/G R84 EV@150/F_4
CLK SDAO GPIO_11 C C_DAC2 <25>
GPIO9 5 1 ROMCSb# GPIO12 AB4 AH15 EXT_TV_COMP EXT_TV_C/R R78 EV@150/F_4
SDAI CS# GPIO_12 COMP COMP_DAC2 <25>
R766 GPIO13 AB5 EXT_TV_COMP R85 EV@150/F_4
GPIO_13 R80 +2.5V
HDCP@10K_4 AD5 GPIO_14 R2SET AK14
HDCP@M25P10-AVMN6P <46> V_PWRCNTL AB8
OSC_SPREAD GPIO_15 EV@715/F_4
AA8 GPIO_16 A2VDD_1 AM16
+3V VGA_ALERT# AB7 AL16 C593 C98 C597 Ba5
R58 EV@0_4AB6 GPIO_17 A2VDD_2
Stuff for HDCP EV@499_4 R71 EV@499_4 R70 NC_AB6 EV@22U-16V_1210
A2VSSN_1 AM17
AC8 AL17 EV@1U-16V_6
EV@.1U-10V_4 +A2VDDQ +2.5V
VREFG A2VSSN_2 L57
+PVDD VGATHRM+ AG12 AL14
+2.5V DPLUS Thermal NC_A2VDDQ EV@BLM18PG181SN1D_6
L56 VGATHRM- AH12 Diode AK13 C610 C611 C609
EV@BLM18PG181SN1D_6 DMINUS A2VSSQ +VDD2DI +2.5V EV@1U-16V_6 EV@.1U-10V_4 EV@22U-16V_1210
C603 C601 C604 PVDD AJ14 AJ16 L58
EV@1U-16V_6 PVDD PLL & VDD2DI EV@BLM18PG181SN1D_6
EV@22U-16V_1210 EV@.1U-10V_4
+1.1V_VGA +MPVDD PVSS AH14 XTAL AJ17
PVSS VSS2DI C614 C615 C613
B B
L16 MPVDD A6 EV@1U-16V_6 EV@.1U-10V_4 EV@22U-16V_1210
EV@BLM18PG181SN1D_6 MPVSS MPVDD
A5 MPVSS
C31 C51 C45 Monitor AF11
Interface HPD1 TMDS_HPD <25,41,42>
EV@.1U-10V_4EV@1U-16V_6 27M_IN AL26
EV@22U-16V_1210 27M_O XTALIN
AM26 XTALOUT
DDC1DATA AH22 CRT1DDCDATA <26>
T6 AG14 AH23
PLLTEST DDC1CLK CRT1DDCCLK <26>
C635 XT_IN R423 *33_4 R95 TESTEN AG22 AH13
TESTEN Test DDC2DATA TMDS_DDCDATA <41,42>
R426 *33_4 EV@1K_4 AG13
DDC2CLK TMDS_DDCCLK <41,42>
EV@22P-50V_4
+3V ROMCSb# AC7 AE12 *0_4 R703 VTHM_DAT
Y7 ROMCSb ROM DDC3DATA *0_4 R704 VTHM_CLK
AF12
XT_OUT

R425 R767 HDCP@10K_4 DDC3CLK


EV@1M_4
EV@TXC=27MHz 1/25 by Max External AE23
GENERICC GENERICC <24>
AK17 LVSSR_1
SSC
AJ19 LVSSR_2 LVDS PLL LPVSS AE18
C641 AF18 LVSSR_3 and I/O
AH17 LVSSR_4 GND
EV@22P-50V_4 AG17 AF22
LVSSR_5 LVDS PLL LVSSR_10
AG19 LVSSR_6 LVSSR_9 AF17
and I/O
AH19 LVSSR_7 GND LVSSR_8 AF21

EV@M56-P B11 LF

+3V
R685

R686

+3V
15 MIL
L51 3V_THM1 R384 +3V
EV@4.7K_4

EV@4.7K_4

EV@BLM18PG181SN1D_6 C573 EV@10K_4


Q27
2

EV@.1U-10V_4 EV@2N7002
U31 VTHM_DAT EV@0_4 R687 VTHM_DAT_EC
A 1 3 MBDATA MBDATA <5,39,48> A
1 6 VGA_ALERT#
VGATHRM- VCC ALERT# VTHM_DAT
3 DXN SDA 7
2 8 VTHM_CLK
C575 DXP SCLK
10 mil trace / 5 GND OVERT# 4 CPUFANON# <5>
VTHM_CLK EV@0_4 R688 VTHM_CLK_EC 1 3 MBCLK
10 mil space EV@2200P-50V_4 EV@MAX6657/GMT-781 MBCLK <5,39,48>
VGATHRM+
EV@2N7002
Q28
2

Close to pin ASIC SLAVE ADDRESS: 9A PROJECT : ZB1


+3V
Quanta Computer Inc.
Size Document Number Rev
M56P 2 OF 7 C

Date: Wednesday, March 01, 2006 Sheet 19 of 50


5 4 3 2 1
5 4 3 2 1

U34E
+1.2V_VPCIE
+1.8V PART 5 OF 7
C1 VDDR1_1 PCIE_PVDD_12_1 V23
J1 VDDR1_2 PCIE_PVDD_12_2 N23
C695 M1 P23 C155
C110 C118 C583 C47 C82 C640 C616 C137 VDDR1_3 PCIE_PVDD_12_3 C643 C133 C122
R1 VDDR1_4 PCIE_PVDD_12_4 U23
EV@22U-16V_1210EV@1U-16V_6EV@1U-16V_6EV@1U-16V_6EV@1U-16V_6EV@1U-16V_6EV@1U-16V_6EV@1U-16V_6 EV@1U-16V_6 V1 EV@.1U-10V_4 EV@.1U-10V_4 EV@1U-16V_6 EV@22U-16V_1210
VDDR1_5
AA1 VDDR1_6 PCIE_VDDR_12_10 N29
A3 VDDR1_7 PCIE_VDDR_12_11 N28
P9 N27 +1.2V_VPCIE
VDDR1_8 PCIE_VDDR_12_12
J10 VDDR1_9 PCIE_VDDR_12_13 N26
N9 VDDR1_10 PCIE_VDDR_12_14 N25
C696 C77 C607 C44 C65 C131 P10
EV@1U-16V_6EV@1U-16V_6EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4 VDDR1_11 C130 C673 C650 C644 C140
D
A9 VDDR1_12 PCIE_VDDR_12_1 AL31 D

PCI-Express
EV@22U-16V_1210 Y10 AM31 EV@1U-16V_6
EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4
VDDR1_13 PCIE_VDDR_12_2 EV@22U-16V_1210
P8 VDDR1_14 PCIE_VDDR_12_3 AM30
R9 VDDR1_15 PCIE_VDDR_12_4 AL32
Y9 VDDR1_16 PCIE_VDDR_12_5 AL30
J11 AM28 +1.2V_VPCIE
C694 C60 C59 C584 C63 C50 C581 VDDR1_17 PCIE_VDDR_12_6
A21 VDDR1_18 PCIE_VDDR_12_7 AL29
EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4 M10 AM29
VDDR1_20 PCIE_VDDR_12_8

Memory I/O
EV@22U-16V_1210 N10 AM27
VDDR1_21 PCIE_VDDR_12_9 C128 C645 C132 C124 C121 C141
Y8 VDDR1_22
J18 EV@1U-16V_6EV@1U-16V_6EV@22U-16V_1210
EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4
VDDR1_23
J19 VDDR1_24 VDDC_1 AC11
K21 VDDR1_25 VDDC_2 AC12
A12 P14 +1.1V_VGA
C67 C61 C101 C108 C68 C93 C582 C139 C602 VDDR1_26 VDDC_3
H13 VDDR1_27 VDDC_4 U15
EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4
EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4 A15 W14
VDDR1_28 VDDC_5
J20 VDDR1_29 VDDC_6 W15
J13 VDDR1_30 VDDC_7 R17
K11 VDDR1_31 VDDC_8 R15
K19 V15 C89 C83 C105 C102 C71 C94 C73 C87 C37
VDDR1_32 VDDC_9 EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@1U-16V_6EV@1U-16V_6EV@1U-16V_6EV@22U-16V_1210
A18 VDDR1_33 VDDC_10 V16
L23 VDDR1_34 VDDC_11 T16
K20 VDDR1_35 VDDC_12 U16
K24 VDDR1_36 P VDDC_13 T17

Core
L24 VDDR1_37 VDDC_14 U17
H19 VDDR1_38 O VDDC_15 V14
C114 C99 C112 C70 C100 C119 C80 C85 C33
A24 R18
K13
VDDR1_39
VDDR1_40
W VDDC_16
VDDC_17 T18 EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4EV@1U-16V_6EV@1U-16V_6EV@1U-16V_6
J32 V18
A30
VDDR1_41 E VDDC_18
P18
R741 VDDR1_42 VDDC_19
+3V_S5 +3V
*0_6
C32 VDDR1_43 R VDDC_20 P19
EV@22U-16V_1210
F32 VDDR1_45 VDDC_21 R19
L32 VDDR1_46 VDDC_22 W19
VDDC_23 AD11
Q52 +2.5V

1 3 VDD25_1 AC13
R742 AC16
VDD25_2
C
VDD25_3 AC18 C
EV@100K/F_4 EV@AO3403 C43 C79 C111 C69 C103 C107 L20 +1.2V_VPCIE C127 C81 C595

I/O Internal
EV@22U-16V_1210 EV@1U-16V_6
EV@1U-16V_6EV@.1U-10V_4EV@.1U-10V_4EV@.1U-10V_4 +1.2V_VDDPLL EV@1U-16V_6EV@1U-16V_6EV@10U-10V_8
2

AB9 VDDR3_1 VDDPLL AC15


AB10 EV@BLM18PG181SN1D_6
VDDR3_2
AA9 VDDR3_3 VDDCI_1 W10
AC19 VDDR3_4 VDDCI_2 T14
AD18 VDDR3_5 VDDCI_3 W17
AC20 VDDR3_6 VDDCI_4 P16
3

+2.5V AD19 T23 C92 C96


Q53 +VDDR4 VDDR3_7 VDDCI_5 EV@1U-16V_6 EV@10U-10V_8 +1.1V_VGA
AD20 VDDR3_8 VDDCI_6 K14
EV@2N7002 VDDCI_7 U19

I/0
2 L52 VDDR4 for DVPDATA[12..23] L19 EV@BLM18PG181SN1D_6
EV@BLM18PG181SN1D_6
C578 AJ5 C109 C129 C97 C64 C576
C579 VDDR4_1 +2.5V EV@.1U-10V_4 EV@.1U-10V_4EV@1U-16V_6
EV@1U-16V_6EV@22U-16V_1210
EV@1U-16V_6 AM5 VDDR4_2
EV@.1U-10V_4 AL5 AE19 +2.5V_LPVDD L23
VDDR4_3 LPVDD/VDDL0 EV@BLM18PG181SN1D_6
1

AK5 VDDR4_4
+VDDR5 AF20
L14 VDDR5 for DVPDATA[0..11] LVDDR/VDDL0_1 C146 C154
AE2 VDDR5_1 LVDDR/VDDL0_2 AE20
EV@BLM18PG181SN1D_6 AE3 AF19 EV@1U-16V_6 EV@22U-16V_1210
C42 C38 VDDR5_2 LVDDR/VDDL0_3

LVDS PLL, I/O


AE4 VDDR5_3
EV@1U-16V_6 EV@.1U-10V_4 AE5 VDDR5_4
+1.8V AC21
LVDDR/VDDL1_1 +2.5V
LVDDR/VDDL1_2 AC22
L17 +1.8V_VDDRH A27 AD22 +2.5V_LVDDR L22
VDDRH0 LVDDR/VDDL1_3

Clock
I/O
Memory
EV@BLM18PG181SN1D_6 F1 AE21 +2.5V EV@BLM18PG181SN1D_6
C48 C49 C636 C46 VDDRH1 LVDDR/VDDL2_1
LVDDR/VDDL2_2 AD21
EV@1U-16V_6 EV@1U-16V_6 EV@.1U-10V_4 EV@.1U-10V_4 AE22
LVDDR/VDDL2_3
A28 VSSRH0
E1 C594
VSSRH1 C95 C104 C117 C144 C120 C116
EV@1U-16V_6EV@.1U-10V_4 EV@1U-16V_6EV@22U-16V_1210
EV@1U-16V_6EV@1U-16V_6EV@.1U-10V_4
EV@M56-P B11 LF

B B
near conn.
U34G
PART 7 OF 7
Forward Control and External SSC AD12 EV@0_4P2R_S 3 4 RP16
VARY_BL LVDS_BLON <8,25>
Compatibility
DIGON AE11 1 2 LVDS_DIGON <8,25>
EV@: STUFF WHEN USE EXTERNAL VGA GENERICD AD23
M56@: STUFF WHEN USE M56 UNSTUFF WHEN USE M54 RP41
OR M52 AJ21 1 2
TXCLK_UP TXUCLKOUT+ <8,25>
R88 Y23 AK21 3 4
BBN_4 TXCLK_UN TXUCLKOUT- <8,25>
K15 BBN_3 TXOUT_U3P AH21
+1.1V_VGA M56@0_4 R10 AG21
BBN_2 TXOUT_U3N
AC17 BBN_1 TXOUT_U2P AG20EV@0_4P2R_S 4 RP32
3 EV@0_4P2R_S TXUOUT2+ <8,25>
R89 AC14 AH20 1 2
BBP_4 TXOUT_U2N TXUOUT2- <8,25>
M23 BBP_3 TXOUT_U1P AK20 EV@0_4P2R_S 3 4 RP35 TXUOUT1+ <8,25>
M56@0_4 C52 C113 C123 V10 AJ20 1 2
BBP_2 LVDS channel TXOUT_U1N TXUOUT1- <8,25>
M56@1U-16V_6
M56@22U-16V_1210 M56@.1U-10V_4 K18 AG18EV@0_4P2R_S 3 4 RP26
BBP_1 TXOUT_U0P TXUOUT0+ <8,25>
TXOUT_U0N AH18 1 2 TXUOUT0- <8,25>
RP30

TXOUT_L0N AK19 1 2 TXLOUT0- <8,25>


+2.5V AL19 3 4
TXOUT_L0P TXLOUT0+ <8,25>
L53 +2.5V_VDDR25 L10 AL20 EV@0_4P2R_S 3 4 RP37
VDD25_4 TXOUT_L1N RP39 TXLOUT1- <8,25>
EV@BLM18PG181SN1D_6 C78 K22 AM20 1 2
VDD25_5 TXOUT_L1P TXLOUT1+ <8,25>
C32 C72 EV@1U-16V_6AA10 AL21 1 EV@0_4P2R_S
2
VDD25_6 TXOUT_L2N TXLOUT2- <8,25>
EV@22U-16V_1210EV@.1U-10V_4 TXOUT_L2P AM21 3 4 TXLOUT2+ <8,25>
TXOUT_L3N AK18
TXOUT_L3P AJ18
+3V AL18 EV@0_4P2R_S 4 RP28
3 EV@0_4P2R_S
TXCLK_LN TXLCLKOUT- <8,25>
TXCLK_LP AM18 1 2 TXLCLKOUT+ <8,25>

EV@M56-P B11 LF
R743
100K/F_4

A +1.8VSUS +5V +1.2V_VPCIE +1.2V_VPCIE A


U11
4 6 R115 EV@45.3K/F_4
R744 EV@0_4 VPP VO
<46> VDDCPG 3 VIN ADJ 7
R745 *0_4 2 5
<23,39,42,44,45,46> MAINON VEN NC R118 C147 C148
<45> PCIEVDDRPG 1 POK GND 8
EV@10U-10V_8 EV@.1U-10V_4
EV@G966
C949 C708
C158 EV@.1U-10V_4 EV@91K_4
*.1U-10V_4 PROJECT : ZB1
Part number
EV@10U-10V_8 Quanta Computer Inc.
Size Document Number Rev
M56P POWER C

Date: Wednesday, March 01, 2006 Sheet 20 of 50


5 4 3 2 1
5 4 3 2 1

U34F
Part 6 of 7

AH27 PCIE_VSS_1 VSS_38 AD16


D
AC23 PCIE_VSS_2 VSS_39 AA6 D
AL27 PCIE_VSS_3 VSS_40 P7
R23 PCIE_VSS_4 VSS_41 P5
P25 PCIE_VSS_5 VSS_42 M3
R25 PCIE_VSS_6 VSS_43 M9
T26 PCIE_VSS_7 VSS_44 L7
U26 PCIE_VSS_8 VSS_45 M7
W26 PCIE_VSS_9 VSS_46 AD17
Y26 PCIE_VSS_10 VSS_47 AH11
AB26 PCIE_VSS_11 VSS_48 A8
AC26 PCIE_VSS_12 VSS_49 U7
AD25 PCIE_VSS_13 VSS_50 C10
AE26 PCIE_VSS_14 VSS_51 E9
AF26 PCIE_VSS_15 VSS_52 F3
AD26 PCIE_VSS_16 VSS_53 J9
AG25 PCIE_VSS_17 VSS_54 N7
AH26 PCIE_VSS_18 VSS_55 N3
AC28 PCIE_VSS_19 VSS_56 Y5
Y28 PCIE_VSS_20 VSS_57 AM13
U28 PCIE_VSS_21 VSS_58 AC10
P28 PCIE_VSS_22 VSS_59 Y6
AH29 PCIE_VSS_23 VSS_60 U6
AF28 PCIE_VSS_24 VSS_61 E5
V29 PCIE_VSS_25 VSS_62 AL13
AC29 PCIE_VSS_26 VSS_63 A11
W27 PCIE_VSS_27 VSS_64 U8
AB27 PCIE_VSS_28 VSS_65 U9

PCI-Express GND
V26 PCIE_VSS_29 VSS_66 U10
AJ26 PCIE_VSS_30 VSS_67 R6
AJ32 PCIE_VSS_31 VSS_68 AD6
AK29 PCIE_VSS_32 VSS_69 V6
P26 PCIE_VSS_33 VSS_70 AD14
P29 PCIE_VSS_34 VSS_71 AD13
R29 PCIE_VSS_35 VSS_72 D11
T29 PCIE_VSS_36 VSS_73 J12
U29 PCIE_VSS_37 VSS_74 K12
W29 PCIE_VSS_38 VSS_75 A13
Y29 PCIE_VSS_39 VSS_76 F13
C AA29 PCIE_VSS_40 VSS_77 E13 C
AB29 PCIE_VSS_41 VSS_78 F15
AD29 PCIE_VSS_42 VSS_79 K16
AE29 PCIE_VSS_43 VSS_80 J21
AF29 PCIE_VSS_44 VSS_81 H16
AG29 PCIE_VSS_45 VSS_82 T15
AJ29 PCIE_VSS_46 VSS_83 V17
AK26 PCIE_VSS_47 VSS_84 C15
AK30 PCIE_VSS_48 VSS_85 C4
AG26 PCIE_VSS_49 VSS_86 U14
N30 PCIE_VSS_50 VSS_87 P15
R31 PCIE_VSS_51 VSS_88 A16
AF30 PCIE_VSS_52 VSS_89 E16
AC30 PCIE_VSS_53 VSS_90 G13
V31 PCIE_VSS_54 VSS_91 G16
P30 PCIE_VSS_55 VSS_92 P17
AA31 PCIE_VSS_56 VSS_93 R16
U30 PCIE_VSS_57 VSS_94 R14
AD31 PCIE_VSS_58 VSS_95 W16
AK32 PCIE_VSS_59 VSS_96 C18
AJ28 PCIE_VSS_60 VSS_97 F16
Y30 PCIE_VSS_61 VSS_98 W18
AJ30 PCIE_VSS_62 VSS_99 U18
AK31 PCIE_VSS_63 VSS_100 AE16
AA23 PCIE_VSS_64 VSS_101 AE17
AG31 PCIE_VSS_65 VSS_102 A19
N24 PCIE_VSS_66 VSS_103 H32
AB23 PCIE_VSS_67 VSS_104 F19
P24 PCIE_VSS_68 VSS_105 G19
R24 PCIE_VSS_69 VSS_106 N8
T24 PCIE_VSS_70 VSS_107 Y7
U24 PCIE_VSS_71 VSS_108 T19
V24 PCIE_VSS_72 VSS_109 V19
W24 PCIE_VSS_73 VSS_110 G21
Y24 PCIE_VSS_74 VSS_111 C21
AC24 PCIE_VSS_75 VSS_112 F21
AH24 PCIE_VSS_76 VSS_113 AE14
B
V25 PCIE_VSS_77 VSS_114 AK16 B
AA25 PCIE_VSS_78 VSS_115 U5
R26 PCIE_VSS_79 VSS_116 F22
AA26 PCIE_VSS_80 VSS_117 F18
T27 PCIE_VSS_81 VSS_118 K30
AE27 PCIE_VSS_82 VSS_119 C24
L21 F24
VSS_120
W23 PCIE_PVSS VSS_121 M24
EV@BLM18PG181SN1D_6 A25
VSS_122
B1 VSS_1 VSS_123 D30
H1 VSS_2 VSS_124 E25
L1 VSS_3 VSS_125 G25
P1 VSS_4 VSS_126 G20
U1 VSS_5 VSS_127 G22
Y1 F27
AD7
AE8
VSS_6
VSS_7
VSS_8
CORE GND VSS_128
VSS_129
VSS_130
E28
H21
AL1 VSS_9 VSS_131 C27
A2 VSS_10 VSS_132 E32
AM2 VSS_11 VSS_133 H28
AD10 VSS_12 VSS_134 J30
E8 VSS_13 VSS_135 K17
H5 VSS_14 VSS_136 K27
K10 VSS_15 VSS_137 M32
M8 VSS_16 VSS_138 A22
T10 VSS_17 VSS_139 C20
E12 VSS_18 VSS_140 E19
AC9 VSS_19 VSS_141 H20
AF14 VSS_20 VSS_142 J24
AD8 VSS_21 VSS_143 M28
C5 VSS_22 VSS_144 J28
F10 VSS_23 VSS_145 J16
J3 VSS_24 VSS_146 F30
L6 VSS_25 VSS_147 L29
M6 VSS_26 VSS_148 A31
P6 VSS_27 VSS_149 B32
AA4 VSS_28 VSS_150 E30
AG11 VSS_29 VSS_151 AE15
A V3 VSS_30 VSS_152 AG23 A
AG16 VSS_31 VSS_153 AD9
R3 VSS_32 VSS_154 AF16
C6 VSS_33 VSS_155 AH10
C9 VSS_34 VSS_156 AJ10
F6 VSS_35 VSS_157 AD15
H7 VSS_36 VSS_158 AH16
J6 VSS_37
VSS_159 K23

EV@M56-P B11 LF PROJECT : ZB1


Quanta Computer Inc.
Size Document Number Rev
M56P 6 OF 7 C

Date: Friday, February 24, 2006 Sheet 21 of 50


5 4 3 2 1
5 4 3 2 1

RV410 MEMORY CHANNELS A and B


Channel B
Channel A
U34D
U34C
<23> MDA[0..63] Part 4 of 7
MAA[0..15] <23>
Part 3 of 7
B12 DQB_0 MAB_0 G4
MDA0 M31 D26 MAA0 C12 E6
MDA1 DQA_0 MAA_0 MAA1 DQB_1 MAB_1
M30 DQA_1 MAA_1 F28 B11 DQB_2 MAB_2 E4
MDA2 L31 D28 MAA2 C11 H4
MDA3 DQA_2 MAA_2 MAA3 DQB_3 MAB_3
L30 DQA_3 MAA_3 D25 C8 DQB_4 MAB_4 J5
MDA4 H30 E24 MAA4 B7 G5
MDA5 DQA_4 MAA_4 MAA5 DQB_5 MAB_5
D
G31 DQA_5 MAA_5 E26 C7 DQB_6 MAB_6 F4 D
MDA6 G30 D27 MAA6 B6 H6

MEMORY INTERFACE
DQA_6 MAA_6 DQB_7 MAB_7

MEMORY INTERFACE
MDA7 F31 F25 MAA7 F12 G3
MDA8 DQA_7 MAA_7 MAA8 DQB_8 MAB_8
M27 DQA_8 MAA_8 C26 D12 DQB_9 MAB_9 G2
MDA9 M29 B26 MAA9 E11 D4
MDA10 DQA_9 MAA_9 MAA10 DQB_10 MAB_10
L28 DQA_10 MAA_10 D29 F11 DQB_11 MAB_11 F2
MDA11 L27 B27 MAA11 F9 F5
MDA12 DQA_11 MAA_11 MAA12 DQB_12 MAB_12
J27 DQA_12 MAA_12 E27 D8 DQB_13 MAB_13 D5
MDA13 H29 E29 MAA13 D7 H2
MDA14 DQA_13 MAA_13 MAA14 DQB_14 MAB_14
G29 DQA_14 MAA_14 B25 F7 DQB_15 MAB_15 H3
MDA15 G27 C25 MAA15 G12
DQA_15 MAA_15 -DQMA[0..7] <23> DQB_16
MDA16 M26 G11
MDA17 DQA_16 DQB_17
L26 DQA_17 H12 DQB_18 DQMBb_0 B8
MDA18 M25 H31 -DQMA0 H11 D9
MDA19 DQA_18 DQMAb_0 -DQMA1 DQB_19 DQMBb_1
L25 DQA_19 DQMAb_1 J29 H9 DQB_20 DQMBb_2 G9
MDA20 J25 J26 -DQMA2 E7 K7
MDA21 DQA_20 DQMAb_2 -DQMA3 DQB_21 DQMBb_3
G28 DQA_21 DQMAb_3 G23 F8 DQB_22 DQMBb_4 M5
MDA22 H27 E21 -DQMA4 G8 V2
DQA_22 DQMAb_4 DQB_23 DQMBb_5

A
MDA23 H26 B15 -DQMA5 G6 W4

B
MDA24 DQA_23 DQMAb_5 -DQMA6 DQB_24 DQMBb_6
F26 DQA_24 DQMAb_6 D14 G7 DQB_25 DQMBb_7 T9
MDA25 G26 J17 -DQMA7 H8
MDA26 DQA_25 DQMAb_7 DQB_26
H25 DQA_26 RDQSA[0..7] <23> J8 DQB_27
MDA27 H24 K8
MDA28 DQA_27 DQB_28
H23 DQA_28 L8 DQB_29 QSB_0 B9
MDA29 H22 J31 RDQSA0 K9 D10
MDA30 DQA_29 QSA_0 RDQSA1 DQB_30 QSB_1
J23 DQA_30 QSA_1 K29 L9 DQB_31 QSB_2 H10
MDA31 J22 K25 RDQSA2 K5 K6
MDA32 DQA_31 QSA_2 RDQSA3 DQB_32 QSB_3
E23 DQA_32 QSA_3 F23 L4 DQB_33 QSB_4 N4

read strobe
read strobe
MDA33 D22 D20 RDQSA4 K4 U2
MDA34 DQA_33 QSA_4 RDQSA5 DQB_34 QSB_5
D23 DQA_34 QSA_5 B16 L5 DQB_35 QSB_6 U4
MDA35 E22 D16 RDQSA6 N5 V8
MDA36 DQA_35 QSA_6 RDQSA7 DQB_36 QSB_7
E20 DQA_36 QSA_7 H15 WDQSA[0..7] <23> N6 DQB_37
MDA37 F20 P4
MDA38 DQA_37 DQB_38
D19 DQA_38 R4 DQB_39 QSB_0B B10
MDA39 D18 K31 WDQSA0 P2 E10
MDA40 DQA_39 QSA_0B WDQSA1 DQB_40 QSB_1B
B19 K28 R2 G10

write strobe
MDA41 DQA_40 QSA_1B WDQSA2 DQB_41 QSB_2B
B18 DQA_41
write strobe
QSA_2B K26 T3 DQB_42 QSB_3B J7
MDA42 C17 G24 WDQSA3 T2 M4
MDA43 DQA_42 QSA_3B WDQSA4 DQB_43 QSB_4B
C B17 DQA_43 QSA_4B D21 W3 DQB_44 QSB_5B U3 C
MDA44 C14 C16 WDQSA5 W2 V4
MDA45 DQA_44 QSA_5B WDQSA6 DQB_45 QSB_6B
B14 DQA_45 QSA_6B D15 Y3 DQB_46 QSB_7B V9
MDA46 C13 J15 WDQSA7 Y2
MDA47 DQA_46 QSA_7B DQB_47
B13 DQA_47 T4 DQB_48 ODTB D6
MDA48 D17 F29 R5 J4
DQA_48 ODTA ODTA0 <23> DQB_49 ODTB1
MDA49 E18 D24 T5
DQA_49 ODTA1 ODTA1 <23> DQB_50
MDA50 E17 T6
MDA51 DQA_50 DQB_51
F17 DQA_51 V5 DQB_52 CLKB0 B4
MDA52 E15 D31 W5 B5
DQA_52 CLKA0 M_CLKA0 <23> DQB_53 CLKB0b
MDA53 E14 E31 W6
DQA_53 CLKA0b -M_CLKA0 <23> DQB_54
MDA54 F14 Y4 C2
MDA55 DQA_54 DQB_55 CKEB0
D13 DQA_55 CKEA0 B30 CKEA <23> R8 DQB_56
MDA56 H18 T8 E2
+1.8V MDA57 DQA_56 DQB_57 RASB0b
H17 DQA_57 RASA0b B28 -RASA <23> R7 DQB_58
MDA58 G18 T7 D3
MDA59 DQA_58 DQB_59 CASB0b
G17 DQA_59 CASA0b C29 -CASA <23> V7 DQB_60
MDA60 G15 W7 B2
MDA61 DQA_60 DQB_61 WEB0b
G14 DQA_61 WEA0b B31 -WEA <23> W8 DQB_62
R436 MDA62 H14 W9 D2
EV@100/F_4 MDA63 DQA_62 DQB_63 CSB0b_0
J14 DQA_63 CSA0b_0 B29 -CSA0 <23> CSB0b_1 E3
CSA0b_1 C28

VRAM_REF0 C31 N2
MVREFD_0 CLKB1
C30 MVREFS_0 CLKA1 B20 M_CLKA1 <23> B3 MVREFD_1 CLKB1b P3
CLKA1b C19 -M_CLKA1 <23> C3 MVREFS_1
R434 C672 L3
EV@100/F_4 EV@.1U-10V_4 CKEB1
CKEA1 C22 CKEA1 <23>
AA3 DRAM_RST RASB1b J2
RASA1b B24 -RASA1 <23>
TEST_MCLK AA5 L2
TEST_MCLK CASB1b
CASA1b B22 -CASA1 <23>
+1.8V TEST_YCLK AA2 M2
TEST_YCLK WEB1b
WEA1b B21 -WEA1 <23>
AA7 MEMTEST CSB1b_0 K2
CSA1b_0 B23 -CSAb0 <23> CSB1b_1 K3

R399
R39

R69
R427 C23
EV@100/F_4 CSA1b_1
B B
EV@M56-P B11 LF

EV@4.7K_4

EV@4.7K_4
EV@M56-P B11 LF

EV@243/F_4
VRAM_REF1 NI
R428 C642
EV@100/F_4 EV@.1U-10V_4

A A

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
M56P 3/4 OF 7 C

Date: Friday, February 24, 2006 Sheet 22 of 50


5 4 3 2 1
5 4 3 2 1

MDA[0..63] <22>
MAA[0..15] <22>
-DQMA[0..7]
RDQSA[0..7]
<22>
<22>
CHAN A DDR2 84BGA 16MX16 MEMORY
WDQSA[0..7] <22>
U10 U6
BA0 L2 B9 MDA3 BA0 L2 B9 MDA41 VGA_MEM_IO
BA1 BA0 DQ15 MDA4 BA1 BA0 DQ15 MDA45
L3 BA1 DQ14 B1 L3 BA1 DQ14 B1
D9 MDA0 D9 MDA40 C62 C637 C30 C23 C632 C26
MMA12_14 DQ13 MDA5 MMA12_14 DQ13 MDA47
R2 A12 DQ12 D1 R2 A12 DQ12 D1
MAA11 P7 D3 MDA7 MAA11 P7 D3 MDA46 EV@4700P-25V_4 EV@10U-10V_8
MAA10 A11 DQ11 MDA2 MAA10 A11 DQ11 MDA43
M2 A10/AP DQ10 D7 M2 A10/AP DQ10 D7
MAA9 P3 C2 MDA6 MAA9 P3 C2 MDA44 EV@220P-50V_4 EV@.1U-10V_4 EV@220P-50V_4 EV@4700P-25V_4
MAA8 A9 DQ9 MDA1 MAA8 A9 DQ9 MDA42
P8 A8 DQ8 C8 P8 A8 DQ8 C8
MAA7 P2 F9 MDA17 MAA7 P2 F9 MDA39 VGA_MEM_IO
MAA6 A7 DQ7 MDA23 MAA6 A7 DQ7 MDA32
N7 A6 DQ6 F1 N7 A6 DQ6 F1
D MAA5 N3 H9 MDA16 MAA5 N3 H9 MDA37 C633 C24 C55 C631 C54 C58 C638 C91 D
MAA4 A5 DQ5 MDA18 MAA4 A5 DQ5 MDA35
N8 A4 DQ4 H1 N8 A4 DQ4 H1
MAA3 N2 H3 MDA19 MAA3 N2 H3 MDA34 EV@4700P-25V_4 EV@10U-10V_8 EV@.1U-10V_4
MAA2 A3 DQ3 MDA22 MAA2 A3 DQ3 MDA38
M7 A2 DQ2 H7 M7 A2 DQ2 H7
MAA1 M3 G2 MDA20 MAA1 M3 G2 MDA33 EV@220P-50V_4 EV@.1U-10V_4 EV@.1U-10V_4 EV@220P-50V_4 EV@4700P-25V_4
MAA0 A1 DQ1 MDA21 MAA0 A1 DQ1 MDA36
M8 A0 DQ0 G8 M8 A0 DQ0 G8
VMEM_VTT

<22> -M_CLKA0 K8 A9 <22> -M_CLKA1 K8 A9 MAA0 R36 EV@56_4


CK VDDQ1 CK VDDQ1 MAA1 R46 EV@56_4
<22> M_CLKA0 J8 CK VDDQ2 C1 <22> M_CLKA1 J8 CK VDDQ2 C1
VDDQ3 C3 VDDQ3 C3 MAA14 R4171 2 EV@0_4 BA0 MAA2 R48 EV@56_4
<22> CKEA K2 C7 <22> CKEA1 K2 C7 MAA15 R1021 2 EV@0_4 BA1 MAA3 R63 EV@56_4
CKE VDDQ4 CKE VDDQ4
VDDQ5 C9 VDDQ5 C9 MAA12 R4121 2 EV@0_4 MMA12_14 MAA4 R38 EV@56_4
E9 E9 MAA5 R43 EV@56_4
VDDQ6 VGA_MEM_IO VDDQ6 VGA_MEM_IO MAA6 R47 EV@56_4
VDDQ7 G1 VDDQ7 G1
<22> -CSA0 L8 G3 <22> -CSAb0 L8 G3 MAA7 R52 EV@56_4
CS VDDQ8 CS VDDQ8 MAA8 R37 EV@56_4
VDDQ9 G7 VDDQ9 G7
<22> -WEA K3 G9 <22> -WEA1 K3 G9 MAA9 R59 EV@56_4
WE VDDQ10 WE VDDQ10 MAA10 R54 EV@56_4
<22> -RASA K7 A1 <22> -RASA1 K7 A1 MAA11 R45 EV@56_4
RAS VDD1 RAS VDD1
VDD2 E1 VDD2 E1
<22> -CASA L7 CAS VDD3 J9 <22> -CASA1 L7 CAS VDD3 J9
M9 L60 M9 L15 BA0 R57 EV@56_4
-DQMA2 VDD4 -DQMA4 VDD4 BA1 R44 EV@56_4
F3 LDM VDD5 R1 F3 LDM VDD5 R1
-DQMA0 B3 EV@BLM18PG181SN1D_6 -DQMA5 B3 EV@BLM18PG181SN1D_6 MMA12_14 R60 EV@56_4
UDM UDM
VDDL J1 VDDL J1
J7 J7 <22> ODTA0 R75 EV@56_4
VSSDL C622 VSSDL C39 R378 EV@56_4
<22> ODTA0 K9 ODT <22> ODTA1 K9 ODT <22> ODTA1
C629 C41
EV@.1U-10V_4 EV@1U-16V_6 EV@.1U-10V_4 EV@1U-16V_6 <22> CKEA R410 EV@56_4
RDQSA2 F7 RDQSA4 F7 R382 EV@56_4
LDQS LDQS <22> CKEA1
VGA_MEM_IO WDQSA2 E8 A7 VGA_MEM_IO WDQSA4 E8 A7
LDQS VSSQ1 LDQS VSSQ1 R79 EV@56_4
VSSQ2 B2 VSSQ2 B2 <22> -CSA0
B8 B8 <22> -CSAb0 R377 EV@56_4
VSSQ3 VSSQ3
C VSSQ4 D2 VSSQ4 D2 C
R416 RDQSA0 B7 D8 R34 RDQSA5 B7 D8 R411 EV@56_4
UDQS VSSQ5 UDQS VSSQ5 <22> -WEA
EV@4.99K/F_4 WDQSA0 A8 E7 EV@4.99K/F_4 WDQSA5 A8 E7 R381 EV@56_4
UDQS VSSQ6 UDQS VSSQ6 <22> -WEA1
VSSQ7 F2 VSSQ7 F2
F8 F8 <22> -CASA R81 EV@56_4
(SSTL-1.8) VREF = .5*VDDQ VSSQ8 (SSTL-1.8) VREF = .5*VDDQ VSSQ8 R379 EV@56_4
J2 VREF VSSQ9 H2 J2 VREF VSSQ9 H2 <22> -CASA1
VSSQ10 H8 VSSQ10 H8
A2 A2 <22> -RASA R73 EV@56_4
R413 C627 NC#A2 R35 C40 NC#A2 R380 EV@56_4
E2 NC#E2 VSS1 A3 E2 NC#E2 VSS1 A3 <22> -RASA1
L1 NC#L1 VSS2 E3 L1 NC#L1 VSS2 E3
EV@.1U-10V_4 R3 J3 EV@.1U-10V_4 R3 J3 FOR M56P AT DDR2 MEMORY SPEEDS ABOVE 350MHZ
EV@4.99K/F_4 NC#R3 VSS3 EV@4.99K/F_4 NC#R3 VSS3 +1.8V VGA_MEM_IO
R7 NC#R7 VSS4 N1 R7 NC#R7 VSS4 N1 MEMORY CONTROL SIGNALS WE,CAS,RAS,CS,CKE,ODT
R8 NC#R8 VSS5 P9 R8 NC#R8 VSS5 P9
AND MEMORY ADDRESS SIGNALS REQUIRE 55 OHM PULLUP
TO A VTT RAIL (50% OF VDDQ)

U35
<20,39,42,44,45,46> MAINON 2 SD VREF 4
U33
BA0 MDA28 U30
L2 BA0 DQ15 B9 +1.8V 5 VDDQ
BA1 L3 B1 MDA26 BA0 L2 B9 MDA57
BA1 DQ14 MDA30 BA1 BA0 DQ15 MDA63
DQ13 D9 L3 BA1 DQ14 B1 6 AVIN VSENSE 3
MMA12_14 R2 D1 MDA25 D9 MDA59
A12 DQ12 DQ13

TGND
MAA11 P7 D3 MDA24 MMA12_14 R2 D1 MDA60 8

GND
A11 DQ11 A12 DQ12 VTT VMEM_VTT
MAA10 M2 D7 MDA31 MAA11 P7 D3 MDA62 +1.8V 7
MAA9 A10/AP DQ10 MDA27 MAA10 A11 DQ11 MDA56 PVIN
P3 A9 DQ9 C2 M2 A10/AP DQ10 D7
MAA8 P8 C8 MDA29 MAA9 P3 C2 MDA61 EV@G2996 C612
MAA7 A8 DQ8 MDA11 MAA8 A9 DQ9 MDA58 C577 C580 C608

9
P2 A7 DQ7 F9 P8 A8 DQ8 C8
MAA6 N7 F1 MDA9 MAA7 P2 F9 MDA55 EV@.1U_4 EV@10U_8
MAA5 A6 DQ6 MDA13 MAA6 A7 DQ7 MDA49 EV@10U_8 EV@.1U_4
N3 A5 DQ5 H9 N7 A6 DQ6 F1
MAA4 N8 H1 MDA10 MAA5 N3 H9 MDA48
MAA3 A4 DQ4 MDA15 MAA4 A5 DQ5 MDA50
N2 A3 DQ3 H3 N8 A4 DQ4 H1
MAA2 M7 H7 MDA14 MAA3 N2 H3 MDA54
MAA1 A2 DQ2 MDA8 MAA2 A3 DQ3 MDA53
B M3 A1 DQ1 G2 M7 A2 DQ2 H7 B
MAA0 M8 G8 MDA12 MAA1 M3 G2 MDA51
A0 DQ0 MAA0 A1 DQ1 MDA52
M8 A0 DQ0 G8
<22> -M_CLKA1 <22> M_CLKA0
<22> -M_CLKA0 K8 CK VDDQ1 A9
<22> M_CLKA0 J8 CK VDDQ2 C1 <22> -M_CLKA1 K8 CK VDDQ1 A9 <22> M_CLKA1 <22> -M_CLKA0
VDDQ3 C3 <22> M_CLKA1 J8 CK VDDQ2 C1
<22> CKEA K2 CKE VDDQ4 C7 VDDQ3 C3
C9 <22> CKEA1 K2 C7 R30 R31 R87 R86
VDDQ5 CKE VDDQ4 EV@56_4 EV@56_4 EV@56_4 EV@56_4
VDDQ6 E9 VDDQ5 C9
G1 VGA_MEM_IO E9
VDDQ7 VDDQ6 VGA_MEM_IO
<22> -CSA0 L8 CS VDDQ8 G3 VDDQ7 G1
VDDQ9 G7 <22> -CSAb0 L8 CS VDDQ8 G3
<22> -WEA K3 WE VDDQ10 G9 VDDQ9 G7
<22> -WEA1 K3 WE VDDQ10 G9
<22> -RASA K7 A1 C22 C88
RAS VDD1 EV@470P_4 EV@470P_4
VDD2 E1 <22> -RASA1 K7 RAS VDD1 A1
<22> -CASA L7 CAS VDD3 J9 VDD2 E1
M9 L18 <22> -CASA1 L7 J9
-DQMA1 VDD4 CAS VDD3 L13
F3 LDM VDD5 R1 VDD4 M9
-DQMA3 B3 EV@BLM18PG181SN1D_6 -DQMA6 F3 R1
UDM -DQMA7 LDM VDD5 EV@BLM18PG181SN1D_6
VDDL J1 B3 UDM
VSSDL J7 VDDL J1 VGA_MEM_IO
ODTA0 K9 C66 J7
ODT C74 ODTA1 VSSDL C36 C25 C617 C56 C53 C623 C572 C639
K9 ODT
EV@.1U-10V_4 EV@1U-16V_6 C34
RDQSA1 F7 EV@.1U-10V_4 EV@1U-16V_6 EV@4700P-25V_4 EV@10U-10V_8 EV@.1U-10V_4
VGA_MEM_IO WDQSA1 LDQS RDQSA6
E8 LDQS VSSQ1 A7 F7 LDQS
B2 VGA_MEM_IO WDQSA6 E8 A7 EV@220P-50V_4 EV@.1U-10V_4 EV@.1U-10V_4 EV@220P-50V_4
VSSQ2 LDQS VSSQ1
VSSQ3 B8 VSSQ2 B2
VSSQ4 D2 VSSQ3 B8
R82 RDQSA3 B7 D8 D2
EV@4.99K/F_4 WDQSA3 UDQS VSSQ5 R33 RDQSA7 VSSQ4 VGA_MEM_IO
A8 UDQS VSSQ6 E7 B7 UDQS VSSQ5 D8
F2 EV@4.99K/F_4 WDQSA7 A8 E7
VSSQ7 UDQS VSSQ6 C570 C27 C571 C29 C28 C86 C574
A VSSQ8 F8 VSSQ7 F2 A
(SSTL-1.8) VREF = .5*VDDQ J2 H2 F8
VREF VSSQ9 (SSTL-1.8) VREF = .5*VDDQ VSSQ8 EV@4700P-25V_4 EV@10U-10V_8 EV@.1U-10V_4
VSSQ10 H8 J2 VREF VSSQ9 H2
A2 NC#A2 VSSQ10 H8
R77 C75 E2 A3 A2 EV@.1U-10V_4 EV@.1U-10V_4 EV@220P-50V_4 EV@4700P-25V_4
NC#E2 VSS1 R32 C35 NC#A2
L1 NC#L1 VSS2 E3 E2 NC#E2 VSS1 A3
EV@.1U-10V_4 R3 J3 L1 E3
EV@4.99K/F_4 NC#R3 VSS3 EV@.1U-10V_4 NC#L1 VSS2
R7 NC#R7 VSS4 N1 R3 NC#R3 VSS3 J3
R8 P9 EV@4.99K/F_4 R7 N1
NC#R8 VSS5
R8
NC#R7
NC#R8
VSS4
VSS5 P9 PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
VRAM DDR2 C
Date: Friday, February 24, 2006 Sheet 23 of 50
5 4 3 2 1
1 2 3 4 5 6 7 8

OPTION STRAPS
M56-P Strap
STRAPS PIN DESCRIPTION Board
DEFAULT
GPIO[13..0] +3V TX_PWRS_ENB GPIO0 1
<19> GPIO[13..0]
Transmitter Power Saving Enable 0:
50% Tx output swing 1.full Tx
output swing

GPIO0 R395 EV@10K_4 TX_DEEMPH_EN GPIO1 Transmitter De-emphasis Enable 0: 1


A A
Tx de-emphasis disabled 1.Tx
Overlap pads to save space de-emphasis enabled
GPIO1 R388 EV@10K_4
and to prevent assembly of
both resistors. GPIO(3:2) RSVD
GPIO5 R390 EV@10K_4

Layout GPIO8 R40 *10K_4

2/4 Add by Max 0


DEBUG_ACCESS GPIO4 Strap to set the debug muxes to bring out DEBUG signals even if
GPIO9 R51 APSID@10K_410K_4
registers are inaccessible
Ground High logic voltage GPIO11 R398 APSID@10K_4

GPIO12 R41 APSID@10K_4


Signal
GPIO5 RSVD
GPIO13 R50 APSID@10K_4
GPIO(9,13:11)
1000 - Parallel ROM, chip IDis from ROM
1001 - Serial AT25F1024 ROM (Atmel), chip IDis from ROM
Add Text "Populate to Enable Debug" 1010 - Serial AT45DB011 ROM (Atmel), chip IDis from ROM GPIO6 RSVD
1011 - Serial M25P10 ROM (ST), chip IDis from ROM
Beside JU23 on Silkscreen. 1100 - Serial M25P05 ROM (ST), chip IDis from ROM
1100 - Serial NX25F011B ROM (ISSI), chip IDis from ROM
000x - No ROM, MEM_AP_SIZE=00 128M
001x - No Rom, MEM_AP_SIZE=01 256M Use M25P10 ROM for HDCP
010x - No Rom, MEM_AP_SIZE=10 64M Force_ GPIO8 Force chip to get to compliance state quickly for Tester purposes 0
011x - No ROM,MEM_AP_SIZE=11 Reserved Compliance
R90 EV@10K_4
<19,26> VSYNC_DAC1
If no ROM attached, comtrols chip IDis. If rom attached identifies ROM type
B ROMIDCFG(3:0) GPIO(9,13:11) 000x - No ROM, MEM_AP_SIZE=00 128M B
001x - No Rom, MEM_AP_SIZE=01 256M 000
010x - No Rom, MEM_AP_SIZE=10 64M
011x - No ROM,MEM_AP_SIZE=11 Reserved
R94 EV@10K_4
<19,26> HSYNC_DAC1
1000 - Parallel ROM, chip IDis from ROM
Memory identification for BIOS 1001 - Serial AT25F1024 ROM (Atmel), chip IDis from ROM
00 - DDR2 16X16X4pcs 128MB 1010 - Serial AT45DB011 ROM (Atmel), chip IDis from ROM
01 - DDR2 32X16X4pcs 256MB R56 MEMID@10K_4 1011 - Serial M25P10 ROM (ST), chip IDis from ROM
10 - DDR2 16X16X2pcs 64MB 1100 - Serial M25P05 ROM (ST), chip IDis from ROM
11 - DDR2 32X16X2pcs 128MB R64 MEMID@10K_4 1100 - Serial NX25F011B ROM (ISSI), chip IDis from ROM
<19> MEMTYP_0
R53 MEMID@10K_4
Memory ID Indicates if any slave VIP host devices drove this pin low
R68 MEMID@10K_4
<19> MEMTYP_1 VIP_DEVICE VSYNC during reset. 0- Slave VIP host port deviced present. No
1-No slave VIP port devices reporting presence during
default
reset
R101 *10K_4
<19> GENERICC
H2SYNC,
R100 EV@10K_4 RSVD
V2SYNC,
GENERICC

VSYNC RSVD

HSYNC RSVD

RSVD
PCIE_TEST

C C

00

Board Straps REV. 0.3


STRAPS PIN DESCRIPTION VALUE

MEMTYPE(1:0) GPIO25,26 Memory identification for BIOS


00 - DDR2 16X16X4pcs 128MB
01 - DDR2 32X16X4pcs 256MB
+1.8V +3V +1.8V 10 - DDR2 16X16X2pcs 64MB
11 - DDR2 32X16X2pcs 128MB
R386 EV@10K_4
R49 EV@10K_4
R387 EV@10K_4 DC_Strap1 GPIO(10) Internal TMDS Enabled
0 - Disabled
1 - Enabled
1
<19> DC_Strap3
DC_Strap1
DC_Strap2 <19> <19> GPIO10
DC_Strap2 LCDDATA(13) Video Capture Enabled 0
DC_Strap4 <19> 0 - Disabled
1 - Not detected
R42 *10K_4
R392 EV@10K_4
DC_Strap3 LCDDATA(14) HDTV out detect 1
0 - Detected
1 - Enabled

D D

DC_Strap4, LCDDATA(15,19) Video capture enable


DEMUX_SEL 00 - DAC2 Off 01
01 - DAC2 On as CRT
10 - DAC2 On as TVOUT
11 - DAC2 On as TVOUT and CRT

PAL/NTSC LCDDATA(18) TVO Standard Default (Resistor pull-up and switch short to GND) 1 PROJECT : ZB1
0 - PAL (on board resistor pull-down and switch closed)
1 -NTSC (on board resistor pull-up)
Quanta Computer Inc.
Size Document Number Rev
M56P OPTION STRAPS C

Date: Wednesday, March 01, 2006 Sheet 24 of 50


1 2 3 4 5 6 7 8
5 4 3 2 1

TV_C/R_SYS TV_Y/G_SYS TV_COMP_SYS


DVI-I CONNECTOR (DVI-D)
+5V DVI PORT For EMI

3
CN19 RP6 DI@0_4P2R_S
TX2-_OB_R 1 2 TX2+_OB_R 3 4 TX2+_OB
1 2 TX2-_OB_R TX2-_OB
3 3 4 4 1 2
5 5 6 6 DVI_DDCCLK <42>

2
<42> DVI_DDCDATA 7 7 8 8
F5 TX1-_OB_R 9 10 TX1+_OB_R 3 4 TX1+_OB D8 D22 D9
9 10 TX1-_OB_R TX1-_OB SV@DA204U SV@DA204U SV@DA204U
DI@POLY_SWITCH_1.1A 11 11 12 12 1 2
13 14 +5V_DIN RP7 DI@0_4P2R_S
13 14 +3V +3V +3V
15 16 R8 DI@20K_4 DVI_DET RP8 DI@0_4P2R_S
TX0-_OB_R 15 16 TX0+_OB_R TX0+_OB

2
17 17 18 18 3 4
DI@BLM18PG181SN1D_6 19 20 TX0-_OB_R 1 2 TX0-_OB
D
L49 19 20 CN28 D
21 21 22 22
+5V_DIN CLK+_OB_R 23 24 CLK-_OB_R 3 4 CLK-_OB
23 24

6
25 26 CLK+_OB_R 1 2 CLK+_OB L29 SV@BLM18PG181SN1D_6 L33 SV@BLM18PG181SN1D_6
25 26 RP5 DI@0_4P2R_S TV_C/R_SYS TV-CHROMA TV-LUMA TV_Y/G_SYS
3 4

6
3 4

C522 C520 DI@SUYIN 070939FR024S535PR_DVI


DI@.1U-10V_4 R130 C174 C193 C223 C219 R166
DI@.1U-10V_4 S-VIDEO 9 9 8 8

SV@6P-50V_4 SV@6P-50V_4 SV@6P-50V_4 SV@6P-50V_4


Place close to SV@150/F_4 SV@150/F_4
the connector
1 1 2 2

5
U25
+3V PN

5
0B1 31 DVI_CLK- <42>
+3V +3V 30 SV@TV_OUT
1B1 DVI_CLK+ <42>
35 26 L31 SV@BLM18PG181SN1D_6
R10 R9 VDD 2B1
3B1 25
DVI_TX0- <42>
DVI_TX0+ <42>
TV Out (SVHS) MiniDIN 7-pin TV-COMP TV_COMP_SYS

DI@10K_4 DI@100K_4 CLK-_7307 36 22


A0 4B1 DVI_TX1- <42>
CLK+_7307 1 21 R151
A1 5B1 DVI_TX1+ <42>
TMDS_HPD C202 C207
<19,41,42> TMDS_HPD
TX0-_7307 2 18 SV@150/F_4
A2 6B1 DVI_TX2- <42>
3

TX0+_7307 3 17 SV@6P-50V_4 SV@6P-50V_4


A3 7B1 DVI_TX2+ <42>
Q5 Q4 TX1-_7307 7 12
DVI_DET TX1+_7307 A4 0LED1
2 2 8 A5 1LED1 13
DI@2N7002 DI@2N7002 +3V 14
TX2-_7307 2LED1
9 A6
TX2+_7307 10 29 CLK-_OB 1 2 CLK-_7307
A7 0B2 CLK+_OB CLK+_7307 U14
1B2 28 3 4
R694 RP111 NZ@0_4P2R_S +5V
1

4 LED0 VCC 16
5 24 TX0-_OB 1 2 TX0-_7307 TV_Y/G 4 2 TV_Y/G_SYS
EZ@10K_4 LED1 2B2 TX0+_OB TX0+_7307 C_A A0 TV_Y/G_PR
6 LED2 3B2 23 3 4 A1 3 TV_Y/G_PR <42>
RP112 NZ@0_4P2R_S TV_C/R 7 5 TV_C/R_SYS
EZ@BAS316 TX1-_OB TX1-_7307 C_B B0 TV_C/R_PR
C
4B2 20 1 2 B1 6 TV_C/R_PR <42> C
1 2 27 19 TX1+_OB 3 4 TX1+_7307 TV_COMP 9 11 TV_COMP_SYS
<16,28,42> DOCKIN# SEL 5B2 C_C C0
D31 RP113 NZ@0_4P2R_S 10 TV_COMP_PR
RP17 C1 TV_COMP_PR <42>
16 TX2-_OB 1 2 TX2-_7307 12 14
CLK-_7307 6B2 TX2+_OB TX2+_7307 C_D D0
<19> TXCM_EX 1 2 CLK-_7307 <41> 7B2 15 3 4 D1 13
3 4 CLK+_7307 11 RP114 NZ@0_4P2R_S PR_INSERT_5V 1
<19> TXCP_EX CLK+_7307 <41> GND <26,42> PR_INSERT_5V SE
0LED2 34 15 EN# GND 8
RP20
1LED2 33
<19> TX0M_EX 1 EV@0_4P2R_S
2 TX0-_7307
TX0-_7307 <41> 2LED2 32 EZ@PI5C3257
3 4 TX0+_7307
<19> TX0P_EX TX0+_7307 <41>
EZ@MAX4892
RP22

<19> TX1M_EX 1 EV@0_4P2R_S


2 TX1-_7307
TX1-_7307 <41>
3 4 TX1+_7307 R165 IV@0_4 TV_Y/G
<19> TX1P_EX TX1+_7307 <41> <8> INT_TV_Y/G
RP24 R132 IV@0_4 TV_C/R
SEL FUN <8> INT_TV_C/R
<19> TX2M_EX 1 EV@0_4P2R_S
2 TX2-_7307
TX2-_7307 <41>
3 4 TX2+_7307 H B2 R147 IV@0_4 TV_COMP
<19> TX2P_EX TX2+_7307 <41> <8> INT_TV_COMP
L B1
EV@0_4P2R_S R172 NZ@0_4 R171 EV@0_4 TV_Y/G
<19> Y_DAC2
TV_Y/G 1 2 TV_Y/G_SYS
R128 EV@0_4 TV_C/R
<19> C_DAC2
R129 NZ@0_4
TV_C/R 1 2 TV_C/R_SYS R148 EV@0_4 TV_COMP
<19> COMP_DAC2
R153 NZ@0_4
+3V TV_COMP 1 2 TV_COMP_SYS

ADD CIRCUITS WHEN NO DOCKING


R376 PULL HIGH TO +3V_S5 AT PAGE19
10K_4
TRACE
DISPON 2
D19
1 LID591#
+3V
U28
80MIL
LID591# <16,39>
R362 0_8
B B
BAS316 C563 6 1 LCDVCC_1 LCDVCC
IN OUT
EV@.1U-10V_4 4 2 C554 C564 C553 C552 C550
Lid Switch IN GND
DISP_ON 3 5 EV@.1U-10V_410U-10V_8 EV@.1U-10V_4EV@.01U-16V_4
10U-10V_8
<8,20> LVDS_DIGON ON/OFF GND

D18 AAT4280_3
2 1 CN5 R701
1
2

LVDS_BLON <8,20>
LID_CONN
BAS316 100K_4
C945 1000P-50V_4
R702 CN4
R375 *1K_4
100K_4 +5V +3V CN6
1 2 TXUCLKOUT- TXUOUT2-
LCDVCC 3 4 <8,20> TXUCLKOUT- 1 21 TXUOUT2- <8,20>
VADJ TXUCLKOUT+ TXUOUT2+
5 6 <8,20> TXUCLKOUT+ 2 22 TXUOUT2+ <8,20>
3

EC_FPBACK# <39> 7 8 3 23
DISPON <8,20> TXUOUT0- TXUOUT0- TXUOUT1-
INVCC0 9 10 4 24 TXUOUT1- <8,20>
2 <8,20> TXUOUT0+ TXUOUT0+ TXUOUT1+
11 12 5 25 TXUOUT1+ <8,20>
Q25 TXUOUT1+
DTC144EU +2.5V +2.5V +3V 13 14 TXUOUT1- TXLOUT2- 6 26 INVCC0 R360 0_8 VIN
15 16 <8,20> TXLOUT2- 7 27
TXUOUT2+ <8,20> TXLOUT2+ TXLOUT2+
TXUOUT2- 17 18 TXLCLKOUT+ 8 28 VADJ L50
1

19 20 9 29 CONTRAST <39>
LCD_EDIDDATA TXLCLKOUT- <8,20> TXLOUT1- TXLOUT1- DISPON BLM18PG181SN1D_6
LCD_EDIDCLK 21 22 TXLOUT1+ 10 30
23 24 <8,20> TXLOUT1+ 11 31
R447 R451 TXLOUT0+ TXLOUT1+ C561 EV@.1U-10V_4
10K_4 TXLOUT0- 25 26 TXLOUT1- TXLOUT0- 12 32
EV@2.2K_4 27 28 <8,20> TXLOUT0- 13 33
2

Q32 <8,20> TXLOUT0+ TXLOUT0+ LCDVCC


TXLOUT2+ 29 30 14 34
LCD_EDIDCLK TXLOUT2- 31 32 TXLCLKOUT- 15 35
<19> LVDS_CLK 1 3 33 34 <8,20> TXLCLKOUT- 16 36 +5V
TXLCLKOUT+
35 36 <8,20> TXLCLKOUT+ 17 37 VIN
EV@FDV301N TXUCLKOUT+ TXUOUT0+
TXUCLKOUT- 37 38 TXUOUT0- LCD_EDIDCLK R20 18 38
39 40 1 2 0_4 19 39
LCD_EDIDDATA R19 1 2 0_4 +3V
<8> EDIDCLK 20 40
ACES_88242-40XX_LVDS
41 43

1
C544 C539

45

46
+2.5V +2.5V +3V 42 44
A Reserved for wire solution + A
1000P-50V_4
*10U-25V_1210
*FOXCONN_LVDS

2
R448
EV@2.2K_4 R453
2

Q33 10K_4

1 3 LCD_EDIDDATA
<19> LVDS_DAT
EV@FDV301N PROJECT : ZB1
<8> EDIDDATA
Quanta Computer Inc.
ADD LEVEL SHIFT FOR EDID Size Document Number Rev
To GMCH
LVDS DVI-I TV-OUT CONNECTOR C

Date: Friday, February 24, 2006 Sheet 25 of 50


5 4 3 2 1
1 2 3 4 5 6 7 8

+5V

near switch

C547
EZ@.1U-10V_4
R368 EV@0_4 VGA_RED
<19> R_DAC1
R370 EV@0_4 VGA_GRN
<19> G_DAC1
R22 EV@0_4 VGA_BLU
<19> B_DAC1 U26
16 +5V
VGA_RED VCC VGA_RED_SYS
4 C_A A0 2
RN4 EV@0_4P2R_S 3 VGA_RED_PR
A1 VGA_RED_PR <42>
3 4 VSYNC VGA_GRN 7 5 VGA_GRN_SYS
<19,24> VSYNC_DAC1 C_B B0
1 2 HSYNC 6 VGA_GRN_PR
A <19,24> HSYNC_DAC1 B1 VGA_GRN_PR <42> A
VGA_BLU 9 11 VGA_BLU_SYS
C_C C0 VGA_BLU_PR
C1 10 VGA_BLU_PR <42>
RN7 3 4 EV@0_4P2R_S
CRTDCLK 12 14
<19> CRT1DDCCLK CRTDDAT C_D D0
<19> CRT1DDCDATA 1 2 D1 13
PR_INSERT_5V 1
<25,42> PR_INSERT_5V SE
15 EN# GND 8

EZ@PI5C3257

R366 IV@0_4 VGA_RED


<8> INT_VGA_RED
R369 IV@0_4 VGA_GRN
<8> INT_VGA_GRN
R23 IV@0_4 VGA_BLU
<8> INT_VGA_BLU

RN6 IV@0_4P2R_S
1 2 VSYNC R363 NZ@0_4
<8> INT_VSYNC
3 4 HSYNC VGA_RED 1 2 VGA_RED_SYS SEL FUNCTION
<8> INT_HSYNC
R364 NZ@0_4 LOW IN_B0
RN5 1 2 IV@0_4P2R_S
CRTDCLK VGA_GRN 1 2 VGA_GRN_SYS
<8> INT_DDCCLK
3 4 CRTDDAT HIGH IN_B1
<8> INT_DDCDAT
R350 NZ@0_4
VGA_BLU 1 2 VGA_BLU_SYS

Input option

<16> CRT_SENSE#
C562 EV@.1U-10V_4

B B

F4
CRTVDD2 CRTVDD3 CN22

16
+5V 2 1 2 1
D16 SSM14
POLY_SWITCH_1.1A
25 MIL CRT_DFDS15FR0G6
6 D15
VGA_RED_SYS L8 BLM18BA220SN1_6 CRT_R1 1 11 R361 0_4 1 2
7
VGA_GRN_SYS L9 BLM18BA220SN1_6 CRT_G1 2 12 MTW355
8
VGA_BLU_SYS L10 BLM18BA220SN1_6 CRT_B1 3 13
9
4 14
R24 C10 R25 C14 R26 C16 C15 C12 C8 10
5 15
10P-50V_4 150/F_4 10P-50V_4 150/F_4 10P-50V_4 10P-50V_410P-50V_4
10P-50V_4
150/F_4
System Auto Detect External CRT Device

17
+3VPCU
R7059 R7058 R27
Enable Not stuffed Stuffed Stuffed
R769 Disable (Default) Stuffed Not stuffed Stuffed
CRT_IN# 10K_4

R770
CRT_IN#
<39> CRT_IN#_EC
VSYNC_EZ4 <42>
*0_4 R771
HSYNC_EZ4 <42>
0_4
1/25 by Max
U5
CRTVDD3 1 16 VSYNC1 L12 BLM18BA220SN1_6 CRTVSYNC
VCC_SYNC SYNC_OUT2 HSYNC1 L11 BLM18BA220SN1_6 CRTHSYNC
C +5V SYNC_OUT1 14 C
7 VCC_DDC
C952 .22U-6.3V_4 8 C17 C558
BYP VSYNC
SYNC_IN2 15
2 13 HSYNC 10P-50V_4
+3V VCC_VIDEO SYNC_IN1 CRTVDD3 10P-50V_4

VGA_RED_SYS 3 10 CRTDCLK R28 R29


VGA_GRN_SYS VIDEO_1 DDC_IN1 CRTDDAT
4 VIDEO_2 DDC_IN2 11
VGA_BLU_SYS 5 2.7K_4 2.7K_4
VIDEO_3 DDCCLK_1
DDC_OUT1 9 DDCCLK_1 <42>
6 12 DDCDAT_1
GND DDC_OUT2 DDCDAT_1 <42>
CM2009
C18 C551

10P-50V_4 10P-50V_4

+5V

C519
.1U-10V_4

+3V

C540
.1U-10V_4

D D

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
CRT-PORT C

Date: Wednesday, March 01, 2006 Sheet 26 of 50


1 2 3 4 5 6 7 8
5 4 3 2 1
AJ057890T19
NL@ 4401E
G5@ 5705E&5788E
G7@ 5787
G9@ 5789 Stuff for 4401E & 5705E &5788E
+3V_S5 +3V_LAN_VESD Stuff for 4401E&5705E&5788E&5789 +3V_LAN +3V_S5
GL@ 5705E&5788E&5787&5789
R709 NL_G5@0_8 C753 NL_G5_G8_G9@10U-10V_8 C742 10U-10V_8 VAUX_25 Stuff for 5789 Stuff for 5705E&5788E&5787&5789
C211 NL_G5_G8_G9@.1U-10V_4 C732 .1U-10V_4
+3V_LAN C198 NL_G5_G8_G9@.1U-10V_4 C736 .1U-10V_4 +3V_S5 VAUX_25 VAUX_33_25
C208 NL_G5_G8_G9@.1U-10V_4 C705 .1U-10V_4 C947
R710 G9@0_8 C185 NL_G5_G8_G9@.1U-10V_4 C175 .1U-10V_4 + R457 GL@0_8

Stuff for 5789 G9@100U-6.3V_3528


R146 NL@0_8
D D

Stuff for 4401E

VAUX_33_25
+3V_S5 Stuff for 4401E +3V_LAN Stuff for 5705E&5788E&5787&5789
L65 G5_G7_G9@BLM11A601S _6
R484 NL@0_8 VAUX_25 L25 G5_G7_G9@BLM11A601S _6

+3V +3V_LAN +3V_LAN_VESD +3V_S5 C229 GL@.1U-10V_4 Stuff for 5705E&5788E&5787&5789


C228 GL@.1U-10V_4
R489 G5_G9@0_8 BIASVDD
L66 BLM11A601S_6
Stuff for 5705E & 5788E & 5789 L26 BLM11A601S_6

M12
G11
D11

K12

A14
G1

G2
C5
A7
B3

E1
E4

K3

P2

P1

A1
L4
VAUX_18_12 VAUX_18_12 U39 VAUX_25

VDDIO
VDDIO
VDDIO

DC

BIASVDD
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI

VESD1
VESD2
VESD3
C746 10U-10V_8 K4 A8 BIASVDD C711 .1U-10V_4
C704 .1U-10V_4 VDDC DC/VDDP XTALVDD C703 .1U-10V_4
J4 VDDC DC/VDDP D5
C677 .1U-10V_4 K8 P13
VAUX_18_12 C197 .1U-10V_4 VDDC DC/VDDP
K7 VDDC Stuff for 5705E&5788E&5787&5789
C196 .1U-10V_4 K6 H14 XTALVDD
L62 BLM11A601S_6 AVDDL C189 .1U-10V_4 VDDC XTALVDD AVDD_A13 AVDD_A13 C165 G5_G7_G9@.1U-10V_4
K5 VDDC DC/AVDD A13
C646 4.7U-10V_8 C191 .1U-10V_4 J10 F14 AVDD_F14 AVDD_F14 C702 G5_G7_G9@.1U-10V_4
C674 1U-16V_6 C188 .1U-10V_4 VDDC AVDD
J5 VDDC
C192 .1U-10V_4 G4
C743 .1U-10V_4 VDDC
F10 VDDC DC L5
L63 BLM11A601S_6 PLLVDD F5 K9
C647 4.7U-10V_8 VDDC DC
E10 VDDC DC L11 Stuff for 5705E&5788E&5789
C675 1U-16V_6 E9 M11
VDDC DC
E8 H11

L30 G7_G9@BLM11A601S_6 PCIE_PLLVDD


E7
E6
VDDC
VDDC
VDDC
4401E/578X/5705E DC
DC
DC
M9
K10
C700 C699

C199 G7_G9@4.7U-10V_8 E5 15mm x 15mm L8 G5_G9@.1U-10V_4 G5_G9@.1U-10V_4


C190 G7_G9@1U-16V_6 VDDC DC
B8 VDDC
AVDDL
BGA196 EXT_POR_4401E/PTEST L9
SPROM_DOUT R444 R443 R442 R441
F13 EPHY_AVDD_4401E/AVDDL SPROM_DOUT_4401E/DC J11
C L32 G7_G9@BLM11A601S_6 PCIE_SDS_VDD F12 N13 SPROM_DIN C
C217 G7_G9@4.7U-10V_8 PLLVDD EPHY_AVDD_4401E/AVDDL SPROM_DIN_4401E/DC
G14 PLLVDD_4401E/GPHY_PLLVDD
C209 G7_G9@1U-16V_6 PCIE_PLLVDD M8 G5_G9@49.9/F_4 G5_G9@49.9/F_4 G5_G9@49.9/F_4 G5_G9@49.9/F_4
PCIE_SDS_VDD DC_4401E/PCIE_PLLVDD TRD3-
M6 DC_4401E/PCIE_SDSVDD DC_4401E/TRD3- E14 TRD3- <28>
Stuff for 5787 & 5789 E13 TRD3+
DC_4401E/TRD3+ TRD3+ <28>
AD[0..31]
Stuff for 4401E & 5705E &5788E TRD2-
<15,29,30> AD[0..31] DC_4401E/TRD2- D14 TRD2- <28>
AD0 R711 NL_G5@0_4 L_AD0 M7 D13 TRD2+
AD00_4401E/NC* DC_4401E/TRD2+ TRD2+ <28>
AD1 R712 NL_G5@0_4 L_AD1 N7
AD2 R713 NL_G5@0_4 L_AD2 AD01_4401E/NC* TRD1-
P7 AD02_4401E/NC* TRD1- C14 TRD1- <28>
AD3 R714 NL_G5@0_4 L_AD3 P5 C13 TRD1+
AD03_4401E/NC* TRD1+ TRD1+ <28>
AD4 R715 NL_G5@0_4 L_AD4 N5
AD5 R716 NL_G5@0_4 L_AD5 AD04_4401E/NC* TRD0-
M5 AD05_4401E/NC* TRD0- B14 TRD0- <28>
AD6 P4 B13 TRD0+
AD06_4401E/NC* TRD0+ TRD0+ <28>
AD7 N4
AD8 AD07_4401E/NC* R438 R439
P3 AD08_4401E/NC*
AD9 N3 A11 LINKLED# Stuff for 4401E&5705E&5788E&5789
AD10 AD09_4401E/NC* LINKLED# SPD100LED#
N2 AD10_4401E/NC* SPD100LED# B11
AD11 R730 NL_G5@0_4 L_AD11 M1 A12 SPD1000LED# NL_G5_G9@49.9/F_4 NL_G5_G9@49.9/F_4
AD12 AD11_4401E/NC* COL_LED_4401E/SPD1000LED# LAN_ACTLED#
M2 AD12_4401E/NC* TRAFFICLED# B10 LAN_ACTLED# <28>
AD13 M3 R437 R440 Stuff for 5705E&5788E&5789
AD14 R731 NL_G5@0_4 L_AD14 L1 AD13_4401E/NC* R175 NL@0_4 +3V_S5
AD15 AD14_4401E/NC*
AD16 R732 NL_G5@0_4
L2
L_AD16 K1 AD15_4401E/NC* VREF_4401E/NC K13 Stuff for 4401E NL_G5_G9@49.9/F_4 NL_G5_G9@49.9/F_4 R163 G5_G9@1K_4
AD16_4401E/NC* TEST_MODE_4401E/LOW_PWR L6
+3V Stuff for 5787 AD17 E3 L7 R478 G5_G9@1K_4
AD18 AD17_4401E/NC* NC R695 G7@4.7K_4 R477 G5_G9@1K_4
D1 AD18_4401E/NC* NC L12
R696 G7@4.7K_4 L_CBE1# AD19 D2 Stuff for 5787
R717 G7@0_4 L_AD0 AD20 AD19_4401E/NC* C697 C698
D3 AD20_4401E/NC*
R718 G7@0_4 L_AD1 AD21 C1 G12 R121 10K_4 +3V_S5
R719 G7@0_4 L_AD2 AD22 AD21_4401E/NC* GPIO0_4401E/TEST_CLK WP NL_G5_G9@.1U-10V_4 NL_G5_G9@.1U-10V_4 U42
B1 AD22_4401E/NC* GPIO1 H13
R720 G7@0_4 L_AD3 AD23 B2 G13 R445 G9@10K_4 8 VCC 1 C739
R721 G7@0_4 L_AD4 AD24 AD23_4401E/NC* DC_4401E/GPIO2 WP A0
D4 AD24_4401E/NC* Stuff for 5789 7 WP# A1 2
R722 G7@0_4 L_AD5 AD25 A5 L10 SPROM_CS# SPROM_CLK 6 SCL 3 GL@.1U-10V_4
AD26 AD25_4401E/NC* SPROM_CS#_4401E/EEDATA SPROM_CLK SPROM_CS# A3
B5 AD26_4401E/NC* SPROM_CLK_4401E/EECLK K11 5 SDA GND 4
AD27 B6 LINKLED# R458 0_4
AD28 AD27_4401E/NC* SPD100LED# R456 0_4 LAN_LINKLED# GL@AT24C128
C6 AD28_4401E/NC* LAN_LINKLED# <28>
+3V +3V_S5 Stuff for 5787 AD29 C7 E11 Stuff for 5705E&5788E&5787&5789
AD30 AD29_4401E/NC* EECLK_4401E/SCLK SPD1000LED# R452 GL@0_4
B
R723 G7@4.7K_4 BCMA02 AD31
C8 AD30_4401E/NC* EEDATA_4401E/SI E12 Stuff for 5705E&5788E&5787&5789 B
C9 AD31_4401E/NC* DC_4401E/SO F11
C12 R753 G7@0_4 Stuff for 4401E +3V_S5
CBE0# DC_4401E/CS# U41
<15,29,30> CBE0# M4 C_BE0#_4401E/DC
Stuff for 5789 L_CBE1# L3 Stuff for 5787 SPROM_CS# 1 8
CBE2# C_BE1#_4401E/DC SPROM_CLK CS VCC
<15,29,30> CBE2# F3 C_BE2#_4401E/DC DC_4401E/WOL_INRSH P14 2 SK NC 7
R482 G9@4.7K_4 L_CBE3# C4 M13 +3V_S5 +3V_S5 SPROM_DOUT 3 6 C751
C_BE3#_4401E/DC DC_4401E/VAUX_ON# SPROM_DIN DI ORG
DC_4401E/VMAIN_ON# N14 4 DO GND 5
REQ1# C3 J12 VAUXPRSNT R446 4.7K_4 .1U-10V_4
<15> REQ1# REQ#_4401E/DC VAUXPRSNT
PCIE_WAKE# R479 G7_G9@0_4 BCMA06 GNT1# J3 C681 10U-10V_8 NL@AT93C46
<16,29> PCIE_WAKE# <15> GNT1# GNT#_4401E/DC
Stuff for 5787 & 5789 FRAME# F2 M10 BCMM10 C706 .1U-10V_4
<15,29,30> FRAME# FRAME#_4401E/DC NC

3
IRDY# F1 N11 BCMN11 Q49
<15,29,30> IRDY# IRDY#_4401E/DC NC
TRDY# G3 P11 BCMP11 Stuff for 5705E&5788E&5787

E
<15,29,30> TRDY# TRDY#_4401E/DC NC
L_DEVSEL# H3 1 VAUX_25
DEVSEL# R733 NL_G5@0_4 L_DEVSEL# STOP# DEVSEL#_4401E/DC B
<15,29,30> DEVSEL# <15,29,30> STOP# H1 STOP#_4401E/DC REGSUP18_4401E/REGSUP25 L14 C 4 G5_G7@MMJT9435T1G Stuff for 5705E & 5788E

C
CBE1# R706 NL_G5@0_4 L_CBE1# PAR J1 L13 VAUX_25 R724 G5@0_8
<15,29,30> CBE1# <15,29,30> PAR PAR_4401E/DC DC
CBE3# R734 NL_G5@0_4 L_CBE3# M14
<15,29,30> CBE3# DC_4401E/REGOUT25
INTB# R486 NL_G5@0_4 INTA#_4401E PCLK_LAN C682 GL@10U-10V_8

2
<15> INTB# <2> PCLK_LAN A3 PCI_CLK_4401E/DC
AD16 R485 NL_G5@100_4 PCI_IDSEL PCI_IDSEL A4 A9 Stuff for 5705E&5788E&5787&5789 C730 GL@.1U-10V_4 Stuff for 4401E & 5787 & 5789 +3V_S5
PERR# R487 NL_G5@0_4 BCMJ02 INTA#_4401E IDSEL_4401E/DC NC
<15,29,30> PERR# H2 INTA#__4401E/PWR_IND# NC B9
SERR# R483 NL_G5@0_4 BCMA02 C10 R725 NL_G7_G9@0_8
<15,29,30> SERR# PCI_PME# NC
R481 NL_G5@0_4 BCMA06 BCMJ02 J2 D8 PCIE_TST
<15,29,30,38> PCI_PME# PERR#_4401E/ATTN_IND# DC_4401E/PCIE_TEST
H4 CLKRUN_LAN# C707 C683
<39> LAN_PME# CLKRUN#_4401E/DC
R480 0_4 Stuff for 4401E & 5705E & 5788E Stuff for 5705E & Stuff for 5789

3
BCMA02 A2 Q31 .1U-10V_4 10U-10V_8
SERR#_4401E/ATTN_BTTN#
K14 REGSUP12 5788E & 5787 & 5789 PCIE_TST R135 G9@4.7K_4

E
REGSUP18_4401E/REGSUP12 REGCTL12
DC_4401E/REGCTL12 J13 1 B
BCMA06 A6 J14 REGSEN12 4
PME#_4401E/WAKE# REG18OUT_4401E/REGSEN12 C

C
Stuff for 5787 & 5789 D9 LAN_SMBDATA GL@MMJT9435T1G VAUX_18_12 CLKRUN_LAN# R176 NL@1K_4
LAN_RST# NC LAN_SMBCLK

2
C2 PCI_RST#_4401E/PERST# NC D10
PLTRST# R639 G7_G9@0_4 LAN_RST# Stuff for 4401E
15,16,18,29,31,33,34,35,36,39,41,42> PLTRST#
D12 TRST# R122 4.7K_4
TRST# C678 C676
Stuff
C741
for 5787 & 5787
G7_G9@.1U-10V_4 PCIE_TXDP TDI H12
TCK R697 *4.7K_4
Stuff 1.24K 1% for 4401E
<15> PCIE_RXP5 N6 DC_4401E/PCIE_TXDP TCK D7 Stuff 1.18K 1% for 5705E
PCIRST# R640 NL_G5@0_4 C738 G7_G9@.1U-10V_4 PCIE_TXDN P6 C11 TMS .1U-10V_4 10U-10V_8 Stuff 1.2K 1% for 5705E&5788E&5787&5789
<15,29,30,38> PCIRST# <15> PCIE_RXN5 DC_4401E/PCIE_TXDN TMS
Stuff for 4401E & 5705E & 5788E P10 D6 R131 G9@4.7K_4 Stuff for BCM5789
<15> PCIE_TXP5 DC_4401E/PCIE_RXDP TDO
N10 RDAC R466 1.2K/F_4
<15> PCIE_TXN5 DC_4401E/PCIE_RXDN
A N8 A10 RDAC A
<2> CLK_PCIE_LAN DC_4401E/REFCLK+ RDAC
<2> CLK_PCIE_LAN# P8 DC_4401E/REFCLK-
PCIE_REFCLK_SEL F4 N12 XTAL_O R475 200_4 C731 27P-50V_4 BCMM10 R726 G7@0_4
DC_4401E/REFCLK_SEL XTALO XTAL_I BCMN11 R727 G7@0_4
XTALI P12

2
BCMP11 R728 G7@0_4
+3V Y8 Stuff for 5787
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Stuff for 5789 25MHZ


G10

H10
B12

R177 G9@4.7K_4 PCIE_REFCLK_SEL C724 27P-50V_4

1
G5
G6
G7
G8
G9

H5
H6
H7
H8
H9

N1
N9
B4
B7

E2

K2

P9
F6
F7
F8
F9

J6
J7
J8
J9

PROJECT : ZB1
R178 G5@4.7K_4 LAN_SMBDATA R698 *0_4 PDAT_SMB
PDAT_SMB <2,16,29,33,42>
LAN_SMBCLK R699 *0_4 PCLK_SMB
Stuff for 5705E & 5788E
PCLK_SMB <2,16,29,33,42>
Quanta Computer Inc.
4401E 5789 5787 5705E
INTERFACE PCI PCI-E PCI-E PCI Size Document Number Rev
P/N AJ044010T31 AJ057890T19 AJ057870T00 AJ057050T53 BCM 4401E/578X/5705E C

Date: Wednesday, March 01, 2006 Sheet 27 of 50


5 4 3 2 1
5 4 3 2 1

+3V_S5

C21 .1U-10V_4
C19 .1U-10V_4
C20 .1U-10V_4

VAUX_33_25
U29 Stuff for 5705E&5788E&5787&5789
31 X-TX0P-PR
D 0B1 X-TX0P-PR <42> D
30 X-TX0N-PR
1B1 X-TX0N-PR <42>
C556 C557 C559 C560
35 26 X-TX1P-PR
VDD 2B1 X-TX1P-PR <42>
25 X-TX1N-PR
3B1 X-TX1N-PR <42>
.1U-10V_4 .1U-10V_4 GL@.1U-10V_4 GL@.1U-10V_4
TRD0+ 36 22 X-TX2P-PR
<27> TRD0+ A0 4B1 X-TX2P-PR <42>
TRD0- 1 21 X-TX2N-PR
<27> TRD0- A1 5B1 X-TX2N-PR <42>
<27> TRD1+
TRD1+ 2 18 X-TX3P-PR
A2 6B1 X-TX3P-PR <42>
TRD1- 3 17 X-TX3N-PR
<27> TRD1- A3 7B1 X-TX3N-PR <42>
VAUX_33_25
TRD2+ 7 12 U24
<27> TRD2+ A4 0LED1 LAN_LINKLED# <27>
TRD2- 8 13 1 24
<27> TRD2- A5 1LED1 100MBPS# <42> TCT1 MCT1
14 SYS_LINKLED# TX0P_SYS 2 23 X-TX0P
TRD3+ 2LED1 TX0N_SYS TD1+ MX1+ X-TX0N
<27> TRD3+ 9 A6 3 TD1- MX1- 22
TRD3- 10 29 TX0P_SYS
<27> TRD3- A7 0B2
28 TX0N_SYS 4 21
LAN_ACTLED# 1B2 TX1P_SYS TCT2 MCT2 X-TX1P
<27> LAN_ACTLED# 4 LED0 5 TD2+ MX2+ 20
5 24 TX1P_SYS TX1N_SYS 6 19 X-TX1N
<42> ACT# SYS_ACTLED# LED1 2B2 TD2- MX2-
6 23 TX1N_SYS
LED2 3B2
7 TCT3 MCT3 18
20 TX2P_SYS TX2P_SYS 8 17 X-TX2P
DOCKIN# 4B2 TX2N_SYS TX2N_SYS TD3+ MX3+ X-TX2N
<16,25,42> DOCKIN# 27 SEL 5B2 19 9 TD3- MX3- 16

16 TX3P_SYS 10 15
6B2 TX3N_SYS TX3P_SYS TCT4 MCT4 X-TX3P
7B2 15 11 TD4+ MX4+ 14
11 TX3N_SYS 12 13 X-TX3N
GND TD4- MX4-
0LED2 34
33 NS892402P
1LED2 R14 R13 R12 R11
C 2LED2 32 Stuff for 5705E C

SEL CONNECTION EZ@MAX4892 & 5788E &


75/F_4 75/F_4 GL@75/F_4 GL@75/F_4 5787 & 5789
0 Ax to xB1 ; LEDx to xLED1
1 Ax to xB2 ; LEDx to xLED2
C524
P/N
1000 NS892402P DB0ZH1LAN06
10/100 TST1284A LF DB0MW1LAN09 1500P-2KV_1808

MGND

ADD CIRCUITS WHEN NO DOCKING Mirror

CN18

TRD0+ NZ@0_4P2R_S 3 4 RP13 TX0P_SYS +3V_S5 SYS_ACTLED# 10


TRD0- TX0N_SYS YELLOW_N
1 2
TRD1+ NZ@0_4P2R_S 3 4 RP12 TX1P_SYS R15 220_4 9
TRD1- TX1N_SYS YELLOW_P
1 2
TRD2+ NZ@0_4P2R_S 3 4 RP11 TX2P_SYS For EMI
TRD2- 1 2 TX2N_SYS
TRD3+ NZ@0_4P2R_S 3 4 RP14 TX3P_SYS X-TX3N 0_4P2R_S 3 4 RP105 8
TRD3- TX3N_SYS X-TX3P TX1-
1 2 1 2
7 TX1+
B LAN_ACTLED# NZ@0_4P2R_S 3 4 RP15 SYS_ACTLED# B
LAN_LINKLED# 1 2 SYS_LINKLED# X-TX1N 0_4P2R_S 3 4 RP106 6
X-TX1P RX1-
1 2
5 TX2- GND2 14
X-TX2N 0_4P2R_S 3 4 RP107
X-TX2P 1 2 4 13 C521 .1U-10V_4
TX2+ GND1
3 C493 .01U-16V_4
RX1+
X-TX0N 0_4P2R_S 3 4 RP104 2 C525 1500P-2KV_1808
X-TX0P RX2-
1 2
1 RX2+

+3V_S5 SYS_LINKLED# 12 MGND


GREEN_N
R348 220_4 11 GREEN_P

FOXCONN_JM74113-P2101-TR-12P-V_RJ45

A A

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
TRANSFORMER/RJ45 C

Date: Friday, February 24, 2006 Sheet 28 of 50


5 4 3 2 1
1 2 3 4 5 6 7 8

+5V +3V VCAM


CN27
MINI-PCI 1 TIP RING 2 R754 CD@0_6
+3V 3 4 +3V
LAN1 LAN2 R757 *0_6
5 LAN3 LAN4 6
7 LAN5 LAN6 8
9 10 2 1
<40> MILAN_LED 11
LAN7
LED_GP
LAN8
LED_YP 12 D37 *SSM14 BLUETOOTH MODULE CONNECTOR
D38 1 2 13 14
<39> RF_EN LED_GN LED_YN +3VSUS
MI@BAS316 15 16 VCAM Q24 Q40
NC1 NC2 CD@AO3403 AO3403
<15> INTD# 17 -INTB +5V 18 +5V L76
19 +3V -INTA 20 INTC# <15>
21 22 1 3 CCD_POWER 1 3 BT_POWER
R(IRQ3) R(IRQ4)
23 GND +3VAUX 24 +3V_S5
PCLK_MINI 25 26 C565 CD@10U-10V_8 BK2125HS330_8 C820 10U-10V_8
<2> PCLK_MINI PCICLK -RST PCIRST# <15,27,30,38>
27 28 C9 CD@1000P-50V_4 C819 1000P-50V_4
GND +3V

2
A
<15> REQ2# 29 -REQ -GNT 30 GNT2# <15> CCD_POWERON# <39> A
CN34
31 +3V GND 32 BT_POWERON# <39>
33 34 PME# BT_POWER
<15,27,30> AD31
<15,27,30> AD29 35
AD31
AD29
-PME
(V) 36
PCI_PME# <15,27,30,38> CAMERA
CN7
MODULE CONNECTOR 1
2
37 38 R531 0_4 BUSBP4+
GND AD30 AD30 <15,27,30> <15> USBP4+ 3
39 40 CCD_POWER R527 0_4 BUSBP4-
<15,27,30> AD27 AD27 +3V 4 <15> USBP4- 4
41 42 CD@0_4P2R_S 3 4 RP9 BT_LED
<15,27,30> AD25 AD25 AD28 AD28 <15,27,30> 63 USBP7- <15> <40> BT_LED 5
43 (V) AD26 44 AD26 <15,27,30> 52 1 2 USBP7+ <15> 6
<15,27,30> CBE3# 45 -CBE3 AD24 46 AD24 <15,27,30> 1 7
47 48 R488 TV_MI@150_4 AD19
<15,27,30> AD23 AD23 IDSEL 8
49 GND GND 50
51 52 CD@USB_CAMERA +5V_S5 PTWO_MINIUSB_BT
<15,27,30> AD21 AD21 AD22 AD22 <15,27,30>
53 54 AD20 C817 C818 C814
<15,27,30> AD19 AD19 AD20 AD20 <15,27,30>
55 GND PAR 56 PAR <15,27,30>
57 58 *22P-50V_4 *22P-50V_4 .01U-16V_4
<15,27,30> AD17 AD17 AD18 AD18 <15,27,30>
59 60 C315
<15,27,30> CBE2# -CBE2 AD16 AD16 <15,27,30>
<15,27,30> IRDY# 61 -IRDY GND 62 .1U-10V_4
63 +3V -FRAME 64 FRAME# <15,27,30>
65 66 +5V_S5 U17
<16,30,38,39> CLKRUN# -CLKRUN -TRDY TRDY# <15,27,30>
67 68 2 8 USBPWR1
<15,27,30> SERR# -SERR -STOP STOP# <15,27,30> IN1 OUT3
69 GND +3V 70 3 IN2 OUT2 7
<15,27,30> PERR# 71 -PERR -DEVSEL 72 DEVSEL# <15,27,30> OUT1 6
73 74 R209 0_4 4
<15,27,30> CBE1# -CBE1 GND <39> USBON# EN#
<15,27,30> AD14 75 AD14 AD15 76 AD15 <15,27,30> 1 GND
77 78 9 5 R255 *6.34K/F_4
GND AD13 AD13 <15,27,30> GND-C OC#
<15,27,30> AD12 79 AD12 AD11 80 AD11 <15,27,30>
81 82 TPS2061DGNR
<15,27,30> AD10 AD10 GND
83 GND AD9 84 AD9 <15,27,30>
85 86 +5V_S5 U16
<15,27,30> AD8 AD8 -CBE0 CBE0# <15,27,30> +5V_S5
87 88 2 8 USBPWR2
<15,27,30> AD7 AD7 +3V IN1 OUT3
89 +3V AD6 90 AD6 <15,27,30> 3 IN2 OUT2 7
<15,27,30> AD5 91 AD5 AD4 92 AD4 <15,27,30> OUT1 6
93 (V) AD2 94 AD2 <15,27,30> 4 EN#
95 96 C260 1
<15,27,30> AD3 AD3 AD0 AD0 <15,27,30> GND
97 98 .1U-10V_4 R243 9 5 R226 *6.34K/F_4
B +5V +5V (V) FAN_OT# <39> GND-C OC# B
99 100 *0_4
<15,27,30> AD1 AD1 SERIRQ SERIRQ <16,30,38,39>
101 102 TPS2061DGNR
GND GND
103 SYNC M66EN 104 2ed SOURCE:AL000547001
105 SDIN0 SDOUT 106
107 BITCLK SDIN1 108
109 110 USBPWR1
-AC_PRIMARY -RESET
111 BEEP -MPCICACK 112
113 AGND AGND 114
115 116 C332 + C330
+MIC +SPK
117 -MIC -SPK 118
119 120 100U-6.3V_3528 1000P-50V_4
AGND AGND
121 -RI NC4 122
123 124 CN33
+5V +5VA +3VAUX +3V_S5
125 GND

126 GND

R521 0_4 BUSBP0- 1 5


<15> USBP0- 2 6
R517 0_4 BUSBP0+
<15> USBP0+ 3 7
TV_MI@QTC_MINIPCI_H7.95 PCLK_MINI R490 *22_4 C754 *10P-50V_4 C813 C810 4 8
SYUIN_USB0
*22P-50V_4
*22P-50V_4
U45
CM1293-04SO
1 6 +5V_S5 USBPWR2
+3V +5V CH1 CH4
2 VN VP 5
C307 + C787
3 CH2 CH3 4
C744 C762 C764 C719 C712 C783 100U-6.3V_3528 1000P-50V_4 BOT
CN30
TV_MI@.1U-10V_4 TV_MI@.1U-10V_4 TV_MI@.1U-10V_4 TV_MI@.1U-10V_4 TV_MI@.1U-10V_4 TV_MI@.1U-10V_4
R507 0_4 BUSBP1- 1 5
<15> USBP1- 2 6
0_4 BUSBP1+
<15> USBP1+ 3 7
R506 G4 4G
C781 C785 4 8
+ +
C SYUIN_USB1 - - C
*22P-50V_4
*22P-50V_4 P1 1P
+1.5V

+3V

R27 +3V_S5

0_4
CN21 USBPWR3
51 Reserved +3.3V 52
49 Reserved GND 50
47 Reserved +1.5V 48
45 46 R16 *0_4 BT_LED
Reserved LED_WPAN# R17 0_4 WIRELESS_LED
43 Reserved LED_WLAN# 44 WIRELESS_LED <40>
41 42 T4
Reserved LED_WWAN# 0_4P2R_S
39 Reserved GND 40 <15> USBP3-
37 Reserved USB_D+ 38 3 4 RP63 USBP6+ <15> <15> USBP3+
C413
.1U-10V_4 CN13
35 GND USB_D- 36 1 2 USBP6- <15>
33 34 U65
<15> PCIE_TXP4 PETp0 GND 1
31 32 CM1293-04SO
<15> PCIE_TXN4 PETn0 SMB_DATA PDAT_SMB <2,16,27,33,42> +5V_S5 2
29 30 1 6 RP92 1 2 0_4P2R_S
GND SMB_CLK PCLK_SMB <2,16,27,33,42> CH1 CH4 3
27 GND +1.5V 28 3 4 4
C11 .1U-10V_4 25 26 2 5 RP95 1 2 0_4P2R_S
<15> PCIE_RXP4 PERp0 GND VN VP 5
C13 .1U-10V_423 24 3 4
<15> PCIE_RXN4 PERn0 +3.3Vaux 6
21 GND PERST# 22 PLTRST# <15,16,18,27,31,33,34,35,36,39,41,42> 3 CH2 CH3 4 7
19 Reserved Reserved 20 8
17 18 R365 0_4 RF_EN
Reserved GND RF_EN <39> USB2_USB3
+3VSUS <15> USBP2-
15 GND Reserved 16 <15> USBP2+
<2> CLK_PCIE_MINI1 13 REFCLK+ Reserved 14
<2> CLK_PCIE_MINI1# 11 REFCLK- Reserved 12
2

D
9 GND Reserved 10 D
T66 7 8
T65 CLKREQ# Reserved
5 Reserved +1.5V 6
T64 3 4
Reserved GND
<16,27> PCIE_WAKE# 3 1 1 WAKE# +3.3V 2
+5V_S5 +5V_S5 USBPWR3
67910-0002_MINI CARD U62
Q26 C946 2 IN1 OUT3 8
DTC144EU 3 7
IN2 OUT2
OUT1 6 PROJECT : ZB1
USBON# 4
.1U-10V_4 EN#
1
9
GND
GND-C OC# 5 Quanta Computer Inc.
G548A2P8U Size Document Number Rev
MINI PCI,USB C
Date: Friday, February 24, 2006 Sheet 29 of 50
1 2 3 4 5 6 7 8
A B C D E

C893 FW@22P-50V_4
1394_XIN
PN

2
Y10
U55A FW@24.576MHZ
<15> GNT0# GNT0# L2 R19 TPBIAS0
<15> REQ0# REQ0# GNT# XI 1394_XOUT C897 FW@22P-50V_4

1
L3 REQ# XO R18
AD25 R604 150_4N5
<15,27,29> FRAME# IDSEL R0 R605 FW@6.34K/F_4 C874
R6 FRAME# R0 T18
4 <15,27,29> IRDY# V5 T19 R1 4
<15,27,29> DEVSEL# IRDY# R1 CPS R599 FW@390K_4 R593 R592 FW@1U-16V_6
U6 DEVSEL# CPS R12
<15,27,29> TRDY# W5 P12 R600 FW@330_4
<15,27,29> SERR# TRDY# TEST0 FW@56.2/F_4
FW@56.2/F_4
W6 R17

1394 Interface
<15,27,29> STOP# SERR# VSSPLL
V6 STOP#
<15,27,29> PERR# R7 V14 TPA0P L80 FW@BK1608HS800_6
PERR# TPA0P +3V
<15,27,29> PAR U7 W14 TPA0N
PAR TPA0N TPBIAS0
TPBIAS0 R13
<15,27,29> CBE3# P2 V13 TPB0P 1394_AVDD
CBE3 TPB0P 1394_AVDD
<15,27,29> CBE2# U5 W13 TPB0N
<15,27,29> CBE1# CBE2 TPB0N C891 C885 R627 FW@0_4
V7 CBE1
<15,27,29> CBE0# W10 V16 R626 FW@0_4
CBE0 TPA1P FW@.1U-10V_4 FW@1U-16V_6
TPA1N W16
<2> PCI_CLK_7412 L1 PCLK TPBIAS1 W17
V15 R598 FW@4.7K_4 TPA0P L1394_TPA0+
TPB1P R597 FW@4.7K_4 TPA0N L1394_TPA0-
<15,27,29,38> PCIRST# K3 PRST# TPB1N W15
GRST#_7412 K5 +1.5V_PCM
GRST#

PCI Interface
<15,27,29> AD[0..31] P15 TPB0P L1394_TPB0+
AD0 VDDPLL15 1394_AVDD TPB0N L1394_TPB0-
R11 AD00 PHY_TEST_MA P17
AD1 P11 R609 FW@4.7K_4
AD2 AD01 C882
U11 AD02 PC0_RSVD U12
AD3 V11 V12 FW@1U-16V_6
AD4 AD03 PC1_RSVD R595 R594 R628 FW@0_4
W11 AD04 PC2_RSVD W12
AD5 R10 +3V R629 FW@0_4
AD6 AD05 FW@56.2/F_4
FW@56.2/F_4
U10 AD06 AGND_00 U13
AD7 V10 U14
AD8 AD07 AGND_01 R612
R9 AD08 AGND_02 R14
AD9 U9 D30 *BAS316 CN42
AD10 AD09 10K_4 2
V9 AD10 SUSPEND# J5 1 LPC_PD# <16,38> 5
3 AD11 W9 L5 R606 0_4 R596 C872 L1394_TPB0- 1 3
AD11 RI_OUT# PCI_PME# <15,27,29,38>
AD12 V8 H3 PCMSPK L1394_TPA0- 3 6
AD12 SPKROUT PCMSPK <36>
AD13 U8 R607 *0_4 FW@5.1K/F_6
FW@270P-25V_4 L1394_TPA0+ 4
AD13 RI# <16>
AD14 R8 K2 L1394_TPB0+ 2
AD15 AD14 VR_EN#
W7 E10

Miscellaneous
AD16 AD15 USB_EN
W4 AD16
AD17 T2 G2 SCL_CARD FW@SUYIN_1394
AD18 AD17 SCL SDA_CARD
T1 AD18 SDA G3
AD19 R3
AD20 AD19
P5 AD20 MFUNC0 G1 INTE# <15>
AD21 R2 H5
AD21 MFUNC1 INTF# <15>
AD22 R1 H2
AD22 MFUNC2 INTG# <15>
AD23 P3 H1
AD24 AD23 MFUNC3 R614 10K_4 SERIRQ <16,29,38,39>
N3 AD24 MFUNC4 J1 +3V
AD25 N2 J2 +3V
AD25 MFUNC5 T128
AD26 N1 J3
AD26 MFUNC6 CLKRUN# <16,29,38,39>
AD27 M5
AD28 AD27 TPS_LATCH
M6 AD28 LATCH/VD3/VPPD0 C9 TPS_LATCH <31>
AD29 M3 A9 TPS_CLOCK
AD29 CLOCK/VD1/VCCD0# TPS_CLOCK <31> +3V
AD30 M2 B9 TPS_DATA R620 R619
AD30 DATA/VD2/VPPD1 TPS_DATA <31> U56
AD31 M1 C4 R637 10K_4
AD31 RSVD_03/VD0/VCCD1#/PS_MODE +3V
+3V 2.2K_4 2.2K_4 8 1
VCC A0
PCI7412 7 NC A1 2
SCL_CARD 6 3 C901
SDA_CARD SCL A3
5 SDA GND 4 .1U-10V_4
R610
1M_6 R616 R615
24LC02BT
*220_4 *220_4
2 2
GRST#_7412

C892

.1U-10V_4

1 1

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
PCI7412-IEEE1394 C
Date: Friday, February 24, 2006 Sheet 30 of 50
A B C D E
5 4 3 2 1

CN38 +5V +5V


+1.5V_PCM
U55B U19
C10 A_CAD31 1 17 A_VCC 1 24
CAD31 A_CAD30 A_CAD0 GND1 SKTA/VCC1 5V_0 5V_2
CAD30 A10 2 SKTAAD0/D3 SKTA/VCC2 51 2 5V_1 NC_3 23
F11 A_CAD29 A_CAD1 3 TPS_DATA 3 22
CAD29 SKTAAD1/D4 <30> TPS_DATA DATA NC_2
E11 A_CAD28 A_CAD3 4 18 A_VPP TPS_CLOCK 4 21
CAD28 SKTAD3/D5 SKTA/VPP1 <30> TPS_CLOCK CLOCK SHDN#
C11 A_CAD27 A_CAD5 5 52 TPS_LATCH 5 20 C894
CAD27 SKTAD5/D6 SKTA/VPP2 <30> TPS_LATCH LATCH 12V_1
B13 A_CAD26 A_CAD7 6 6 19
CAD26 A_CAD25 A_CC/BE0# SKTAAD7/D7 T61 NC_0 BVPP/BVCORE .1U-10V_4
CAD25 C13 7 -SKTACBE0/CE1# 7 12V_0 BVCC1 18 U55D
D A14 A_CAD24 A_CAD9 8 A_VPP 8 17 D
CAD24 A_CAD23 A_CAD11 SKTAAD9/A10 AVPP/AVCORE BVCC0 +3V
CAD23 B14 9 SKTABAD11/OE# A_VCC 9 AVCC0 NC_1 16 VCC33_00 J6
B15 A_CAD22 A_CAD12 10
CAD22 A_CAD21 A_CAD14 SKTAAD12/A11 GND5 69 10 AVCC1 OC# 15 K1 1.5V_00 VCC33_01 L6
CAD21 E14 11 SKTAAD14/A9 GND6 70 11 GND 3.3VIN0 14 +3V K19 1.5V_01 VCC33_02 P6
A_CAD20 A_CC/BE1#

NC
CAD20 A16 12 -SKTACBE1/A8 GND7 71
<15,16,18,27,29,33,34,35,36,39,41,42> PLTRST# 12 RESET# 3.3VIN1 13 U19 VDDPLL33 VCC33_03 P8
D19 A_CAD19 A_CPAR 13 1394_AVDD
CAD19 A_CAD18 A_CPERR# SKTAPAR/A13 GND8 72 TPS2220APWP VCC33_04 P10
E17 14 L14

Power/GND
25
CAD18 A_CAD17 A_CGNT# -SKTAPERR/A14 VCC33_05
CAD17 F15 15 -SKTAGNT/WE# H6 GND_00 VCC33_06 J14
H19 A_CAD16 A_CINT# 16 TPS_CLOCK K6 F14
CAD16 A_CAD15 -SKTAINT/RDY GND_01 VCC33_07
CAD15 J17 N6 GND_02 VCC33_08 F12
J15 A_CAD14 UPPER PIN P7 F9
CAD14 A_CAD13 A_CCLK1 R315 GND_03 VCC33_09
CAD13 J18 19 SKTAPCLK/A16 P9 GND_04 VCC33_10 F6
K15 A_CAD12 A_CIRDY# 20 M14
CAD12 A_CAD11 A_CC/BE2# -SKTAIRDY/A15 *47K_4 GND_05 1394_AVDD
CAD11 K17 21 -SKTACBE2/A12 K14 GND_06 AVDD33_00 P13
K18 A_CAD10 A_CAD18 22 G14 P14
CAD10 A_CAD9 A_CAD20 SKTAAD18/A7 GND_07 AVDD33_01
CAD09 L15 23 SKTAAD20/A6 F13 GND_08 AVDD33_02 U15
L18 A_CAD8 A_CAD21 24 F10
CAD08 A_CAD7 A_CAD22 SKTAAD21/A5 GND_09 +3V
CAD07 L19 25 SKTAAD22/A4 F7 GND_10 VCCP_00 P1
M17 A_CAD6 A_CAD23 26 W8
CardBus Interface

CAD06 A_CAD5 A_CAD24 SKTAAD23/A3 VCCP_01


CAD05 M18 27 SKTAAD24/A2
N19 A_CAD4 A_CAD25 28 PCI7412
CAD04 A_CAD3 A_CAD26 SKTAAD25/A1
CAD03 M15 29 SKTAAD26/A0
N17 A_CAD2 A_CAD27 30
CAD02 SKTAAD27/D0 1394_AVDD
N18 A_CAD1 A_CAD29 31
CAD01 A_CAD0 A_CRSVD/D2 SKTAAD29/D1 A_VPP +3V
CAD00 P19 32 SKTARSVD/D2
A_CCLKRUN# 33
A_CC/BE3# -SKTACLKRUN/WP +5V
CCBE3 E13 34 GND2
E18 A_CC/BE2#
CCBE2 A_CC/BE1# C910 C876 C444 C877 C908
CCBE1 H18 35 GND3
L17 A_CC/BE0# A_CCD1# 36 C428 C429
CCBE0 A_CAD2 -SKTACD1/CD1# .1U-10V_4 .1U-10V_4 10U-10V_8 .01U-16V_4 .01U-16V_4
37 SKTAAD2/D11
C
B10 A_CRSVD/D2 A_CAD4 38 .1U-10V_4 .01U-16V_4 C
RSVD_04/D2 A_CCD1# A_CAD6 SKTAD4/D12 C417 C412
CCD1#/CD1# N15 39 SKTAAD6/D13
B11 A_CCD2# A_RSVD/D14 40
CCD2#/CD2# A_CAD8 SKTARSVD/D14 .1U-10V_4 10U-10V_8
41 SKTAAD8/D15
A13 A_CVS1# A_CAD10 42
CVS1/VS1# A_CRST# A_CVS1# SKTAAD10/CE2#
CRST# C15 43 -SKTAVS1/VS1#
H15 A_CBLOCK# A_CAD13 44
CBLOCK# A_CREQ# A_CAD15 SKTAAD13/IORD#
CREQ#/INPACK# C14 45 SKTAAD15/IOWR#
C12 A_CSERR# A_CAD16 46
CSERR#/WAIT# A_CDEVSEL# A_CRSVD/A18 SKTAAD16/A17
CDEVSEL# F19 47 -SKTRSVD/A18
E19 A_CFRAME# A_CBLOCK# 48
CFRAME# A_CGNT# A_CSTOP# -SKTALOCK/A19
CGRANT# G17 49 -SKTASTOP/A20
E12 A_CINT# A_CDEVSEL# 50 A_VCC A_VCC +3V
CINT# A_CVS2# -SKTADEVSEL/A21
CVS2/VS2# B16
G19 A_CPERR# LOWER PIN
CPERR#
A_CCLK1

G18 A_CSTOP# A_CTRDY# 53


CSTOP# A_CIRDY# A_CFRAME# -SKTATRDY/A22
CIRDY F17 54 -SKTAFRAME/A23
G15 A_CTRDY# A_CAD17 55
CTRDY# A_CAD19 SKTAAD17/A24 C432 C904 C431 C435 C443 C905 C899 C909 C886 C875
56 SKTAAD19/A25
RSVD_02/A18 H17 A_CRSVD/A18 A_CVS2# 57 -SKTAVS2VS2#
M19 A_RSVD/D14 R622 A_CRST# 58 .01U-16V_4 .01U-16V_4 .1U-10V_4 .1U-10V_4 10U-10V_8 .01U-16V_4 10U-10V_8 .1U-10V_4 1U-16V_6 1U-16V_6
RSVD_01/D14 A_VCC A_CSERR# -SKTARST/RESET
59 0SKTASERR/WAIT#
A11 A_CCLKRUN# 47_6 A_CREQ# 60
CCLKRUN# A_CPAR A_CC/BE3# -SKTAREQ/INPACK#
CPAR H14 61 -SKTACBE3/REG#
A15 A_CAUDIO 62
VCCCA_01 A_CSTSCHG SKTAAUDIO/BVD2
VCCCA_00 J19 63 -SKTASTSCHG/BVD1
A12 A_CSTSCHG A_CAD28 64
CSTSCHG A_CAUDIO A_CAD30 SKTAAD28/D8
CAUDIO B12 65 SKTAAD30/D9
F18 A_CCLK A_CAD31 66
CCLK A_CCD2# SKTAAD31/D10
67 -SKTACD2/CD2#
68 GND4
B PCI7412 B

CARDBUS SLOT
FOX_1CA4C5G2-TC_CARD BUS

A A

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
PCI7412-PCMCIA C
Date: Friday, February 24, 2006 Sheet 31 of 50
5 4 3 2 1
A B C D E

DO NOT INSERT SD/MMC, MEMORYSTICK AND XD SIMULTANEOUSLY.

4 4
U55C

F2 VCC_FM
SC_OC# CN15 VCC_FM
SC_PWR_CTRL G5
G6 R760 0_4 +3V VCC_FM P10
SC_VCC5 SM_ALE MS_SDIO(DAT0)/SD_DAT0/SM_D0 SD-VCC
SD_CMD/SM_ALE/SC_GPIO2 C5 P3 SD-DAT0 XD-VCC 18
A4 SM_RE# R631 CR@10K_4 MS_DAT1/SD_DAT1/SM_D1 P2
SD_CLK/SM_RE#/SC_GPIO1 SM_CLE MS_DAT2/SD_DAT2/SM_D2 SD-DAT1 XD_CD#
SM_CLE/SC_GPIO0 B4 P20 SD-DAT2 XD-CD 1
D1 MS_DAT3/SD_DAT3/SM_D3 P18 2 SM_R/B#
SM_R/B#/SC_RFU SM_PHYS_WP#/SC_FCB T129 MS_CLK/SD_CLK/SM_EL_WP# SD-DAT3 XD-R/B SM_RE#
SM_PHYS_WP#/SC_FCB E3 P7 SD-CLK XD-RE 3
E2 MS_BS/SD_CMD/SM_WE# P15 4 SD_WP/SM_CE#
SC_CLK SD-CMD XD-CE
FlashMedia Interface

SC_RST F5 48MHz Clock +3V SD_CD# P21 SD-CD XD-CLE 5 SM_CLE


E1 SD_WP/SM_CE# P1 6 SM_ALE
SC_DATA Y11 SD-WP XD-ALE MS_BS/SD_CMD/SM_WE#
P22 SD-WP/SDIO GND XD-WE 7
F1 CLK48M 3 4 P23 8 MS_CLK/SD_CLK/SM_EL_WP#
CLK_48 OUT VDD SD-CD/SDIO GND XD-WP-IN
P4 SD-GND XD-GND 9
F3 2 1 C911 P12 10 MS_SDIO(DAT0)/SD_DAT0/SM_D0
SC_CD# SD_CD# GND OE VCC_FM SD-GND XD-D0 MS_DAT1/SD_DAT1/SM_D1
SD_CD# E9 XD-D1 11
A8 MS_CD# CR@TXC-48MHz-30PPM-15Pf CR@.01U-16V_4 P17 12 MS_DAT2/SD_DAT2/SM_D2
MS_CD# MS_SDIO(DAT0)/SD_DAT0/SM_D0 MS-VCC XD-D2 MS_DAT3/SD_DAT3/SM_D3
SM_CD# B8 P9 MS-DATA0 XD-D3 13
MS_DAT1/SD_DAT1/SM_D1 P8 14 SM_D4
XD_CD# VCC_FM MS_DAT2/SD_DAT2/SM_D2 MS-DATA1 XD-D4 SM_D5
XD_CD#/SM_PHYS_WP# A3 P11 MS-DATA2 XD-D5 15
MS_DAT3/SD_DAT3/SM_D3 P14 16 SM_D6
MC_PWR_CTRL_0# MS_CLK/SD_CLK/SM_EL_WP# MS-DATA3 XD-D6 SM_D7
MC_PWR_CTRL_0 C8 P16 MS-SCLK XD-D7 17

P24 GND_PAD
F8 SM_R/B# R630 CR@10K_4 MS_CD# P13
MC_PWR_CTRL_1/SM_R/B# MS_BS/SD_CMD/SM_WE# R632 CR@10K_4 MS_BS/SD_CMD/SM_WE# MS-INS
MS_BS/SD_CMD/SM_WE# E8 P6 MS-BS XD-GND 19
A7 R634 47_6 MS_CLK/SD_CLK/SM_EL_WP# P19
MS_CLK/SD_CLK/SM_EL_WP# MS-GND
P5 MS-GND
3 B7 MS_SDIO(DAT0)/SD_DAT0/SM_D0 3
MS_SDIO(DATA0)/SD_DATA0/SM_D0 MS_DAT1/SD_DAT1/SM_D1 CR@R013-000-XX_CARD READER
MS_DATA1/SD_DATA1_SM_D1 C7
A6 MS_DAT2/SD_DAT2/SM_D2
MS_DATA2/SD_DATA2_SM_D2 MS_DAT3/SD_DAT3/SM_D3
MS_DATA3/SD_DATA3_SM_D3 B6

E7 SD_WP/SM_CE# R633 CR@10K_4


SD_WP/SM_CE#
C6 SM_D4
SD_DAT0/SM_D4/SC_GPIO6 SM_D5
A5
SD_DAT1/SM_D5/SC_GPIO5
SD_DAT2/SM_D6/SC_GPIO4
SD_DAT3/SM_D7/SC_GPIO3
B5
E6
SM_D6
SM_D7 5 IN1 CARD READER
PCI7412

VCC_FM VCC_FM
CN16
6 SD-VCC XD-VCC 43
MS_SDIO(DAT0)/SD_DAT0/SM_D0 9 42
MS_DAT1/SD_DAT1/SM_D1 SD-DAT0 XD-VCC XD_CD#
10 SD-DAT1 XD-CD 25
MS_DAT2/SD_DAT2/SM_D2 2 26 SM_R/B#
VCC_FM MS_DAT3/SD_DAT3/SM_D3 SD-DAT2 XD-R/B SM_RE#
3 SD-DAT3 XD-RE 27
MS_CLK/SD_CLK/SM_EL_WP# 7 28 SD_WP/SM_CE#
MS_BS/SD_CMD/SM_WE# SD-CLK XD-CE SM_CLE
4 SD-CMD XD-CLE 29
VCC_FM SD_CD# 1 30 SM_ALE
SD_WP/SM_CE# SD-CD XD-ALE MS_BS/SD_CMD/SM_WE#
11 SD-WP XD-WE 31
2 2
R589 VCC_FM 32 MS_CLK/SD_CLK/SM_EL_WP#
C860 XD-WP-IN
CR@150K_6 13 MS-VCC XD-GND 33
CR@2.2U-6.3V_6 MS_SDIO(DAT0)/SD_DAT0/SM_D0 18 34 MS_SDIO(DAT0)/SD_DAT0/SM_D0
MS_DAT1/SD_DAT1/SM_D1 MS-DATA0 XD-D0 MS_DAT1/SD_DAT1/SM_D1
C865 C866 C864 C863 19 MS-DATA1 XD-D1 35
CR@.1U-10V_4 CR@.1U-10V_4 CR@.1U-10V_4 CR@.1U-10V_4 MS_DAT2/SD_DAT2/SM_D2 17 36 MS_DAT2/SD_DAT2/SM_D2
MS_DAT3/SD_DAT3/SM_D3 MS-DATA2 XD-D2 MS_DAT3/SD_DAT3/SM_D3
15 MS-DATA3 XD-D3 37
MS_CLK/SD_CLK/SM_EL_WP# 14 38 SM_D4
MS_CD# MS-SCLK XD-D4 SM_D5
16 MS-INS XD-D5 39
MS_BS/SD_CMD/SM_WE# 20 40 SM_D6
CLOSE CONN MS-BS XD-D6 SM_D7
XD-D7 41
5 SD-GND
8 SD-GND
12 MS-GND GND 24
+3V 21 MS-GND GND 22
Q47 44 SDIO GND GND 23
1 8 VCC_FM
GND OUT CR_PRO@MSX309-X0-2XX1_CARD READER
2 IN OUT 7
R587 3 6
IN OUT
MC_PWR_CTRL_0# CR@10K_4 4 5
EN# OUTNC
CR@TPS2061DGNR

+3V C859

CR@10U-10V_8

C861
1 1
CR@.1U-10V_4

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
PCI7412-CARD READER C
Date: Tuesday, February 07, 2006 Sheet 32 of 50
A B C D E
5 4 3 2 1

CN14
29 GND5
+3V_S5 26
U20 GND1
<15> PCIE_TXP0 25 PETp0
EX@TPS2231PWG4 24
+NEW_3V <15> PCIE_TXN0 PETn0
+3V 4 3.3VIN 3.3VOUT 6 23 GND2
5 7 C433 EX@.1U-10V_4 PERP0 22
3.3VIN 3.3VOUT <15> PCIE_RXP0 PERp0

4
2
C434 EX@.1U-10V_4
PERN0 21
D <15> PCIE_RXN0 PERn0 D
+3V_S5 18 17 +NEW_3VAUX RP133 20
AUXIN AUXOUT GND3
<2> CLK_PCIE_NEW_C 19 REFCLK+
+1.5V 16 14 +NEW_1.5V EX@10K_4P2R 18
1.5VIN 1.5VOUT <2> CLK_PCIE_NEW_C# REFCLK-
15 13 CPPE# 17
1.5VIN 1.5VOUT CPPE#
<2> NEW_CLKREQ# 16 CLKREQ#
+NEW_3V

3
1
<15,16,18,27,29,31,34,35,36,39,41,42> PLTRST# 1 SYSRST# STBY# 3 15 +3.3V1
+3V_S5 R758 EX@10K_4 2 12 CPPE# 14
SHDN# CPPE# CPUSB# PERST# +3.3V2
CPUSB# 11 13 PERST#
19 +NEW_3VAUX 12
RCLKEN PERST# +3.3VAUX
9 NC PERST# 8 11 WAKE#
10 20 +NEW_1.5V 10
GND OC# +1.5V1
9 +1.5V2
NEW_SMDATA 8
NEW_SMCLK SMB_DATA
7 SMB_CLK
6 RESERVED1
5 RESERVED2
CPUSB# 4
RP103 CPUSB#
<15> USBP5+ 1 2 EX@0_4P2R_S 3 USB_D+
+NEW_3V 3 4 2
<15> USBP5- USB_D-
1 GND4
30 GND6
EX@331-1CX43201-ZG-X2_NEW CARD

4
2
C C
RP102 +NEW_3VAUX

EX@10K_4P2R
C458

2
EX@.1U-10V_4

3
1
3 1 NEW_SMDATA
<2,16,27,29,42> PDAT_SMB
+3V_S5 +3V +1.5V
Q18 EX@2N7002
+NEW_3V +NEW_1.5V
+NEW_3V
C466 C449 C462 C457 C461
EX@.1U-10V_4 EX@.1U-10V_4EX@.1U-10V_4 EX@.1U-10V_4EX@.1U-10V_4 C445 C446 C447 C467 C464

EX@4.7U-10V_8 EX@.1U-10V_4 EX@.1U-10V_4 EX@4.7U-10V_8 EX@.1U-10V_4

2
3 1 NEW_SMCLK
<2,16,27,29,42> PCLK_SMB

Q19 EX@2N7002

B B

HOLE11 HOLE5 HOLE7 HOLE8 HOLE19 HOLE27 HOLE20 HOLE26 HOLE23 HOLE30 PAD27 PAD12 PAD16 PAD15 PAD5 PAD14 PAD13 PAD10 PAD9 PAD6 PAD23 PAD26
H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C276D118P2 H-C236I182D142P2 H-C276D118P2 H-C276D118P2 H-TC197BC98D59P2
*EMIPAD *EMIPAD *EMIPAD *EMIPAD EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD EMIPAD *EMIPAD *EMIPAD

1
1

1
CPU HEATSINK
HOLE14 HOLE6 HOLE28 HOLE16 HOLE15 HOLE24 HOLE4 HOLE31 HOLE35 HOLE33
H-C276I182D142P2H-C276D118P2 H-C276i158D118P2H-C276I158D118P2H-C276D118P2 H-C217D118P2 H-C276D118P2 H-TC197BC98D59P2
H-C217D130P2 H-TC197BC98D59P2 PAD24 PAD25 PAD21 PAD11 PAD7 PAD8 PAD4 PAD18 PAD22 PAD17 PAD20 PAD19

*EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD
1

1
A HOLE9 HOLE29 HOLE18 HOLE17 HOLE21 HOLE32 HOLE22 HOLE12 HOLE25 HOLE10 PAD28 PAD29 A
H-C276I182D142P2 H-C276I158D118P2H-C236D142P2 H-C236I182D142P2 H-C236D142P2 H-TC197BC98D59P2 H-C276I158D118P2H-C276I158D118P2H-C276I158D118P2H-C276I158D118P2
EMIPAD EMIPAD
PROJECT : ZB1
Quanta Computer Inc.

1
1

Size Document Number Rev


VGA CPU HEATSINK MODEM BD NEW CARD &HOLE C

Date: Friday, February 24, 2006 Sheet 33 of 50


5 4 3 2 1
5 4 3 2 1

+3V +1.8V

+3V
C845 C846 C847 C842 C844

R578
R576
R572
R570
R567
SATA TO PATA SH_SP@.1U-10V_4SH_SP@.1U-10V_4 SH_SP@.1U-10V_4SH_SP@.1U-10V_4SH_SP@.1U-10V_4

SH_SP_ULI@0_4
SH_SP_ULI@0_4
SH_SP_ULI@0_4
SH_SP_ULI@0_4
SH_SP_ULI@0_4
D
Bypass CAP, close to power pins D

B_PDCS1#
B_PDCS3#
+3V +1.8V B_PDD0 B_PDD[0..15] <35>
Stuff all when use B_PDD1
R558 SH_SP_ULI@12K/F_6 B_PDD2
ULI M5285 REXT R559 SH_SP_SUN@1K/F_4 +3V B_PDD3
U51 +1.8V B_PDD4
Unstuff R559 when B_PDD5

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
L77 B_PDD6
use ULI M5285 L43 SH_SP_ULI@BLM11A05_6 B_PDD7

IDE_CS0_b
IDE_CS1_b
VSS
Reserve
VDDO
Reserve
VSS

Reserve
Reserve
Reserve
ODCS
Reserve
Reserve
Reserve
Reserve
VDDI
Stuff R558 when SH_SP@BLM11A05_6 B_PDD8
B_PDD9
use ULI M5285 B_PDD10
Unstuff R580 when
B_PDD11
use ULI M5285 RP128 SH_SP@0_4P2R_S B_PDD12
B_PDA2 49 32 SATA_RXP0_R 1 2 SATA_RXP0 <14> B_PDD13
B_PDA0 IDE_DA2 TxP SATA_RXN0_R B_PDD14
50 IDE_DA0 TxN 31 3 4 SATA_RXN0 <14>
SH_SP_SUN@0_4 B_PDA1 51 30 VDDA_3.3_1.8 B_PDD15
R580 IDE_DA1 GNDA AVDDL_1.8 RP129 SH_SP@0_4P2R_S
52 VDDO VDDA 29
+3V B_IRQ14 SATA_TXN0_R B_PDCS1#
B_PDDACK#
B_PIORDY
53
54
55
IDE_INTRQ
IDE_DMACK_b SPIF3811 RxN
RxP
28
27
26
SATA_TXP0_R
REXT
1
3
2
4
SATA_TXN0 <14>
SATA_TXP0 <14>
B_PDA0
B_PDA2
B_PDCS1# <35>
B_PDA0 <35>
B_PDA2 <35>

C
+1.8V 56
57
IDE_IORDY
VDDI
VSS
64pin QFN REXT
GNDA
VDDA
25
24 VDDA_3.3_1.8 R560 SH_SP_SUN@0_4 SH_SP_ULI@10U/X5R-6.3V_8
B_PDCS3#
B_PDA1
B_PDCS3# <35>
B_PDA1 <35> C
B_PDIOR# 58 23 XTALO C402 C829 B_IRQ14
IDE_DIOR_b XTALO B_IRQ14 <35>
B_PDIOW# 59 22 XTALI Unstuff R560 when C403 C397 B_PDDACK#
IDE_DIOW_b XTALI/CLKI B_PDDACK# <35>
B_PDDREQ 60 21 R561 SH_SP_SUN@0_4 +3V SH_SP_ULI@.1U-10V_4 B_PIORDY
B_PDD15 IDE_DMARQ DD_DISABLE_B R562 SH_SP_SUN@10K_6
use ULI M5285 SH_SP@.1U-10V_4 B_PDIOR#
B_PIORDY <35>
61 IDE_DD15 IOINSEL1 20 B_PDIOR# <35>
B_PDD0 62 19 SH_SP@10U/X5R-6.3V_8 B_PDIOW#
IDE_DD00 IOINPIN B_PDIOW# <35>
B_PDD14 63 18 R563 SH_SP_SUN@10K_6
B_PDD1 IDE_DD14 IOINSEL0 R564 SH_SP_ULI@0_4
64 IDE_DD01 SYS_RESET_b 17
65 R565 *100K_4 B_PDDREQ
IDE_RESET_b

THERMAL_PAD B_PDDREQ <35>


R738 SH_SP@0_4 PLTRST# <15,16,18,27,29,31,33,35,36,39,41,42> Stuff L77, C829, B_-IDERST
B_-IDERST <35>
IDE_DD13
IDE_DD02
IDE_DD12

IDE_DD03
IDE_DD11
IDE_DD04

IDE_DD10
IDE_DD05
IDE_DD09
IDE_DD06
IDE_DD08
IDE_DD07

C402 when use ULI


Stuff R564, when
VDDO

C830 M5285
VDDI

use ULI M5285


VSS

*.1U_4
Unstuff R561,
R562, R563 when
10
11
12
13
14
15
B_-IDERST 16
1
2
3
4
5
6
7
8
9

use ULI M5285


B_PDD13

B_PDD12

B_PDD11

B_PDD10

RP94 3 4SH@0_4P2R_S SATA_RXP0 <14> Reference clock select


B_PDD2

B_PDD3

B_PDD4

B_PDD5
B_PDD9
B_PDD6
B_PDD8
B_PDD7

<35> SATA_RXP0_SH
<35> SATA_RXN0_SH 1 2 SATA_RXN0 <14>
ATAIOEN Note
0 disable PATA output
RP93 3 4SH@0_4P2R_S 1 enable PATA output
<35> SATA_TXN0_SH SATA_TXN0 <14>
<35> SATA_TXP0_SH 1 2 SATA_TXP0 <14> Operation Mode
B B
MODE[2..0]
0 0 0 Device mode 100MB/S
+3V +1.8V R304 SH_SP@0_4 0 0 1 Device mode 133MB/S
XTALI 0 1 0 Device mode 150MB/S
0 1 1 RESERVE
B_PDDREQ R581 SH_SP@5.6K_4 1 0 0 Host mode 100MB/S
R557 SH_SP@10M/F_4 XTALO 1 0 1 Host mode 133MB/S
1 1 0 Host mode 150MB/S
B_IRQ14 R582 SH_SP@10K_6 X4 SH_SP@25MHZ 1 1 1 RESERVED
Reference clock select
B_PDD7 R568 SH_SP@10K_6 CLKSEL[1..0] External clock
0 0 20 MHZ
0 1 25 MHZ
C828 C827
B_PIORDY R583 SH_SP@4.7K_6 +3V SH_SP@27P-50V_4 SH_SP@27P-50V_4
close to IDE Connector

A A

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
SATA/PATA C

Date: Friday, February 24, 2006 Sheet 34 of 50


5 4 3 2 1
1 2 3 4

PH@HDD_CON CN41
CN40
B_-IDERST
B_PDD7 1 2 B_PDD8
<34> B_PDD[0..15] B_PDD0 B_PDD6 3 4 B_PDD9
B_PDD1 B_PDD5 5 6 B_PDD10
7 8 GND1 1
B_PDD2 B_PDD4 B_PDD11 2
9 10 RXP SATA_TXP0_SH <34>
B_PDD3 B_PDD3 B_PDD12 3
11 12 RXN SATA_TXN0_SH <34>
B_PDD4 B_PDD2 B_PDD13 4
B_PDD5 B_PDD1 13 14 B_PDD14 GND2
5 SATA_RXN0_SH <34>
B_PDD6 B_PDD0 15 16 B_PDD15 TXN
6 SATA_RXP0_SH <34>
1 2
B_PDD7 17 18 TXP
19 20 GND3 7 2 1
B_PDD8 B_PDDREQ

RST
GND
B_PDD9 B_PDIOW# 21 22
A
23 24 CSEL: A
B_PDD10 B_PDIOR# 8 +3.3VSATA R323 +3V
B_PDD11 B_PIORDY 25 26 PSEL R601 PH@470_4 0 DRIVE0 3.3V
9 SH@0_8
B_PDD12 B_PDDACK# 27 28 3.3V
29 30 1 DRIVE1 3.3V 10
B_PDD13 R739 PP@0_4 B_IRQ14 11
B_PDD14 B_PDA1 31 32 B_-PDIAG R603 PH@10K_4+5V GND
33 34 GND 12
B_PDD15 B_PDA0 B_PDA2 13
D35 B_PDCS1#
NCPP_SH@BAS316 35 36 B_PDCS3# GND HDD_VDD R331
20
37 38 5V 14 +5V
2 1 HDLED# 15 SH@0_8
<40> IDELED# 39 40 5V
HDD_VDD 41 42 HDD_VDD 5V 16
B_PDCS1# 17
<34> B_PDCS1# B_PDA0 L45 43 44 GND
<34> B_PDA0 RSVD 18
B_PDA2 HDD_VDD 19
+5V HDD_VDD

GND
<34> B_PDA2 B_PDCS3# GND
<34> B_PDCS3# 12V 20
B_PDA1 PH@ACB2012L-120-T_8 +3.3VSATA

X
<34> B_PDA1 12V 21
B_IRQ14 22 44 43
<34> B_IRQ14 B_PDDACK# C468 C898 C469 C477 C470 C900 12V 43 44
<34> B_PDDACK# B_PIORDY C463 C465 C460
<34> B_PIORDY B_PDIOR# PH@.1U-10V_4
PH@1000P-50V_4 PH@150U-6.3V_7343
PH@.1U-10V_4 PH@.1U-10V_4
PH@.1U-10V_4 SH@4.7U-10V_8 SH@4.7U-10V_8 SH@.1U-10V_4
<34> B_PDIOR# B_PDIOW#
<34> B_PDIOW# SH@Serial_ATA

B_PDDREQ
<34> B_PDDREQ B_-IDERST
<34> B_-IDERST

RP67 PP@0_8P4R_S
PDD5 2 1 B_PDD5
PDD0 B_PDD0
Media Bay ConnectorBAY ID STATUS PDD10
4
6
3
5 B_PDD10
PDD9 B_PDD9
B
S : DFHS60FR311 8 7
B
RBAYID0/ RBAYID1/
RP65 PP@0_8P4R_S
F : DFHS50FR156 LBAYID0 LBAYID1 STATUS PDIOR# 2 1 B_PDIOR#
CN25 PDDREQ 4 3 B_PDDREQ
<14> SATA_RXN2 1 1 2 2 SATA_RXP2 <14>
0 0 FDD IRQ14 6 5 B_IRQ14
B_PDD12
3 4 PHDD/SHDD PDD12 8 7
<14> SATA_TXN2
<16> RST_RBAY#
LBAYRST#
PDD7
5
3
5
4
6 6 PDD8 SATA_TXP2 <14> 0 1
7 8 PDD9 RP124 PP@0_8P4R_S
PDD6
PDD5
9
7
9
8
10 10 PDD10 1 0 CD/DVD +3V +5V
-PDIAG 2 1 B_-PDIAG
11 12 PDD11 PIORDY 4 3 B_PIORDY
+5V
PDD4 13
11
13
12
14 14 1 1 RSV PDA0 6 5 B_PDA0
15 16 PDD12 PDA2 8 7 B_PDA2
PDD3 15 16 PDD13
17 17 18 18

2
PDD2 19 20 PDD14 R401 RP66 PP@0_8P4R_S
PDD1 19 20 PDD15 R403 HS@0_4 PDD1 B_PDD1
21 21 22 22 <16> RST_HDD# 10K_4 2 1
PDD0 23 24 PDDREQ PDD4 4 3 B_PDD4
C598 PDIOW# 23 24 PDIOR# PDD15 B_PDD15
25 25 26 26 6 5
+3V PIORDY 27 28 R402 NS@0_4 1 3 -IDERST PDD11 8 7 B_PDD11
27 28 PDDACK# <15,16,18,27,29,31,33,34,36,39,41,42> PLTRST#
HS@.1U-10V_4 29 30 RP69 PP@0_8P4R_S
IRQ14 29 30 PDA2 PDD8 B_PDD8
31 31 32 32 Q29 2 1
R111 PDA1 33 34 PDCS3# PDD6 4 3 B_PDD6
PDA0 33 34 RBAYID0 DTC144EU PDD7 B_PDD7
35 35 36 36 RBAYID0 <16> 6 5
10K_4 PDCS1# 37 38 RBAYID1 8 7
IDELED#2 37 38 RBAYID1 <16>
1 CDLED# 39 39 40 40 RCSEL
-RBAYINS 41 42 RP127 PP@0_8P4R_S
<39> -RBAYINS D36 NCPP_SH@BAS31643 41 42 RBAYVCC -IDERST B_-IDERST
43 44 44 2 1
45 46 RBAYVCC 4 3
45 46 -PDIAG R110 R116 +5V PDD3 B_PDD3
47 47 48 48 6 5
49 50 NS@0_4 PDD13 8 7 B_PDD13
+3V 49 50 +3V
NCPP@470_4
51 53 C142 C143 C605 C606 RP125 PP@0_8P4R_S
52 54
NC FOR
C C115 C599 C57 C589 PDD2 B_PDD2 C
SLAVE 2 1
HS@BAYCON_50P 1000P-50V_4 .1U-10V_4 .1U-10V_4 .1U-10V_4 PDD14 4 3 B_PDD14
R740PP@0_4 .1U-10V_4 .1U-10V_4 .1U-10V_4 .1U-10V_4 PDIOW# 6 5 B_PDIOW#
IDELED# CDLED# PDDACK# 8 7 B_PDDACK#

RP64 PP@0_8P4R_S
PDD0 PDD[0..15] <14> RBAYVCC PDCS1# B_PDCS1#
2 1
PDD1 PDA1 4 3 B_PDA1
PDD2 PDCS3# B_PDCS3#
ODD Connector PDD3 +5V
6
8
5
7
CN24 PDD4
+5V PDD5 R105 HS@22_8
1 2 PDD6 R93 NS@0_8
3 4

3
-IDERST PDD8 PDD7 R92 NS@0_8
PDD7 5 6 PDD9 PDD8 Q9
C106 PDD6 7 8 PDD10 PDD9 Q8
PDD5 9 10 PDD11 PDD10 HS@AO4414 RBAYON#
11 12 2
HS@.1U-10V_4 PDD4 PDD12 PDD11 8 1
PDD3 13 14 PDD13 PDD12
15 16 7 2
PDD2 PDD14 PDD13 6 3 HS@2N7002
PDD1 17 18 PDD15 PDD14
19 20 5
PDD0 PDDREQ PDD15

1
21 22 PDIOR# R108
PDIOW# 23 24 Z1422

4
25 26 15V
PIORDY PDDACK# PDIOR#
27 28 PDIOR# <14>

3
IRQ14 PDIOW# HS@10K_4
29 30 PDIOW# <14>
PDA1 -PDIAG PDDACK# Q10 C138 C126 C90 C125 C135 C134
31 32 PDDACK# <14>
PDA0 PDA2 IRQ14
33 34 IRQ14 <14>
PDCS1# PDCS3# PIORDY 2 HS@.1U-25V_8 1000P-50V_4 .1U-10V_4 .1U-10V_4 .1U-10V_4
35 36 PIORDY <14><16> RBAYON#
CDLED# PDDREQ 150U-6.3V_7343
37 38 PDDREQ <14>
D RBAYVCC 39 40 D
RBAYVCC HS@2N7002
41 42
43 44

1
RCSEL 45 46
47 48 PDA[2:0] <14>
PDA0
51
52

49 50 PDA1
PDA2 PROJECT : ZB1
51
52

PDCS1#
PDCS3#
PDCS1# <14>
PDCS3# <14>
Quanta Computer Inc.
Size Document Number Rev
NS@ODD_CONN HDD & CDROM & MEDIA BAY C
Date: Wednesday, March 01, 2006 Sheet 35 of 50
1 2 3 4
1 2 3 4 5 6 7 8

Option of External Volume


Control or Standby
Mode/De-Pop

+5V_ADO

R329 10K_4 MIC1-VREFO-L


MIC1-VREFO-L <37>
+5V +5V_ADO
+5V_ADO
L78 BK2125HS330_8
<37> FRONT-L FRONT-L C473 10U-10V_8
C881 C884 C889 C888 C870 C873
<37> FRONT-R FRONT-R
A A
.1U-10V_4 10U-10V_8 .1U-10V_4 .1U-10V_4 .1U-10V_4 10U-10V_8
ADOGND
U53

36

35

34

33

32

31

30

29

28

27

26

25
ADOGND

FRONT-R

LINE2-VREFO
Sense B

MIC1-VREFO-R

MIC2-VREFO
FRONT-L

DCVOL

LINE1-VREFO-L

MIC1-VREFO-L

VREF

AVSS1

AVDD1
+3V

+5V_ADO 37 24 LINE1-R
LINE1-VREFO-R LINE1-R LINE1-R <37>
38 23 LINE1-L C454 C452 C451 C450
AVDD2 LINE1-L LINE1-L <37>
39 22 .1U-10V_4 .1U-10V_4 .1U-10V_4 10U-10V_8
SURR-L MIC1-R MIC1IN <37>
R327 20K/F_6 40 21
JDREF/NC MIC1-L
41 20 C880 .1U-10V_4
SURR-R CD-R
42 AVSS2
ALC883 CD-GND 19 C879 .1U-10V_4
ADOGND R326 0_4
43 18 C878 .1U-10V_4 R336 0_4
ADOGND SURR-VREFO-L CD-L
44 17 C871 .1U-10V_4
SURR-VREFO-R MIC2-R ADOGND
45 16 C869 .1U-10V_4
MIC2-VREFO-R MIC2-L
46 15 C868 .1U-10V_4
LINE2-VREFO-R LINE2-R
47 14 C862 .1U-10V_4
SPDIFI/EAPD LINE2-L
SPDIF_OUT R588 BK1608LL121-T48

SDATA-OUT
<37,42> SPDIF_OUT SPDIFO Sense A 13

SDATA-IN

PCBEEP
RESET#
BIT-CLK
DVDD1

DVDD2
DVSS1

DVSS2
GPIO0

GPIO1

SYNC
10

11

12
1

9
B B

+3V +3V

U52

5
1 PCMSPK
PCMSPK <30>
883_AMP_MUTE# C857 1U-16V_6 R579 10K_6 BEEP 4
<37> 883_AMP_MUTE#
2 ACZ_SPKR
ACZ_SPKR <16>
ACZ_SDOUT_AUDIO

CODEC-BITCLK

ACZ_SDIN0

ACZ_SYNC_AUDIO

CODEC-RESET#
C856 R584 SN74LVC1G86DCKR

3
100P-50V_6 1K_6

+3V_S5 1020RST
For MDC Module R585 0_4
ACZ_RST#_AUDIO <14>
PLTRST# <15,16,18,27,29,31,33,34,35,39,41,42>
C912

CN12 C353 EC@22P-50V_4


ACZ_SYNC_AUDIO <14>
1 GND RSV 2
ACZ_SDOUT_AUDIO 3 4 .1U-10V_4 R641
AC_SDO RSV ACZ_SDIN0 <14>
5 6 Y12
ACZ_SYNC_AUDIO GND 3.3V R324 22_4 VDD_S1020 DVDD1020 EC@1M_4
7 AC_SYNC GND 8 BIT_CLK_AUDIO <14> EC@TXC=13MHz
<14> ACZ_SDIN1 ACZ_SDIN1 R556 33_4 9 10 VDD_S1020
ACZ_RST#_AUDIO AC_SDI GND L85 CODEC-BITCLK MICAGND
11 AC_RST# AC_BCLK 12 ACZ_SDOUT_AUDIO <14>

R643
BK1608LL121-T C913

EC@100K_4R644
MDC R555
C822 CODEC-RESET#

1
C914 C915 EC@22P-50V_4

1020RST

EC@10K_4
*10P-50V_4 *22_4 ACZ_SYNC_AUDIO EC@.1U-10V_4 EC@1U-16V_6
MICAGND
C821 CODEC-BITCLK R6452 1 EC@100K_4
R6462 1 EC@100K_4
*10P-50V_4 C456 C455 C453 MICAGND MICAGND

2
*22P-50V_4 *22P-50V_4 *22P-50V_4
MICAGND

36
35
34
33
32
31
30
29
28
27
26
25
C
R335 0_6 U57 C

VDD_S1020 DVDD1020

XO
VDD_S

DVSS

XI
VOLUP
VOLDN
SW15

SW10
V10
TEST
RST_
PWD_
R674 *0_4
1020CLK <39>
ADOGND R675 *0_4
1020DAT <39>
Tied at one point only under the MICAGND C917 EC@10U-10V_8
37 V15 24 R6472 1 EC@100K_4
SDA_SHI R648 EC@10K_4
codec or near the codec 38 AVSS SCL_SHI 23
R649 EC@100K_4 C918 EC@.1U-10V_4
R650 EC@1K_4
39 MIC_P 22 R6512 1 EC@100K_4
<37> INTMICP GPIO4 1020GPIO5
R652 EC@1K_4
40 MIC_N 21
C919 GPIO5 1020GPIO6
<37> INTMICN 41 NC GPIO6 20
EC@12n_4 42 NC 19 MICAGND
DVDD DVDD1020
43 LINE_IN 18 C920 EC@.1U-10V_4
+5V_ADO MICAGND C921 EC@.1U-10V_4C922 EC@1U-16V_6 DVSS 1020GPIO7
44 REF1 GPIO7 17
45 AVSS 16 1020MBCLK
R655 EC@1K_4 C924 EC@1U-16V_6 SCL_EE 1020MBDATA MICAGND
46 REF2 SDA_EE 15
U61A R656 EC@1K_4 R657 EC@100_4 C926 EC@.1U-10V_4
47 LINE_OUT 14 R6582 1 EC@100K_4
C936 EC@12n_4 C927 EC@1U-16V_6 BYPASS C928 EC@.1U-10V_4
48 SPK_OUT_P TXD 13
8

SPK_OUT_N
EC@LM358ADR MICAGND R6602 1 EC@100K_4
3 R659 EC@1K_4

SEG_SEL
<37> LINEINL1020 + <37> MIC1020
1 C938 EC@1U-16V_6 C929

DVSS
AVSS
2 DVDD1020 C937 EC@.1U-10V_4 MICAGND

RXD
-
EC@12n_4

NC

NC
NC
NC

NC
NC

NC
T130
MICAGND
EC@VP1020
4

10
11
12
R662

1
2
3
4
5
6
7
8
9
R661 MICAGND
+3V VDD_S1020 DVDD1020 +5V
EC@10K_4 EC@10K_4 DVDD1020 DVDD1020
U58 C930

1
ADOGND 1020MBCLK 6 1 MICAGND MICAGND
SCL A0 T131
1020MBDATA 5 2 EC@1U-16V_6 EC@10U-10V_8 EC@10U-10V_8
U61B SDA A1 C931 R663 C932 C935
6 -
A2 3
7 C939 EC@1U-16V_6 EC@.1U-10V_4 EC@100K_4
C933 C934

3
5 7 8 EC@1U-16V_6 EC@1U-16V_6
<37> LINEINR1020
+
EC@LM358ADR NC VCC

2
4

3
GND G910
G952
EC@24LC02 MICAGND MICAGND MICAGND MICAGND
D U59 U60 D
EC@G952T25U EC@G910T21U
MICAGND MICAGND

GPIO7 GPIO6 GPIO5 1020GPIO5


1020GPIO6
0 0 X Internal mode 1020GPIO7
DVDD1020
0 1 X Reserved R667 EC@100K_4
R666 EC@10K_4 2 1
1 0 0 Small EEPROM R669 EC@100K_4 PROJECT : ZB1
R668 *10K_4 2 1 R670 0_6
1 1 0 Large EEPROM R672 EC@100K_4
R671 *10K_4 2 1 Quanta Computer Inc.
1 0 1 SHI MICAGND
Size Document Number Rev
1 1 1 UART ADOGND REALTEK ALC883 & MDC C

Date: Friday, February 24, 2006 Sheet 36 of 50


1 2 3 4 5 6 7 8
5 4 3 2 1

LINE OUT
+5V_ADO +5V_ADO +5V_ADO
HPL L46 EZ@BK1608LL121_6 SPKL_SYS
SPKL_SYS <42>
GAIN1 SPKR HP HPR L47 EZ@BK1608LL121_6 SPKR_SYS
SPKR_SYS <42>

MODE MODE C896 C895


C489 C492 C476 C487 C485
D .1U-10V_4 10U-10V_8 10U-10V_8 1U-16V_6 1U-16V_6 EZ@470P-50V_4 EZ@470P-50V_4 D
0 10.5 3

1 9 0 ADOGND ADOGND ADOGND


<36> LINEINL1020

25

15

10
<36> LINEINR1020 U22

7
R339 0_6 C491 1U-16V_6 2 20 HPS

VDD

HPVDD
C1P

C1N
CPVDD
<36> FRONT-L INL HPS
+5V_ADO R338 0_6 C490 1U-16V_6 28 14 HPL
<36> FRONT-R INR HPL
R340 *100K_4
R337 *100K_4 1 13 HPR
R334 NC HPR
+5V_ADO 27 4 INSPKL+
ADOGND NC OUTL+ INSPKL-
OUTL- 5
1K_4 17 INSPKR-
GAIN1 R613 GAIN1 24 GAIN_SEL
OUTR-
OUTR+ 18 INSPKR+ +5V_ADO LINE IN
R333 R772 *0_4 23 6
10K_4 GND PVDDL
PGNDL 3
883_AMP_MUTE# 1 MUTE C475 C482 C488 LINE1-L C883 LINEINL_SYS
1U-16V_6

CPGND
2 22 16

CPVSS
<36> 883_AMP_MUTE# /SHDN PVDDR <36> LINE1-L
*1K_4 D29 MTW355 19

GND

VSS
PGNDR .1U-10V_4 .1U-10V_4 10U-10V_8 LINE1-R C472 LINEINR_SYS
1U-16V_6
21 VBIAS <36> LINE1-R

P
<39> AMP_MUTE# 1 2
ADOGND D28 MTW355 C478 MAX9755AETI

26

11

12

29
9
1U-16V_6

1/25 by Max
C
C484 C
HPPLG R602 NZ@0_4 HPPLG_SYS ADOGND ADOGND
1U-16V_6 LINEINL_SYS L79 EZ@BK1608LL121_6 LINEINL_PR
LINEINL_PR <42>
+5V_ADO LINEINR_SYS L44 EZ@BK1608LL121_6 LINEINR_PR
LINEINR_PR <42>
ADOGND C471
C890
R591
EZ@470P-50V_4
EZ@470P-50V_4
100K_4
5

U54

HPPLG 2 D27 MTW355 ADOGND


4 HPPLG_SYS 1 2 HPS

<42> HPSENCE_PR
HPSENCE_PR 1
20 MIL
AUDIO DJ
R611
EZ@SN74AHC1G32DCKR
R690 NEC@0_6 IN_MIC
3

EZ@100K_4
CN11
CN9
R691 EC@0_6
INTMICP <36>
MIC
2
<39> TV_ON# 1 1 1
<39> VIDEOMODE# 2 2
ADOGND 3 INT_MIC R149 C205
<39> AUDIPOMODE# 3
<39> PLAYBTN# 4 4
5 *1K_4 22P-50V_4
<39> STOPBTN# 5
883_AMP_MUTE# R773 2.2K_4 6
<39> REVBTN# 6 <36> INTMICN
<39> FRDBTN# 7 7
B 8 MICAGND MICAGND B
ADOGND 8
AUDIO DJ_8P_L

MIC1-VREFO-L R330 2.2K_4


TOUCH PAD/AUDIO JACK <36> MIC1-VREFO-L

<36> MIC1IN
C448 1U-16V_6 MIC1 R332 NZ@0_6 MIC1_SYS

FFC connector L35


+5V_TP C251 .1U-10V_4 R684 0_6 R682 1K_4 R683 2.2K_4 INTMICP
+5V <36> MIC1-VREFO-L
BK2125HS330_8 CN10 +5V_ADO A clean power C940
R210 R207 1
2
1 SPEAKER CONNECTOR source is
required.
10U/X5R-6.3V_8

10K_4 10K_4 2
+3V 3 3
4 C887
L37 LZA10-2ACB104MT_6 TP_DATA 4 MICAGND
<39> TBDATA 5 5
L36 LZA10-2ACB104MT_6 TP_CLK 6 EZ@.1U-10V_4
<39> TBCLK 6 U21
7 7
R219 8 R623 0_6 5 6 PR_MIC_IN
<36,42> SPDIF_OUT 8 CN17 VCC SEL PR_MIC_IN <42>
C263 0_6 9 R624 0_6 ADOGND
*.1U-10V_4 9 INSPKR+ L81 BK1608LL121_6 INSPKR+N R625 0_6 PR_MIC MIC1
10 10 4 1 IN_B1 COM 4
C256 11 INSPKR- L82 BK1608LL121_6 INSPKR-N R341 0_6 <42> PR_MIC R328
*.1U-10V_4 11 INSPKL+ L83 BK1608LL121_6 INSPKL+N 36 R325 0_6 MIC1_SYS
12 12 25 3 IN_B0
ADOGND 13 INSPKL- L84 BK1608LL121_6 INSPKL-N C486 .1U-10V_4 2
HPL R215 0_6 13 1 C479 1000P-50V_4 GND EZ@100K_4
14 14
HPR R213 0_6 15 C907 C906 C903 C902R_L_SPEAKERS C480 .1U-10V_4
LINEINL_SYS R212 0_6 15 C483 1000P-50V_4 EZ@SN74LVC1G3157DCKR
16 16
A LINEINR_SYS R211 0_6 17 47P-50V_4
47P-50V_4
47P-50V_4
47P-50V_4 C474 .01U-16V_4 ADOGND ADOGND A
IN_MIC R692 NEC@0_6 MIC1_SYS R208 0_6 17 C481 .1U-10V_4
18 18
R693 EC@0_6 R205 0_6 19
<36> MIC1020 19
HPPLG HPPLG# R204 0_6 20 20
SEL FUNCTION
3

Q50 T/P AND AUDIO 20PIN


ADOGND LOW IN_B0 PROJECT : ZL6
+5V
2 R700 2.2K_4 HIGH IN_B1
Quanta Computer Inc.
2N7002 Size Document Number Rev
AUDIO AMP(MAX 9755) C
1

Date: Wednesday, March 01, 2006 Sheet 37 of 50


5 4 3 2 1
5 4 3 2 1

+3V +3V_S5 +5V


RP108
SLCT 2 1
PE 4 3
D BUSY D
6 5
ACK# 8 7
U27

11
26
45
54

7
EZ@4.7K_8P4R_S
RP109

VCC1
VCC2
VCC3
VCC4

VTR
55 SLCT PD4 2 1
SLCT SLCT <42>
56 PE PD5 4 3
PE PE <42>
57 BUSY PD6 6 5
BUSY BUSY <42>
58 ACK# PD7 8 7
ACK~ ACK# <42>
SIO_14M 9 53 PD7
<2> SIO_14M CLOCKI PD7 PD7 <42>
LAD0/FWH0 10 51 PD6 EZ@4.7K_8P4R_S
<14,39> LAD0 LAD0 PD6 PD6 <42>
LAD1/FWH1 12 50 PD5 RP110
<14,39> LAD1 LAD1 PD5 PD5 <42>
LAD2/FWH2 13 49 PD4 PD3 2 1
<14,39> LAD2 LAD2 PD4 PD4 <42>
LAD3/FWH3 14 48 PD3 PD0 4 3
<14,39> LAD3 LAD3 PD3 PD3 <42>
LFRAME#/FWH4 15 47 PD2 PD1 6 5
<14,39> LFRAME# LFRAME~ PD2 PD2 <42>
LDRQ0# 16 46 PD1 PD2 8 7
<14> LDRQ#0 LDRQ~ PD1 PD1 <42>
PCIRST# 17 44 PD0
<15,27,29,30> PCIRST# PCI_RESET~ PD0 PD0 <42>
SIO_PD# 18 42 SLIN# EZ@4.7K_8P4R_S
LPCPD~ SLCTIN~ SLIN# <42>
SIO_PCICLK 20 41 INIT# RP115
<2> PCI_CLK_SIO PCI_CLK INIT~ INIT# <42>
SERIRQ 21 59 ERROR# AFD# 2 1
<16,29,30,39> SERIRQ SER_IRQ ERROR~ ERROR# <42>
PCI_PME# 6 60 AFD# ERROR# 4 3
<15,27,29,30> PCI_PME# IO_PME~ ALF~ AFD# <42>
CLKRUN# 19 61 STRB# INIT# 6 5
<16,29,30,39> CLKRUN# CLKRUN~ STROBE~ STRB# <42>
34 SLIN# 8 7
GP12/IO_SMI~
SYSOPT0 33 EZ@4.7K_8P4R_S
SYSOPT1 GP11/SYSOPT0 STRB# R351 EZ@4.7K_4
40 GP23/SYSOPT1
5 MDCD1#
DCD1~ MDCD1# <42>
32 64 MDSR1#
GP10 DSR1~ MDSR1# <42>
35 62 MRXD1
GP13/IRQIN1 RXD1 MRXD1 <42>
36 1 MRTS1# SLCT C535 *200P-50V_4
C GP14/IRQIN2 RTS1~ MRTS1# <42> C
IRRX 23 63 MTXD1 PE C534 *200P-50V_4
GP40/IRRX TXD1 MTXD1 <42>
24 2 MCTS1# BUSY C533 *200P-50V_4
GP41/IRTX CTS1~ MCTS1# <42>
SIO_32K 25 3 MDTR1# ACK# C532 *200P-50V_4
<16> SIO_32K GP42/CLKI32 DTR1~ MDTR1# <42>
27 4 MRI1 MRI1 <42> PD7 C536 *200P-50V_4
GP43 RI1~ PD6 C528 *200P-50V_4
28 GP44
29 PD5 C538 *200P-50V_4
GP45 IRRX2 PD4 C537 *200P-50V_4
30 GP46 IRRX2 37
31 38 IRTX2 PD3 C542 *200P-50V_4
GP47 IRTX2 IRMODE R764 PD2 C545 *200P-50V_4
IRMODE/IRRX3 39
PD1 C546 *200P-50V_4
GND1
GND2
GND3
GND4

PD0 C548 *200P-50V_4


*10K_4 SLIN# C549 *200P-50V_4
INIT# C555 *200P-50V_4
FI@SIO1000 ERROR# C531 *200P-50V_4
22
43
52

+3V_S5 +3V AFD# C530 *200P-50V_4


8

STRB# C529 *200P-50V_4

R21 R374

*10K_4 FI@10K_4
D17
SIO_PD# 2 1 LPC_PD# <16,30>
PCI_PME# *BAS316

B B

DEFAULT CONFIGURATION
SYSOPT1 SYSOPT0 PORT BASE ADDRESS

0 0 0X002E
0 1 0X004E
1 0 0X162E
1 1 0X164E
FIR&CIR
+3V_S5
CN32

+5V 1 +3V +3V


+5V +3V_S5 IRRX 2
IRTX2 3
IRRX2 4 R371 R373
C797 C796 IRMODE 5
6
FI@10U-10V_8 FI@10U-10V_8 7 *10K_4 FI@10K_4
8 SYSOPT1 SYSOPT0
FI@FIR_CIR
R367 R372

A FI@10K_4 *10K_4 A

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
SIO1000 C

Date: Friday, February 24, 2006 Sheet 38 of 50


5 4 3 2 1
5 4 3 2 1

LDRQ#(pin 8) internal is no use


VCCRTC +3VPCU

C149 C630 C600 C84 C153

R415 10U-10V_8 .1U-10V_4 .1U-10V_4 .1U-10V_4 .1U-10V_4


0_4
+3VPCU

R404 Should have a 0.1uF capacitor close to every


+3VPCU +3VPCU
U36 GND-VCC pair + one larger cap on the supply.

591_AVCC
MBCLK 6 1 C621 0_4 C596 C625 +3VPCU
D
MBDATA SCL A0 .1U-10V_4 .1U-10V_4 *.1U-10V_4 I/O Address D
5 SDA A1 2
3 C634 BADDR1-0 Index Data ENV1 R409 10K_4
A2 0 0 2E 2F
.1U-10V_4 +3V
7 8 0 1 4E 4F
WP VCC C152 1 0 (HCFGBAH, HCFGBAL)(HCFGBAH, HCFGBAL)+1 BADDR0 R406 *10K_4
GND 4

123
136
157
166

161
.1U-10V_4 1 1 Reserved

16

34
45

95
24LC08 U9
BADDR1 R407 *10K_4

VDD

AVCC
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6

VBAT
SHBM R408 10K_4

+3VPCU SERIRQ 7 81 TEMP_MBAT SHBM=1: Enable shared memory with host BIOS
<16,29,30,38> SERIRQ SERIRQ AD0 TEMP_MBAT <48>
8 82 TEMP_ABAT +3VPCU
LDRQ AD1 TEMP_ABAT <48>
LFRAME#/FWH4 9 83
<14,38> LFRAME# LFRAME AD2
R114 LAD0/FWH0 15 84 T5 MBCLK R418 4.7K_4
<14,38> LAD0 LAD0 Host interface AD3
LAD1/FWH1 14 87 WIRELESS_SW# MBDATA R414 4.7K_4
<14,38> LAD1 LAD1 IOPE0AD4 WIRELESS_SW# <40>
470K_4 LAD2/FWH2 13 88 BLUETOOTH_SW# 2ND_MBCLK R422 4.7K_4
<14,38> LAD2 LAD2 IOPE1/AD5 BLUETOOTH_SW# <40>
LAD3/FWH3 10 89 SUSC# 2ND_MBDATA R424 4.7K_4
<14,38> LAD3 LAD3 AD Input IOPE2/AD6 SUSB# SUSC# <16> TV_ON#
PCLK_591 PCLK_591 18 90 R729 4.7K_4
<2> PCLK_591 LCLK IOPE3/AD7 SUSB# <16>
19 LREST DP/AD8 93
KBSMI# 2 1 22 94 +3V
<16> KBSMI# SMI DN/AD9
D32 BAS316 23
R113 PWUREQ CC-SET
DA0 99 CC-SET <47>
*22_4 100 WIRELESS_SW# R76 4.7K_4
SCI# DA output DA1 SYSFAN# <40>
2 1 31 101 CONTRAST
<16> SCI# IOPD3/ECSCI DA2 CONTRAST <25>
D33 BAS316 102 VFAN BLUETOOTH_SW# R72 4.7K_4
DA3 CPUFAN# <5>
GATEA20 2 1 5 32 8724CELLS
<14> GATEA20 GA20/IOPB5 IOPA0/PWM0 8724CELLS <47>
D5 BAS316 6 33
C157 RCIN# KBRST/IOPB6 IOPA1/PWM1 -RBAYINS
<14> RCIN# 2 1 IOPA2/PWM2 36 -RBAYINS <35>
*10P-50V_4 D6 BAS316 PWM 37
IOPA3/PWM3 AMP_MUTE# <37>
MX0 71 or PORTA 38
<40> MX0 KBSIN0 IOPA4/PWM4 HWPG <44,45,46>
MX1 72 39
<40> MX1 KBSIN1 IOPA5/PWM5 REVBTN# <37>
MX2 73 40
<40> MX2 KBSIN2 IOPA6/PWM6 STOPBTN# <37>
MX3 74 43
<40> MX3 KBSIN3 IOPA7/PWM7 FRDBTN# <37>
MX4 77
<40> MX4 KBSIN4
MX5 78 153
<40> MX5 KBSIN5 IOPB0/URXD FAN_OT# <29> 1/25 by Max
C MX6 79 154 TX_551 C
<40> MX6 KBSIN6 Key matrix scan IOPB1/UTXD CRT_IN#_EC <26>
MX7 80 162 LID591#
<40> MX7 KBSIN7 IOPB2/USCLK LID591# <16,25>
163 MBCLK
PORTB IOPB3/SCL1 MBCLK <5,19,48>
MY0 49 164 MBDATA
<40> MY0 KBSOUT0 IOPB4/SDA1 MBDATA <5,19,48>
MY1 50 165 PLTRST#
<40> MY1 KBSOUT1 IOPB7/RING/PFAIL PLTRST# <15,16,18,27,29,31,33,34,35,36,41,42>
MY2 51
<40> MY2 KBSOUT2
MY3 52 168 591_PME#
<40> MY3 KBSOUT3 IOPC0 1020CLK R676
MY4 53 169 0_4
<40> MY4 KBSOUT4 IOPC1/SCL2 1020DAT R677 2ND_MBCLK <40>
MY5 56 170 0_4
<40> MY5 KBSOUT5 IOPC2/SDA2 2ND_MBDATA <40>
MY6 57 171 BAS316 1 2
<40> MY6 KBSOUT6 PORTC IOPC3/TA1 DNBSWON# <16>
MY7 58 172 FANSIG D4
<40> MY7 KBSOUT7 IOPC4/TB1/EXWINT22 FANSIG <5>
MY8 59 175 EC_FPBACK#
<40> MY8 KBSOUT8 IOPC5/TA2 EC_FPBACK# <25>
MY9 60 176
<40> MY9 KBSOUT9 IOPC6/TB2/EXWINT23 FANSIG2 <40>
MY10 61 1 PWROK_1 R112 0_4
<40> MY10 KBSOUT10 IOPC7/CLKOUT PWROK_EC <16>
MY11 64
<40> MY11 KBSOUT11
MY12 65 26
<40> MY12 KBSOUT12 PORTD-1 IOPD0/RI1/EXWINT20 AUDIPOMODE# <37>
MY13 66 29 ACIN
<40> MY13 KBSOUT13 IOPD1/RI2/EXWINT21 ACIN <47>
+5V MY14 67 30 REV:C MODIFY
<40> MY14 KBSOUT14 IOPD2/EXWINT24 VIDEOMODE# <37>
MY15 68
<40> MY15 KBSOUT15
2 NBSWON#
IOPE4/SWIN TV_ON# NBSWON# <40> 1020CLK
105 TINT IOPE5/EXWINT40 44 TV_ON# <37> 1020CLK <36>
8
6
4
2

106 PORTE 24 1020DAT


TCK IOPE6/LPCPD/EXWIN45 PLAYBTN# <37> 1020DAT <36>
RP19 107 25 CLKRUN#
TDO JTAG debug port IOPE7/CLKRUN/EXWINT46 CLKRUN# <16,29,30,38>
4.7K_8P4R_S 108 TDI
109 124 ENV0
TMS IOPH0/A0/ENV0 ENV1
IOPH1/A1/ENV1 125
BADDR0
7
5
3
1

<42> MSCLK 110 PSCLK1/IOPF0 IOPH2/A2/BADDR0 126


111 127 BADDR1
<42> MSDATA PSDAT1/IOPF1 IOPH3/A3/BADDR1
114 128 TRIS
<42> KPCLK PSCLK2/IOPF2 PORTH IOPH4/A4/TRIS
115 131 SHBM
<42> KPDATA PSDAT2/IOPF3 PS2 interface IOPH5/A5/SHBM
TBCLK 116 132 A6 U7
<37> TBCLK PSCLK3/IOPF4 IOPH6/A6
TBDATA 117 133 A7 ENV0 21 25 D0
<37> TBDATA PSDAT3/IOPF5 IOPH7/A7 A0 D0 +3VPCU
CAPSLED# 118 ENV1 20 26 D1
<40> CAPSLED# PSCLK4/IOPF6 A1 D1
NUMLED# 119 138 D0 BADDR0 19 27 D2
<40> NUMLED# PSDAT4/IOPF7 IOPI0/D0 A2 D2
139 D1 BADDR1 18 28 D3
IOPI1/D1 D2 TRIS A3 D3 D4 R400
IOPI2/D2 140 17 A4 D4 32
141 D3 SHBM 16 33 D5
591_32KX1 PORTI IOPI3/D3 D4 A6 A5 D5 D6 *10K_4
B
158 32KX1/32KCLKOUT IOPI4/D4 144 15 A6 D6 34 B
145 D5 A7 14 35 D7
R107 20M_6 591_32KX2 IOPI5/D5 D6 A8 A7 D7
160 32KX2 IOPI6/D6 146 8 A8
147 D7 A9 7 10 VCC1_PWROK
R106 IOPI7/D7 A10 A9 RESET#/NC
36 A10 RY/BY#/NC 12 T67

1
150 RD# A11 6 29 C585
PORTJ-1 IOPJ0/RD WR# A12 A11 NC1 *.1U-10V_4
IOPJ1/WR0 151 5 A12 NC2 38
1
2

121K/F_6 A13 4 11 +3VPCU


Y4 A14 A13 NC3

2
SELIO 152 3 A14
A15 2 31
32.768KHZ M/A# A16 A15 VCC
62 41 1 30
CHANGED FROM PR_INSERT# <40> PWRLED#
PR_STS 63
IOPJ2/BST0 IOPD4
42 CELL-SET
M/A# <48>
A17 40
A16 VCC
<42> PR_STS IOPJ3/BST1 PORTD-2 IOPD5 CELL-SET <48> A17
D/C# A18 C590
4
3

<29> USBON# 69 IOPJ4/BST2 IOPD6 54 D/C# <48> 13 A18


70 PORTJ-2 55 BL/C# A19 37
<40> SUSLED# IOPJ5/PFS IOPD7 BL/C# <48> A19
75 23 .1U-10V_4
<40> BATLED0# IOPJ6/PLI GND
C145 C136 76 143 A8 CS# 22 39
<40> BATLED1# IOPJ7/BRKL_RSTO IOPK0/A8 CE# GND
10P-50V_4 10P-50V_4 142 A9 RD# 24
IOPK1/A9 A10 WR# OE#
<29> RF_EN 148 IOPM0/D8 IOPK2/A10 135 9 WE#
BT_POWERON# 149 PORTK 134 A11
<29> BT_POWERON# IOPM1/D9 IOPK3/A11
155 130 A12
<16> RSMRST# IOPM2/D10 PORTM IOPK4/A12
156 129 A13 ST Micro M29W008AB/AMD-29LV081B/SST39VF080
<29> CCD_POWERON# IOPM3/D11 IOPK5/A13/BE0
VRON 3 121 A14
<43> VRON IOPM4/D12 IOPK6/A14/BE1
MAINON 4 120 A15
<20,23,42,44,45,46> MAINON IOPM5/D13 IOPK7/A15/CBRD
SUSON 27
<42,44,45> SUSON IOPM6/D14
S5_ON 28 113 A16
<44> S5_ON IOPM7/D15 IOPL0/A16
112 A17
CS# PORTL IOPL1/A17 A18
173 SEL0 IOPL2/A18 104
174 103 A19
SEL1 IOPL3/A19
47 CLK IOPL4/WR1 48
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7

NC10
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

PC97551
122
159
167
137
17
35
46

96

11
12
20
21
85
86
91
92
97
98

A A
C151

1U-16V_6
FOR 97551 ONLY

+3V_S5 +3V_S5 +3VPCU

PROJECT : ZB1
R117 2 R109

*4.7K_4 *4.7K_4 Quanta Computer Inc.


INTERNAL PULLUP IN SB Q11
PDTC143TT Size Document Number Rev
<27> LAN_PME# 1 3 591_PME# 97551 & FLASH C

Date: Wednesday, March 01, 2006 Sheet 39 of 50


5 4 3 2 1
5 4 3 2 1

+3VPCU +3V
INT K/B REVB P/N&FT CHANGE
+3V
CN8 RP44 CA5 220P-50V_8P4C CA6 220P-50V_8P4C
MY15 MX7 10 1 MY3 MY1 1 2 1 2 MY7 Q42 R566 25mils
<39> MY15 1

2
MY14 MX6 MY4 9 2 MY2 MY2 3 4 3 4 MY6 TV@RHU002N06 TV@200_6
<39> MY14 2
MY13 MX5 MY5 8 3 MY1 MX4 5 6 5 6 MY5
<39> MY13 3
MY12 MY0 MY6 7 4 MY0 MY3 7 8 7 8 MY4 <39> 2ND_MBCLK 3 1 LM86VCC_R
<39> MY12 4
MY11 MY1 MY7 6 5
<39> MY11 5
MY10 MY2 C838
<39> MY10 6
MY9 MX4 10K_10P8R R575 R577 TV@.1U-10V_4
10/20mils
<39> MY9 7
MY8 MY3 CA9 220P-50V_8P4C CA7 220P-50V_8P4C +3V TV@10K_4
TV@10K_4
<39> MY8 8
MY7 MY4 RP43 MY12 1 2 1 2 MX2 U50
<39> MY7 9
MY6 MY5 10 1 MY11 MY13 3 4 3 4 MY9
<39> MY6 10

2
MY5 MY6 MY12 9 2 MY10 MY14 5 6 5 6 MX3 8 1
<39> MY5 11 SCLK VCC
D MY4 MY7 MY13 8 3 MY9 MY15 7 8 7 8 MY8 D
<39> MY4 12
MY3 MY8 MY14 7 4 MY8 <39> 2ND_MBDATA 3 1 7 2
<39> MY3 13 SDA DXP

3
MX7 MX3 MY15 6 5 C840
<39> MX7 14
MX6 MY9 Q44 6 3 2 Q43
<39> MX6 15 +3VPCU ALERT# DXN
MY2 MX2 10K_10P8R CA8 220P-50V_8P4C CA4 220P-50V_8P4C TV@RHU002N06 TV@2200P-50V_4
<39> MY2 16 TV@MMBT3904
MX5 MX1 MX1 1 2 1 2 MY0 SYS_THERM_OVER# 4 5
<39> MX5 17 OVERT# GND
MX4 MY10 MY10 MX5

1
<39> MX4 RP34 3 4 3 4
MX3 18 MY11 MX3 MY11 MX6 R707
<39> MX3 19 10 1 5 6 5 6 +5V
MX2 MX0 MX4 9 2 MX2 MX0 7 8 7 8 MX7 TV@10K_4 TV@MAX6657/GMT-781
<39> MX2 20
<39> MY1
MY1
21
MY12 MX5 8 3 MX1 ADDRESS: 98H
MY0 MY13 MX6 7 4 MX0
<39> MY0 22
MX1 MY14 MX7 6 5
<39> MX1 23
MX0 MY15
<39> MX0 24
10K_10P8R
25
PTWO_KB
2ND FAN
+3V

FANPWR = 1.6*VSET R590


TV@10K_4
WIRELESS_SW# 1 4
<39> WIRELESS_SW# CN39
SW9
SLIDE_SWITCH_BT U63 <39> FANSIG2
+5VFAN2

2
3
+5V 2 VIN VO 3 1
GND 5 2
SYS_THERM_OVER# 1 6 C867
BLUETOOTH_SW# FON# GND 3
<39> BLUETOOTH_SW# 1 4 GND 7
C SW10 4 8 TV@.01U-16V_4 C
SLIDE_SWITCH_BT <39> SYSFAN# VSET GND
TV@G995

2
3
TV@FAN_CON
C854 C858

TV@1000P-50V_4 TV@10U-10V_8
R761 MI@0_4 R762
<29> MILAN_LED MI@150_4

+3V R636 LED12 2 1 NMI@0_4


NMI@150_4 LED_Y_LTST-C190KFKT WIRELESS_LED <29> SW6 MISAKI_SWITCH
R763 3 2
R635 150_4 LED11 BT1# MY10 <39>
1 2 BT_LED <29> <39> MX0 1 4
LED_B_LTST-C190TBKT 5
6
+3V +3V
+5V
SW7 MISAKI_SWITCH
BT2# 3 2
<39> MX1
R61 R608 1 4
330_4 5
330_4 R617 IDE_LED 6
NUMLED

3
10K_4 SW8 MISAKI_SWITCH
BT3# 3 2
<39> MX2
1 4
NUMLED# 2 2N7002 IDELED# 2 2N7002 5
<39> NUMLED# Q6 <35> IDELED# Q48 6

SW4 MISAKI_SWITCH
BT4# 3 2
B <39> MX3 B

1
1 4
+3V 5
6
+3VPCU
SW5 MISAKI_SWITCH
R756 NBSWON# 3 2
<39> NBSWON#

3
LED9 +3V Q54 1 4
1 SH@10K_4 5
SUSLED# <39>
R342 330_4 3 6
2 PWRLED# <39> 2
R546

3
Q41 SH@2N7002
LED_G/Y_LTST-S326KGJSKT L-F SH@10K_4

CAPSLED LED4

1
<14> SATA_LED# 2 2 1
LED_G_LTST-C190KGKT
SH@2N7002 +3V
R18 PWRLED2 LED8 2 1
200_4 LED_G_LTST-C190KGKT
R751 PWRLED1 LED13

1
2 1
LED10 200_4 LED_G_LTST-C190KGKT
1 +3V
BATLED1# <39>
R343 330_4 3 EMAIL_LED LED7 2 1
2 LED_G_LTST-C190KGKT
BATLED0# <39>
R523
IDE_LED LED6 2 1
LED_G/Y_LTST-S326KGJSKT L-F 330_4 LED_G_LTST-C190KGKT
EMAIL_LED
3

NUMLED LED5 2 1
LED_G_LTST-C190KGKT
A A
EMAIL_LED# 2 2N7002 +3V
<16> EMAIL_LED# Q39

R62
330_4 CAPSLED
1

3
PROJECT : ZB1

<39> CAPSLED#
CAPSLED# 2 2N7002
Q7
Quanta Computer Inc.
Size Document Number Rev
FAN,SWITCH,LED,K/B C
Date: Friday, February 24, 2006 Sheet 40 of 50
1

5 4 3 2 1
5 4 3 2 1

SDVOB_R+
<8,18> PEG_TXP0
SDVOB_R-
<8,18> PEG_TXN0
SDVOB_G+
<8,18> PEG_TXP1
SDVOB_G-
<8,18> PEG_TXN1
DVI_AVDD
C161
SDVOB_B+
<8,18> PEG_TXP2
SDVOB_B- INT- 1 2
<8,18> PEG_TXN2
D D
R136 CT@4.7K_4 SDVO_CTRLCLK SDVOB_CLK+
+2.5V <8,18> PEG_TXP3 CT@.1U-10V_4 PEG_RXN1 <8,18>
SDVOB_CLK-
<8,18> PEG_TXN3 C160 PEG_RXP1 <8,18>
R137 CT@4.7K_4 SDVO_CTRLDATA INT+ 1 2
+2.5V
DVI_AVDD
CT@.1U-10V_4
PULL LOW FOR DVO NOT PRESENT(INTERNAL PULLLOW IN 915GM)

+2.5V 250mA

48
47
46
45
44
43
42
41
40
39
38
37
R461 R462 U13
+3V 190mA CT@10K_4 *100K_4

SDVOB_R-
SDVOB_R+
AVDD3
SDVOB_CLK-
SDVOB_CLK+

SDVOB_B-
SDVOB_B+
AVDD2

SDVOB_G+
AGND3

SDVOB_G-

AGND2
+2.5V 1 2 1 2

L28 L27
CT@BLM11A601S_6 CT@BLM11A601S_6
+3V 1 2 DVI_AVDD_PLL 1 36 DVI_AVDD
1 2 +2.5V
AVDD_PLL AVDD1
<15,16,18,27,29,31,33,34,35,36,39,42> PLTRST# 2 RESET* RSV 35
1

1
3 34 C171 C170 C714
C181 C184 AS BSCAN INT- C172
<8> SDVO_CTRLCLK 4 SPC SDVOB_INT- 33
CT@.1U-10V_4
CT@10U-10V_8 5 32 INT+ CT@.1U-10V_4 CT@10U-10V_8
CT@.1U-10V_4 CT@.1U-10V_4
<8> SDVO_CTRLDATA SPD SDVOB_INT+
2

2
6 AGND_PLL AGND1 31
C
To GMCH 7 30 C
DVODATA DGND1 DGND2
8 SD_PROM HPDET 29 TMDS_HPD <19,25,42>
DVOCLK 9 28 DVI_DVDD
L24 SC_PROM DVDD2
<19,42> TMDS_DDCDATA 10 SD_DDC PROM2 27
CT@BLM11A601S_6 11 26
<19,42> TMDS_DDCCLK SC_DDC PROM1
+2.5V 1 2 DVI_DVDD 12 25
DVDD1 VSWING

2
TGND1

TGND2
TVDD1

TVDD2
TDC0*

TDC1*

TDC2*
1

TDC0

TDC1

TDC2
C182 C159 R124

TLC*
TLC
C183 CT@1.2K_4
CT@10U-10V_8
CT@.1U-10V_4 CT@.1U-10V_4
CT@CH7307C-DEF
2

13
14
15
16
17
18
19
20
21
22
23
24
L67

1
CT@BLM11A601S_6
DVI_TVDD 1 2 +3V

1
C701 C710
C713
CT@.1U-10V_4
CT@.1U-10V_4
CT@10U-10V_8
DVI_CLK-_7307

2
DVI_CLK+_7307

DVI_TX0-_7307
DVI_TX0+_7307

DVI_TX1-_7307
B DVI_TX1+_7307 B

DVI_TX2-_7307
DVI_TX2+_7307

ALWAYS NOT ON, TEST ONLY


RP18 CT@0_4P2R_S
DVI_CLK-_7307 3 4 CLK-_7307 <25>
DVI_CLK+_7307 1 2 CLK+_7307 <25>
RP21 CT@0_4P2R_S
DVI_TX0-_7307 3 4
+3V TX0-_7307 <25>
+3V DVI_TX0+_7307 1 2
U40 TX0+_7307 <25>
RP23 CT@0_4P2R_S
DVOCLK 6 1 DVI_TX1-_7307 3 4
SCL A0 TX1-_7307 <25>
DVODATA 5 2 DVI_TX1+_7307 1 2
SDA A1 TX1+_7307 <25>
3 C728 RP25 CT@0_4P2R_S
A2 DVI_TX2-_7307
*.1U-10V_4 3 4 TX2-_7307 <25>
7 8 DVI_TX2+_7307 1 2
WP VCC TX2+_7307 <25>
GND 4

*AT24C16

A A

PROJECT : ZB1
R464 *1K_4
1 2 DVOCLK
+3V
Quanta Computer Inc.
R465 *1K_4
1 2 DVODATA Size Document Number Rev
+3V
CH7307 C

Date: Friday, February 24, 2006 Sheet 41 of 50


5 4 3 2 1
5 4 3 2 1
L4 L48
CN20-4 CN20-3 EZ@BK1608LL121_6
EZ@BK1608LL121_6 CN20-2 CN20-1
CRTHSYNC PR_CRTHSYNC 78
<26> HSYNC_EZ4 CRT_HS
8 100 CRTVSYNC PR_CRTVSYNC 79 64 R7 EZ@0_4
<28> 100MBPS# LANLED_LINK GND100 <26> VSYNC_EZ4 CRT_VS DVI_HPD TMDS_HPD <19,25,41>
EZ@0_4 R5 31 101 TV_COMP_PR DDCCLK_1 81 98
<28> ACT# LANLED_ACT TV_COMPS TV_COMP_PR <25> <26> DDCCLK_1 CRT_DDCK DVI_CLK- DVI_CLK- <25>
33 GND33 TV_LUMA 102 TV_Y/G_PR TV_Y/G_PR <25> <26> DDCDAT_1
DDCDAT_1 80 CRT_DDCDT DVI_CLK+ 97 DVI_CLK+ <25>
TV_CRMA 103 TV_C/R_PR TV_C/R_PR <25> 105 GND105 GND99 99
SUSON_PR 55 104 EZ@BK1608LL121_6 L7 PR_RED 106 94 R347
SUSON GND104 <26> VGA_RED_PR VGA_R DVI_D0- DVI_TX0- <25>
MAINON_PR 56 EZ@BK1608LL121_6 L6 PR_GRN 107 95 100K_4
MAINON <26> VGA_GRN_PR VGA_G DVI_D0+ DVI_TX0+ <25>
DOCKPRG 85 9 STRB# EZ@BK1608LL121_6 L5 PR_BLU 108 96
BRG_PWROK STRB# STRB# <38> <26> VGA_BLU_PR VGA_B GND96
11 PD0 109 91
PD0 GND109 DVI_D1- DVI_TX1- <25>
KPCLK 52 13 PD1 117 92
<39> KPCLK PS2KBCK PD1 GND117 DVI_D1+ DVI_TX1+ <25>
KPDATA 51 15 PD2 119 93
<39> KPDATA PS2KBDT PD2 <2> CLK_PCIE_EZ1 PCIE1_CLK+ GND93
MSCLK 54 17 PD3 120 61
<39> MSCLK PS2MSCK PD3 <2> CLK_PCIE_EZ1# PCIE1_CLK- DVI_D2- DVI_TX2- <25>
D MSDATA 53 18 PD4 118 62 D
<39> MSDATA PS2MSDT PD4 PD[0..7] <38> GND118 DVI_D2+ DVI_TX2+ <25>
19 PD5 115 63
MDSR1# PD5 PD6 <15> PCIE_TXP1 PCIE1_TP GND63
<38> MDSR1# 48 DSR# PD6 20 <15> PCIE_TXN1 116 PCIE1_TN
MRTS1# 46 21 PD7 114 67 EZ@0_4 R4 DVI_DDCCLK
<38> MRTS1# RTS# PD7 GND114 DVI_DDCCK DVI_DDCDATA
MCTS1# 44 24 PE 111 65 EZ@0_4 R6
<38> MCTS1# CTS# PE PE <38> <15> PCIE_RXP1 PCIE1_RP DVI_DDCDT
MRI1 42 10 AFD# 112 66
<38> MRI1 RI AFD# AFD# <38> <15> PCIE_RXN1 PCIE1_RN GND66
MDCD1# 49 12 ERROR# 113
<38> MDCD1# DCD# ERROR# ERROR# <38> GND113
MRXD1 47 14 INIT# 29 37 X-TX3P-PR
<38> MRXD1 RXD# INIT# INIT# <38> <2> CLK_PCIE_EZ2 PCIE2_CLK+ TX3P X-TX3P-PR <28>
MTXD1 45 16 SLIN# 30 38 X-TX3N-PR
<38> MTXD1 TXD# SLIN# SLIN# <38> <2> CLK_PCIE_EZ2# PCIE2_CLK- TX3N X-TX3N-PR <28>
MDTR1# 43 22 ACK# 27 39
<38> MDTR1# DTR# ACK# ACK# <38> GND27 GND39
50 23 BUSY 59 34 X-TX2P-PR
GND50 BUSY BUSY <38> <15> PCIE_TXP2 PCIE2_TP TX2P X-TX2P-PR <28>
EZ@BK1608LL121-T 25 SLCT 60 35 X-TX2N-PR
SLCT SLCT <38> <15> PCIE_TXN2 PCIE2_TN TX2N X-TX2N-PR <28>
R349 41 28 36
<36,37> SPDIF_OUT SPDIF_OUT GND28 GND36 X-TX1P-PR
AUDGND1 72 AGND72 GND58 58 <15> PCIE_RXP2 89 PCIE2_RP TX1P 4 X-TX1P-PR <28>
SPKR_SYS 74 77 90 5 X-TX1N-PR
<37> SPKR_SYS LINEOUT_R GND77 <15> PCIE_RXN2 PCIE2_RN TX1N X-TX1N-PR <28>
SPKL_SYS 75 110 D14 88 6
<37> SPKL_SYS LINEOUT_L GND110 GND88 GND6
LINEINR_PR 70 1 2 EZ@BAS316 R346 EZ@0_4 57 1 X-TX0P-PR
<37> LINEINR_PR LINEIN_R <15,16,18,27,29,31,33,34,35,36,39,41> PLTRST# PCIERST TX0P X-TX0P-PR <28>
LINEINL_PR 71 32 26 2 X-TX0N-PR
<37> LINEINL_PR LINEIN_L RESERVE32 PCIEWAKE TX0N X-TX0N-PR <28>
PR_MIC 73 82 86 3
<37> PR_MIC MICIN RESERVE82 <2,16,27,29,33> PDAT_SMB PCIESMBDT GND3
AUDGND1 76 AGND76 +5V <2,16,27,29,33> PCLK_SMB 83 PCIESMBCK GND7 7
69 87 68 DOCKIN#
<37> PR_MIC_IN PRMIC_DET <2> EZ_CLKREQ# PCIEREQ# DOCK_IN#
40 C518 84 R345 EZ@1K_4
<37> HPSENCE_PR HPSENSE_PR DOCKED#
124 123 EZ@.1U-10V_4
G2 G1
GND126 126 VA 122 P2
125 GND125 P1 121 VA
KPCLK
EZ@EZ4_Acer_define EZ@EZ4_Acer_define
KPDATA
+3V +5V EZ@EZ4_Acer_define EZ@EZ4_Acer_define
MSCLK
C MSDATA R344 EZ@0_4 C

C941 C942 C943 C944 VA


AUDGND1
EZ@100P_4 EZ@100P_4
R354 R355
EZ@100P_4 EZ@100P_4 2.2K_4 DI@10K_4 C4 C5

+3V_S5 EZ@.1U-50V_6 EZ@.1U-50V_6

2
+3V_S5 Q20

1 3 DVI_DDCDATA
<19,41> TMDS_DDCDATA DVI_DDCDATA <25>
C543
R352 DI@FDV301N
.1U-10V_4 DOCKIN#
+3V
5

EZ@10K_4 DOCKPRG 1
+5V
4 PR_STS <39> B: CHANGE TO FDV301N

7
DOCKIN 2
U23
EZ@TC7SH08FU
3
3

SUSON_PR 3 5 SUSON <39,44,45>


R353 R357
R356 DI@10K_4
DOCKIN# EZ@1M/F_6 2.2K_4 U4B
2
EZ@7W125FU

2
Q22 Q21
EZ@2N7002 DOCKIN#
B DVI_DDCCLK B
<19,41> TMDS_DDCCLK 1 3 DVI_DDCCLK <25>
1

DI@FDV301N +3V_S5

PR_CRTHSYNC C513 *10P-50V_4


PR_CRTVSYNC C516 *10P-50V_4 C6
PR_BLU C512 EZ@10P-50V_4 +5V

8
PR_GRN C511 EZ@10P-50V_4 .1U-10V_4
PR_RED C510 EZ@10P-50V_4
CRTHSYNC C7 *10P-50V_4
SPKL_SYS C509 EZ@220P-50V_4 CRTVSYNC C517 *10P-50V_4 MAINON_PR 6 2
<16,25,28> DOCKIN# MAINON <20,23,39,44,45,46>
SPKR_SYS C508 EZ@220P-50V_4
LINEINL_PR C527 EZ@220P-50V_4 DDCCLK_1 C515 EZ@10P-50V_4 +3V_S5
LINEINR_PR C503 EZ@220P-50V_4 DDCDAT_1 C514 EZ@10P-50V_4 R359 U4A
PR_MIC_IN C502 EZ@47P-50V_4 X-TX1P-PR C496 EZ@10P-50V_4 EZ@7W125FU

4
PR_MIC C507 EZ@47P-50V_4 X-TX1N-PR C497 EZ@10P-50V_4 EZ@10K_4
100MBPS# C526 EZ@1000P-50V_4 X-TX0P-PR C494 EZ@10P-50V_4
PR_INSERT_5V <25,26>
ACT# C523 EZ@1000P-50V_4 X-TX0N-PR C495 EZ@10P-50V_4 R358

3
TV_COMP_PR C504 EZ@10P-50V_4 X-TX3P-PR C500 EZ@10P-50V_4
TV_C/R_PR C506 EZ@10P-50V_4 X-TX3N-PR C501 EZ@10P-50V_4 100K_4
TV_Y/G_PR C505 EZ@10P-50V_4 X-TX2P-PR C498 EZ@10P-50V_4
X-TX2N-PR C499 EZ@10P-50V_4 DOCKIN# 2

C541 Q23
EZ@2N7002
EZ@.1U-10V_4

1
A A

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
EZ4 CONN C
Date: Friday, February 24, 2006 Sheet 42 of 50
5 4 3 2 1
1

8736VCC +5VPCU

VIN_8736_1 VIN
PL20
HI0805R800R-00_8
PR156
10_6

1
PC51 PC50
2.2U_8 2.2U_8 PD13 PC161 +

21

30
<Voltage> <Voltage> SW1010CPT .1U_6
PR152 <Voltage>

VCC

VDD
178K/F_6

2
14 OSC BST1 25 2 1

PR159 0_6 PC159 PC160

5
15 PC158 PQ48 .1U_8 .1U_6 PC56 PC196
PR36 TIME .22U_6 NTMFS4707N <Voltage> 10U/X6S-25V_1210 470U/25V PC162 PC198
71.5K/F_6 <Voltage> PC163 PC164 10U/X6S-25V_1210 10U/X6S-25V_1210
17 CCV DH1 27 2 1 4
PC43 2200P_4 2200P_4
2200P_4 PR177 0_6
VCC_CORE

1
2
3
16 ILIM
PR154
510K_4
19 REF
LX1 26 VCC_CORE <4>
PC46
.22U_6 18 PL18
TRC

1
<Voltage> PR155 *0.36uH

1
2K/F_6 PQ49 PQ50 + + +
34 NTMFS4108N NTMFS4108N PD14
<4> H_VID0 D0
SSM24PT-LF PL19 PC44
0.5UH 0.1U_4 PC45

2
<4> H_VID1 35 D1 DL1 32 4 4
.01U_6

2
<4> H_VID2 36 D2

1
2
3

1
2
3
37 PC157
<4> H_VID3 D3 *100P_4
38 PC47 PC31 PC195
<4> H_VID4 D4
31 470U-2V_7343 470U-2V_7343 470U-2V_7343
PGND
<4> H_VID5 39 D5

<4> H_VID6 40 D6
6 +5VPCU VIN_8736_2 VIN
CSP1 PR160 NTC 10K_6-B4.25K PR161
PR146 8736EN 4 PC40 3.4K/F_6 PL14
<39> VRON SHDN
100K_4 5 .22U_4
CSN1 PR158 5.23K/F_6 *HI0805R800R-00_8
PC38 PR157 0_4
100P_4 PC37
4700P_4 8736VCC
DRSKP# PR153 0_4 33 PR31 0_4 PC30 PC145 PC146 PC148 PC26
DRSKP# DRSKP

1
28 PU5 *2.2U_8 PD29 *.1U_8 *.1U_6 *.1U_6
PWM2 <Voltage> *SW1010CPT <Voltage> <Voltage>

VCC

5
PR149 PQ42 PC149 PC150
*100K_4 8 4 10 2 1 *NTMFS4707N *2200P_4 *2200P_4 PC144
CSP2 PR140 *NTC 10K_6-B4.25K PR137 GND BST PR136
PR28 500_6 3 PC39 *2.94K/F_6 *0_6 4
<8,16> PM_DPRSLPVR DPRSLPVR
7 *.22U_4 PC151
CSN2 PR141 *5.11K/F_6 PR145 *.22U_6
PR144 *0_4 <Voltage> *10U/X6S-25V_1210 *10U/X6S-25V_1210

1
2
3
5 DLY DH 9 2 1
*100K_4 PC36 PR24
*4700P_4 *5.1K/F_4 PR178 *0_6
+3V PR29 0_4 2 VCC_CORE
<3> PSI# PSI
PWM3 29
PR25 7 8 VCC_CORE <4>
A PR143 0_4 EN LX PL15 A

5
PR46 *100K_4 10 DRSKP# *0.36uH
CSP3 8736VCC

1
1.91K/F_4 PR26
PR43 0_4 24 PR32 0_4 *0_4 + +
<3,8,16> DELAY_VR_PWRGOOD IMVPOK

1
CSN3 9 DL 2 4 4
PD11 PC32 PC33
0.1U_4 .01U_6

2
6 PWM *SSM24PT-LF
PR142 PR27 PC152

1
2
3

1
2
3
100K_4 *0_4 *100P_4
PR30 0_4

2
<2,16> VR_PWRGD_CK410# 1 CLKEN PGND 3
11 PC153 PC48
GNDS PR147 470U-2V_7343 470U-2V_7343
PC41 10_4
PR163 PQ41 PQ43
*100K_4 20 1000P_6 PR148 *MAX8552EUB+ *NTMFS4108N *NTMFS4108N
PR42 0_4 GND *27.4_4
<3> H_PROCHOT# 22 VR_HOT

PC52 13
*100P_4 VPS PR35
15.8K/F_4
23 THRM FBS 12
PR162 PR150
1K_4 MAX8736ETL+ PC42 10_4
PU6
PR164 PC49 1000P_6 PR151
*10K_6 100P_4 *27.4_4

VCC_CORE PR34
*100_4

<4> VCCSENSE
<4> VSSSENSE

PR33 +3V
*100_4

2 1 H_VID0
PR47
*100K_4
2 1 H_VID1
PR45
*100K_4
2 1 H_VID2
PR44
*100K_4
2 1 H_VID3
PR40
*100K_4
2 1 H_VID4
PR39
*100K_4
2 1 H_VID5
PR38
*100K_4
2 1 H_VID6
PR37
*100K_4

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
VCORE (MAX8736) C

Date: Friday, February 24, 2006 Sheet 43 of 50


1
5 4 3 2 1

PC85 PR77
PD17 VIN1999 VIN1 PL26 VIN
*100P_6 *3.32K/F_6 PR174 HI0805R800R-00_8
2 1 1 2

4.7_1206 PC184 PC192 PC193

5
6
7
8
ZD5.6V PC103 PC191 PC100
PR75 .1U_8 1000P_6 .1U_6
0_6 PC176 PC175 *10U/25V_1206 .1U_8
.1U_8 4.7U/X6S-25V_1210

2
4

PR63 10U/X6S-25V_1210
12K/F_6 1999DH3
PQ61
<3> 1999_SHT#
D AO4422-LF D
PL24
1.5UH_SIL104R-1R5_10A/8.1mohm

3
2
1
AO4704 Rds on = 13mOhm
1999LX3
+3VPCU
ILOAD * Rds on * 10 = ILIM

5
6
7
8
2 1 8A
ILIM3 = 1.04V Current limit 8A PC79 .22U_6 PQ59
ILIM5 = 0.78V Current limit 6A AO4704-LF
VL 1999DL3 4
PR68
PC87 PC170 + + PC86 PC173
PC95
.1U_6

1999_SHT#
100K/F_6
1 2
PR82
PC171

3
2
1
47_6 1U/10V_6 .1U_6 10U/25V_1206
REF2V PU9 330U-6.3V_7343 330U-6.3V_7343
1999VCC 17 22
VCC OUT3
1 2 REF2V 8 REF DH3 26 VIN1
PC90 1U/10V_6
PR169 PR170 ILIM3 5 27
90.9K/F_6 154K/F_6 ILIM3 LX3
ILIM5 11 28 1999BST3
ILIM3 ILIM5 ILIM5 BST3 PC188 PC98 PC186
7 FB3 DL3 24

5
6
7
8
VL 2 .1U_8
+3VPCU VL 9 6
FB5 SHDN PD31
PR168 PR172 PR73 3
100K/F_6 100K/F_6 0_6 3VON VIN1999 CHP202U 10U/X6S-25V_1210 10U/X6S-25V_1210
3 ON3 V+ 20 4
1

1
PR74 0_6 5VON 4 18
PR70 ON5 LDO5 PC181
23 10 PC89 .1U_6 PQ62
C
*100K/F_6 GND PRO 4.7U/10V_8 AO4422-LF C

2
1999VCC 12 19
PR84 *0_6 SKIP DL5

3
2
1
2 14 1999BST5
<39,45,46> HWPG PGOOD BST5
1 15 1999LX5 PL25 3R8uH 6A
N.C. LX5 +5VPCU

5
6
7
8
PC83 1U/10V_6 25 16 1999DH5
PR85 0_6 LDO3 DH5
1999VCC 13 21 +
TON OUT5 1999DL5 + PC187
4
SKIP_SEL .1U_6
MAX1999EEI+
3

PQ60
AO4704-LF
+5VPCU PR86 *100K/F_6 2 PR80 PC104 PC185 PC102
10U/25V_1206 330U-6.3V_7343 330U-6.3V_7343

3
2
1
0_6
3

PQ55
*2N7002E
1

2 PQ56 PD19
<45> MAIND
*2N7002E CHN217 VIN +1.8VSUS +1.5VSUS +3VSUS +5VSUS 15V

PR79 0_6
2 +5VPCU
PC92
1999DL3 PR66 PR64 PR179 PR65 PR61 PR67
1

3 1M_6 22_8 22_8 22_8 22_8 1M_6


.1U_6 10V-1 PR78 *0_6
1 10V
SUSD
1

3
+5VPCU +3VPCU PC88

3
B 1U/10V_6 B
2

<39,42,45> SUSON 2 2 2 2 2 2

PR62 PC78
8

PQ12 1M_6 PQ15 PQ64 PQ16 PQ10 PQ11 *2200P_6


DTC144EU 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E

1
PD32
CHN217
+3VPCU +5VPCU
PR83 0_6 10V-1
PQ63 PQ52 PC183 2
AO4812-LF AO4812-LF 1999DL3
3 VIN +3V_S5 15V

5
.1U_6 PR171 0_6
1

1 15V
PC97 PC96
SUSD SUSD .1U_6 .1U_6
1

MAIND MAIND
+5V +3V PC178 PR71 PR69 PR167
1U/10V_6 1M_6 22_8 1M_6
+5VSUS +3VSUS
2

PC190 PC167 PQ20


PC194 PC172 AO4812-LF
.1U_6 .1U_6 .1U_6 .1U_6

4
3

3
3

2 PR72 2 2
<39> S5_ON PC80
VIN SMDDR_VTERM +1.8V +2.5V +1.5V +1.1V_VGA +3V +5V 15V 1M_6 PQ13 PQ17 +3V_S5
PQ14 2N7002E 2N7002E *2200P_6 +5V_S5
DTC144EU
1

PC82 PC81
1

1
A A
PR96 PR59 PR166 PR58 PR95 PR89 PR87 PR81 PR76
1M_6 22_8 22_8 22_8 22_8 22_8 22_8 22_8 1M_6 .1U_6 .1U_6

MAIND
MAIND <45>
3

3
3

PROJECT : ZB1
2 PR97 2 2 2 2 2 2 2 2
39,42,45,46> MAINON PC84
1M_6 Quanta Computer Inc.
PQ24 PQ9 PQ51 PQ8 PQ23 PQ22 PQ21 PQ19 PQ18 *2200P_6
DTC144EU 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E Size Document Number Rev
1

5V/3.3V (MAX1999) C
1

Date: Friday, February 24, 2006 Sheet 44 of 50


5 4 3 2 1
5 4 3 2 1

VIN8743
VIN8743 VIN
PL22

1
HI0805R800R-00_8
PD33 +1.5VSUS +1.5V
CHP202U PQ65
PC180 AO4422-LF
6A
D PC182 PC169 D

8
7
6
5
8 1

5
6
7
8
10U/X6S-25V_1210 PC179 10U/X6S-25V_1210 7 2
4.7U/X5R-6.3V-8 +5VPCU .1U_6

3
6 3
4 PR173 5

1
VIN8743 8743VCC 4

10_6

4
22
4
+1.8VSUS PQ58 PC91 PU10 PC94

2
8.5A AO4422-LF 8743BST2 19 21 4.7U/X5R-6.3V-8 PQ53

V+

VCC
BST2 VDD PC93 AO4422-LF
<44> MAIND
PL23 8743DL2 25 8743BST1

1
2
3
20 DL2 BST1
1.5UH_SIL104R-1R5_10A/8.1mohm .1U_8 PC197

3
2
1
8743LX2 17 26 8743DH1 PL21 +1.5VSUS
LX2 DH1 .1U_8 1.5UH_SIL104R-1R5_10A/8.1mohm 10U/Y5V-10V_1206

8
7
6
5
8743DH2 18 27 8743LX1
DH2 LX1
1

5
6
7
8
+ + 16 24 8743DL1
CS2 DL1

1
4

1
15 28 + PC72
OUT2 CS1

1
2

4
PD20 8743FB2 14 1 10U/Y5V-10V_1206
SSM14PT-LF FB2 OUT1 PQ54
2

2
1
2 8743FB1 AO4704-LF
PC177 PC174 PC166 PC168 HWPG FB1 PD18
7 PGOOD

1
470U-2V_7343 PQ57 PR90 PC99 PC101 SSM14PT-LF PC74 PC73
1
2
3

2
TON 5
*150U-4V_3528 .1U_6 AO4704-LF 84.5K/F_6 *100P_6 PR93 PC165

2
11 ON1 MAX8743EEI+ 8743REF *100P_6 5.49K/F_6 .1U_6 470U-2V_7343

3
2
1
10U/Y5V-10V_1206 10U/Y5V-10V_1206

2
C <39,42,44> SUSON 12 ON2 C
REF 10

8743ILIM213 6
PR94 ILIM2 SKIP PC189
100K/F_6 8743ILIM1 3 1U/10V_6
+1.8VSUS +1.8V ILIM1 PR92 8743REF
23

OVP
UVP
PQ5 GND 10K/F_6
+3V_S5 15V NTMS4706N
8 1
8743VCC

8
7 2
6 3 PR88 PR175
5 118K/F_6 61.9K/F_6
1

R746 R747 PC53 AO4704 Rds on = 13mOhm


100K/F_4 100K/F_4 10U/Y5V-10V_1206 8743ILIM1 8743ILIM2
4

ILOAD * Rds on * 10 = ILIM


2

ILIM2 = 1.235V Current limit 9.5A


PR91 PR176 ILIM1 = 0.91V Current limit 7A
3

HWPG 100K/F_6 100K/F_6


<39,44,46> HWPG
S5_ON
<39,44> S5_ON
+2.5V 2 2 R748 *0_4
MAIND <44>
PQ66 PQ67
2N7002E 2N7002E
1

B B

R749 EV@0_4
<20> PCIEVDDRPG PU16
PR135 IV@0_6 1 5
<20,23,39,42,44,46> MAINON NC0 NC2
2 6 VTT_SRC +2.5V
SMDDR_VREF EN VO
PU8
PR60 0_6 PC69 +3VSUS
0,23,39,42,44,46> MAINON 2 SD VREF 4 3 VIN GND0 8 2A
PC143
+1.8VSUS 5 .1U_6 *.1U_6 4
VDDQ NC1

ADJ

1
PC141 PC147 PC142
6 3 10U_8 + .1U_6
AVIN VSENSE
TGND

PC27 PC28

7
8
GND

VTT SMDDR_VTERM
10U_8 .1U_6 SC4215

2
+1.8V 7 PVIN
1A
G2996 0.8V R1
1

VTT-ADJ
1

PC76 PC75 + *150U-4V_3528

2
10U_8 .1U_6 PC70 PC71 PC77 PR134
.1U_6 10U_8 *150U-4V_3528 21.5K/F_6
PR133
2

Vo=0.8(R1+R2)/R2
10K/F_6 R2

1
A A

PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
+1.5 / CPUIO C
Date: Friday, February 24, 2006 Sheet 45 of 50
5 4 3 2 1
1 2 3 4 5

+5VPCU

PR51

0_4
PR48
15mil 1992_VDD 1992_VCC

1
+3V

15mil
PL6 PC55 20_4 PC54
HI0805R800R-00_8 1U/10V_6 1U/10V_6
A 160mil VIN_1992 120mil PD15 A

2
VIN
SW1010CPT

19

24

22
1

8
7
6
5
PC60 PC61 PR52
PC57 PC64 PC65 .1U_6 VIN_1992 10K_4

1992-1

VDD

OVP/UVP

VCC
2200P_4 PR54 14
V+
0_4 1992_BST 17 15mil

2
4 BST
15mil POK 4 HWPG <39,44,45>
+1.05V 1992_DH 15
DH
*10U/X6S-25V_1210 10U/X6S-25V_1210 10U/X6S-25V_1210 20mil LSAT 3
6.5A PQ7

1
AO4422-LF PC59 23 1992SHDN# PR49 0_4
SHDN MAINON <20,23,39,42,44,45>
PL7 .1U_6
1.5UH_SIL104R-1R5_10A/8.1mohm 1992_LX 16

1
2
3
LX AGND 21
1992_OUT 160mil 120mil

2
1 PQ6 N.C 7

8
7
6
5
AO4704-LF 1992_DL 18 PU7
DL
1

PC66 + PR55 20mil MAX1992ETG+

1
.01U_6 PC68 5.1K/F_4
PC67 4 20
470U-2V_7343 PR57 PGND
2

392/F_6 8
PD16 N.C
11 CSP
10U/X6S-25V_1210 SSM14PT-LF

2
PR50
12 *0_4
CSN
11992TON

1
2
3
PR56 PC63 .47U_6 TON
L / RL( DCR ) = Cqe * Rqe 10 OUT
10K/F_4 1 2 1992_CSP 6 1992REF
B REF B
9

SKIP

ILIM
FB
20mil

N.C
1R5 DCR = 0.0081 1992_CSN

1
1.5u / 0.0081 = 0.47u * Rqe 1992_OUT PR165

13
61.9K/F_4 PC62

5
Rqe = 392 1992_FB 1U/10V_6

2
1992ILIM

AO4704 Rds on = 13mOhm


PR53

1
PC58 100K/F_4 ILOAD * Rds on * 10 = ILIM
*470P_4
1992ILIM = 1.235V Current limit 9.5A

2
0.95V
M54 +5VPCU
VIN_1993
PL8
EV@HI0805R800R-00_8
PR98 EV@20_6
VGA_P_VCC
VIN
+3V

1
PC109
1

PC15
PC106 PC105 PC107 PD5 EV@1U/10V_6 EV@1U/10V_6
EV@.1U_6 EV@2200P_6 PC108
1

2
EV@SW1010CPT R750 220_4
2

C VDDCPG <20> C

19

24

22
VIN_1993
VGA_BST

PR11
EV@10U/X6S-25V_1210EV@10U/X6S-25V_1210 PR10 EV@100K/F_6
VDD

OVP/UVP

VCC
5

EV@0_6 14 C950 EV@.22U_4


PQ25 V+
17 BST
EV@NTMFS4707N 4 1993PG PR12 0_4
POK HWPG <39,44,45>
4 1993_DH 15 DH
LSAT 3
1

PC6
EV@.1U_6 PR16 EV@0_4
3
2
1

SHDN 23 MAINON <20,23,39,42,44,45>


PL9 EV@0.36uH
1993_LX PR15 EV@0_4
2

+1.1V_VGA 16 LX GATE 21 V_PWRCNTL <19>


15A PQ26 7 VGA_REFIN PR6 EV@61.9K/F_6
VGA_P_REF PC16
REFIN
1

EV@NTMFS4119N PU4 *.1U_6


1

+ + 1993_DL 18 DL
1

1
PC13 EV@MAX1993ETG+
EV@.1U_6 PR5 PC4
PR8 EV@56K/F_6 EV@470P_4
2

4 20 GND
EV@698/F_6 PR6 61.9K

2
OD 8 V_PWRCNTL M54 V_PWRCNTL M52
PC18 PC17 PR5 56K
2

3
2
1

11 CSP
EV@470U-2V_7343
EV@470U-2V_7343
PR13 LO 1.1V LO 1.0V
1 2 PD4 1.0V PR4 5.9K CS25903F908
EV@SSM14PT-LF 12 CSN
*0_6 PR4 HI 0.95V HI 0.95V
PC14 TON 1 EV@5.9K or 19.6K/F_6 1.1V PR4 19.6K CS31963F906
VGA_CSP 10 OUT
FBLANK

EV@.47U_6
REF 6 VGA_P_REF 1.2V PR4 37.4K CS33743F913
VGA_OUT PR14 EV@0_6
VGA_OUT_R 9
SKIP

ILIM

FB
1

D D
PR7 PC5
13

EV@200K/F_6EV@1U/10V_6
2

L / RL( DCR ) = Cqe * Rqe

0R36 DCR = 0.0011 PH3830 Rds on = 3.2mOhm PROJECT : ZB1


1

0.36u / 0.0011 = 0.47u * Rqe PC7 PR9 ILOAD * Rds on * 10 = ILIM


EV@470P_4EV@100K/F_6 Quanta Computer Inc.
2

Rqe = 698 ILIM2 = 0.66V Current limit 20A Size Document Number Rev
Custom 2.5V C

Date: Friday, February 24, 2006 Sheet 46 of 50


1 2 3 4 5
8 7 6 5 4 3 2 1

D D

+3VPCU REF3V

REF3V <48>
PR180 0_6

REFP
VA
PJ4 PL4
VIN REFP <48>
POWER_JACK HI0805R800R-00_8
1 PR181 0_6
2
3
4 PC12 PC11

1
PL5
HI0805R800R-00_8 .1U_6 .1U_6 1P PC125 *.1U_6
PR17
PC9 PC8 PC10 0.01_3720 2P PC126 *.1U_6
.1U_6 .1U_6 .1U_6 R3

2
1
3 VA2 <48>
VAD PD27 2
SW1010CPT PD6 SPL1040PT

CSSP PL10
CSSN HI0805R800R-00_8

2
PC127 PR113 100K/F_6
PC112
PR125 8724CELLS_R
REF3V <48>
10K_6 2 PD24 1U/25V_8
DA204U PR112

1
C C
PC140 .01U_6 3 100K/F_6 PR182 0_6
8724CELLS <39> 10U/X6S-25V_1210
1 VH
6

PC115 .1U_6
PC138
PQ40 PR107 33_6
IMZ2 .1U_6
IMD

2
PU12

27
26
MAX8724ETI+
PC129 PC123
1

CSSP
CSSN
<48> REF3V
1U/10V_6 1U/10V_6

1
1 DCIN CELLS 17
PC135
LDO 28724LDO PQ30 AOS4912
PD26 USE DEFAULT 4.2V/CELL .1U_6 PR102
SW1010CPT 22 8 G1 D1 1 0.015_3720
PD25 VAD DLOV
10 PD21 PL13
ACIN
REFP BST 24 8724BST 7 S1/D2 D1 2 1 2 BAT-V <48>
PC139 8724LDO PR116 0_6 15 SW1010CPT 6 G2 3 SIL104R-7R0M
SW1010CPT PR122 VCTL PC122

1P

2P
.1U_6 13 25 .1U_6 8724DH 5 S2 4
<39> CC-SET ICTL DHI
47K_6 PC121
12 23 8724LX .01U_6
PC131 PC136 REFIN LX
PR124 47K_6 11 21 8724DL
1000P_6 1000P_6 ACOK DLO
9 20 PC113 PC114 PC119
ICHG PGND
PU15A
8

28 19 CSIP 10U/X6S-25V_1210 10U/X6S-25V_1210


PR120 IINP CSIP CSIN
+ 3 CSIN 18
1 8724LDO 8 10U/X6S-25V_1210
SHDN
- 2
PR117 0_6 16 BAT-V
LM393DR2G BATT
7 CCV
PR128 10K_6 8724REF
4

REF 4
B B
22K_6 6 CCI PR111 5.9K/F_6
CLS 3
R1
5
GND
GND
CCS

2
PC137 OSC PR119 PR118 PR114 PR108 PC130 VCSL=4.096*R2/(R1+R2)
200KHz 10K/F_6
14
29

220P_6 1K_6 0_6 0_6 R2 1U/10V_6 VCLS=2.577V

1
ISOURCE_MAX=(VCLS/VREF)*(0.075/R3)
PC133 PC134 PC132
4.72A=(2.577/4.096)*(0.075/0.01)
.1U_6 .01U_6 .01U_6

CURRNT LIMIT POINT = 4.72A

PR131 10K/F_6
<39> ACIN
A A

VAD 1 2
PR130 PD28 ZD12V
6.8K/F_6
PR132

10K/F_6
PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
BATTERY CHARGER C

Date: Friday, February 24, 2006 Sheet 47 of 50


8 7 6 5 4 3 2 1
1 2 3 4 5

1ST_BATT_CONN
CN23
TEMP_MBAT <39>
PL12 HI0805R800R-00_8 PQ31 PQ32
1 MBAT MBAT+
2 1 8 8 1
TEMP_MBAT 2 7 7 2
3 PL11 HI0805R800R-00_8

PC24
8 4 3 6 6 3

PD7
PC21
9 5 4 5 5 4

1
PR105
6

1
AO4411-LF AO4411-LF 10K_6
7

*ZD5.6V
A PC20 PC23 PC22 A
47P_6

.1U_6
SUYIN_BATTERY 47P_6 10U/X6S-25V_1210

2
PQ36

47P_6
PR20

3
330_6 PDTC143TT
PR19 2 MDISCHG
330_6

1
MBCLK <5,19,39>
PQ28
MBDATA_MBAT ADISCHG 2 IMD2

1
1

1
PQ29 VH VH
PD8 PDTC143TT
PD9
ZD5.6V

1
ZD5.6V PC124

6
PR106
.1U_6 1M_6
2

PU13A

8
ACHG PR99 LM358ADR
10K_6 PR110 + 3 MCHG
CLOSE TO BATTERY CON 1
- 2
470K_6

4
REF3V PD23
ZD15V
PQ34
VIN
5 4 VH
<47> BAT-V PU13B

1
6 3 LM358ADR

3
2
1
B PR18 PR21 + 5 ACHG PC110 PC128 B
10K/F_6 PC120 7 2 7 10U/X6S-25V_1210 .01U_6
.01U_6 PR104

2
HS@470K_6 - 6
10K_6 PQ27

2
8 1
TEMP_MBAT AO4422-LF

1
PR109 PC111
4
1

PD22 100K/F_6 1 2
PC19 AO4812-LF HS@ZD15V

3
.01U_6
.01U_6
2

PQ35

5
6
7
8
2
VA2
VA2 <47>
PU14 PDTC143TT

1
REFP
VL REFP <47>
VL
200mil

16
15
14
13
12
11
10
9
7
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
VDD
ADISCHG PU15B PR123
2ND_BATT_CONN PR41 LM393DR2G 160K/F_6
HS@10K_6 PR129

GND
CN29 TEMP_ABAT <39>
10K_6

GL

G1
G2
C
A
B
PL16 HS@HI0805R800R-00_8 PQ46 PQ47 5 REF3V
1 ABAT ABAT+ +
2 1 8 8 1 7

3
TEMP_ABAT

1
2
3

6
5
8
3 2 7 7 2 - 6
PL17 HS@HI0805R800R-00_8 3 6 6 3
8 4
1

9 5 4 5 5 4 2
6
1

C PR23 PC34 PC156 PD30 PC35 HS@AO4411-LF HS@AO4411-LF PQ4 PC25 C


7 PC155 HS@PDTC143TT.1U_6 PR127
1

HS@SUYIN_BATTERY PR22 PC29 HS@330_6 HS@47P_6 HS@.1U_6 *ZD5.6V HS@47P_6 100K/F_6

1
3

HS@10U/X6S-25V_1210 74HCT237
2

HS@330_6 HS@47P_6 PQ45


<39> CELL-SET

3
HS@IMD2
2

MDISCHG 2
3/10 <39> D/C#
MBCLK PQ44 2
HS@PDTC143TT <39> BL/C#
PQ39 PR126
MBDATA_ABAT 2N7002E 120K/F_6
1

6
1

1
PD10 PD12 MCHG
HS@ZD5.6V HS@ZD5.6V PR138
HS@10K_6
2

CLOSE TO BATTERY CON

REF3V +3VPCU SEL FUNCTION


REF3V <47>
PR101
D LOW IN_B0 D

PR100 PR103 HIGH IN_B1


PR139 NS@0_6
10K/F_6 *10K/F_6 *10K/F_6
U32
TEMP_ABAT M/A#
1ST_BATT 5 VCC SEL 6 M/A# <39> PROJECT : ZB1
1

MBDATA_MBAT 1 4 MBDATA <5,19,39>


PC154 IN_B1 COM
.01U_6 MBDATA_ABAT 3 IN_B0
Quanta Computer Inc.
2

2ND_BATT GND 2
Size Document Number Rev
BATTERY SELECT C
HS@SN74LVC1G3157DCKR
Date: Friday, February 24, 2006 Sheet 48 of 50
1 2 3 4 5
5 4 3 2 1

P1. PR37 , PR38 , PR39 , PR40 , PR44 , PR45 , PR47 Change from 100K to NC.....Page 43
P2. PR154 Change from 680K_4 to 510K_4 .......Page 43
P3. PR152 Change from 143K/F_4 to 169K_4 .......Page 43
P4. PR46 Change from 100K_4 to 1.91K/F_4 .......Page 43
P5. Add PC196 470u/25V .......Page 43
P6. Add PC195 470u/2V .......Page 43
P7. Add PR177 , PR178 0_6 .......Page 43
P8. PQ48 , PQ42 Change from PH7030L to NTMSF4707N .......Page 43
P9. PQ41 , PQ43 , PQ49 , PQ50 Change from PH7030L to NTMSF4119N .......Page 43
D D
P10. Add PQ64 2N7002E .......Page 44
P11. Add PR179 22_8 .......Page 44
P12. PU10 Pin11 connect Change from MAINON to SUSON .......Page 45
P12. Add PQ65 AO4422 .......Page 45
P13. Add PC197 10u/Y5V-10_1206 .......Page 45
P14. PR52 pull hi Change from 3VPCU to +3V .......Page 46
P15. PU7 Pin4 connect to HWPG .......Page 46
P16. PR49 connect Chamnge from VRON to MAINON .......Page 46
P17. PR165 Change from 105K/F_4 to 61.9K/F_4 .......Page 46
P18. PQ25 Change from PH7030L to NTMSF4707N .......Page 46
P19. PQ26 Change from PH7030L to NTMSF4119N .......Page 46
P20. PR115 Change from 0 Ohm to NC .......Page 47
P21. PR116 Change from NC to 0 Ohm .......Page 47
P22. Delete PQ33 IMD2 , PU11 G914D , PC116 10u/10V_8 , PC118 0.1_6 , PC117 1u/10V_6.......Page 47
P23. Add PR180 0_6.......Page 47
P24. Add PR181 0_6.......Page 47
P25. PL13 Change from 10u to 7u.......Page 47
1. RP62, RP61 Part number change from 33ohm to 49.9ohm (Part_No_A is correct)
2. PCIE n/p mirror (Giga LAN and Mini card LAN)
C C
3. RP67, 64, 125, 127, 69, 66, 124, 65 Change to 0ohm
4. Unconnected cable select pin between HDD and CDROM.
5. Change R292 to 0Ohm for 1999_SHT#
6. R141,R173,R188 change to unstuff for GMCH strap
7. Add R247,R248, on BOM
8. Unstuff R51,R398,R41,R50 when use ATI VGA
9. Pull R395 to +3V when use ATI VGA
10. Unstuff R431 when use ATI VGA
11. Stuff C220,C747,C210,C749,C222,C745,C214,C748
12. R560 change to unstuff when use ULI chip
13. R136,R137 only stuff when use 7307
14. Add R637 (10K ohm)
15. Add CN35 on C,D CKU
16. U52 change to ON's part
17. U41 Net swap between PIN3 and PIN4 for LAN EEPROM
18. Change footprnt of SW4, 5, 6, 7, 8 and U4
19. R628, R629 Change to unstuff for ZB1C
20. Change EZ4 PCIE to Lane5, 6

B
21. Delete C808, C809, CN31, Q16, R241, R242, R492 to unstuff (Acer specification change) B

22. Change USB6 to CN21


23. PJ4 change to 4pin and cancel ADPID function.(Acer specification change)
24. VCCP power enable signal change to Mianon.
25. Add R638 (0 ohm, stuff when use UMA)
26. Add echo cancellation circuit.
27. Delete TPM circuit.
28. R116 change to stuff when no hot swap.
29. Add R685, R686 for VGA SMbus pull hi.
30. Add R687, R688 for VGA SMbus EC reserve.
31. Add R689 for ATI VGA PCIE clock strap.
32. Modify SB power plane.
33. Modify S-video pin define.
34. Modify USB power source to S5 power.
35. Add D31, R694 for S3~S5 wake on LAN.
36. Add R690~R693 for echo cancellation select.
37. Move R519, R540 to U5 for power decoupling.
38. Change R678, R679, R680, R681 to 1M Ohm for audio noise.
39. Modify U29 pin define for lan LED issue.
A 40. Exchange location of wireless LED and BT LED. A

41. L73 change to CVA9115MN10

PROJECT : ZB1 PROJECT : ZB1


Quanta Computer Inc. Quanta Computer Inc.
Size Document Number Rev
Change List C

Date: Tuesday, February 07, 2006 Sheet 49 of 50


5 4 3 2 1
5 4 3 2 1

NCPP@ Unstuff when use PATA HDD + PATA ODD.


EV@ Stuff when use external VGA.
IV@ Stuff when use UMA.
M56@ unstuff when use M52/54 ASIC.
D
EZ@ Stuff when use EZ4. D

NZ@ Stuff when no EZ4.


DI@ Stuff when use DVI port.
CT@ Stuff when UMA with DVI port.
CT_EV@ Stuff when UMA with DVI port or external VGA.
SV@ Stuff when use S-video.
GL@ Stuff when use Giga lan.
NL@ Stuff when use 10/100 lan.
CR@ Stuff when use card reader
CR_PRO@ Stuff when card reader connector use PROCONN
C FI@ Stuff when use FIR. C

FW@ Stuff when use IEEE1394.


PH@ Stuff when use PATA HDD.
PP@ Stuff when use PATA HDD + PATA ODD.
SH@ Stuff when use SATA HDD.
SH_SP@ Stuff when use PATA to SATA bridge.
SH_SP_SUN@ Stuff when PATA to SATA bridge use SUNPLUS chip.
SH_SP_ULI@ Stuff when PATA to SATA bridge use ULI chip.
WIRE@ Stuff when LCD connector use wire type.
TV@ Stuff when use TV in.
B B
CD@ Stuff when use camera.
NCD@ unstuff when use camera.
HDCP@ stuff when use HDCP for ATi M5x.

A A

Size Document Number Rev


SKU Note C

Date: Wednesday, March 01, 2006 Sheet 50 of 50


5 4 3 2 1

PROJEC
Quanta

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