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P770DM / P771DM / P770DM-G / P771DM-G

Preface

Notebook Computer

P770DM / P771DM / P770DM-G / P771DM-G

Service Manual

Preface
I
Preface

Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.

This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.

Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface

Version 1.0
September 2015

Trademarks
Intel and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and/or registered trademarks of their respective companies.

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Preface

About this Manual


This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.

It is organized to allow you to look up basic information for servicing and/or upgrading components of the P770DM /
P771DM series notebook PC.

The following information is included:

Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.

Appendix A, Part Lists

Preface
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS

III
Preface

IMPORTANT SAFETY INSTRUCTIONS


Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:

1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19.5V, 11.8A (230 Watts) minimum AC/DC Adapter.
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IV
Preface

Instructions for Care and Operation


The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:

1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.

2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on

Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.

3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.

V
Preface

4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
 5. Take care when using peripheral devices.
Removal Warning Use only approved brands of Unplug the power cord before
When removing any peripherals. attaching peripheral devices.
cover(s) and screw(s)
for the purposes of de-
vice upgrade, remem-
ber to replace the
cover(s) and screw(s)
before restoring power
to the system.

Also note the following


when the cover is re-
moved: Power Safety
Preface

• Hazardous mov- The computer has specific power requirements:


ing parts.
• Keep away from • Only use a power adapter approved for use with this computer.
moving fan blades • Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
• The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Power Safety not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Warning • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Before you undertake • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
any upgrade proce- • Before cleaning the computer, make sure it is disconnected from any external power supplies.
dures, make sure that
you have turned off the
power, and discon- Do not plug in the power Do not use the power cord if Do not place heavy objects
nected all peripherals cord if you are wet. it is broken. on the power cord.
and cables (including
telephone lines and
power cord). You must
also remove your bat-
tery in order to prevent
accidentally turning the
machine on.

VI
Preface

Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.

Battery Guidelines
The following can also apply to any backup batteries you may have.

Preface
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.


Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.

Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.

Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.

VII
Preface

Related Documents
You may also need to consult the following manual for additional information:

User’s Manual on Disc


This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.

System Startup
1. Remove all packing materials.
2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in
position.
Preface

4. Securely attach any peripherals you want to use with


the computer (e.g. keyboard and mouse) to their
ports.
5. Attach the AC/DC adapter to the DC-In jack at the
rear of the computer, then plug the AC power cord
135°
into an outlet, and connect the AC power cord to the
AC/DC adapter (make sure you use the adapter
when first setting up the computer, as to safe-
guard the computer during shipping the battery will
be locked to not power the system until first con-
nected to the AC/DC adapter).
6. Use one hand to raise the lid/LCD to a comfortable
viewing angle (do not to exceed 135 degrees); use Figure 1
the other hand (as illustrated in Figure 1) to support Opening the Lid/LCD/
the base of the computer (Note: Never lift the Computer with AC/DC
Adapter Plugged-In
computer by the lid/LCD).
7. Press the power button to turn the computer “on”.

VIII
Preface

Contents
Introduction ..............................................1-1 Top ................................................................................................. A-3
Bottom .......................................................................................... A-4
Overview .........................................................................................1-1 LCD ............................................................................................... A-5
External Locator - Top View with LCD Panel Open ......................1-4 MB ................................................................................................. A-6
External Locator - Front & Right side Views .................................1-5 HDD ............................................................................................... A-7
External Locator - Left Side & Rear View .....................................1-6
External Locator - Bottom View .....................................................1-7 Schematic Diagrams................................. B-1
Mainboard Overview - Top (Key Parts) .........................................1-8 Block Diagram ................................................................................B-2
Mainboard Overview - Bottom (Key Parts) ....................................1-9 Processor 1/5 ...................................................................................B-3
Mainboard Overview - Top (Connectors) .....................................1-10 Processor 2/5 ...................................................................................B-4
Mainboard Overview - Bottom (Connectors) ...............................1-11 Processor 3/5 ...................................................................................B-5
Disassembly ...............................................2-1 Processor 4/5 ...................................................................................B-6
Processor 5/5 ...................................................................................B-7

Preface
Overview .........................................................................................2-1 DDR4 CHA SO-DIMM_0 ..............................................................B-8
Maintenance Tools ..........................................................................2-2 DDR4 CHA SO-DIMM_1 ..............................................................B-9
Connections .....................................................................................2-2 DDR4 CHB SO-DIMM_0 ............................................................B-10
Maintenance Precautions .................................................................2-3 DDR4 CHB SO-DIMM_1 ............................................................B-11
Disassembly Steps ...........................................................................2-4 Panel, Inverter, CRT .....................................................................B-12
Removing the Battery ......................................................................2-5 Display Port A ..............................................................................B-13
Removing and Installing the Hard Disk Drive ................................2-6 Display Port B ...............................................................................B-14
Removing the M.2 SSD Module ...................................................2-10 HDMI ............................................................................................B-15
Removing the Primary System Memory (RAM) .........................2-11 MXM PCI-E .................................................................................B-16
Removing the System Memory (RAM) from Under the Keyboard ..2-
Lynix Point 1/7 .............................................................................B-17
13 Lynix Point 2/7 .............................................................................B-18
Removing and Installing the Processor .........................................2-15 Lynix Point 3/7 .............................................................................B-19
Removing the Wireless LAN Module ...........................................2-18
Lynix Point 4/7 .............................................................................B-20
Wireless LAN, Combo Module Cables .........................................2-19
Lynix Point 5/7 .............................................................................B-21
Removing the M.2 SATA Module ................................................2-20 Lynix Point 6/7 .............................................................................B-22
Removing and Installing the Video Card ......................................2-22 Lynix Point 7/7 .............................................................................B-23
Part Lists ..................................................A-1 USB + eSATA, USB Charging ....................................................B-24
Part List Illustration Location ........................................................ A-2 CCD, USB Port3 ...........................................................................B-25

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Preface

M.2 3G+USB & WLAN+BT ....................................................... B-26 P750DM LID Switch Board .........................................................B-58
M.2 PCIE4X SSD1 & SSD2 ........................................................ B-27 P750DM Finger Sensor Board ......................................................B-59
Realtek ALC892 ........................................................................... B-28 P770DM Charge LED Board ........................................................B-60
PCM1861 + TAS5766DCA ......................................................... B-29 P750DM BOT LED Board ...........................................................B-61
Subwoofer .................................................................................... B-30 P775DM Power LED Board .........................................................B-62
Audio Jack .................................................................................... B-31 Power On Sequence ......................................................................B-63
EC IT8587 .................................................................................... B-32 Updating the FLASH ROM BIOS......... C-1
Second EC IT8587 ....................................................................... B-33
Backlight Keyboard ...................................................................... B-34
LID SW, Fan, LED Conn ............................................................. B-35
TP, FP, Multi-Con ........................................................................ B-36
LAN E2400 .................................................................................. B-37
PS8338B + PS8330B ................................................................... B-38
TBT .............................................................................................. B-39
Preface

Power ............................................................................................ B-40


TPS65982 ..................................................................................... B-41
Cardreader RTS5250 .................................................................... B-42
TPM SLB9655TT & NPCT420 ................................................... B-43
VCCIO / 1P0A ............................................................................. B-44
DDR 1.2V/0.6VS/VCCPLL_OC ................................................. B-45
VDD3, VDD5 ............................................................................... B-46
12V, 5VS, 3.3VS, 3.3VA ............................................................. B-47
5VS_2 ........................................................................................... B-48
VCore / VCCGT ........................................................................... B-49
VCore Output Stage ..................................................................... B-50
VCCSA / VCCGT ........................................................................ B-51
Power Charger, DC-In .................................................................. B-52
P750DM HDD Board ................................................................... B-53
P750DM Power LED Board ........................................................ B-54
P750DM Click Board ................................................................... B-55
P750DM Audio Board ................................................................. B-56
P750DM Charge LED Board ....................................................... B-57

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Introduction

Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the P770DM / P771DM / P770DM-G / P771DM-G
series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the
User’s Manual. Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped
with the computer.

Operating systems (e.g. Windows 8.1, etc.) have their own manuals as do application software (e.g. word processing and
database programs). If you have questions about those programs, you should consult those manuals.

1.Introduction
The P770DM / P771DM / P770DM-G / P771DM-G series notebook is designed to be upgradeable. See Disassembly on
page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please note the warning and
safety information indicated by the “” symbol.

The balance of this chapter reviews the computer’s technical specifications and features.

Overview 1 - 1
Introduction

Specifications Processor Options Keyboard


Intel® Core™ i7 Processor Full Color Illuminated Full-size Winkey Keyboard (with
i7-6700K (4.00GHz)* numeric keypad and anti-ghost keys)
8MB L3 Cache, 14nm, DDR4-2133MHz, TDP 91W Audio
 Intel® Core™ i5 Processor High Definition Audio Compliant Interface
Latest Specification Information i5-6600K (3.50GHz)* S/PDIF Digital Output
6MB L3 Cache, 14nm, DDR4-2133MHz, TDP 91W Two Speakers
The specifications listed here are correct at the
i5-6500 (3.20GHz) Sound Blaster Audio
time of sending them to the press. Certain items
(particularly processor types/speeds) may be 6MB L3 Cache, 14nm, DDR4-2133MHz, TDP 65W ANSP™ 3D Sound Technology on Headphone Output
changed, delayed or updated due to the manu- i5-6400 (2.70GHz) Built-In Array Microphone
facturer's release schedule. Check with your 6MB L3 Cache, 14nm, DDR4-2133MHz, TDP 65W Sub-Woofer
service center for more details. *Support Intel® XTU over-clocking technology
External 7.1CH Audio Output Supported by Headphone,
LCD Options Microphone, Line-In and S/PDIF Out Jacks
1.Introduction

17.3" (43.94cm), 16:9, FHD (1920x1080)


Storage
Video Adapter Options Two changeable 2.5" (6cm) 7.0mm (h)/ 9.5mm (h) SATA
NVIDIA® GeForce GTX 980M PCIe Video Card (Serial) Hard Disk Drives/Solid State Drives (SSD) support-
 8GB GDDR5 Video RAM on board ing RAID level 0/1
CPU NVIDIA® GeForce GTX 970M PCIe Video Card (Factory Option) Two M.2 SATA 2280 SSDs supporting
6GB GDDR5 Video RAM RAID level 0/1
The CPU is not a user serviceable part. Ac-
cessing the CPU in any way may violate your NVIDIA® GeForce GTX 965M PCIe Video Card Or
warranty. (Factory Option) Two M.2 PCIe
4GB GDDR5 Video RAM
Gen3 x4 2280 SSDs supporting RAID level 0/1
Core Logic
Security
Intel® Z170 Chipset
Security (Kensington® Type) Lock Slot
BIOS
BIOS Password
AMI BIOS (64Mb SPI Flash-ROM)
(Factory Option) Fingerprint Reader Module
Memory Trusted Platform Module 2.0
Four 260 Pin SO-DIMM Sockets Supporting DDR4 2133MHz
Memory
(The real memory operating frequency depends on the FSB
of the processor.)
Memory Expandable from 4GB (minimum) up to 64GB
(maximum)
Pointing Device
Built-in Touchpad (scrolling key functionality integrated)

1 - 2 Overview
Introduction

Interface Environmental Spec


One USB 3.1 Port/Thunderbolt Port Temperature
Three USB 3.0 Ports Operating: 10°C - 35°C
One eSATA/Powered 3.0 USB Port Non-Operating: -20°C - 60°C
One HDMI-Out Port Relative Humidity
Two DisplayPorts (1.2) Operating: 20% - 80%
One S/PDIF Out Jack Non-Operating: 10% - 90%
One Headphone/Speaker-Out Jack Power
One Microphone-In Jack Removable 8-cell Smart Lithium-Ion Battery Pack, 82WH
One Line-In Jack
Full Range AC/DC Adapter
One RJ-45 LAN Jack
AC Input: 100 - 240V, 50 - 60Hz
One DC-In Jack
DC Output: 19.5V, 11.8A (230W)
M.2 Slots
(Factory Option) DC Output: 19.5V, 16.9A (330W)
Slot 1 for Combo WLAN and Bluetooth Module

1.Introduction
Dimensions & Weight
Slot 2 for SATA or PCIe Gen3 x4 SSD
418mm (w) * 282mm (d) * 16 - 38.9mm (h)
Slot 3 for SATA or PCIe Gen3 x4 SSD
3.9kg (Barebone System with Video Card and 82WH Battery)
Communication
Built-In Gigabit Ethernet LAN
2.0M FHD PC Camera Module
WLAN/ Bluetooth M.2 Modules:
(Factory Option) Intel® Wireless-N 7265 Wireless LAN
(802.11b/g/n) + Bluetooth 4.0
(Factory Option) Intel® Wireless-AC 3165 Wireless LAN
(802.11ac) + Bluetooth 4.0
(Factory Option) Intel® Wireless-AC 8260 Wireless LAN
(802.11ac) + Bluetooth 4.1
(Factory Option) Qualcomm® Atheros Killer™ Wireless-AC
1535 Wireless LAN (802.11ac) + Bluetooth 4.1
(Factory Option) Third-Party Wireless LAN 802.11b/g/n +
Bluetooth 4.0
Card Reader
Embedded Multi-In-1 Push-Push Card Reader
MMC (MultiMedia Card) / RS MMC
SD (Secure Digital) / Mini SD / SDHC/ SDXC (up to UHS-
II)

Overview 1 - 3
Introduction

Figure 1
External Locator - Top View with LCD Panel Open
Top View

1. PC Camera
2. PC Camera LED 3 2 1 3
3. Built-In
Microphone
4. LCD
5. Speakers
6. Power Button
7. LED Lock 4
Indicators
1.Introduction

8. Keyboard
9. TouchPad and
Buttons
10. Fingerprint
Reader (Optional)

5 5
7 6 7

10

1 - 4 External Locator - Top View with LCD Panel Open


Introduction

External Locator - Front & Right side Views Figure 2


Front Views
1. Light Bar
2. LED Power
Indicators

Front

1 2

1.Introduction
Figure 3
Right Side Views
1. USB 3.0 Port
2. S/PDIF-Out Jack
3. Headphone Jack
Right 4. Microphone Jack
6 5. Line-In Jack
1 6. Security Lock Slot
2 3 4 5

External Locator - Front & Right side Views 1 - 5


Introduction

External Locator - Left Side & Rear View


Figure 4
Left Side View
1. RJ-45 LAN Jack
2. USB 3.0 Ports
3. USB 3.1 Port
4. Multi-in-1 Card
Reader Left
5. Combined eSATA/
Powered USB 3.0 2 2 3 4 5
Port 1
1.Introduction

Figure 5
Rear View
1. Vent/Fan Intake
2. HDMI-Out Port Rear
3. Display Ports
4. DC-In Jack 1 3 3 1
2
4

1 - 6 External Locator - Left Side & Rear View


Introduction

External Locator - Bottom View Figure 6


Bottom View
1. Vent
2. Battery
3. Sub Woofer
4. HDD Bay

1 1 1 1

1.Introduction
1

3
2
4


Overheating

To prevent your com-


puter from overheating
make sure nothing
blocks the vent/fan in-
takes while the com-
puter is in use.

External Locator - Bottom View 1 - 7


Introduction

Figure 7 Mainboard Overview - Top (Key Parts)


Mainboard Top
Key Parts

1. Memory Slots
DDR3L SO-DIMM
2. Platform
Controller Hub
1.Introduction

2
1

1 - 8 Mainboard Overview - Top (Key Parts)


Introduction

Mainboard Overview - Bottom (Key Parts) Figure 8


Mainboard Bottom
Key Parts

1. KBC ITE IT8587


2. VGA-Card
2 Connector
3. CPU Socket (no
CPU installed)
4. Memory Slots
DDR3L SO-DIMM
3
(Primary)
5. Hard Disk

1.Introduction
1 Connector
1

4
5

Mainboard Overview - Bottom (Key Parts) 1 - 9


Introduction

Figure 9 Mainboard Overview - Top (Connectors)


Mainboard Top
Connectors

1. RJ-45 LAN Jack


2. USB 3.0 Port
3. USB 3.1 Port
4. Multi-in-1 Card
Reader
5. USB 3.0 Port / 10
e-SATA
6. KB LED 1
1.Introduction

Connector
7. WLAN Card 2
Connector 16
8. Button LED 3 15
Connector 11 14
9. TP FFC Cable 3
13
Connector 6
10. Panel Cable 11 2
9
Connector 9
11. Keyboard Cable 4 7
Connector 12
12. Battery
Connector 5 8
13. S/PDIF-Out Jack
14. Headphone Jack
15. Microphone Jack
16. Line-In Jack

1 - 10 Mainboard Overview - Top (Connectors)


Introduction

Mainboard Overview - Bottom (Connectors) Figure 10


Mainboard Bottom
Connectors

1. HDMI-Out Port
1 2 3 2 2. Display Port
3. DC-In Jack
4. VGA Fan Cable
Connector
5. 3G / SSD
Connector
6. CMOS Battery
7. SSD Connector

1.Introduction
8. CPU Fan Cable
Connector

4 8
5
6

Mainboard Overview - Bottom (Connectors) 1 - 11


Introduction
1.Introduction

1 - 12
Disassembly

Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the P770DM / P771DM / P770DM-G / P771DM-G
series notebook’s parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicat-
ed).

We suggest you completely review any procedure before you take the computer apart.

Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are

2.Disassembly
repeated here for your convenience.

To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a  
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.

A box with a  will also provide any possible helpful information. A box with a  contains warnings.

An example of these types of boxes are shown in the sidebar.



Warning

Overview 2 - 1
Disassembly

NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).

Maintenance Tools
The following tools are recommended when working on the notebook PC:

• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly

Connections
Connections within the computer are one of four types:

Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.

2 - 2 Overview
Disassembly

Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re- 
moval and/or replacement job, take the following precautions: Power Safety
Warning
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
Before you undertake
components could be damaged. any upgrade proce-
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. dures, make sure that
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag- you have turned off the
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor power, and discon-
the position of magnetized tools (i.e. screwdrivers). nected all peripherals
and cables (including
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly telephone lines and
damaged. power cord). You must
5. Be careful with power. Avoid accidental shocks, discharges or explosions. also remove your bat-

2.Disassembly
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. tery in order to prevent
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. accidentally turning the
6. Peripherals – Turn off and detach any peripherals. machine on.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.

Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.

Overview 2 - 3
Disassembly

Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.

To remove the Battery: To remove and install the Processor:


1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the system memory page 2 - 11
To remove the HDD: 3. Remove the processor page 2 - 15
1. Remove the battery page 2 - 5 4. Install the processor page 2 - 17
2. Remove the HDD page 2 - 6
3. Install the HDD page 2 - 8 To remove the WLAN Module:
2.Disassembly

1. Remove the battery page 2 - 5


To remove the M.2 SSD: 2. Remove the keyboard page 2 - 11
1. Remove the battery page 2 - 5 3. Remove the wireless LAN page 2 - 18
2. Remove the HDD page 2 - 6
3. Remove the M.2 SSD page 2 - 10 To remove and install the M.2 SATA:
1. Remove the battery page 2 - 5
To remove the Primary System Memory: 2. Remove the system memory page 2 - 11
1. Remove the battery page 2 - 5 3. Remove the M.2 SATA page 2 - 20
2. Remove the system memory page 2 - 11 4. Install the M.2 SATA page 2 - 21
To remove the System Memory under the To remove and install the Video Card:
Keyboard: 1. Remove the battery page 2 - 5
1. Remove the battery page 2 - 5 2. Remove the video card page 2 - 22
2. Remove the keyboard page 2 - 13 3. Install the video card page 2 - 23
3. Remove the system memory page 2 - 14

2 - 4 Disassembly Steps
Disassembly

Removing the Battery


1. Turn the computer off, and turn it over. Figure 1
2. Slide the latch 1 in the direction of the arrow (Figure 1a). Battery Removal
3. Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a).
4. Lift the battery in the direction of the arrow 3 . a. Slide the latch and hold in
5. Lift the battery 64 out of the compartment (Figure 1c). place.
b. Lift the battery up toward
the direction of the arrow.
c. Lift the battery out.
a. c.

1
2

2.Disassembly
b.
4


4. Battery

Removing the Battery 2 - 5


Disassembly

Figure 2 Removing and Installing the Hard Disk Drive


HDD Assembly
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 7mm/
Removal
9.5mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as out-
a. Locate the HDD bay
lined in Chapter 4 of the User’s Manual) when setting up a new hard disk.
cover and remove the
screws. Hard Disk Removal Process
b. Remove the hard disk
1. Turn off the computer, and remove the battery (page 2 - 5).
bay cover by sliding the
cover at point 3 . 2. Locate the hard disk bay cover and remove screws 1 - 2 (Figure 2a).
3. Remove the hard disk bay cover by sliding the cover at point 3 (Figure 2b).
a. b.
2.Disassembly

3
3

1 2


HDD System Warning
 New HDD’s are blank. Before you begin make sure:

You have backed up any data you want to keep from your old HDD.
• 2 Screws You have all the CD-ROMs and FDDs required to install your operating system and programs.

If you have access to the internet, download the latest application and hardware driver updates for
the operating system you plan to install. Copy these to a removable medium.

2 - 6 Removing and Installing the Hard Disk Drive


Disassembly

4. Lift the hard disk bay cover 64 off the computer (Figure 3c)
5. Slightly lift and pull the HDD-1 assembly in the direction of the arrow 5 to remove the hard disk assembly 6 (Fig- Figure 3
HDD Assembly
ure 3d).
Removal (cont’d.)
6. Slightly lift and pull the HDD-2 assembly (if available) in the direction of the arrow 7 to remove the hard disk
assembly 68 (Figure 3e).
c. Remove the HDD bay
7. Remove screws 9 - 12 and the adhesive cover 13 from the hard disk 14 (Figure 3f).
cover.
8. Reverse the process to install a new hard disk (do not forget to replace all the screws and covers). d. Lift and pull the HDD-1
assembly in the direction
e. of the arrow to remove
c. d.
the hard disk assembly.
e. Lift and pull the HDD-2
assembly in the direction
of the arrow to remove
5 the hard disk assembly.
7

2.Disassembly
f. Remove the screws and
4 the adhesive cover.

4
HDD-2
HDD-1

f. 9

12 10

13

4. HDD Bay Cover
11 6. HDD-1 Assembly
8. HDD-2 Assembly
13. Adhesive Cover
6 14. HDD
14 8
• 4 Screws

Removing and Installing the Hard Disk Drive 2 - 7


Disassembly

Figure 4 Hard Disk Installation Process


HDD Assembly 1. Turn off the computer, and remove the battery (page 2 - 5).
Installation 2. Insert the HDD-2 assembly 61 (if available) in the direction of the arrow 2 to install the it (Figure 3a).
3. After installing HDD-2 assembly, place the rubber foam insert 3 as shown (Figure 3b).
a. Insert the HDD-2 assem- 4. Insert the HDD-1 assembly 64 in the direction of the arrow 5 to install it (Figure 3c).
bly in the direction of the
5. Replace the hard disk bay cover and screws (see page 2 - 6).
arrow to install the hard
disk assembly.
b. Place the rubber foam in- a. b. c.
sert as shown
c. Insert the HDD-1 assem-
bly in the direction of the
arrow to install the hard
3
disk assembly.
2.Disassembly

1 HDD-2 HDD-1
4

 2
5
1. HDD-1 Assembly
4. HDD-2 Assembly

2 - 8 Removing and Installing the Hard Disk Drive


Disassembly

Hard Disk Size Note (Foam Rubber Insert)


Note that the hard disks pictured on the following pages are all 9.5mm(H) hard disk drives. In some cases 7mm(H) hard
disk drives will be installed.

Figure 5
Foam Rubber
Insert for 7mm(H)

2.Disassembly
HDDs

HDD-2 HDD-1

• If you are replacing a 9.5mm(H) HDD with a


7mm(H) HDD then insert the foam rubber
insert.

• If you are replacing a 7mm(H) HDD with a


9.5mm(H) HDD then remove the foam rub-
ber insert.

Removing and Installing the Hard Disk Drive 2 - 9


Disassembly

Figure 6
Removing the M.2 SSD Module
M.2 SSD Module Note that the SSD (if installed) is beside the HDD bay.
Removal 1. Turn off the computer, and turn it over, remove the battery (page 2 - 5).
2. Remove the screw 1 from the SSD (Figure 6a).
a. Remove the screws. 3. The M.2 SSD module 62 will pop-up (Figure 6b).
b. The module will pop up.
4. Lift the M.2 SSD module 62 up and off the computer (Figure 6c).
c. Lift the module out.
5. Reverse the process to install a new SSD (make sure that the hexagonal screw 3 is in the correct location
depending upon the size of the module).

a. b.
2.Disassembly

c.

1
2
 3
2. M.2 SSD Module

• 1 Screw 3

2 - 10 Removing the M.2 SSD Module


Disassembly

Removing the Primary System Memory (RAM) Figure 7


RAM Module
The computer has four memory sockets for 204 pin Small Outline Dual In-line (SO-DIMM) DDR 3L type memory modules. Removal
The total memory size is automatically detected by the POST routine once you turn on your computer.
a. Remove the screws.
Note that four SO-DIMMs are only supported by Quad-Core CPUs; Dual-Core CPUs support two SO-DIMMs maxi- Slide the bottom
cover until the cover
mum. and case indicators
are aligned.
Two primary memory sockets are located under component bay cover (the bottom case cover), and two secondary
memory sockets are located under the keyboard (not user upgradable). If you are installing only two RAM modules
then they should be installed in the primary memory sockets under the component bay cover.

Note that the RAM located under the keyboard is not user upgradable.

2.Disassembly
Memory Upgrade Process
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5).
2. Remove screws 1 - 4 .
3. Slide the bottom cover until the cover and case indicators 5 are aligned (Figure 7a).

a. 2
1 3 5 5

4 
• 4 Screws
• Note that the size of screw 4 is M2.5 x 8L.

Removing the Primary System Memory (RAM) 2 - 11


Disassembly

Figure 8 4. Lift the component bay cover 6 off the computer case. The modules will be visible at point 7 (Figure 8c).
RAM Module 5. Gently pull the two release latches ( 8 & 9 ) on the sides of the memory socket(s) in the direction indicated below
Removal (cont’d.) (Figure 8d).
6. The RAM module 10 will pop-up, and you can remove it (Figure 8e).
c. Lift the component bay 7. Pull the latches to release the second module if necessary.
cover off the computer 8. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
case. The modules will 9. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
be visible at point 7 . will go. DO NOT FORCE the module; it should fit without much pressure.
d. Gently pull the two re- 10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
lease latches on the
sides of the memory
11. Replace the bay cover and screws.
socket(s) in the direc- 12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
tion indicated below. e.
c.
e. The RAM module will
2.Disassembly

pop-up, and you can


remove it. 6

10

d.

9
 8 Contact Warning

Be careful not to touch the metal pins on the module’s connecting


6. Component Bay
8 9 edge. Even the cleanest hands have oils which can attract particles,
Cover
and degrade the module’s performance.
10. RAM Module

• 4 Screws

2 - 12 Removing the Primary System Memory (RAM)


Disassembly

Removing the System Memory (RAM) from Under the Keyboard Figure 9
Keyboard
The computer has four memory sockets for 204 pin Small Outline Dual In-line (SO-DIMM) DDR 3L type memory modules. Removal
The total memory size is automatically detected by the POST routine once you turn on your computer.
a. Remove the screws
and component bay
Two primary memory sockets are located under component bay cover (the bottom case cover), and two secondary
cover.
memory sockets are located under the keyboard. If you are installing only two RAM modules then they should be in- b. Remove the screws.
stalled in the primary memory sockets under the component bay cover. c. Eject the keyboard
using a special eject
Memory Upgrade Process stick to push the
keyboard out while
1. Turn off the computer, and turn it over, remove the battery (page 2 - 5).
releasing the key-
2. Remove screws 1 - 4 and the component bay cover 5 (Figure 9a). board as shown.
3. Remove screws 6 - 8 from the bottom of the computer (Figure 9b).

2.Disassembly
4. Open it up with the LCD on a flat surface before pressing at point 9 to release the keyboard module (use an eject
stick 10 to do this with a diameter no bigger than 2.5mm) while releasing the keyboard in the direction of the
arrow 11 as shown (Figure 9c).

a. c.
2
1 3

5 11

b.

9

6 5. Top Cover Module
10. Eject Stick
8 10
7
• 7 Screws

Removing the System Memory (RAM) from Under the Keyboard 2 - 13


Disassembly

Figure 10 5. Carefully lift the keyboard 12 up, being careful not to bend the keyboard ribbon cables 13 - 15 .
RAM Module 6. Disconnect the keyboard ribbon cables 13 - 15 from the locking collar socket 16 by using a small flat-head screw-
Removal driver to pry the locking collar pins 17 away from the base (Figure 10d).
7. Remove the keyboard and the memory sockets 18 & 19 will be visible.
d. Lift the keyboard up, 8. Gently pull the two release latches ( 20 & 21 ) on the sides of the memory socket(s) in the direction indicated below.
and disconnect the 9. The RAM module 22 will pop-up, and you can remove it.
keyboard ribbon cable 10. Pull the latches to release the second module if necessary.
from the locking collar 11. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
socket. 12. The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
e. Remove the keyboard
and the memory sock-
will go. DO NOT FORCE the module; it should fit without much pressure.
ets will be visible. 13. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
f. Pull the two release 14. Replace the bay cover and screws.
latches on the sides of 15. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
2.Disassembly

the memory socket(s)


d. f.
in the direction indicat- 14 13
ed. 12
16 22
17 16 17
15 17 16 17 20 21
22

20 21
22

e.
18

19

 Contact Warning

12. Keyboard Be careful not to touch the metal pins on the module’s
22. RAM Modules connecting edge. Even the cleanest hands have oils
which can attract particles, and degrade the module’s
performance.

2 - 14 Removing the System Memory (RAM) from Under the Keyboard


Disassembly

Removing and Installing the Processor Figure 11


Processor
Processor Removal Procedure Removal
1. Turn off the computer, remove the battery (page 2 - 5), and component bay cover (page 2 - 11). Procedure
2. Remove screws 1 - 8 from the heat sink unit in the order indicated on the label (i.e screw 8 first through to
screw 1 last Figure 11a). a. Remove the screws
3. Carefully (it may be hot) remove the heat sink unit 9 (Figure 11b). in the correct order.
b. Carefully remove
the heat sink unit.
a.

6 8 3 2
Note:

2.Disassembly
Loosen the screws in the reverse
order 8-7-6-5-4-3-2-1 as indicated.
1
5 7 4

b.


9. Heat Sink Unit

• 8 Screws

Removing and Installing the Processor 2 - 15


Disassembly

4. Press down and hold the latch 10 (with the latch held down you will be able to release it).
5. Move the latch 10 and bracket 11 fully in the direction indicated to unlock the CPU(Figure 12c).
Figure 12 6. Carefully (it may be hot) lift the CPU A up out of the socket (Figure 12d).
Processor Removal 7. See page 2 - 17 for information on inserting a new CPU.
(cont’d) 8. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
c. Move the latch and c.
bracket fully in the direc-
tion indicated to unlock
the CPU. 11
d. Lift the CPU out of the
socket.
2.Disassembly

10

10

Unlock
d.

A 
Caution

The heat sink, and CPU area in


general, contains parts which are
subject to high temperatures. Al-

 low the area time to cool before re-


moving these parts.
A. CPU

2 - 16 Removing and Installing the Processor


Disassembly

Processor Installation Procedure Figure 13


1. Insert the CPU A ; pay careful attention to the pin alignment (Figure 13a), it will fit only one way (DO NOT FORCE Processor
IT!). Installation
2. Move the bracket B and latch C fully in the direction indicated to lock the CPU.
3. Apply the thermal grease D to the top of the CPU as shown (Figure 13b). a. Insert the CPU.
4. Remove the sticker E (Figure 13c) from the heat sink unit (if it is a new unit). b. Move the latch and
bracket fully in the direc-
5. Insert the heat sink unit F as indicated in Figure 13c.
tion indicated to lock the
6. Tighten the CPU heat sink screws in the order 1 - 8 (the order as indicated on the label and Figure 13d). CPU. Apply thermal
7. Replace the CPU fan, component bay cover and tighten the screws (page 2 - 15). grease.
a. b. c. Remove the sticker from
the heat sink unit and in-
sert the heat sink.
B d. Tighten the screws.
A

2.Disassembly
D
C
C

Note:
Tighten the screws in the order 1-2-3-4-
5-6-7-8 as indicated.
c. d.

E
6 8 3 2
F 
A. CPU
F. Heat Sink
5 7 1 4
• 8 Screws

Removing and Installing the Processor 2 - 17


Disassembly

Figure 14 Removing the Wireless LAN Module


Wireless LAN 1. Turn off the computer, remove the battery (page 2 - 5) and the keyboard (page 2 - 13).
Module Removal 2. The Wireless LAN module will be visible at point 1 under the keyboard (Figure 14a).
3. Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket (Figure 14b).
a. The Wireless LAN mod- 4. The Wireless LAN module 5 will pop-up (Figure 14c).
ule will be visible at point
5. Lift the Wireless LAN module (Figure 14d) up and off the computer.
1 under the keyboard
b. Disconnect the cables c.
and remove the screw.
a.
c. The WLAN module will
pop up.
d. Lift the WLAN module
1
out.
5
2.Disassembly

b. d.
4

3 5

5. WLAN Module

2
• 1 Screw

2 - 18 Removing the Wireless LAN Module


Disassembly

Wireless LAN, Combo Module Cables


Note that the cables for connecting to the antennae on WLAN, WLAN & Bluetooth Combo, 3G and LTE modules are
not labelled. The cables/covers (each cable will have either a black or transparent cable cover) are color coded for iden-
tification as outlined in the table below.

Antenna Cable Cover


Module Type Cable Color
Type Type

WM 1 Black
WLAN/WLAN & Bluetooth
WM 2 Gray Transparent
Combo
WM 3 White

2.Disassembly
Cable 1 is usually connected to antenna 1 (Main) on the module, and cable 2 to antenna 2 (Aux).

Wireless LAN, Combo Module Cables 2 - 19


Disassembly

Figure 15 Removing the M.2 SATA Module


M.2 SATA Module
1. Turn off the computer, remove the battery (page 2 - 5), and component bay cover (page 2 - 11).
Removal
2. Locate the module; it is visible at point 1 (Figure 15a).
3. Carefully remove the screw 2 from the module (Figure 15b).
a. Locate the module.
b. Remove the screw. 4. The M.2 SATA module 63 will pop-up (Figure 15c).
c. The module will pop-up. 5. Lift the M.2 SATA module 63 up and off the computer (Figure 15d).
d. Lift the module up off the 6. Reverse the process to install a new SSD (make sure that the hexagonal screw 4 is in the correct location).
socket.

a. c.
2.Disassembly

b. d.

3
2

 4
3. MSATA Module

• 1 Screw

2 - 20 Removing the M.2 SATA Module


Disassembly

M.2 SATA Installation Procedure Figure 16


1. Place the thermal pad 1 on the computer as shown (Figure 16a). M.2 SATA Module
2. Insert the module 2 in the computer. Make sure that the hexagonal screw 3 is in the correct location (Figure Installation
16b).
3. Tighten the screw 4 to secure it in place (Figure 16c). a. Place the thermal pad.
b. Insert the module.
c. Tighten the screw.
a.

Thermal Pad

Make sure you place the thermal pad’s adhe-


1 sive side down onto the computer surface as
illustrated.

2.Disassembly
The usage of the thermal pad will depend
upon the thickness of the module being used.
• If you are using the thinner module, then
b. apply the whole thermal pad provided on
the computer.
3 • If you are using the thicker module, sepa-
rate the pad into its two parts. Use the
larger part and place the adhesive side
2 onto the computer (discard the smaller
part that you have separated).

c.

1. Thermal Pad
2. M.2 SATA Module
4
• 1 Screw

Removing the M.2 SATA Module 2 - 21


Disassembly

Figure 17 Removing and Installing the Video Card


Video Card
Video Card Removal Procedure
Removal Procedure
1. Turn off the computer, turn it over and remove the battery (page 2 - 5) and component cover (page 2 - 11).
a. Remove the screws in
2. Remove screws 1 - 8 from the heat sink unit in the order indicated on the label (i.e screw 8 first through to
the correct order. screw 1 last) (Figure 17a).
b. Carefully remove the 3. Carefully (it may be hot) remove the heat sink unit 9 (Figure 17b).
heat sink units. 4. Remove screws 10 & 11 from the video card. The video card 12 will pop up (Figure 17c).
c. Remove the video card 5. Remove the video card 12 (Figure 17d).
screws. The video card a. c.
will pop up.
d. Remove the video card.
6 8 3 2
12
2.Disassembly

5 7 1 4
 10 11
Caution 9

The heat sink, and video


card area in general,
contains parts which are
subject to high tempera- b. d.
tures. Allow the area
time to cool before re- 
moving these parts. 9 Heat Sink Screw Removal
12 and Insertion
15
Remove the screws from the heat
sink in the order indicated here: 8-
 7-6-5-4-3-2-1.
9. Heat Sink Units
When tightening the screws,
12. Video Card make sure that they are tightened
in the order: 1-2-3-4-5-6-7-8.
• 10 Screws

2 - 22 Removing and Installing the Video Card


Disassembly

Installing a New Video Card Figure 18


1. Prepare to fit the video card 12 into the slot by holding it at about a 30° angle (Figure 18e). Installing a New
2. The card needs to be fully into the slot, and the video card and socket have a guide-key and pin which align to Video Card
allow the card to fit securely (Figure 18f).
3. Fit the connectors firmly into the socket, straight and evenly. e. Insert the video card at
a 30 degree angle.
f. Fit the connectors
e. f.
straight and even, and
secure the card with the
screws.

10

2.Disassembly
12


11 Caution

The heat sink, and video


card area in general,
contains parts which are
subject to high tempera-
4. DO NOT attempt to push one end of the card in ahead of the other. tures. Allow the area
5. The card’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket time to cool before re-
moving these parts.
as it will go. DO NOT FORCE the card; it should fit without much pressure.
6. Secure the card with screws 10 & 11 (Figure 17 on page 2 - 22).
7. Place the heat sink back on the card, and secure the screws in the order indicated in Figure 17 on page 2 - 22.
8. Reinsert the component bay cover, and secure with the screws as indicated in Figure 9 on page 2 - 13.


12. Video Card

• 2 Screws

Removing and Installing the Video Card 2 - 23


Disassembly
2.Disassembly

2 - 24
Part Lists

Appendix A: Part Lists


This appendix breaks down the P770DM / P771DM / P770DM-G / P771DM-G series notebook’s construction into a
series of illustrations. The component part numbers are indicated in the tables opposite the drawings.

Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.

Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.

Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the

A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.

A - 1
Part Lists

Part List Illustration Location


The following table indicates where to find the appropriate part list illustration.

Table A- 1
Part List Illustration
Location
Parts

Top page A - 3

Bottom page A - 4

LCD page A - 5
A.Part Lists

MB page A - 6

HDD page A - 7

A - 2 Part List Illustration Location


Part Lists

Top

Figure A - 1
Top

A.Part Lists
Top A - 3
Part Lists

Bottom

Figure A - 2
A.Part Lists

Bottom

柕⍂

A - 4 Bottom
Part Lists

LCD

Figure A - 3
LCD

A.Part Lists
柕⍂

LCD A - 5
Part Lists

MB

Figure A - 4
A.Part Lists

MB 柕⍂

A - 6 MB
Part Lists

HDD

Figure A - 5
HDD

A.Part Lists
HDD A - 7
Part Lists
A.Part Lists

A-8
Schematic Diagrams

Appendix B: Schematic Diagrams


This appendix has circuit diagrams of the P770DM / P771DM / P770DM-G / P771DM-G notebook’s PCB’s. The fol-
lowing table indicates where to find the appropriate schematic diagram.

Diagram - Page Diagram - Page Diagram - Page


Table B - 1
Block Diagram - Page B - 2 Lynix Point 7/7 - Page B - 23 VCCIO / 1P0A - Page B - 44
Schematic
Processor 1/5 - Page B - 3 USB + eSATA, USB Charging - Page B - 24 DDR 1.2V/0.6VS/VCCPLL_OC - Page B - 45
Diagrams
Processor 2/5 - Page B - 4 CCD, USB Port3 - Page B - 25 VDD3, VDD5 - Page B - 46

B.Schematic Diagrams
Processor 3/5 - Page B - 5 M.2 3G+USB & WLAN+BT - Page B - 26 12V, 5VS, 3.3VS, 3.3VA - Page B - 47

Processor 4/5 - Page B - 6 M.2 PCIE4X SSD1 & SSD2 - Page B - 27 5VS_2 - Page B - 48

Processor 5/5 - Page B - 7 Realtek ALC892 - Page B - 28 VCore / VCCGT - Page B - 49

DDR4 CHA SO-DIMM_0 - Page B - 8 PCM1861 + TAS5766DCA - Page B - 29 VCore Output Stage - Page B - 50

DDR4 CHA SO-DIMM_1 - Page B - 9 Subwoofer - Page B - 30 VCCSA / VCCGT - Page B - 51

DDR4 CHB SO-DIMM_0 - Page B - 10 Audio Jack - Page B - 31 Power Charger, DC-In - Page B - 52

DDR4 CHB SO-DIMM_1 - Page B - 11 EC IT8587 - Page B - 32 P750DM HDD Board - Page B - 53

Panel, Inverter, CRT - Page B - 12 Second EC IT8587 - Page B - 33 P750DM Power LED Board - Page B - 54

Version Note
Display Port A - Page B - 13 Backlight Keyboard - Page B - 34 P750DM Click Board - Page B - 55

Display Port B - Page B - 14 LID SW, Fan, LED Conn - Page B - 35 P750DM Audio Board - Page B - 56
The schematic dia-
grams in this chapter
HDMI - Page B - 15 TP, FP, Multi-Con - Page B - 36 P750DM Charge LED Board - Page B - 57 are based upon version
6-7P-P75DB-001. If
MXM PCI-E - Page B - 16 LAN E2400 - Page B - 37 P750DM LID Switch Board - Page B - 58
your mainboard (or oth-
Lynix Point 1/7 - Page B - 17 PS8338B + PS8330B - Page B - 38 P750DM Finger Sensor Board - Page B - 59 er boards) are a later
version, please check
Lynix Point 2/7 - Page B - 18 TBT - Page B - 39 P770DM Charge LED Board - Page B - 60
with the Service Center
Lynix Point 3/7 - Page B - 19 Power - Page B - 40 P750DM BOT LED Board - Page B - 61 for updated diagrams
(if required).
Lynix Point 4/7 - Page B - 20 TPS65982 - Page B - 41 P775DM Power LED Board - Page B - 62

Lynix Point 5/7 - Page B - 21 Cardreader RTS5250 - Page B - 42 Power On Sequence - Page B - 63

Lynix Point 6/7 - Page B - 22 TPM SLB9655TT & NPCT420 - Page B - 43

B - 1
Schematic Diagrams

Block Diagram
5 4 3 2 1

P770DM AUDIO BOARD


P7XXDM SKYLAKE System Block Diagram PHONE JACK x3, USB3.0 x1 SHEET 55

P750DM HDD BOARD


Display PortA SHEET 52
PS8330B
SHEET 12
+
PS8338B SKYLAKE-S CPU 1866/2133 MHz DDR IV P750DM POWER LED BOARD
<=4.5" SO-DIMM*4 SHEET 53
SHEET 37 37.5x37.5mm DDR4 / 1.2V SHEET 7,8,9,10
D
PCIE*16 D

35W~95W P750DM BOT LED BOARD


<=4.3" SHEET 60
MXM3.0 Socket LGA1151 Socket
SHEET 15 P750DM CLICK BOARD
TPS65982 Alpine Ridge SHEET 54
SHEET 40 (SP) Display PortB PAGE 2,3,4,5,6
SHEET 13 SYSTEM SMBUS P750DM CHARGER LED BOARDSHEET 56
B.Schematic Diagrams

SHEET 38,39 P770DM CHARGER LED BOARDSHEET 59


HDMI DMI*4
USB3.1 & DPA 7.1 channel P750DM LID SWITCH BOARD
25 MHz SHEET 14
TYPE C <=8" SHEET 57
SHEET 40 eDP 3Kx2K
Sheet 1 of 62 SHEET 11
USB3.0 SPDIF MIC HP LINE
P750DM FINGER SENSOR BOARD
SHEET 58

Block Diagram LVDS


SHEET 11
PORT OUT IN OUT IN/OUT

C
SKL_PCH_H 3D
C

P750ZM AUDIO BOARD


CLICK BOARD P750ZM
POWER LED BOARD PCIe5~PCIe8
Skylake PCH surround
SHEET 30
<=7" PCH-H(Z170)
TOUCH PAD SHEET 52
SPI(Option)
TPM1.2&2.0 INT SPKER
SHEET 16 TI
(Option) PCM1861+TAS5766DCA Front L
(RESERVE) Azalia Codec SHEET 28 Front R
SHEET 41 INT MIC
EC REALTEK
SHEET 24
ITE 8587A 23 x 23 ALC892
SUBWOOFER
(512KB ROM) 24 MHz LPC
SHEET 35 FCBGA 837 SHEET 27
AMP
APA2607QBI
32.768 KHz SHEET 31 SHEET 29
SHEET 29
EC SMBUS BIOS PAGE 16,17,18,19
SPI AZALIA LINK 24 MHz ONLY FOR P77XDM
20,21,22
THERMAL SMART SMART SHEET 16
B B
SENSOR FANx2 BATTERY
AC-IN PCIE 100 MHz
RT1
SHEET 2 SHEET 35 SHEET 51 Second EC
<9.5" <12"
ITE 8587A 32.768KHz
<9.5" <9.5"
INT. Backlight K/B NGFF PCIE
SHEET 32 SOCKET
SHEET 32
USB 3.0 USB 2.0 WLAN+BT NGFF PCIE NGFF PCIE Qualcomm Realtek
5 Gbps 480 Mbps SOCKET SOCKET
SATA I/II/III 6.0Gb/s (USB11) E2400 RTS5250
SSD1 PCIE4X SSD2 PCIE4X
SHEET 25
3"~10" SHEET 26 SHEET 26 LAN CARD READER
A KEY 25
1"~14" M KEY M KEY SHEET 36 SHEET 41
MHz

SATA HDD SATA HDD NGFF USB3.0 USB3.0 USB3.0 USB3.0 USB3.0
SOCKET PORT5 PORT4 PORT1 CCD PORT6 (USB6)
SATA3 SATA3 RJ-45 3IN1
3G/LTE (USB5) (USB4) (USB1) (USB10) SOCKET
SHEET 17 SIM CARD
(USB3) SHEET 23 SHEET 23 SHEET 24 SHEET 24 Audio BOARD SHEET 36 SHEET 41
USB3.0
SHEET 51 SHEET 25 (Charging) SHEET 54
A PORT6 (USB6) A
B KEY FINGER PRINTER (USB2)
P750ZM ONLY FOR P77XDM USE
 :USB3.0
ON CLICK BOARD SHEET 30
HDD BOARD
PORT2 FingerPrint    !!DMFWP!DP/
Title
[01] BLOCK DIAGRAM
SHEET 58 12 MHz Size Document Number Rev
A3 SCHEMATIC1 6-71-P75D0-D03 2.0
(Optional)
Date: Monday, August 03, 2015 Sheet 1 of 62
5 4 3 2 1

B - 2 Block Diagram
Schematic Diagrams

Processor 1/5
5 4 3 2 1

SKYLAKE-S Processor 1/5 ( DMI,FDI,PEG ,RSVD) 3.3V

 MXM SIDE U39C SKL_S_CPU ?


 MXM SIDE PLACE NEAR CPU

2
LGA1151
RT1
15 PEG_RX0 C589 0.22u_10V_X5R_04 PEG_RX_0 B8 A5 PEG_TX_0 C538 0.22u_10V_X5R_04
PEG_TX0 15 TH05-3H103FR
P/N 6-17-10320-731
C588 0.22u_10V_X5R_04 PEG_RX#_0 B7 PEG_RXP[0] PEG_TXP[0] A6 PEG_TX#_0 C537 0.22u_10V_X5R_04
15 PEG_RX#0 PEG_TX#0 15

1
PEG_RXN[0] PEG_TXN[0]
THERM_VOLT 31
15 PEG_RX1 C587 0.22u_10V_X5R_04 PEG_RX_1 C7 B4 PEG_TX_1 C536 0.22u_10V_X5R_04
PEG_RXP[1] PEG_TXP[1] PEG_TX1 15
D 15 PEG_RX#1 C586 0.22u_10V_X5R_04 PEG_RX#_1 C6 B5 PEG_TX#_1 C535 0.22u_10V_X5R_04 D
PEG_RXN[1] PEG_TXN[1] PEG_TX#1 15
R588
15 PEG_RX2 C585 0.22u_10V_X5R_04 PEG_RX_2 D6 C3 PEG_TX_2 C534 0.22u_10V_X5R_04 10K_1%_04
PEG_RXP[2] PEG_TXP[2] PEG_TX2 15
C584 0.22u_10V_X5R_04 PEG_RX#_2 D5 C4 PEG_TX#_2 C533 0.22u_10V_X5R_04
15 PEG_RX#2 PEG_RXN[2] PEG_TXN[2] PEG_TX#2 15

15 PEG_RX3 C583 0.22u_10V_X5R_04 PEG_RX_3 E5 D2 PEG_TX_3 C532 0.22u_10V_X5R_04


PEG_RXP[3] PEG_TXP[3] PEG_TX3 15
15 PEG_RX#3 C582 0.22u_10V_X5R_04 PEG_RX#_3 E4 D3 PEG_TX#_3 C531 0.22u_10V_X5R_04
PEG_RXN[3] PEG_TXN[3] PEG_TX#3 15
C581 0.22u_10V_X5R_04 PEG_RX_4 F6 E1 PEG_TX_4 C530 0.22u_10V_X5R_04 CAD Note: Capacitor need to be placed
15 PEG_RX4 PEG_RXP[4] PEG_TXP[4] PEG_TX4 15
15 PEG_RX#4 C580 0.22u_10V_X5R_04 PEG_RX#_4 F5 E2 PEG_TX#_4 C529 0.22u_10V_X5R_04 close to buffer output pin
PEG_RXN[4] PEG_TXN[4] PEG_TX#4 15

15 PEG_RX5 C579 0.22u_10V_X5R_04 PEG_RX_5 G5 F2 PEG_TX_5 C528 0.22u_10V_X5R_04


PEG_RXP[5] PEG_TXP[5] PEG_TX5 15
15 PEG_RX#5 C578 0.22u_10V_X5R_04 PEG_RX#_5 G4 F3 PEG_TX#_5 C527 0.22u_10V_X5R_04
PEG_RXN[5] PEG_TXN[5] PEG_TX#5 15

15 PEG_RX6 C577 0.22u_10V_X5R_04 PEG_RX_6 H6 G1 PEG_TX_6 C515 0.22u_10V_X5R_04


PEG_RXP[6] PEG_TXP[6] PEG_TX6 15
15 PEG_RX#6 C576 0.22u_10V_X5R_04 PEG_RX#_6 H5 G2 PEG_TX#_6 C514 0.22u_10V_X5R_04
PEG_RXN[6] PEG_TXN[6] PEG_TX#6 15

B.Schematic Diagrams
15 PEG_RX7 C575 0.22u_10V_X5R_04 PEG_RX_7 J5 H2 PEG_TX_7 C526 0.22u_10V_X5R_04
PEG_RXP[7] PEG_TXP[7] PEG_TX7 15
C574 0.22u_10V_X5R_04 PEG_RX#_7 J4 H3 PEG_TX#_7 C525 0.22u_10V_X5R_04
15 PEG_RX#7 PEG_RXN[7] PEG_TXN[7] PEG_TX#7 15

15 PEG_RX8 C573 0.22u_10V_X5R_04 PEG_RX_8 K6 J1 PEG_TX_8 C513 0.22u_10V_X5R_04


PEG_RXP[8] PEG_TXP[8] PEG_TX8 15
15 PEG_RX#8 C572 0.22u_10V_X5R_04 PEG_RX#_8 K5 J2 PEG_TX#_8 C512 0.22u_10V_X5R_04
PEG_RXN[8] PEG_TXN[8] PEG_TX#8 15

15 PEG_RX9 C571 0.22u_10V_X5R_04 PEG_RX_9 L5 K2 PEG_TX_9 C524 0.22u_10V_X5R_04


PEG_RXP[9] PEG_TXP[9] PEG_TX9 15
C570 0.22u_10V_X5R_04 PEG_RX#_9 L4 K3 PEG_TX#_9 C523 0.22u_10V_X5R_04
15

15
15
PEG_RX#9

PEG_RX10
PEG_RX#10
C569
C568
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_RX_10
PEG_RX#_10
M6
M5
PEG_RXN[9]

PEG_RXP[10]
PEG_TXN[9]

PEG_TXP[10]
L1
L2
PEG_TX_10
PEG_TX#_10
C511
C510
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_TX#9

PEG_TX10
PEG_TX#10
15

15
15
Sheet 2 of 62
PEG_RXN[10] PEG_TXN[10]
C
15
15
PEG_RX11
PEG_RX#11
C567
C566
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_RX_11
PEG_RX#_11
N5
N4 PEG_RXP[11]
PEG_RXN[11]
PEG_TXP[11]
PEG_TXN[11]
M2
M3
PEG_TX_11
PEG_TX#_11
C522
C521
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_TX11
PEG_TX#11
15
15
C
Processor 1/5
15 PEG_RX12 C565 0.22u_10V_X5R_04 PEG_RX_12 P6 N1 PEG_TX_12 C509 0.22u_10V_X5R_04
PEG_RXP[12] PEG_TXP[12] PEG_TX12 15
15 PEG_RX#12 C564 0.22u_10V_X5R_04 PEG_RX#_12 P5 N2 PEG_TX#_12 C508 0.22u_10V_X5R_04
PEG_RXN[12] PEG_TXN[12] PEG_TX#12 15

15 PEG_RX13 C563 0.22u_10V_X5R_04 PEG_RX_13 R5 P2 PEG_TX_13 C520 0.22u_10V_X5R_04


PEG_RXP[13] PEG_TXP[13] PEG_TX13 15
15 PEG_RX#13 C562 0.22u_10V_X5R_04 PEG_RX#_13 R4 P3 PEG_TX#_13 C519 0.22u_10V_X5R_04
PEG_RXN[13] PEG_TXN[13] PEG_TX#13 15

15 PEG_RX14 C561 0.22u_10V_X5R_04 PEG_RX_14 T6 R2 PEG_TX_14 C507 0.22u_10V_X5R_04


PEG_RXP[14] PEG_TXP[14] PEG_TX14 15
15 PEG_RX#14 C560 0.22u_10V_X5R_04 PEG_RX#_14 T5 R1 PEG_TX#_14 C506 0.22u_10V_X5R_04
PEG_RXN[14] PEG_TXN[14] PEG_TX#14 15

15 PEG_RX15 C559 0.22u_10V_X5R_04 PEG_RX_15 U5 T2 PEG_TX_15 C518 0.22u_10V_X5R_04


PEG_RXP[15] PEG_TXP[15] PEG_TX15 15
15 PEG_RX#15 C558 0.22u_10V_X5R_04 PEG_RX#_15 U4 T3 PEG_TX#_15 C517 0.22u_10V_X5R_04
PEG_RXN[15] PEG_TXN[15] PEG_TX#15 15

12 mil
VCCIO R62 24.9_1%_04 PEG_RCOMP L7
PEG_RCOMP

Y3 AC2
20 DMI_RXP0 DMI_RXP[0] DMI_TXP[0] DMI_TXP0 20
Y4 AC1
20 DMI_RXN0 DMI_RXN[0] DMI_TXN[0] DMI_TXN0 20
AA4 AD3
20 DMI_RXP1 DMI_RXP[1] DMI_TXP[1] DMI_TXP1 20
AA5 AD2
20 DMI_RXN1 DMI_RXN[1] DMI_TXN[1] DMI_TXN1 20
AB4 AE2
20 DMI_RXP2 DMI_RXP[2] DMI_TXP[2] DMI_TXP2 20
AB3 AE1
B 20 DMI_RXN2 DMI_RXN[2] DMI_TXN[2] DMI_TXN2 20 B
AC4 AF2
20 DMI_RXP3 DMI_RXP[3] DMI_TXP[3] DMI_TXP3 20
AC5 AF3
20 DMI_RXN3 DMI_RXN[3] DMI_TXN[3] DMI_TXN3 20
SKL_S_CPU_LGA
REV = 1.2 3 OF 12

SKL_S_CPU ?
U39J ?
LGA1151
D02 ,VIA J8 H11 D02 ,VIA
5/8 J7 RSVD_TP RSVD_TP H12 5/8
L8 RSVD_TP RSVD_TP
K8 RSVD_TP AW38
RSVD_TP RSVD_TP AV39
AV1 RSVD_TP
AW2 RSVD_TP AU39
RSVD_TP RSVD AU40
R591 *0_04 H8 RSVD
VSS AT15
K10 VSS
L10 RSVD AR23 R78 *0_04
RSVD VSS AR22 R79 *0_04
J17 VSS
B39 RSVD
J19 RSVD J15
C40 RSVD RSVD J14
RSVD RSVD
A
G8 AU9 A
AY3 VSS RSVD AU10
VSS RSVD
22 PCH_2_CPU_TRIGGER PCH_2_CPU_TRIGGER D1
R40 20_1%_04 CPU_2_PCH_TRIGGER_R B3 PROC_TRIGIN J13
22 CPU_2_PCH_TRIGGER PROC_TRIGOUT RSVD
   !!DMFWP!DP/
K13 TP_CPU_K13 R593 *560_04
L12 RSVD J11
K12 RSVD RSVD
RSVD D15 Title
RSVD
RSVD
K11 [02] Processor 1/5-DMI,PEG,RSVD
10 OF 12 3,43,5 VCCIO Size Document Number Rev
SKL_S_CPU_LGA REV = 1.2 ? 11,17,24,25,30,39,42,43,44,46,47 3.3V A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 2 of 62


5 4 3 2 1

Processor 1/5 B - 3
Schematic Diagrams

Processor 2/5
5 4 3 2 1

SKYLAKE-S Processor 2/7 (JTAG,CLK,CFG ,DISPLAY)


SKL_S_CPU ?
U39E
LGA1151
19 PCH_CPU_BCLK_DP W5 H15 CFG0 R68 *1K_04
W4 BCLKP CFG[0] F15
19 PCH_CPU_BCLK_DN BCLKN CFG[1] F16 CFG2 R67 *1K_04
W1 CFG[2] H16
19 PCH_CPU_PCIBCLK_DP PCI_BCLKP CFG[3]
D 19 PCH_CPU_PCIBCLK_DN W2 F19 CFG4 R60 *1K_04 D
PCI_BCLKN CFG[4] H18 CFG5 R64 *1K_04
VCCST_VCCPLL K9 CFG[5] G21 CFG6 R59 *1K_04
19 PCH_CPU_NSSC_CLK_DP CLK24P CFG[6]
D02 1%_04 19 PCH_CPU_NSSC_CLK_DN
J9 H20 CFG7 R63 *1K_04
5/5 CLK24N CFG[7] G16
CFG[8] E16 CFG9 R545 *1K_04
CPU_24MHZ CFG[9]
R546 100_1%_04 H_VIDSOUT F17
R41 75_1%_04 H_PROCHOT_N CFG[10] H17 D02 CF9 PU HI
R590 1K_1%_04 H_THRMTRIP# CFG[11] G20 5/5
R548 56.2_1%_04 H_VIDALERT_N CFG[12] F20
CFG[13] F21
R549 0_04 R547 220_04 CPU_VIDALERT_N E39 CFG[14] H19
48 H_VIDALERT_N_VR VIDALERT# CFG[15]
48 H_VIDSCK_VR R557 0_04 H_VIDSCK E38 D02 ,VIA VCCST_VCCPLL
R556 0_04 H_VIDSOUT E40 VIDSCK F14 5/8
48 H_VIDSOUT_VR VIDSOUT CFG[17]
48,51 H_PROCHOT_N H_PROCHOT_N R42 100_04 H_PROCHOT_R_N C39 E14 PCH_JTAGX R561 *1K_04
PROCHOT# CFG[16] F18 H_PREQ_N R562 *51_04
B.Schematic Diagrams

DDR_VTT_CNTL AC36 CFG[19] G18 H_TDO R563 51_04


44 DDR_VTT_CNTL DDR_VTT_CNTL CFG[18]
R77 *0_04 AC38
D02
AC37 ZVM# D16
5/5 RSVD_AC37 BPM#[0] D17 D02

BPM#[1] G14 5/5
R587 3/16 6.04K_1%_04 VCCST_PWRGD_CPU U2 BPM#[2] H14 H_TCK R555 51_04
17,21 VCCST_PWRGD VCCST_PWRGD BPM#[3]
R589 2.74K_1%_04
18 H_PWRGD
F8 H_TCK TERMINATION PLACE NEAR CPU WITHIN 1.1 INCH H_TRST_N R569 *51_04
E7 PROCPWRGD H13 H_TDO R565 *0_04
17 PLTRST_CPU_N PCH_JTAG_TDO 18

Sheet 3 of 62 17
17

17,31
H_PM_SYNC
H_PM_DOWN
H_PECI
H_THRMTRIP#
R564
R65
R61
20_1%_04
0_04
0_04
H_PM_DOWN_R
PECI
H_THERMTRIP_N
E8
D8
G7
D11
RESET#
PM_SYNC
PM_DOWN
PECI
PROC_TDO
PROC_TDI
PROC_TMS
PROC_TCK
G12
F13
F11
H_TDI
H_TMS
H_TCK
R579
R570
R553
*0_04
*0_04
*0_04 PCH_JTAGX
PCH_JTAG_TDI
PCH_JTAG_TMS
PCH_JTAGX 18
18
18

17 H_THRMTRIP#

Processor 2/5 C THERMTRIP# F12 H_TRST_N R568 *0_04 C


PROC_TRST# H_TRST_N_R 22
19 H_SKTOCC_N H_SKTOCC_N AB35 B9 H_PREQ_N R552 *0_04 PCH_XDP_PREQ_R_N 22
AB36 SKTOCC# PROC_PREQ# B10 H_PRDY_N R554 *0_04
PROC_SELECT# PROC_PRDY# PCH_XDP_PRDY_R_N 22
R150 10K_04 D13
3.3VA CATERR# M11 CFG_RCOMP R592 49.9_1%_04
CFG_RCOMP
D02 ,VIA SKL_S_CPU_LGA PLACE INSIDE CPU CAVITY
5/8
REV = 1.2 5 OF 12 ?

SKL_S_CPU
U39D ?
LGA1151
C21 E10
D21 DDI1_TXP[0] EDP_TXP[0] D10
D22 DDI1_TXN[0] EDP_TXN[0] D9
E22 DDI1_TXP[1] EDP_TXP[1] C9
B23 DDI1_TXN[1] EDP_TXN[1] H10
A23 DDI1_TXP[2] EDP_TXN[2] G10
C23 DDI1_TXN[2] EDP_TXP[2] G9
D23 DDI1_TXP[3] EDP_TXN[3] F9
DDI1_TXN[3] EDP_TXP[3]
B13 D12
C13 DDI1_AUXP EDP_AUXP E12
DDI1_AUXN EDP_AUXN
B18
A18 DDI2_TXP[0] VCCIO
B H_PROCHOT_N D18 DDI2_TXN[0] D14 B
E18 DDI2_TXP[1] EDP_DISP_UTIL
Q8 C19 DDI2_TXN[1]
D

MTN7002ZHS3 D19 DDI2_TXP[2] M9 DP_RCOMP R66 24.9_1%_04


C51 D20 DDI2_TXN[2] EDP_RCOMP
G E20 DDI2_TXP[3]
31 H_PROCHOT_EC DDI2_TXN[3]
47p_50V_NPO_04
S

A12
R43 B12 DDI2_AUXP
DDI2_AUXN
100K_04 B14
A14 DDI3_TXP[0]
C15 DDI3_TXN[0]
B15 DDI3_TXP[1]
CAD Note: Capacitor need to be placed B16 DDI3_TXN[1]
close to buffer output pin A16 DDI3_TXP[2]
C17 DDI3_TXN[2]
B17 DDI3_TXP[3]
DDI3_TXN[3] V3
PROC_AUDIO_CLK AUD_AZACPU_SCLK_R 18
B11 V2
DDI3_AUXP PROC_AUDIO_SDI AUD_AZACPU_SDO_R 18
C11 U1 AUD_AZACPU_SDI_R R582 20_1%_04
DDI3_AUXN SKL_S_CPU_LGA PROC_AUDIO_SDO AUD_AZACPU_SDI 18
4 OF 12
REV = 1.2 ?

A A

   !!DMFWP!DP/
Title
2,43,5 VCCIO
[03] Processor 2/5-CLK,MISC,DIS
18,46,48,5 VCCST_VCCPLL
16,17,18,20,21,46 3.3VA Size Document Number Rev
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 3 of 62


5 4 3 2 1

B - 4 Processor 2/5
Schematic Diagrams

Processor 3/5
5 4 3 2 1

SKYLAKE-S Processor 3/5 ( DDR4 )


M_A_DQ[63:0] 7,8 M_B_DQ[63:0] 10,9

SKL_S_CPU? SKL_S_CPU ?
U39A U39B
D LGA1151 LGA1151 D
M_A_DQ0 AE38 AW18 M_A_CK0 7 M_B_DQ0 AD34 AM20 M_B_CK0 9
M_A_DQ1 AE37 DDR0_DQ[0] DDR0_CKP[0] AV18 M_B_DQ1 AD35 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] AM21
DDR0_DQ[1] DDR0_CKN[0] M_A_CK#0 7 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] M_B_CK#0 9
M_A_DQ2 AG38 AW17 M_B_DQ2 AG35 AP22
DDR0_DQ[2] DDR0_CKP[1] M_A_CK1 7 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[1] M_B_CK1 9
M_A_DQ3 AG37 AY17 M_A_CK#1 7 M_B_DQ3 AH35 AP21 M_B_CK#1 9
M_A_DQ4 AE39 DDR0_DQ[3] DDR0_CKN[1] AW16 M_B_DQ4 AE35 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKN[1] AN20
DDR0_DQ[4] DDR0_CKP[2] M_A_CK2 8 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CKP[2] M_B_CK2 10
M_A_DQ5 AE40 AV16 M_A_CK#2 8 M_B_DQ5 AE34 AN21 M_B_CK#2 10
M_A_DQ6 AG39 DDR0_DQ[5] DDR0_CKN[2] AT16 M_B_DQ6 AG34 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKN[2] AP19
DDR0_DQ[6] DDR0_CKP[3] M_A_CK3 8 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKP[3] M_B_CK3 10
M_A_DQ7 AG40 AU16 M_B_DQ7 AH34 AP20
DDR0_DQ[7] DDR0_CKN[3] M_A_CK#3 8 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKN[3] M_B_CK#3 10
M_A_DQ8 AJ38 M_B_DQ8 AK35
M_A_DQ9 AJ37 DDR0_DQ[8] AY24 M_B_DQ9 AL35 DDR1_DQ[8]/DDR0_DQ[24] AY29
DDR0_DQ[9] DDR0_CKE[0] M_A_CKE0 7 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] M_B_CKE0 9
M_A_DQ10 AL38 AW24 M_A_CKE1 7 M_B_DQ10 AK32 AV29 M_B_CKE1 9
M_A_DQ11 AL37 DDR0_DQ[10] DDR0_CKE[1] AV24 M_B_DQ11 AL32 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] AW29
DDR0_DQ[11] DDR0_CKE[2] M_A_CKE2 8 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2] M_B_CKE2 10
M_A_DQ12 AJ40 AV25 M_B_DQ12 AK34 AU29
DDR0_DQ[12] DDR0_CKE[3] M_A_CKE3 8 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3] M_B_CKE3 10
M_A_DQ13 AJ39 M_B_DQ13 AL34

B.Schematic Diagrams
M_A_DQ14 AL39 DDR0_DQ[13] AW12 M_B_DQ14 AK31 DDR1_DQ[13]/DDR0_DQ[29] AP17
DDR0_DQ[14] DDR0_CS#[0] M_A_CS0# 7 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] M_B_CS0# 9
M_A_DQ15 AL40 AU11 M_A_CS1# 7 M_B_DQ15 AL31 AN15 M_B_CS1# 9
M_A_DQ16 AN38 DDR0_DQ[15] DDR0_CS#[1] AV13 M_B_DQ16 AP35 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] AN17
DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] M_A_CS2# 8 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] M_B_CS2# 10
M_A_DQ17 AN40 AV10 M_B_DQ17 AN35 AM15
DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] M_A_CS3# 8 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3] M_B_CS3# 10
M_A_DQ18 AR38 M_B_DQ18 AN32
M_A_DQ19 AR37 DDR0_DQ[18]/DDR0_DQ[34] AW11 M_B_DQ19 AP32 DDR1_DQ[18]/DDR0_DQ[50] AM16
DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] M_A_ODT0 7 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] M_B_ODT0 9
M_A_DQ20 AN39 AU14 M_A_ODT1 7 M_B_DQ20 AN34 AL16 M_B_ODT1 9
M_A_DQ21 AN37 DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] AU12 M_B_DQ21 AP34 DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] AP15
DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] M_A_ODT2 8 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] M_B_ODT2 10
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
AR39
AR40
AW37
AU38
DDR0_DQ[22]/DDR0_DQ[38]
DDR0_DQ[23]/DDR0_DQ[39]
DDR0_DQ[24]/DDR0_DQ[40]
DDR0_ODT[3]

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
AY10

AY13
AV15
M_A_ODT3

M_A_BA0 7,8
8 M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
AN31
AP31
AL29
AM29
DDR1_DQ[22]/DDR0_DQ[54]
DDR1_DQ[23]/DDR0_DQ[55]
DDR1_DQ[24]/DDR0_DQ[56]
DDR1_ODT[3]

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
AL15

AN18
AL17
M_B_ODT3

M_B_A16 10,9
10
Sheet 4 of 62
DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] M_A_BA1 7,8 DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] M_B_A14 10,9

C
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
AV35
AW35
AU37
AV37
DDR0_DQ[26]/DDR0_DQ[42]
DDR0_DQ[27]/DDR0_DQ[43]
DDR0_DQ[28]/DDR0_DQ[44]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
AW23

AW13
AV14
M_A_BG0

M_A_A16
7,8

7,8
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
AP29
AR29
AM28
AL28
DDR1_DQ[26]/DDR0_DQ[58]
DDR1_DQ[27]/DDR0_DQ[59]
DDR1_DQ[28]/DDR0_DQ[60]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
AP16

AL18
AM18
M_B_A15

M_B_BA0
10,9

10,9
C Processor 3/5
DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] M_A_A14 7,8 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_BA1 10,9
M_A_DQ30 AT35 AY11 M_B_DQ30 AR28 AW28
DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_A15 7,8 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BG0 10,9
M_A_DQ31 AU35 M_B_DQ31 AP28
M_A_DQ32 AY8 DDR0_DQ[31]/DDR0_DQ[47] AW15 M_B_DQ32 AR12 DDR1_DQ[31]/DDR0_DQ[63] AL19
DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] M_A_A0 7,8 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] M_B_A0 10,9
M_A_DQ33 AW8 AU18 M_B_DQ33 AP12 AL22
DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] M_A_A1 7,8 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] M_B_A1 10,9
M_A_DQ34 AV6 AU17 M_B_DQ34 AM13 AM22
DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] M_A_A2 7,8 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] M_B_A2 10,9
M_A_DQ35 AU6 AV19 M_B_DQ35 AL13 AM23
DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] M_A_A3 7,8 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] M_B_A3 10,9
M_A_DQ36 AU8 AT19 M_B_DQ36 AR13 AP23
DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_A_A4 7,8 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] M_B_A4 10,9
M_A_DQ37 AV8 AU20 M_B_DQ37 AP13 AL23
DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] M_A_A5 7,8 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] M_B_A5 10,9
M_A_DQ38 AW6 AV20 M_B_DQ38 AM12 AW26
DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] M_A_A6 7,8 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] M_B_A6 10,9
M_A_DQ39 AY6 AU21 M_B_DQ39 AL12 AY26
DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] M_A_A7 7,8 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] M_B_A7 10,9
M_A_DQ40 AY4 AT20 M_B_DQ40 AP10 AU26
DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] M_A_A8 7,8 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] M_B_A8 10,9
M_A_DQ41 AV4 AT22 M_B_DQ41 AR10 AW27
DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] M_A_A9 7,8 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] M_B_A9 10,9
M_A_DQ42 AT1 AY14 M_B_DQ42 AR7 AP18
DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] M_A_A10 7,8 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] M_B_A10 10,9
M_A_DQ43 AT2 AU22 M_B_DQ43 AP7 AU27
DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] M_A_A11 7,8 DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] M_B_A11 10,9
M_A_DQ44 AV3 AV22 M_B_DQ44 AR9 AV27
DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] M_A_A12 7,8 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] M_B_A12 10,9
M_A_DQ45 AW4 AV12 M_B_DQ45 AP9 AR15
DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] M_A_A13 7,8 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] M_B_A13 10,9
M_A_DQ46 AT4 AV23 M_B_DQ46 AR6 AY28
DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 7,8 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 10,9
M_A_DQ47 AT3 AU24 M_B_DQ47 AP6 AU28
DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_A_ACT# 7,8 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# M_B_ACT# 10,9
M_A_DQ48 AP2 M_B_DQ48 AM10
M_A_DQ49 AM4 DDR0_DQ[48]/DDR1_DQ[32] AY15 M_B_DQ49 AL10 DDR1_DQ[48] AL20
DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR DDR0_A_PARITY 7,8 DDR1_DQ[49] DDR1_PAR DDR1_B_PARITY 10,9
M_A_DQ50 AP3 AT23 M_B_DQ50 AM7 AY25
DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# DDR0_A_ALERT# 7,8 DDR1_DQ[50] DDR1_ALERT# DDR1_B_ALERT# 10,9
M_A_DQ51 AM3 M_B_DQ51 AL7
M_A_DQ52 AP4 DDR0_DQ[51]/DDR1_DQ[35] M_B_DQ52 AM9 DDR1_DQ[51]
M_A_DQ53 AM2 DDR0_DQ[52]/DDR1_DQ[36] AF39 M_B_DQ53 AL9 DDR1_DQ[52] AF34
DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] M_A_DQS#0 7,8 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2] M_B_DQS#0 10,9
M_A_DQ54 AP1 AK39 M_B_DQ54 AM6 AK33
DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] M_A_DQS#1 7,8 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3] M_B_DQS#1 10,9
M_A_DQ55 AM1 AP39 M_B_DQ55 AL6 AN33
DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] M_A_DQS#2 7,8 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] M_B_DQS#2 10,9
M_A_DQ56 AK3 AU36 M_B_DQ56 AJ6 AN29
B DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] M_A_DQS#3 7,8 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] M_B_DQS#3 10,9 B
M_A_DQ57 AH1 AW7 M_B_DQ57 AJ7 AN13
DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSN[4]/DDR1_DQSN[0] M_A_DQS#4 7,8 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2] M_B_DQS#4 10,9
M_A_DQ58 AK4 AU3 M_B_DQ58 AE6 AR8
DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSN[5]/DDR1_DQSN[1] M_A_DQS#5 7,8 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3] M_B_DQS#5 10,9
M_A_DQ59 AH2 AN3 M_B_DQ59 AF7 AM8
DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSN[6]/DDR1_DQSN[4] M_A_DQS#6 7,8 DDR1_DQ[59] DDR1_DQSN[6] M_B_DQS#6 10,9
M_A_DQ60 AH4 AJ3 M_B_DQ60 AH7 AG6
DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSN[7]/DDR1_DQSN[5] M_A_DQS#7 7,8 DDR1_DQ[60] DDR1_DQSN[7] M_B_DQS#7 10,9
M_A_DQ61 AK2 M_B_DQ61 AH6
M_A_DQ62 AH3 DDR0_DQ[61]/DDR1_DQ[45] AF38 M_B_DQ62 AE7 DDR1_DQ[61] AF35
DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] M_A_DQS0 7,8 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2] M_B_DQS0 10,9
M_A_DQ63 AK1 AK38 M_B_DQ63 AF6 AL33
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] M_A_DQS1 7,8 DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3] M_B_DQS1 10,9
AP38 AP33
DDR0_DQSP[2]/DDR0_DQSP[4] M_A_DQS2 7,8 DDR1_DQSP[2]/DDR0_DQSP[6] M_B_DQS2 10,9
AU33 AV36 AR25 AN28
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] M_A_DQS3 7,8 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] M_B_DQS3 10,9
AT33 AV7 AR26 AN12
DDR0_ECC[1] DDR0_DQSP[4]/DDR1_DQSP[0] M_A_DQS4 7,8 DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] M_B_DQS4 10,9
AW33 AU2 AM26 AP8
DDR0_ECC[2] DDR0_DQSP[5]/DDR1_DQSP[1] M_A_DQS5 7,8 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3] M_B_DQS5 10,9
AV31 AN2 AM25 AL8
DDR0_ECC[3] DDR0_DQSP[6]/DDR1_DQSP[4] M_A_DQS6 7,8 DDR1_ECC[3] DDR1_DQSP[6] M_B_DQS6 10,9
AU31 AJ2 AP26 AG7
DDR0_ECC[4] DDR0_DQSP[7]/DDR1_DQSP[5] M_A_DQS7 7,8 DDR1_ECC[4] DDR1_DQSP[7] M_B_DQS7 10,9
AV33 AP25
AW31 DDR0_ECC[5] AV32 AL25 DDR1_ECC[5] AN25
AY31 DDR0_ECC[6] DDR0_DQSP[8] AU32 AL26 DDR1_ECC[6] DDR1_DQSP[8] AN26
DDR0_ECC[7] DDR0_DQSN[8] DDR1_ECC[7] DDR1_DQSN[8]

DDR CHANNEL B

DDR CHANNEL A AB40


DDR_VREF_CA DDR_VREF_CA 7
AC40 DDR0_VREF_DQ
1 OF 12 DDR0_VREF_DQ AC39
DDR1_VREF_DQ DDR1_VREF_DQ 9
2 OF 12
SKL_S_CPU_LGA
REV = 1.2 SKL_S_CPU_LGA
REV = 1.2 ?
?

A A

   !!DMFWP!DP/
Title
[04] Processor 3/5-DDR4
Size Document Number Rev
A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 4 of 62


5 4 3 2 1

Processor 3/5 B - 5
Schematic Diagrams

Processor 4/5

5 4 3 2 1

SKYLAKE-S Processor 4/5 ( POWER )


VCORE VCORE 4.2A 4.2A
SKL_S_CPU VCCSA SKL_S_CPU VDDQ
U39G ? U39I ?
LGA1151 LGA1151
AA7 AT18
A25 H32 AB6 VCCSA VDDQ AT21
A26 VCC VCC J21
DESIGN NOTE: AB7 VCCSA VDDQ AU13
A27 VCC VCC F32 VCCSA PLACE CAPS IN SOCKET EDGE BOTTOM/TOP AB8 VCCSA VDDQ AU15
D
VCORE DESIGN NOTE: A28 VCC VCC F33 AC7 VCCSA VDDQ AU19
D

PLACE CAPS IN SOCKET EDGE BOTTOM/TOP A29 VCC VCC F34 AC8 VCCSA VDDQ AU23
A30 VCC VCC G23 2/13 C89 C35 N7 VCCSA VDDQ AV11
C87 C609 C73 C34 C33 B25 VCC VCC G24 P7 VCCSA VDDQ AV17
B27 VCC VCC G25 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 R7 VCCSA VDDQ AV21
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 B29 VCC VCC G26 T7 VCCSA VDDQ AW10
B31 VCC VCC G27 U7 VCCSA VDDQ AW14
B32 VCC VCC G28 Y6 VCCSA VDDQ AW25
FOR OCK only
B33 VCC VCC G29 Y7 VCCSA VDDQ AY12
B.Schematic Diagrams

C72 C600 C68 C30 C46 B34 VCC VCC J22 VCCSA Y8 VCCSA VDDQ AY16
B35 VCC VCC J23 W7 VCCSA VDDQ AY18 VDDQ
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 B36 VCC VCC J24 V7 VCCSA VDDQ AY23
B37 VCC VCC J25 AA6 VCCSA VDDQ
C25 VCC VCC J26 C103 C82 VCCSA AJ9 VCCPLL_OC_R R73 0_04
C26 VCC VCC J27 VCCIO VCCPLL_OC
C88 C101 C612 C599 C66 C27 VCC VCC J28 22u_6.3V_X5R_08 22u_6.3V_X5R_08 AK11 VCCPLL_OC
C28 VCC VCC J29 AK14 VCCIO
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 C29 VCC VCC J30 AK24 VCCIO
VCC VCC VCCIO

Sheet 5 of 62 C49 C109 C50 C32 C605


C30
C32
C34
C36
VCC
VCC
VCC
VCC
VCC
VCC
J31
K16
K18
K20
AJ23
M8
P8
T8
VCCIO
VCCIO
VCCIO
R601 *0_04

VCC VCC VCCIO VCCOPC_NC

Processor 4/5 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08


D25
D27
D29
D31
VCC
VCC
VCC
VCC
VCC
VCC
K21
K23
K25
K27
VCCFUSEPRG IS TIED
TO VCCST_VCCPLL
VCCFUSEPRG
U8
W8 VCCIO
VCCIO
VCCOPC
AJ30
AJ27
D32 VCC VCC K29 PR72 *0_06 VCCOPC AJ28
VCC VCC VCORE VCCOPC
C80 C79 C613 C618 C48 D33 K31 V5 AJ29 D02 
C D34 VCC VCC L14 PR73 0_06 V6 VCCST VCCOPC AK27 4/30 C
VCC VCC VCCST_VCCPLL VCCST VCCOPC VCCEOPIO_NC
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 D35 L15
D36 VCC VCC L16 V4
E24 VCC VCC L17 VCCPLL AJ25
E25 VCC VCC L18
DESIGN NOTE: VCCEOPIO AJ26
C100 C47 C606 C31 E26 VCC VCC L19 PLACE CAPS IN SOCKET VCCEOPIO VCC_OPC_1P8_NC VCC_OPC_1P8_NC1
E27 VCC VCC L20 EDGE BOTTOM/TOP
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 E28 VCC VCC L21 AB37 2 1
E29 VCC VCC L22 VCC_OPC_1P8 AB38 J2 *40mil R612
E30 VCC VCC L23 VCC_OPC_1P8 VCCIO_SENSE
E32 VCC VCC L24 R614 100_04
VCC VCC VCCSA D02 5/5
E34 L25 AD5 VCCSA_SENSE 50
C619 C108 C608 C67 E36 VCC VCC L26 C604 C603 VCCSA_SENSE AF4 R612 100_04
VCC VCC VCCIO_SENSE VCCIO
F23 L27 AE4 VSS_SA_IO_SENSE 50
22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 F24 VCC VCC L28 22u_6.3V_X5R_08 1u_6.3V_X5R_04 VSS_SAIO_SENSE R613 100_04
F25 VCC VCC L29
F27 VCC VCC L30 AK21
F29 VCC VCC M13 VCCOPC_SENSE AJ24
F31 VCC VCC M14 VCCEOPIO_SENSE AK22
G30 VCC VCC M16 VSSOPC_EOPIO_SENSE
G32 VCC VCC M18 SKL_S_CPU_LGA
H22 VCC VCC M20 9 OF 12
FOR 44e only
H23 VCC VCC M22 REV = 1.2 ?
H25 VCC VCC M24
H27 VCC VCC M26 D02 ,VIA
H29 VCC VCC M28 5/8
H31 VCC VCC M30
VCC VCC
AJ11 AJ12 VCORE
B AJ13 VCC VCC AJ14 B
AJ15 VCC VCC AJ16
AJ17 VCC VCC AJ18 PR200
AJ19 VCC VCC AJ20
AJ21 VCC VCC AJ22 100_04
VCC VCC
C38 VCCCORE_SENSE 48
VCC_SENSE D38
VSS_SENSE VSSCORE_SENSE 48

SKL_S_CPU_LGA PR201
7 OF 12
REV = 1.2 ? 100_04

DESIGN NOTE: D03 PC157 C703


VDDQ PLACE CAPS IN SOCKET EDGE BOTTOM/TOP

C703 C694
C679 C678 C677 C676 + +

22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 560u_2.5V_6.6*6.6*5.9 *560u_2.5V_6.6*6.6*5.9

VCCIO DESIGN NOTE:


PLACE CAPS IN SOCKET EDGE BOTTOM/TOP
A A

C107 C74 C110 C69 C102 C611

22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08

44 VCCPLL_OC
   !!DMFWP!DP/
C75 C81 C124 Title
10,18,44,7,8,9
18,3,46,48
VDDQ
VCCST_VCCPLL
[05] Processor 4/5-POWER
0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 2,3,43 VCCIO
49 VCORE Size Document Number Rev
50 VCCSA A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 5 of 62


5 4 3 2 1

B - 6 Processor 4/5
Schematic Diagrams

Processor 5/5

5 4 3 2 1

SKYLAKE-S Processor 5/5 ( GND )


SKL_S_CPU
?
SKL_S_CPU U39L VCCGT SKL_S_CPU VCCGTX
U39K SKL_S_CPU ? U39F ? G13 D39 U39H ?
AB5 C37 VSS VSS
VSS VSS G17 D7 LGA1151 D02 
AC3 J16 VSS VSS
VSS VSS AK29 G15 E11 AA34 F35 4/30
AC33 D40 VSS VSS VSS VCCGT VCCGTX
VSS VSS_NCTF AK30 G3 E13 AA35 G34
AB39 K35 VSS VSS VSS VCCGT VCCGTX

LGA1151
VSS VSS AK36 G6 E17 AA36 G35
AA8 K37 VSS VSS VSS VCCGT VCCGTX
D VSS VSS AK37 H1 E15 AA37 H33 D
A17 K33 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK40 H21 E19 AA38 H34
A11 H37 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK5 H24 E21 AB33 J33 D02

AA33 C10 VSS AK6 H26 VSS VSS E23 AB34 VCCGT VCCGTX J35
VSS VSS 5/5
AA3 D24 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK7 H39 E3 G36 K32
A24 D37 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK8 H4 E31 G37 K34
A13 B30 VSS VSS VSS VCCGT VCCGTX
VSS VSS AK9 H9 E33 G38 L31
A15 B26 VSS VSS VSS VCCGT VCCGTX
VSS VSS AL1 J18 E37 G39 L33
AG1 B24 VSS AL11 J20 VSS VSS E35 G40 VCCGT VCCGTX M32
DESIGN NOTE:
AH8 VSS VSS AY7 VSS VSS VSS VCCGT VCCGTX
VSS VSS A7 AL14 J3 E6 H36 PLACE CAPS IN SOCKET EDGE BOTTOM/TOP
AJ1 AY5 VSS VSS VSS VSS VCCGT
VSS VSS AC34 AL2 J6 E9 H38
AH40 AY30 VSS VSS VSS VSS VCCGT VCCGT
VSS VSS AC35 AL21 K1 F1 H40

B.Schematic Diagrams
AH5 AY27 VSS VSS VSS VSS VCCGT
VSS VSS AC6 AL24 K14 F22 J36
AH39 AW36 AD1 VSS VSS AL27 K17 VSS VSS F10 J37 VCCGT
AH38 VSS VSS AW34 VSS VSS VSS VSS VCCGT
VSS VSS AD33 AL3 K22 F26 J38
AH37 AW32 VSS VSS VSS LGA1151 VSS VCCGT
VSS VSS AD36 AL30 U3 F28 J39 C610 C607
AH36 C12 VSS VSS VSS VSS VCCGT
VSS VSS AD37 AL36 T37 F30 J40
AG8 C14 VSS VSS VSS VSS VCCGT
VSS VSS AD38 AL4 T35 F40 K36 *47uF_6.3V_X5R_08 *47uF_6.3V_X5R_08
AH33 C16 AD39 VSS VSS AL5 R33 VSS VSS F4 K38 VCCGT
AG5 VSS VSS C18 VSS VSS VSS VSS VCCGT
VSS VSS AD4 AM11 P4 F7 K40
AG4 C5
AG36
AG33
AG3
VSS
VSS
VSS
VSS
VSS
VSS
C8
D26
D28
AD40
AD6
AD7
AD8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM14
AM17
AM19
AM24
P39
P37
P1
N33
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G11
G19
G22
G31
L34
L35
L36
L37
VCCGT
VCCGT
VCCGT
VCCGT C615 C614
Sheet 6 of 62
AG2 VSS VSS D30

Processor 5/5
AE3 VSS VSS AM27 M39 VSS VSS G33 L38 VCCGT
AR30 VSS VSS D4
AE33 VSS VSS AM30 M37 VSS VSS H35 L39 VCCGT *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
AR3 VSS VSS
AE36 VSS VSS AM31 M29 VSS VSS J10 L40 VCCGT
AR27 VSS
AE5 VSS VSS AM32 M25 VSS VSS J12 M33 VCCGT
AT10 VSS
AE8 VSS VSS AM33 M27 VSS VSS J32 M34 VCCGT
H30 VSS
C AF1 VSS VSS AM34 M23 VSS VSS J34 M36 VCCGT C
AV38 VSS
LGA1151 AF33 VSS VSS AM35 M21 VSS VSS K15 M38 VCCGT C77 C70
AV9 VSS
AF36 VSS VSS AM36 M19 VSS VSS K19 M40 VCCGT
L11 VSS
AF37 VSS VSS AM37 M15 VSS VSS B38 N34 VCCGT *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
K30 VSS
AF40 VSS VSS AM38 M17 VSS VSS_NCTF U33 N35 VCCGT
K28 VSS
AF5 VSS VSS AM39 M10 VSS VSS T4 N36 VCCGT
K26 VSS
AF8 VSS VSS AM40 M12 VSS VSS T1 N37 VCCGT
K24 VSS
VSS VSS AM5 M1 VSS VSS R6 N38 VCCGT
C2 VSS
VSS AN1 L32 VSS VSS R8 N39 VCCGT
A4 VSS_NCTF
VSS AN10 L3 VSS VSS R3 N40 VCCGT C65 C64
H7 VSS_NCTF VSS VSS VSS VCCGT
VSS AN11 L13 P35 P33
H28 VSS VSS VSS VCCGT
VSS AN14 K7 N8 P34 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
AT30 VSS VSS VSS VCCGT
VSS AN16 K4 N6 P36
AT25 VSS VSS VSS VCCGT
VSS AN19 K39 N3 P38
AT14 VSS AN22 AU25 VSS VSS M4 P40 VCCGT
L6 VSS VSS VSS VSS VCCGT
VSS AN23 AU34 M7 R34
L9 VSS VSS VSS VCCGT
VSS AN24 AU4 M35 R35 C85
AR33 VSS VSS VSS VCCGT
VSS AN27 AT38 B28 R36
AU1 VSS VSS VSS VCCGT
VSS AN30 AT37 T39 R37 *22u_6.3V_X5R_08
AT9 VSS AN36 AT34 VSS VSS V8 R38 VCCGT
AT28 VSS VSS VSS VSS VCCGT
VSS AN4 AT31 W33 R39
AT32 VSS VSS VSS VCCGT
VSS AN5 AT29 Y5 R40
AY9 VSS VSS VSS VCCGT
VSS AN6 AT27 T33
AW9 VSS VSS VCCGT
VSS AN7 AT26 T34
AW5 AJ31 VSS AN8 AR24 VSS T36 VCCGT
AW30 VSS VSS VSS VSS VCCGT
VSS AJ32 AN9 V35 T38
AW3 VSS VSS VSS VCCGT
VSS AJ33 AP11 U6 T40
AV5 VSS VSS VSS VCCGT
VSS AJ34 AP14 V1 U34
AV34 VSS VSS VSS VCCGT
VSS AJ35 AP24 V37 U35
B AV30 AJ36 VSS VSS AP27 V39 VSS U36 VCCGT B
AV28 VSS VSS VSS VSS VCCGT
VSS AJ4 AP30 AT8 U37
AV26 VSS VSS VSS VCCGT
VSS AJ5 AP36 W3 U38
AV2 VSS VSS VSS VCCGT
VSS AJ8 AP37 Y35 U39
AU7 VSS VSS VSS SKL_S_CPU_LGA VCCGT
VSS AK10 AP40 W6 U40
AU5 VSS VSS VSS VCCGT
VSS AK12 AP5 Y37 12 of 12 V33
AU30 VSS VSS VSS VCCGT
VSS AK13 AR1 V34
AT7 VSS VSS VCCGT
VSS AK15 AR11 REV = 1.2 ? V36
AT6 VSS VSS VCCGT
VSS AK16 AR14 V38
AT5 VSS VSS VCCGT
VSS AK17 AR16 V40
AT40 AK18 VSS VSS AR17 W34 VCCGT
AT39 VSS VSS VSS VCCGT
VSS AK19 AR18 W35
AT36 VSS VSS VCCGT
VSS AK20 AR19 W36
AT24 VSS VSS VCCGT
VSS AK23 AR2 W37
AT17 VSS VSS VCCGT
VSS AK25 AR20 W38 F39 VCCGT_SENSE 48
AT13 VSS VSS VCCGT VCCGT_SENSE
VSS AK26 AR21 Y33 F38
AT12 VSS VSS VCCGT VSSGT_SENSE VSSGT_SENSE 48
VSS AK28 Y34
AT11 VSS VCCGT
VSS Y36 F37
AR5 VCCGT VCCGTX_SENSE
VSS Y38 F36
AR4 VCCGT VSSGTX_SENSE
VSS D02 ,VIA
AR36
VSS SKL_S_CPU_LGA 5/8
AR35
VSS SKL_S_CPU_LGA 8 OF 12
AR34
VSS 6 OF 12 REV = 1.2 ?
AR32
VSS REV = 1.2 ?
AR31
B6 VSS
C20 VSS
C22 VSS
C35 VSS
A C33 VSS A
C31 VSS
C24 VSS SKL_S_CPU_LGA
VSS 11 of 12
REV = 1.2 ?

   !!DMFWP!DP/
Title
[06] Processor 5/5-GND
Size Document Number Rev
48,50 VCCGT A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 6 of 62


5 4 3 2 1

Processor 5/5 B - 7
Schematic Diagrams

DDR4 CHA SO-DIMM_0

5 4 3 2 1

JDIMM1A 0.6V
1.2V
137 8 VDDQ VTT_MEM
4 M_A_CK0 M_A_DQ5 4,8 JDIMM1B

CHA DIMM0
139 CK0_T DQ0 7
4 M_A_CK#0 CK0_C DQ1 M_A_DQ0 4,8
4 M_A_CK1 138 20
CK1_T DQ2 M_A_DQ2 4,8
4 M_A_CK#1 140 21 163 258
CK1_C DQ3 M_A_DQ3 4,8 VDD19 VTT 2.5V
4 160
DQ4 M_A_DQ1 4,8 VDD18
4 M_A_CKE0 109 3 159
CKE0 DQ5 M_A_DQ4 4,8 VDD17
4 M_A_CKE1 110 16 154 259
CKE1 DQ6 M_A_DQ6 4,8 VDD16 VPP2
17 153 257
DQ7 M_A_DQ7 4,8 VDD15 VPP1
4 M_A_CS0# 149 28 148
S0* DQ8 M_A_DQ8 4,8 VDD14 3.3VS
157 29 147
4 M_A_CS1# S1* DQ9 M_A_DQ12 4,8 VDD13
41 142
155 DQ10 42
M_A_DQ14 4,8 JDIMM1 = CHA DIMM0 000 141 VDD12
D 4 M_A_ODT0 M_A_DQ11 4,8 D
161 ODT0 DQ11 24 136 VDD11 255
4 M_A_ODT1 ODT1 DQ12 M_A_DQ9 4,8 VDD10 VDDSPD
25 135
DQ13 M_A_DQ13 4,8 VDD9
4,8
4,8
M_A_BG0
M_A_BG1
115
113 BG0
BG1
DQ14
DQ15
38
37 M_A_DQ10
M_A_DQ15
4,8
4,8
BOT JDIMM3 = CHB DIMM0 010 130
129 VDD8
VDD7
C750 C719
4,8 M_A_BA0 150 50 124
BA0 DQ16 M_A_DQ17 4,8 VDD6
4,8 M_A_BA1 145 49 123 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
BA1 DQ17 M_A_DQ20 4,8 VDD5
62 118
DQ18 M_A_DQ23 4,8 VDD4
144 63 117
4,8
4,8
M_A_A0
M_A_A1 133 A0 DQ19 46 M_A_DQ18 4,8
TOP JDIMM2 = CHA DIMM1 001 112 VDD3
PLACE CLOSE TO PIN
A1 DQ20 M_A_DQ16 4,8 VDD2
4,8 M_A_A2 132 45 111
A2 DQ21 M_A_DQ21 4,8 VDD1
131 58
B.Schematic Diagrams

4,8 M_A_A3 A3 DQ22 M_A_DQ19 4,8


4,8 M_A_A4 128 59 GND1
A4 DQ23 M_A_DQ22 4,8 MT1
126 70 GND2
4,8 M_A_A5 A5 DQ24 M_A_DQ25 4,8 MT2
4,8 M_A_A6 127 71
A6 DQ25 M_A_DQ29 4,8 VDDQ
4,8 M_A_A7 122 83 JDIMM4 = CHB DIMM1 011
A7 DQ26 M_A_DQ30 4,8
4,8
4,8
M_A_A8
M_A_A9
125
121 A8 DQ27
84
66
M_A_DQ31
M_A_DQ24
4,8
4,8
251
247 VSS VSS
252
248 PLACE CLOSE TO SODIMM
146 A9 DQ28 67 243 VSS VSS 244
4,8 M_A_A10 A10_AP DQ29 M_A_DQ28 4,8 VSS VSS
4,8 M_A_A11 120 79 239 238
A11 DQ30 M_A_DQ27 4,8 VDDQ VSS VSS
119 80 235 234
PLACE CLOSE TO SODIMM
Sheet 7 of 62
4,8 M_A_A12 A12 DQ31 M_A_DQ26 4,8 VSS VSS
4,8 M_A_A13 158 174 231 230 C740 C734 C720 C730
A13 DQ32 M_A_DQ32 4,8 VSS VSS
4,8 M_A_A14 151 173 227 226
A14_WE* DQ33 M_A_DQ37 4,8 R283 VSS VSS
156 187 DIMM0_CHA_EVENT# 240_1%_04 223 222 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
4,8 M_A_A15 A15_CAS* DQ34 M_A_DQ39 4,8 VSS VSS
152 186 217 218

DDR4 CHA SO-


4,8 M_A_A16 A16_RAS* DQ35 M_A_DQ34 4,8 VSS VSS
170 213 214
DQ36 M_A_DQ36 4,8 VSS VSS
169 D02  CHA 000 209 210
DQ37 M_A_DQ33 4,8 VSS VSS
4,8 M_A_ACT# 114 183  205 206
ACT* DQ38 M_A_DQ38 4,8 VSS VSS
182 5/5 201 202

DIMM _0 DQ39 M_A_DQ35 4,8 VSS VSS


C
4,8 DDR0_A_PARITY 143 195 197 196 C751 C722 C737 C742 C
PARITY DQ40 M_A_DQ41 4,8 VSS VSS
4,8 DDR0_A_ALERT# 116 194 193 192
ALERT* DQ41 M_A_DQ45 4,8 VSS VSS
DIMM0_CHA_EVENT# 134 207 189 188 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
EVENT* DQ42 M_A_DQ46 4,8 VSS VSS
10,18,8,9 DDR4_DRAMRST# 108 208 185 184
RESET* DQ43 M_A_DQ42 4,8 VSS VSS
191 181 180
DQ44 M_A_DQ44 4,8 VSS VSS
7,8 VREFCA_CHA_DIMM 164 190 175 176
VREFCA DQ45 M_A_DQ40 4,8 VSS VSS
203 171 172
DQ46 M_A_DQ43 4,8 VSS VSS
10,16,8,9 SMB_DATA_MAIN 254 204 167 168
SDA DQ47 M_A_DQ47 4,8 VSS VSS
253 216 107 106
10,16,8,9 SMB_CLK_MAIN SCL DQ48 M_A_DQ49 4,8 VSS VSS VDDQ
215 103 102
DQ49 M_A_DQ52 4,8 VSS VSS
SA2_CHA_DIM0 166 228 PLACE THE CAP WITHIN 200 MILS 99 98
SA2 DQ50 M_A_DQ55 4,8 VSS VSS
SA1_CHA_DIM0 260 229
M_A_DQ51 4,8 FROM THE SODIMM-0 93 94
SA0_CHA_DIM0 256 SA1 DQ51 211 89 VSS VSS 90
SA0 DQ52 M_A_DQ50 4,8 VSS VSS
212 DDR4_DRAMRST# 85 86
DQ53 M_A_DQ48 4,8 VSS VSS
224 81 82
DQ54 M_A_DQ53 4,8 VSS VSS
225 C257 77 78 C743 C741 C754 C755
DQ55 M_A_DQ54 4,8 VSS VSS
92 237 73 72
CB0_NC DQ56 M_A_DQ61 4,8 VSS VSS
91 236 *0.1u_10V_X7R_04 69 68 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
CB1_NC DQ57 M_A_DQ63 4,8 VSS VSS
101 249 65 64
CB2_NC DQ58 M_A_DQ57 4,8 VSS VSS
105 250
61 60
CB3_NC DQ59 M_A_DQ60 4,8 VSS VSS
88 232 6/15 57 56
CB4_NC DQ60 M_A_DQ56 4,8 VSS VSS
87 233 51 52
CB5_NC DQ61 M_A_DQ58 4,8 VSS VSS
100 245 47 48
CB6_NC DQ62 M_A_DQ62 4,8 VSS VSS
104 246 43 44 C732 C753 C725 C721
CB7_NC DQ63 M_A_DQ59 4,8 VSS VSS
VREFCA_CHA_DIMM PLACE THE CAP CLOSE TO SODIMM 39 40
12 13 35 VSS VSS 36 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
VDDQ DM0*/DBI0* DQS0_T M_A_DQS0 4,8 VSS VSS
33 34 31 30
DM1*/DBI1* DQS1_T M_A_DQS1 4,8 VSS VSS
54 55 C752 C728 27 26
DM2*/DBI2* DQS2_T M_A_DQS2 4,8 VSS VSS
75 76 23 22
B DM3*/DBI3* DQS3_T M_A_DQS3 4,8 VSS VSS 2.5V B
178 179 0.1u_16V_X7R_04 *2.2u_10V_X5R_04 19 18
DM4*/DBI4* DQS4_T M_A_DQS4 4,8 VSS VSS
199 200 15 14
DM5*/DBI5* DQS5_T M_A_DQS5 4,8 VSS VSS
220 221 9 10
DM6*/DBI6* DQS6_T M_A_DQS6 4,8 VSS VSS
241 242 5 6
DM7*/DBI7* DQS7_T M_A_DQS7 4,8 VSS VSS
96 97 1 2
DM8*/DBI8* DQS8_T VSS VSS C717 C709 C718 C749
11
DQS0_C M_A_DQS#0 4,8
32 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DQS1_C M_A_DQS#1 4,8
53
DQS2_C M_A_DQS#2 4,8 D4AS0-26001-1P92
74
DQS3_C M_A_DQS#3 4,8 VTT_MEM
177
DQS4_C M_A_DQS#4 4,8
198
DQS5_C M_A_DQS#5 4,8
219
DQS6_C M_A_DQS#6 4,8
240
DQS7_C M_A_DQS#7 4,8
95 D02 06 C196 C195 C211
162 DQS8_C
165 S2*/C0 4/30 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04
S3*/C1
D02 ,VIA VDDQ
5/8 D4AS0-26001-1P92

C723 R761

PLACE CLOSE TO CHA 0.1u_16V_X7R_04 1K_1%_04 TO CHA JDIMM1,3


10,18,44,5,8,9 VDDQ
R762 2_1%_04 R732 0_04 10,44,8,9 VTT_MEM
A 4 DDR_VREF_CA A
10,47,8,9 2.5V
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,8,9 3.3VS
C729 C726 R745

   !!DMFWP!DP/
0.022u_16V_X7R_04 0.1u_16V_X7R_04 1K_1%_04

R746 Title
24.9_1%_04 [07] DDR4 CHA SO-DIMM_0
VREFCA_CHA_DIMM
VREFCA_CHA_DIMM 7,8
Size Document Number Rev
A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 7 of 62


5 4 3 2 1

B - 8 DDR4 CHA SO-DIMM_0


Schematic Diagrams

DDR4 CHA SO-DIMM_1

5 4 3 2 1

JDIMM2A VDDQ VTT_MEM


JDIMM2B

4 M_A_CK2 137 8
M_A_DQ5 4,7

CHA DIMM1
139 CK0_T DQ0 7 163 258
4 M_A_CK#2 CK0_C DQ1 M_A_DQ0 4,7 VDD19 VTT 2.5V
4 M_A_CK3 138 20 160
CK1_T DQ2 M_A_DQ2 4,7 VDD18
4 M_A_CK#3 140 21 159
CK1_C DQ3 M_A_DQ3 4,7 VDD17
4 154 259
DQ4 M_A_DQ1 4,7 VDD16 VPP2
4 M_A_CKE2 109 3 153 257
CKE0 DQ5 M_A_DQ4 4,7 VDD15 VPP1
4 M_A_CKE3 110 16 148
CKE1 DQ6 M_A_DQ6 4,7 VDD14
17 147
DQ7 M_A_DQ7 4,7 VDD13 3.3VS
4 M_A_CS2# 149 28 142
S0* DQ8 M_A_DQ8 4,7 VDD12
157 29 141
4 M_A_CS3# S1* DQ9 M_A_DQ12 4,7 VDD11
41 136 255
DQ10 M_A_DQ14 4,7 VDD10 VDDSPD
D 4 M_A_ODT2 155 42 135 D
ODT0 DQ11 M_A_DQ11 4,7 VDD9
4 M_A_ODT3 161 24 130 C267 C268
ODT1 DQ12 M_A_DQ9 4,7 VDD8
25 129
DQ13 M_A_DQ13 4,7 VDD7
115 38 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
4,7 M_A_BG0 BG0 DQ14 M_A_DQ10 4,7 VDD6
4,7 M_A_BG1 113 37 123
BG1 DQ15 M_A_DQ15 4,7 VDD5
4,7 M_A_BA0 150 50 118
BA0 DQ16 M_A_DQ17 4,7 VDD4
4,7 M_A_BA1 145 49 117
BA1 DQ17 M_A_DQ20 4,7 VDD3
62 112
4,7 M_A_A0
144
A0
DQ18
DQ19
63 M_A_DQ23
M_A_DQ18
4,7
4,7
111 VDD2
VDD1
PLACE CLOSE TO PIN
4,7 M_A_A1 133 46
A1 DQ20 M_A_DQ16 4,7
4,7 M_A_A2 132 45 GND1
A2 DQ21 M_A_DQ21 4,7 MT1
131 58 GND2
4,7 M_A_A3
128 A3 DQ22 59
M_A_DQ19 4,7 JDIMM1 = CHA DIMM0 000 MT2
4,7 M_A_A4 A4 DQ23 M_A_DQ22 4,7

B.Schematic Diagrams
PLACE CLOSE TO SODIMM
126 70
4,7 M_A_A5 A5 DQ24 M_A_DQ25 4,7 VDDQ
4,7 M_A_A6 127 71 251 252
A6 DQ25 M_A_DQ29 4,7 VSS VSS
122 83 247 248
JDIMM3 = CHB DIMM0 010
4,7
4,7
M_A_A7
M_A_A8 125
121
A7
A8
DQ26
DQ27
84
66
M_A_DQ30
M_A_DQ31
4,7
4,7 BOT 243
239
VSS
VSS
VSS
VSS
244
238
4,7 M_A_A9 A9 DQ28 M_A_DQ24 4,7 VSS VSS
146 67 235 234 C738 C184 C183 C699
4,7 M_A_A10 A10_AP DQ29 M_A_DQ28 4,7 VSS VSS
120 79 231 230
4,7
4,7
M_A_A11
M_A_A12 119
158
A11
A12
DQ30
DQ31
80
174
M_A_DQ27
M_A_DQ26
4,7
4,7 TOP 227
223
VSS
VSS
VSS
VSS
226
222
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
4,7
4,7
4,7
4,7
M_A_A13
M_A_A14
M_A_A15
M_A_A16
151
156
152
A13
A14_WE*
A15_CAS*
A16_RAS*
DQ32
DQ33
DQ34
DQ35
173
187
186
M_A_DQ32
M_A_DQ37
M_A_DQ39
M_A_DQ34
4,7
4,7
4,7
4,7
JDIMM2 = CHA DIMM1 001 217
213
209
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
218
214
210
Sheet 8 of 62
170 205 206

DDR4 CHA SO-


DQ36 M_A_DQ36 4,7 VSS VSS
169 201 202 C731 C724 C733 C735
114 DQ37 183
M_A_DQ33 4,7 JDIMM4 = CHB DIMM1 011 197 VSS VSS 196
4,7 M_A_ACT# ACT* DQ38 M_A_DQ38 4,7 VSS VSS
182 193 192 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
DQ39 M_A_DQ35 4,7 VSS VSS
C
4,7 DDR0_A_PARITY 143 195 189 188 C
M_A_DQ41 4,7

DIMM _1
116 PARITY DQ40 194 185 VSS VSS 184
4,7 DDR0_A_ALERT# ALERT* DQ41 M_A_DQ45 4,7 VDDQ VSS VSS
134 207 181 180
PLACE CLOSE TO SODIMM
DIMM1_CHA_EVENT#
EVENT* DQ42 M_A_DQ46 4,7 VSS VSS VDDQ
10,18,7,9 DDR4_DRAMRST# 108 208 175 176
RESET* DQ43 M_A_DQ42 4,7 VSS VSS
191 171 172
DQ44 M_A_DQ44 4,7 R747 VSS VSS
7 VREFCA_CHA_DIMM 164 190 DIMM1_CHA_EVENT# 240_1%_04 167 168
VREFCA DQ45 M_A_DQ40 4,7 VSS VSS
203 107 106
DQ46 M_A_DQ43 4,7 VSS VSS
10,16,7,9 SMB_DATA_MAIN 254 204 D02  CHA 001 103 102 C254 C266 C264 C261
SDA DQ47 M_A_DQ47 4,7 VSS VSS
10,16,7,9 SMB_CLK_MAIN 253 216  99 98
SCL DQ48 M_A_DQ49 4,7 VSS VSS
215 5/5 93 94 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DQ49 M_A_DQ52 4,7 VSS VSS
SA2_CHA_DIM1 166 228 89 90
SA2 DQ50 M_A_DQ55 4,7 VSS VSS
SA1_CHA_DIM1 260 229 85 86
SA1 DQ51 M_A_DQ51 4,7 VSS VSS
3.3VS R179 0_04 SA0_CHA_DIM1 256 211 81 82
SA0 DQ52 M_A_DQ50 4,7 VSS VSS
212 77 78
DQ53 M_A_DQ48 4,7 VSS VSS
224 73 72
DQ54 M_A_DQ53 4,7 VSS VSS
225 69 68 C260 C258 C259 C252
DQ55 M_A_DQ54 4,7 VSS VSS
92 237 65 64
CB0_NC DQ56 M_A_DQ61 4,7 VSS VSS
91 236 61 60 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
CB1_NC DQ57 M_A_DQ63 4,7 VSS VSS
101 249 57 56
CB2_NC DQ58 M_A_DQ57 4,7 VSS VSS
105 250 51 52
CB3_NC DQ59 M_A_DQ60 4,7 VSS VSS
88 232 VREFCA_CHA_DIMM PLACE THE CAP CLOSE TO SODIMM 47 48
CB4_NC DQ60 M_A_DQ56 4,7 VSS VSS 2.5V
87 233 43 44
CB5_NC DQ61 M_A_DQ58 4,7 VSS VSS
100 245 39 40
CB6_NC DQ62 M_A_DQ62 4,7 VSS VSS
104 246 C262 C727 35 36
CB7_NC DQ63 M_A_DQ59 4,7 VSS VSS
31 30
12 13 0.1u_16V_X7R_04 *2.2u_10V_X5R_04 27 VSS VSS 26 C240 C239 C228 C227
VDDQ DM0*/DBI0* DQS0_T M_A_DQS0 4,7 VSS VSS
33 34 23 22
DM1*/DBI1* DQS1_T M_A_DQS1 4,7 VSS VSS
54 55 19 18 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DM2*/DBI2* DQS2_T M_A_DQS2 4,7 VSS VSS
75 76 15 14
B DM3*/DBI3* DQS3_T M_A_DQS3 4,7 VSS VSS B
178 179 9 10
DM4*/DBI4* DQS4_T M_A_DQS4 4,7 VSS VSS VTT_MEM
199 200 5 6
DM5*/DBI5* DQS5_T M_A_DQS5 4,7 VSS VSS
220 221 1 2
DM6*/DBI6* DQS6_T M_A_DQS6 4,7 VSS VSS
241 242
DM7*/DBI7* DQS7_T M_A_DQS7 4,7
96 97
DM8*/DBI8* DQS8_T PLACE THE CAP WITHIN 200 MILS C764 C760 C765
11
M_A_DQS#0 4,7 FROM THE SODIMM-0
DQS0_C 32 D4AS0-26001-1P40 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04
DQS1_C M_A_DQS#1 4,7 D02 06
53 DDR4_DRAMRST#
DQS2_C M_A_DQS#2 4,7 4/30
74
DQS3_C M_A_DQS#3 4,7
177 C256
DQS4_C M_A_DQS#4 4,7
198
DQS5_C M_A_DQS#5 4,7
219 *0.1u_10V_X7R_04
DQS6_C M_A_DQS#6 4,7
240
DQS7_C M_A_DQS#7 4,7
95
162 DQS8_C

165 S2*/C0 6/15
S3*/C1

D4AS0-26001-1P40
D02 ,VIA
5/8

A A

   !!DMFWP!DP/
Title
10,18,44,5,7,9 VDDQ
[08] DDR4 CHA SO-DIMM_1
10,44,7,9 VTT_MEM
10,47,7,9 2.5V Size Document Number Rev
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,9 3.3VS A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 8 of 62


5 4 3 2 1

DDR4 CHA SO-DIMM_1 B - 9


Schematic Diagrams

DDR4 CHB SO-DIMM_0

5 4 3 2 1

JDIMM3A VDDQ VTT_MEM


JDIMM3B

4 M_B_CK0 137 8
CK0_T DQ0 M_B_DQ0 10,4
4 M_B_CK#0 139 7 163 258
CK0_C DQ1 M_B_DQ4 10,4 VDD19 VTT 2.5V
4 M_B_CK1 138 20 160
CK1_T DQ2 M_B_DQ7 10,4 VDD18
4 M_B_CK#1 140 21 159
M_B_DQ3 10,4

CHB DIMM0
CK1_C DQ3 4 154 VDD17 259
DQ4 M_B_DQ5 10,4 VDD16 VPP2
4 M_B_CKE0 109 3 153 257
CKE0 DQ5 M_B_DQ1 10,4 VDD15 VPP1
4 M_B_CKE1 110 16 148
CKE1 DQ6 M_B_DQ2 10,4 VDD14
17 147
DQ7 M_B_DQ6 10,4 VDD13 3.3VS
4 M_B_CS0# 149 28 142
S0* DQ8 M_B_DQ9 10,4 VDD12
PLACE CLOSE TO PIN
157 29 141
4 M_B_CS1# S1* DQ9 M_B_DQ14 10,4 VDD11
41 136 255
DQ10 M_B_DQ13 10,4 VDD10 VDDSPD
D 4 M_B_ODT0 155 42 135 D
ODT0 DQ11 M_B_DQ15 10,4 VDD9
161 24 130 C883 C882
4 M_B_ODT1 ODT1 DQ12 25
M_B_DQ8 10,4 JDIMM1 = CHA DIMM0 000 129 VDD8
DQ13 M_B_DQ10 10,4 VDD7
115 38 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
10,4 M_B_BG0 BG0 DQ14 M_B_DQ11 10,4 VDD6
10,4 M_B_BG1 113 37 123
BG1 DQ15 M_B_DQ12 10,4 VDD5
150 50 118
JDIMM3 = CHB DIMM0 010
10,4
10,4
M_B_BA0
M_B_BA1 145 BA0
BA1
DQ16
DQ17
49
62
M_B_DQ21
M_B_DQ20
10,4
10,4 BOT 117
112
VDD4
VDD3
DQ18 M_B_DQ22 10,4 VDD2
144 63 111
10,4 M_B_A0 A0 DQ19 M_B_DQ19 10,4 VDD1
10,4 M_B_A1 133 46
M_B_DQ16 10,4
B.Schematic Diagrams

132 A1 DQ20 45 GND1


10,4
10,4
M_B_A2
M_B_A3 131
128
A2
A3
DQ21
DQ22
58
59
M_B_DQ17
M_B_DQ23
10,4
10,4 TOP MT1
MT2
GND2
10,4 M_B_A4
126 A4 DQ23 70 M_B_DQ18 10,4 JDIMM2 = CHA DIMM1 001 VDDQ
10,4 M_B_A5 A5 DQ24 M_B_DQ28 10,4
10,4
10,4
M_B_A6
M_B_A7
127
122 A6 DQ25
71
83
M_B_DQ25
M_B_DQ30
10,4
10,4
251
247 VSS VSS
252
248 PLACE CLOSE TO SODIMM
125 A7 DQ26 84 243 VSS VSS 244
10,4 M_B_A8
121 A8 DQ27 66
M_B_DQ27 10,4 JDIMM4 = CHB DIMM1 011 239 VSS VSS 238
10,4 M_B_A9 A9 DQ28 M_B_DQ29 10,4 VSS VSS
146 67 235 234
10,4 M_B_A10 A10_AP DQ29 M_B_DQ24 10,4 VSS VSS
120 79 231 230 C837 C194 C711 C701

Sheet 9 of 62 10,4
10,4
10,4
10,4
M_B_A11
M_B_A12
M_B_A13
M_B_A14
119
158
151
A11
A12
A13
A14_WE*
DQ30
DQ31
DQ32
DQ33
80
174
173
M_B_DQ26
M_B_DQ31
M_B_DQ36
M_B_DQ32
10,4
10,4
10,4
10,4
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06

156 187 213 214

DDR4 CHB SO- 10,4


10,4
M_B_A15
M_B_A16 152 A15_CAS*
A16_RAS*
DQ34
DQ35
DQ36
DQ37
186
170
169
M_B_DQ38
M_B_DQ39
M_B_DQ33
M_B_DQ37
10,4
10,4
10,4
10,4
PLACE CLOSE TO SODIMM
VDDQ 209
205
201
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
210
206
202
114 183 DIMM0_CHB_EVENT# R925 240_1%_04 197 196 C188 C189 C193 C866

DIMM _0
10,4 M_B_ACT# ACT* DQ38 M_B_DQ35 10,4 VSS VSS
182 193 192
DQ39 M_B_DQ34 10,4 VSS VSS
C
10,4 DDR1_B_PARITY 143 195 189 188 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 C
PARITY DQ40 M_B_DQ41 10,4 VSS VSS
116 194 185 184
10,4 DDR1_B_ALERT# ALERT* DQ41 M_B_DQ45 10,4 VSS VSS
DIMM0_CHB_EVENT# 134 207 D02  CHB 010 181 180
EVENT* DQ42 M_B_DQ46 10,4 VSS VSS
10,18,7,8 DDR4_DRAMRST# 108 208  175 176 VDDQ
RESET* DQ43 M_B_DQ43 10,4 VSS VSS
191 5/5 171 172
DQ44 M_B_DQ40 10,4 VSS VSS
10,9 VREFCA_CHB_DIMM 164 190 167 168
VREFCA DQ45 M_B_DQ44 10,4 VSS VSS
203 107 106
DQ46 M_B_DQ42 10,4 VSS VSS
254 204 103 102
10,16,7,8 SMB_DATA_MAIN SDA DQ47 M_B_DQ47 10,4 VSS VSS
253 216 99 98
10,16,7,8 SMB_CLK_MAIN SCL DQ48 M_B_DQ49 10,4 VSS VSS
215 93 94 C255 C893 C896 C253
DQ49 M_B_DQ48 10,4 VSS VSS
SA2_CHB_DIM0 166 228 89 90
SA2 DQ50 M_B_DQ51 10,4 VSS VSS
3.3VS R932 0_04 SA1_CHB_DIM0260 229 85 86 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
SA1 DQ51 M_B_DQ50 10,4 VSS VSS
SA0_CHB_DIM0 256 211 81 82
SA0 DQ52 M_B_DQ52 10,4 VSS VSS
212 77 78
DQ53 M_B_DQ53 10,4 VSS VSS
224 73 72
DQ54 M_B_DQ55 10,4 VSS VSS
225 VREFCA_CHB_DIMM PLACE THE CAP CLOSE TO SODIMM 69 68
DQ55 M_B_DQ54 10,4 VSS VSS
92 237 65 64
CB0_NC DQ56 M_B_DQ61 10,4 VSS VSS
91 236 61 60 C898 C897 C251 C894
CB1_NC DQ57 M_B_DQ60 10,4 VSS VSS
101 249 C887 C888 57 56
CB2_NC DQ58 M_B_DQ59 10,4 VSS VSS
105 250 51 52 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
CB3_NC DQ59 M_B_DQ62 10,4 VSS VSS
88 232 0.1u_16V_X7R_04 *2.2u_10V_X5R_04 47 48
CB4_NC DQ60 M_B_DQ56 10,4 VSS VSS
87 233 43 44
CB5_NC DQ61 M_B_DQ57 10,4 VSS VSS
100 245 39 40
CB6_NC DQ62 M_B_DQ63 10,4 VSS VSS 2.5V
104 246 35 36
CB7_NC DQ63 M_B_DQ58 10,4 VSS VSS
31 30
12 13 27 VSS VSS 26
VDDQ DM0*/DBI0* DQS0_T M_B_DQS0 10,4 VSS VSS
33 34 23 22
DM1*/DBI1* DQS1_T M_B_DQS1 10,4 VSS VSS
54 55 19 18
DM2*/DBI2* DQS2_T M_B_DQS2 10,4 VSS VSS
75 76 15 14 C777 C776 C786 C785
B DM3*/DBI3* DQS3_T M_B_DQS3 10,4 VSS VSS B
178 179 9 10
DM4*/DBI4* DQS4_T M_B_DQS4 10,4 VSS VSS
199 200 PLACE THE CAP WITHIN 200 MILS 5 6 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DM5*/DBI5* DQS5_T M_B_DQS5 10,4 VSS VSS
220 221
M_B_DQS6 10,4 FROM THE SODIMM-1 1 2
241 DM6*/DBI6* DQS6_T 242 VSS VSS
DM7*/DBI7* DQS7_T M_B_DQS7 10,4
96 97 DDR4_DRAMRST#
DM8*/DBI8* DQS8_T
11 C895 VTT_MEM
DQS0_C M_B_DQS#0 10,4 D4AS0-26001-1P52
32
DQS1_C M_B_DQS#1 10,4
53 *0.1u_10V_X7R_04
DQS2_C M_B_DQS#2 10,4
74
DQS3_C M_B_DQS#3 10,4
177 D02 06 C345 C344 C901
DQS4_C M_B_DQS#4 10,4
198

DQS5_C M_B_DQS#5 10,4 4/30
219 6/15 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04
DQS6_C M_B_DQS#6 10,4
240
DQS7_C M_B_DQS#7 10,4
95
162 DQS8_C
165 S2*/C0
S3*/C1 VDDQ
D02 ,VIA
5/8 D4AS0-26001-1P52

C710

PLACE CLOSE TO CHB 0.1u_16V_X7R_04 R923

1K_1%_04 TO CHB JDIMM2,4


R936 2_1%_04 R935 0_04
4 DDR1_VREF_DQ
A 10,47,7,8 2.5V A
C902 10,18,44,5,7,8 VDDQ
C904 R934 10,44,7,8 VTT_MEM
0.1u_16V_X7R_04 10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8 3.3VS
0.022u_16V_X7R_04 1K_1%_04

R937
   !!DMFWP!DP/
24.9_1%_04 Title
[09] DDR4 CHB SO-DIMM_0
VREFCA_CHB_DIMM
VREFCA_CHB_DIMM 10,9
Size Document Number Rev
A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 9 of 62


5 4 3 2 1

B - 10 DDR4 CHB SO-DIMM_0


Schematic Diagrams

DDR4 CHB SO-DIMM_1

5 4 3 2 1

JDIMM4A VDDQ VTT_MEM


JDIMM4B

4 M_B_CK2 137 8
M_B_DQ0 4,9

CHB DIMM1
139 CK0_T DQ0 7 163 258
4 M_B_CK#2 CK0_C DQ1 M_B_DQ4 4,9 VDD19 VTT 2.5V
4 M_B_CK3 138 20 160
CK1_T DQ2 M_B_DQ7 4,9 VDD18
140 21 159
4 M_B_CK#3 CK1_C DQ3 M_B_DQ3 4,9 VDD17
4 154 259
DQ4 M_B_DQ5 4,9 VDD16 VPP2
4 M_B_CKE2 109 3 153 257
CKE0 DQ5 M_B_DQ1 4,9 VDD15 VPP1
4 M_B_CKE3 110 16 148
CKE1 DQ6 M_B_DQ2 4,9 VDD14
17 147
DQ7 M_B_DQ6 4,9 VDD13
149 28 142
4 M_B_CS2# S0* DQ8 M_B_DQ9 4,9 VDD12 3.3VS
D
4 M_B_CS3# 157
S1* DQ9
29
41
M_B_DQ14
M_B_DQ13
4,9
4,9
141
136 VDD11 255 PLACE CLOSE TO PIN D
155 DQ10 42 135 VDD10 VDDSPD
4 M_B_ODT2 ODT0 DQ11 M_B_DQ15 4,9 VDD9
4 M_B_ODT3 161 24 130 C269 C270
ODT1 DQ12 M_B_DQ8 4,9 VDD8
25 129
DQ13 M_B_DQ10 4,9 VDD7
4,9 M_B_BG0 115 38 JDIMM1 = CHA DIMM0 000 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
BG0 DQ14 M_B_DQ11 4,9 VDD6
4,9 M_B_BG1 113 37 123
BG1 DQ15 M_B_DQ12 4,9 VDD5
4,9 M_B_BA0 150 50 118
BA0 DQ16 M_B_DQ21 4,9 VDD4
4,9 M_B_BA1 145 49 117
BA1 DQ17 M_B_DQ20 4,9 VDD3
62 112
JDIMM3 = CHB DIMM0 010
4,9 M_B_A0 144
133 A0
DQ18
DQ19
63
46
M_B_DQ22
M_B_DQ19
4,9
4,9 BOT 111 VDD2
VDD1
4,9 M_B_A1 A1 DQ20 M_B_DQ16 4,9
4,9 M_B_A2 132 45 GND1
A2 DQ21 M_B_DQ17 4,9 MT1
4,9 M_B_A3 131 58 GND2
A3 DQ22 M_B_DQ23 4,9 MT2
128 59

B.Schematic Diagrams
4,9
4,9
M_B_A4
M_B_A5 126 A4
A5
DQ23
DQ24
70 M_B_DQ18
M_B_DQ28
4,9
4,9 TOP VDDQ
4,9
4,9
M_B_A6
M_B_A7
127
122 A6 DQ25
71
83
M_B_DQ25
M_B_DQ30
4,9
4,9
JDIMM2 = CHA DIMM1 001 251
247 VSS VSS
252
248 PLACE CLOSE TO SODIMM
125 A7 DQ26 84 243 VSS VSS 244
4,9 M_B_A8 A8 DQ27 M_B_DQ27 4,9 VSS VSS
121 66 239 238
4,9 M_B_A9 A9 DQ28 M_B_DQ29 4,9 VSS VSS
146 67 235 234
4,9 M_B_A10
120 A10_AP DQ29 79
M_B_DQ24 4,9 JDIMM4 = CHB DIMM1 011 231 VSS VSS 230 C700 C702 C698 C856
4,9 M_B_A11 A11 DQ30 M_B_DQ26 4,9 VSS VSS
4,9 M_B_A12 119 80 227 226
M_B_DQ31 4,9
4,9
4,9
4,9
M_B_A13
M_B_A14
M_B_A15
158
151
156
152
A12
A13
A14_WE*
A15_CAS*
DQ31
DQ32
DQ33
DQ34
174
173
187
186
M_B_DQ36
M_B_DQ32
M_B_DQ38
4,9
4,9
4,9
223
217
213
209
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
222
218
214
210
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
Sheet 10 of 62
4,9 M_B_A16 A16_RAS* DQ35 M_B_DQ39 4,9 VSS VSS

DDR4 CHB SO-


VDDQ
DQ36
170
169
M_B_DQ33
M_B_DQ37
4,9
4,9
PLACE CLOSE TO SODIMM 205
201 VSS VSS
206
202
114 DQ37 183 197 VSS VSS 196 C697 C696 C695 C739
4,9 M_B_ACT# ACT* DQ38 M_B_DQ35 4,9 VSS VSS
C 182 DIMM1_CHB_EVENT# R924 240_1%_04 193 192 C
DQ39 M_B_DQ34 4,9 VSS VSS

DIMM _1
4,9 DDR1_B_PARITY 143 195 189 188 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
PARITY DQ40 M_B_DQ41 4,9 VSS VSS
116 194 185 184
4,9 DDR1_B_ALERT# ALERT* DQ41 M_B_DQ45 4,9 VSS VSS
DIMM1_CHB_EVENT# 134 207 181 180
EVENT* DQ42 M_B_DQ46 4,9 VSS VSS
18,7,8,9 DDR4_DRAMRST#
108 208 D02  CHB 011 175 176
RESET* DQ43 M_B_DQ43 4,9 VSS VSS VDDQ
191  171 172
DQ44 M_B_DQ40 4,9 VSS VSS
9 VREFCA_CHB_DIMM 164 190 5/5 167 168
VREFCA DQ45 M_B_DQ44 4,9 VSS VSS
203 107 106
DQ46 M_B_DQ42 4,9 VSS VSS
254 204 103 102
16,7,8,9 SMB_DATA_MAIN SDA DQ47 M_B_DQ47 4,9 VSS VSS
253 216 99 98
16,7,8,9 SMB_CLK_MAIN SCL DQ48 M_B_DQ49 4,9 VSS VSS
215 93 94
DQ49 M_B_DQ48 4,9 VSS VSS
SA2_CHB_DIM1 166 228 89 90 C884 C885 C265 C886
SA2 DQ50 M_B_DQ51 4,9 VSS VSS
R285 0_04 SA1_CHB_DIM1 260 229 85 86
SA1 DQ51 M_B_DQ50 4,9 VSS VSS
3.3VS R284 0_04 SA0_CHB_DIM1 256 211 81 82 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
SA0 DQ52 M_B_DQ52 4,9 VSS VSS
212 77 78
DQ53 M_B_DQ53 4,9 VSS VSS
224 73 72
DQ54 M_B_DQ55 4,9 VSS VSS
225 69 68
DQ55 M_B_DQ54 4,9 VSS VSS
92 237 65 64
CB0_NC DQ56 M_B_DQ61 4,9 VSS VSS
91 236 VREFCA_CHB_DIMM PLACE THE CAP CLOSE TO SODIMM 61 60
CB1_NC DQ57 M_B_DQ60 4,9 VSS VSS
101 249 57 56 C889 C890 C892 C891
CB2_NC DQ58 M_B_DQ59 4,9 VSS VSS
105 250 51 52
CB3_NC DQ59 M_B_DQ62 4,9 VSS VSS
88 232 C263 C903 47 48 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
CB4_NC DQ60 M_B_DQ56 4,9 VSS VSS
87 233 43 44
CB5_NC DQ61 M_B_DQ57 4,9 VSS VSS
100 245 0.1u_16V_X7R_04 *2.2u_10V_X5R_04 39 40
CB6_NC DQ62 M_B_DQ63 4,9 VSS VSS
104 246 35 36
CB7_NC DQ63 M_B_DQ58 4,9 VSS VSS 2.5V
31 30
12 13 27 VSS VSS 26
VDDQ DM0*/DBI0* DQS0_T M_B_DQS0 4,9 VSS VSS
33 34 23 22
DM1*/DBI1* DQS1_T M_B_DQS1 4,9 VSS VSS
54 55 19 18
B DM2*/DBI2* DQS2_T M_B_DQS2 4,9 VSS VSS B
75 76 15 14
DM3*/DBI3* DQS3_T M_B_DQS3 4,9 VSS VSS
178 179 9 10 C385 C384 C364 C365
DM4*/DBI4* DQS4_T M_B_DQS4 4,9 VSS VSS
199 200 5 6
DM5*/DBI5* DQS5_T M_B_DQS5 4,9 VSS VSS
220 221 PLACE THE CAP WITHIN 200 MILS 1 2 10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DM6*/DBI6* DQS6_T M_B_DQS6 4,9 VSS VSS
241 242
M_B_DQS7 4,9 FROM THE SODIMM-1
96 DM7*/DBI7* DQS7_T 97
DM8*/DBI8* DQS8_T DDR4_DRAMRST#
11
DQS0_C M_B_DQS#0 4,9 D4AR0-26001-1P40 VTT_MEM
32 C736
DQS1_C M_B_DQS#1 4,9
53
DQS2_C M_B_DQS#2 4,9
74 *0.1u_10V_X7R_04
DQS3_C M_B_DQS#3 4,9
177
DQS4_C M_B_DQS#4 4,9
198 C320 C301 C284
DQS5_C M_B_DQS#5 4,9
219
D02 06
DQS6_C M_B_DQS#6 4,9
240 6/15 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04
DQS7_C M_B_DQS#7 4,9 4/30
95
162 DQS8_C
165 S2*/C0
S3*/C1

D4AR0-26001-1P40
D02 ,VIA
5/8

A A

   !!DMFWP!DP/
Title
47,7,8,9 2.5V
[10] DDR4 CHB SO-DIMM_1
18,44,5,7,8,9 VDDQ
44,7,8,9 VTT_MEM Size Document Number Rev
11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 10 of 62


5 4 3 2 1

DDR4 CHB SO-DIMM_1 B - 11


Schematic Diagrams

Panel, Inverter, CRT

5 4 3 2 1

PANEL CONNECTOR (For coaxial cable) PANEL POWER


PLVDD J9
2A 1
2
J_LCD1
1
2
LVDS 2
*OPEN_2A
1

EVEN --> U 3
LVDS

C8 ODD --> L 4 3 Q39A
1u_6.3V_X5R_04
1A 5 4 VIN MTS3572G6 VLED
3.3VS 5
D02 6
7 6 4 3
4/30 15 LVDS-U0N 7 S2 D2
D 8 D
15 LVDS-U0P 8
9 C597 C598

G2
Q4 10 9 C593
MTN7002ZHS3 15 LVDS-U1N 10

0.1u_50V_Y5V_06

0.1u_50V_Y5V_06
11 GND5 0.22u_50V_Y5V_06
15 LVDS-U1P

5
D S FRAME_LOCK#_R 12 11 GND5 GND4
15 FRAME_LOCK# 12 GND4
CABLE  15 LVDS-U2N
13
13 GND3
GND3 R578
14 GND2 4.7K_06
15 LVDS-U2P 14 GND2
R661 15 GND1 R576 07/27 Follow %change

G
R13 *10K_04 16 15 GND1
3.3VS 15 LVDS-UCLKN 16
*0_04 17 R575 150K_1%_04
15 LVDS-UCLKP 17
VGA_ENAVDD 18 100K_04
B.Schematic Diagrams

3.3VS 19 18
15 LVDS-L0N 20 19
15 LVDS-L0P 21 20
22 21 R577 3.3V
15 LVDS-L1N 22
23
15 LVDS-L1P 23
R542 R543 24 100K_04
25 24
15 LVDS-L2N

6
*2.2K_04 *2.2K_04 26 25 R567
15 LVDS-L2P 26
27 Q39B

D1
27

Sheet 11 of 62 15
15
LVDS_DDC_CLK
LVDS_DDC_DATA
28
29 28 VGA_ENAVDD
MTS3572G6
1
10K_04

6
30 29 G1 D

S1
31 30 5VS J6 Q40A
15 LVDS-LCLKN 31

Panel, Inverter,
32 LVDD_EN# 2G MTDK5S6R

2
15 LVDS-LCLKP 33 32 1 2
PANEL_VCC_EN S

1
3
BRIGHTNESS_R 34 33 D
INV_BLON 35 34 3mm Q40B
36 35 5G 07/27 Follow %change

CRT
VLED HPD_L MTDK5S6R
C 37 36 3.3VS J1 S C
2A

4
38 37
39 38 1 2
40 39
40 PLVDD
R581 C596 C594 default 3mm
U2
*LVDFH-04008-TP00+ DEFAULT 2A >80 mil
*4.7K_06 0.01u_50V_X7R_04 0.1u_50V_Y5V_06 PCB Footprint = lvdfh-04008-tp 5 1
VIN VOUT
R559 *0_04 C5 4
LVDS_HPD 15 VIN/SS
1u_6.3V_X5R_04 C7 C14 R507
3 2
EN GND *1u_6.3V_X5R_04 10u_6.3V_X5R_06 *100K_04
3.3V Brightness  up7553
 R20 *10K_04
PLVDD
R10
C VGA_ENAVDD 6-02-07553-9C0
15 VGA_ENAVDD
AC BRIGHTNESS_R BRIGHTNESS_R R540 10mil_short_04 100K_04
VGA_BKLPWM 15
C58 A 3A,2nd source !"#$
C63
*0.1u_16V_Y5V_04 D8
*BAV99 RECTIFIER*0.1u_16V_Y5V_04

1/30

PLVDD

D02 04
3.3VS
PLVDD
2A 1
2
J_EDP1

1
eDP
C
A

R39 3 2
4/30
EDP

B 4 3 B
L4 R55 *1K_04 R44
1A 5 4
3.3VS 5
HCB1005KF-121T20 1K_04 0_04 6
AC

HPD_L 7 6 3.3V
. EDP_HPD 15 7
D9 8
*BAV99 RECTIFIER 9 8
C55 C54 R58 10 9 3.3V
11 10 GND5 R51 100K_04
*10u_6.3V_X5R_06 0.1u_16V_Y5V_04 *100K_1%_04 FRAME_LOCK#_R 12 11 GND5 GND4 U5C

14
13 12 GND4 GND3 74LVC08APW U5B

14
14 13 GND3 GND2 9 74LVC08APW
14 GND2 31 BKL_EN
15 GND1 8 BLON1 4
16 15 GND1 10 6 3.3V
16 15 VGA_BKLTEN
17 5
18 17 R52 *100K_04

7
C45 0.1u_10V_X7R_04 DRX0# 19 18 U5A

14
15 DP_TXN0

7
C44 0.1u_10V_X7R_04 DRX0 20 19 74LVC08APW
15 DP_TXP0 20
21 BLON2 1
C43 0.1u_10V_X7R_04 DRX1# 22 21 3 INV_BLON
15 DP_TXN1 22 16 SB_BLON
C42 0.1u_10V_X7R_04 DRX1 23 LID_SW#1 2
15 DP_TXP1 23 3.3V
24 R45 *100K_04
C41 0.1u_10V_X7R_04 DRX2# 25 24 U5D R46

14
15 DP_TXN2

7
C40 0.1u_10V_X7R_04 DRX2 26 25 74LVC08APW C53
15 DP_TXP2 26
27 12 100K_04 0.1u_10V_X7R_04
27 31,34 LID_SW#
C39 0.1u_10V_X7R_04 DRX3# 28 11
15 DP_TXN3 28
C38 0.1u_10V_X7R_04 DRX3 29 13
15 DP_TXP3 29 21,31 ALL_SYS_PWRGD
30
C36 0.1u_10V_X7R_04 DAUX# 31 30
15 DP_AUX#

7
C37 0.1u_10V_X7R_04 DAUX 32 31
A 15 DP_AUX 32 A
PANEL_VCC_EN 33
R38 *100K_04 BRIGHTNESS_R 34 33
R37 *100K_04 INV_BLON 35 34
3.3VS 35
   !!DMFWP!DP/
HPD_L 36
37 36
38 37
39 38 Title
VLED 40 39
40
[11] PANEL,INVERTER,CRT
15,27,29,31,43,44,45,46,47,48,49,50,51 VIN
LVDFH-04008-TP00+ Size Document Number Rev
PCB Footprint = lvdfh-04008-tp
13,14,15,16,27,29,30,31,33,35,46,47
17,2,24,25,30,39,42,43,44,46,47
5VS
3.3V A3 SCHEMATIC1 6-71-P75D0-D03 2.0
10,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS
Date: Monday, August 03, 2015 Sheet 11 of 62

5 4 3 2 1

B - 12 Panel, Inverter, CRT


Schematic Diagrams

Display Port A

5 4 3 2 1

DISPLAY PORT A
3.3VS_FUSE
U3
3.3VS 3 1
OC# VOUT
5 C9
VIN
D 4 2 10u_6.3V_X5R_06 D
14,15,44,46 SUSB EN# GND
C25
UP7549UMA5-20
*10u_6.3V_X5R_06 PCB Footprint = M-SOT23-5A

D02 04
4/30
L2

B.Schematic Diagrams
HCB1005KF-121T20
R26 1K_04 DPA_DHPD_R
37 DP_A_HPD .

AC
C15
R22 D32 3.3VS_FUSE
BAV99 RECTIFIER 220p_50V_NPO_04 COMMON SHIELD6 GND4 3.3VS_FUSE
SHIELD5 GND3

3
*100K_1%_04 3.3VS
PLEASE CLOSE TO CONNECTOR D33

Sheet 12 of 62

C
3.3VS_FUSE BAT54CW(lision)
20
PWR 20
PWR_RET 19 R25

1 A

2 A
19
18 HPD
Close to Display PORT
37 DP_A#3
LP5
R528
1
0_04
2
C542 0.1u_10V_X7R_04 D_DP_A#3
37
37
OUT1_AUXn_SDA
OUT1_AUXp_SCL
17
15
AUXN
AUXP
18

16
17

15
GND 16
*100K_04
Display Port A
4 3 C543 0.1u_10V_X7R_04 D_DP_A3 CEC 14 G_DPA_CEC
37 DP_A3 14
*DVI2012F2SF-900T05_08 MODE 13 G_DPA_MODE
13 G_DPA_MODE 37
C R529 0_04 D_DP_A#3J 12 LANE_3N
12
C
D_DP_A3J 10 LANE_3P
11
GND 11
R530 0_04 10
LP6 1 2 D_DP_A#2J 9 LANE_2N R21
37 DP_A#2 9
C544 0.1u_10V_X7R_04 D_DP_A#2 D_DP_A2J 7 LANE_2P 8
GND 8
4 3 C545 0.1u_10V_X7R_04 D_DP_A2 1M_04
37 DP_A2 7
*DVI2012F2SF-900T05_08 D_DP_A#1J 6 LANE_1N
6
R531 0_04 D_DP_A1J 4 PIN_TEXT = LANE_1P
5
GND 5
4
R532 0_04 D_DP_A#0J 3 LANE_0N
3
LP7 1 2 D_DP_A0J 1 LANE_0P GND 2
37 DP_A#1 2
C546 0.1u_10V_X7R_04 D_DP_A#1 1
4 3 C547 0.1u_10V_X7R_04 D_DP_A1
37 DP_A1
*DVI2012F2SF-900T05_08
R533 0_04
J_DP1 SHIELD2 GND2
R534 0_04 SHIELD1 GND1
LP8 1 2 3V11211-SBAHH-8H
37 DP_A#0
C548 0.1u_10V_X7R_04 D_DP_A#0
4 3 C549 0.1u_10V_X7R_04 D_DP_A0 USB ESD &'(
,NET 'SWITCH
37 DP_A0
*DVI2012F2SF-900T05_08
R535 0_04 D34

D_DP_A#3 6 5 D_DP_A#3J
D_DP_A3 7 4 D_DP_A3J
8 3
D_DP_A#2 9 2 D_DP_A#2J
inductor for EMI D_DP_A2 10 1 D_DP_A2J
B B
PUSB3F96

D35

D_DP_A#1 6 5 D_DP_A#1J
D_DP_A1 7 4 D_DP_A1J
8 3
D_DP_A#0 9 2 D_DP_A#0J
D_DP_A0 10 1 D_DP_A0J

PUSB3F96

A A

   !!DMFWP!DP/
Title
[12] DISPLAY PORTA
10,11,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS Size Document Number Rev
11,13,14,15,16,27,29,30,31,33,35,46,47
13
5VS
3.3VS_FUSE A3
6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 12 of 62


5 4 3 2 1

Display Port A B - 13
Schematic Diagrams

Display Port B

5 4 3 2 1

DISPLAY PORT B
PLEASE CLOSE TO CONNECTOR D02 04
4/30
L1
HCB1005KF-121T20
D R6 1K_04 DPB_DHPD_R D
15 DP_B_HPD .

AC
C6
R1 D7 3.3VS_FUSE
BAV99 RECTIFIER 220p_50V_NPO_04 COMMON SHIELD6 GND4 3.3VS_FUSE
*100K_1%_04 SHIELD5 GND3

3
3.3VS
D31

C
BAT54CW(lision)
3.3VS_FUSE 20
PWR 20
PWR_RET 19 R23

A
19
B.Schematic Diagrams

18 HPD

2
18

17
*100K_04
DPB_AUX#_R 17 AUXN
16
GND 16
DPB_AUX_R 15
R34 0_04 Close to Display PORT AUXP
14
15
CEC 14 G_DPB_CEC
LP4 4 3 MODE 13 G_DPB_MODE
15 DP_B#3 13
C24 0.1u_10V_X7R_04 D_DP_B#3 D_DP_B#3J 12 LANE_3N
12
1 2 C23 0.1u_10V_X7R_04 D_DP_B3 D_DP_B3J 10 LANE_3P GND 11
15 DP_B3 11
*DVI2012F2SF-900T05_08 10
R33 0_04 D_DP_B#2J 9 R521

Sheet 13 of 62
LANE_2N 9
D_DP_B2J 7 LANE_2P 8
GND 8
R32 0_04 7
1M_04
LP3 4 3 D_DP_B#1J 6 LANE_1N
15 DP_B#2 6
C22 0.1u_10V_X7R_04 D_DP_B#2 D_DP_B1J 4 PIN_TEXT = LANE_1P GND 5

Display Port B 15 DP_B2


1
*DVI2012F2SF-900T05_08
R31
2

0_04
C21 0.1u_10V_X7R_04 D_DP_B2
D_DP_B#0J
D_DP_B0J
3
1
LANE_0N
LANE_0P
4

2
5

3
GND 2
1
C R30 0_04 C
LP2 4 3
15 DP_B#1
C19 0.1u_10V_X7R_04 D_DP_B#1
1 2 C18 0.1u_10V_X7R_04 D_DP_B1 J_DP2 SHIELD2 GND2
15 DP_B1
*DVI2012F2SF-900T05_08 SHIELD1 GND1
R29 0_04 3V11211-SBAHH-8H

R28 0_04
LP1 4 3
15 DP_B#0
C17 0.1u_10V_X7R_04 D_DP_B#0
1 2 C16 0.1u_10V_X7R_04 D_DP_B0
15 DP_B0
*DVI2012F2SF-900T05_08
R27 0_04

inductor for EMI

07/27 Follow %change USB ESD &'(


,NET 'SWITCH

D6
B C20 B
G2

5 3.3VS D_DP_B#3J 6 5 D_DP_B#3


G
0.01u_16V_X7R_04 D_DP_B3J 7 4 D_DP_B3
6 1 4 3 8 3
D_DP_B#2J 9 2 D_DP_B#2
S

R525 D_DP_B2J 10 1 D_DP_B2


D

Q7A Q7B
MTDK5S6R MTDK5S6R 100K_1%_04
PUSB3F96
C540 0.1u_10V_X7R_04 DPB_AUX#_R
15 DP_B_AUX#
D5

R36 5VS D_DP_B#1J 6 5 D_DP_B#1


D_DP_B1J 7 4 D_DP_B1
*100K_1%_04 8 3
D_DP_B#0J 9 2 D_DP_B#0
R527 5VS D_DP_B0J 10 1 D_DP_B0
C539
G2

10K_04
G

0.01u_16V_X7R_04 PUSB3F96
6 1 4 3 R524

6
S

D 10K_04
D

Q6A Q6B Q35A


MTDK5S6R MTDK5S6R MTDK5S6R G2
S

3
C541 0.1u_10V_X7R_04 DPB_AUX_R D
15 DP_B_AUX
Q35B
A
MTDK5S6R G5 G_DPB_MODE A
R35 R526 S

4
*100K_1%_04 100K_1%_04 07/27 Follow %change

   !!DMFWP!DP/
Title
[13] DISPLAY PORTB
12
3.3VS_FUSE Size Document Number Rev
10,11,12,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
11,14,15,16,27,29,30,31,33,35,46,47
3.3VS
5VS A3
6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 13 of 62


5 4 3 2 1

B - 14 Display Port B
Schematic Diagrams

HDMI

5
HDMI CONNECTOR 4 3 2 1
R2
D02 04
D2
*0.5_1%_04 4/30 FOR NV
A C R7 L25 HDMI_5VS_A
HCB1005KF-121T20
*RB551V-30S2 *0.5_1%_04 R505 1K_04 HDMI_HPD-C
For ESD
.
C505

C
A

A
HDMI_5VS 220p_50V_NPO_04

D 5VS 3
U1

OC# VOUT
1 J_HDMI1 D
D4 D3 D28

AC

AC

AC
22u_6.3V_X5R_08

22u_6.3V_X5R_08
5 C3 C4 BAV99 RECTIFIER
BAV99 RECTIFIER
BAV99 RECTIFIER
VIN
4 2
12,15,44,46 SUSB EN# GND 19 HDMI_HPD-E HDMI_SCL-C
uP7549UMA5-20 18 HOT PLUG DETECT
PCB Footprint = M-SOT23-5A +5V 17 HDMI_SDA-C
HDMI_SDA-C 16 DDC/CEC GND
SDA 15 HDMI_SCL-C HDMI_HPD-C
14 SCL
RESERVED

B.Schematic Diagrams
R14 499_1%_04 13 HDMI_CEC
TMDS_CLOCK#-R TMDS_CLOCK#J R952 6.04_1%_04 TMDS_CLOCK#R 12 CEC
TMDS CLOCK- 11
TMDS_CLOCK-R TMDS_CLOCKJ R953 6.04_1%_04 TMDS_CLOCKR 10 CLK SHIELD R16 499_1%_04
R15 499_1%_04 TMDS CLOCK+ 9 TMDS_DATA0#L R954 6.04_1%_04 TMDS_DATA0#J TMDS_DATA0#-R
8 TMDS DATA0-
R520 499_1%_04 SHIELD0 7 TMDS_DATA0L R955 6.04_1%_04 TMDS_DATA0J TMDS_DATA0-R
TMDS_DATA1#-R TMDS_DATA1#J R956 6.04_1%_04 TMDS_DATA1#R 6 TMDS DATA0+ R17 499_1%_04
TMDS DATA1- 5
TMDS_DATA1-R
R519 499_1%_04
TMDS_DATA1J R957 6.04_1%_04 TMDS_DATA1R 4

2
TMDS DATA1+
SHIELD1

TMDS DATA2-
3 TMDS_DATA2#L R958 6.04_1%_04 TMDS_DATA2#J
R511 499_1%_04
TMDS_DATA2#-R Sheet 14 of 62
SHIELD2 1 TMDS_DATA2L R959 6.04_1%_04 TMDS_DATA2J TMDS_DATA2-R

D02EMI common choke0


D02 ./6_1%_04
5/4
TMDS DATA2+ R510 499_1%_04
HDMI

GND
GND
GND
GND
GND_HDMI
5/19 D02 ./6_1%_04
D

5VS
C 116E-1C001-20Y
5/4
D02EMI common choke0 GND_HDMI C

GND1
GND2
GND3
GND4
G 5/19
P/N = 6-21-13K20-019
S

Q5 PIN GND1~4=GND
MTN7002ZHS3 R24
6-15-70023-7B0
1M_04

HDMI_5VS 5VS
A

R8
0_04 D1
*RB551V-30S2 USB ESD &'(
,NET 'SWITCH

D29
C

3.3VS HDMI_5VS_A
TMDS_CLOCK#-R 6 5 TMDS_CLOCK#J
TMDS_CLOCK-R 7 4 TMDS_CLOCKJ
8 3
R12 R19 BY PLATEFORM *+,- TMDS_DATA0#-R 9 2 TMDS_DATA0#J
R3 R9 2015/4/7 TMDS_DATA0-R 10 1 TMDS_DATA0J
8.2K_04 8.2K_04
G

10K_04 10K_04
PUSB3F96
S D R11 33_04 HDMI_SDA-C
15 HDMI_CTRLDATA
D30
G

Q1
B S D
MTN7002ZHS3
R18 33_04 HDMI_SCL-C
3.3VS TMDS_DATA1#-R
TMDS_DATA1-R
6
7
5
4
TMDS_DATA1#J
TMDS_DATA1J
B
15 HDMI_CTRLCLK
8 3
SCL/SDA &PULL HIGH (CHECK PCH)) Q2 FOR NV TMDS_DATA2#-R 9 2 TMDS_DATA2#J
MTN7002ZHS3 TMDS_DATA2-R 10 1 TMDS_DATA2J
R501

1M_04 PUSB3F96
G

S D HDMI_HPD-C
15 HDMI_HPD
C28 0.1u_10V_X7R_04 TMDS_DATA2-R Q33
15 HDMI_DATA0P
C29 0.1u_10V_X7R_04 TMDS_DATA2#-R MTN7002ZHS3
15 HDMI_DATA0N
R502
C26 0.1u_10V_X7R_04 TMDS_DATA1-R
15 HDMI_DATA1P
C27 0.1u_10V_X7R_04 TMDS_DATA1#-R *100K_04
15 HDMI_DATA1N
C13 0.1u_10V_X7R_04 TMDS_DATA0-R
15 HDMI_DATA2P
C12 0.1u_10V_X7R_04 TMDS_DATA0#-R
15 HDMI_DATA2N
C11 0.1u_10V_X7R_04 TMDS_CLOCK-R
15 HDMI_CLOCKP
C10 0.1u_10V_X7R_04 TMDS_CLOCK#-R
15 HDMI_CLOCKN
    BY PLATFROM 

A A
   !!DMFWP!DP/
Title
[14] HDMI
Size Document Number Rev
10,11,12,13,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS
11,13,15,16,27,29,30,31,33,35,46,47 5VS A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 14 of 62

5 4 3 2 1

HDMI B - 15
Schematic Diagrams

MXM PCI-E
5 4 3 2 1

3.3VS

PWR_SRC PWR_SRC

MXM 3.0 E1-1


E1-2
J_MXM1A
PWR_SRC PWR_SRC
E2-1
E2-2 R506 J_MXM1B
3.3VS

E1-3 PWR_SRC PWR_SRC E2-3 153 154


PWR_SRC PWR_SRC 19 CLK_PCIE_MXM# PEX_REFCLK# CLK_REQ#
E1-4 E2-4 10K_04 155 156 R48 *10mil_short MXM_RST# C52 *0.1u_16V_Y5V_04
PWR_SRC(10A)--7-20V E1-5 PWR_SRC PWR_SRC E2-5
19 CLK_PCIE_MXM
157 PEX_REFCLK PEX_RST# 158

5
E1-6 PWR_SRC PWR_SRC E2-6 159 GND VGA_DDC_DAT 160
5VRUN(2.5A)--5V E1-7 PWR_SRC PWR_SRC E2-7 161 RSVD VGA_DDC_CLK 162 R47 1 PLT_RST# 16,42
E1-8 PWR_SRC PWR_SRC E2-8 163 RSVD VGA_VSYNC 164 4
3VRUN(1A)--3.3V E1-9 PWR_SRC PWR_SRC E2-9 PCH CONTROL 165 RSVD VGA_HSYNC 166 100K_04 2

D
D E1-10 PWR_SRC PWR_SRC E2-10 R5 *0_04 167 RSVD GND 168 D

E3-1 PWR_SRC PWR_SRC E4-1 19 GPU_PWR_EN# 169 RSVD VGA_RED 170


11 LVDS-UCLKN

3
E3-2 GND GND E4-2 DGPU_PWR_EN# R4 *0_04 G 171 LVDS_UCLK# VGA_GREEN 172
11 LVDS-UCLKP
! " #  E3-1 / E3-3 GND GND E4-3 Q3 173 LVDS_UCLK VGA_BLUE 174 U4
EC CONTROL

S
E3-4 GND GND E4-4 *MTN7002ZHS3 175 GND GND 176 *MC74VHC1G08DFT2G
E4-1$ GND,% & PIN E3-5
E3-6
GND
GND
GND
GND
E4-5
E4-6
177
179
LVDS_UTX3#
LVDS_UTX3
LVDS_LCLK#
LVDS_LCLK
178
180
LVDS-LCLKN
LVDS-LCLKP
11
11
R49 0_04
E3-7 GND GND E4-7 181 GND GND 182
GND GND 11 LVDS-U2N LVDS_UTX2# LVDS_LTX3#
5V_RUN E3-8 E4-8 R512 47K_04 R515 183 184
GND GND 3V3_RUN 11 LVDS-U2P LVDS_UTX2 LVDS_LTX3
H40 H41 E3-9 E4-9 *10mil_short 185 186
E3-10 GND GND E4-10 187 GND GND 188

MXM 3.0 MODULE BOARD CONNECTOR


H6_0B4_0D4_0 H6_0B4_0D4_0
GND GND DGPU_PRSNT# 19 11 LVDS-U1N LVDS_UTX1# LVDS_LTX2# LVDS-L2N 11
1 2 189 190 EC CONTROL
11 LVDS-U1P LVDS-L2P 11

MXM 3.0 MODULE BOARD CONNECTOR


3 5V PRSNT_R# 4 R514 *0_04 191 LVDS_UTX1 LVDS_LTX2 192
5V WAKE# DGPU_PWRGD 17,31 GND GND
5 6 DGPU_PWRGD_VGA R513 10K_04 193 194 R53 *0_04 DGPU_RST# 31
5V PWR_GOOD 3V3_RUN 11 LVDS-U0N LVDS_UTX0# LVDS_LTX1# LVDS-L1N 11
7 8 MXM_PWR_EN 195 196
5V PWR_EN 11 LVDS-U0P LVDS_UTX0 LVDS_LTX1 LVDS-L1P 11
9 10 R560 10K_04 197 198
5V RSVD 3.3VS GND GND

Display Port C (HDMI)


11 12 C516 *10u_6.3V_X5R_06 199 200 R50 *0_04 DGPU_RST#_PCH 19
B.Schematic Diagrams

G
13 GND RSVD 14 5V_RUN 14 HDMI_DATA0N 201 DP_C_L0# LVDS_LTX0# 202 LVDS-L0N 11
15 GND RSVD 16 14 HDMI_DATA0P 203 DP_C_L0 LVDS_LTX0 204 LVDS-L0P 11
3.3VS R537 *100K_1%_04 HDMI_CEC_MXM Q36 PCH CONTROL
GND RSVD GND GND

Display Port D (eDP)


17 18 S D MTN7002ZHS3 205 206
GND PWR_LEVEL 14 HDMI_DATA1N DP_C_L1# DP_D_L0# DP_TXN0 11
R536 0_04 PEX_STD_SW#1 19 20 207 208
PEX_STD_SW# TH_OVERT# 14 HDMI_DATA1P DP_C_L1 DP_D_L0 DP_TXP0 11
R539 *0_04 MXM_VGA_DISABLE# 21 22 TH_OVERT#1 R516 100K_1%_04 209 210
23 VGA_DISABLE# TH_ALERT# 24 TH_ALERT#1 R517 100K_1%_04 211 GND GND 212
11 VGA_ENAVDD PNL_PWR_EN TH_PWM 3.3VS 14 HDMI_DATA2N DP_C_L2# DP_D_L1# DP_TXN1 11
25 26 213 214
11 VGA_BKLTEN PNL_BL_EN GPIO0 TH_ALERT#1 31 14 HDMI_DATA2P DP_C_L2 DP_D_L1 DP_TXP1 11
11 VGA_BKLPWM 27 28 215 216
R541 100K_1%_04 HDMI_CEC_MXM29 PNL_BL_PWM GPIO1 30 217 GND GND 218
3.3VS HDMI_CEC GPIO2 14 HDMI_CLOCKN DP_C_L3# DP_D_L2# DP_TXN2 11
31 32 SMD_VGA_THERM_R R508 100K_1%_04 219 220
11 LVDS_HPD 3.3VS 14 HDMI_CLOCKP DP_TXP2 11

Sheet 15 of 62 33 DVI_HPD SMB_DAT 34 SMC_VGA_THERM_R R509 100K_1%_04 221 DP_C_L3 DP_D_L2 222
11 LVDS_DDC_DATA 35 LVDS_DDC_DAT SMB_CLK 36 223 GND GND 224
C
11
3.3VS LVDS_DDC_CLK 37 LVDS_DDC_CLK GND 38 14 HDMI_CTRLDATA 225 DP_C_AUX# DP_D_L3# 226 DP_TXN3 11 C

39 GND OEM 40 14 HDMI_CTRLCLK 227 DP_C_AUX DP_D_L3 228 DP_TXP3 11


R550 4.3K_1%_04
41 OEM OEM 42 GPU_EVENT# 229 RSVD GND 230

MXM PCI-e
R538 4.3K_1%_04 R518 *0_04 GPU_EVENT#_R 17
43 OEM OEM 44 231 RSVD DP_D_AUX# 232 DP_AUX# 11
R551 *0_04 GC6_FB_EN
45 OEM OEM 46 FOR G-SYNC 3.3VS 233 RSVD DP_D_AUX 234 DP_AUX 11
11 FRAME_LOCK# 47 OEM GND 48 235 RSVD DP_C_HPD 236 HDMI_HPD 14
GND PEX_TX15# PEG_TX#15 2 RSVD DP_D_HPD EDP_HPD 11
49 50 PEG_TX15 2 237 238
2 PEG_RX#15

5
51 PEX_RX15# PEX_TX15 52 U38 239 RSVD RSVD 240 R523 *0_04
2 PEG_RX15 PEX_RX15 GND RSVD RSVD 3V3_RUN
53 54 1 241 242 R522 *0_04
GND PEX_TX14# PEG_TX#14 2 AC/BATL# 51 RSVD RSVD
55 56 PEG_TX14 2 4 243 244
2 PEG_RX#14 PEX_RX14# PEX_TX14 RSVD GND
3V3_RUN

Display Port B (DP)


57 58 2 245 246
2 PEG_RX14 PEX_RX14 GND VGA_THROTTLE 31 RSVD DP_B_L0# DP_B#0 13
GC6_FB_EN_R 59 60 247 248
GND PEX_TX13# PEG_TX#13 2 RSVD DP_B_L0 DP_B0 13
61 62 PEG_TX13 2 74AHC1G32GW 249 250
2 PEG_RX#13

3
63 PEX_RX13# PEX_TX13 64 251 RSVD GND 252 3.3VS 3V3_RUN
2 PEG_RX13 PEX_RX13 GND GND DP_B_L1# DP_B#1 13

Display Port A (DP)


65 66 253 254 J8
GND PEX_TX12# PEG_TX#12 2 37 MUX_0N DP_A_L0# DP_B_L1 DP_B1 13
67 68 255 256 *OPEN-2mm
2 PEG_RX#12
69 PEX_RX12# PEX_TX12 70
PEG_TX12 2 37 MUX_0P 257 DP_A_L0 GND 258 2A 1 2 2A
2 PEG_RX12 PEX_RX12 GND GND DP_B_L2# DP_B#2 13
71 72 259 260
GND PEX_TX11# PEG_TX#11 2 37 MUX_1N DP_A_L1# DP_B_L2 DP_B2 13
2 PEG_RX#11
73
PEX_RX11# PEX_TX11
74 PEG_TX11 2 37 MUX_1P
261
DP_A_L1 GND
262 DEFAULT
75 76 263 264
2 PEG_RX11 PEX_RX11 GND GND DP_B_L3# DP_B#3 13
77 78 5V_RUN 265 266
GND PEX_TX10# PEG_TX#10 2 37 MUX_2N DP_A_L2# DP_B_L3 DP_B3 13
79 80 PEG_TX10 2 267 268
2
2
PEG_RX#10
PEG_RX10
81
83
85
PEX_RX10#
PEX_RX10
GND
PEX_TX10
GND
PEX_TX9#
82
84
86
PEG_TX#9 2
C557 C552
37

37
MUX_2P

MUX_3N
269
271
273
DP_A_L2
GND
DP_A_L3#
GND
DP_B_AUX#
DP_B_AUX
270
272
274
DP_B_AUX#
DP_B_AUX
13
13
5VS
5V_RUN 5V_RUN
2 PEG_RX#9 PEX_RX9# PEX_TX9 PEG_TX9 2 37 MUX_3P DP_A_L3 DP_B_HPD DP_B_HPD 13
87 88 275 276 J7
2 PEG_RX9 PEX_RX9 GND GND DP_A_HPD MUX_HPD 37
89 90 22u_6.3V_X5R_08 *22u_6.3V_X5R_08 277 278 *OPEN-3mm
2 PEG_RX#8
91
93
GND
PEX_RX8#
PEX_TX8#
PEX_TX8
92
94
PEG_TX#8
PEG_TX8 2
2 37
37
MUX_AUXN_DDC_SDA
MUX_AUXP_DDC_SCL
279
281
DP_A_AUX#
DP_A_AUX
3V3
3V3
280
3V3_RUN
3A 1 2 3A
2 PEG_RX8 PEX_RX8 GND PRSNT_L#
B 95
GND PEX_TX7#
96
PEG_TX#7 2 DEFAULT B

97 98 PEG_TX7 2 CLOSE TO MXM CONN. 91782-3140M-NV-01


2 PEG_RX#7 PEX_RX7# PEX_TX7
99 100
2 PEG_RX7 PEX_RX7 GND
101 102
GND PEX_TX6# PEG_TX#6 2
103 104 PEG_TX6 2 VIN
2 PEG_RX#6 PEX_RX6# PEX_TX6
105 106 3V3_RUN PWR_SRC 3.3VS 3.3VS
2 PEG_RX6 PEX_RX6 GND
107 108
109 GND PEX_TX5# 110
PEG_TX#5 2 14A 07/27 Follow %change
2 PEG_RX#5 PEX_RX5# PEX_TX5 PEG_TX5 2
111 112 8 5VS
2 PEG_RX5 PEX_RX5 GND
113 114 C553 C590 3 7 R503 R504
115 GND PEX_TX4# 116
PEG_TX#4 2 14A 2 6
2 PEG_RX#4 PEG_TX4 2

5
117 PEX_RX4# PEX_TX4 118 4.7u_25V_X5R_08 *4.7u_25V_X5R_08 1 5 R566 R558 5VS Q34B 2.2K_04 2.2K_04

G
2 PEG_RX4 PEX_RX4 GND
119 120 C595
GND PEX_TX3# PEG_TX#3 2
121 122 PEG_TX3 2 *0.01u_50V_X7R_04 Q9 20K_06 *100K_04 SMD_VGA_THERM_R 4 3
2 PEG_RX#3 SMD_VGA_THERM 28,31,33

4
123 PEX_RX3# PEX_TX3 124 MEP4435Q8
2 PEG_RX3

2
PEX_RX3 GND

D
125 134 CLOSE TO MXM CONN. 8 MTDK5S6R

G
133 GND GND 136 3 7
GND PEX_TX2# PEG_TX#2 2
135 138 PEG_TX2 2 R572 2 6 SMC_VGA_THERM_R 1 6
2 PEG_RX#2 PEX_RX2# PEX_TX2 SMC_VGA_THERM 28,31,33
137 140 100K_04 1 5
2 PEG_RX2 PEX_RX2 GND

D
139 142 5V R571 MTDK5S6R
GND PEX_TX1# PEG_TX#1 2 Q34A
141 144 PEG_TX1 2 20K_04 Q37
2 PEG_RX#1

D
4
PEX_RX1# PEX_TX1
2 PEG_RX1
143
145 PEX_RX1 GND
146
148
MEP4435Q8
Q38
Battery mode
,      LCD cable and VGA card  ,
2 PEG_RX#0
147 GND PEX_TX0# 150
PEG_TX#0
PEG_TX0 2
2
G MTN7002ZHS3     MXM VGA .
149 PEX_RX0# PEX_TX0 152 R580
2 PEG_RX0

S
3
151 PEX_RX0 GND 10K_04 D
GND Q41B
91782-3140M-NV-01 5G
S MTDK5S6R 21,23,24,27,30,40,43,44,46,47,48,49,50 5V
16,17,18,20,21,25,31,32,34,36,43,45,46,47,50,51 VDD3

4
6
A D A

11,13,14,16,27,29,30,31,33,35,46,47 5VS
R573 *0_04 Q41A
31 DGPU_PWR_EN# dGPU_EN# 2G 10,11,12,13,14,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS
R574 0_04
12,14,44,46 SUSB S MTDK5S6R PWR_SRC 11,27,29,31,43,44,45,46,47,48,49,50,51 VIN
FOR GXX

1
PWR_SRC PWR_SRC
775DM only
   !!DMFWP!DP/
J_DC1
4
1
C555 07/27 Follow %change
C591 C556 C592 C554 C551 C550 3
+ C504 Title
4.7u_25V_X5R_08
4.7u_25V_X5R_08 4.7u_25V_X5R_08 4.7u_25V_X5R_08 0.1u_50V_Y5V_06 0.1u_50V_Y5V_06 0.01u_50V_X7R_04 *EEEFZ1E101P
2
1
[15] MXM PCI-E
2

*50299-00401-004 Size Document Number Rev


Custom SCHEMATIC1 6-71-P75D0-D03 2.0
CLOSE TO MXM PIN E1
Date: Monday, August 03, 2015 Sheet 15 of 62
5 4 3 2 1

B - 16 MXM PCI-E
Schematic Diagrams

Lynix Point 1/7


5 4 3 2 1

VCCPGPPA
Lynx Point - M (SPI,GPP)
U16A SKL_PCH_H
? C715 0.1u_10V_X7R_04
3.3VS

U47

MC74VHC1G08DFT2G

5
R238 10K_04 PME# BD17 BB27 PLT_RST#
GPP_A11/PME# GPP_B13/PLTRST# PLT_RST# 15,42
1
AG15 4
RSVD BUF_PLT_RST# 25,26,31,32,36,38,41
R755 1K_04 PCH_SPI_IO3 AG14 P43 TBT_FRC_PWR TBT_FRC_PWR 38 PLT_RST# 2
AF17 RSVD GPP_G16/GSXCLK R39 TBCIO_PLUG_EVENT
RSVD GPP_G12/GSXDOUT TBCIO_PLUG_EVENT 38
AE17 R36 R191

'()

3
D02 ,VIA RSVD GPP_G13/GSXSLOAD R42 D02 ,VIA
5/8 AR19 GPP_G14/GSXDIN R41 5/8 100K_04
D D
AN17 TP5 GPP_G15/GSXSRESET#
Co_Lay TP4
SSPI_SI R207 0_04 SPI_MOSI BB29 AF41 EXTTS_SNI_DRV0_PCH
SSPI_SO R201 0_04 SPI_MISO BE30 SPI0_MOSI GPP_E3/CPU_GP0 AE44 TCH_PNL_INTR_N 3.3VS DESIGN NOTE:
SSPI_CS0# R200 0_04 SPI_CS_0# BD31 SPI0_MISO GPP_E7/CPU_GP1 BC23 ESPI FLASH SHARING MODE
SSPI_SCLK R197 0_04 SPI_SCLK_R BC31 SPI0_CS0# GPP_B3/CPU_GP2 BD24 EXTTS_SNI_DRV1_PCH TBCIO_PLUG_EVENT R709 1K_04 3.3VA 0: MASTER ATTACHED FLASH SHARING
SSPI_CS1# R199 0_04 SPI_CS_1# AW31 SPI0_CLK GPP_B4/CPU_GP3 R707 *1K_04 1: SLAVE ATTACEHD FLASH SHARING
SPI0_CS1# BC36 TP_GPP_H_18 PCH HAS INTERNAL WEAK PD
SSPI_WP#0 R217 33_04 PCH_SPI_IO2 BC29 GPP_H18/SML4ALERT# BE34 M.2_WIGIG_RST_R
SSPI_WP#1 R756 33_04 BD30 SPI0_IO2 GPP_H17/SML4DATA BD39 M.2_WIGIG_WAKE_R_N 3.3VS R188
SSPI_HOLD#0 R198 33_04 PCH_SPI_IO3 AT31 SPI0_IO3 GPP_H16/SML4CLK BB36
SSPI_HOLD#1 R754 33_04 AN36 SPI0_CS2# GPP_H15/SML3ALERT# BA35 EXTTS_SNI_DRV0_PCH R698 8.2K_04 *4.7K_04
R741 *10K_04 SPI_CS_2# AL39 GPP_D1 GPP_H14/SML3DATA BC35 HOME_BTN_PCH TCH_PNL_INTR_N R155 10K_04
3.3VA GPP_D0 GPP_H13/SML3CLK
1/30 AN41 BD35 GPP_H_12 EXTTS_SNI_DRV1_PCH R216 8.2K_04 GPP_H_12
AN38 GPP_D3 GPP_H12/SML2ALERT# AW35
GPP_D2 GPP_H11/SML2DATA

B.Schematic Diagrams
AH43 BD34 TP_GPP_H_11_SML2CLK
40 TBTA_MRESET GPP_D22 GPP_H10/SML2CLK
31 HSPI_SCLK R739 *10mil_short SPI_SCLK_R SPI1_TCHPNL_IO2 AG44 BE11 SM_INTRUDER# R258 1M_04 RTCVCC R187
R753 *10mil_short SPI_MISO 2/3 GPP_D21 INTRUDER#
31 HSPI_MSO
31 HSPI_MSI R740 *10mil_short SPI_MOSI DESIGN NOTE: 1 OF 12 *20K_04
31 HSPI_CE# R731 *10mil_short SPI_CS_0# TOUCH PANEL Z170 MP ? REV = 1.3
R736 *0_04 SPI_CS_1#
D02 ,CS0#
4/30 U16K SKL_PCH_H
? DESIGN NOTE:
V3P3A_V1P8A_PCH_SPI
DESIGN NOTE: D02 1
5/26
LPSS_GSPI1_MOSI AT29
AR29
AV29
GPP_B22/GSPI1_MOSI
GPP_B21/GSPI1_MISO GPP_D9
AL44
AL36
TBTA_ACE_GPIO2 40
SMB RESUME/MAIN LOGIC

5VS SMB_DATA 18,27,28,35


Sheet 16 of 62
28 PCM_INT_1863 GPP_B20/GSPI1_CLK GPP_D10 TBTA_ACE_GPIO3 40

Lynix Point 1/7


JTAG ODT IS DISABLED IF LOW BC27 AL35 R685 1K_04 3.3VA

D
GPP_B19/GSPI1_CS# GPP_D11 TBTA_ACE_GPIO0 40 3.3VA
C PCH HAS INTERNAL WEAK PU AJ39 C668 *1u_6.3V_X5R_04 C
GPP_D12 TPM_DET# 42
R738 19 LPSS_GSPI0_MOSI BD28 Q49
BD27 GPP_B18/GSPI0_MOSI AJ43 R678 G 2SK3018S3
*20K_04 25 LPSS_GSPI0_MISO AW27 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# AL43 R673 1K_04 3.3VS

S
AR24 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS# AK44 R679 1K_04 C657 *1u_6.3V_X5R_04
SPI_MISO GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD AK45
AV44 GPP_D13/ISH_UART0_RXD 1K_04
GPP_C9/UART0_TXD SMB_DATA_MAIN 10,7,8,9
BA41
SMB_CLK 18,27,28,35

3
R205 AU44 GPP_C8/UART0_RXD D
AV43 GPP_C11/UART0_CTS# R686 1K_04 3.3VA

D
*4.7K_04 GPP_C10/UART0_RTS# Q48A 5G C669 *1u_6.3V_X5R_04
AU41 BC38 MTDK5S6R S Q50

4
6
AT44 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL BB38 D Q48B G 2SK3018S3
AT43 GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA MTDK5S6R R674 1K_04 3.3VS

S
AU43 GPP_C13/UART1_TXD/ISH_UART1_TXD BD38 2G C658 *1u_6.3V_X5R_04
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL BE39 17,18,21,31 PM_PCH_PWROK S

1
AN43 GPP_H21/ISH_I2C1_SDA
DESIGN NOTE: DESIGN NOTE: AN44 GPP_C23/UART2_CTS# SMB_CLK_MAIN 10,7,8,9
BOOT HALT ENABLED IF LOW BOOT SELECT STRAP UART2_TXD AR39 GPP_C22/UART2_RTS#
PCH HAS INTERNAL WEAK PU IF SAMPLED HIGH, LPC IS SELECTED UART2_RXD AR45 GPP_C21/UART2_TXD BC22 GPP_A23
ELSE SPI PCH HAS INTERNAL WEAK PD. GPP_C20/UART2_RXD GPP_A23/ISH_GP5 BD18 GPP_A22
AR41 GPP_A22/ISH_GP4 BE21 07/27 Follow %change
V3P3A_V1P8A_PCH_SPI 3.3VA AR44 GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 BD22
AR38 GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 BD21
DESIGN NOTE: DESIGN NOTE:
AT42 GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 BB22 3.3VA MB det 3.3VA EDP/LVDS det
GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 SB_BLON 11
BC19 H:P75 L:P77 H:EDP L:LVDS
AM44 GPP_A17/ISH_GP7
R737 R757 GPP_D4/ISH_I2C2_SDA/I2C3_SDA
AJ44
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
1K_04 *4.7K_04 ./MB det R784 R785
B B
11 OF 12 6/16
SPI_MOSI LPSS_GSPI1_MOSI 10K_04 10K_04
Z170 MP
REV = 1.3 ?
GPP_A22 GPP_A23
R206 R758

*4.7K_04 *20K_04 R803 R804

*10K_04 *10K_04
PJ49 *OPEN-1mm

SPI_* = 0.5"~2"
VDD3
2 1
BIOS ROM 4MB SPI_* = 0.5"~2"
ME+ BIOS ROM 8MB RTC Wake UP
DEFAULT 3.3V_SPI
PJ48 *OPEN-1mm RTC Wake UP VDD3
2 1 UART2_TXD
BIOS DEBUG PORT
3.3V_SPI 3.3VA
D02
UART2_RXD VDD3
5/5 GND
U17 U18 23LAYOUT4,45
8 5 R770 33_04 SSPI_SI 8 5 R752 *33_04 SSPI_SI 67J_80DEBUG2 J_80DEBUG2
VDD SI VDD SI D021 R950 10K_04
VDD3 1
2 R774 33_04 SSPI_SO 2 R769 *33_04 SSPI_SO 5/5 UART2_TXD
C744 SO C745 SO UART2_RXD 2
R773 1K_1%_04 SSPI_WP#0 3 1 SSPI_CS0# R768 *1K_1%_04 SSPI_WP#1 3 1 SSPI_CS1# R949 10K_04 3
WP# CE# WP# CE# VDD3 4
0.1u_10V_X7R_04 *0.1u_10V_X7R_04
6 R771 33_04 SSPI_SCLK 6 R766 *33_04 SSPI_SCLK *85204-04001
SCK SCK
A
R772 *1K_1%_04 SSPI_HOLD#0 7 4 R767 *1K_1%_04 SSPI_HOLD#1 7 4 A
HOLD# VSS HOLD# VSS
GD25B64BSIGR *GD25B32B

23,43,44,45,46
17,18,20,21,3,46
11,13,14,15,27,29,30,31,33,35,46,47
VDD5
3.3VA
5VS
   !!DMFWP!DP/
Title
17,18,20,21,25,31,32,34,36,43,45,46,47,50,51
10,11,12,13,14,15,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
VDD3
3.3VS
[16] Lynx 1/7-SPI/GPP
18,21 RTCVCC
Size Document Number Rev
21
21 VCCPGPPA
V3P3A_V1P8A_PCH_SPI A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 16 of 62


5 4 3 2 1

Lynix Point 1/7 B - 17


Schematic Diagrams

Lynix Point 2/7

5 4 3 2 1
3.3VS

R148
R690
R705
10K_04
10K_04
*10K_04
FB_CLAMP_PCH
DGPU_PWRGD Lynx Point -CLINK/FAN/SATA/HOST
SKL_PCH_H
R142 10K_04 SCI# U16C ?
R691 10K_04 GPU_EVENT#_R
R147 10K_04 GPIO2_FB_TGL_REQ_PCH 25 CL_CLK1 AV2 G31
CL_CLK PCIE9_RXN/SATA0A_RXN PCIE_RXN9_SATA0_RXN_SSD 26
R701 10K_04 PCH_RSVD 25 CL_DATA1 AV3 H31
CL_DATA CLINK PCIE9_RXP/SATA0A_RXP PCIE_RXP9_SATA0_RXP_SSD 26
R700 *0_04 AW2 C31 C206 0.22u_10V_X5R_04
25 CL_RST#1 CL_RST# PCIE9_TXN/SATA0A_TXN PCIE_TXN9_SATA0_TXN_SSD 26
B31 C201 0.22u_10V_X5R_04
PCIE9_TXP/SATA0A_TXP PCIE_TXP9_SATA0_TXP_SSD 26
D TP_GPP_G_8_PWM0 R44 1st M KEY NGFF D
R704 10K_04 PCH_SATAHDD_LED# TP_GPP_G_9_PWM1 R43 GPP_G8/FAN_PWM_0 G29
GPP_G9/FAN_PWM_1 PCIE10_RXN/SATA1A_RXN PCIE_RXN10_SSD 26
R697 10K_04 SATA_GP2 U39 E29
GPP_G10/FAN_PWM_2 PCIE10_RXP/SATA1A_RXP PCIE_RXP10_SSD 26
R687 10K_04 SATA_GP5 TP_GPP_G_11_PWM3 N42 C32 C198 0.22u_10V_X5R_04
GPP_G11/FAN_PWM_3 PCIE10_TXN/SATA1A_TXN PCIE_TXN10_SSD 26
R172 10K_04 SATA_GP6 B32 C199 0.22u_10V_X5R_04
FAN PCIE10_TXP/SATA1A_TXP PCIE_TXP10_SSD 26
R153 10K_04 SATA_GP7 R167 *0_04 FB_CLAMP_PCH U43
31 GPIO_FB_CLAMP GPP_G0/FAN_TACH_0
U42 F41 SATA2_RXN
DGPU_PWRGD U41 GPP_G1/FAN_TACH_1 PCIE15_RXN/SATA2_RXN E41 SATA2_RXP
3.3VA 15,31 DGPU_PWRGD GPP_G2/FAN_TACH_2 PCIE15_RXP/SATA2_RXP
SCI# M44 B39 SATA2_TXN main HDD
31 SCI# GPP_G3/FAN_TACH_3 PCIE15_TXN/SATA2_TXN
GPU_EVENT#_R U36 A39 SATA2_TXP
15 GPU_EVENT#_R GPP_G4/FAN_TACH_4 PCIE15_TXP/SATA2_TXP
R165 10K_04 SWI# P44
37 PS8338B_SW GPP_G5/FAN_TACH_5
B.Schematic Diagrams

SWI# T45 D43 SATA3_RXN 35


18,31 SWI# GPP_G6/FAN_TACH_6 PCIE16_RXN/SATA3_RXN
R166 *0_04 GPIO2_FB_TGL_REQ_PCH T44 E42 SATA3_RXP 35
31 GPIO2_FB_TGL_REQ

PCIe/SATA
GPP_G7/FAN_TACH_7 PCIE16_RXP/SATA3_RXP A41
PCIE16_TXN/SATA3_TXN SATA3_TXN 35 2nd HDD
C200 0.22u_10V_X5R_04 B33 A40 SATA3_TXP 35
26 PCIE_TXP11_SSD PCIE11_TXP PCIE16_TXP/SATA3_TXP
C192 0.22u_10V_X5R_04 C33
26 PCIE_TXN11_SSD PCIE11_TXN
K31 H42
1st M KEY NGFF 26
26
PCIE_RXP11_SSD
PCIE_RXN11_SSD
L31 PCIE11_RXP
PCIE11_RXN
PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
H40
E45 C852 0.22u_10V_X5R_04
PCIE_RXN17_SATA4_RXN_SSD2
PCIE_RXP17_SATA4_RXP_SSD2
26
26
PCIE17_TXN/SATA4_TXN PCIE_TXN17_SATA4_TXN_SSD2 26
19 PCH_CONFIG_JUMPER AB33 F45 C853 0.22u_10V_X5R_04 PICE_TXP17_SATA4_TXP_SSD2 26
GPP_F10/SCLOCK PCIE17_TXP/SATA4_TXP
Sheet 17 of 62 PCH_RSVD
GP39_GFX_CRB_DETECT
SV_ADVANCE_GP48
AB35
AA44
AA45
GPP_F11/SLOAD
GPP_F13/SDATAOUT0
GPP_F12/SDATAOUT1
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
K37
G37
G45 C833 0.22u_10V_X5R_04
PCIE_RXN18_SSD2
PCIE_RXP18_SSD2
26
26
2nd M KEY NGFF

PCIE_TXN18_SSD2 26

Lynix Point 2/7 D02 ./eSATA 9 B38 PCIE18_TXN/SATA5_TXN G44 C834 0.22u_10V_X5R_04
23 eSATA1B_TXN PCIE14_TXN/SATA1B_TXN PCIE18_TXP/SATA5_TXP PCIE_TXP18_SSD2 26
5/21 C38
eSATA 23
23
eSATA1B_TXP
eSATA1B_RXN D39
E37
PCIE14_TXP/SATA1B_TXP
PCIE14_RXN/SATA1B_RXN GPP_E8/SATALED#
AD44
AG36
PCH_SATAHDD_LED#
PCH_SATAHDD_LED# 34
23 eSATA1B_RXP PCIE14_RXP/SATA1B_RXP GPP_E0/SATAXPCIE0/SATAGP0 M.2_SSD1_DET_N 26
AG35 SATA_GP1 R696 10K_04
GPP_E1/SATAXPCIE1/SATAGP1 3.3VS
C C191 0.1u_10V_X7R_04 C36 AG39 SATA_GP2 C
25 PCIE_TXN13_WLAN PCIE13_TXN/SATA0B_TXN GPP_E2/SATAXPCIE2/SATAGP2
C185 0.1u_10V_X7R_04 B36 AD35
WLAN 25
25
PCIE_TXP13_WLAN
PCIE_RXN13_WLAN
G35
E35
PCIE13_TXP/SATA0B_TXP
PCIE13_RXN/SATA0B_RXN
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
AD31
AD38 SATA_GP5
M.2_SSD2_DET_N 26
25 PCIE_RXP13_WLAN PCIE13_RXP/SATA0B_RXP GPP_F2/SATAXPCIE5/SATAGP5 AC43 SATA_GP6
C197 0.22u_10V_X5R_04 A35 GPP_F3/SATAXPCIE6/SATAGP6 AB44 SATA_GP7
26 PCIE_TXP12_SSD PCIE12_TXP GPP_F4/SATAXPCIE7/SATAGP7
C190 0.22u_10V_X5R_04 B35
1st M KEY NGFF 26
26
PCIE_TXN12_SSD
PCIE_RXP12_SSD
H33
G33
PCIE12_TXN
PCIE12_RXP GPP_F21/EDP_BKLTCTL
W36 L_BKLTCT
W35 L_BKLTEN
R335 560_04 H_THRMTRIP# H_THRMTRIP# 3
26 PCIE_RXN12_SSD PCIE12_RXN GPP_F20/EDP_BKLTEN W42 L_VDDEN
C832 0.22u_10V_X5R_04 J45 GPP_F19/EDP_VDDEN C303 *47PF_50V_X5R_04
DESIGN NOTE:
26 PCIE_TXP20_SSD2 PCIE20_TXP
C831 0.22u_10V_X5R_04 K44 AJ3 H_THRMTRIP#_PCH R336 1K_04 PECI TO PCH OPTION
26 PCIE_TXN20_SSD2 PCIE20_TXN THERMTRIP#
N38 HOST AL3 PCH_PECI R346 *0_04
26 PCIE_RXP20_SSD2 PCIE20_RXP PECI H_PECI 3,31
N39 AJ4 R334 30.1_1%_04
2nd M KEY NGFF 26
26
PCIE_RXN20_SSD2
PCIE_TXP19_SSD2
C808
C807
0.22u_10V_X5R_04
0.22u_10V_X5R_04
H44
H43
PCIE20_RXN
PCIE19_TXP
PM_SYNC
PLTRST_CPU#
AK2
AH2 H_PM_DOWN 3
H_PM_SYNC
PLTRST_CPU_N
3
3
26 PCIE_TXN19_SSD2 PCIE19_TXN PM_DOWN
L39 C324
26 PCIE_RXP19_SSD2 PCIE19_RXP
L37 *0.01u_16V_X7R_04
26 PCIE_RXN19_SSD2 PCIE19_RXN 3 OF 12 D02 1%_04
GFX SELECT TABLE Z170 MP ? REV = 1.3 5/5

3.3VA
GFX STYLE DESIGN NOTE: L_BKLTCT R725 *100K_04
DESIGN NOTE: VDD3 D02 REQUEST EC TO GENERATE 10MS DELAY L_BKLTEN R759 *100K_04
1 CUSTOMER GFX VDD3
R288 VCC_3P3A_PWRGD 8V1P0A L_VDDEN R169 *100K_04
V3P3A PWRGD CIRCUIT
0 NORMAL GFX PU HI 10K 3.3VA
R848 10K_04 5/5 D02
H_THRMTRIP# C323 *0.1u_10V_X7R_04
3.3VA 5/5 U51
100K_04 VCC_3P3A_PWRGD 43

5
B R152 10K_04 GP39_GFX_CRB_DETECT B
3.3VS *MC74VHC1G08DFT2G
VCC_3P3A_PWRGD 1

3
R171 *10K_04 R307 D 4 RSMRST_PWRGD_N 31

6
D R846 *10K_04 2
100K_04 5 G Q52B 18,31,45,46 SLP_SUS#
2 G Q52A S MTDK5S6R
43 VCC_1P0A_PWRGD

3
S MTDK5S6R

1
C798
R845 *0_04
J_SATA1
S1
SATA PORT1 0.01u_16V_X7R_04

S2 SATA2TXP C814 0.01u_16V_X7R_04 SATA2_TXP 07/27 Follow %change


S3 SATA2TXN C815 0.01u_16V_X7R_04 SATA2_TXN 3.3V
OPTION PCH_PWRGD & VCCST_PWRGD Function Table
S4
S5 SATA2RXN C868 0.01u_16V_X7R_04 SATA2_RXN DESIGN NOTE: A Y
S6 SATA2RXP C867 0.01u_16V_X7R_04 SATA2_RXP SV ADVANCE MENU TABLE
S7 SCHMITT-TRIGGER INVERTER C353 L H
3.3VS BOARD STYLE R349
D02
*0.1u_10V_X7R_04 H L
P1 1 NORMAL MENU (DEFAULT) 4/30 *22K_04
U26
P2
P3 C838 C839 0 SV ADVANCE MENU Q26
1
NC VCC
5
P4 2

D
P5 *0.01u_16V_X7R_04 *10u_6.3V_X5R_06 *2SK3018S3 A R360 *249_1%_04
VCCST_PWRGD 21,3
P6 DESIGN NOTE:
P7 5VS_2 R372 *0_04 G 3 4 R359 *249_1%_04
SV ADVANCE MENU JUMPER 21,50 VR_READY GND Y PM_PCH_PWROK 16,18,21,31
P8

S
P9 3.3VS R151 20K_04 SV_ADVANCE_GP48 R371 C367 *74LVC1G14
A
P10 A
P11 R170 *0_04 *10K_04 *1u_6.3V_X5R_04
P12 C812 C813 C811 + C343
P13
P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 EEFCX0J221YR

   !!DMFWP!DP/
P15

16,18,20,21,3,46 3.3VA
GND1
GND2

Title
33,34,35,47
16,18,20,21,25,31,32,34,36,43,45,46,47,50,51
5VS_2
VDD3
[17] Lynx 2/7-CLINK/FAN/SATA
11,13,14,15,16,27,29,30,31,33,35,46,47 5VS
Size Document Number Rev
15-02090-1A03-0
11,2,24,25,30,39,42,43,44,46,47
10,11,12,13,14,15,16,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
3.3V
3.3VS A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 17 of 62


5 4 3 2 1

B - 18 Lynix Point 2/7


Schematic Diagrams

Lynix Point 3/7

5 4 3 2 1

IF SAMPLED HIGH,FLASH
DVDDIO_AUDIO

R852
DESCRIPTOR SECURITY
IS OVERIDEN
*1K_04 AZA_SDO
SPT-H (HDA,SMB,JTAG,GPIO)
D02 C245=CODEC >?
05/21
SKL_PCH_H 3.3VA
U16D ?
D02 RTC CLEAR CMOS C245 22p_50V_NPO_04 L55 D02 ./NET
5/5 FCM1005KF-600T03 05/15
AZA_BCLK BA9 BB17 SX_EXIT_HOLDOFF R237 *10K_04
27 HDA_BITCLK HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
R833 33_04 AZA_RST# BD8 AW22 PM_CLKRUN#
27,28 HDA_RST# HDA_RST# GPP_A8/CLKRUN# PM_CLKRUN# 42
BE7
27 HDA_SDIN0 BC8 HDA_SDI0 AR15
AZA_SDI_1 LANPHYPC
HDA_SDI1 GPD11/LANPHYPC
D D
R854 33_04 AZA_SDO BB7 AV13 SLP_WLAN#
27 HDA_SDOUT HDA_SDO GPD9/SLP_WLAN#
R831 33_04 AZA_SYNC_R BD9
27 HDA_SYNC HDA_SYNC BC14 DRAM_CRESETB
TP_PCH_BD1 BD1 DRAM_RESET# BD23 VRALERTB_PU '1' 1.20V
TP_PCH_BE2 BE2 RSVD GPP_B2/VRALERT# AL27
DESIGN NOTE: '0' 1.35V
RSVD GPP_B1 AR27 DDR_VOLTAGE_SEL
AUDIO GPP_B0 DDR_VOLTAGE_SEL 44
D02 :;< R318 33_04 AUD_AZACPU_SDO AM1 N44 TP_GPP_G_17
3 AUD_AZACPU_SDO_R DISPA_SDO GPP_G17/ADR_COMPLETE
6/15 AUD_AZACPU_SDI AN2 AN24 AMP_FAULTZ
VDD3 3 AUD_AZACPU_SDI R337 33_04 AM2 DISPA_SDI GPP_B11 AY1 AMP_FAULTZ 28
AUD_AZACPU_SCLK SYS_PWROK
3 AUD_AZACPU_SCLK_R DISPA_BCLK SYS_PWROK SYS_PWROK 21
R961 1.5K_1%_04 R962 45.3K_1%_04 SSP0_SCLK AL42 BC13 PCIE_WAKE# PCIE_WAKE# 25,26,36,38,41
GPP_D8/SSP0_SCLK WAKE#

B.Schematic Diagrams
AN42 BC15 SLP_A#_N
D02 ,VIA AM43 GPP_D7/SSP0_RXD GPD6/SLP_A# AV15 SLP_LAN#
5/8 AJ33 GPP_D6/SSP0_TXD SLP_LAN# BC26 SLP_S0#
RTCVCC DMIC_DATA0 AH44 GPP_D5/SSP0_SFRM GPP_B12/SLP_S0# AW15
GPP_D20/DMIC_DATA0 GPD4/SLP_S3# SUSB# 21,28,29,31,32,38,44,46
AJ35 BD15
VDD3_RTC

GPP_D19/DMIC_CLK0 GPD5/SLP_S4# SUSC# 31,32,44,46,47


ij ı Ů ŪŭŴ AJ38
GPP_D18/DMIC_DATA1 GPD10/SLP_S5#
BA13 SLP_S5#
C914 1u_6.3V_X5R_04 D02 RTC CLEAR JUMP,RTC_RST# DMIC_CLK1 AJ42
D50 5/22 GPP_D17/DMIC_CLK1 AN15 SUS_CLK
GPD8/SUSCLK SUS_CLK 25,26
R849 BD13 BATLOW_N
1 A

2 A
C 3
20K_1%_04
RTC_RST#
SRTC_RTC#
BC10
BB10 RTCRST#
GPD0/BATLOW#
GPP_A15/SUSACK#
GPP_A13/SUSWARN#/SUSPWRDNACK
BB19
BD19
SUSACK#
SUS_PWR_ACK
R233 *0_04
Sheet 18 of 62
1

C243 SRTCRST#
BAT54CW(lision) JOPEN1
16,17,21,31 PM_PCH_PWROK
AW11 BD11 PCH_LAN_WAKE# R146 *0_04 SWI# 17,31
Lynix Point 3/7
RTC_VBAT_1

1u_6.3V_X5R_04 *CV_40mil BA11 PCH_PWROK GPD2/LAN_WAKE# BB15 AC_PRESENT D02



31,45 RSMRST# RSMRST# GPD1/ACPRESENT BB13 AC_PRESENT 31 R834 *0_04 4/30
PCH_SLP_SUS# 31
2

R806 AV11 SLP_SUS# AT13 PWR_BTN# R832 *0_04


45 PCH_DPWROK DSW_PWROK GPD3/PWRBTN# PWR_BTN# 31 SLP_SUS# 17,31,45,46
C 20K_1%_04 PCH_PORT80_LED BB41 AW1 SYS_RESET# C
GPP_C2/SMBALERT# SYS_RESET#
IJ ı Ů ŪŭŴ SMB_CLK AW44 BD26 HDA_SPKR

SMBUS
16,27,28,35 SMB_CLK GPP_C0/SMBCLK GPP_B14/SPKR HDA_SPKR 19,27
16,27,28,35 SMB_DATA SMB_DATA BB43 AM3 H_PWRGD_R R889 30.1_1%_04
GPP_C1/SMBDATA PROCPWRGD H_PWRGD 3
R946 C242 GPP_C_5 BA40
SMLINK0_CLK AY44 GPP_C5/SML0ALERT# AT2 ITP_PMODE D02 1%
1K_04 1u_6.3V_X5R_04 SMLINK0_DATA BB39 GPP_C3/SML0CLK ITP_PMODE AR3 PCH_JTAGX 5/5
GPP_C4/SML0DATA JTAGX PCH_JTAGX 3
ME RTC CLEAR PCH_HOT_R_N AT27 JTAG AR2 PCH_JTAG_TMS
GPP_B23/SML1ALERT#/PCHHOT# JTAG_TMS PCH_JTAG_TMS 3
R158 *0_04 SMC_CPU_THERM_R AW42 AP1 PCH_JTAG_TDO
31 SMC_CPU_THERM
SMD_CPU_THERM AW45 GPP_C6/SML1CLK JTAG_TDO AP2 PCH_JTAG_TDI
PCH_JTAG_TDO 3 PU/PD for JTAG signals
31 SMD_CPU_THERM GPP_C7/SML1DATA JTAG_TDI PCH_JTAG_TDI 3 VCCST_VCCPLL
J_RTC2 J_RTC1 AN3 PCH_JTAG_TCK
J_RTC1 for P775 4 OF 12 JTAG_TCK
1 1 PCH_JTAG_TMS R602 51_04
2 Z170 MP ? REV = 1.3
J_RTC2 for P75/P77 R888 PCH_JTAG_TDI R604 51_04
2 *85205-02001 PCH_JTAG_TDO R603 51_04
W5000102-001
JOPEN3 *51_04
*CV_40mil 1.0VA
3.3VA R868 1K_04 1 2 R885 1K_04
ME_WE 31
R886 *910_04 A C AZA_SDO ITP_PMODE R319 1K_04
D02 ./RTC SOCKET D48 RB751V-40(lision)
5/5
3.3VS
D02 R339

4/30
3.3VA 3.3VA PM_CLKRUN# R777 8.2K_04
DESIGN NOTE: DESIGN NOTE: Function Table
SYS_PWROK R339 *1K_04
3.3VA TLS CONFIDENTIALITY ENABLED 3.3VA ESPI/LPC SELECT STRAP SYS_RESET# R338 2.2K_04
IF SAMPLED HIGH(DEFAULT) IF SAMPLED HIGH, ESPI IS
DESIGN NOTE: VDDQ
A B Y
B PCH HAS INTERNAL WEAK PD SELECTED ELSE LPC R160 R682 PLATFORM RST BUFFER B
PCH HAS INTERNAL WEAK PD L L L STUFF FOR NON-DEEP SX
R683 R684 499_1%_04 499_1%_04 L H L SUS_PWR_ACK R235 *1K_04

4.7K_04 *4.7K_04 SMLINK0_CLK SMLINK0_DATA R789 C774 H L L RSMRST# R850 *10K_04


U49
PCH_PORT80_LED GPP_C_5 C174 C667 *MC74VHC1G08DFT2G 470_04 0.1u_10V_X7R_04 H H H
5



*100PF_50V_X7R_04 *100PF_50V_X7R_04 DRAM_CRESETB 1 D03 VDD3
R694 R695 4 R788 0_04 DDR4_DRAMRST# 10,7,8,9
SUSC# 2
*20K_04 *20K_04 PCIE_WAKE# R257 1K_04
BATLOW_N R256 10K_04
3

PCH_LAN_WAKE# R259 4.7K_04


AC_PRESENT R807 *10K_04
PWR_BTN# R866 3K_1%_04
R791 0_04

R790 C762 3.3VA


DESIGN NOTE: DESIGN NOTE: 3.3VA 3.3VA
3.3VS TOP SWAP OVERRIDE STRAP 3.3VA EXI BOOT STALL BYPASS IS *10K_04 *0.1u_10V_X7R_04 AMP_FAULTZ R775 10K_04
HIGH:TOP SWAP ENABLED ENABLED IF SAMPLED HIGH VRALERTB_PU R219 10K_04
LOW:TOP SWAP DISABLED(DEFAULT) PCH HAS INTERNAL WEAK PD

PCH HAS INTERNAL WEAK PD R157 R159 6/15
R220 R778
1K_04 1K_04
*4.7K_04 *4.7K_04 OD PLL VR ENABLE: DISABLED WHEN SAMPLED LOW
SMC_CPU_THERM_R SMD_CPU_THERM SUS_CLK R808 1.5K_04
A HDA_SPKR PCH_HOT_R_N A
C172 C173

R215 R779 *100PF_50V_X7R_04 *100PF_50V_X7R_04


16,17,20,21,3,46 3.3VA

   !!DMFWP!DP/
*20K_04 *20K_04
21,43,46,51 1.0VA
10,44,5,7,8,9 VDDQ
3,46,48,5 VCCST_VCCPLL
Title
16,17,20,21,25,31,32,34,36,43,45,46,47,50,51
10,11,12,13,14,15,16,17,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
VDD3
3.3VS
[18] Lynx 3/7-HDA/SMB/JTAG/GPI
21 DVDDIO_AUDIO
Size Document Number Rev
23,43,44,45,46
16,21
VDD5
RTCVCC A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 18 of 62


5 4 3 2 1

Lynix Point 3/7 B - 19


Schematic Diagrams

Lynix Point 4/7

5 4 3 2 1

D02 1 A-
SPT-H (CLK,REQ,GPP,DDP) TEST SETUP MENU TABLE
5/20
BOARD STYLE
SKL_PCH_H
U16G ? 1 DISABLED (DEFAULT)
C836 L1 PCH_XDP_CLK_R_DN
15p_50V_NPO_04 3.2*2.5 TP_CLKOUT_48 AR17 CLKOUT_ITPXDP L2 PCH_XDP_CLK_R_DP
GPP_A16/CLKOUT_48 CLKOUT_ITPXDP_P 0 TEST SETUP MENU ENABLED
G1 J1
3 PCH_CPU_NSSC_CLK_DP PCH_CPU_PCIBCLK_DN 3

1
4
F1 CLKOUT_CPUNSSC_P CLKOUT_CPUPCIBCLK J2
X6
3 PCH_CPU_NSSC_CLK_DN CLKOUT_CPUNSSC CLKOUT_CPUPCIBCLK_P PCH_CPU_PCIBCLK_DP 3 DESIGN NOTE:
D D
FSX3M 24.000000M12FAQ R870 3 PCH_CPU_BCLK_DP G2 TEST SETUP MENU JUMPER
H2 CLKOUT_CPUBCLK_P
3 PCH_CPU_BCLK_DN CLKOUT_CPUBCLK 3.3VS
C835 1M_1%_04
15p_50V_NPO_04 R871 0_04 XTAL_24M_PCH_OUT A5 N7
CLK_PCIE_GLAN# 36

2
3
R869 0_04 XTAL_24M_PCH_IN A6 XTAL24_OUT CLKOUT_PCIE_N0 N8
XTAL24_IN CLKOUT_PCIE_P0 CLK_PCIE_GLAN 36
R708 10K_04 TEST_SETUP_MENU
C271 V1P0A_VCCF24_1P0 R306 2.7K_1%_04 XCLK_RBIAS E1 L7
XCLK_BIASREF CLKOUT_PCIE_N1 CLK_PCIE_CARD# 41
12p_50V_NPO_04 L5
CLKOUT_PCIE_P1 CLK_PCIE_CARD 41
RTC_X1 BC9 R706
RTC_X2 BD10 RTCX1 D3
RTCX2 CLKOUT_PCIE_N2 F2 *0_04

2
1
CLKOUT_PCIE_P2
B.Schematic Diagrams

X3 R286 BC24
QTFM28-32768K125P20R CR_CLKREQ# AW24 GPP_B5/SRCCLKREQ0# E5
41 CR_CLKREQ# GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N3
10M_06 AT24 G4
C272 BD25 GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_P3

3
4
12p_50V_NPO_04 BB24 GPP_B8/SRCCLKREQ3# D5
38 TBT_CLKREQ# GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N4 TBT_REFCLK_100_N 38
BE25 E6
GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_P4 TBT_REFCLK_100_P 38
AT33
DGPU_PRSNT# AR31 GPP_H0/SRCCLKREQ6# D8
15 DGPU_PRSNT# GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_N5
SSD_CLKREQ# BD32 D7
26 SSD_CLKREQ# GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_P5
BC32

Sheet 19 of 62 R730 1K_04 DGPU_PRSNT#

25 WLAN_CLKREQ#
BB31
BC33
BA33
GPP_H3/SRCCLKREQ9#
GPP_H4/SRCCLKREQ10#
GPP_H5/SRCCLKREQ11#
GPP_H6/SRCCLKREQ12#
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
R8
R7
DESIGN NOTE:
RECOVER/CONFIGURE HEADER MODE
AW33 U5 * DEFAULT JUMPER SETTING
Lynix Point 4/7 3.3VS 26 SSD2_CLKREQ#
SSD2_CLKREQ#
BB33
BD33
GPP_H7/SRCCLKREQ13#
GPP_H8/SRCCLKREQ14#
GPP_H9/SRCCLKREQ15#
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7

CLKOUT_PCIE_N8
U7

W10
CLK_PCIE_MXM#
CLK_PCIE_MXM

CLK_PCIE_SSD#
15
15

26
FOR SOP ENABLE AND FLASH
STUFF FOR RECOVERY USAGE ONLY
R688 STUFF NORMAL
C R13 W11 R218 STUFF, R688 REMOVE CONFIGURE C
26 CLK_PCIE_SSD2# CLKOUT_PCIE_N15 CLKOUT_PCIE_P8 CLK_PCIE_SSD 26
R776 10K_04 CR_CLKREQ# R11
26 CLK_PCIE_SSD2 CLKOUT_PCIE_P15
R189 10K_04 SSD_CLKREQ# N3 R208 STUFF, R688 REMOVE RECOVERY
R190 10K_04 SSD2_CLKREQ# P1 CLKOUT_PCIE_N9 N2
R2 CLKOUT_PCIE_N14 CLKOUT_PCIE_P9 D02 1
CLKOUT_PCIE_P14 P3 3.3VS 5/21
W7 CLKOUT_PCIE_N10 P2
Y5 CLKOUT_PCIE_N13 CLKOUT_PCIE_P10
CLKOUT_PCIE_P13 R218 *2.2K_04
U2 R3 R208 *2.2K_04 HDA_SPKR 18,27
25 CLK_PCIE_WLAN# CLKOUT_PCIE_N12 CLKOUT_PCIE_N11 LPSS_GSPI0_MOSI 16
U3 R4
25 CLK_PCIE_WLAN CLKOUT_PCIE_P12 CLKOUT_PCIE_P11 3.3VS
7 OF 12
Z170 MP ? REV = 1.3

R688 1K_04 PCH_CONFIG_JUMPER 17

U16E ? R699
SKL_PCH_H
10K_04
D02  BB3
5/5 AW4 GPP_I7/DDPC_CTRLCLK BD6
AY2 GPP_I0/DDPB_HPD0 GPP_I8/DDPC_CTRLDATA BA5
AV4 GPP_I1/DDPC_HPD1 GPP_I5/DDPB_CTRLCLK BC4
R887 10K_04 SMC_EXTSMI_R_N BA4 GPP_I2/DDPD_HPD2 GPP_I6/DDPB_CTRLDATA BE5
3.3VS GPP_I3/DDPE_HPD3 GPP_I9/DDPD_CTRLCLK BE6
GPP_I10/DDPD_CTRLDATA
Y44
GPP_F14 V44 R689 10K_04 H_SKTOCC_N 3
B GPP_F23 3.3VS B
W39
GPP_F22 DGPU_RST#_PCH 15
R324 100K_04 DDSP_1_HPD0 BD7
GPP_I4/EDP_HPD L43 IVCAM_DFU R140 10K_04
GPP_G23 3.3VS
L44
GPP_G22 GPU_PWR_EN# 15
U35 GC6_FB_EN_R
GPP_G21 GC6_FB_EN_R 15
R35 TEST_SETUP_MENU R149 10K_04
GPP_G20 3.3VS
BD36 TBTA_ACE_GPIO7 40
GPP_H23
5 OF 12 R168 *10K_04 GC6_FB_EN_R

Z170 MP ? REV = 1.3

DESIGN NOTE:
SYS_PWROK NORMAL POWER DOWN
TRIGGERED BY PCH
D02 @
5/5

A A

   !!DMFWP!DP/
Title
16,17,18,20,21,3,46 3.3VA
[19] Lynx 4/7-CLK,REQ,GPP
21 V1P0A_VCCF24_1P0
Size Document Number Rev
11,17,2,24,25,30,39,42,43,44,46,47
10,11,12,13,14,15,16,17,18,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
3.3V
3.3VS A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 19 of 62


5 4 3 2 1

B - 20 Lynix Point 4/7


Schematic Diagrams

Lynix Point 5/7


5 4 3 2 1

SPT-H (DMI,PCIe,USB,LPC)
SKL_PCH_H
U16B ?
L27
2 DMI_TXN0 N27 DMI_RXN0 AF5
2 DMI_TXP0 DMI_RXP0 USB2N_1 USB_PN1 24
C27 AG7 USB_PP1 24 USB3 PORT3 (J_USB3_3)
2 DMI_RXN0 DMI_TXN0 USB2P_1
D B27 AD5 USB_PN2 35 D
2 DMI_RXP0 DMI_TXP0 USB2N_2
E24 AD7 USB_PP2 35 FINGER
2 DMI_TXN1 G24 DMI_RXN1 USB2P_2 AG8
2 DMI_TXP1 DMI_RXP1 USB2N_3 USB_PN3 25
PCI-E x1 Usage B28 AG10 NGFF 3G
2 DMI_RXN1 DMI_TXN1 USB2P_3 USB_PP3 25
A28 AE1 USB_PN4 23
2 DMI_RXP1 DMI_TXP1 USB2N_4
G27 DMI AE2 USB_PP4 23 USB3 PORT1 (J_USB3_1)
2 DMI_TXN2 E26 DMI_RXN2 USB2P_4 AC2
Lane 1 2 DMI_TXP2 DMI_RXP2 USB2N_5 USB_PN5 23
B29 AC3 USB_PP5 23 USB3 PORT5 (J_USB3_2)
Lane 2 2 DMI_RXN2 DMI_TXN2 USB2P_5
C29 AF2
2 DMI_RXP2 DMI_TXP2 USB2N_6 USB_PN6 30
Lane 3 Thunder (4X) L29 AF3 USB_PP6 30 USB3 PORT4 (J_USB3_4)
2 DMI_TXN3 K29 DMI_RXN3 USB2P_6 AB3
Lane 4 2 DMI_TXP3 B30 DMI_RXP3 USB 2.0
USB2N_7 AB2 3.3VA
2 DMI_RXN3 DMI_TXN3 USB2P_7
Lane 5 A30 AL8
2 DMI_RXP3 DMI_TXP3 USB2N_8 AL7 RN1
Lane 6 *% R253 100_1%_04 PCIECOMP_N B18 USB2P_8 AA1 USB_OC0_R_N 5 4
Lane 7 M key (4X) D02 1% PCIECOMP_P C17 PCIE_RCOMPN USB2N_9 AA2 USB_OC1_R_N 6 3
5/5 PCIE_RCOMPP USB2P_9 AJ8 USB_OC2_R_N 7 2
Lane 8 USB_PN10 24

B.Schematic Diagrams
USB2N_10 AJ7 USB_OC4_R_N 8 1
H15 USB2P_10 W2
USB_PP10 24 CCD
38 PCIE_RXN1_TBT PCIE1_RXN/USB3_7_RXN USB2N_11 USB_PN11 25
G15 W3 USB_PP11 25 NGFF WLAN+BT 10K_8P4R_04
38 PCIE_RXP1_TBT PCIE1_RXP/USB3_7_RXP USB2P_11

PCIe/USB 3
C229 0.22u_10V_X5R_04 A16 AD3 RN2
38 PCIE_TXN1_TBT PCIE1_TXN/USB3_7_TXN USB2N_12
C241 0.22u_10V_X5R_04 B16 AD2 5 4
38 PCIE_TXP1_TBT PCIE1_TXP/USB3_7_TXP USB2P_12
C230 0.22u_10V_X5R_04 B19 V2 USB_OC5_R_N 6 3
38 PCIE_TXN2_TBT PCIE2_TXN/USB3_8_TXN USB2N_13
C220 0.22u_10V_X5R_04 C19 V1 USB_OC6_R_N 7 2
38 PCIE_TXP2_TBT PCIE2_TXP/USB3_8_TXP USB2P_13
E17 AJ11 GPIO_PCIESLOT_RST_R 8 1
38 PCIE_RXN2_TBT PCIE2_RXN/USB3_8_RXN USB2N_14

Alpine Ridge
38
38
38
PCIE_RXP2_TBT
PCIE_RXN3_TBT
PCIE_RXP3_TBT C223 0.22u_10V_X5R_04
G17
L17
K17
B20
PCIE2_RXP/USB3_8_RXP
PCIE3_RXN/USB3_9_RXN
PCIE3_RXP/USB3_9_RXP
USB2P_14
AJ13

DESIGN NOTE:
DFX TEST MODE
10K_8P4R_04
Sheet 20 of 62
38 PCIE_TXN3_TBT PCIE3_TXN/USB3_9_TXN
C20 AD43

Lynix Point 5/7


C C222 0.22u_10V_X5R_04 USB_OC0_R_N XTAL INPUT IS SINGLE ENDED IF SAMPLED LOW ELSE DIFFERENTIAL C
38 PCIE_TXP3_TBT PCIE3_TXP/USB3_9_TXP GPP_E9/USB2_OC0#
E20 AD42 USB_OC1_R_N
38 PCIE_RXN4_TBT G19 PCIE4_RXN/USB3_10_RXN GPP_E10/USB2_OC1# AD39 R173 *10K_04
USB_OC2_R_N
38 PCIE_RXP4_TBT C212 0.22u_10V_X5R_04 B21 PCIE4_RXP/USB3_10_RXP GPP_E11/USB2_OC2# AC44 R154 10K_04
VISACH2_D3 3.3VA
38 PCIE_TXN4_TBT PCIE4_TXN/USB3_10_TXN GPP_E12/USB2_OC3#
C221 0.22u_10V_X5R_04 A21 Y43 USB_OC4_R_N
38 PCIE_TXP4_TBT PCIE4_TXP/USB3_10_TXP GPP_F15/USB2_OCB_4
K19 Y41 USB_OC5_R_N D02
L19 PCIE5_RXN GPP_F16/USB2_OCB_5 W44 USB_OC6_R_N 5/5
D22 PCIE5_RXP GPP_F17/USB2_OCB_6 W43 GPIO_PCIESLOT_RST_R
C22 PCIE5_TXN GPP_F18/USB2_OCB_7
G22 PCIE5_TXP
E22 PCIE6_RXN AG3 USB2_COMP R316 113_1%_04
B22 PCIE6_RXP USB2_COMP AD10 USB2_VBUSSENSE R855 1K_04
DESIGN NOTE:
USB2 COMP RES: PLACE WITHIN 1 INCH
A23 PCIE6_TXN USB2_VBUSSENSE AB13 TP_PCH_AB13
L22 PCIE6_TXP RSVD_AB13 AG2 USB2_ID R333 1K_04
36 PCIE_RXN7_GLAN PCIE7_RXN USB2_ID
K22
GLAN 36
36
PCIE_RXP7_GLAN
PCIE_TXN7_GLAN
C213
C214
0.1u_10V_X7R_04
0.1u_10V_X7R_04
C23
B23
PCIE7_RXP
PCIE7_TXN
36 PCIE_TXP7_GLAN PCIE7_TXP
K24 BD14 RSVD_PCH_BD14_N R254 1K_04
41 PCIE_RXN8_CARD PCIE8_RXN GPD7/RSVD
L24 D03 1B,R255
CARD READER 41
41
PCIE_RXP8_CARD
PCIE_TXN8_CARD
C204
C205
0.1u_10V_X7R_04
0.1u_10V_X7R_04
C24
B24
PCIE8_RXP
PCIE8_TXN VDD3 6/25
41 PCIE_TXP8_CARD PCIE8_TXP
2 OF 12
DESIGN NOTE:
Z170 MP ? REV = 1.3 USED TO DETECT 2X4 PRESENCE
JA PIN 4 WILL PULL GPIO TO GND
WHEN 2X4 PLUG IN
CONNECT TO GPIO 3.3VS
SKL_PCH_H
U16F ?
B C11 AT22 2X4_POWER_DETECT R144 *10K_04 B
LPC/eSPI

24 USB3_TXN1 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 LPC_AD0 31,32,42


B11 AV22
24 USB3_TXP1 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 LPC_AD1 31,32,42
B7 AT19
24 USB3_RXN1 USB3_1_RXN GPP_A3/LAD2/ESPI_IO2 LPC_AD2 31,32,42
A7 BD16 D02
24 USB3_RXP1 USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 31,32,42 5/5
25 USB3TXN2_SSICTXN1 B12 BE16 3.3VS
USB3_2_TXN/SSIC_1_TXN L_FRAME_N_R R236 0_04 LPC_FRAME# 31,32,42
25 USB3TXP2_SSICTXP1 A12 GPP_A5/LFRAME#/ESPI_CS#
USB3_2_TXP/SSIC_1_TXP BA17 SERIRQ SERIRQ 31,32,42
25 USB3RXN2_SSICRXN1 C8 GPP_A6/SERIRQ
USB3_2_RXN/SSIC_1_RXN AW17 GPP_A7 R792 10K_04 3.3VS SERIRQ R787 10K_04
25 USB3RXP2_SSICRXP1 B8 GPP_A7/PIRQA#/ESPI_ALERT0#
USB3_2_RXP/SSIC_1_RXP AT17 SB_KBCRST# SB_KBCRST# 31 SB_KBCRST# R786 10K_04
B15 GPP_A0/RCIN#/ESPI_ALERT1# BC18 PCH_SMI_N R139 10K_04
30 USB3_TXN6 USB3_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# S4_STAT# 42
C15 R143 *10K_04
30 USB3_TXP6 USB3_6_TXP
K15
30 USB3_RXN6 USB3_6_RXN
USB

K13 BC17 LPC_0_ESPI_CLK_EC R234 22_04 PCLK_KBC 31,32


30 USB3_RXP6 USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK AV19 PCH_CLK_PCI_TPM R794 22_04 PCLK_TPM 42
B14 GPP_A10/CLKOUT_LPC1
23 USB3_TXN5 USB3_5_TXN 3.3VA
C14 M45 PCH_SMI_N R141 0_04
23 USB3_TXP5
G13 USB3_5_TXP GPP_G19/SMI# N43 2X4_POWER_DETECT R145 0_04
SMI# 31,32 DESIGN NOTE:
23 USB3_RXN5 USB3_5_RXN GPP_G18/NMI# PCH_MUTE# 28
23 USB3_RXP5 H13 PD FOR I2S MODE
USB3_5_RXP DEFAULT PU HDA MODE
C13 AE45 R703
D13 USB3_3_TXN/SSIC_2_TXN GPP_E6/DEVSLP2 AG43 TP_GPP_E_5
A9 USB3_3_TXP/SSIC_2_TXP GPP_E5/DEVSLP1 AG42 SSD_SATA_DEVSLP 100K_04
USB3_3_RXP/SSIC_2_RXP GPP_E4/DEVSLP0 SSD_SATA_DEVSLP 26
B10 AB39 PCH_CODEC_IRQ
USB3_3_RXN/SSIC_2_RXN GPP_F9/DEVSLP7 AB36
SATA

B13 GPP_F8/DEVSLP6 AB43 TP_GPP_F_7 R702


23 USB3_TXP4 USB3_4_TXP GPP_F7/DEVSLP5
A14 AB42
23 USB3_TXN4 USB3_4_TXN GPP_F6/DEVSLP4 SSD2_SATA_DEVSLP 26
G11 AB41 PCH_CODEC_IRQ *100K_04
23 USB3_RXP4 USB3_4_RXP GPP_F5/DEVSLP3
E11
23 USB3_RXN4 USB3_4_RXN
A
6 OF 12 A
Z170 MP ? REV = 1.3 D02 ,VIA
5/8

   !!DMFWP!DP/
Title
16,17,18,21,3,46
16,17,18,21,25,31,32,34,36,43,45,46,47,50,51
3.3VA
VDD3
[20] Lynx 5/7-DMI,PCIe,USB
10,11,12,13,14,15,16,17,18,19,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS
Size Document Number Rev
11,13,14,15,16,27,29,30,31,33,35,46,47 5VS
A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 20 of 62


5 4 3 2 1

Lynix Point 5/7 B - 21


Schematic Diagrams

Lynix Point 6/7


5 4 3 2 1

DESIGN NOTE:
SPT -H (POWER) EDGE CAP FOR VCCMPHY_1P0 AND VCCDUSB_1P0

1.0VA 1.0VA

1.0VA SKL_PCH_H
U16H ?
C748 C759
DESIGN NOTE: AA23 1.0VA
PLACE HOLDER FOR VCCAUSB_1P0 AND VCCAAZPLL_1P0 FILTER AA26 VCCPRIM_1P0 1u_6.3V_X5R_04 22u_6.3V_X5R_08
AA28 VCCPRIM_1P0 AL22 +P1V0_PRIME_PCH_FUSE_2V8 R780 0_04
1.0VA V1P0A_VCCAPLL VCCPRIM_1P0 VCCPRIM_1P0

CORE
AC23
AC26 VCCPRIM_1P0 BA24 VCCPGPPA 3.3VA
D
R809 0_06
DESIGN NOTE: AC28 VCCPRIM_1P0 VCCDSW_3P3 VDD3 D

VCCGPIO
BOARD CAP FOR VCCDSW_1P0 AE23 VCCPRIM_1P0 BA31 R724 0_04
C809 C810 AE26 VCCPRIM_1P0 VCCPGPPA BC42
DESIGN NOTE:
P1V0_PCH_VCCDSW VCCPRIM_1P0 VCCPGPPBH 3.3VA 3.3VA
Y23 BD40 BOARD CAP FOR VCCPRTCPRIM_3P3
*22u_6.3V_X5R_08 22u_6.3V_X5R_08 Y25 VCCPRIM_1P0 VCCPGPPBH AJ41 D02 0402
BA29 VCCPRIM_1P0 VCCPGPPEF AL41 5/5
DCPDSW_1P0 VCCPGPPEF AD41 C763
C747 N17 VCCPGPPG AN5
NEAR AJ5,AL5 1.0VA
R19 VCCCLK1 VCCPRIM_3P3 1u_6.3V_X5R_04
1u_6.3V_X5R_04 U20 VCCCLK3
V17 VCCCLK4 AD15
NEAR BA20
VCCCLK2 VCCPRIM_1P0 1.0VA
DESIGN NOTE: R17 AD13 3.3VS
VCCCLK6 VCCATS BA20
VCCRTCPRIM_3P3 3.3VA
PLACE HOLDER FOR VCCMPHYPLL_1P0 FILTER K2 BA22
V1P0A_VCCF24_1P0
K3 VCCCLK5 VCCRTC BA26 VCC_RTCEXT_CAP
VCCPRTC_3P3 DESIGN NOTE:
B.Schematic Diagrams

1.0VA V1P0A_VCCAMPHYPLL VCCCLK5 DCPRTC 3.3VA EDGE CAP FOR VCCPHVC_3P3


U21 C746 (PLACE HOLDER)
1.0VA VCCMPHY_1P0
U23 AJ20

MPHY
R138 0_06 1.0VA 0.1u_10V_X7R_04
U25 VCCMPHY_1P0 VCCPRIM_1P0 AJ21
C171 C180 C179 U26 VCCMPHY_1P0 VCCPRIM_1P0 AJ23 D02 PU 3.3V_SPI C693
V26 VCCMPHY_1P0 VCCPRIM_1P0 AJ25 4/30 0.1u_10V_X7R_04
*22u_6.3V_X5R_08 *22u_6.3V_X5R_08 22u_6.3V_X5R_08 A43 VCCMPHY_1P0 VCCPRIM_1P0 V3P3A_V1P8A_PCH_SPI
V1P0A_VCCAMPHYPLL VCCAMPHYPLL_1P0
B43 BE41 R182 0_06
C44 VCCAMPHYPLL_1P0 VCCSPI BE43
3.3V_SPI NEAR AJ41,AL41
NEAR A42,A43,B43
Sheet 21 of 62 1.0VA V28
C45 VCCPCIE3PLL_1P0
VCCPCIE3PLL_1P0

VCCAPLLEBB_1P0
VCCSPI
VCCSPI

VCCPGPPCD
BE42

BC44 VCCPGPPD 3.3VS DESIGN NOTE:

USB
AC17 BA45
DESIGN NOTE:
Lynix Point 6/7 C
PLACE HOLDER FOR VCCMPHYPLL_1P0 FILTER

1.0VA V1P0A_VCCF24_1P0
V1P0A_VCCAPLL AJ5
AL5
AN19
VCCPRIM_1P0
VCCUSB2PLL_1P0
VCCUSB2PLL_1P0
VCCHDAPLL_1P0
VCCPGPPCD
VCCPGPPCD
VCCPGPPCD
BC45
BB45
C784
BOARD CAP FOR VCCATS C

DVDDIO_AUDIO BA15 BD3 +VCCPFUSE_3P3 R323 0_06 3.3VA


W15 VCCHDA VCCPRIM_3P3 BE3 1u_6.3V_X5R_04
R332 0_06
VDD3 VCCDSW_3P3 VCCPRIM_3P3 BE4 NEAR AD13
8 OF 12 VCCPRIM_3P3
C322 C321 Z170 MP ? REV = 1.3

*22u_6.3V_X5R_08 22u_6.3V_X5R_08
D02 ALL_SYS_PWRGD CDE
5/5
NEAR K2,K3 VDD3
ALL_SYS_PWRGD 11,31

VCCIO_EN=(VDDQ_PWRGD & SUSB#) VDD3 VDD3


VDD3 U25D

14
U25C 74LVC08APW

14
U25B 74LVC08APW 12

14
31 PM_PWROK
14 U25A 74LVC08APW 9 11 SYS_PWROK_R R320 1K_04
17,50 VR_READY SYS_PWROK 18
74LVC08APW 4 8 13
43,48,50 VCCIO_PWRGD
1 6 10
47 5VS_PWRGD
3 5 R347

7
2 R358 R357
18,28,29,31,32,38,44,46 SUSB#

7
R386 C366 10K_04

7
7

10K_04 *0.1u_10V_X7R_04
33_04 EC DELAY 99ms(UP)
33_04
B B
PM_PCH_PWROK 16,17,18,31
1.0VA->SUSC#->VDDQ->DDR1.2V_PWRGD->VCCIO VCCST_PWRGD 17,3
DESIGN NOTE:
BOARD CAP FOR VCCPRTC_3P3
DESIGN NOTE: DESIGN NOTE:
EDGE CAP FOR VCCPGPPBCH (PLACE HOLDER) EDGE CAP FOR VCCPGPPG(PLACE HOLDER)
RTCVCC VCCPRTC_3P3 3.3VA 3.3VA
DESIGN NOTE:
3.3VA BOARD GENERAL DCPL CAPS R793 0_04

C758 C707 C799


*0.1u_10V_X7R_04 0.1u_10V_X7R_04
C175 C716 C176 C177 C692 1u_6.3V_X5R_04
D02 0402
10u_6.3V_X5R_06 1u_6.3V_X5R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 *0.1u_10V_X7R_04 5/5
NEAR BA22 NEAR AD41
NEAR BC42,BD40

DESIGN NOTE: DESIGN NOTE: DESIGN NOTE:


RTCVCC 5V DESIGN NOTE: EDGE CAP FOR VCCPUSBDSW_3P3 EDGE CAP FOR VCCPGPPEF(PLACE HOLDER) EDGE CAP FOR VCCPHVC_3P3
GROUP D POWER DVDDIO_AUDIO PLACE HOLDER (PLACE HOLDER)
SPT-H :1.8V VDD3 3.3VA V1P0A_VCCF24_1P0
3.3VA R884 0_04
C915 C62 C300
VCCPGPPD C775 C302
0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 C708
A 3.3VA R181 0_06 1u_6.3V_X5R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 A

NEAR W15 NEAR AN5 NEAR K2,K3


16,17,18,20,3,46 3.3VA

19
16
16,18
VCCPGPPA
RTCVCC
V1P0A_VCCF24_1P0
   !!DMFWP!DP/
Title
18
18,43,46,51
DVDDIO_AUDIO
1.0VA
[21] Lynx 6/7-POWER
15,23,24,27,30,40,43,44,46,47,48,49,50 5V
Size Document Number Rev
16,17,18,20,25,31,32,34,36,43,45,46,47,50,51
10,11,12,13,14,15,16,17,18,19,20,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
VDD3
3.3VS A3 SCHEMATIC1 6-71-P75D0-D03 2.0
16 V3P3A_V1P8A_PCH_SPI
Date: Monday, August 03, 2015 Sheet 21 of 62
5 4 3 2 1

B - 22 Lynix Point 6/7


Schematic Diagrams

Lynix Point 7/7

5 4 3 2 1

SPT -H (RSVD,GND)

D D

U16I ?
U16L SKL_PCH_H ?
SKL_PCH_H
AC18 AR5
C42 AB11 AN4 VSS VSS AR7
D10 VSS VSS AB7 AN10 VSS VSS U15
D12 VSS VSS AB14 BE14 VSS VSS AL4
D15 VSS VSS AB31 BE18 VSS VSS AE29

B.Schematic Diagrams
D16 VSS VSS AB32 BE23 VSS VSS AE4
D17 VSS VSS AB38 BE28 VSS VSS AE42
D19 VSS VSS AB4 BE32 VSS VSS AF18
D21 VSS VSS AB5 BE37 VSS VSS AF20
D24 VSS VSS AC1 BE40 VSS VSS AF21
D25 VSS VSS AC20 BE9 VSS VSS AF23
D27 VSS VSS AC21 C10 VSS VSS AF25
D29 VSS VSS AC25 C2 VSS VSS AF26
VSS VSS VSS VSS
D30
D31
D33
D35
VSS
VSS
VSS
VSS
VSS
VSS
AC29
AC45
AB8
AD11
C28
C37
J7
K10
VSS
VSS
VSS
VSS
VSS
VSS
AF28
AF29
AG11
AG13 U16J SKL_PCH_H
?
Sheet 22 of 62
VSS VSS VSS VSS

Lynix Point 7/7


D36 AD14 K27 AG31
E13 VSS VSS AB15 K33 VSS VSS AG32
E15 VSS VSS AD32 K36 VSS VSS AG33
C E31 VSS VSS AD33 K4 VSS VSS AG38 BD2 AR22 C
E33 VSS VSS AD36 K42 VSS VSS AG4 BD45 VSS RSVD W13
F44 VSS VSS AD4 K43 VSS VSS AH1 BD44 VSS RSVD U13
F8 VSS VSS AD8 L12 VSS VSS AH17 BE44 VSS RSVD P31
G42 VSS VSS AE18 L13 VSS VSS AH18 D45 VSS RSVD N31
G9 VSS VSS AE20 L15 VSS VSS AH20 A42 VSS RSVD D02 ,VIA
H17 VSS VSS AE21 L4 VSS VSS AH21 B45 VSS P27 5/8
H19 VSS VSS AE25 L41 VSS VSS AH23 B44 VSS RSVD R27
H22 VSS VSS AE28 L8 VSS VSS AH25 A4 VSS RSVD N29
H24 VSS VSS AL10 M35 VSS VSS AH26 A3 VSS RSVD P29
H27 VSS VSS AL11 M42 VSS VSS AH28 B2 VSS RSVD AN29
H29 VSS VSS AL13 N10 VSS VSS AH29 A2 VSS RSVD R24
H3 VSS VSS AL17 N15 VSS VSS AH45 B1 VSS RSVD P24
H35 VSS VSS AL19 N19 VSS VSS AJ10 BB1 VSS RSVD
J10 VSS VSS AL24 N22 VSS VSS AJ14 BC1 VSS AT3
J11 VSS VSS AL29 N24 VSS VSS AJ15 A44 VSS PREQ# AT4 PCH_XDP_PREQ_R_N 3
VSS VSS VSS VSS VSS PRDY# PCH_XDP_PRDY_R_N 3
J3 AL32 N35 AJ17 AY5
J39 VSS VSS AL33 N36 VSS VSS AJ18 C1 CPU_TRST# AL2 R317 30.1_1%_04 H_TRST_N_R 3
J5 VSS VSS AL38 N4 VSS VSS AJ26 D1 RSVD PCH_TRIGOUT AK1 PCH_2_CPU_TRIGGER 2
T42 VSS VSS AM15 N41 VSS VSS AJ28 D02 ,VIA RSVD PCH_TRIGIN CPU_2_PCH_TRIGGER 2
U10 VSS VSS AM17 N5 VSS VSS AJ29 5/8 D02 1%
U11 VSS VSS AM19 P17 VSS VSS AJ31 10 OF 12 5/5
U14 VSS VSS AM22 P19 VSS VSS AJ32 Z170 MP ? REV = 1.3
U17 VSS VSS AM24 P22 VSS VSS AJ36
U18 VSS VSS AM27 P45 VSS VSS AK4
U28 VSS VSS AM29 R10 VSS VSS AK42
U29 VSS VSS AM45 R14 VSS VSS AU7
U31 VSS VSS AN11 R22 VSS VSS AV17
U32 VSS VSS AN22 R29 VSS VSS AV24
B U33 VSS VSS AN27 R33 VSS VSS AV27 B
U38 VSS VSS AN31 R38 VSS VSS AV31
U4 VSS VSS AN39 R5 VSS VSS AV33
U8 VSS VSS AN7 T1 VSS VSS AV6
V18 VSS VSS AN8 T2 VSS VSS AW13
V20 VSS VSS AP11 T4 VSS VSS AW19
V21 VSS VSS AP4 Y18 VSS VSS AW29
V23 VSS VSS AR33 Y20 VSS VSS AW37
V25 VSS VSS AR34 Y21 VSS VSS AW9
V29 VSS VSS AR42 Y26 VSS VSS AY38
V3 VSS VSS AR9 Y28 VSS VSS AY45
V45 VSS VSS AT10 Y29 VSS VSS B25
W14 VSS VSS AT15 A18 VSS VSS B3
W31 VSS VSS AT36 A25 VSS VSS B37
W32 VSS VSS AT9 A32 VSS VSS B40
W33 VSS VSS AU1 A37 VSS VSS B6
W38 VSS VSS AU35 AA17 VSS VSS BA1
W4 VSS VSS AU36 AA18 VSS VSS BB11
W8 VSS VSS AU39 AA20 VSS VSS BB16
Y17 VSS VSS AU45 AA21 VSS VSS BB21
VSS VSS C4 AA25 VSS VSS BB25
VSS AA29 VSS VSS BB30
AA4 VSS VSS BB34
12 OF 12 AA42 VSS VSS BC2
AB10 VSS VSS BD43
VSS VSS
Z170 MP REV = 1.3
9 OF 12
?
Z170 MP REV = 1.3
A
? A

   !!DMFWP!DP/
Title
23,43,44,45,46 VDD5
[22] Lynx 7/7-RSVD/GND
16,17,18,20,21,25,31,32,34,36,43,45,46,47,50,51 VDD3
11,13,14,15,16,27,29,30,31,33,35,46,47 5VS Size Document Number Rev
A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 22 of 62


5 4 3 2 1

Lynix Point 7/7 B - 23


Schematic Diagrams

USB + eSATA, USB Charging


5 4 3 2 1

USB3.0 PORT5
USBVCC3.0_5
USB3.0 PORT4 + eSATA
D02  U12 100 mil
5/5 3 1
OC# VOUT
5 C646 C159 D60
5V VIN
C168 4 2 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 3.3VS eSATA1B_RXP_C 10 1 eSATA1B_RXP_J
D D
EN# GND eSATA1B_RXN_C 9 2 eSATA1B_RXN_J
10u_6.3V_X5R_06 UP7549UMA5-20 GND R996 *0_04 R997 0_04 8 3
PCB Footprint = M-SOT23-5A eSATA1B_TXN_C 7 4 eSATA1B_TXN_J
2A/90mohm eSATA1B_TXP_C 6 5 eSATA1B_TXP_J

R129 *10mil_short_04 C945 C946 C947 PUSB3F96


24,30,44,46 DD_ON# 100 mil C160 22u_6.3V_X5R_08 R998
USBVCC3.0_5
0.01u_16V_X7R_04 0.1u_16V_Y5V_04 1u_6.3V_X5R_04
C162 22u_6.3V_X5R_08 4.7K_04

10
16
20
6
PIN6 PIN10 PIN16 U61
GND GND GND 7

DEW2
VCC33
DEW1
VCC33
EN
J_USB3_2 C948 0.01u_16V_X7R_04 eSATA1B_TXP_L 1 15 eSATA1B_TXP_R C949 0.01u_16V_X7R_04 eSATA1B_TXP_C
17 eSATA1B_TXP RX1P TX1P
C950 0.01u_16V_X7R_04 eSATA1B_TXN_L 2 14 eSATA1B_TXN_R C951 0.01u_16V_X7R_04 eSATA1B_TXN_C
17 eSATA1B_TXN RX1N TX1N
USB3_TXP5_RJ 9 GND1
SSTX+ SHIELD
B.Schematic Diagrams

1 HOST DEVICE

Standard-A
L13 USB3_TXN5_RJ 8 VBUS GND2 C952 0.01u_16V_X7R_04 eSATA1B_RXN_L 4 12 eSATA1B_RXN_R C953 0.01u_16V_X7R_04 eSATA1B_RXN_C
SSTX- SHIELD 17 eSATA1B_RXN TX2N RX2N
20 USB_PP5
1 2 USB_PP5_R USB_PN5_RJ 2 C954 0.01u_16V_X7R_04 eSATA1B_RXP_L 5 11 eSATA1B_RXP_R C955 0.01u_16V_X7R_04 eSATA1B_RXP_C
D- 17 eSATA1B_RXP TX2P RX2P
4 GND3
4 3 USB_PN5_R USB_PP5_RJ 3 GND SHIELD
20 USB_PN5 D+ Closed TO Closed TO
*WCM2012F2S-161T03-short USB3_RXP5J 6 GND4
REDRIVER IC REDRIVER IC

T-PAD
7 SSRX+ SHIELD

DE_2

GND
GND

GND
20 USB3_RXN5

EQ1

EQ2
DE1
USB3_RXN5J 5 GND_D
SSRX-
20 USB3_RXP5
ASM1466_new

Sheet 23 of 62

8
17

21
3
13

18
19
20 USB3_TXN5 C705 0.1u_10V_X7R_04 USB3_TXN5_R C19007-90905-L NEW R999 *100K_04 DE_B SDA1 R1000 *100K_04
3.3VS 3.3VS
R1001 *100K_04 DE_A SCK1 R1002 *100K_04
20 USB3_TXP5 C704 0.1u_10V_X7R_04 USB3_TXP5_R 0310 CHANGE BACK TO USB3.0 CONNECTOR R1003 *100K_04 R1004 *4.7K_04
C R1005 *0_04 C

USB + eSATA, USB R1006


R1007
R1008
*0_04
*4.7K_04
2K_1%_04 REXT
GND
GND J_ESATA1
D12 D42 eSATA
Charging USB_PP5_R
USB_PN5_R
6
7
5
4
USB_PP5_RJ
USB_PN5_RJ
USB3_RXN5
USB3_RXP5
10
9
1
2
USB3_RXN5J
USB3_RXP5J
GND
eSATA1B_TXP_J
P5

P6
GND

A+
8 3 8 3
9 2 USB3_TXN5_R 7 4 USB3_TXN5_RJ eSATA1B_TXN_J P7
10 1 USB3_TXP5_R 6 5 USB3_TXP5_RJ USB3_TXP4 C209 0.1u_10V_X7R_04 USB3_TXP4_R A-
20 USB3_TXP4
P8
PUSB3F96 USB3_TXN4 C217 0.1u_10V_X7R_04 USB3_TXN4_R GND
20 USB3_TXN4
PUSB3F96 eSATA1B_RXN_J P9
B-
eSATA1B_RXP_J P10
B+
P11
USB3_RXP4 GND
20 USB3_RXP4
USB3_RXN4 100 mil USB2.0
20 USB3_RXN4

SLG55583 USB Charging PORT USBVCC_CHARGER


USB_PN4_RJ
P1

P2
VBUS

D- GND1
USB_PP4_RJ P3 G1 GND2

W/ USB CHARGER P4
D+

GND
G2
G3
G4
GND3
GND4
B VDD5 B

USB3.0 Max Trace USB3.0


P12
D02 1
length < 4" A_URXN_CMJ
SSRX-
5/22 R193 A_URXP_CMJ P13
10K_04 SSRX+
P14
GND
U15 USB3_TXN4_RJ P15
8 1
Default Low USB_DD_ON# SSTX-
31,45,46 DD_ON CB PRE# USB3_TXP4_RJ P16
7 2 USB_PN4_A D02 ./eSATA SSTX+
20 USB_PN4 TDM DM R765 5/21
6 3 USB_PP4_A 100K_04 EU146- 167CRL-TWD
20 USB_PP4 TDP DP
6-21-B4X60-116
GND

VDD5 5 4 D02 ,DEL


VCC CDP
C202 SLG55593VTR USBVCC_CHARGER
9

PCB Footprint = TDFN8-2X2MM U14


0.1u_16V_Y5V_04 +, -. R192 VDD5 3 1
*10K_04 OC# VOUT
SLG55593VTR : 5 C713 C712 C187
6-02-55593-9D0 VIN
USB_DD_ON# 4 2 0.1u_16V_Y5V_04 22u_6.3V_X5R_08 22u_6.3V_X5R_08
EN# GND
C178 UP7549UMA5-20
PCB Footprint = M-SOT23-5A
A
10u_6.3V_X5R_06 A

D46 D13

USB_PP4_RJ 10 1 USB_PP4_A USB3_RXN4 6 5 A_URXN_CMJ

   !!DMFWP!DP/
USB_PN4_RJ 9 2 USB_PN4_A USB3_RXP4 7 4 A_URXP_CMJ
8 3 8 3
7 4 USB3_TXN4_R 9 2 USB3_TXN4_RJ
6 5 USB3_TXP4_R 10 1 USB3_TXP4_RJ Title

3.3V 11,17,2,24,25,30,39,42,43,44,46,47
[23] USB+eSATA, USB Charging
VDD5 43,44,45,46 Size Document Number Rev
PUSB3F96 PUSB3F96
5V
3.3VS
15,21,24,27,30,40,43,44,46,47,48,49,50
10,11,12,13,14,15,16,17,18,19,20,21,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
A3 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 23 of 62


5 4 3 2 1

B - 24 USB + eSATA, USB Charging


Schematic Diagrams

CCD, USB Port3

5 4 3 2 1

R57 *0_06 CCD_PWR


5V U6
1A 1A 48 mil
3.3VS R56 0_06 4 1
5 VIN VOUT

CCD C61
1u_6.3V_X5R_04
3
VIN

EN GND
2
C59

*0.1u_16V_Y5V_04
C60
4/7

uP7553 2.2u_6.3V_X5R_04

D 31 CCD_EN D

From KBC default HI


Port 5 J_CCD1

R54 *0_04 1

B.Schematic Diagrams
27 INT_MIC 20 USB_PN10 2
20 USB_PP10 3
L5 C57 47p_50V_NPO_04
HCB1005KF-121T20 4
3.3VS 5
1 2 MIC_DATA_L
27 MIC_DATA 6
1 2 MIC_CLK_L
27 MIC_CLK 7
HCB1005KF-121T20 C56 47p_50V_NPO_04 8
L3 WB247H-008S11M

BEAD & CAP FOR EMI


6-21-C3A00-108 Sheet 24 of 62
CCD, USB Port3
C C
USBVCC3.0_3

USB3.0 PORT1 D02 


5/5 3
U7
1
100 MIL

C95 C94
OC# VOUT
5 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
3.3V 5V VIN
D02 BCN
6/25 4 2
R711 *4.7K_04 R163 *0_04 C76 EN# GND
R710 4.7K_04 R164 *0_04 10u_6.3V_X5R_06 UP7549UMA5-20
R717 4.7K_04 R178 *0_04 PCB Footprint = M-SOT23-5A
2A/90mohm
R718 *4.7K_04 R177 2K_1%_04 R69 *10mil_short_04
23,30,44,46 DD_ON#
C123 22u_6.3V_X5R_08
CLOSE TO CONNECTOR
R712 *4.7K_04 R162 0_04 C140 22u_6.3V_X5R_08
USBVCC3.0_3

J_USB3_3
GND
1

U46 USB3_TXP1 USB3_TXP1_RJ 9 GND1


20 USB3_TXP1 SSTX+ SHIELD
25 GND 1

Standard-A
VCC

EQ1

DE1

OS1

EN_RXD

GND

I2C_SDA_20 24 GND 7 I2C_SCK_20 USB3_TXN1 USB3_TXN1_RJ 8 VBUS GND2


USB CONNECTOR SIDE NC NC 20 USB3_TXN1
4 3 USB_PN1_R USB_PN1_RJ 2 SSTX- SHIELD
20 USB_PN1 D-
USB3_TXN1_R 0.1u_10V_X7R_04 C652 23 8 C680 0.1u_10V_X7R_04 USB3_TXN1 L10 4 GND3
B TX1- RX1- 1 2 *WCM2012F2S-161T03-short USB_PP1_R USB_PP1_RJ 3 GND SHIELD B
20 USB_PP1 D+
USB3_TXP1_R 0.1u_10V_X7R_04 C653 22 9 C681 0.1u_10V_X7R_04 USB3_TXP1 USB3_RXP1 USB3_RXP1_RJ 6 GND4
TX1+ RX+ 20 USB3_RXP1 SSRX+ SHIELD
7
R117 *0_04 21 10 USB3_RXN1 USB3_RXN1_RJ 5 GND_D
GND GND GND GND PCH SIDE 20 USB3_RXN1 SSRX-
USB3_RXN1_R 0.1u_10V_X7R_04 C659 20 11 C682 0.1u_10V_X7R_04 USB3_RXN1
RX2- TX2- C19007-90905-L NEW
USB3_RXP1_R 0.1u_10V_X7R_04 C660 19 12 C683 0.1u_10V_X7R_04 USB3_RXP1
GND

VCC
EQ2

OS2
DE2

RX2+ TX2+
CM

3.3V
18

17

16

15

14

13

ASM1464
PCB Footprint = QFN24-4X4MM 3.3V

R749 0_04 R194 *4.7K_04

R764 *0_04 R204 *4.7K_04


R763 *0_04 R203 4.7K_04 R713 R692 D10
R748 *0_04 R196 4.7K_04 *4.7K_04 *4.7K_04 D38 6 5
R750 *0_04 R195 *4.7K_04 USB3_TXP1_R 6 5 USB3_TXP1_RJ 7 4
USB3_TXN1_R 7 4 USB3_TXN1_RJ 8 3
D02 BCN I2C_SCK_20 8 3 USB_PN1_RJ 9 2 USB_PN1_R
GND 6/25 I2C_SDA_20 USB3_RXP1_R 9 2 USB3_RXP1_RJ USB_PP1_RJ 10 1 USB_PP1_R
3.3V USB3_RXN1_R 10 1 USB3_RXN1_RJ

R161 R137 PUSB3F96


*4.7K_04 *4.7K_04 PUSB3F96
A A
C685 C684 C662

0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04


GND GND

   !!DMFWP!DP/
Title
[24] CCD,USB PORT3
GND
3.3V 11,17,2,25,30,39,42,43,44,46,47 Size Document Number Rev
5V
3.3VS
15,21,23,27,30,40,43,44,46,47,48,49,50
10,11,12,13,14,15,16,17,18,19,20,21,23,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 24 of 62


5 4 3 2 1

CCD, USB Port3 B - 25


Schematic Diagrams

M.2 3G+USB & WLAN+BT

5 4 3 2 1

HUAWEI MU736PIN1.8V LEVEL


HI: Present
CONNECTORGNORMAL CLOSED( GND)

3G CARD / USB3 D02 SATAT9



GHIJKLMN&!PULL
HIGH,OP@QPULL HIGH:

5/8 CURRENT2A ,DON'T DROP BELOW 3.135V


3G_3.3V 80 mils
W/O 3G

J_3G1 C880 EEFCX0J221YR

+
GND

D W/O 3G
- /  3G_CONFIG2 75
73 CONFIG_2 3.3V4
74
72
C911
C913
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
D

71 GND10 3.3V3 70
3G_CONFIG1 69 GND9 3.3V2 68 R940 *33_04
Windows 8 3G_POWEREN CONFIG_1 SUSCLK(32Khz)(O) SUS_CLK 18,26
R844 *10K_04 1.8V LEVEL 3G_RST# 67 66 C828 470p_50V_X7R_04
Always hi. 3G_3.3V Reset#(O)1.8V SIM Detect(O)
R325 *8.2K_1%_04 65 64
C305 *33p_50V_NPO_04 63 ANTCTL3(I)1.8V COEX1(I/O)1.8V 62
GND ANTCTL2(I)1.8V COEX2(I/O)1.8V
R929 *0_06 61 60
3.3VS ANTCTL1(I)1.8V COEX3(I/O)1.8V
CLOSE CONNECTOR 59 58 GND
R938 *0_06 57 ANTCTL0(I)1.8V NC1 56
GND8 NC0
B.Schematic Diagrams

55 54
53 REFCLKP PEWake#(IO) 52 R916 *10K_04
REFCLKN CLKREQ#(IO) 3.3V
51 50
D02 SATA 9 49 GND7 PERST#(O) 48
5/5 47 PETp0/SATA-A+ GPIO_4(IO)1.8V 46

3G POWER Q56
3G_3.3V
45
43
41
PETn0/SATA-A-
GND6
PERp0/SATA-B-
GPIO_3(IO)1.8V
GPIO_2(IO)1.8V
GPIO_1(IO)1.8V
44
42
40 C881 0.1u_16V_Y5V_04 GND
AO3415 C416 0.1u_10V_X7R_04 4 3 39 PERn0/SATA-B+ GPIO_0(IO)1.8V 38
>120 mil >120 mil 20 USB3TXP2_SSICTXP1 GND5 DEVSLP(O)
S D L22 37 36

Sheet 25 of 62 3.3V

C879
20
20
USB3TXN2_SSICTXN1
USB3RXP2_SSICRXP1
C413
*WCM2012F2S-SHORT
0.1u_10V_X7R_04
L18
1
1
2
2
35
33
31
PETp1/USB3.0-Tx+/SSIC-TxP
PETn1/USB3.0-Tx-/SSIC-TxN
GND4
UIM_PWR(I)
UIM_DATA(IO)
UIM_CLK(I)
34
32
30
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
35
35
35
35

G
C907 1u_6.3V_X5R_04 *WCM2012F2S-SHORT 4 3 29 PERp1/USB3.0-Rx+/SSIC-RxP UIM_RESET(I) 28

M.2 3G+USB & 20 USB3RXN2_SSICRXN1


1u_6.3V_X5R_04

0.1u_16V_Y5V_04 27 PERn1/USB3.0-Rx-/SSIC-RxN GPIO_8(IO)1.8V 26 GPS_DISABLE# R931 0_04


GND3 GPIO_10(IO)1.8V GND
HUAWEI MU736PINDEFAULT HIGH BODYSAR_N 25 24
R944 R939 R373 *0_04 WAKE_ON_WWAN# 23 GPIO_12(IO)1.8V GPIO_7(IO)1.8V 22
C908

18,25,26,36,38,41 PCIE_WAKE# GPIO_11(IO)1.8V GPIO_6(IO)1.8V


3G_CONFIG0 21 20

WLAN+BT C
R945 100K_04
20K_1%_04 10_06 HUAWEI MU736PINOD PIN
need pull high
CONFIG_0

B KEY
GPIO_5(IO)1.8V
D02 ./
5/8
HUAWEI MU736 'F3.3V
C

3
D

6
D 11 10 M2B_3GSSD_LED#R
5 G Q55B 9 GND2 GPIO_9/DAS/DSS#(I)(OD) 8
20 USB_PN3 USB_D- W_DISABLE#1(O) 3G_EN 31
2 G Q55A S MTDK5S6R 7 6 PWR_ON_OFF R399 10K_04
31 3G_PWR_EN 20 USB_PP3

4
S MTDK5S6R 5 USB_D+ Full_Card_Power_Off#(O)1.8V 4 80 mils

1
3 GND1 3.3V1 2
GND0 3.3V0 3G_3.3V
3G_CONFIG3 1
R951 CONFIG_3
D02 ./PU DOWN: + C783 C909 C797
4/30 10K_04 NFSB0-S6701-TP40
PCB Footprint = NXSB0-S67XX-XX40 EEFCX0J221YR 10u_6.3V_X5R_06 0.1u_16V_Y5V_04
GND W/O 3G

GND W/ 3G
- /  GND GND GND

40 mil
WLAN_3.3V

WLAN+BT 75
73
J_WLAN1

GND10 3.3V3
74
72
C441

0.1u_16V_Y5V_04
C429

47uF_6.3V_X5R_08
B 71 Reserved/REFCLKN1 3.3V2 70 B
69 Reserved/REFCLKP1 UIM_Power_In/Gpio1/PEWake1# 68
67 GND9 UIM_Power_Out/CLKREQ1# 66
65 Reserved/PERn1 UIM_SWP/PERST1# 64 R384 10K_04
Reserved/PERp1 Reserved1 WLAN_3.3V
63 62 R383 10K_04
61 GND8 ALERT#(I) 60 D03 1B R214 *0_04
Reserved/PETn1 I2C CLK(O) LPSS_GSPI0_MISO 16
59 58 6/29
57 Reserved/PETp1 I2C DATA(IO) 56 R391 0_04 J5 2 1 OPEN_2A
GND7 W_DISABLE#1(O) WLAN_EN 31 3.3V
R432 *0_04 55 54
18,25,26,36,38,41 PCIE_WAKE# PEWake0#(IO) Reserved/W_DISABLE#2(O) BT_EN 31 VDD3 WLAN_3.3V
53 52
19 WLAN_CLKREQ# CLKREQ0#(IO) PERST0#(O) BUF_PLT_RST# 16,26,31,32,36,38,41 U31
3.3VS R406 10K_04 51 50 >120 mil >120 mil
49 GND6 SUSCLK(32Khz)(O) 48 5 1
19 CLK_PCIE_WLAN# REFCLKN0 COEX1(I/O)1.8V VIN VOUT
47 46 SUSCLK 32Khz
19 CLK_PCIE_WLAN REFCLKP0 COEX2(I/O)1.8V
45 44 4
43 GND5 COEX3(I/O)1.8V 42 R356 *0_04 C437 VIN/SS C454
17 PCIE_RXN13_WLAN PERn0 VENDOR DEFINED2 CL_CLK1 17
41 40 R364 *0_04 3 2
17 PCIE_RXP13_WLAN PERp0 VENDOR DEFINED1 CL_DATA1 17 EN GND
39 38 R365 *0_04 1u_6.3V_X5R_04 0.1u_16V_Y5V_04
GND4 VENDOR DEFINED0 CL_RST#1 17
37 36 uP7553
17 PCIE_TXN13_WLAN PETn0 NC8
35 34
17 PCIE_TXP13_WLAN PETp0 NC7
33 32
GND3 NC6
31 WLAN_PWR_EN

E KEY EC ,RSECIJ


23 22
21 NC5 NC4 20
19 NC3 NC2 18
17 NC1 GND2 16
NC0 LED#2(I)(OD)
A A

A KEY
7 6
GND1 LED#1(I)(OD)
   !!DMFWP!DP/
5 4 40 mil
20 USB_PN11 USB_D- 3.3V1
3 2
20 USB_PP11 USB_D+ 3.3V0 WLAN_3.3V
1
GND0 Title
16,17,18,20,21,31,32,34,36,43,45,46,47,50,51
11,13,14,15,16,27,29,30,31,33,35,46,47
VDD3
5VS
[25] M.2 3G+USB3 & WLAN+BT
NFSA0-S6701-TP40
10,11,12,13,14,15,16,17,18,19,20,21,23,24,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS
Size Document Number Rev
15,21,23,24,27,30,40,43,44,46,47,48,49,50 5V
11,17,2,24,30,39,42,43,44,46,47 3.3V A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 25 of 62


5 4 3 2 1

B - 26 M.2 3G+USB & WLAN+BT


Schematic Diagrams

M.2 PCIE4X SSD1 & SSD2

5 4 3 2 1

3.3VS
1st M2 NGFF (PCIE 4X)
>120 mil
R260 R261 3.3VS
UVPCH WMulti PCIE OR SATA SSD 10K_04 10K_04 C474 C473 C926
J_SSD1
17 M.2_SSD1_DET_N
D 75 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06 D

D
73 GND13 74
H:SATA GND12 3.3V8
71 72 GND GND GND
L:PCIE G NGFF_PEDET 69 GND11 3.3V7 70
Q19 67 PEDET(NC-PCIe/GND-SATA) 3.3V6 68 R948 *33_04
SUS_CLK 18,25,26
S
MTN7002ZHS3 NC18 SUSCLK(32Khz)(O)

M KEY
57 58
55 GND10 NC17 56
19 CLK_PCIE_SSD

B.Schematic Diagrams
53 REFCLKP NC16 54 R473 0_04
19 CLK_PCIE_SSD# REFCLKN PEWake#(IO) PCIE_WAKE# 18,25,26,36,38,41
51 52
GND9 CLKREQ#(IO) SSD_CLKREQ# 19
49 50
17 PCIE_TXP9_SATA0_TXP_SSD PETp0/SATA-A+ PERST#(O) BUF_PLT_RST# 16,25,26,31,32,36,38,41
47 48
17 PCIE_TXN9_SATA0_TXN_SSD PETn0/SATA-A- NC15
45 46
43 GND8 NC14 44
17 PCIE_RXN9_SATA0_RXN_SSD PERp0/SATA-B- NC13
41 42
17 PCIE_RXP9_SATA0_RXP_SSD PERn0/SATA-B+ NC12
39 40
37 GND7 NC11 38 R156 0_04
17
17

17
PCIE_TXP10_SSD
PCIE_TXN10_SSD

PCIE_RXP10_SSD
35
33
31
PETp1
PETn1
GND6
DEVSLP(O)
NC10
NC9
36
34
32
SSD_SATA_DEVSLP 20
Sheet 26 of 62
29 PERp1 NC8 30
17

17
17
PCIE_RXN10_SSD

PCIE_TXP11_SSD
PCIE_TXN11_SSD
27
25
23
PERn1
GND5
PETp2
PETn2
NC7
NC6
NC5
NC4
28
26
24
>120 mil
3.3VS M.2 PCIE4X SSD1 &
21 22 C466 C465 C472

C
17
17
PCIE_RXP11_SSD
PCIE_RXN11_SSD
19
17
15
GND4
PERp2
PERn2
GND3
NC3
NC2
3.3V5
3.3V4
20
18
16
0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06 3.3VS 3.3VS C SSD2
13 14
17 PCIE_TXP12_SSD PETp3 3.3V3
11 12 GND GND GND
17 PCIE_TXN12_SSD PETn3 3.3V2
9 10 M2M_SSD_LED#R R402 R405
7 GND2 DAS/DSS#(I)(OD) 8
17 PCIE_RXP12_SSD PERp3 NC1
5 6 80 mils 10K_04 10K_04
17 PCIE_RXN12_SSD PERn3 NC0
3 4 3.3VS
1 GND1 3.3V1 2
GND0 3.3V0 C467 D S M2M_SSD_LED#R
34 M2M_SSD_LED#
NFSM0-S6701-TP40 0.1u_10V_X7R_04
MTN7002ZHS3 Q27

G
GND 3.3VS
GND NGFF_PEDET

3.3VS R413

10K_04
UVPCH WMulti PCIE OR SATA SSD

R865

10K_04
R882

10K_04
2nd M2 NGFF (PCIE 4X) D S M2M_SSD_LED#R_2

J_SSD2 MTN7002ZHS3 Q51

G
17 M.2_SSD2_DET_N
75 >120 mil NGFF_PEDET_2
D

73 GND13 74
H:SATA GND12 3.3V8 3.3VS
71 72
B L:PCIE G NGFF_PEDET_2 69 GND11 3.3V7 70 C912 C910 C900 B
Q53 67 PEDET(NC-PCIe/GND-SATA) 3.3V6 68 R941 *33_04
SUS_CLK 18,25,26
S

MTN7002ZHS3 D02 1B NC18 SUSCLK(32Khz)(O) 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06


5/5 D02./J_SSD2 TXY@
M KEY 5/8
GND GND GND
57 58
55 GND10 NC17 56
19 CLK_PCIE_SSD2 REFCLKP NC16
53 54 R930 0_04
19 CLK_PCIE_SSD2# REFCLKN PEWake#(IO) PCIE_WAKE# 18,25,26,36,38,41
51 52
GND9 CLKREQ#(IO) SSD2_CLKREQ# 19
49 50
17 PICE_TXP17_SATA4_TXP_SSD2 PETp0/SATA-A+ PERST#(O) BUF_PLT_RST# 16,25,26,31,32,36,38,41
47 48
17 PCIE_TXN17_SATA4_TXN_SSD2 PETn0/SATA-A- NC15
45 46
43 GND8 NC14 44
17 PCIE_RXN17_SATA4_RXN_SSD2 PERp0/SATA-B- NC13
41 42
17 PCIE_RXP17_SATA4_RXP_SSD2 PERn0/SATA-B+ NC12
39 40
37 GND7 NC11 38 R902 0_04
17 PCIE_TXP18_SSD2 PETp1 DEVSLP(O) SSD2_SATA_DEVSLP 20
35 36
17 PCIE_TXN18_SSD2 PETn1 NC10
33 34
31 GND6 NC9 32
17 PCIE_RXP18_SSD2 PERp1 NC8
29 30
17 PCIE_RXN18_SSD2 PERn1 NC7
27 28 >120 mil
25 GND5 NC6 26
17 PCIE_TXP19_SSD2 PETp2 NC5 3.3VS
23 24
17 PCIE_TXN19_SSD2 PETn2 NC4
21 22 C830 C829 C851
19 GND4 NC3 20
17 PCIE_RXP19_SSD2 PERp2 NC2
17 18 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06
17 PCIE_RXN19_SSD2 PERn2 3.3V5
15 16
13 GND3 3.3V4 14
A 17 PCIE_TXP20_SSD2 PETp3 3.3V3 11,17,2,24,25,30,39,42,43,44,46,47 3.3V A
11 12 GND GND GND
17 PCIE_TXN20_SSD2 PETn3 3.3V2 10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS
9 10 M2M_SSD_LED#R_2
GND2 DAS/DSS#(I)(OD) 16,17,18,20,21,25,31,32,34,36,43,45,46,47,50,51 VDD3
7 8
17 PCIE_RXP20_SSD2 PERp3 NC1
5 6 80 mils D02 
17 PCIE_RXN20_SSD2 PERn3 NC0
   !!DMFWP!DP/
3 4 3.3VS 5/5
1 GND1 3.3V1 2
GND0 3.3V0 C806
Title
NFSM0-S6701-TP85 0.1u_10V_X7R_04 [26] M.2 PCIE4X SSD1 & SSD2
GND Size Document Number Rev
GND A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 26 of 62


5 4 3 2 1

M.2 PCIE4X SSD1 & SSD2 B - 27


Schematic Diagrams

Realtek ALC892

5 4 3 2 1

C208 0.1u_16V_Y5V_04

C207 0.1u_16V_Y5V_04
Layout Note:
U43 pin 1 ~ pin 11 and pin 47 and pin 48 C823 0.1u_16V_Y5V_04
are Digital signals. C287 0.1u_16V_Y5V_04
The others are Analog signals.
C389 0.1u_16V_Y5V_04

3.3VS 3.3VS_AUD 5VS_AUD


AUDG GND_AUDIO
L50 HCB1005KF-121T20
40mil 40mil L17 *HCB1005KF-121T20
D
Layout Note: 5VS
D
(1)MIC1-L (U13.21) (2)MIC1-R (U13.22) C788 C233 C274 C236 C288 C225 R981 *20mil_P_04
(3)LINE-L (U13.23) (4)LINE-R (U13.24)
*0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 10u_6.3V_X5R_06
0 1 2 3 4 5 AUDG, 6 7 8   9 :
+5VS & +VIN plane. R351 *20mil_P_04 R982 *20mil_P_04
GND_AUDIO AUDG AUDG
GND_AUDIO

25
38
7

1
9
U22 D02 short:
VREF_CODEC AUDG 5/12

DVSS2

DVDD1
DVDD2

AVDD1
AVDD2
MIC_CLK L15 2 1 HCB1005KF-121T20 L49 GND_AUDIO
24 MIC_CLK
MIC_DATA L16 2 1 HCB1005KF-121T20 C275 0.1u_16V_Y5V_04
B.Schematic Diagrams

24 MIC_DATA DEFAULT SHORT


2
C234 47p_50V_NPO_04 C244 10u_6.3V_X5R_06 4 GPIO0/DMIC-CLK 27 C276 2.2u_6.3V_X5R_04 HCB1608KF-121T30
GND_AUDIO GND_AUDIO DMIC_DAT VREF
GND_AUDIO C772 47p_50V_NPO_04 3 MIC2-VREFO
GPIO1/DMIC-DATA
5 28 MIC1-VREFO-L AUDG
18 HDA_SDOUT SDATA-OUT VREFOOUT-B_L
6 32 MIC1-VREFO-R GND_AUDIO R277
18 HDA_BITCLK BIT-CLK VREFOUT-B_R
R820 *0_04 MIC_DATA R296 33_04 8
18 HDA_SDIN0 SDATA-IN
10 39 2.2K_04
ALC889 18 HDA_SYNC DIGITAL
11 SYNC
port A SURR-OUT-R
SURR-OUT-L 41

Sheet 27 of 62
18,28 HDA_RST# RESET#
GND_AUDIO
 . Max: 0.5inch
EAPD_MODE 47 30 MIC2-VREFO
24 INT_MIC
INT_MIC
28 EAPD_MODE SPDIFI/EAPD VREFOUT-F_L T53
PC BEEP D02 : 31 C235
D49 48 VREFOUT-E T173
5/14

Realtek ALC892
30 SPDIFO SPDIFO
1 A 35 FRONT_L 330p_50V_X7R_04
port D FRONT-OUT-R
31 KBC_BEEP FRONT-OUT-L FRONT_L 28,29
C 3 BEEP R340 47K_04 C286 1u_6.3V_X5R_04 12 36 FRONT_R
PCBEEP FRONT_R 28,29
2 A R326 1K_04
18,19 HDA_SPKR
C306 *0.1u_10V_X7R_04 14 HEADPHONE-L
C L45
*HCB1005KF-121T20
BAT54CW(lision)
13
port EFR_HP-R
FR_HP-L 15 HEADPHONE-R
GND_AUDIO
C

30 JD_SENSEA Sense A
AUDG 34 43
5VS 30 JD_SENSEB
L44
HCB1005KF-121T20 37
Sense B
port G CENTER
LFE
44

LDO_IN 29 NC 45 SIDE-L_R C216 10u_6.3V_X5R_06 R222 75_1%_04


5V LDO_IN ANALOG port H SIDE-L 46 SIDE-R_R C215 10u_6.3V_X5R_06 R221 75_1%_04
SIDE_L
SIDE_R
30
30
C

C308 4.7u_6.3V_X5R_06 MIC2_L 16 SIDE-R


ALC889 INT_MIC R278 1K_04 INT_MIC_R C309 4.7u_6.3V_X5R_06 MIC2_R 17 MIC2-L
port F 33 CAP C238 *10u_6.3V_X5R_06
MIC2-R CAP
D45
$ . C780
22u_6.3V_X5R_08 18 40
C246 *0.1u_16V_Y5V_04

*RB751V-40(lision) 19 CD-L JDREF R223 20K_1%_04


AUDG BluRay content
A

20 CD-GND 23
GND_AUDIO CD-R
port C LINE1-R
LINE1-L 24 R239 *5.1K_1%_04 AUDG

AVSS1
AVSS2
GND_AUDIO
Connect standby power(for
30
30
MIC1-L
MIC1-R
MIC1-L
MIC1-R
R327
R328
1K_04
1K_04
C310
C312
4.7u_6.3V_X5R_06
4.7u_6.3V_X5R_06
21
22 MIC1-L
MIC1-R port B C224 *100p_50V_NPO_04
protection
pop noise)
ALC892

26
42
LINE_L_C C311 4.7u_6.3V_X5R_06 R312 75_1%_04 LINE-L 30
LINE_R_C C289 4.7u_6.3V_X5R_06 R311 75_1%_04
LINE-R 30
AUDG

MIC1-VREFO-L
5V MIC1-VREFO-R
HeadPhone SV3H612
R972 0_04 R298
R276
B B
C360 C359 C379 C380 2.2K_04
C899 + 2.2K_04

2.2u_6.3V_X5R_04

0.1u_16V_Y5V_04

22u_6.3V_X5R_08

*22u_6.3V_X5R_08
MIC1-L

EEFCX0J221YR
R907 0_04 MIC1-R
HEADPHONE-LC 30
C706
C186
*680p_50V_X5R_04
R352 *0_04 *680p_50V_X5R_04
AMP_EN 28,29
R973 *20mil_P_04-nmnp
HP_SGND R202 *10mil_short AUDG
HP_AUDG 30
AUDG
HEADPHONE-L HEADPHONE-L_LPF SV3H612 ; AUDIO JACK< GND
C329 1u_16V_X7R_06 AUDG
16
15
14
13

HEADPHONE-R HEADPHONE-R_LPF U24 VIN


C307 1u_16V_X7R_06
OUTL
VDD
JD
SGND

C378 0.01u_16V_X7R_04 D02 ./(Z:H[\C899)


5/8 R963
HEADPHONE-L_LPF R343 470_04 1 12 C377 0.01u_16V_X7R_04
2 INL C2_3DL 11 5V 1M_04
3 VREF C1_3DL 10 D02 U19 SWITCH
REXT PGND AUDG
HEADPHONE-R_LPF R341 470_04 4 VSS 9 5/5
INR C1_SDR HP_AUDG_EN 30
C2_3DR

C376 0.01u_16V_X7R_04 R971

D
OUTA
C326
C328

C327

R342

Q60
SDA
SCL

17 C375 0.01u_16V_X7R_04 *10K_04 R964


VSS HP_AUDG R983 0_04 G
SV3H612V 2SK3018S3 1M_04 D02 ./AUDIO ACK AUDG@
5
6
7
8

S
5/22
A
AUDG A
2200p_50V_X7R_04

2200p_50V_X7R_04

1u_6.3V_X5R_04

0A1-A_1127_Alex
*240K_04

HP_SCL
HP_SDA
R378
R377
22_04
22_04
SMB_CLK
SMB_DATA
16,18,28,35
16,18,28,35
   !!DMFWP!DP/
Title
C388
C374
100p_50V_NPO_04
100p_50V_NPO_04
VIN 11,15,29,31,43,44,45,46,47,48,49,50,51 [27] Realtek ALC892
3.3V 11,17,2,24,25,30,39,42,43,44,46,47
Size Document Number Rev
3.3VS 10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
AUDG
R835 0_04
HEADPHONE-RC 30
GND_AUDIO
5V 15,21,23,24,30,40,43,44,46,47,48,49,50 SCHEMATIC1 6-71-P75D0-D03 2.0
5VS 11,13,14,15,16,29,30,31,33,35,46,47
Date: Monday, August 03, 2015 Sheet 27 of 62

5 4 3 2 1

B - 28 Realtek ALC892
Schematic Diagrams

PCM1861 + TAS5766DCA

5 4 3 2 1

AMP_PWR
AUDIO AMP FOR SPEAKER AMP_3.3VS AUDG_5766 AUDG_5766 C636 C115 C114 C639 C149 NEAR 5766 PIN6/PIN7
R103 *22_04
15,31,33 SMD_VGA_THERM
R638 22_04 1u_25V_X5R_06 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08
16,18,27,28,35 SMB_DATA

20K_1%_04

100K_1%_04

1u_25V_X5R_06
1u_6.3V_X5R_04

0.22u_16V_X7R_06

0.22u_16V_X7R_06
AMP_3.3VS 3.3VS R102 *22_04
15,31,33 SMC_VGA_THERM
D02 SHORT: L11 R639 22_04 AUDG_5766 AUDG_5766 C148 AUDG_5766 L9 AUDG_5766 AUDG_5766
16,18,27,28,35 SMB_CLK
5/14 HCB1608KF-121T30 0.22u_16V_X7R_06 HCB1608KF-121T30
5766_BSPR . 5766_OUTR+

C155 C120 C156 C146


D R641 *20mil_P_04 5766_OUTPR R101 D
R104 *20mil_P_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 22u_6.3V_X5R_08 1000p_50V_X7R_04
R600 *20mil_P_04 3.3_06

AUDG_5766 C150

AUDG_5766 R654
R599 *20mil_P_04

C154

C153

R655

C152
AUDG_5766 AUDG_5766 AUDG_5766 AUDG_5766 C147

AUDG_5766

AUDG_5766
AUDG_5766
AUDG_5766
3.3VS ADC_MCLK
AUDG_5766 5766_OUTNR 0.01u_50V_X7R_04

5766_GVDD
5766_DACR

5766_GAIN
5766_INPR

5766_INNR
5766_SDA
5766_SCL
ADC_BCLK C143
0.22u_16V_X7R_06 L8
C633 ADC_DOUT 5766_BSNR HCB1608KF-121T30 AUDG_5766
R632 . 5766_OUTR-
*0.1u_10V_X7R_04
100K_1%_04 C142

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

B.Schematic Diagrams
U9
C A 1000p_50V_X7R_04 R94

DIN

BCLK

SCLK

GPIO3

ADR2

GPIO2

GPIO1

SCL

SDA

GND3

AVDD

DACR

INPR

INNR

GND2

GAIN/FSW

GVDD

PVCC2

PVCC1

BSPR

OUTPR

GND1

OUTNR

BSNR
31 KBC_MUTE#
D40
RB751V-40(lision) 3.3_06
C A

Sheet 28 of 62
Reserve for AMP_EN deley AUDG_5766
18,21,29,31,32,38,44,46 SUSB#
D39
RB751V-40(lision) D02 1K_04 C145
C A 4/30
20 PCH_MUTE#
D41
2W 0.01u_50V_X7R_04

PCM1861 +
5

*RB751V-40(lision) R623
R631 0_04 1 1K_04 TAS5766DCA 49
Front Speaker R / L
27 EAPD_MODE PowerPAD
4 AMP_EN J_SPK1 AUDG_5766
AMP_EN 27,29
2
18,27 HDA_RST#
C627 4
3 TAS5766DCA

XSMT/UVP
U43 AUDG_5766
3

FAULTZ
MC74VHC1G08DFT2G *0.1u_16V_Y5V_04

CPVDD

OUTNL
PVCC3

PVCC4

OUTPL
LRCLK
1

CAPM
LDOO

DVDD

VNEG
GND4

GND5

GND6

AVCC

GND7
CAPP
ADR1

DACL

BSNL
C

BSPL
C

INNL
INPL
R76 0_04 TAS5766MDCA 85204-04001
3.3VS R82 0530 CHANGE VALUE
*10K_04 X1 4 Ohm Speaker

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48
1 2
G GND

5766_OUTPL

5766_OUTNL
ADC_LRCK C133 L7

5766_CAPM

5766_VNEG
5766_LDOO

5766_CAPP

5766_DACL

5766_BSPL
5766_INPL

5766_INNL
4 3 R87 22_04 ADC_MCLK 0.22u_16V_X7R_06 HCB1608KF-121T30
VCC OUT AUDG_5766 5766_BSNL . 5766_OUTL-

AUDG_5766

AUDG_5766

AUDG_5766
C135 C136 FCO-536B 24.576000MBA R95 22_04 ADC_MCLK1
PCM1861 C131

AUDG_5766
0.1u_16V_Y5V_04 1u_6.3V_X5R_04 MD6/MD5/MD2 Analog MUX and Gain Select R86
0 0 0 SE Ch 1 (VINL1 / VINR1) AMP_EN AMP_3.3VS 1000p_50V_X7R_04

1u_25V_X5R_06
1u_6.3V_X5R_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04

0.22u_16V_X7R_06

0.22u_16V_X7R_06
0 0 1 SE Ch 2 (VINL2 / VINR2) 3.3_06
0 1 0 SE Ch 3 (VINL3 / VINR3)
0 1 1 SE Ch 4 (VINL4 / VINR4) AUDG_5766 C132
PCM1863 1 0 0 SE Ch 4 with 12dB gain 0.01u_50V_X7R_04
MD0 Control Method Select Terminal: 1 0 1 SE Ch 4 with 32dB gain
PCM1861
R824
PCM1863
R824

SPI (tied high) or I2C (tied low)
MD1 SPI-Mode Chip Select or
1 1 0 Diff Ch1(VIN1P/VIN1M,VIN2P/VIN2M) C113
0.22u_16V_X7R_06
L6
HCB1608KF-121T30 AUDG_5766
1 1 1 Diff Ch2(VIN3P/VIN3M,VIN4P/VIN4M)
MD0 R271
R271 I2C-Mode Address Terminal
MD2 SPI-Mode Master Out, Slave IN or
with 12dB gain . 5766_OUTL+
MD4 Audio Format
C122

C121

C119

C118

C117

C116
MD1 R272
R274
R272 I2C-Mode SDA high = Left Justified, low = I2S AMP_PWR C129
MD3 SPI-ModeSerial Bit Clock I2C-Mode MD3 Filter Select
MD2 R821

R273
R274
Serial Bit Clock 0 = FIR Decimation Filter,
AUDG_5766 AUDG_5766 AUDG_5766 AUDG_5766 C637 C622 C621 C620 C638
1000p_50V_X7R_04
MD4 SPI-Mode Master In, Slave Out or 1 = IIR Short Latency Decimation Filter
MD3 R822
R273
I2C-Mode GPIO0, MD1/MD0 Audio Interface Mode
R75 *0_04 1u_25V_X5R_06 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 10u_25V_X5R_08 AUDG_5766
R85
3.3_06
MD5 GPIO 1, Interrupt A or 0 0 Slave Mode,256fS,384fS,512fS Auto Detect
B
MD4 R293 R293
Digital Microphone Input 0 1 Master Mode (512fS)
18 AMP_FAULTZ
B
MD6 GPIO 2, Interrupt B or 1 0 Master Mode (384fS)
MD5 R294 R294
Digital Microphone Clock Output 1 1 Master Mode (256fS) AUDG_5766 AUDG_5766 AUDG_5766 AUDG_5766 AUDG_5766 C130
0.01u_50V_X7R_04
MD6 R295 R295
NEAR 5766 PIN41/PIN42/PIN43
AUDG_5766

C846 R893 C824 R873 U23


1u_16V_X7R_06 7.5K_1%_04 1u_16V_X7R_06 100_1%_04 3.3VS 3.3VS 3.3VS
27,29 FRONT_R ADC_VINR AUDG_1861 PC172 2.2u_6.3V_X5R_04 1 30 PC80 2.2u_6.3V_X5R_04 AUDG_1861
VINL2/VIN1M VINR3/VIN3P
C845 AUDG_1861 PC171 2.2u_6.3V_X5R_04 2 29 PC82 2.2u_6.3V_X5R_04 AUDG_1861
D031B AUDIO R892 VINR2/VIN2M VINL3/VIN4P R823 R824 R839 R822 R375
3900p_50V_X7R_04 ADC_VINL 3 28 PC83 2.2u_6.3V_X5R_04 AUDG_1861
*22K_04 VINL1/VIN1P VINR4/VIN3M
ADC_VINR 4 27 PC84 2.2u_6.3V_X5R_04 3.3VS
VINR1/VIN2P VINL4/VIN4M AUDG_1861
C773 R862 C804 R874 AUDG_1861 *10K_04 10K_04 *10K_04 *10K_04 *2.2K_04
1u_16V_X7R_06 7.5K_1%_04 AUDG 1u_16V_X7R_06 100_1%_04 Mic_Bias 5 26 PCM_MD0 PCM_MD1 PCM_MD4 Mic_Bias
ADC_VINL Mic Bias MD0
27,29 FRONT_L
AUDG_1861 PC170 2.2u_6.3V_X5R_04 6 25 PCM_MD1 R837 R838 R821 PCM_MD0 PCM_MD3
C847 VREF MD1
R872 AUDG_1861 7 24 PCM_MD3
ADC_3.3VS_D 3.3VS 3900p_50V_X7R_04 AGND MD3 *10K_04 *10K_04 *10K_04
*22K_04 8 23 PCM_MD2 PCM_MD6 R272 R271 R293 R273 R361 C354
ADC_3.3VS_A AVDD MD2
R362 3.3_06
AUDG_1861 9 PCM1861 22 PCM_MD4 PCM_MD5
C357 C358 AUDG XO MD4
10 21 PCM_MD5 PCM_MD2 10K_04 *10K_04 10K_04 10K_04 *10K_04 4.7u_6.3V_X5R_06
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 XI MD5
A A
R1009 *0_04 PCM_INT GND_AUDIO PC85 2.2u_6.3V_X5R_04 11 20 PCM_MD6 D02 1 R295 R294 R274
16 PCM_INT_1863 LDO MD6 4/30 GND_AUDIO GND_AUDIO GND_AUDIO GND_AUDIO
GND_AUDIO GND_AUDIO D02 SHORT: GND_AUDIO 12 19 PCM_INT GND_AUDIO GND_AUDIO
5/12 DGND INT
ADC_3.3VS_A 3.3VS D02 ./PCM1863SMBUS
   !!DMFWP!DP/
13 18 ADC_DOUT R965 10K_04 10K_04 10K_04
ADC_3.3VS_D DVDD DOUT
5/26
R926 3.3_06 R376 *20mil_P_04 R310 *20mil_P_04 14 17 ADC_BCLK
R270 *20mil_P_04 C860 *1000p_50V_X7R_04 IOVDD BCK GND_AUDIO GND_AUDIO Title
C859 C871
16,18,27,28,35 SMB_DATA
R985 *22_04 PCM_MD2 R374 *20mil_P_04 C285 *0.1u_16V_Y5V_04 ADC_MCLK1 15
SCKI LRCK
16 ADC_LRCK 10K_04 GND_AUDIO [28] PCM1861+TAS5766DCA
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 for EMI Size Document Number Rev
16,18,27,28,35 SMB_CLK
R986 *22_04 PCM_MD3 GND_AUDIO AUDG_1861 GND_AUDIO
29 AMP_PWR A3 SCHEMATIC1 6-71-P75D0-D03 2.0
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS
AUDG_1861 AUDG_1861 Date: Monday, August 03, 2015 Sheet 28 of 62
5 4 3 2 1

PCM1861 + TAS5766DCA B - 29
Schematic Diagrams

Subwoofer
5 4 3 2 1

AMP POWER 10V VIN

MP8715DN PR215 PC148 PL8


PU11 4.7_06 0.1u_10V_X7R_04 BCIHP-0730 4R7M 10V AMP_PWR

PR217
1
IN BST
3 4.7UH_6.8*7.3*3.5
PCB Footprint = BCIHP0735A 10V/6A PJ52
OPEN-5mm
4 2 2 1
EN/SYNC SW
R735

PR216
3K_1%_04

PC149

PC146
D 7 5 PR218 D
100K_1%_04

1
VCC FB

4.7u_25V_X5R_08

POK
8 9 *0_04 + +
PR220 SS GND

*100K_1%_04

115K_1%_04

10u_25V_X5R_08

10u_25V_X5R_08

10u_25V_X5R_08
*1000p_50V_X7R_04

0.1u_25V_X7R_06
6
PC145

2
180u_16V_6.3*5.8

180u_16V_6.3*5.8
PC144
100K_1%_04 PC150

PR219
0.01u_25V_X7R_04
*0.01u_50V_X7R_04
PR213

PC162

PC161

PC169
PQ31A 100K_1%_04

PC156

PC155
6

3
MTDK5S6R D D
J13 PR221

10K_1%_04
SUSB# 2G *CV-40mil 5G
18,21,28,31,32,38,44,46 SUSB#
S 100K_1%_04 S PQ31B

4
07/27 Follow %change MTDK5S6R

PR214
B.Schematic Diagrams

D02 1
5/26

10V 10V

SUB WOOFER FOR P750ZM$ 


Sheet 29 of 62 FOR P770ZM C794 C874 C877 C795 C878 C793 C796

10
16

26
32
U55

1
R901

10u_25V_X5R_08

10u_25V_X5R_08

4.7u_25V_X5R_08
0.1u_16V_Y5V_04

0.1u_16V_Y5V_04

0.1u_16V_Y5V_04

0.1u_16V_Y5V_04
AMP_3V3LDO

Subwoofer *10K_04
C C

VLDO

RVDDP
RVDDN

LVDDN
LVPPD
AMP_EN 17 21 OSCIN
27,28 AMP_EN SD OSCIN
R900 *10mil_short 19 20
MUTE OSOC R899

R864 R879 R880 R881 R915 AUDG_2607 C849 0.1u_10V_X7R_04 6 11


*10K_04 *10K_04 *10K_04 *10K_04 120K_04 RINN ROUTP1 12
R922 C850 0.1u_10V_X7R_04 7 ROUTP2 10K_04 AUDG_2607 AUDG_2607 AUDG_2607
6.34K_1%_04 20 Mil RINP 13 AUDG_2607 AUDG_2607
2CH_SUBWOOFER_RC C826 0.1u_10V_X7R_04 4 RGND AUDG_2607 AUDG_2607 10V
GAIN1_R LINN 14
GAIN0_R C825 0.1u_10V_X7R_04 3 APA2607QBI ROUTN1 15
AUDG_2607 LINP ROUTN2
DRC1_R L54
DRC0_R R921 R875 PFLAG 18 31 40 mil HCB1005KF-121T20 J_SUBWOOF1 C875 C876 C792 C873
PFLAG GAIN1_R 25 PFLAG LOUTP2 30 SUBWOOFER+
100K_1%_04 *100K_1%_04 GAIN0_R 24 GAIN1 LOUTP1 2

10u_25V_X5R_08

10u_25V_X5R_08

10u_25V_X5R_08

10u_25V_X5R_08
DRC1_R 23 GAIN0 29 L53 1
R863 R876 R877 R878 R914 AMP_3V3LDO DRC0_R 22 DRC1 LGND HCB1005KF-121T20 88266-02001
10K_04 10K_04 10K_04 10K_04 *120K_04 DRC0 27 SUBWOOFER-
LOUTN1 4 Ohm Speaker

Case_GND

C923

C922
AUDG_OP AUDG_2607 2 28
3V3LDO LOUTN2
40 mil

AGND
VREF
R913 18K_1%_04 PMAX 9
PMAX
10V 5VS OP_PWR

1000p_50V_X7R_04

1000p_50V_X7R_04
AUDG_2607 AUDG_2607 AUDG_2607 AUDG_2607 AUDG_2607
AUDG_2607 AUDG_2607 C805 R912 AUDG_2607 AUDG_2607

33
R928 *0_06 D02 ./`NOISE
R927 0_06 0.1u_10V_X7R_04 10K_04 5/8
R917 H]^R911_(`WOOFER NOISE)
B C827 R917 *20mil_P_04 B
R896 AUDG_2607 AUDG_2607 0.1u_10V_X7R_04
100K_04 R947 *20mil_P_04 R911 *20mil_P_04
OP_PWR
C865 0.1u_16V_Y5V_04
OP_PWR AUDG_2607 GND_AUDIO
R895 C864 0.1u_16V_Y5V_04
8

33K_1%_04
3 R894 C790 0.47u_6.3V_X5R_04 AUDG_OP
FILTER FC: 440Hz
V+

27,28 FRONT_R +
C848 3.32K_1%_04 AUDG_2607 GND_AUDIO
0.1u_10V_X7R_04 1 SUB_R R918 *0_04 OP_PWR
R897 OUT R898 R840 U52B

8
100K_04 2 U50A 1.4K_1%_04 1.4K_1%_04
V-

- LM358G C862 0.1u_10V_X7R_04 OUTPUT1 INPUT2+ 5 SUB Woofer out

V+
+
4

OP_PWR R843 C791 7 2CH_SUBWOOFER_RC


AUDG_OP R920 R909 U52A C861 OUT

8
R825 AUDG_OP 3.32K_1%_04 3.32K_1%_04 6

V-
*4.3K_1%_04

0.1u_10V_X7R_04
100K_04 SUB_L 3 *0.1u_10V_X7R_04 - R842

V+
+ LM358G
OP_PWR

4
OP_PWR 1 0_04
R826 OUT AUDG_OP
8

33K_1%_04 C872 R910 C863 2 INPUT2- AUDG_OP

V-
5 - OP_PWR OP_PWR
V+

27,28 FRONT_L +
C782 *0.1u_10V_X7R_04 LM358G R908

*4.3K_1%_04

4
0.1u_10V_X7R_04
0.1u_10V_X7R_04 7 0_04 R841
R827 OUT C781 C789 AUDG_OP
100K_04 6 U50B AUDG_OP *100K_04
V-

0.1u_16V_Y5V_04

0.1u_16V_Y5V_04
A
LM358G A
4

R919
*100K_04 AUDG_OP

   !!DMFWP!DP/
AUDG_OP AUDG_OP
AUDG_OP AUDG_OP

Title
R292 *20mil_P_04 AUDG_OP AUDG_OP AUDG_OP [29] SUBWOFFER
Size Document Number Rev
11,15,27,31,43,44,45,46,47,48,49,50,51 VIN
AUDG_OP GND_AUDIO
28 AMP_PWR A3 SCHEMATIC1 6-71-P75D0-D03 2.0
11,13,14,15,16,27,30,31,33,35,46,47 5VS
Date: Monday, August 03, 2015 Sheet 29 of 62

5 4 3 2 1

B - 30 Subwoofer
Schematic Diagrams

Audio Jack

5 4 3 2 1

USB3.0 PORT4 & AUDIO JACK D03 ./


6/30

P750ZM & P770ZM % C956 0.1u_16V_Y5V_04

FOR P750ZM$  FOR Audio JACK BOARD H17


H6_0B3_7D3_7
H21
H6_0B3_7D3_7
C390 0.1u_16V_Y5V_04

R984 10_04 HP_AUDG C771 0.1u_16V_Y5V_04


FOR P770ZM

D
J_AUDIO1 C714 0.1u_16V_Y5V_04
5V 1 2 Q61
3 1 2 4 USB_PP6_A G MTN7002ZHS3 C687 0.1u_16V_Y5V_04
3 4 27 HP_AUDG_EN
5 6 USB_PN6_A

S
7 5 6 8
D 5VS D
9 7 8 10 USB3_TXP6_A GND AUDG
3.3V 9 10
11 12 USB3_TXN6_A D02 ./AUDIO ACK AUDG@
27,30 HP_AUDG 11 12
13 14 5/12
27,30 JD_SENSEA 13 14
15 16 USB3_RXP6_A AUDG
27,30 JD_SENSEB 15 16
17 18 USB3_RXN6_A
27,30 HEADPHONE-RC 17 18
19 20
27,30 HEADPHONE-LC 19 20
21 22 MIC1-R 27,30
23,24,30,44,46 DD_ON# 21 22
23 24 MIC1-L 27,30
27,30 LINE-R 23 24
25 26
27,30 LINE-L 25 26
27 28 SIDE_R 27,30
29 27 28 30
27,30 SPDIFO 29 30 SIDE_L 27,30
R128 10K_1%_04 LINE_SENSE

B.Schematic Diagrams
*51049-03041-001 JD_SENSEA R184 20K_1%_04 MIC_SENSE
27,30 JD_SENSEA
R727 39.2K_1%_04 HP_SENSE
AUDG AUDG JD_SENSEB R728 5.1K_1%_04 SIDE_SENSE
27,30 JD_SENSEB

USB3_TXP6 R389 *0_04 USB3_TXP6_A


USB3_TXN6 R388 *0_04 USB3_TXN6_A
USB_PN6 R393 *0_04 USB_PN6_A
USB_PP6
USB3_RXP6
USB3_RXN6
R392
R380
R379
*0_04
*0_04
*0_04
USB_PP6_A
USB3_RXP6_A
USB3_RXN6_A FOR P750ZM Sheet 30 of 62
FOR P770ZM$ 
FOR USB = > D02 
5/5 U29
USBVCC3.0_4
Audio Jack
C 3 1 C
USB3_TXP6 C393 0.1u_10V_X7R_04 USB3_TXP6_R OC# VOUT C403 C404
20 USB3_TXP6
5
5V VIN
USB3_TXN6 C392 0.1u_10V_X7R_04 USB3_TXN6_R 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
20 USB3_TXN6
USB_PN6 R395 0_04 4 3 USB_PN6_R C391 4 2
20 USB_PN6 EN# GND
L21 10u_6.3V_X5R_06
USB_PP6 R394 0_04 *WCM2012F2S-161T03-short 1 2 USB_PP6_R UP7549UMA5-20
20 USB_PP6
USB3_RXP6 R382 0_04 USB3_RXP6_R PCB Footprint = M-SOT23-5A GND
20 USB3_RXP6
GND
USB3_RXN6 R381 0_04 USB3_RXN6_R
20 USB3_RXN6
DD_ON# R400 *10mil_short_04
23,24,30,44,46 DD_ON#

LINE
J_LINE1 C417 22u_6.3V_X5R_08
5 D15
LINE_SENSE 4 C418 22u_6.3V_X5R_08 GND
USBVCC3.0_4
L36 FCM1005KF-121T03 3 USB3_TXP6_R 10 1 USB3_TXP6_RJ
27,30 LINE-R
6 USB3_TXN6_R 9 2 USB3_TXN6_RJ
L34 FCM1005KF-121T03 2 8 3 J_USB3_4
27,30 LINE-L
1 USB3_RXP6_R 7 4 USB3_RXP6_RJ
C645 C644 AJ006AH-006L10P USB3_RXN6_R 6 5 USB3_RXN6_RJ USB3_TXP6_RJ 9 GND1
R670 R127 R672 R666 1 SSTX+ SHIELD

Standard-A
PUSB3F96 USB3_TXN6_RJ 8 VBUS GND2
680p_50V_X7R_04

680p_50V_X7R_04

USB_PN6_RJ 2 SSTX- SHIELD


*1K_04

*1K_04

22K_04 22K_04 AUDG D20 4 D- GND3


USB_PP6_RJ 3 GND SHIELD
D03 EMI aAUDG USB_PN6_R 10 1 USB_PN6_RJ USB3_RXP6_RJ 6 D+ GND4
B
AUDG AUDG 6/30 USB_PP6_R 9 2 USB_PP6_RJ 7 SSRX+ SHIELD B
8 3 USB3_RXN6_RJ 5 GND_D
AUDG AUDG MIC 7
6
4
5
SSRX-

AUDG AUDG J_MIC1 C19007-90905-L NEW


5 PUSB3F96 6-21-B4A30-009
MIC_SENSE 4 GND GND
MIC1-R L14 HCB1608KF-121T30 3
27,30 MIC1-R
6
27,30 MIC1-L
MIC1-L L38 HCB1608KF-121T30 2
1
HP
C182 C654 AJ006AH-006L10P J_HP1
R721 L41 AUDG 5
56_04 FCM1005KF-121T03 HP_SENSE 4
680p_50V_X7R_04

680p_50V_X7R_04

HEADPHONE-RC 3
27,30 HEADPHONE-RC
HP1_PLUG 6
AUDG HEADPHONE-LC 2
27,30 HEADPHONE-LC
D03 EMI R974/R975 L40 1
6/30 R715 FCM1005KF-121T03 AJ006AH-006L10P
56_04
D03 EMI aAUDG
6/30
SPDIFO R716 R720 C690 C686 R719 R714 R733 R734

AUDG AUDG J_SPDIF1

0_04

*0_04
*1K_04

*1K_04
100p_50V_NPO_04

100p_50V_NPO_04
1

22K_04

22K_04
SIDE_L L48 HCB1608KF-121T30 2
27,30 SIDE_L
SIDE_R L42 HCB1608KF-121T30 3
27,30 SIDE_R
SIDE_SENSE 4
C802 C756 5
5VS AUDG
A A
AUDG 680p_50V_X7R_04 A AUDG AUDG AUDG AUDG AUDG AUDG
680p_50V_X7R_04 B DRIVE AUDG
27,30 HP_AUDG
SPDIFO L51 HCB1608KF-121T30 C IC
27,30 SPDIFO

   !!DMFWP!DP/
TX
C779 1.56

0.1u_16V_Y5V_04 Title
R861
*220_04
C801
180p_50V_NPO_04
[30] AUDIO JACK
Size Document Number Rev
5VS 11,13,14,15,16,27,29,31,33,35,46,47
GND_AUDIO GND_AUDIO GND_AUDIO
5V 15,21,23,24,27,40,43,44,46,47,48,49,50 A3 SCHEMATIC1 6-71-P75D0-D03 2.0
3.3V 11,17,2,24,25,39,42,43,44,46,47
Date: Monday, August 03, 2015 Sheet 30 of 62

5 4 3 2 1

Audio Jack B - 31
Schematic Diagrams

EC IT8587

1 2 3 4 5 6 7 8

IT8587 KBC_AVDD
MODEL_ID RA RB PROJECT NAME
VDD3 VDD3

L12 V1.0 10K X P750DM 5VS


HCB1005KF-121T20 R657 R656
R723 *10mil_short V1.0 X 10K P770DM
VDD3 VDD3

2
. 5VS Q13A 2.2K_04 2.2K_04

G
C641 C691 C651 C643 C166 C170 V1.0 10K 10K P775DM
1 6 KBC_SMBus_CLK1
15,28,33 SMC_VGA_THERM
10u_10V_Y5V_08 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04

D
VDD3 MTDK5S6R

G
RA
C650 MODEL_ID R125 10K_04 4 3 KBC_SMBus_DAT1
15,28,33 SMD_VGA_THERM
A KBC_AGND A

D
L37 HCB1005KF-121T20 0.1u_16V_Y5V_04 R135 *10K_04 MTDK5S6R
Q13B
3.3VS .
P775 RA&RB RB 07/27 Follow %change
EMI Solution R669 R671 J12

114
121
127
./P775DM 10K_04 1K_04 *CV_40mil

11

26
50
92

74
3
U45A OPTION ('ECEXECL ) 6/16 VDD3 1 2

^EXECL  ' U45B

VCC

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6

VBAT

AVCC
10 58
20,32,42 LPC_AD0 GPM0/LAD0 KSI0/STB#
9 59 76 100
20,32,42 LPC_AD1 GPM1/LAD1 KSI1/AFD# 15 VGA_THROTTLE GPJ0/TACH2 5VT/SSCE0#/GPG2
B.Schematic Diagrams

8 60 80
20,32,42 LPC_AD2 GPM2/LAD2 KSI2/INIT# 32 KBC2_ADC GPJ4/DAC4/DCD0#
7 61 81
20,32,42 LPC_AD3 GPM3/LAD3 KSI3/SLIN# 34 VGA_FAN GPJ5/DAC5/RIG0#
13 62
20,32 PCLK_KBC GPM4/LPCCLK LPC KSI4
6 63 78 56
20,32,42 LPC_FRAME# GPM5/LFRAME# KSI5 18 ME_WE GPJ2/DAC2//TACH0B KSO16/SMOSI/GPC3 BT_EN 25
R651 *0_04 5 64 57
20,32,42 SERIRQ GPM6/SERIRQ KSI6 KSO17/SMISO/GPC5 WLAN_EN 25
16,25,26,32,36,38,41 BUF_PLT_RST#
22 65
32 KBC2_DAC
68 C D FOR WLAN
GPD2/LPCRST#/5VT K/B MATRIX KSI7 GPI2/ADC2
R680 100K_04 KBC_WRESET# 14 36
IT8587
VDD3 WRST# KSO0/PD0
C656 0.1u_16V_Y5V_04 37 71 93
KSO1/PD1 25 3G_EN GPI5/ADC5/DCD1# 5VT/CLKRUN#/ID0/GPH0 USB_CHARGE_EN 45,46
126 38 72

Sheet 31 of 62
R653 0_04
32 GA20 GPB5/GA20 KSO2/PD2 17 GPIO2_FB_TGL_REQ GPI6/ADC6/DSR1#
4 39 94
51 AC_IN# GPB6/KBRST# KSO3/PD3 5VT/CRX1/SIN1/SMCLK3/ID1/GPH1 EC_CTRL_EN# 33
OPTION 16 40 PR276 *0_04
34 LED_ACIN GPC7/PWUREQ#/BBO/SMCLK2ALT KSO4/PD4 PMOSET_CONTROL# 51
20 41
18 AC_PRESENT GPE7/L80LLAT/5VT KSO5/PD5
R681 *0_04 42 96 D03 1B

EC IT8587 18,21 PM_PCH_PWROK

20,32 SMI#
R136 0_04
KBC_SCI#
23
15 GPD3/ECSCI#/5VT
KSO6/PD6
KSO7/PD7
KSO8/ACK#
43
44
45
32
32
KBC_SMBus_CLK1
KBC_SMBus_DAT1
18
KBC_SMBus_CLK1
KBC_SMBus_DAT1
SMD_CPU_THERM
115
116
118
GPC1/SMCLK1/5VT
GPC2/SMDAT1/5VT
5VT/ID3/GPH3
5VT/ID4/GPH4
5VT/ID5/GPH5
97
98
99
KBC2_GPIO0
KBC2_GPIO1
KBC2_GPIO2
WLAN_PWR_EN
32
32
32
25
6/29

GPD4/ECSMI# KSO9/BUSY 46 GPF7/SMDAT2/PECIRQT# 5VT/ID6/GPH6


77 DAC KSO10/PE 51 82
28 KBC_MUTE# GPJ1 KSO11/ERR# 5VT/EGAD/GPE1 DGPU_PWRGD 15,17 for MXM card
B 52 24 83 B
KSO12/SLCT 34 EC_SSD_LED# GPA0/PWM0/5VT 5VT/EGCS#/GPE2 DGPU_RST# 15 optimus
53 84
34 CPU_FAN
C661
CPU_FAN
0.1u_16V_Y5V_04
79
GPJ3/DAC3/TACH1B
IT8587 KSO13
KSO14
54
55
34 LED_SCROLL#
28
29 GPA2/PWM2/5VT
5VT/EGCLK/GPE3
48
DGPU_PWR_EN# 15
2/10
KSO15 34 LED_NUM# GPA3/PWM3/5VT TACH1/TMA1/GPD7 VGA_FANSEN 34
ADC 30 119
34 LED_CAP# GPA4/PWM4/5VT 5VT/CRX0/GPC0 ALL_SYS_PWRGD 11,21
BAT_DET 66
BAT_VOLT 67 GPI0/ADC0 2
GPI1/ADC1 CK32KE/GPJ7 GPIO_FB_CLAMP 17
69 128
2 THERM_VOLT GPI3/ADC3 CK32K/GPJ6 3G_PWR_EN 25
70 125
51 TOTAL_CUR GPI4/ADC4 32 KBC2_INT# GPE4/PWRSW
106
5VT/SSCE1#/VCEN/TM/GPG0 CCD_EN 24
MODEL_ID 73 IT8587E/FX EC pin 128 CK32K/GPJ6 HEC GPIO
GPI7/ADC7/CTS1#
107
5VT/( PD )DTR1#/SBUSY/ID7/GPG1 DD_ON 23,45,46
SMBUS
2,51 SMC_BAT
R132 47_04 KBC_SMBus_CLK0 110 R658 *10K_04
VDD3 RSMRST# PCH & EC ?  PULL DOWN@ A ,B 1
DEFAULTE  , (F G   , RTCH  I J )
R133 47_04 KBC_SMBus_DAT0 111 GPB3/SMCLK0/5VT 95
2,51 SMD_BAT GPB4/SMDAT0/5VT 5VT/CTX1/SOUT1/DAT3/ID2/GPH2 BKL_EN 11
R640 *0_04 EC_PECI 117 R722 10K_04 VDD3
18 SMC_CPU_THERM GPF6/SMCLK2/PECI
R660 43_1%_04 35
17,3 H_PECI 5VT/RTS1#/GPE5 17 EC_RSMRST# 31 DEBUG PORT 3G_EN R126 10K_04
5VT/LPCPD#/GPE6 SB_KBCRST# 20
C642 *47PF_50V_X5R_04 VDD3 GPIO2_FB_TGL_REQ R124 10K_04
PWM 47 KBC2_ADC R677 10K_04
TACH0A/GPD6 CPU_FANSEN 34
27 KBC_BEEP
25 Pin 66~73K E gpio ? L input SMC_BAT R131 1.5K_04
GPA1/PWM1/5VT
34 LED_BAT_CHG
31
GPA5/PWM5/5VT TMRI0/GPC4
120
LOT6_CHG 51
J_80DEBUG1 M N ouput 6 O P # pull high. SMD_BAT R134 1.5K_04
32 124 BAT_DET R729 10K_04
34 LED_BAT_FULL GPA6/PWM6/SSCK/5VT TMRI1/GPC6 PM_PWROK 21 1
34 3IN1
34 LED_PWR GPA7/PWM7/RIG1#/5VT 2
80CLK
PS/2 123 3
CTX0/TMA0/GPB2 LAN_WAKE# 36 4
80CLK 85 KBC_SMBus_CLK0 R120 *1.5K_04
C 3IN1 87 GPF0/PS2CLK0/TMB0/CEC/5VT 85204-04001 KBC_SMBus_DAT0 R123 *1.5K_04 C
GPF2/PS2CLK1/DTR0#/5VT 19
5VT/L80HLAT/BAO/GPE0 SWI# 17,18
86 PCLK_KBC R676 *10_04 PCLK_KBC_R C163 *10p_50V_NPO_04
18,21,28,29,32,38,44,46 SUSB# GPF1/PS2DAT0/TMB1/5VT
88
18,32,44,46,47 SUSC# GPF3/PS2DAT1/RTS0#/5VT 112 R309 *0_04 BAT_VOLT C757 1u_6.3V_X5R_04
5VT/RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 RSMRST_PWRGD_N 17
BATT_BOOST# 89
90 GPF4/PS2CLK2/5VT
18 PCH_SLP_SUS# GPF5/PS2DAT2/5VT VDD3
R289 0_04
SLP_SUS# 17,18,45,46
WAKE UP
18 C
32,46 PWR_SW# GPD0/RI1#
21 AC
11,34 LID_SW# GPD1/RI2#/5VT VDD3 31,32,51 SMC_BAT
D47 A
101 ALSPI_CE# R667 0_04 BAV99 RECTIFIER
5VT/FSCE#/GPG3 HSPI_CE# 16
GP INTERRUPT 102 ALSPI_MSI R663 0_04 D03
G C
5VT/FMOSI/GPG4 HSPI_MSI 16 VDD3 VDD3
33 103 ALSPI_MSO R662 0_04 AC
18 PWR_BTN# GPD5/GINT/CTS0#/5VT 5VT/FMISO/GPG5 HSPI_MSO 16 31,32,51 SMD_BAT
105 ALSPI_SCLK R659 0_04 R968 D14 A
5VT/FSCK/GPG7 HSPI_SCLK 16
UART U59 BAV99 RECTIFIER

5
108 104 *10K_04 *MC74VHC1G08DFT2G C
33 TP_PWR_EN GPB0/RXD/SIN0/5VT 5VT/DSR0#/GPG6 AIRPLAN_LED# 34
109 R969 1 AC
3 H_PROCHOT_EC GPB1/TXD/SOUT0/5VT 51 BAT_DET
4 D43 A

D
*10K_04 2 BAV99 RECTIFIER
C
VCORE

Q62
AVSS

G AC
VSS1
VSS3
VSS4
VSS5
VSS6
VSS7

51 BAT_VOLT

3
Q63 D44 A

S
D59 *DTC114EUA *MTN7002ZHS3 BAV99 RECTIFIER
IT8587E/FX C A B
VIN
12

1
27
49
91
113
122

75

RB751V-40(lision) D11 3.3VS


BAV99: 6-06-00993-011
A C KBC_SCI# *ZD5231BS2
17 SCI#
R970 0_04
G
D 31 EC_RSMRST# RSMRST# 18,45 D

E
C167 R119 Q47 C939
3.3VS *10mil_short MTN7002ZHS3
0.1u_16V_Y5V_04 S D BATT_BOOST#
15 TH_ALERT#1

   !!DMFWP!DP/
5

R637 *0_04 *0.1u_16V_Y5V_04


1 KBC_AGND
4
2 Title
U11
KBC2_SCI# 32
J_FLASH1
VIN 11,15,27,29,43,44,45,46,47,48,49,50,51
[31] EC IT8587
*MC74VHC1G08DFT2G R121 33_04 KBC_SMBus_CLK0
5VS 11,13,14,15,16,27,29,30,33,35,46,47
3

2 R122 33_04 KBC_SMBus_DAT0 Size Document Number Rev


1
88266-02001
3.3VS
VDD3
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
16,17,18,20,21,25,32,34,36,43,45,46,47,50,51
A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 31 of 62


1 2 3 4 5 6 7 8

B - 32 EC IT8587
Schematic Diagrams

Second EC IT8587

5 4 3 2 1

KBC_AVDD2 L39
R183 *10mil_short HCB1005KF-121T20
VDD3
. VDD3
C663 C640 C649 C181
C665 C664 C666
0.1u_16V_Y5V_04 10u_10V_Y5V_08 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04

C648 P770
L35 HCB1005KF-121T20 0.1u_16V_Y5V_04 KBC_AGND
EC_VCC
3.3VS . Backlight KB 15" Backlight KB 17"
D
EMI Solution D

114
121
127
11

26
50
92

74
3
U44

VCC

VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

VBAT

AVCC
10 58 KB-SI0 KB-SI0 25 KB-SI0 25
20,31,42 LPC_AD0 LAD0 KSI0/STB#
9 59 KB-SI1 KB-SI1 24 KB-SI1 24
20,31,42 LPC_AD1 LAD1 KSI1/AFD#
8 60 KB-SI2 KB-SI2 23 KB-SI2 23
20,31,42 LPC_AD2 LAD2 KSI2/INIT#
7 61 KB-SI3 KB-SI3 22 KB-SI3 22
20,31,42 LPC_AD3 LAD3 KSI3/SLIN#
13 62 KB-SI4 KB-SI4 21 KB-SI4 21
20,31 PCLK_KBC LPCCLK KSI4
6 63 KB-SI5 KB-SI5 20 KB-SI5 20
20,31,42 LPC_FRAME# LFRAME# KSI5
R650 0_04 5 LPC K/B MATRIX 64 KB-SI6 KB-SI6 19 KB-SI6 19
20,31,42 SERIRQ SERIRQ KSI6
22 65 KB-SI7 KB-SI7 18 KB-SI7 18
16,25,26,31,36,38,41 BUF_PLT_RST# LPCRST#/WUI4/GPD2 KSI7

B.Schematic Diagrams
VDD3 R675 100K_04 KBC2_WRESET# 14 36 KB-SO0 KB-SO0 1 KB-SO0 1
C655 0.1u_16V_Y5V_04 WRST# KSO0/PD0 37 KB-SO1 KB-SO1 2 KB-SO1 2
15 KSO1/PD1 38 KB-SO2 KB-SO2 3 KB-SO2 3
31 KBC2_SCI# ECSMI#/GPD4 KSO2/PD2 39 KB-SO3 KB-SO3 4 KB-SO3 4
KSO3/PD3 40 KB-SO4 KB-SO4 5 KB-SO4 5
KSO4/PD4 41 KB-SO5 KB-SO5 6 J_BLKB15_1 KB-SO5 6 J_BLKB17_1
KSO5/PD5 42 KB-SO6 KB-SO6 7 85219-2607N KB-SO6 7 *85219-2607N
DAC KSO6/PD6
R652 0_04 76 43 KB-SO7 KB-SO7 8 KB-SO7 8
31 GA20 GPJ0 KSO7/PD7

3.3VS 31 KBC2_DAC
77
78
79
80
GPJ1
DAC2/GPJ2
DAC3/GPJ3
KSO8/ACK#
KSO9/BUSY
KSO10/PE
44
45
46
51
KB-SO8
KB-SO9
KB-SO10
KB-SO11
KB-SO8
KB-SO9
KB-SO10
KB-SO11
9
10
11
12
KB-SO8
KB-SO9
KB-SO10
KB-SO11
9
10
11
12
Sheet 32 of 62
DAC4/GPJ4 KSO11/ERR#
81
DAC5/GPJ5

ADC
KSO12/SLCT
KSO13
KSO14
52
53
54
55
KB-SO12
KB-SO13
KB-SO14
KB-SO15
KB-SO12
KB-SO13
KB-SO14
KB-SO15
13
14
15
16
KB-SO12
KB-SO13
KB-SO14
KB-SO15
13
14
15
16
Second EC IT8587
*100K_04

*100K_04

C IT8587 KSO15 56 KB-SO16 KB-SO16 17 KB-SO16 17 C


R783

R112

66 KSO16/GPC3 57 KB-SO17 KB-SO17 26 KB-SO17 26


31 KBC2_ADC ADC0/GPI0 KSO17/GPC5
67
KB-SO23 68 ADC1/GPI1
69 ADC2/GPI2 108 KB-SO18 KB-SO18 1 KB-SO18 1
KB-SO24 70 ADC3/GPI3 RXD/GPB0 109 KB-SO19 KB-SO19 2 KB-SO19 2
71 ADC4/GPI4 TXD/GPB1 123 KB-SO20 KB-SO20 3 KB-SO20 3
ADC5/GPI5 K/B 2" CTX/GPB2
72 126 KB-SO21 KB-SO21 4 KB-SO21 4
73 ADC6/GPI6 GA20/GPB5 4 KB-SO22 KB-SO22 5 KB-SO22 5
ADC7/GPI7 KBRST#/GPB6 119 KB-SO23 6 KB-SO23 6
CRX/GPC0 16 KB-SO24 7 KB-SO24 7
SMBUS PWUREQ#/GPC7
R646 *47_04 KBC2_SMBus_CLK0 110 18 KB-SO25 KB-SO25 8 KB-SO25 8
31,51 SMC_BAT SMCLK0/GPB3 RI1#/WUI0/GPD0
R645 *47_04 KBC2_SMBus_DAT0 111
31,51 SMD_BAT SMDAT0/GPB4
R643 0_04 KBC2_SMBus_CLK1 115 21 KB-SO26 KB-SO26 9 KB-SO26 9
31 KBC_SMBus_CLK1 SMCLK1/GPC1 RI2#/WUI1/GPD1
R642 0_04 KBC2_SMBus_DAT1 116 23 KB-SO27 KB-SO27 10 J_BLKB15_2 KB-SO27 10 J_BLKB17_2
31 KBC_SMBus_DAT1 SMDAT1/GPC2 ECSCI#/GPD3
117 33 KB-SO28 KB-SO28 11 50584-0260N-001 KB-SO28 11 *50584-0260N-001
118 SMCLK2/GPF6 GINT/GPD5 47 KB-SO29 KB-SO29 12 KB-SO29 12
SMDAT2/GPF7 TACH0/GPD6 48 KB-SO30 KB-SO30 13 KB-SO30 13
TACH1/GPD7 19 KB-SO31 KB-SO31 14 KB-SO31 14
PWM L80HLAT/GPE0
24 82 KB-SO32 KB-SO32 15 KB-SO32 15
25 PWM0/GPA0 EGAD/GPE1 83 KB-SO33 KB-SO33 16 KB-SO33 16
R693 *0_04 28 PWM1/GPA1 EGCS#/GPE2 125 KB-SO34 KB-SO34 17 KB-SO34 17
20,31 SMI# PWM2/GPA2 PWRSW/GPE4
29 35 KB-SO35 KB-SO35 18 KB-SO35 18
30 PWM3/GPA3 WUI5/GPE5 17 KB-SO36 KB-SO36 19 KB-SO36 19
31 PWM4/GPA4 LPCPD#/WUI6/GPE6 20 KB-SO37 KB-SO37 20 KB-SO37 20
32 PWM5/GPA5 L80LLAT/GPE7 85 KB-SO38 KB-SO38 21 KB-SO38 21
VDD3 34 PWM6/GPA6 PS2CLK0/GPF0 86 KB-SO39 KB-SO39 22 KB-SO39 22
PWM7/GPA7 PS2DAT0/GPF1 87 KB-SO40 KB-SO40 23 KB-SO40 23
PS2CLK1/GPF2 88 KB-SO41 KB-SO41 24 KB-SO41 24
B
PS/2 PS2DAT1/GPF3 B
R647 1.5K_04 KBC2_SMBus_CLK0 89 93 KB-SO42 KB-SO42 25 KB-SO42 25
35 TP_CLK PS2CLK2/GPF4 ID0/GPH0
R644 1.5K_04 KBC2_SMBus_DAT0 90 94 KB-SO43 KB-SO43 26 KB-SO43 26
35 TP_DATA PS2DAT2/GPF5 ID1/GPH1 95 KB-SO23
ID2/GPH2
PWM/COUNTER
120 FLASH 100 R649 100K_04
31,46 PWR_SW# TMRI0/WUI2/GPC4 FLFRAME#/GPG2 VDD3
124 101 KBC2_SPI_CE# For Auto load code
31 KBC2_INT# TMRI1/WUI3/GPC6 FLAD0/SCE#
J_FLASH2 102 KBC2_SPI_SI
R109 33_04 KBC2_SMBus_CLK0 FLAD1/SI 103 KBC2_SPI_SO
2 EXT GPIO FLAD2/SO
R108 33_04 KBC2_SMBus_DAT0 84 104
1 18,31,44,46,47 SUSC# EGCLK/GPE3 FLAD3/GPG6 105 KBC2_SPI_SCLK
88266-02001 FLCLK/SCK 106
LPC/WAKE UP FLRST#/WUI7/TM/GPG0
112 VDD3
18,21,28,29,31,38,44,46 SUSB# RING#/PWRFAIL#/LPCRST#/GPB7 U13
CLOCK GPIO 96 8 5 R116 47_04 KBC2_SPI_SI
ID3/GPH3 KBC2_GPIO0 31 VDD SI
2 97 2 R174 15_1%_04 KBC2_SPI_SO
CK32KE ID4/GPH4 KBC2_GPIO1 31 SO
128 98 C164 1 R648 15_1%_04 KBC2_SPI_CE#
CK32K ID5/GPH5 KBC2_GPIO2 31 CE#
99 KB-SO24 6 R115 47_04 KBC2_SPI_SCLK
ID6/GPH6 R175 1K_04 3 SCK

0.1u_16V_Y5V_04
R960 107 WP# C165
( PD )ID7/GPG1 GPG1 39
D02 PIN128 ./:
AVSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS

5/5 10K_04 *20p_50V_NPO_04


R114 4.7K_04 7 4
IT8587E/FX D02 RTC CLEAR CMOSXY HOLD# VSS
12

1
27
49
91
113
122

75

AP  GD25D10BTIGR


GND 5/15 M-SO8 6-04-02510-A91

C647
NC1 SHORT
A
0.1u_16V_Y5V_04 A

KBC_AGND

   !!DMFWP!DP/
Title
[32] SECOND EC IT8587
Size Document Number Rev
3.3VS
VDD3
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,33,34,35,37,39,41,42,43,46,48,50,7,8,9
16,17,18,20,21,25,31,34,36,43,45,46,47,50,51
A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 32 of 62


5 4 3 2 1

Second EC IT8587 B - 33
Schematic Diagrams

Backlight Keyboard

5 4 3 2 1

BACKLIGHT KEYBOARD

D D

3.3VS
D02 0_06:
R421 *15mil_short 5/5
5VS U36
DEFAULT PJ11 SHORT 9
R422 *0_06 32 7 KBZONE1_B J_KBLED_1
VDD LED0 8 KBZONE1_R 1 2 KB_LED_PWR R230 *28mil_06 KBPWR_G
LED1 5VS_2 1
C439 C440 10 KBZONE1_G PJ12 OPEN_2A R229 *28mil_06 KBPWR_R
B.Schematic Diagrams

2 LED2 R228 *28mil_06 KBPWR_B 2


A0 3

0.1u_10V_X7R_04

*0.1u_10V_X7R_04
3 11 KBZONE2_B KBZONE1_B
R472 R471 R475 4 A1 LED3 12 KBZONE2_R C219 KBZONE1_R 4
5 A2 LED4 13 KBZONE2_G 4.7u_25V_X5R_08 KBZONE1_G 5

*10K_04

*10K_04

*10K_04
6 A3 LED5 KBZONE2_B 6 NC2
28 A4 15 KBZONE3_B KBZONE2_R 7
29 A5 LED6 16 KBZONE3_R KBZONE2_G 8 NC1
A6 LED7 17 KBZONE3_G KBZONE3_B 9
27 LED8 KBZONE3_R 10

Sheet 33 of 62 15,28,31
15,28,31
SMC_VGA_THERM
SMD_VGA_THERM
R469
R470
0_04
0_04
30
31
OE#
SCL
SDA
LED9
LED10
18
20
21
TPLED_B
TPLED_R
TPLED_G
KBZONE3_G 11
12
FP225H-012S10M
R477 1 LED11

Backlight R476
9
14
19
VSS
VSS
VSS
LED12
LED13
22
23
25
TPLED_B1
TPLED_R1
TPLED_G1
GCONN

0_04
VSS LED14

Keyboard
24 26

*0_04
VSS LED16
C C
PCA9622

31 EC_CTRL_EN#


EC pin XYPCA9622,
,OE# !pull low.

P775DM $
5VS_TP
5VS_2 Q30 5VS_TP
>120 mil AO3415 >120 mil J_TPLED1
S D
1
2
C494 C493 TPLED_B 3

G
C502 1u_6.3V_X5R_04 TPLED_R 4
1u_6.3V_X5R_04

0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 TPLED_G 5


B 6 B
R496 R494 7
C503

8
20K_1%_04 10_06 9
FP225H-009S10M
R495 100K_04 PCB Footprint = fp225h-009xxxm

3
D
6

D
5 G Q31B
2 G Q31A S MTDK5S6R
31 TP_PWR_EN
4
S MTDK5S6R
1

A A

   !!DMFWP!DP/
Title
[33] BACKLIGHT KEYBOARD
11,13,14,15,16,27,29,30,31,35,46,47 5VS
Size Document Number Rev
17,34,35,47 5VS_2
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,34,35,37,39,41,42,43,46,48,50,7,8,9 3.3VS SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 33 of 62

5 4 3 2 1

B - 34 Backlight Keyboard
Schematic Diagrams

LID SW, Fan, LED Conn

5 4 3 2 1

D POWER LED BOARD CONN (W/ LID) CPU FAN CONTROL D

J_LED1 3.3VS 5VS_2 U34


M_BTN# 46 FON1# 1 8
1 2 FON GND 7
2 3 VIN GND 6
LID_SW# 11,31

B.Schematic Diagrams
3 C470 C460 4 VOUT GND 5
4 AIRPLAN_LED# 31 VSET GND
5 LED_HDD# 34
For EMI 0.1u_16V_Y5V_04 AX995SA
NC2 6 LED_NUM# 31
4.7u_6.3V_X5R_06

NC1
7
8
LED_CAP#
LED_SCROLL#
31
31
C144
CPU_FAN 31
CPU_FAN
9 5VS_CPU_FAN
10 VDD3
J_CPUFAN1
11

*0.01u_16V_X7R_04
12
FP225H-012S10M
3.3VS
C800
1
2
3
Sheet 34 of 62
10u_6.3V_X5R_06 50273-0037N-001

31 CPU_FANSEN
J_FAN1
LID SW, Fan,
3
C
3.3VS
R856 4.7K_04
1
C
LED Conn
HEC PIN24!"#SSD
20141017 LED$%&>APUVBIOS ^'VEC W"
R830 0_04
NGFF B & M KEY EC_SSD_LED# 31

R829 *0_04 D02 


5/5
VGA FAN CONTROL
3.3VS
R268 0_04
M2M_SSD_LED# 26
 MN,LED 5VS_2 U48
5

FON# 1 8
1 2 FON GND 7
LED_HDD# 4 3 VIN GND 6
34 LED_HDD# VOUT GND
2 C232 C231 4 5
PCH_SATAHDD_LED# 17 VSET GND
0.1u_16V_Y5V_04 AX995SA
3

U21 4.7u_6.3V_X5R_06
MC74VHC1G08DFT1G
PCIE SSD LEDSATA
VGA_FAN 31
VGA_FAN
B R828 *0_04 LED H@ 5VS_VGA_FAN
J_VGAFAN1 B

1
C787 2
3
10u_6.3V_X5R_06 50273-0037N-001

J_FAN1
31 VGA_FANSEN
3
R836 4.7K_04
3.3VS
1

CHARGE LED BOARD

J_CHARGE_LED1

6 LED_ACIN 31
5 LED_PWR 31
4
3
A 2 LED_BAT_FULL 31 A
1 LED_BAT_CHG 31
FP225H-006S10M
PCB Footprint = fp225h-006xxxm

   !!DMFWP!DP/
Title

5VS_2 17,33,35,47
[34] LID SW,FAN,LED CONN
VDD3 16,17,18,20,21,25,31,32,36,43,45,46,47,50,51 Size Document Number Rev
3.3VS
5VS
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,35,37,39,41,42,43,46,48,50,7,8,9
11,13,14,15,16,27,29,30,31,33,35,46,47
A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 34 of 62


5 4 3 2 1

LID SW, Fan, LED Conn B - 35


Schematic Diagrams

TP, FP, Multi-Con

5 4 3 2 1

FOR CLICK BOARD


FOR HDD BOARD
TP_VCC

5VS TP_VCC
J_SATA2

3.3VS 1
3 1 2
2
4
R366 *0_04
(TP (J_TP1) G5VS R368 R367 C383
5 3 4 6
5 6 SATA3_TXP 17 3.3VS
D 7 8 10K_04 10K_04 *10u_6.3V_X5R_06 D
.TP (TM02706) G3.3VS
9 7 8 10
9 10 SATA3_TXN 17
11 12 R385 0_04 TP_CLK TP_DATA
13 11 12 14
13 14 SATA3_RXN 17
15 16 C382 C381
17 15 16 18
5VS_2 17 18 SATA3_RXP 17
19 20 47p_50V_NPO_04
21 19 20 22 47p_50V_NPO_04
23 21 22 24
23 24 UIM_CLK 25
25 26
25 26 UIM_DATA 25
27 28
27 28 UIM_RST 25 TP_VCC
29 30
29 30 UIM_PWR 25
B.Schematic Diagrams

51049-03041-001 D03 1 TP_VCC

FOR ESD* % 6/30

TP_VCC C363
*V15AVLC0402 2 1 D17 R369 R370 0.1u_10V_X7R_04
*V15AVLC0402 2 1 D16
TP_VCC *V15AVLC0402 2 1 D18 10K_04 10K_04
J_TP1
*V15AVLC0402 2 1 D19

Sheet 35 of 62 1 TP_DATA Q24

G
2 TP_DATA 32
TP_CLK MTN7002ZHS3
3 TP_CLK 32

TP, FP, Multi-Con 4


5
SMB_DATA_T
SMB_CLK_T Q25
S D SMB_DATA 16,18,27,28

G
6 MTN7002ZHS3
C FP225H-006S10M C
H20 H28 H25 H26 H27 M6 M7 M8 M5 PCB Footprint = fp225h-006xxxm S D SMB_CLK 16,18,27,28
H8_0D2_8 H8_0D2_8 H6_0D3_7 H6_0D3_7 H6_0D3_7 M-MARK M-MARK M-MARK M-MARK
D02 1
5/25

PCB Footprint = H6_0D3_7 PCB Footprint = H6_0D3_7 M2 M3 M1 M4


PCB Footprint = H6_0D3_7 M-MARK M-MARK M-MARK M-MARK

H22 H3 H2 H39 H1 H38 H36


FOR Finger print BOARD D02 1B6pin FINGER PRINT
H6_0B3_7D3_7 H3_0D2_3 C111D111N C111D111N C111D111N C111D111N H3_0D2_3 5/6

3.3VS
J_FP1

1
D03 H42/H43/H44, H19)footprint 2
6/30 3
4
5 USB_PN2 20
H32 H35 H30
6 USB_PP2 20
H6_0B3_7D3_7 H6_0B3_7D3_7 H3_0D2_3 H19 H15 H13
o8_0x10_5d2_8x5_3n H8_0B7_5D5_8 H8_0B7_5D5_8 FP225H-006S10M
PCB Footprint = fp225h-006xxxm
B B

H10 H8
FOR Finger MODULE
H11 H9 H14 H16 H23 H24 H8_0B7_5D5_8 H8_0B7_5D5_8
H6_0D4_0 H6_0D4_0 H6_0D4_0 H6_0D2_8 H8_0D2_8 H8_0D2_8

D02 GND
05/15

H18 H29
H7 H5 H4 H6 H6_0D2_8 H6_0D2_8
2 2 2 2
3 3 3 3 D02 PIN6~9
4 1 4 1 4 1 4 1 05/15
5 5 5 5

MTH8_0D2_8 MTH6_0B8_0D2_8 MTH6_0D2_8 MTH8_0D2_8


A 3.3VS 10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,37,39,41,42,43,46,48,50,7,8,9 A
5VS 11,13,14,15,16,27,29,30,31,33,46,47
5VS_2 17,33,34,47
H37 H31 H33 H34 H12
2 2 2 2 2

D03 EMI 1
3
4
5
1
3
4
5
1
3
4
5
1
3
4
5
1
3
4
5
1    !!DMFWP!DP/
Title
6/30
MTH8_0D2_8 MTH8_0D2_8 MTH8_0D2_8 MTH8_0D2_8 MTH8_0D2_8
[35] FAN,TP,FP,MULT CON
Size Document Number Rev
A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 35 of 62


5 4 3 2 1

B - 36 TP, FP, Multi-Con


Schematic Diagrams

LAN E2400

1 2 3 4 5 6 7 8

Qualcomm LAN (E2400) LED_LINK_A


If switch regulator applied, mount Ra
VDD3 If LDO applied, mount Rb
PR107 close to pin1 VDD33
AVDDVCO_A
VDD33
15mil_short_06

0.1u_16V_X7R_04

0.1u_16V_X7R_04

*4.7u_6.3V_X5R_06
1u_6.3V_X5R_04

*1u_6.3V_X5R_04
A A
D02 0603 VDD33
5/4
R461 R464 R463
C361 C362 C400 C399
4.7K_04 4.7K_04 4.7K_04
C398
Ra
10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 0.1u_16V_X7R_04
R465
*1000P_50V_X7R_04 PU 10K on EC side
*10K_04 LED2_A

C407

C406

C415

C426

C425
LED_ACT_A
LAN WAKE UP
LED_LINK_A
R466 0_04

B.Schematic Diagrams
LAN_WAKE# 31
R462

PCIE_TXN7_GLAN
PCIE_TXP7_GLAN

CLK_PCIE_GLAN#
*10K_04

CLK_PCIE_GLAN
LAN_WAKEUP#_A C A PCIE_WAKE# FOR S5 WAKE UP ON LAN Rb

AVDDVCO_A
LED_LINK_A
D23 RB751S-40C2 C420

LED_ACT_A
DVDDL_A

AVDDL_A
LX_A
L20 La
Close to pin40 LX_A 0.1u_16V_X7R_04

Sheet 36 of 62
.
C352 C351 C342 SWF2520CF-4R7M-M
Cc Cb Ca

41

40
39
38
37
36
35
34
33
32
31
1000P_50V_X7R_04 0.1u_16V_X7R_04 10u_6.3V_X5R_06 U30

LAN E2400

GND

LX
LED[1]
LED[0]
DVDDL_REG
RX_N
RX_P
AVDDL
REFCLK_P
REFCLK_N
AVDDL
D03 06
0604
DVDDL_A
B VDD33 B

If AVDDL/DVDDL comes from internal SWR:


mount La,Ca,Cb,Cc VDD33 1 30 LAN_TXP C428 0.1u_16V_X7R_04 PCIE_RXP7_GLAN
BUF_PLT_RST# R404 *10mil_short RSTn_A 2 VDD33 TX_P 29 LAN_TXN C427 0.1u_16V_X7R_04 PCIE_RXN7_GLAN
If AVDDL/DVDDL comes from internal LDO: LAN_WAKEUP#_A 3 PERSTn TX_N 28
no mount La,Ca,Cb,Cc CLKREQn_A
DEBUGMODE[0]_A
AVDDL_A
4
5
6
WAKEn
CLKREQn
DEBUGMODE[0]
AVDDL_REG
Atheros NC
TESTMODE[2]
TESTMODE[1]
TESTMODE[0]
27
26
25
XTLO_A 7 24 R401 *499_04 PPS_A
C397

1u_6.3V_X5R_04 0.1u_16V_X7R_04
C396 XTLI_A
AVDDH_A
RBIAS_A
8
9
10
XTLO
XTLI
AVDDH_REG
RBIAS
E2400 PPS
LED[2]
AVDDH
TRXN3
23
22
21
LED2_A
AVDDH_A C424 0.1u_16V_X7R_04

R390
2.37K_1%_04

AVDD33
AVDDL

AVDDL
TRXN0

TRXN1

TRXN2
TRXP0

TRXP1

TRXP2

TRXP3
C394 C395

VDD33 R460 4.7K_04 CLKREQn_A 0.1u_16V_X7R_04 1u_6.3V_X5R_04


E2400

11
12
13
14
15
16
17
18
19
20
R459 30K_1%_04 DEBUGMODE[0]_A

LAN_MDI0+_A

LAN_MDI1+_A

LAN_MDI2+_A

LAN_MDI3+_A
VDD33
Interface with motherboard

LAN_MDI0-_A

LAN_MDI1-_A

LAN_MDI2-_A

LAN_MDI3-_A
0.1u_16V_X7R_04 AVDDL_A

0.1u_16V_X7R_04 AVDDL_A
VDD33
BUF_PLT_RST#
BUF_PLT_RST# 16,25,26,31,32,38,41
C
LDO MODE PCIE_WAKE# PCIE_WAKE# 18,25,26,38,41
C

R403 0_06 R363 0_06 VDD33 PCIE_RXP7_GLAN


close to pin16 VDD33
PCIE_RXP7_GLAN 20
PCIE_RXN7_GLAN PCIE_RXN7_GLAN 20
Lc Lb
0.1u_16V_X7R_04

AVDDVCO_A L23 AVDDL_A L19 DVDDL_A PCIE_TXP7_GLAN


1u_6.3V_X5R_04

PCIE_TXP7_GLAN 20
*BLM18KG601SN1 *BLM18KG601SN1 PCIE_TXN7_GLAN
PCIE_TXN7_GLAN 20
600ohm/1.3A
CLK_PCIE_GLAN#
If AVDDL/DVDDL comes from internal SWR: mount Lb; 4 L30 3 CLK_PCIE_GLAN# 19
DLMX1- CLK_PCIE_GLAN

C405

C423
CLK_PCIE_GLAN 19
If AVDDL/DVDDL comes from internal LDO: no mout Lb L47 1 2 DLMX1+
*WCM2012F2S-161T03-short
LAN_MDI0-_A 12 13 LMX1-
C422

C419

LAN_MDI0+_A 11 TD4- MX4- 14 LMX1+ 1 L31 2 DLMX2- J_RJ1


meet realtek Freq tolerance 50ppm LAN_MDI1-_A 9 TD4+ MX4+ 16 LMX2- DLMX1+ 1 GND1
XTLO_A LAN_MDI1+_A 8 TD3- MX3- 17 LMX2+ 4 3 DLMX2+ DLMX1- 2 DA+ shield GND2
TD3+ MX3+ *WCM2012F2S-161T03-short DLMX2+ 3 DA- shield
R355 1M_04 XTLI_A DLMX2- 6 DB+
LAN_MDI2-_A 6 19 LMX3- 4 L32 3 DLMX3- DB-
X4 TD2- MX2-
LAN_MDI2+_A 5 20 LMX3+
LAN_MDI3-_A 3 TD2+ MX2+ 22 LMX4- 1 2 DLMX3+ DLMX3+ 4
2 1 LAN_MDI3+_A 2 TD1- MX1- 23 LMX4+ *WCM2012F2S-161T03-short DLMX3- 5 DC+
TD1+ MX1+ DLMX4+ 7 DC-
3 4 10 15 4 L33 3 DLMX4- DLMX4- 8 DD+
7 TCT4 MCT4 18 DD-
C350 FSX3L 25MHZ 4 TCT3 MCT3 21 1 2 PJS-08SL3B
C349 DLMX4+
1 TCT2 MCT2 24 *WCM2012F2S-161T03-short
TCT1 MCT1 Main 6-21-B4000-008
D
15p_50V_NPO_04 15p_50V_NPO_04 D
NS892402 2nd 6-21-B4070-008
40 mil NMCT_4 R227 75_1%_04 NMCT_R C218 3rd 6-21-B4080-008
D02 1 A- C816 C841 C817 C840 C818 NMCT_3 R226 75_1%_04 MA1206CG-101J-202ER
5/20 NMCT_2 R781 75_1%_04

   !!DMFWP!DP/
0.1u_16V_X7R_04 0.1u_16V_X7R_04 0.1u_16V_X7R_04 NMCT_1 R796 75_1%_04
0.1u_16V_X7R_04 0.01u_16V_X7R_04

Title
[36] LAN E2400
16,17,18,20,21,25,31,32,34,43,45,46,47,50,51 VDD3 Size Document Number Rev
11,17,2,24,25,30,39,42,43,44,46,47
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,50,7,8,9
3.3V
3.3VS A3 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 36 of 62


1 2 3 4 5 6 7 8

LAN E2400 B - 37
Schematic Diagrams

PS8338B + PS8330B

3 Levels Input:
L: Low
5 3.3VS
4
Programmable input equalization levels; Internal pull down at
~150K*, 3.3V I/O.
3 3.3VS
2
AUX interception disable for Port y (y = 1, 2). Internal pull down at ~150K*, 3.3V I/O;
1
PSPEQ R611 *4.7K_04 L: default, LEQ, compensate channel loss up to 11.5dB @ HBR2 PC10 R99 *4.7K_04 L: AUX interception enable, driver configuration is set by link training (default)
H: High
R619 *4.7K_04 H: HEQ, compensate channel loss up to 14.5dB @ HBR2 H: AUX interception disable, driver output with fixed 800mV and 0dB
M: VDD33/2, connect both R91 *4.7K_04 M: AUX interception disable, driver output with fixed 400mV and 0dB
M: LLEQ, compensate channel loss up to 8.5dB @ HBR2
pull-up and pull-down resistors 3.3VS 3.3VS
Automatic EQ disable; Internal pull down at ~150K*, 3.3V IO
PI0 R93 *4.7K_04 L: Automatic EQ enable (default) PC20 R97 *4.7K_04
3.3VS H: Automatic EQ disable
3.3VS R89 *4.7K_04
PSCFG0 R92 *4.7K_04 Auto test enable; Internal pull down at ~150K*, 3.3V I/O. 3.3VS
PI1 R622 *4.7K_04 L: Auto test disable & input offset cancellation enable (default) Output swing adjustment for Port y (y = 1, 2). Internal pull down at ~150K*, 3.3V I/O;
R83 *4.7K_04 H: Auto test enable & input offset cancellation enable PC11 R98 *4.7K_04 L: default
Chip operational mode configuration; M: Auto test disable & input offset cancellation disable H: +20%
Internal pull down at ~150K*, 3.3V I/O. 3.3VS
D L: Control switching mode (default)
H: Automatic switching mode 3.3VS
R90 *4.7K_04
3.3VS
M: -16.7%
D
3.3VS R431 *4.7K_04 PS8330B_CFG0
PC21 R96 *4.7K_04
3.3VS C141 R429 *4.7K_04

PSCFG0
0.01u_16V_X7R_04 R88 *4.7K_04

3.3VS
PC10
PC11
PC20
PC21
R605 *4.7K_04 C134
B.Schematic Diagrams

17 PS8338B_SW

PI0
0.1u_16V_X7R_04 3.3VS R449 *4.7K_04 PS8330B_CFG1
Port switching control or priority configuration;
Internal pull down at ~150K*, 3.3V I/O. U8 3.3VS R448 *4.7K_04

61

60
59
58
57
56
55
54
53
52
51
L: Port1 is selected or with higher priority (default)
H: Port2 is selected or with higher priority

EPAD

PI0/SDA_CTL
CFG0
CFG1
VDD33
PC10
PC11
PC20
PC21
GND
VDD33
3.3VS R441 *4.7K_04 PEQ

PI1 1 50 DP_A0 3.3VS R440 *4.7K_04


2 PI1/SCL_CTL OUT1_D0p 49 DP_A0 12
DP_A#0

Sheet 37 of 62 15 MUX_HPD 3 I2C_CTL_EN OUT1_D0n 48 DP_A_HPD


DP_A#0 12 C446 C469

10K_04
IN_HPD OUT1_HPD DP_A_HPD 12
IN_CA_DET 4 47 DP_A1
C127 0.1u_10V_X7R_04 5 IN_CA_DET OUT1_D1p 46 DP_A1 12 0.1u_10V_X7R_04 0.01u_16V_X7R_04
3.3VS DP_A#1
C126 0.1u_10V_X7R_04 6 VDD33 OUT1_D1n 45 DP_A#1 12
IN_D0p DP_A2
15 MUX_0P

PS8338B + C125 0.1u_10V_X7R_04 7 IN_D0p OUT1_D2p 44 DP_A2 12


IN_D0n DP_A#2
15 MUX_0N IN_D0n OUT1_D2n DP_A#2 12
PSPEQ 8 43 R411 100K_04

R439
PEQ OUT1_CA_DET G_DPA_MODE 12
C112 0.1u_10V_X7R_04 IN_D1p 9 42 DP_A3
15 MUX_1P IN_D1p OUT1_D3p DP_A3 12
C111 0.1u_10V_X7R_04 IN_D1n 10 41 DP_A#3
15 MUX_1N PS8338B DP_A#3 12 OUT2_AUXp_SCL 38

PS8330B 11 IN_D1n OUT1_D3n 40 PS8330B_IN_D0p


GND OUT2_D0p

OUT2_AUXn_SDA
C106 0.1u_10V_X7R_04 IN_D2p 12 39 PS8330B_IN_D0n

OUT2_AUXp_SCL
PS8330B_AUXp

PS8330B_AUXn
15 MUX_2P IN_D2p OUT2_D0n OUT2_AUXn_SDA 38

IN_DDC_SDA

IN_DDC_SCL
C105 0.1u_10V_X7R_04 IN_D2n 13 38 HPD_SRC_R R607 *0_04 HPD_SRC
15 MUX_2N IN_D2n OUT2_HPD
14 37 PS8330B_IN_D1p R606 0_04 OUT2_HPD C458 2.2u_6.3V_X5R_04 R410 100K_04
PD OUT2_D1p 3.3VS
C104 0.1u_10V_X7R_04 IN_D3p 15 36 PS8330B_IN_D1n
15 MUX_3P IN_D3p OUT2_D1n
C93 0.1u_10V_X7R_04 16 35
C 15 MUX_3N
IN_D3n PS8330B_IN_D2p
C

OUT1_AUXn_SDA

OUT2_AUXn_SDA
IN_D3n OUT2_D2p

OUT1_AUXp_SCL

OUT2_AUXp_SCL
17 34 PS8330B_IN_D2n 3.3VS 3.3VS 3.3VS
PS8338B_SW 18 CEXT OUT2_D2n 33 CAD_SRC

IN_DDC_SDA
IN_DDC_SCL
19 SW OUT2_CA_DET 32 PS8330B_IN_D3p
C92 20 GND OUT2_D3p 31 PS8330B_IN_D3n

IN_AUXp
IN_AUXn
REXT OUT2_D3n U32

36

35

34

33

32

31

30

29

28

27

26

25
VDD33

VDD33
PS8330B
2.2u_6.3V_X5R_04 R595

VDD33

RST#

SDA_DDC

SCL_DDC

VDD33

GND

AUX_SRCp

AUX_SRCn

AUX_SNKp

AUX_SNKn

PD#

VDD33
21
22
23
24
25
26
27
28
29
30
4.99K_1%_04 3.3VS 3.3VS 3.3VS

MUX_AUXN_DDC_SDA
MUX_AUXP_DDC_SCL
37 24
NC GND

IN_AUXp
IN_AUXn
C90 PS8330B_IN_D0p C670 0.1u_10V_X7R_04 IN0P_R 38 23 OUT2_D0p 38
C91 R70 IN0p OUT0p
0.01u_16V_X7R_04 PS8330B_IN_D0n C671 0.1u_10V_X7R_04 IN0N_R 39 22 OUT2_D0n 38
0.1u_10V_X7R_04 100K_04 IN0n OUT0n
IN_DDC_SDA PS8330B_CFG1 40 21
IN_DDC_SCL CFG1 NC
PS8330B_IN_D1p C675 0.1u_10V_X7R_04 IN1P_R 41 20
DESIGN NOTE:CFG1 R71 IN1p OUT1p OUT2_D1p 38

Configuration pin for auto test and input offset 3.3VS PS8330B_IN_D1n C674 0.1u_10V_X7R_04 IN1N_R 42 19
IN1n OUT1n OUT2_D1n 38
cancellation,3.3V IO, internal pull up at 150K
H: default, auto test disable and input offset cancellation R597
100K_04
43
NC PS8330B GND
18

PS8330B_IN_D2p C689 0.1u_10V_X7R_04 IN2P_R 44 17 OUT2_D2p 38


enable 100K_04 IN2p OOUT2p
PS8330B_IN_D2n C688 0.1u_10V_X7R_04 IN2N_R 45 16
B L:M: auto test enable and input offset cancellation enable
auto test disable and input offset cancellation disable
OUT1_AUXn_SDA
OUT1_AUXp_SCL
12
12
46
IN2n OUT2n
15
OUT2_D2n 38
B
R596 NC NC
PS8330B_IN_D3p C673 0.1u_10V_X7R_04 IN3P_R 47 14 OUT2_D3p 38
100K_04 IN3p OUT3p
3.3VS 3.3VS 3.3VS PS8330B_IN_D3n C672 0.1u_10V_X7R_04 IN3N_R 48 13
IN3n OUT3n OUT2_D3n 38

SDA_CLTCFG0
SCL_CTLPEQ
check IN_CA,1/13

I2C_ADDR
49

CAD_SRC

HPD_SRC

CAD_SNK

HPD_SNK
R72 R594 R586 EPAD

VDD33

VDD33

VDD33
4.7K_04 4.7K_04 4.7K_04

CEXT

REXT
C602 0.1u_10V_X7R_04 IN_AUXp
15 MUX_AUXP_DDC_SCL
C601 0.1u_10V_X7R_04 IN_AUXn
15 MUX_AUXN_DDC_SDA
D

10

11

12
S

AO3415 G AO3415 G DEFAULT:LOW


Hybrid DDC/AUX

2.2u_6.3V_X5R_04
3.3VS

HPD_SRC
GIN_CA_DET

CAD_SRC
PS8330B_CFG0
Q42 Q44

CAD_SNK
MTN7002ZHS3
S

Q10 3.3VS
D

PEQ
3.3VS 3.3VS
GND

4.99K_1%_04
R583 R585 R584

1M_04
check IN_CA,1/13
MUX_AUXP_DDC_SCL 4.7K_04 4.7K_04 4.7K_04
MUX_AUXN_DDC_SDA
IN_DDC_SCL C84 0.1u_10V_X7R_04 PS8330B_AUXp
OUT2_HPD OUT2_HPD 38
IN_DDC_SDA C83 0.1u_10V_X7R_04 PS8330B_AUXn
DESIGN NOTE:CFG0

C459

R412
R430
Configuration pin for automatic EQ and DESIGN NOTE:PEQ

D
A A

S
AO3415 G AO3415 G
Aux interception; Internal pull down at
Programmalbe input equalization levels;internal pull
150Kohm,3.3V I/O Q45 Q46 G CAD_SRC
down at 150k ,3.3v I/O
MTN7002ZHS3

S
   !!DMFWP!DP/
L: default, automatic EQ enable and Aux interception enable L: default, LEQ, compensate channel loss up to 12dB at IN_DDC_SCL Q43
IN_DDC_SDA
HBR2
H: automatic EQ disable and AUX interception enable
H: HEQ, compensate channel loss up to 15dB at HBR2 Title
M: automatic EQ disable and AUX interception [37] AR_PS8338B+PS8330B
disable,no pre-emphasis, 600mVpp swing M:LLEQ, compensate channel loss up to 5dB at HBR2
Size Document Number Rev
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,39,41,42,43,46,48,50,7,8,9 3.3VS A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 37 of 62

5 4 3 2 1

B - 38 PS8338B + PS8330B
Schematic Diagrams

TBT

5 4 3 2 1
NOTE:
XTAL TBT_XTAL_25_OUT SNK0_DDC_data/clk ?connect to 2k PU only if SRC0 is connected and support HDMI (a.i HDMI or DP++ connector). Otherwise can be 100k PD.
X2 SNK1_DDC_data ?connect to 100k PD. If SRC0 support HDMI, connect as SNK0_CFG1 to GPU and/or appropriate AUX/DDC demux control
TBT_XTAL_25_IN
2 1 SNK1_DDC_clk ?connect to 100k PD.

3 4 Y23 V23 PET0_P C857 0.22u_10V_X5R_04


20 PCIE_TXP1_TBT PCIE_RX0_P PCIE_TX0_P PCIE_RXP1_TBT 20
C314 C313 Y22 V22 PET0_N C858 0.22u_10V_X5R_04
FSX3L 25MHZ 20 PCIE_TXN1_TBT PCIE_RX0_N PCIE_TX0_N PCIE_RXN1_TBT 20

CPU PCIE RX
20p_50V_NPO_04 20p_50V_NPO_04 T23 P23 PET1_P C869 0.22u_10V_X5R_04
20 PCIE_TXP2_TBT PCIE_RX1_P PCIE_TX1_P PCIE_RXP2_TBT 20

PCIe GEN3
T22 P22 PET1_N C870 0.22u_10V_X5R_04
20 PCIE_TXN2_TBT PCIE_RXN2_TBT 20

CPU PCIE TX
PCIE_RX1_N PCIE_TX1_N
M23 K23 PET2_P C905 0.22u_10V_X5R_04
20 PCIE_TXP3_TBT PCIE_RX2_P PCIE_TX2_P PCIE_RXP3_TBT 20
M22 K22 PET2_N C906 0.22u_10V_X5R_04
20 PCIE_TXN3_TBT PCIE_RX2_N PCIE_TX2_N PCIE_RXN3_TBT 20
D R798 0_04 VCC3V3_FLASH D
H23 F23 PET3_P C916 0.22u_10V_X5R_04
20 PCIE_TXP4_TBT PCIE_RX3_P PCIE_TX3_P PCIE_RXP4_TBT 20
AR/PPS COMMON FLASH R801 *0_04 VCC3V3_SX_SYS H22 F22 PET3_N C921 0.22u_10V_X5R_04
20 PCIE_TXN4_TBT PCIE_RX3_N PCIE_TX3_N PCIE_RXN4_TBT 20
V19 L4 BUF_PLT_RST#_AR
19 TBT_REFCLK_100_P PCIE_REFCLK_100_IN_P PERST_N
T19
19 TBT_REFCLK_100_N PCIE_REFCLK_100_IN_N
C203 TBT_CLKREQ# AC5 N16 PCIe_RBIAS R344 3.01K_1%_04
19 TBT_CLKREQ# PCIE_CLKREQ_N PCIE_RBIAS
R782 R799 0.1u_10V_X7R_04 R800 R797 C438 0.1u_10V_X7R_04 DPSNK1_ML0_P AB7 R2
37 OUT2_D0p DPSNK0_ML0_P DPSRC_ML0_P
C430 0.1u_10V_X7R_04 DPSNK1_ML0_N AC7 R1
37 OUT2_D0n DPSNK0_ML0_N DPSRC_ML0_N VCC3V3_SX_SYS

B.Schematic Diagrams
C431 0.1u_10V_X7R_04 DPSNK1_ML1_P AB9 N2
3.3K_1%_04

3.3K_1%_04

3.3K_1%_04

3.3K_1%_04

37 OUT2_D1p DPSNK0_ML1_P DPSRC_ML1_P


C432 0.1u_10V_X7R_04 DPSNK1_ML1_N AC9 N1
37 OUT2_D1n

DDI(MUX)

5
DPSNK0_ML1_N DPSRC_ML1_N

SOURCE PORT 0
U20

SINK PORT 0
8 5 TBT_EE_DI C433 0.1u_10V_X7R_04 DPSNK1_ML2_P AB11 L2 1
VDD SI 37 OUT2_D2p DPSNK0_ML2_P DPSRC_ML2_P
C434 0.1u_10V_X7R_04 DPSNK1_ML2_N AC11 L1 BUF_PLT_RST#_AR 4
37 OUT2_D2n DPSNK0_ML2_N DPSRC_ML2_N
2 TBT_EE_DO 2
SO BUF_PLT_RST# 16,25,26,31,32,36,41
C435 0.1u_10V_X7R_04 DPSNK1_ML3_P AB13 J2
37 OUT2_D3p DPSNK0_ML3_P DPSRC_ML3_P
TBT_EE_WP_N 3 1 TBT_EE_CS_N C436 0.1u_10V_X7R_04 DPSNK1_ML3_N AC13 J1
37 OUT2_D3n

3
WP# CE# DPSNK0_ML3_N DPSRC_ML3_N

TBT_HOLD_N 7
SCK
6

4
TBT_EE_CLK
37
37
OUT2_AUXp_SCL
OUT2_AUXn_SDA
C453
C445
0.1u_10V_X7R_04
0.1u_10V_X7R_04
DPSNK1_AUX_P
DPSNK1_AUX_N
Y11
W11 DPSNK0_AUX_P
DPSNK0_AUX_N
DPSRC_AUX_P
DPSRC_AUX_N
W19
Y19
U60
MC74VHC1G08DFT2G
D02 ./+,
5/8 Sheet 38 of 62
HOLD# VSS

TBT
R301 100K_04 37 OUT2_HPD AA2 G1 TBT_SRC_HPD
W25Q80DV DPSNK0_HPD DPSRC_HPD
TBT_SNK0_DDC_CLK Y5 N6 DPSRC_RBIAS R247 14K_1%_04
TBT_SNK0_DDC_DATA R4 DPSNK0_DDC_CLK DPSRC_RBIAS
DPSNK0_DDC_DATA U1 TBT_I2C_SDA
GPIO_0 TBT_I2C_SDA 40
R248 100K_04 AB15 U2 TBT_I2C_SCL
DPSNK1_ML0_P GPIO_1 TBT_I2C_SCL 40
C D02 R815-* AC15 V1 TBT_EE_WP_N C

LC GPIO
5/14 DPSNK1_ML0_N GPIO_2 V2 TBT_TMU_CLK_OUT R973 check ,1/14
VCC3V3_S0_SYS AB17 GPIO_3 W1 TBT_PCIe_WAKE_N R814 0_04
2.2K_04 DPSNK1_ML1_P GPIO_4 PCIE_WAKE# 18,25,26,36,41
TBT_HDMI_DDC_DATA R811 AC17 W2 TBT_CIO_PLUG_EVENT_N R249 0_04 TBCIO_PLUG_EVENT 16
TBT_HDMI_DDC_CLK R812 2.2K_04 DPSNK1_ML1_N GPIO_5 Y1 TBT_HDMI_DDC_DATA
TBT_CLKREQ# R858 10K_04 AB19 GPIO_6 Y2 TBT_HDMI_DDC_CLK
DPSNK1_ML2_P GPIO_7

SINK PORT 1
TBT_SNK0_DDC_CLK R302 *2.2K_04 AC19 AA1 TBT_SRC_CFG1
TBT_SNK0_DDC_DATA R225 *2.2K_04 DPSNK1_ML2_N GPIO_8 J4 TBTA_I2C_INT
POC_GPIO_0 TBTA_I2C_INT 40
RTD3_CIO_PWR_EN R264 *10K_04 AB21 E2 TBTB_I2C_INT

POC GPIO
RTD3_USB_PWR_EN R300 *10K_04 AC21 DPSNK1_ML3_P POC_GPIO_1 D4 RTD3_USB_PWR_EN
VCC3V3_SX_SYS DPSNK1_ML3_N POC_GPIO_2 H4 TBT_FORCE_PWR R245 0_04
POC_GPIO_3 TBT_FRC_PWR 16
Y12 F2 TBT_BATLOW_N
TBT_I2C_SDA R817 3.3K_04 W12 DPSNK1_AUX_P POC_GPIO_4 D2 TBT_SLP_S3_N R241 *0_04

Manager
DPSNK1_AUX_N POC_GPIO_5 SUSB# 18,21,28,29,31,32,38,44,46
TBT_I2C_SCL R818 3.3K_04 F1 RTD3_CIO_PWR_EN

Policy
POC_GPIO_6

CPU /
TBT_PCIe_WAKE_N R813 *10K_04 DPSNK1_HPD Y6 D02

TBT_CIO_PLUG_EVENT_N R815 *10K_04 DPSNK1_HPD E1 TBT_TEST_EN R890 100_04 5/5
TBT_SLP_S3_N R240 10K_04 TBT_SNK1_DDC_CLK Y8 TEST_EN

Misc
TBT_BATLOW_N R243 10K_04 SINK0_CFG1 N4 DPSNK1_DDC_CLK AB5 TBT_TEST_PWG R859 100_04
TBTA_I2C_INT R265 10K_04 DPSNK1_DDC_DATA TEST_PWR_GOOD
TBTB_I2C_INT R242 10K_04 R330 14K_1%_04 DPSNK_RBIAS Y18 F4
DPSNK_RBIAS RESET_N TBT_RESET_N 40
D031B TBT_TDI Y4 D22 TBT_XTAL_25_IN NOTE:
RTD3_USB_PWR_EN R994 100K_04 6/16 D02 TBT_TMS V4 TDI XTAL_25_IN D23 TBT_XTAL_25_OUT
TMS XTAL_25_OUT
ASSEMBLE R1305, R1368 if DPSRC
RTD3_CIO_PWR_EN R995 100K_04 5/12 TBT_TCK T4 NOT IN USE
TBT_TMU_CLK_OUT R816 100K_04 TBT_TDO W4 TCK AB3
R244 100K_04 TDO MISC EE_DI AC4 TBT_EE_DI 40 R810 1M_04
TBT_FORCE_PWR TBT_SRC_CFG1
R860 100K_04 R279 4.75K_0.5%_04 H6 EE_DO AC3 TBT_EE_DO 40 R891 1M_04
OUT2_HPD TBT_RBIAS TBT_SRC_HPD
R313 1M_04 J6 RBIAS EE_CS_N AB4 TBT_EE_CS_N 40
TBTA_LSRX +/-0.5% TBT_RSENSE
R905 1M_04 RSENSE EE_CLK TBT_EE_CLK 40
TBTA_LSTX
B TBTA_HPD R246 100K_04 A15 B7 B
40 TBTA_CA2HD_1_P PA_RX1_P PB_RX1_P
TBT_SNK1_DDC_CLK R857 100K_04 B15 A7
40 TBTA_CA2HD_1_N PA_RX1_N PB_RX1_N
SINK0_CFG1 R224 100K_04
TBTB_LSTX R299 100K_04 C920 0.22u_10V_X5R_04 TBTA_TX1_P A17 A9 VCC3V3_SX_SYS
R314 100K_04 40 TBTA_HD2CA_1_P C919 0.22u_10V_X5R_04 B17 PA_TX1_P PB_TX1_P B9
TBTB_LSRX TBTA_TX1_N
TBTB_HPD R819 100K_04 40 TBTA_HD2CA_1_N PA_TX1_N PB_TX1_N

5
DPSNK1_HPD R303 100K_04 C918 0.22u_10V_X5R_04 TBTA_TX0_P A19 A11
40 TBTA_HD2CA_0_P PA_TX0_P PB_TX0_P
TBT USB TYPE C

C917 0.22u_10V_X5R_04 TBTA_TX0_N B19 B11 1


40 TBTA_HD2CA_0_N PA_TX0_N PB_TX0_N 4
TBT_SLP_S3_N

TBT PORTS
VCC3V3_LC B21 A13 2
40 TBTA_CA2HD_0_P PA_RX0_P PB_RX0_P SUSB# 18,21,28,29,31,32,38,44,46
TBT_TDI R281 10K_04 A21 B13
40 TBTA_CA2HD_0_N

Port A

PORT B
TBT_TMS R280 10K_04 PA_RX0_N PB_RX0_N

3
TBT_TCK R266 10K_04 C339 0.1u_10V_X7R_04 TBTA_AUX_P Y15 Y16
40 TBTA_DPSRC_AUX_P PA_DPSRC_AUX_P PB_DPSRC_AUX_P
TBT_TDO R282 10K_04 C338 0.1u_10V_X7R_04 TBTA_AUX_N W15 W16 U56 D02 ./+,
40 TBTA_DPSRC_AUX_N PA_DPSRC_AUX_N PB_DPSRC_AUX_N MC74VHC1G08DFT2G 5/4
E20 E19
40 TBTA_USB2_D_P PA_USB2_D_P PB_USB2_D_P
IF SOME OF GPIOs ARE NOT IN USE FOLLOW TABLE BELOW: D20 D19
40 TBTA_USB2_D_N PA_USB2_D_N PB_USB2_D_N
GPIO | TERMINATION | Power Rail
---------------------------------------------------- TBTA_LSTX A5 B4 TBTB_LSTX
40 TBTA_LSTX PA_LSTX PB_LSTX

POC
POC

TBTA_LSRX A4 B5 TBTB_LSRX
GPIO_0 | 10K PU | VCC3V3_LC 40 TBTA_LSRX PA_LSRX PB_LSRX
DEBUG PINs: TBTA_HPD M4 G2 TBTB_HPD
GPIO_1 | 10K PU | VCC3V3_LC 40 TBTA_HPD PA_DPSRC_HPD PB_DPSRC_HPD
GPIO_2 | 100K PD | R329 499_1%_04 PA_USB2_RBIAS H19 F19 PB_USB2_RBIAS R315 499_1%_04
PIN | TERMINATION PA_USB2_RBIAS PB_USB2_RBIAS
GPIO_3 | 100k PD |
------------------------------- AC23 D6
GPIO_4 | 10K PU | VCC3V3_LC THERMDA MONDC_SVR
MONDC_SVR | GND AB23
GPIO_5 | 10K PU | VCC3V3_LC THERMDA
MONDC_DPSNK_0 | GND A23
GPIO_6 | 100K PD | V18 ATEST_P B23
MONDC_DPSNK_1 | GND
GPIO_7 | 100K PD | PCIE_ATEST ATEST_N
A MONDC_DPSRC | GND A
GPIO_8 | 100K PD | AC1 DEBUG E18
MONDC_CIO_0 | GND TEST_EDM USB2_ATEST
POC_GPIO_0 | 10K PU | VCC3V3_TBT_SX
MONDC_CIO_1 | GND L15 W13
POC_GPIO_1 | 10K PU | VCC3V3_TBT_SX FUSE_VQPS_64 MONDC_DPSNK_0
TEST_EDM | GND N15
POC_GPIO_2 | 100K PD | FUSE_VQPS_128
   !!DMFWP!DP/
FUSE_VQPS_64 | GND W18
POC_GPIO_3 | 100K PD | C23 MONDC_DPSNK_1
FUSE_VQPS_128 | GND
POC_GPIO_4 | 10K PU | VCC3V3_TBT_SX C22 MONDC_CIO_0 AB2
ATEST_P/N | FLOATING MONDC_CIO_1 MONDC_DPSRC
POC_GPIO_5 | 10K PU | VCC3V3_TBT_SX Title
POC_GPIO_6 | 100K PD |
USB2_ATEST
PCIE_ATEST
| FLOATING
| FLOATING
U54A [38] AR_TBT
DSL6340
Y Size Document Number Rev
39
39,40
VCC3V3_LC
VCC3V3_SX_SYS
A3 SCHEMATIC1 6-71-P75D0-D03 2.0
39 VCC3V3_S0_SYS Date: Monday, August 03, 2015 Sheet 38 of 62
5 4 3 2 1

TBT B - 39
Schematic Diagrams

Power

5 4 3 2 1

VCC3V3_LC VCC3V3_SX_SYS
VCC3V3_S0_SYS
VCC0V9_DP
D02 1uF VCC3V3_S0
5/12 C250
C277 C278 C297 C822 C821 C819 C820
1u_6.3V_X5R_04 1u_6.3V_X5R_04
C248 C294 C299 C283 C282 C298
C247 1u_6.3V_X5R_04 *1u_6.3V_X5R_04

R13
10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04

R6

H9
F8
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
1u_6.3V_X5R_04
L8 A2

VCC3P3_LC

VCC3P3_SX

VCC3P3_S0

VCC3P3A
L11 VCC0P9_DP VCC3P3_SVR A3
L12 VCC0P9_DP VCC3P3_SVR B3
M8 VCC0P9_DP VCC3P3_SVR VCC0V9_SVR
D D
VCC0V9_PCIE T11 VCC0P9_DP
T12 VCC0P9_DP L9
L6 VCC0P9_DP VCC0P9_SVR M9
M6 VCC0P9_ANA_DPSRC VCC0P9_SVR E12 C292 C279 C280 C291 C770 C769 C761
C337 C335 C336 C334 V11 VCC0P9_ANA_DPSRC VCC0P9_SVR_ANA E13
V12 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F11 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 V13 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F12
VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F13
B.Schematic Diagrams

VCC0V9_USB M13 VCC0P9_SVR_ANA F15


M15 VCC0P9_PCIE VCC0P9_SVR_ANA J9
M16 VCC0P9_PCIE VCC0P9_SVR_SENSE TBT_SVR_IND
L19 VCC0P9_PCIE XFL4012-601MEC
C316 C295 N19 VCC0P9_ANA_PCIE_1 C1 L46 PCB Footprint = XFL4012
L18 VCC0P9_ANA_PCIE_1 SVR_IND C2
1u_6.3V_X5R_04 1u_6.3V_X5R_04 M18 VCC0P9_ANA_PCIE_2 SVR_IND D1
N18 VCC0P9_ANA_PCIE_2 SVR_IND C768 C767 C290

VCC
VCC0P9_ANA_PCIE_2

Sheet 39 of 62 VCC0V9_CIO
R15
R16 VCC0P9_USB
VCC0P9_USB
SVR_VSS
SVR_VSS
SVR_VSS
A1
B1
B2
47uF_6.3V_X5R_08 47uF_6.3V_X5R_08 47uF_6.3V_X5R_08

R8

Power C249

1u_6.3V_X5R_04
C281

1u_6.3V_X5R_04
C296

1u_6.3V_X5R_04
R9
R11
R12
VCC0P9_CIO
VCC0P9_CIO
VCC0P9_CIO
VCC0P9_CIO VCC0P9_LVR
F18
H18
VCC0V9_LVR_OUT
SVR_VSS_GND

VCC3V3_ANA_PCIE L16 VCC0P9_LVR J11 C331 C332 C293 C330


VCC3V3_ANA_USB2 J16 VCC3P3_ANA_PCIE VCC0P9_LVR H11
VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE 10u_6.3V_X5R_04 10u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
C333 C315
C A6 V5 SVR_VSS_GND C
A8 VSS_ANA VSS_ANA V6
1u_6.3V_X5R_04 1u_6.3V_X5R_04 VSS_ANA VSS_ANA
A10 V8 D02 1
A12 VSS_ANA VSS_ANA V9 5/22
A14 VSS_ANA VSS_ANA V15
A16 VSS_ANA VSS_ANA V16
A18 VSS_ANA VSS_ANA V20
A20 VSS_ANA VSS_ANA W5
A22 VSS_ANA VSS_ANA W6
B6 VSS_ANA VSS_ANA W8
B8 VSS_ANA VSS_ANA W9
VCC3V3_SX_SYS B10 VSS_ANA VSS_ANA W20
R991 *0_06 B12 VSS_ANA VSS_ANA W22
3.3V VSS_ANA VSS_ANA
B14 W23
R992 0_06 B16 VSS_ANA VSS_ANA Y9
B18 VSS_ANA VSS_ANA Y13
B20 VSS_ANA VSS_ANA Y20
B22 VSS_ANA VSS_ANA AA22
D8 VSS_ANA VSS_ANA AA23
VCC3V3_S0 L52 VCC3V3_S0_SYS D9 VSS_ANA VSS_ANA AB6
CPI160809UF-1R0M D11 VSS_ANA VSS_ANA AB8
R993 *0_06 . D12 VSS_ANA VSS_ANA AB10
3.3VS VSS_ANA VSS_ANA
D13 AB12
D15 VSS_ANA VSS_ANA AB14
C843 C844 C842 D16 VSS_ANA VSS_ANA AB16

GND
D18 VSS_ANA VSS_ANA AB18
E8 VSS_ANA VSS_ANA AB20
1u_6.3V_X5R_04 47uF_6.3V_X5R_08 47uF_6.3V_X5R_08 E9 VSS_ANA VSS_ANA AB22
E11 VSS_ANA VSS_ANA AC6
B E15 VSS_ANA VSS_ANA AC8 B
E16 VSS_ANA VSS_ANA AC10
E22 VSS_ANA VSS_ANA AC12
E23 VSS_ANA VSS_ANA AC14
F9 VSS_ANA VSS_ANA AC16
D02 ./ F16 VSS_ANA VSS_ANA AC18
05/15 F20 VSS_ANA VSS_ANA AC20
Q64 VCC3V3_S0 G22 VSS_ANA VSS_ANA AC22
AO3415 G23 VSS_ANA VSS_ANA D5
>120 mil >120 mil VSS_ANA VSS
S D H1 E4
3.3V VSS_ANA VSS
Q65 H2 E5
AO3415 H12 VSS_ANA VSS E6
>120 mil
1u_6.3V_X5R_04

D S H13 VSS_ANA VSS F5


3.3VS
G

H15 VSS_ANA VSS F6


H16 VSS_ANA VSS H5
C940

C941 1u_6.3V_X5R_04 C943 H20 VSS_ANA VSS H8


G

J5 VSS_ANA VSS J8
1u_6.3V_X5R_04

C942 1u_6.3V_X5R_04 J18 VSS_ANA VSS J12


VSS_ANA VSS
0.1u_16V_Y5V_04

J19 J13
J20 VSS_ANA VSS J15
C944

R987 J22 VSS_ANA VSS L13


J23 VSS_ANA VSS M11
R988 20K_1%_04 K1 VSS_ANA VSS M12
K2 VSS_ANA VSS N8
20K_1%_04 R989 100K_04 L5 VSS_ANA VSS N9
L20 VSS_ANA VSS N11 38 VCC3V3_LC
L22 VSS_ANA VSS N12 38,40 VCC3V3_SX_SYS
38 VCC3V3_S0_SYS
D

R990 100K_04 GPG1# L23 VSS_ANA VSS N13


VSS_ANA VSS 11,17,2,24,25,30,42,43,44,46,47 3.3V
A
M1 T6
D

VSS_ANA VSS 10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,41,42,43,46,48,50,7,8,9 3.3VS A


G Q66 M2 T8
MTN7002ZHS3 M5 VSS_ANA VSS T9
S

G Q67 M19 VSS_ANA VSS T13


32 GPG1 VSS_ANA VSS
   !!DMFWP!DP/
MTN7002ZHS3 M20 T15
S

N5 VSS_ANA VSS T16


VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
N20 VSS_ANA VSS T18
N22 VSS_ANA VSS AB1 Title
N23 VSS_ANA
VSS_ANA
VSS
VSS
AC2 [39] AR_Power
U54B Size Document Number Rev
6-71-P75D0-D03
P1
P2
R5
R18
R19
R20
R22
R23
T1
T2
T5
T20
U22
U23
DSL6340 A3 SCHEMATIC1 2.0
Y
Date: Monday, August 03, 2015 Sheet 39 of 62

5 4 3 2 1

B - 40 Power
Schematic Diagrams

TPS65982

5 4 3 2 1

VCC5V0_SYS

TBTA_VBUS D02 FOOTPRINT


C485 C495 C501 C490 4/30
80Ohm, 0.01Ohm DCR, 8A Idc
TBTA_LDO_BMC 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 L24 HCB2012KF-800T80
VCC1V8D_TBTA_LDO
VCC1V8A_TBTA_LDO

0_04

C
J_TYPEC1
C451 C457 C448 D25 D26 DX07S024JJ2
Y C825~C828 change to 1u_25V_X5R_06

R452
D D
2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 close to pin,1/14 C482 A1 B12

CSOD140SH
GND GND

*CSOD140SH
0_04
C484

A
TBTA_HD2CA_0_P A2 B11 TBTA_CA2HD_0_P
TX0_P RX0_P

VCC_HV_SYS
1u_25V_X5R_06 TBTA_HD2CA_0_N A3 B10 TBTA_CA2HD_0_N
0.1u_10V_X7R_04 TX0_N RX0_N

R451
VCC3V3_SX_SYS C478 C929 1u_25V_X5R_06 A4 B9 C925 1u_25V_X5R_06
VBUS VBUS
TBTA_CC1 A5 B8 TBTA_SBU2
10u_6.3V_X5R_04 CC1 SBU2
C450 TBTA_USB2_P_TJ A6 B7 TBTA_USB2_N_BJ
USB2_P_T USB2_N_B

B.Schematic Diagrams
C452 TBTA_USB2_N_TJ A7 B6 TBTA_USB2_P_BJ
1u_6.3V_X5R_04 USB2_N_T USB2_P_B

H10

C11
D11
A11
B11

B10

A10
A8 B5

H1
10u_6.3V_X5R_04 TBTA_SBU1 TBTA_CC2

B1

K1

A2

E1

A6
A7
A8
B7

B9

A9
SBU1 CC2
R426 0_04 F1 C928 1u_25V_X5R_06 A9 B4 C924 1u_25V_X5R_06

VIN_3V3

VDDIO

LDO_1V8A

LDO_1V8D

LDO_BMC

PP_CABLE

PP_5V0
PP_5V0
PP_5V0
PP_5V0

PP_HV
PP_HV
PP_HV
PP_HV

SENSEP

SENSEN

HV_GATE1

HV_GATE2
I2C_ADDR VBUS VBUS
D1 TBTA_CA2HD_1_N A10 B3 TBTA_HD2CA_1_N
38 TBT_I2C_SDA I2C_SDA1 RX1_N TX1_N
D2 TBTA_CA2HD_1_P A11 B2 TBTA_HD2CA_1_P
38 TBT_I2C_SCL I2C_SCL1 RX1_P TX1_P

CGND
CGND
CGND
CGND
VCC3V3_SX_SYS C1

R446
R437
*3.3K_04
*3.3K_04
38 TBTA_I2C_INT
TBT_I2C_SDA2
TBT_I2C_SCL2
A5
B5
I2C_IRQ1Z

I2C_SDA2 3A 3A
A12
GND GND
B1
Sheet 40 of 62

GND1
GND2
GND3
GND4
R447 *10K_04 TBT_IRQ2Z B6 I2C_SCL2 H11

16 TBTA_ACE_GPIO0 TBTA_ACE_GPIO0 B2
C2
I2C_IRQ2Z

GPIO_0
GPIO_1
VBUS
VBUS
VBUS
VBUS
J10
J11
K11 C449
TPS65982
16 TBTA_ACE_GPIO2 D10 1u_6.3V_X5R_04
G11 GPIO_2 H2
C
16 TBTA_ACE_GPIO3
38 TBTA_HPD C10
E10
GPIO_3
GPIO_4
GPIO_5
Primary VOUT_3V3 VCC3V3_FLASH C

R483 *10K_04 G10 G1


TBTA_ACE_GPIO7 D7 GPIO_6 LDO_3V3
19 TBTA_ACE_GPIO7 GPIO_7
R482 *10K_04 H6 C483
VCC3V3_FLASH GPIO_8 K6 TBTA_USB2_P_T
C_USB_TP
38
38
TBT_EE_CLK
TBT_EE_DI
A3
B4 SPI_CLK
SPI_MOSI
C_USB_TN
L6 TBTA_USB2_N_T 10u_6.3V_X5R_04
NOTE:
A4

TO AP SPI ROM
38
38
TBT_EE_DO
TBT_EE_CS_N
B3 SPI_MISO
SPI_SS_Z
PAY ATTENTION SYMBOL
38
38
TBTA_USB2_D_P
TBTA_USB2_D_N
L5
K5 USB_RP_P
USB_RP_N C_USB_BP
K7 TBTA_USB2_P_B OF TPS65982 BASED ON DS R0.92
L7 TBTA_USB2_N_B
VCC3V3_SX_SYS
R436 1M_04
E2
F2 UART_TX
C_USB_BN AND MIGHT BE FUTURE CHANGES.
R428 10K_04 TBTA_ACE_GPIO0 UART_RX
R438 10K_04 TBTA_ACE_GPIO7 F4 L9 TBTA_CC1
G4 SWD_DAT C_CC1 L10 TBTA_CC2 C927
SWD_CLK C_CC2 C481
WHEN CONNECT BUSPOWERZ TO GND, 220p_50V_NPO_04
CONNECT ALSO RPD_Gn to C_CCn 220p_50V_NPO_04
16 TBTA_MRESET R486 *0_04 TBTA_MRESET_R E11 K9
M_RESET RPD_G1 K10
RPD_G2 VCC3V3_FLASH TBTA_CA2HD_1_P
38 TBTA_CA2HD_1_P
R487 100K_04 TBTA_CA2HD_1_N
E4 R445 10K_04 38 TBTA_CA2HD_1_N
TBTA_DBG_CTL1
L4 DEBUG_CTL1 D5 TBTA_DBG_CTL2 R444 10K_04 TBTA_HD2CA_0_N
38 TBTA_LSTX LSX_R2P DEBUG_CTL2 38 TBTA_HD2CA_0_N
38 TBTA_LSRX K4 38 TBTA_HD2CA_0_P TBTA_HD2CA_0_P
B LSX_P2R B
R443 100K_04 TBTA_DIG_AUD_P L3
R435 100K_04 TBTA_DIG_AUD_N K3 DEBUG3 K8 TBTA_SBU1

1
DEBUG4 C_SBU1
R434 100K_04 TBTA_DEBUG1 L2 L8 TBTA_SBU2 D51 D52
R433 100K_04 TBTA_DEBUG2 K2 DEBUG1 C_SBU2

1
R425 100K_04 DEBUG2 R485 *3.3K_04 VCC3V3_SX_SYS
J1 TEA10402V15A0 D54 D53
38 TBTA_DPSRC_AUX_P AUX_P
J2 F11 R484 0_04 TEA10402V15A0 D02 .ESDA
38 TBTA_DPSRC_AUX_N

2
R424 100K_04 AUX_N RESETZ TBT_RESET_N 38 5/5
VCC3V3_FLASH
F10 TEA10402V15A0 TEA10402V15A0
VCC3V3_FLASH BUSPOWERZ H7 TBTA_SS

2
TBTA_ROSC G2 SS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

R_OSC
38 TBTA_HD2CA_1_P TBTA_HD2CA_1_P
R427 U35 C468 38 TBTA_HD2CA_1_N TBTA_HD2CA_1_N
A1
B8
D6
D8
E5
E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H8
L1

15K_0.1%_04 TPS65982ABZQZ 0.22u_10V_X5R_04


Y 38 TBTA_CA2HD_0_P TBTA_CA2HD_0_P
0.1% TBTA_CA2HD_0_N
38 TBTA_CA2HD_0_N

1
D55 D56

1
5V PJ36 VCC5V0_SYS TEA10402V15A0 D57 D58 TEA10402V15A0
*3mm D02 1B

2
1 2 5/21
A
TEA10402V15A0 TEA10402V15A0 A

2
TBTA_USB2_P_B 10 1 TBTA_USB2_P_BJ
TBTA_USB2_N_B 9 2 TBTA_USB2_N_BJ
8 3
TBTA_USB2_N_T
TBTA_USB2_P_T
7
6
4
5
TBTA_USB2_N_TJ
TBTA_USB2_P_TJ    !!DMFWP!DP/
Title
PUSB3F96 3/3
[40] AR_TPS65982,TYPE C
D24
Size Document Number Rev
38,39 VCC3V3_SX_SYS A3 SCHEMATIC1 6-71-P75D0-D03 2.0
15,21,23,24,27,30,43,44,46,47,48,49,50 5V
Date: Monday, August 03, 2015 Sheet 40 of 62
5 4 3 2 1

TPS65982 B - 41
Schematic Diagrams

Cardreader RTS5250

5 4 3 2 1

RTS5250
CARD READER

D
SD_CARD SUPPORT UHS-II D

3.3VS

LENGTH <2INCH MDIO0~5 Q R S <200 mil


R488
| CLK - DATA | <= 100mils
*10K_04
3V3AUX
| DATA.x - DATA.y | <= 100mils
B.Schematic Diagrams

3.3VS
SD_WP/MS_BS CR1_LEDN R479 10K_04 CLK NEED DOUBLE SPACE THEN OTHER
SD_CD# R478 0_04 40 mil
CN1
MS_INS# 50ohm +/- 15%
SD_LN0_P SD_WP/MS_BS 1
D27 A C RB751S-40C2 SD_LN0_M C486 C487 SD_D1/SD_RCLK_M 2 WP
18,25,26,36,38 PCIE_WAKE# DAT1/RCLK-
100ohm +/- 15% SD_D0/SD_RCLK_P 3
4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04 4 DAT0/RCLK+
5 VSS5

Sheet 41 of 62 SD_LN1_P 6 VSS2

32
31
30
29
28
27
26
25
16,25,26,31,32,36,38 BUF_PLT_RST# U37 D1+
SD_CLK/MS_D0 7
SD_LN1_M 8 CLK

WAKE#
MS_INS#
SD_CD#
SP7
GPIO
3V3aux
SD_LN0_P
SD_LN0_M
3.3VS 9 D1-

Cardreader
VCC_CARD VDD1
PCH) 10
SD_VDD2 VDD2
R490 *10K_04 11
R491 *10K_04 C340 SD_CD# 12 VSS1
1 24 SDREG2 20 mil C475 1u_6.3V_X5R_04 0.1u_16V_Y5V_04 C414 13 CD

RTS5250 C
20
20
19 CR_CLKREQ#
PCIE_TXP8_CARD
PCIE_TXN8_CARD
2
3
4
5
PERST#
CLKREQ#
HSIP
HSIN
RTS5250
SDREG2
SD_LN1_M
SD_LN1_P
SP6
23
22
21
20
SD_LN1_M
SD_LN1_P 100ohm +/- 15%
SP6
SP5
R453
R454
0_04
0_04
SD_D2/MS_CLK
SD_D3/MS_D3
0.1u_16V_Y5V_04 SD_CMD/MS_D2
SD_LN0_M
SD_D3/MS_D3
SD_LN0_P
14
15
16
17
VSS4
CMD
D0-
CD/DAT3 21
C

19 CLK_PCIE_CARD
6 REFCLKP QFN32 SP5 19 SP4 R455 0_04 SD_CMD/MS_D2 SD_D2/MS_CLK 18 D0+ GND1 22
19 CLK_PCIE_CARD# REFCLKN SP4 DAT2 GND2

SP1/SD_RCLK_M
C496 0.1u_10V_X7R_04 RTS5249_HSOP 7 18 DV33_18 C476 1u_6.3V_X5R_04 19 23

SP2/SD_RCLK_P
20 mil
20 PCIE_RXP8_CARD HSOP DV33_18 VSS3 GND3
C497 0.1u_10V_X7R_04 RTS5249_HSON 8 17 20 24
20 PCIE_RXN8_CARD HSON SP3 R456 0_04 GND GND4
SP3 SD_CLK/MS_D0

CARD_3V3
SD_VDD2
DV12_S
C477 8191-3520-ZC71

3V3_IN
RREF
33

AV12
GND 5/21 update PCB Footprint *0.1u_16V_Y5V_04

0618 VALUE UPDATE

9
10
11
12
13
14
15
16
RTS5250-GR

SP2 R457 0_04 SD_D0/SD_RCLK_P 100ohm +/- 15%


SP1 R458 0_04 SD_D1/SD_RCLK_M
R492 6.2K_1%_04 12 mil RREF
20 mil
DV12_S
L<200mils
DV12_S AV12 C480 C479
40 mil Place Near Conn
20 mil SD_VDD2
R493 0_04 4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04
C489 C488
C499 C498
4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04
4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04
3.3VS 3.3V_IN CARD_3V3 Near Cardreader CONN
B 60 mil R489 0_06 60 mil 1.2A CARD_3V3 40 mil R331 0.2R 5% SMD0603 40 mil B
VCC_CARD
C491 C492 C317
R345
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04
*150_06
VCC_CARD
NEAR PIN11

SD Card Remove Fall time less than 1 ms


C318 C319 C341
when SD card remove.
0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 *10u_6.3V_X5R_06

Near Cardreader CONN

A A

   !!DMFWP!DP/
Title
[41] Cardreader RTS5250
Size Document Number Rev
A3 6-71-P75D0-D03 2.0
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,42,43,46,48,50,7,8,9 3.3VS
Date: Monday, August 03, 2015 Sheet 41 of 62

5 4 3 2 1

B - 42 Cardreader RTS5250
Schematic Diagrams

TPM SLB9655TT & NPCT420


5 4 3 2 1

SLB9655TT & NPCT420 COLAY W/O TPM


-/$ , & R225WXY

SLB9665TT
D D
TPM_PWR

 
R107 *0_04 3.3V
C157 C158
R110 0_04 3.3VS
U10 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 

26 5
20,31,32 LPC_AD0 

for W/ TPM LAD0 VSB

B.Schematic Diagrams
23 10 PIN5 PIN5
20,31,32 LPC_AD1 20 LAD1 NC_2 19
R225(PAGE21) 20,31,32 LPC_AD2
17 LAD2 VDD3 24
20,31,32 LPC_AD3 LAD3 VDD4 3.3VS
21 TPM C137 C138 C139
20 PCLK_TPM LCLK

20,31,32
15,16
LPC_FRAME#
PLT_RST#
PLT_RST#
TPM_BADD
22
16
9
LFRAME#
LRESET#
0.1u_16V_Y5V_04

PIN10
0.1u_16V_Y5V_04

PIN19
*10u_6.3V_X5R_06

PIN24
Sheet 42 of 62
GPIO3/BADD


C
20,31,32 SERIRQ
TPM_PP
27

7
SERIRQ
6 TPM_GPIO

 C TPM SLB9655TT &
3.3VS R636 *10K_04

R635 4.7K_04 1
PP

GPIO0/XOR_OUT
GPIO2/GPX
R625 C628 NPCT420
2 PCLK_TPM PCLK_TPM1
GPIO1

  3
NC_1

  8
TEST
*33_04 *10p_50V_NPO_04
   12 4
13 NC_4 VSS_1 11
NC_5 NC_3
  14
NC_6 VSS_2
18 

18 PM_CLKRUN#
R624 *0_04 CLKRUN# 15
CLKRUN#/GPIO4 VSS_3
25 

20 S4_STAT#
R627 *0_04 LPCPD#_TPM 28
LPCPD#
 

3.3VS R626 *10K_04 SLB9665TT PLT_RST# R633 *0_04 TPM_BADD



  R634 *10K_04
 

B B
LPC_SIRQ & PM_CLKRUN# T U PCHV  PULL HIGH

FORZ [\#
TPM_PWR

R106
H:W TPM 11,17,2,24,25,30,39,43,44,46,47 3.3V
10K_04 10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,43,46,48,50,7,8,9 3.3VS
L:W/O TPM
16 TPM_DET#

A A
R105
*100K_04    !!DMFWP!DP/
Title
[42] TPM SLB9655TT & NPCT420
Size Document Number Rev

A4
SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 42 of 62


5 4 3 2 1

TPM SLB9655TT & NPCT420 B - 43


Schematic Diagrams

VCCIO / 1P0A
1 2 3 4 5 6 7 8

5.5A
VCCIO OPTION DEFAULT SHORT

1 2 VCCIO
PJ46 3mm
U42
D02 1
5/4 1.0VA
9 8
C625 C626 VIN VOUT C635 C632 R630
A 7 A

10u_6.3V_X5R_06

10u_6.3V_X5R_06
VOUT
VCCIO 6

10u_6.3V_X5R_06

10u_6.3V_X5R_06
VOUT
5

*200_04
VOUT

PC73

PC72
PC71
M5938

*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*470u_2V_SMD-V


6/16 VCCIO_EN 2 4 5V
EN VBIAS
B.Schematic Diagrams

D02 VCCIO DEL


12"A R629
5/4
*10K_04 C634

1u_6.3V_X5R_04
D37
ON
*RB0540S2

Sheet 43 of 62

C
1 3
D02 0.01uF GATE GND

VCCIO / 1P0A B
4/30

0.01u_16V_X7R_04
C631
B

V1P0A VCCIO_EN 3.3VS

3.3V R111
For CV test VIN
100K_04
PR134 100K_04 1 2 PR258 820K_1%_06 R113
VDD5 3.3VS
PJ31 *CV-40mil 5/4 VCCIO_EN
VCCIO_EN 50

D
100K_04 Q14
PC100 PC223 PC101

1
1 2 PC109 G MTN7002ZHS3
17 VCC_3P3A_PWRGD
PJ30 1mm PU7 + R118

S
0.1u_50V_Y5V_06

15u_25V_6.3*4.4

*4.7u_25V_X5R_08

*4.7u_25V_X5R_08
DEFAULT SHORT C456 Q15
10K_04

2
1u_6.3V_X5R_04 PR141 PC94 G MTN7002ZHS3
D02 3.3VA?EN 0_06 0.1u_10V_X7R_04
1V/13A

S
C VDD5_VREG5 15 13 C
5/22 VDD1.0_EN R130 C169
EN_PSV BST
100K_04 *0.01u_16V_Y5V_04

2
3
4
PR147
16
TON DH
12
1 PL15 V1.0A
15A 1.0VA
PQ18 1.0UH_10*10*4.5 DEFAULT SHORT
1 11 MDU5693 9 1 2 1 2
10_1%_04 VOUT LX D02 1 8
PR142 5/26 PCB Footprint = TMPC1004H PJ55 6mm
2 10 4.3K_1%_04 3.3VS

VCCIO_PWRGD

5
6
7
VCC ILIM
PC111 VDD5_VREG5
3 9 PC69 5/4 PR80
VFB VDD 34ISSUE 3.3V

PD7
C

22u_6.3V_X5R_08
1u_6.3V_X5R_04 + PC199 100K_04
4 8
PGOOD DL

SVZ0EM331E4RP00R
PR77
VCCIO_PWRGD 21,48,50
PC95

D
6 7 20mils-40mils 100K_04 PQ5

CSOD140SH
AGND PGND 17 1u_6.3V_X5R_04 D02 PR78/0 MTN7002ZHS3
PGND 4/30 G
R442 10K_04
NC

NC

VDD3

S
PR78

C
1K_04
17 VCC_1P0A_PWRGD
5

14

G5602R41U VCCIO B PQ6


330uF M 2.5V SMD 6.3*4.2 BTN3904
534 PR79

E
D
100K_04 D

PR150 33.2K_1%_04
45 VDD5_VREG5
5,50 VCCSA
PC112 *15p_50V_NPO_04
15,21,23,24,27,30,40,44,46,47,48,49,50 5V

PR148
11,13,14,15,16,27,29,30,31,33,35,46,47
11,17,2,24,25,30,39,42,44,46,47
5VS
3.3V    !!DMFWP!DP/
2,3,5 VCCIO Title
100K_1%_04 18,21,46,51
11,15,27,29,31,44,45,46,47,48,49,50,51
1.0VA
VIN
[43] VCCIO/1P0A
23,44,45,46 VDD5 Size Document Number Rev
16,17,18,20,21,25,31,32,34,36,45,46,47,50,51
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,46,48,50,7,8,9
VDD3
3.3VS A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 43 of 62


1 2 3 4 5 6 7 8

B - 44 VCCIO / 1P0A
Schematic Diagrams

DDR 1.2V/0.6VS/VCCPLL_OC

5 4 3 2 1

1.2V/0.6VS 5V
A
PD1
C
PQ7
MDU1516 PC79 PC77 PC78
VIN

D
1.2V

1
ULTRASO-8
PU12 + PC147
RB0540S2

0.1u_50V_Y5V_06

*4.7u_25V_X5R_08

*4.7u_25V_X5R_08
G5616 G

VTT_MEM PC159 VDDQ_R 15u_25V_6.3*4.4


VDDQ 16A

2
10u_10V_Y5V_08
PC158 0.1u_10V_X7R_04
D 23
VLDOIN VBST
22 D03 PC157 C703 DEFAULT D
Short VTT_MEM_R

2
PJ14
1
1A 24 21 PR92
VDDQ_R Short
VTT_MEM VTT DRVH PL9
2mm 0_06 1.0UH_10*10*4.5 PJ50
DEFAULT PC164 PC165 PC166
1
VTTGND LL
20 1 2 1 2
VDDQ
PCB Footprint = TMPC1004H

PC152
PR96 PR223 8mm

PC151
22u_6.3V_X5R_08 *10u_10V_Y5V_08 *10u_10V_Y5V_08 0_06 2 19 PC163
VTTSNS DRVL PQ32 + PC157 + PC143

PD12
C
0_06 *MDU1512 PQ33
3 18 ULTRASO-8 MDU1512 *1000p_50V_X7R_04

D
GND PGND

SCAR250-1
*560u_2.5V_6.6*6.6*5.9

0.1u_16V_Y5V_04

SCAR250-1
560u_2.5V_6.6*6.6*5.9
PR97 0_06 17 PR222 0_06 ULTRASO-8
VDDQ_R CS_GND

B.Schematic Diagrams
0.1u_16V_Y5V_04
PR224
PR95 *0_04 4 16 PR87 10K_1%_06 5V G G
5V

CSOD140SH
MODE CS

S
PR225 *0_04 PC167 0.1u_10V_X7R_04 15
5 PVCC5 14 PR86 2.2_04 *5.1_06
VTTREF VCC5

5V PR94 0_06 6 13 PC153 PC154


COMP PGOOD 3.3V

Sheet 44 of 62

1u_10V_Y5V_06

1u_10V_Y5V_06
8 11
VDDQSNS S5
*1000p_X5R_06
PC168

*10_06

PR93

R795 PR227

C
9
VDDQSET S3
10 47K_04
D02 VDDQ_PWRGD
5/4
0_06 VDDQ
EMI C
DDR 1.2V/0.6VS/

GND
VDDQSET
*1000p_X5R_06

NC

NC
VCCPLL_OC
PC81

PC173 PC174

12

25
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04

PR90
5V PR91 6.04K_1%_04
*10K_1%_04
R251 47K_04
5V
PR226 10K_1%_06 PC160 *100p_50V_NPO_04

3
R252 10K_04 VTT_EN D Q17B

D
5V
C766
3.3V D02
C778 R267 100K_04 5 G Q18
(6.02K/10K+1)*0.75=1.203V
4/30 S G 0.1u_10V_X7R_04

4
6

1
*0.1u_16V_Y5V_04 D 67898mil *MTN7002ZHS3

S
D03 FOR PDA BUG,VTT_MEM ENABLE:;< R231 Q17A PJ53 MTDK5S6R
18,31,32,46,47 SUSC# SUSC# R250 1K_04 2 G *CV-40mil
D

*100K_04 PQ8 S

2
MTN7002ZHS3 3.3V MTDK5S6R
SUSB PR89 0_04 VTT_EN# G
12,14,15,46 SUSB
C226 DD_ON#
C

23,24,30,46 DD_ON#
S

B PQ9 3.3V PR106 0.1u_10V_X7R_04


3 DDR_VTT_CNTL
*BTN3904 07/27 Follow %change
*100K_04
E

B B
PR105 VDDQ_PWRGD
D

VTT_MEM
PR99 *22_04
*100K_04

G
PQ11
*MTN7002ZHS3
D02

5/5
3.3V
1.5A
VDD5
VCCPLL_OC
D

PC138
(FOR OCK 1.8V)
S

PQ10 2/10 PR108 PC136 PC137


C

G *100_04 D02
PU10 *1u_10V_Y5V_06
*MTN7002ZHS3 VDDQ B PQ12 5/5 R100 *G9661-25ADJF11U 1A
S

*10u_6.3V_X5R_06

*0.1u_10V_X7R_04
*BTN3904 3 4 VCCPLL_OC_1.8V VCCPLL_OC
PJ13 *47K_04 VIN VCNTL PJ42
E

*CV-40mil 1 6 1 2
POK VOUT
2

5 *OPEN_1mm
VDDQSET_R PR88 *0_04 VDDQSET PWRGD_VCCPLL_OC 2 NC PR204 PC135 PC133 PC132 PC134
EN
8 7
Ra *12.7K_1%_04
GND VFB

*10u_6.3V_X5R_06

*10u_6.3V_X5R_06
*82p_50V_NPO_04

*0.1u_16V_Y5V_04
9
PR100 GND

0_04

5V <TABLE DEFAULT SHORT


J11 *40mil
Rb
PR205

PR101 VDDQ_PWRGD 1 2 *10K_1%_04

3.3V 29.4_1%_04 PR98


DDR GPIO OUTPUT VOLTAGE SELECT
PR102 J10 *40mil
RENAME 29.4_1%_04
18,21,28,29,31,32,38,46 SUSB#
1 2 ON Vout = 0.8V ( 1 + Ra / Rb )
3

A
5/4 100K_04 D A
DEFAULT PR104
5 G
GPIO DDR Vout
PQ103B
*100K_04 S MTDK5S6R
4
6

PJ17 PQ103A D HI 1.2V


   !!DMFWP!DP/
1

23,43,45,46 VDD5
1

1 2 PR229 0_04 2 G PJ16


18 DDR_VOLTAGE_SEL 5 VCCPLL_OC
S *CV-40mil PJ15
16,17,18,20,21,25,31,32,34,36,43,45,46,47,50,51 VDD3
1

1mm MTDK5S6R Title


*CV-40mil LO 1.35V 15,21,23,24,27,30,40,43,46,47,48,49,50 5V
[44] DDR 1.2V/0.6VS/VCCPLL_OC
2

Short PR228 RENAME


11,15,27,29,31,43,45,46,47,48,49,50,51 VIN
2

5/4
10,18,5,7,8,9 VDDQ
07/27 Follow %change Size Document Number Rev
10K_04
11,17,2,24,25,30,39,42,43,46,47
10,7,8,9
3.3V
VTT_MEM A3 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 44 of 62


5 4 3 2 1

DDR 1.2V/0.6VS/VCCPLL_OC B - 45
Schematic Diagrams

VDD3, VDD5
5 4 3 2 1

VREF

PR139 *0_04 PR137 0_04


PC220

1u_10V_Y5V_06

PR138 PR143
D EN_3V EN_5V D
VIN PC227
140K_1%_04 76.8K_1%_04 PC222

1
PC103 PC102 PC226 PC104 1000p_50V_X7R_04 1000p_50V_X7R_04 VIN

1
+ PU16
VREG3

EN2

VFB2

TONSEL

VREF

VFB1

EN1
*4.7u_25V_X5R_08

*4.7u_25V_X5R_08

15u_25V_6.3*4.4

0.1u_50V_Y5V_06
2
PC98 PC212 PC96 PC97

1
7 24
VO2 VO1 +

VDD3

0.1u_50V_Y5V_06

15u_25V_6.3*4.4

*4.7u_25V_X5R_08

*4.7u_25V_X5R_08
PC228
8 23 PR257 SYS5V
VDD5

2
LDO3 POK 10K_04
1u_6.3V_X5R_04 PC229 PQ39
B.Schematic Diagrams

PC230 9 22 MDU1516

D
5
5
5
5
BOOT2 BOOT1 ULTRASO-8

VDD3
Short PQ38 0.1u_10V_X7R_04 uP6182B 0.1u_10V_X7R_04
6-19-41001-73C 4 10 21 G Short
SYS3V PL17 UGATE2 UGATE1 PL16 SYS5V VDD5
9A

3
2
1

S
PJ32 BCIHP0730-1R0M MDV1526URH 2.2UH_10*10*5 PJ23
2 1 2 1 11
PHASE2 PHASE1
20 1 2 12A 1 2
PCB Footprint = BCIHP0735A H = 4mm
5mm PQ41 PQ40 PCB Footprint = TMPC1004H R1 8mm

PD17
D

C
5
5
5
5
Sheet 45 of 62 DEFAULT DEFAULT

PC225

PC224
MDV1524URH 12 19 MDU1512 PR136

PD18

GND PAD
C

SKIPSEL
PC218 LGATE2 LGATE1 ULTRASO-8 PC221
R1
PR256 PC219 4 G 30K_1%_06

LDO5

VCLK
GND
EN0
0.1u_16V_Y5V_04

VIN
+ + *1000p_50V_X7R_04 PC193 PC192

3
2
1

S
VDD3, VDD5 13.7K_1%_06

CSOD140SH
100p_50V_NPO_04
220u_6.3V_6.3*6.3*4.2

220u_6.3V_6.3*6.3*4.2
+ +

13

14

25
15

16

17

18
CSOD140SH
D02 1

SCAR250-1

SCAR250-1
C R2 PC206 C
D02 ./

SCAR250-1
220u_6.3V_6.3*6.3*4.2

SCAR250-1
220u_6.3V_6.3*6.3*4.2
PR259 5/26 PR135
R2 EN_ALL 5/21 0.1u_16V_Y5V_04
PR140 18.7K_1%_06
*680K_1%_04
20K_1%_04
VDD5 D02 ./ VDD5_VREG5
Vout PR260 0_04 5/21 Vout 5/4

PR265
VREF
RIPPLE ISSUE
=2*(1+R1/R2) VREG5 =2*(1+R1/R2)
VREG5 PR145 *0_04 PR274 *0_06
=2*(1+13.7K/20K) =2*(1+30K/18.7K)

2.2_06
=3.37V =5.208V
VIN1 PR275 0_06

C A
PC233 PC231 DEFAULT
VIN
4.7u_25V_X5R_08 1u_6.3V_X5R_04
PD8
RB751V-40(lision)
M-SOD323A
  
 
R409 *0_04 EN_3V
VREG5

R423 0_04 EN_5V

EN_3V5V
R480
07/27 Follow %change 3
B D02
10K_04 D B
5/5 Q29B
DD_ON_EN_VDD 5 G
S MTDK5S6R
4

1
D
VDD3 Q29A PJ35 R481
VCC_3P3DSW_PWRGD 2G MTDK5S6R *CV-40mil
31,46 USB_CHARGE_EN
Function Table S 100K_04
DESIGN NOTE:

2
D
PCH_DPWROK >10MS DELAY VDD3 Q59
A Y
R883 *MTN7002ZHS3
L H G
U53 17,18,31,46 SLP_SUS#
*22K_04 C854

S
R903 1 5 *0.1u_10V_X7R_04 H L D02 ./SLP_SUS#XY=

D
2 NC VCC 4/30
*47K_04 Q54 A Q28
D

*2SK3018S3 G MTN7002ZHS3
23,31,46 DD_ON
3 4 R867 *249_1%_04
PCH_DPWROK 18

S
R904 *0_04 G GND Y
C855 *74LVC1G14
S

*1u_6.3V_X5R_04 R851 0_04


RSMRST# 18,31

43 VDD5_VREG5
16,17,18,20,21,3,46 3.3VA
15,21,23,24,27,30,40,43,44,46,47,48,49,50 5V
A 16,17,18,20,21,25,31,32,34,36,43,46,47,50,51 VDD3 A

23,43,44,46 VDD5
6/15
46 VIN1
11,15,27,29,31,43,44,46,47,48,49,50,51 VIN

DMFWP!DP/ 
Title
[45] VDD3,VDD5
Size Document Number Rev
A3 SCHEMATIC1 6-71-P75D0-D03 2.0
Date: Monday, August 03, 2015 Sheet 45 of 62
5 4 3 2 1

B - 46 VDD3, VDD5
Schematic Diagrams

12V, 5VS, 3.3VS, 3.3VA


5 4 3 2 1

VDD5 VDD5
C447 U33 EM5209 C455

0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04 VDD3


2 IN1 IN2 7
IN1 IN2

5V 5V 6A 13
14 OUT1 OUT2
8
9
4A 5VS
5VS R262
C464 OUT1 OUT2 C461
12 10 10K_04
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04

VBIAS
D For CV test For CV test DD_ON#

GND

GND
DD_ON# 23,24,30,44 D

EN1

EN2
C463 C462

D
220p_50V_NPO_04 220p_50V_NPO_04 Q20
PR133 10K_04 VDD3_R 1 2 2 1 VDD3_R VDD3
VDD3

15

11

5
G MTN7002ZHS3 C273
23,31,45 DD_ON
PJ26 PJ25

S
*CV-40mil R408 R407 *CV-40mil *0.1u_16V_Y5V_04
10K_04 10K_04 R609 R497
DD_ON 1 2 DD_ON_EN SUSB#_EN 2 1 SUSB#
VDD5 100K_04 10K_04
PJ27 C444 C443 C442 PJ24
OPEN_4mil 1u_6.3V_X5R_04 OPEN_4mil SUSB
SUSB 12,14,15,44
DEFAULT *0.1u_10V_X7R_04 *0.1u_10V_X7R_04 DEFAULT

D
Q32

B.Schematic Diagrams
ON 18,21,28,29,31,32,38,44 SUSB#
G MTN7002ZHS3 C500
ON SUSB#_EN 47

S
1 2 *0.1u_16V_Y5V_04
17,18,31,45,46 SLP_SUS#
R498
PJ28
OPEN_4mil 100K_04

Sheet 46 of 62
C D02 >?D
5/20
C
12V, 5VS, 3.3VS,
VDD3 1.0VA
D02
3.3VA
C930

0.1u_16V_Y5V_04 1
U57 EM5209

6
C931 VCCST_VCCPLL 5/5

2 IN1 IN2 7 0.1u_16V_Y5V_04 VCCST_VCCPLL


IN1 IN2 VDD3 3.3VA

3.3VA 3.3VA 2A 13
14 OUT1 OUT2
8
9
1A VCCST_VCCPLL
C932 OUT1 OUT2 C933 R287
12 10 R308
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04 R81
VBIAS

For CV test 10K_04 100_04


GND

GND
EN1

EN2

C934 C935
For CV test

3
220p_50V_NPO_04 470p_50V_X7R_04 D *100_04
VDD3 PR151 10K_04 VDD3_CV 1 2 2 1 VDD3_CV
3

15

11

SLP_SUS 5 G Q21B
PJ58 *CV-40mil PJ59 *CV-40mil S MTDK5S6R

4
6
R966 R967 D

D
10K_04 10K_04 Q11
1 2 VDD3 2 1 SLP_SUS# 2 G Q21A
17,18,31,45,46 SLP_SUS# SUSC# 18,31,32,44,47
PJ61 OPEN_4mil S MTDK5S6R G
47 SUSC

1
PJ60 C937 C936 C938 DEFAULT *MTN7002ZHS3

S
DEFAULT 1u_6.3V_X5R_04
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04
B 07/27 Follow %change B

= 

ON ON
= 

VIN VA
VIN1
VDD3 VDD3
U40
C401 U28 EM5209 C402 R598 10K_04 1 8 R610 100K_04 DD_ON
VA VIN1
0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04 R615 1_1%_06 2 7 R617 *100K_04
IN1 IN2 VIN DD_ON_LATCH USB_CHARGE_EN 31,45
2 7
IN1 IN2 R608 10K_04 3 6 R621 10K_04

3.3V 3.3V 6A 13
14 OUT1 OUT2
8
9
4A 3.3VS
3.3VS 34 M_BTN#
R616 *100K_04 4
M_BTN# PWR_SW#
5 R618 1K_1%_04
VDD3

OUT1 OUT2 INSTANT-ON GND PWR_SW# 31,32


C368 C371
12 10 USB_CHARGE_EN R620 1K_1%_04 P2808B0
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04
VBIAS
GND

GND
EN1

EN2

C369 C370
220p_50V_NPO_04 470p_50V_X7R_04
3

15

11

A A
18,21,43,51 1.0VA
R396 18,3,48,5 VCCST_VCCPLL
10K_04 16,17,18,20,21,3 3.3VA

   !!DMFWP!DP/
DD_ON_EN VDD3 R397 10K_04 SUSB#_EN 51 VA
45 VIN1
C408 C409 C410 23,43,44,45 VDD5
1u_6.3V_X5R_04 Title
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04
11,15,27,29,31,43,44,45,47,48,49,50,51
15,21,23,24,27,30,40,43,44,47,48,49,50
VIN
5V [46] 12V.5VS,3.3VS,3.3VA
11,13,14,15,16,27,29,30,31,33,35,47 5VS
16,17,18,20,21,25,31,32,34,36,43,45,47,50,51 VDD3 Size Document Number Rev
11,17,2,24,25,30,39,42,43,44,47 3.3V A3 SCHEMATIC1 6-71-P75D0-D03 2.0
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,48,50,7,8,9 3.3VS
Date: Monday, August 03, 2015 Sheet 46 of 62

5 4 3 2 1

12V, 5VS, 3.3VS, 3.3VA B - 47


Schematic Diagrams

5VS_2

1 2 3 4 5 6 7 8

PR117 VIN
560K_1%_04 5VS_2
5VS_2 5V PU14
IMAX:4A

1
17
24 VIN 18 PC191 + PC202
TON VIN
PC91 VIN
19
20 0.1u_50V_Y5V_06 15u_25V_6.3*4.4
OCP:8A PJ33

2
3 VIN 31 2 1
VDD VIN 5VS
A A
1u_6.3V_X5R_04 PR114 3mm
PR126 22
BST PC86
10_04
30 0_06 PL14 PJ22 5VS_2
PC211 LX 5 0.1u_50V_Y5V_06 BCIHP0730-4R7M
26 LX 6 1 2 2 1
VCC LX 7
1u_6.3V_X5R_04 LX 8 3mm
LX
5VS_2GND
LX
9 PR234 DEFAULT
8/3 REMOVE PC203 FOR TIMING*+ 10 2.2_06 PC205 PC88 PC89
LX 11 +
PGND
Short
PR243 10K_04 23 12 220u_6.3V_6.3*6.3*4.2 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
46 SUSB#_EN EN_SKIP PGND 13
B.Schematic Diagrams

PC203 PGND 14 PC185


29 PGND 15 2200p_50V_X7R_04 PR245
*0.1u_50V_Y5V_06 AGND PGND 16 10K_1%_04
PR118 0_06 2 PGND PR252
AGND *28mil_06
5VS_2GND 4
5VS_PWRGD_R 28 PGND
21 5VS_PWRGD PGOOD 21
PR125 100K_04 NC 25 5VS_2GND

Sheet 47 of 62
3.3V OUT
PR247 6.04K_1%_04 1 27 PR246 115K_1%_06
ILIM FB

5VS_2 B
G5310QNIU

PR253 PC90
PC204
*100P_50V_NPO_04
PR244
10K_1%_04
B

20K_1%_04 10P_50V_NPO_04

5VS_2GND

5VS_2GND
VIN
EMI REQ,1/22 Tim
PR146
VDD3 PC106 PC105 PC108 PC107

R80 4.7u_25V_X5R_08 4.7u_25V_X5R_08 0.1u_25V_X7R_06 0.1u_25V_X7R_06 0_06

10K_04 PC110 2.5V/4A

10
SUSC PU15 0.1u_10V_X7R_04 PL18 2.5V
SUSC 46
BCIHP0730-1R5M 4A PJ56

BST
D

Q12 PJ34 *CV-40mil 1 8 1 2 1 2


PR149 100K_04 1 2 VIN LX 9
VDD3 LX
G MTN7002ZHS3 C128 15 *OPEN_3mm
18,31,32,44,46,47 SUSC# LX 16 DEFAULT

PC215
PC217
PC214
PC216
S

*0.1u_16V_Y5V_04 LX
R84 7 Short
PJ29 1 2 1mm 13 VOUT
C 18,31,32,44,46,47 SUSC# EN PR144 C
100K_04

22u_6.3V_X5R_06
22u_6.3V_X5R_06
0.1u_10V_X7R_04
*22u_6.3V_X5R_06
DEFAULT PC213 PC99
C471 3
*1u_16V_X7R_04 LP# 0.1u_10V_X7R_04 *10K_1%_04 *0.1u_25V_X7R_06

PR255 12 PR264
*10K_1%_04 FB

C
fs=500KHz PD9 1/27
31.6K_1%_04
11 2
VCC PGND PR263 *10K_1%_04 6-13-31621-28B

CSOD140SH
PR254 4 14 PR262
10K_1%_04 PG AGND
PR261
10K_1%_04
NB671GQ-Z
PC232 [\PIN11 *20mil_04

1u_25V_X5R_06
NB671_SIGNAL_GND2 NB671_SIGNAL_GND2
NB671_SIGNAL_GND2

(31.6K/10K+1)*0.604V=2.5V
D D

16,17,18,20,21,25,31,32,34,36,43,45,46,50,51 VDD3
   !!DMFWP!DP/
Title
10,7,8,9
11,13,14,15,16,27,29,30,31,33,35,46
2.5V
5VS [47] 5VS_2 / 2.5V
11,15,27,29,31,43,44,45,46,48,49,50,51 VIN
15,21,23,24,27,30,40,43,44,46,48,49,50 5V Size Document Number Rev
11,17,2,24,25,30,39,42,43,44,46 3.3V A3 SCHEMATIC1 6-71-P75D0-D03 2.0
17,33,34,35 5VS_2
Date: Monday, August 03, 2015 Sheet 47 of 62

1 2 3 4 5 6 7 8

B - 48 5VS_2
Schematic Diagrams

VCore / VCCGT

1 2 3 4 5 6 7 8

Intel SKYLAKE IMVP8 POWER VCORE 4+0 PHASE PROG

VCCST_VCCPLL
4+0 PR168
3.3VS 3.3VS VIN CONFIGURATION
5V 75K_1%_04

VCORE PR159 PR160 PC115


A R500 R499 1u_6.3V_X5R_04 A
2.2_06 1K_1%_04
10K_04 10K_04
3.3VS PC4 PR156 PR158 PR157
D02
PC5 PUT CLOSE
5/5 0.01u_50V_X7R_04 100_04 45.3_1%_04 *45_04 TO PWM
For CV test C1 4.7u_6.3V_X5R_06 VBOOT/ADDR
PR11 C2 PU1 For CV test
10K_04
1 2 *0.1u_10V_X7R_04 NCP81203AMNTXG

2
*CV-40mil *0.1u_10V_X7R_04 6X6 52PIN QFN multi phase fun
PJ1

9
PJ4 PJ5

B.Schematic Diagrams
3 PR7 10_04 *CV-40mil

VCC

VRMP
SDIO H_VIDSOUT_VR 3 OPEN_4mil
1 2 PR12 0_04 VR_ENABLE 2 5 PR5 49.9_1%_04 NO CPU
21,43,50 VCCIO_PWRGD H_VIDSCK_VR 3

1
PJ40 EN SCLK 4 PR6 0_04 1.2V/21K
ALERT# H_VIDALERT_N_VR 3
OPEN_4mil D02 1 VCORE VBOOT
D02 1 5/5 6 35 PR45 PR46
50 VR_READY_VCORE VRDY DRVON DRVON 49,50 SET AT 0V,
5/26 34
PWM1 PWM1 49
50 38 SVID 15K_1%_04 21K_1%_04
DIFF CSN1 CSN1 49
39 PR41 *100K_1%_04
PR164 47.5_1%_04 PC117 470p_50V_X7R_04 PR23 4.02K_1%_04 PC20 2200p_50V_X7R_04 48 CSP1 CORE ADDRESS=00h

PR22 1K_1%_04
1/6
PC18 47p_50V_NPO_04
COMP

PWM2
33
49 CSP1
PR42 7.5K_1%_04 PC26 0.022u_25V_X7R_04

PWM2 49
Sheet 48 of 62
49 40

VCore / VCCGT
FB CSN2 CSN2 49
41 PR43 *100K_1%_04 IMAX
CSP2 CORE
PR44 7.5K_1%_04 PC27 0.022u_25V_X7R_04
49 CSP2
32
PWM3 PWM3 49
B 42 VCORE PR192 B
CSN3 CSN3 49
PR10 0_04 51 43 PR30 *100K_1%_04
5 VCCCORE_SENSE VSP CSP3 IMAX SET
PC7 CORE 95.3K_1%_04
PR8 PR31 7.5K_1%_04 PC21 0.022u_25V_X7R_04 AT 120A
49 CSP3
PR9 0_04 1000p_50V_X7R_04 52
5 VSSCORE_SENSE VSN
1K_1%_04 D02 ) :-
PC6 45 12/25 PR173 5/25 57.6K_1%_06 CSP1
CSSUM PR165
4700p_50V_X7R_04 47 PR166 100K_1%_04 PR177 57.6K_1%_06 CSP2
CSCOMP 36K_1%_04
1 2 PR174 57.6K_1%_06 CSP3
PR29 NTC2 PC120 *220p_50V_NPO_04 VBOOTA/ADDRA
1 46 100k_1%_04_NTC PR176 57.6K_1%_06 CSP2A For CV test
IOUT ILIM 30K_1%_04 PC121 1500p_50V_04

2
PR155 PC11 VCORE PORTION 44 1/6 PR180 10_04 CSN1
CSREF PJ3 PJ2
O.C.P 144A
24.3K_1%_04 470p_50V_X7R_04 PR179 10_04 CSN2 VCCGT VBOOT OPEN_4mil *CV-40mil
PROG 10 NO CPU

1
1/6 VBOOT/ADDR 28 PH/FDm/FDa/SR/DDR 5V PR178 10_04 CSN3 SET AT 0V, 1.2V/15.8K
IMAX 36 VBOOT/ADDR D02 1B PR266
ICCMAX SVID
5/21 [\@AB PR175 10_04 CSN2A PR20 PR19
ADDRESS=01h
2K_04 PC19 1000p_50V_X7R_04 10K_1%_04 15.8K_1%_04
16 30
DIFFA PWM1A PWM1A 50
26
CSN1A CSN1A 50
PR1 *47.5_1%_04 PC1 *470p_50V_X7R_04 PR21 *4.02K_1%_04 PC8 *2200p_50V_X7R_04 18 25 PR40 *100K_1%_04
COMPA CSP1A
1/6
50 CSP1A
PR39 *7.5K_1%_04 PC25 *0.022u_25V_X7R_04 GT
PR2 *1K_1%_04 PC9 *47p_50V_NPO_04
C 17 PWM1A C
VCCGT FBA
[\@AB PR267 31
PWM2A PWM2A 49
PR203 24
CSN2A CSN2A 49
PR268 0_04 23 PR38 *100K_1%_04 VCCGT PR183
*100_04 [\@AB CSP2A CORE
0_04
PR37 7.5K_1%_04 PC24 0.022u_25V_X7R_04 IMAX SET *15.8K_1%_04
49 CSP2A
PR170 *0_04 15 [\@AB AT 20A
6 VCCGT_SENSE VSPA
PC118
PR3
PR171 *0_04 *1000p_50V_X7R_04 14 21 CSSUMA PR187 *56.2K_1%_06 CSP1A 5/12
6 VSSGT_SENSE VSNA CSSUMA
*1K_1%_04 PR26
PC10 19 *36K_1%_04 PR27 *150K_1%_04 D02 ) :- R980
PR202 1/6 CSCOMPA 5/5 0_04
*4700p_50V_X7R_04 NTC4 1 2
*100_04 PR269 *100k_1%_04_NTC PC15 *100p_50V_NPO_04
*470p_50V_X7R_04 0_04
PC2 [\@AB 20 PR28 PC16 *1000p_50V_X7R_04
13 ILIMA *7.5K_1%_04
IOUTA 22 PR186 *10_04 CSN1A
VCCST_VCCPLL CSREFA
O.C.P 24A
PR4 *24K_1%_04 PR270
50,6 VCCGT
05/15 VBOOTA/ADDRA 27 0_04 18,3,46,5 VCCST_VCCPLL
PR169 PR184 *10K_1%_04 PSYS_81203 29 VBOOTA/ADDRA PC17
PSYS GT PORTION 49,5 VCORE
PR185 0_04 PR271 *1000p_50V_X7R_04 11,15,27,29,31,43,44,45,46,47,49,50,51 VIN
51 PSYS
*1K_1%_04 Charger 0_04 15,21,23,24,27,30,40,43,44,46,47,49,50 5V
PR163 100_04 12 11,17,2,24,25,30,39,42,43,44,46,47 3.3V
3,51 H_PROCHOT_N VRHOT
ROSC

EPAD

D
11 10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,50,7,8,9 3.3VS D
37 TSENSEA
TSENSE PC3 PR161
PR181 PUT CLOSE
8

53

*0.1u_10V_X7R_04

*4.12K_1%_04
TO GT
   !!DMFWP!DP/
4.12K_1%_04 PC31 BOTTOM PAD
1

CONNECT TO HOT SPOT


0.1u_10V_X7R_04

PR167 PR162
1

PR182 GND Through NTC3 Title


PUT CLOSE NTC1 Work F 20K_1%_04 *9.31K_1%_04 *100k_1%_04_NTC [48] VCORE/VCCGT
2

9.31K_1%_04 5 VIAs
TO VCORE 100k_1%_04_NTC =300kHz Size Document Number Rev
6-71-P75D0-D03
2

HOT SPOT D02 1 A3 SCHEMATIC1 2.0


5/26
Date: Monday, August 03, 2015 Sheet 48 of 62
1 2 3 4 5 6 7 8

VCore / VCCGT B - 49
Schematic Diagrams

VCore Output Stage

8 7 6 5 4 3 2 1

03/20
VIN
for EMI VCORE OUTPUT STAGE

1
PC59 PC46 + PC53 PC235 PC236 PC237 PC238 PC239

1u_25V_X5R_06

25TQC15MYFB

0.1u_25V_X7R_06

0.1u_25V_X7R_06

0.1u_25V_X7R_06

0.1u_25V_X7R_06

0.1u_25V_X7R_06
*4.7u_25V_X5R_08
5V

PR36 PC23
2.2_06 PR25 D02 0603 D03 ./
2.2_06 5/4 6/30
0.22u_16V_X7R_06 D1 1 D1 1
D PU4 2 2 D
NCP81151MNTBG
INS128741265 INS128742633

1
BST HG
8 PR194 1_1%_06 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON
0.9m ohm
PL5 0V~1.2V/120A

4
S1 S1 BCIHP0730-0R15M
48 PWM1 2 SW 7
PWM *10K_1%_06 PR193 6 6 2 1
D2 D2 VCORE
3 8 8
48,49,50 DRVON EN GND 6 7 7

*20mil_04

*20mil_04
2.2_1%_06
PR47

PR52

PR56
4 VCC LG 5
PC51 PC48 PC50 PC49 PC127
PC14 PAD PQ24 PQ25 + + + + +
5 G2 5 G2
CSD87350Q5D CSD87350Q5D
B.Schematic Diagrams

470u_2V_SMD-V

470u_2V_SMD-V

470u_2V_SMD-V

470u_2V_SMD-V

470u_2V_SMD-V
5/4 PC42
2.2u_6.3V_X5R_04 S2 9 S2 9
2200p_50V_X7R_04

BOTTOM PAD
CONNECT TO 48 CSP1
GND Through
4 VIAs
VIN 48 CSN1

Sheet 49 of 62

1
5V PC38 PC37 PC45
+

1u_25V_X5R_06

25TQC15MYFB
*4.7u_25V_X5R_08
PC28

VCore Output

2
PR32
PR24 2.2_06
2.2_06 0.22u_16V_X7R_06 D1 1 D1 1
PU2 2 2
NCP81151MNTBG D02 0603

Stage
PR190 INS128747271 INS128747319 5/4
1 8 1_1%_06 3 G1 MLP08 3 G1 MLP08
0.9m ohm
BST HG COMMON COMMON
PL4

4
S1 S1 BCIHP0730-0R15M
48 PWM2 2
PWM SW 7 Ceramic / 0805/X5R
C *10K_1%_06 PR191 D2 6 D2 6 2 1 C
3 8 8
48,49,50 DRVON EN GND 6 7 7

PC57

PC58
PR48
4 VCC LG 5

*20mil_04

*20mil_04
2.2_1%_06

PR53

PR57
PC12 PAD PQ23 PQ22
5 G2 5 G2
CSD87350Q5D CSD87350Q5D
5/4 PC43
2.2u_6.3V_X5R_04 S2 9 S2 9

*22u_6.3V_X5R_06

*22u_6.3V_X5R_06
2200p_50V_X7R_04

BOTTOM PAD
CONNECT TO
GND Through
4 VIAs
48 CSP2

VIN 48 CSN2

1
5V PC35 PC39 PC122
+

1u_25V_X5R_06

25TQC15MYFB
*4.7u_25V_X5R_08
PC29

2
PR33
PR13 2.2_06
2.2_06 0.22u_16V_X7R_06 D1 1 D1 1
PU3 2 2
NCP81151MNTBG
INS128749422 INS128749470 D02 0603
1 8 PR188 1_1%_06 3 G1 MLP08 3 G1 MLP08
5/4 0.9m ohm
COMMON COMMON
BST HG PL3

4
S1 S1 BCIHP0730-0R15M
48 PWM3
2
PWM SW 7 6 6 2 1
Ceramic / 0805/X5R
*10K_1%_06 D2 D2
3 PR189 8 8
48,49,50 DRVON EN GND 6
7 7

*20mil_04

*20mil_04
PR49

PR54

PR58

PC62

PC56
4 VCC LG 5

2.2_1%_06
B B
PC13 PAD PQ20
5 G2 PQ21 5 G2 CSD87350Q5D
5/4 CSD87350Q5D PC44
2.2u_6.3V_X5R_04 S2 9 S2 9

*22u_6.3V_X5R_06

*22u_6.3V_X5R_06
2200p_50V_X7R_04

BOTTOM PAD
CONNECT TO
GND Through
4 VIAs
48 CSP3

5V VIN
48 CSN3

PC34 PC36 PC40

1
PR195 PC124 +

1u_25V_X5R_06

25TQC15MYFB
*4.7u_25V_X5R_08
2.2_06 PR196
2.2_06

2
0.22u_16V_X7R_06 D1 1 D1 1
PU9 2 2
NCP81151MNTBG
INS128751579 INS128751627 D02 0603
1 8 PR199 1_1%_06 3 G1 MLP08 3 G1 MLP08
5/4 0.9m ohm
BST HG COMMON COMMON
PL6
4

S1 S1 BCIHP0730-0R15M
48 PWM2A 2 SW 7
PWM *10K_1%_06 6 6 2 1
D2 D2
3 PR198 8 8
48,49,50 DRVON EN GND 6 7 7

*20mil_04

*20mil_04
PR50

PR51

PR55

PC60

PC61
4 VCC LG 5

2.2_1%_06
PC123 PAD PQ28
5 G2 PQ27 5 G2 CSD87350Q5D
A A
5/4 CSD87350Q5D PC47
2.2u_6.3V_X5R_04 S2 9 S2 9

*22u_6.3V_X5R_06

*22u_6.3V_X5R_06
2200p_50V_X7R_04
23,43,44,45,46 VDD5
16,17,18,20,21,25,31,32,34,36,43,45,46,47,50,51 VDD3
11,17,2,24,25,30,39,42,43,44,46,47 3.3V
BOTTOM PAD 15,21,23,24,27,30,40,43,44,46,47,48,50 5V
CONNECT TO 48 CSP2A 11,15,27,29,31,43,44,45,46,47,48,50,51 VIN
GND Through 5 VCORE
4 VIAs

48 CSN2A    !!DMFWP!DP/
Title
[49] VCORE OUTPUT STAGE
Size Document Number Rev
A2 SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 49 of 62


8 7 6 5 4 3 2 1

B - 50 VCore Output Stage


Schematic Diagrams

VCCSA / VCCGT

8 7 6 5 4 3 2 1

5V VIN

1
PC65 PC131 PC130
+

*1u_25V_X5R_06

*4.7u_25V_X5R_08

*25TQC15MYFB
PR68 PC64

2
*2.2_06 PR69
*2.2_06
*0.22u_16V_X7R_06 D1 1 D1 1
D PU5 2 2 D

1
*NCP81151MNTBG

8 PR71 *1_06 3 G1
INS128959250
MLP08
COMMON
3 G1
INS128959582
MLP08
COMMON
D02 0603
5/4 0.9m ohm
0V~1.2V/20A
BST HG PL7

4
S1 S1 *BCIHP0730-0R15M
2
48 PWM1A PWM SW 7 6 6 2 1
*10K_1%_06 PR70 D2 D2
8 8 VCCGT
48,49 DRVON 3 GND 6
EN 7 7

*20mil_04

*20mil_04
PR74

PR75

PR76
2.2_1%_06
4 5
VCC LG
PC63 PAD PQ30 PQ29 PC140 PC141
5/4 5 G2 *CSD87350Q5D 5 G2 *CSD87350Q5D + +
PC66

*470u_2V_SMD-V

*470u_2V_SMD-V
9 9

B.Schematic Diagrams
*2.2u_6.3V_X5R_04 S2 S2 D02 VCCGT

*2200p_50V_X7R_04 5/8

BOTTOM PAD
CONNECT TO 48 CSP1A
GND Through
4 VIAs 48 CSN1A

Sheet 50 of 62
VCCSA / VCCGT
C C

PC67

PC68
*22u_6.3V_X5R_06

*22u_6.3V_X5R_06
VCCSA For CV test
VIN
*CV-40mil
PR34 820K_1%_06
PR15 100K_04 PJ37 1 2
VDD3

1
PU8 PQ1 PC30 PC52 PC32 PC33
MDU1516 +
D
PR14 10K_04 PJ39 1 2 *1mm ULTRASO-8
43 VCCIO_EN D02 PU 5V 0.1u_50V_Y5V_06 *15u_25V_6.3*4.4_C 4.7u_25V_X5R_08 4.7u_25V_X5R_08

2
5/5 G
B B
PJ38 1 2 1mm VCCSA_EN 15 13 PR172 0_06
21,43,48 VCCIO_PWRGD
S

EN_PSV BST PC22


DEFAULT 5V
16 12 PR272
0.1u_10V_X7R_04 Short 11.1A
0_06
PR17 TON DH D02 1B PL2 VCCSA_R VCCSA
PC116 5/21 BCIHP0730-1R0M PJ41
2.2_04 1 11 1 2 1 2
*0.01u_16V_X7R_04 VOUT LX PCB Footprint = BCIHP0735A
5/26 8mm
D02
DEFAULT

PC129

PC54

PC128
2 10 PR35 4.3K_1%_04 OCP PR273
4/30 VCC ILIM
PC114 *2.2_1%_06
3 9 PQ19
PD10

5V
D

VFB VDD MDU1512 PC234


1u_6.3V_X5R_04 D02 PU 5V ULTRASO-8 + +

560u_2.5V_6.6*6.6*5.9

*560u_2.5V_6.6*6.6*5.9
4 8 5/5 G
PGOOD DL

22u_6.3V_X5R_08
*2200p_50V_X7R_04
S

3.3VS PR18 10K_04 PC119


CSOD140SH
A

6 7
AGND PGND 17 1u_6.3V_X5R_04
D02VDD3 PU HI PGND D02 1B
/8DCGATE
NC

NC

5/21
5/5
D03 1B(PR63)
5

14

3.3VS G5602R41U 6/30


5

1 VR_READY_SA PR152 40.2K_1%_04


4 PC113 *15p_50V_NPO_04 PR61 100_04
17,21 VR_READY 2
VR_READY_VCORE 48
11,17,2,24,25,30,39,42,43,44,46,47
3.3V
PR16
VDD5 23,43,44,45,46
3

16,17,18,20,21,25,31,32,34,36,43,45,46,47,51
VDD3
U58
A 5 VCCSA A
MC74VHC1G08DFT2G 100K_1%_04 PR62 0_04 VCCSA_SENSE 5 48,6 VCCGT
18,3,46,48,5 VCCST_VCCPLL
PR60 0_04 VSS_SA_IO_SENSE 5 15,21,23,24,27,30,40,43,44,46,47,48,49 5V
(40.2K/100K+1)*0.75=1.05V
11,15,27,29,31,43,44,45,46,47,48,49,51 VIN
10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26,27,28,31,32,33,34,35,37,39,41,42,43,46,48,7,8,9 3.3VS
PR59

100_04
   !!DMFWP!DP/
Title
[50] VCCSA/VCCGT
Size Document Number Rev
Custom SCHEMATIC1 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 50 of 62


8 7 6 5 4 3 2 1

VCCSA / VCCGT B - 51
Schematic Diagrams

Power Charger, DC-In


5 4 3 2 1

SMART CHARGER
support GTXX 330W 5/4
ADD MOSFET
8
7 3 VA
PQ4 PC189 PR237
6 2 EMB20P03V

4
D 5 1 0.1u_50V_Y5V_06 470K_04 D
1 5
2 6

4
3 7
8
8 PQ42
7 3 PQ26 VIN EMB20P03V

4
6 2 EMB20P03V
EML1 5 1 1 5
HCB2012KF-800T80 2 6 V_BAT
PC190 PC184 3 7

4
8 PR236
8 1500p_50V_04
EML2 7 3 0.1u_50V_Y5V_06 PQ36
HCB2012KF-800T80 6 2 PQ3 10mR//10mR=5mR EMB20P03V 05/15 20K_04
B.Schematic Diagrams

5 1 EMB20P03V PR64

4
0.01_1%_32
1 5 PQ35

4
EML3 VA 2 6 PRS2 *0.005_1%_32 PIN 7DEPIN GND
J_AC1 HCB2012KF-800T80 VA1 PD3 3 7 EMB20P03V
8 PR65 SK540SB PL10 8 FOR P770
1 7 3 0.01_1%_32 BCIHP-0730 4R7M PRS1 0.01_1%_32
2 6 2 C A PC182 PC183 PC180 PC197 J_BATTA17_1
3

1
PC126 PC125 PC41 PR197 5 1
4 *470K_04 PR235 PC181 PC179 + 1

C
Sheet 51 of 62
2

0.1u_50V_Y5V_06

0.1u_50V_Y5V_06
2MJ-3432-008H PQ2 PR111 2.2_04

0.1u_50V_Y5V_06
3

1500p_50V_04

1000p_50V_X7R_04
P/N = 6-20-B3H20-103 EMB20P03V 100K_04 PC55 PC198 PC210 PC209 PD14 PC87 PC188 PC201

4.7u_25V_X5R_08

4.7u_25V_X5R_08
0.1u_50V_Y5V_06

EEEFZ1E101P
2
PCB Footprint = 2MJ-0402A120A SK540SB 4
+ +
5

0_04

0_04

0_04

0_04
PC187

PR66

PR67

PR232

PR233
4.7u_25V_X5R_08

4.7u_25V_X5R_08

4.7u_25V_X5R_08

4.7u_25V_X5R_08

4.7u_25V_X5R_08
6

*15u_25V_6.3*4.4_C

*15u_25V_6.3*4.4_C
Power Charger,

2
A
7
4700p_50V_X7R_04
1/15 *BTJ-07AP0G-SD001

PR112

DC-In C

PR115
15K_1%_04

PC92
PC195 PC186
C

34
14
15
16
17
18
19

24
25
26

20
21
22
23
27
33
PC176 PC175 4700p_50V_X7R_04
4700p_50V_X7R_04

VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS

GNDP
GNDP
GNDP

LX
LX
LX
LX
LX
LX
*0_06 PD2 4700p_50V_X7R_04 4700p_50V_X7R_04 0.22u_16V_X7R_06
VA MDL914S2
PR113 4 ICHP
S D A C VAC ICHP
BST 13 1 ICHM J_BATTA15_1
PQ13 10_04 D02 BST ICHM
PR110 MTE1K0P15KN3 4/30 C A VDDP_DC_IN 29 11 PR131 330_04 SMD_BAT 1
G

VDDP SDA BAT_DET_C 2


300K_1%_04 PD4 MDL914S2 IACM 32 10 PR132 330_04 SMC_BAT PL12 HCB1005KF-121T20 3
IACM SCL PL13 HCB1005KF-121T20 4
PU13

C
IACP 31 6 IAC1 5
IACP IAC 6

EMC3

EMC2

EMC1
PD15PD5 PD16PD6
PQ16 G PR250 100K_04 AC AV 9 D02
1.0VA 7
PR109 MTN7002ZHS3 ACAV 5/5 BTJ-07AP0G-SD001

SS1040WG

SS1040WG
*MMSZ5232BS

*MMSZ5232BS
S
30 12 PR129 *51_04

A
VAC PROCHOT#

30p_50V_NPO_04

30p_50V_NPO_04

30p_50V_NPO_04
100K_1%_04

PMON
COMP

GNDA
GNDA
PSYS
5 PR130 *0_04

FBV
PQ34 PR251 PC177 IBSET H_PROCHOT_N 3,48
D

MTN7002ZHS3 PC208

100K_04

28
35

8
1000p_50V_X7R_04
G 1u_25V_X5R_06
31 LOT6_CHG

PR241

PR120
PR127 PR121
S

PC178 33_04 PR123 100K_1%_04


Hi-----Battery in Charge 470K_04 V_BAT

30K_1%_04
Low-----Battery remove no

4.7u_25V_X5R_08
SMC_BAT 31,32
charge EC GPIO PD pin
SMD_BAT 31,32

*0_04
PC200 PR122
B B
C421 PR124 10_04
TOTAL_CUR 31
4.7u_6.3V_X5R_06 24.9K_1%_04
PR240
0.1u_10V_X7R_04 PC196 24K_1%_04 PC142

47p_50V_NPO_04
31 PMOSET_CONTROL#
GND_SIGNAL 1u_25V_X5R_06

D03 1B VDD3 GND


6/29 GND_SIGNAL GND_SIGNAL Option close to EC
PR116
48 PSYS *15mil_short_06
PR248
05/15
10K_04 PR119
Need to modify for 2,3,4 cells battery
10K_1%_04 GND_SIGNAL
AC/BATL# 15 BAT DET(BATTERY INTERNAL) :

D
MTN7002ZHS3 2S / 5K / NT1912
G PQ15 PQ37 PR238
MTE1K0P15KN3 300K_1%_04
2S / 10K / NT1908
Close to VDDP pin
S
V_BAT S D
VDD3 BAT_VOLT 31 3S / 2K
PR249
3S/2800mAH / 4.02K

G
*0_04 PR242
PR128 100K_04 PC194
4S / 390
PR239
10K_04 0.1u_16V_Y5V_04
4S/2800mAH /7.15K
60.4K_1%_04

D
AC_IN# 31
PQ14 PL11 HCB1005KF-121T20 BAT_DET_C
C

PD13 G PQ17 31 BAT_DET


DTC114EUA
C A B VDD3
MTN7002ZHS3
VA

S
A A

ZD5245BS2
PC93
E

PC207 0.047u_10V_X7R_04
0.1u_50V_Y5V_06

   !!DMFWP!DP/
Title
16,17,18,20,21,25,31,32,34,36,43,45,46,47,50
11,15,27,29,31,43,44,45,46,47,48,49,50
VDD3
VIN
[51] PWR CHARGER, DC IN
46 VA Size Document Number Rev
AC_IN
18,21,43,46 1.0VA
SCHEMATIC1
Custom 6-71-P75D0-D03 2.0

Date: Monday, August 03, 2015 Sheet 51 of 62


5 4 3 2 1

B - 52 Power Charger, DC-In


Schematic Diagrams

P750DM HDD Board

5 4 3 2 1

HJ_SATA1
S1
S2 H_SATA_TXP1 HC5 0.01u_16V_X7R_04 HSATA_TXP1
S3 H_SATA_TXN1 HC6 0.01u_16V_X7R_04 HSATA_TXN1
S4
S5 HC8 0.01u_16V_X7R_04
SATA PORT1
H_SATA_RXN1 HSATA_RXN1
S6 H_SATA_RXP1 HC9 0.01u_16V_X7R_04 HSATA_RXP1
S7 HJ_SATA2
D H_3.3VS H_3.3VS 1 2 D
3 1 2 4
P1 5 3 4 6 HSATA_TXP1
P2 7 5 6 8
P3 HC10 HC11 5/12 9 7 8 10 HSATA_TXN1
P4 11 9 10 12
P5 *0.01u_16V_X7R_04 *10u_6.3V_X5R_06 13 11 12 14 HSATA_RXN1
HGND 13 14
P6 15 16
P7 H_5VS 17 15 16 18 HSATA_RXP1
H_5VS 17 18
P8 HGND HGND 19 20
P9 21 19 20 22
P10 23 21 22 24 HUIM_CLK

B.Schematic Diagrams
P11 25 23 24 26 HUIM_DATA
P12 HC15 HC14 HC13 + HC7 + HC12 27 25 26 28 HUIM_RST
P13 29 27 28 30 HUIM_PWR
P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 220u_6.3V_6.3*6.3*4.2 *EEFCX0J221YR 29 30
P15 50185-03041-001

194502-1 HGND
GND1
GND2

HGND
Sheet 52 of 62
PN: 6-20-43720-022
323AH22FRT0102C3
HGND P750DM HDD
PN: 6-20-43730-022
C 194502-1 C
Board
SIM CONN HR1 *4.7K_04

HJ_SIM1

(TOP VIEW) HR3


HR2 9 8 *10mil_short
*10mil_short 7 DETECT_SW UIM_MCMD 6 HUIM_DATA_R HUIM_DATA
HUIM_CLK HUIM_CLK_R 5 UIM_DATA UIM_I/O 4 HUIM_VPP
HUIM_RST 3 UIM_CLK UIM_VPP 2
HUIM_PWR 1 UIM_RST UIM_GND
GNG
GND
GND
GND

UIM_PWR
*22p_50V_NPO_04

*22p_50V_NPO_04

*22p_50V_NPO_04
*22p_50V_NPO_04

Co-Lay
GND1
GND2
GND3
GND4

1HR1 *0_04 4HR1 *0_04


HC3

HC4

HC1
HC2

2HR1 *0_04 5HR1 *0_04


SIMLOCK MEGA SIM W/ SW STANDARD
6-86-2B010-003 3HR1 *0_04 6HR1 *0_04
HGND HGND HGND HGND
HGND 6-86-2B010-002

Layout
HH3 HH1 HH2
B B
1. SIM] ^  _ ` [ a  (10mil) H2_3D2_3 H5_5D2_3 H5_5D2_3 HH4
2. ^  _ ` [ ]  a GND 2
3
3. SIM hold    0 a GND1  4 1
4.SIM CONN   MINI CARD CONN 5

5. SIM] @ _ ` [ < Layout


[  10 = . MTH6_0D2_8
HGND HGND
HGND HGND

A A

   !!DMFWP!DP/
Title
[52] P750DM HDD BOARD
Size Document Number Rev
A3 SCHEMATIC1 6-71-P75D0-D03 1.0

Date: Monday, August 03, 2015 Sheet 52 of 62


5 4 3 2 1

P750DM HDD Board B - 53


Schematic Diagrams

P750DM Power LED Board

5 4 3 2 1

L_3.3VS
POWER
D D
SWITCH
POWER BUTTON LED
20mil
FOR 15" FOR 17" L_SW1 LR3
TJE-532-Q-T/R
3 1 1K_04
4 2 LM_BTN#
20mil
LJ_LED15_1 LJ_LED17_1

5
6
LM_BTN# LM_BTN# 20mil LC2
B.Schematic Diagrams

1
1 1
2 LED_GND 2 LED_GND
L_LID_SW# L_LID_SW# LD1 LC1 *0.1u_16V_Y5V_04
3 L_WLAN_AIRPLANE# 3 L_WLAN_AIRPLANE#
4 LSATA_LED# 4 LSATA_LED# LED_GND 0.1u_50V_Y5V_06
5 LLED_NUM# 5 LLED_NUM# V15AVLC0402 LED_GND

A
NC2 6 LLED_CAP# NC2 6 LLED_CAP# VARISTOR

2
7 LLED_SCROLL# 7 LLED_SCROLL# LD4
8 8
6-24-30003-006
NC1 NC1
9 LED_GND 9 LED_GND
RY-SP190DBW71-5A
10 10

Sheet 53 of 62 11 11
LED_GND

C
12 12
FP225H-012S10M
L_VDD3
*FP225H-012S10M
L_VDD3 P2808A1,      , P2808A1
  D26 mounted VARISTOR.
P750DM Power L_3.3VS L_3.3VS LED_GND

LED Board C C

L_VDD3
LJ_LID15_1 L_VDD3
LJ_LID17_1
1 L_LID_SW#
2 1 L_LID_SW# LH4 LH3 LH1 LH2
3 2 H4_5D2_3 H4_5D2_3 C71D71N C71D71N
88266-03001 3
LED_GND *88266-03001
LED_GND

LED_GND LED_GND

L_3.3VS L_3.3VS L_3.3VS L_3.3VS L_3.3VS

LR6 SCROLL LR5 CAPS LOCK LR4 NUM LOCK LR2 HDD LED LR1 AIRPLANE LED
B B
1K_04 LOCK 1K_04 LED 1K_04 LED 1K_04 1K_04
LED
A

A
LD7 LD6 LD5 LD3 LD2 ./FGISSUE

RY-SP190DBW71-5A RY-SP190DBW71-5A RY-SP190DBW71-5A RY-SP190DBW71-5A RY-SP190DBW71-5A 1LR1 *0_04 4LR1 *0_04

2LR1 *0_04 5LR1 *0_04


C

C
3LR1 *0_04 6LR1 *0_04

LLED_SCROLL# LLED_CAP# LLED_NUM# LSATA_LED# L_WLAN_AIRPLANE#

A A

   !!DMFWP!DP/
Title
[53] P750DM POWER LED BOARD
Size Document Number Rev
A3 SCHEMATIC1 6-71-P75DC-D01 1.0

Date: Monday, August 03, 2015 Sheet 53 of 62


5 4 3 2 1

B - 54 P750DM Power LED Board


Schematic Diagrams

P750DM Click Board

5 4 3 2 1

TTP_VCC
TTP_VCC

3/16

TTP_VCC TJ_TP3
TJ_TP1
TJ_CLICK1 1 TTP_CLK
D021 6PIN HIJ TL3 1 TTP_CLK 2 TTP_DATA
1 TGND 2 3
5/5 TTPBUTTON_L TTP_DATA TTPBUTTON_L
.

FCM1005KF-121T03 2 3 4 TTPBUTTON_R
D TGND D
3 TTPBUTTON_R 4 TTPBUTTON_L 5
4 5 6 TGND
TTPBUTTON_R TTP_SMB_CLK
TJ_TP2 6 7 TTP_SMB_DATA
FP226H-004S10M 8
6 TTP_DATA FP225H-006S10M FP225H-008S10M
5 TTP_CLK PCB Footprint = fp225h-006xxxm
4 D02 1 8PIN HIJ
3 TTP_SMB_DATA 5/5
2 TTP_SMB_CLK
1

B.Schematic Diagrams
FP225H-006S10M TGND
PCB Footprint = fp225h-006xxxm

T3.3V
LAYOUTKLHIJMNO &PKLIJ Sheet 54 of 62
W/O FINGER
- / $ 
TL1
P750DM Click
.

FCM1005KF-121T03 D02 aZMQFIUGER PRINT BOARD


5/6

C
0326 UPDATE PCB FOOTPRINT
C Board
TC1
QPOFZ-24R2-XD-Z-LD
0.1u_10V_X7R_04
TJ_FP1
T_XIN TJ_FPB1
TGND
6 TR7 1M_04 T_XOUT T2.5V 1 2
5 3 4
4 5 6
3 3 4 TGND
TR1 26.1_1%_04 TUSB_PN10 7 8 TLED1
2 TR2 26.1_1%_04 TUSB_PP10 9 10 TLED2
1 TGND 2 1 11 12 TDISCON
FP225H-006S10M TGND TX1 13 14
PCB Footprint = fp225h-006xxxm TC5 HSX321G_12Mhz TC4 T_XIN 15 16
T_XOUT 17 18
15p_50V_NPO_04 15p_50V_NPO_04 T_RST_N 19 20
21 22 TUSB_PN10_R
It is strongly recommended that the TESD_GND has T3.3V 23 24 TUSB_PP10_R

a dedicated connection to the system chassis or *CON24A


cable shield. TGND TGND

TGND Place Botton TGND

B B

T3.3V

T2.5V T3.3V

S
G TDISCON
TU1
TQ1
1 10 AO3415

D
2 9 TLED1 TR5 10K_04
TGND
3 8 TGND TC8 TC3 TC6 TC2 TUSB_PP10 TR3 1.5K_04
TUSB_PP10 4 7 TUSB_PP10_R
TUSB_PN10 5 6 TUSB_PN10_R 0.1u_10V_X7R_04 4.7u_6.3V_X5R_06 0.1u_10V_X7R_04 4.7u_6.3V_X5R_06 TLED2 TR4 10K_04

PUSB3F96 TR6 47K_04 T_RST_N


T3.3V
TGND
FOR ESD, [\FFC CONNECTOR] TGND TGND
TC7
CLOSE TO SENSOR POWER PIN 1u_6.3V_X5R_04

TGND

A A

TH2 TH1 TH3 TH4 ./FGISSUE


H3_7B5_5D3_7 H3_7B5_5D3_7 C197D197N C197D197N

   !!DMFWP!DP/
1TR1 *0_04 4TR1 *0_04

2TR1 *0_04 5TR1 *0_04 Title

3TR1 *0_04 6TR1 *0_04 [54] P750DM CLICK BOARD


Size Document Number Rev
A3 2.0
TGND TGND SCHEMATIC1 6-71-P75D2-D02
Date: Monday, August 03, 2015 Sheet 54 of 62
5 4 3 2 1

P750DM Click Board B - 55


Schematic Diagrams

P750DM Audio Board

5 4 3 2 1

A_3.3V

A_USBVCC3.0_2
A_3.3V D03 *+R7

AR11 *4.7K_04 AR33 *0_04


AR10 4.7K_04 AR34 *0_04 AR39 AR32 AU1
AR9 4.7K_04 AR35 *0_04 *4.7K_04 *4.7K_04 3 1 AC8 AC7
OC# VOUT
5 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
A_5V VIN
AR8 *4.7K_04 AR36 2K_1%_04 AI2C_SCK_20
AI2C_SDA_20 AC21 4 2
10u_6.3V_X5R_06 EN# GND
D D
AR7 *4.7K_04 AR37 0_04 UP7549UMA5-20
AR38 AR31 PCB Footprint = M-SOT23-5A
*4.7K_04 *4.7K_04 AGND AGND

AGND ADD_ON# AR30 *10mil_short_04

6
AU2
25 AGND AC17 22u_6.3V_X5R_08

VCC

EQ1

DE1

OS1

EN_RXD

GND
AI2C_SDA_20 24 GND 7 AI2C_SCK_20 AGND AGND
USB CONNECTOR SIDE NC NC AC16 22u_6.3V_X5R_08
A_USBVCC3.0_2 AGND
AUSB3_TX6_N 0.1u_10V_X7R_04 AC23 23 8 AC29 0.1u_10V_X7R_04 ATXN6
B.Schematic Diagrams

TX1- RX1-
0.1u_10V_X7R_04 AC22 22 9 AC25 0.1u_10V_X7R_04 AJ_USB1
AUSB3_TX6_P ATXP6
TX1+ RX+
AR6 *0_04 21 10 AUSB3_TX6_P ATXP6_RJ 9 GND1
AGND GND GND AGND PCH SIDE SSTX+ SHIELD

Standard-A
1
AUSB3_RX6_N 0.1u_10V_X7R_04 AC19 20 11 AC24 0.1u_10V_X7R_04 ARXN6 AUSB3_TX6_N ATXN6_RJ 8 VBUS
RX2- TX2- AUSB_PN9 1 2 AUSB_PN9_R AUSB_PN9_RJ 2 SSTX-
AUSB3_RX6_P 0.1u_10V_X7R_04 AC18 19 12 AC20 0.1u_10V_X7R_04 ARXP6 *WCM2012F2S-161T03-short 4 D-

GND

VCC
EQ2

OS2
DE2
RX2+ TX2+ AL10 GND

CM
AUSB_PP9 4 3 AUSB_PP9_R AUSB_PP9_RJ 3

Sheet 55 of 62 A_3.3V AUSB3_RX6_P AUSB3_RX6_PJ 6 D+


7 SSRX+

18

17

16

15

14

13
ASM1464 AUSB3_RX6_N AUSB3_RX6_NJ 5 GND_D GND2
PCB Footprint = QFN24-4X4MM SSRX- SHIELD

P750DM Audio AR16 0_04 AR5 *4.7K_04


1AR1

2AR1
*0_04

*0_04
4AR1

5AR1
*0_04

*0_04 AGND
377AH09FZT S4NVCB

AGND

Board C
AR20
AR19
AR18
AR17
*0_04
*0_04
*0_04
*0_04
AR1
AR2
AR3
AR4
*4.7K_04
4.7K_04
4.7K_04
*4.7K_04
3AR1 *0_04 6AR1 *0_04
6-20-B4Z40-109 C

AGND D03 *+R7 PUSB3F96


A_3.3V PUSB3F96
AUSB3_RX6_N 6 5 AUSB3_RX6_NJ AUSB_PP9_R 10 1 AUSB_PP9_RJ
AUSB3_RX6_P 7 4 AUSB3_RX6_PJ AUSB_PN9_R 9 2 AUSB_PN9_RJ
AGND
8 3 AGND AGND
8 3 AGND
AUSB3_TX6_N 9 2 ATXN6_RJ 7 4
AC9 AC30 AC28 AUSB3_TX6_P 10 1 ATXP6_RJ 6 5
AGND
0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 AJ_AUDIO1
1 2 AD1 AD2
A_5V 1 2
3 4 AUSB_PP9
5 3 4 6 AUSB_PN9
7 5 6 8
A_5VS 7 8
A_3.3V 9 10 ATXP6
AHP_AUDG 11 9 10 12 ATXN6
AGND AJD_SENSEA 13 11 12 14 AJ_MIC1
AJD_SENSEB 15 13 14 16 ARXP6 5
AHEADPHONE-RC 17 15 16 18 ARXN6 AMIC_SENSE 4
AHEADPHONE-LC 19 17 18 20 AMIC1-R AL8 HCB1608KF-121T30 3
ADD_ON# 21 19 20 22 AMIC1-R 6
AJ_LINE1 ALINE-R 23 21 22 24 AMIC1-L AMIC1-L AL7 HCB1608KF-121T30 2
5 ALINE-L 25 23 24 26 1
ALINE_SENSE 4 27 25 26 28 ASIDE_R 2SJ-T351-018
ALINE-R AL2 FCM1005KF-121T03 3 ASPDIFO 29 27 28 30 ASIDE_L
B 6 29 30 AC4 AC3 A_AUDG B
ALINE-L AL1 FCM1005KF-121T03 2 50185-03041-001
1 A_AUDG 680p_50V_X7R_04 680p_50V_X7R_04
2SJ-T351-018 A_AUDG

AC5 AC6 A_AUDG A_AUDG A_AUDG


680p_50V_X7R_04 680p_50V_X7R_04

A_AUDG A_AUDG AJ_HP1


5
A_AUDG
AHP_SENSE 4
AHEADPHONE-RC AR29 56_04 AL6 FCM1005KF-121T03 3
AJ_SPDIF1 6
1 AHEADPHONE-LC AR28 56_04 AL5 FCM1005KF-121T03 2
ASIDE_L AL4 HCB1608KF-121T30 2 1
ASIDE_R AL9 HCB1608KF-121T30 3 2SJ-T351-018
ASIDE_SENSE 4 AC2 AC1
AC13 AC10 5 AR25 AR27 AR26 AR24 AR12 *0_04
A_5VS 100p_50V_NPO_04 100p_50V_NPO_04 *1K_04 *1K_04
A_AUDG 680p_50V_X7R_04 A AR23 0_04 AHP_AUDG
680p_50V_X7R_04 B DRIVE 22K_04 22K_04
ASPDIFO AL3 HCB1608KF-121T30 C IC A_AUDG
TX A_AUDG A_AUDG
AC11 1.56 A_AUDG A_AUDG A_AUDG A_AUDG

0.1u_16V_Y5V_04
AR22 AC12 D02 PIN6~9
A
*220_04 180p_50V_NPO_04 6/9 05/15 A
AH5 AH6 AC15 0.1u_16V_Y5V_04
H6_5B5_5D2_3 H6_5B5_5D2_3 AH3 AH4 AH1 AH2
AGND AGND A_AUDG AGND H2_3D2_3 H2_3D2_3 2 2 AC14 0.1u_16V_Y5V_04
3 3

AR15 10K_1%_04 ALINE_SENSE


4
5
1 4
5
1 AC26

AC27
0.1u_16V_Y5V_04

0.1u_16V_Y5V_04
   !!DMFWP!DP/
AJD_SENSEA AR14 20K_1%_04 AMIC_SENSE MTH8_0D2_8 MTH8_0D2_8 Title
AR13 39.2K_1%_04 AHP_SENSE [55] P750DM AUDIO BOARD
AJD_SENSEB AR21 5.1K_1%_04 ASIDE_SENSE AGND AGND AGND A_AUDG
AGND AGND Size Document Number Rev
A3 SCHEMATIC1 6-71-P77D8-D03 2.0

Date: Monday, August 03, 2015 Sheet 55 of 62


5 4 3 2 1

B - 56 P750DM Audio Board


Schematic Diagrams

P750DM Charge LED Board


5 4 3 2 1

D D

C_D1
C_LED_ACIN C_R1 220_04 1 2
Y
CJ_LED1 SG

B.Schematic Diagrams
C_LED_ACIN C_LED_PWR C_R2 220_04 3 4
1 C_LED_PWR
2 RY-SP195UHYUYG4
3 C_GND
AC IN/POWER ON LED 6-52-55002-04E
4 C_LED_BAT_FULL
5 C_LED_BAT_CHG
6 C_GND
FP225H-006S10M
PCB Footprint = fp225h-006xxxm
Sheet 56 of 62
C_D2

C
C_LED_BAT_CHG C_R3 220_04 1
Y
2

C
P750DM Charge
C_LED_BAT_FULL C_R4 220_04 3
SG
4

RY-SP195UHYUYG4
LED Board
BAT CHARGE/FULL LED
6-52-55002-04E

C_GND

C_H3 C_H2 C_H1 ./FGISSUE


H5_5D2_3 C79D79N C79D79N
1CR1 *0_04 4CR1 *0_04
B B
2CR1 *0_04 5CR1 *0_04

3CR1 *0_04 6CR1 *0_04

C_GND

A A

   !!DMFWP!DP/
Title
[56] P750DM CHARGE LED BOARD
Size Document Number Rev
A3 6-71-P75DE-D01 1.0

Date: Monday, August 03, 2015 Sheet 56 of 62


5 4 3 2 1

P750DM Charge LED Board B - 57


Schematic Diagrams

P750DM LID Switch Board

5 4 3 2 1

D D
B.Schematic Diagrams

LID SWITCH IC
Sheet 57 of 62
P750DM LID Switch LL_VDD3

Board C LLJ_LID1

1
LL_VDD3 LL_C4

1
LL_U1
100K_04

2
C

LL_LID_SW# LL_LID_SW#
2 VCC OUT

GND
3
88266-03001 LL_C2 LL_C1 LL_C3
LL_GND

3
*1u_10V_Y5V_06 0.1u_16V_Y5V_04 MH-248 *100p_50V_NPO_04
MH248-ALFA-ESO

LL_GND LL_GND
LL_GND LL_GND
FK
( 06 SIZE )
LID
3

1 2

LL_H1 LL_H3 LL_H2


C79D79N C79D79N H5_0D2_3

B B

LL_GND

A A

   !!DMFWP!DP/
Title
[57] P750DM LID SWITCH BOARD
Size Document Number Rev
A3 6-71-P75DS-D01 1.0

Date: Monday, August 03, 2015 Sheet 57 of 62

5 4 3 2 1

B - 58 P750DM LID Switch Board


Schematic Diagrams

P750DM Finger Sensor Board

5 4 3 2 1

Finger Sensor Board


D D

D02 aZMQFIUGER SENSOR BOARD


4/30

NOTE: MODE

B.Schematic Diagrams
MODE=HIGH (NC) , USB MODE
FU1 MODE=LOW , SPI MODE

1 30
EGND MODE
F3.3V 2 29 FUSB_PP
AVDD DP
F2.5V

F3.3V
3

4
DVDD

VDDIO
DN

UVDD
28

27
FUSB_PN

F3.3V F2.5V 1
FJ_FPB1

2
Sheet 58 of 62
3 4
FLED1

FMOSI
5

6
LED1

SPI_MOSI
SPI_CS

SPI_MISO
26

25
FMCS

FMISO
FMOSI
FMCLK
FMCS
5
7
9
6
8
10
FLED1
FLED2
P750DM Finger
FMISO 11 12 FDISCON

C
FMCLK

FDISCON
7

8
SPI_CLK

DISCON
LED2

DVSS_1
24

23
FLED2
F_XIN
F_XOUT
13
15
17
14
16
18 C
Sensor Board
F_RST_N 19 20
9 22 21 22 FUSB_PN
UVSS AVSS_1 F3.3V F3.3V 23 24 FUSB_PP
F_XOUT 10 21 F_XIN
XO XI SPNZ-24S1-B-017-1-R
F2.5V 11 20
DVDD_1 AVSS FGND FGND
F3.3V 12 19 F3.3V
RVDD AVDD_1
F_RST_N 13 18
RESETN CLK_SEL NOTE: CLK_SEL
14 17 CLK_SEL=HIGH (NC) , FREQ=12MHz Crystal
DVSS EGND_2 CLK_SEL=LOW , FREQ=48MHz OSC
15 16
SGND EGND_1

ES603-WB
FGND FGND

B **GU1 A $  a   ,    R \ B

FJ1
1 23 23 1

2 24 24 2
BOTTON VIEW TOP VIEW

A A

Title
   !!DMFWP!DP/
[58] P750DM FINGER SENSOR BOARD
Size Document Number Rev
A3
6-71-P75DF-D02 2.0

Date: Monday, August 03, 2015 Sheet 58 of 62


5 4 3 2 1

P750DM Finger Sensor Board B - 59


Schematic Diagrams

P770DM Charge LED Board


5 4 3 2 1

D D

CC_D1
CC_LED_ACIN CC_R1 220_04 1 2
Y
CCJ_LED1 SG
B.Schematic Diagrams

CC_LED_ACIN CC_LED_PWR CC_R2 220_04 3 4


1 CC_LED_PWR
2 RY-SP195UHYUYG4
3 CC_GND
AC IN/POWER ON LED 6-52-55002-04E
4 CC_LED_BAT_FULL
5 CC_LED_BAT_CHG
6 CC_GND
FP225H-006S10M
PCB Footprint = fp225h-006xxxm

Sheet 59 of 62 CC_D2
CC_LED_BAT_CHG CC_R3 220_04 1 2

P770DM Charge C
Y
SG
C

CC_LED_BAT_FULL CC_R4 220_04 3 4

LED Board BAT CHARGE/FULL LED


RY-SP195UHYUYG4

6-52-55002-04E

CC_GND

CC_H2 CC_H3 CC_H1 ./FGISSUE


H5_5D2_3 H5_0D2_5 H5_0D2_5
1CCR1 *0_04 4CCR1 *0_04
B B
2CCR1 *0_04 5CCR1 *0_04

3CCR1 *0_04 6CCR1 *0_04

CC_GND CC_GND CC_GND


PCB Footprint = H5_0D2_5 PCB Footprint = H5_0D2_5

A A

   !!DMFWP!DP/
Title
[59] P770DM CHARGE LED BOARD
Size Document Number Rev
A3 6-71-P77DE-D01 1.0

Date: Monday, August 03, 2015 Sheet 59 of 62


5 4 3 2 1

B - 60 P770DM Charge LED Board


Schematic Diagrams

P750DM BOT LED Board

5 4 3 2 1

TP LED BOARD

D D

GG_5VS

B.Schematic Diagrams
G 1 GGR4 100_1%_06 GG_G1

2 R 3 GGR3 150_1%_06 GG_R1

B 4

Sheet 60 of 62
GGR1 100_1%_06 GG_B1

GGD2 FSL-3010040HPGRB-N8SNT1W2TJY

G 1 GGR6 100_1%_06

C
2 R 3 GGR5 150_1%_06
C
P750DM BOT LED
B 4 GGR2 100_1%_06

GGD1 FSL-3010040HPGRB-N8SNT1W2TJY Board


./FGISSUE

1GGR1 *0_04 4GGR1 *0_04

2GGR1 *0_04 5GGR1 *0_04

3GGR1 *0_04 6GGR1 *0_04

GG_5VS
GGJ_TPLED1
9
8
GG_B1 7
GG_R1 6
B
GG_G1 5 B
4
3
2 GGH3 GGH2 GGH4 GGH1
1 H5_5D2_2 H5_5D2_2 C79D79N C79D79N

GG_GND FP225H-009S10M
PCB Footprint = fp225h-009xxxm

GG_GND GG_GND

A A

   !!DMFWP!DP/
Title
[60] P750DM BOT LED BOARD
Size Document Number Rev
A3 SCHEMATIC1 6-71-P75D5-D02 2.0

Date: Monday, August 03, 2015 Sheet 60 of 62

5 4 3 2 1

P750DM BOT LED Board B - 61


Schematic Diagrams

P775DM Power LED Board


5 4 3 2 1

S_3.3VS
POWER
D D
SWITCH
POWER BUTTON LED
20mil
FOR P775DM S_SW1 SR3
TJE-532-Q-T/R
3 1 1K_04
4 2 SM_BTN#
20mil
SJ_LED775_1

5
6
SM_BTN# 20mil SC2

1
1
2 SLED_GND
S_LID_SW# SD1 SC1 *0.1u_16V_Y5V_04
3 S_WLAN_AIRPLANE#
4 SSATA_LED# SLED_GND 0.1u_50V_Y5V_06
B.Schematic Diagrams

5 SLED_NUM# *V15AVLC0402 SLED_GND

A
NC2 6 SLED_CAP# VARISTOR

2
7 SLED_SCROLL# SD4
8
6-24-30003-006
NC1
9 SLED_GND
RY-SP190DBW71-5A
10 SLED_GND
11

C
12
FP225H-012S10M
S_VDD3 P2808A1,      , P2808A1
Sheet 61 of 62 S_3.3VS
  D26 mounted VARISTOR.
SLED_GND

P775DM Power C C

LED Board
S_VDD3
SJ_LID775_1
1 S_LID_SW# SH4 SH3 SH2 SH1
2 H5_0D2_3 H5_0D2_3 H3_5D1_8 H3_5D1_8
3
88266-03001
SLED_GND

SLED_GND SLED_GND SLED_GND SLED_GND 6/26

S_3.3VS
S_3.3VS S_3.3VS S_3.3VS S_3.3VS

SR6 SCROLL SR5 CAPS LOCK SR4 NUM LOCK SR2 HDD LED SR1 AIRPLANE LED
B B
1K_04 LOCK 1K_04 LED 1K_04 LED 1K_04 1K_04
LED
A

A
SD7 SD6 SD5 SD3 SD2 ./FGISSUE

RY-SP190DBW71-5A RY-SP190DBW71-5A RY-SP190DBW71-5A RY-SP190DBW71-5A RY-SP190DBW71-5A 1SR1 *0_04 4SR1 *0_04

2SR1 *0_04 5SR1 *0_04


C

C
3SR1 *0_04 6SR1 *0_04

SLED_SCROLL# SLED_CAP# SLED_NUM# SSATA_LED# S_WLAN_AIRPLANE#

A A

   !!DMFWP!DP/
Title
[61] P775DM POWER LED BOARD
Size Document Number Rev
A3 SCHEMATIC1 6-71-P7754-D03 3.0

Date: Monday, August 03, 2015 Sheet 61 of 62


5 4 3 2 1

B - 62 P775DM Power LED Board


Schematic Diagrams

Power On Sequence
5 4 3 2 1

DESIGN GUIDE# 
Power on
VDDQ <25ms
RTCRST#

VCCST
PWR_SW#

DD_ON 218ms VCCST_PWRGD >1ms


D D

3.3V 0.83ms

PCH_PWROK >0
1.95ms
VDD5

5V 2ms DDR_VTT_CNTL <100ns

SLP_SUS# 30.65ms <35us


DDR_VTT

3.3VA 0.35ms

B.Schematic Diagrams
1.0VA 5.33ms VCCIO >100ns
51ms
RSMRST# (=DPWROK)
VCCSA >100ns
81ms
123ms
PWR_BTN#

SUSC#
Sheet 62 of 62
VCCPLL

C
2.5V
1.5ms

C
Power On
Sequence
1.5ms PROCPWRGD
VCCST_VCCPLL >1ms

1.7ms
VDDQ

35us
SUSB#

5VS 0.55ms

3.3VS 1.48ms

1.82ms
5VS_2

VCCIO_EN
2.3ms
VCCIO

VCCIO_PWRGD 1.8ms

B VCCSA 1.43ms B

VR_READY 2.57ms

ALL_SYS_PWRGD 2.57ms

PM_PCH_PWROK (=VCCST_PWRGD) 2.57ms

DDR_VTT_CNTL 2.57ms

8us
VTT_MEM
130ms
PCH_CLKOUT
105ms
H_PWRGD

EC DELAY_PWRGD (=PM_PWROK) 220ms

SYS_PWROK

A A
S4_STAT# 8.5ms

70us
PLTRST#

VCORE 2.6ms

Title
<Title>

S ize Docum ent Num ber Rev


Custom <Doc> <RevCode>

Date: M onday, A ugust 03, 2015 S heet 62 of 62


5 4 3 2 1

Power On Sequence B - 63
Schematic Diagrams
B.Schematic Diagrams

B - 64
BIOS Update

Appendix C:Updating the FLASH ROM BIOS 


BIOS Version
To update the FLASH ROM BIOS, you must: Make sure you down-
• Download the BIOS update from the web site. load the latest correct
• Unzip the files onto a bootable CD/DVD/USB Flash Drive. version of the BIOS ap-
propriate for the com-
• Reboot your computer from an external CD/DVD/USB Flash Drive. puter model you are
• Use the flash tools to update the flash BIOS using the commands indicated below. working on.
• Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
You should only
• Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
download BIOS ver-
• After rebooting the computer you may restart the computer again and make any required changes to the default BIOS sions that are
settings.

C:BIOS Update
V1.01.XX or higher as
appropriate for your
Download the BIOS computer model.
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. Note that BIOS versions
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files are not backward com-
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model patible and therefore
(see sidebar for important information on BIOS versions). you may not down-
grade your BIOS to an
older version after up-
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive grading to a later ver-
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the sion (e.g if you upgrade
a BIOS to ver 1.01.05,
downloaded files.
you MAY NOT then go
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB back and flash the BIOS
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). to ver 1.01.04).

Set the computer to boot from the external drive


1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.

C - 1
BIOS Update

Use the flash tools to update the BIOS


1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs
being loaded by DOS. Choose “N” for any memory management programs.
2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB
flash drive).
3. Type the following command at the DOS prompt:
C:\> Flash.bat
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
C:BIOS Update

restarts.

Restart the computer (booting from the HDD)


1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F3) and select “Yes” to confirm the selection.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.

Your computer is now running normally with the updated BIOS


You may now enter the BIOS and make any changes you require to the default settings.

C-2

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