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Adaptive Flash Cache: Appendix B HK902 E.00
Adaptive Flash Cache: Appendix B HK902 E.00
Appendix B
HK902 E.00
© Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
Module objectives
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When a read request comes to the array from a host the read can be either sequential or random
• With a sequential read stream, an HP 3PAR OS algorithm will detect the sequential read pattern, doing a pre-
fetch putting data in cache resulting in a cache-read hit
• With a random read stream with no determined predictive pattern, the read usually results in a cache-read
miss and the requested data must be read into cache from the back end disks which is non-optimal from a
performance point of view
Adaptive Flash Cache adds a second level of cache (between DRAM and back-end disks) using
SSD capacity to increase the probability that a random read can be serviced at a much more
effective rate improving read performance.
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Adaptive Flash Cache explained
Without Adaptive Flash Cache With Adaptive Flash Cache
HDD HDD
HDD
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• Only small block random read data (64K or less IO size) from a node’s DRAM cache
is a candidate for moving to AFC
• Data that is pre-fetched using the array sequential read-ahead algorithm into
DRAM cache and data in DRAM cache with IO size >= 64K are not candidates to be
moved to AFC
• Data is only placed into AFC after having been resident in DRAM first—data is
never put in AFC directly from FC and NL back end disks
• Data read into DRAM from SSD media will never be placed in AFC
• AFC is not intended to be an extension for write data
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Cache Memory Page (CMP) vs. Flash Memory Page (FMP)
DRAM Cache
16K 16K 16K 16K 16K • DRAM cache on a node is broken down into 16K cache memory pages (CMP)
• A CMP can be utilized by host writes, mirroring of writes from other controllers,
16K 16K 16K 16K 16K or for sequential or random read data requested from hosts
• When DRAM cache utilization reaches 90% (10% of CMPs are free/clean), 16K
16K 16K 16K 16K 16K CMPs used for random read IO are candidates to be moved out to SSD AFC
16K 16K 16K 16K 16K AFC broken down into 16K
flash memory pages (FMP)
16K 16K 16K 16K 16K from 1 GB chunklets on
SSD disks
16K 16K 16K 16K 16K
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128MB region
AFC Leverages SSD capacity in an array as a level-2
moves
read cache extension
− Small block random read data that is to be removed from DRAM cache
is copied to AFC
− Provides a second-level caching layer between DRAM and spinning Cache Control
disks (HDD) Write Read
Cache Cache
• If data in flash cache is accessed it is copied into DRAM cache and
remains there until it is once again removed
• AFC is fully compatible with Adaptive Optimization (AO)
9 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
AFC data flow in the controllers: how it works
Server
DRAM Read
Cache
16k Page
Flash Cache 16k FMP 16k FMP
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DRAM Read
Cache
16k Page
Flash Cache 16k FMP 16k FMP
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AFC data flow in the controllers: how it works
Server
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13 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
AFC data flow in the controllers: how it works
Server
16k CMP
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DRAM Read
Cache 16k CMP
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AFC data flow in the controllers: how it works
Server
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17 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
AFC data flow in the controllers: how it works
Server
DRAM Read
Cache
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19 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
AFC data flow in the controllers: how it works
Server
DRAM Read
Cache 16k CMP
LBA 0x9abc6h is read
from flash cache into
DRAM cache (AFC hit)
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DRAM Read
Cache 16k CMP
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AFC data flow in the controllers: how it works
Server
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23 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
LRU (Least Recently Used) Queues
• When a 16K CMP of random read data moves to AFC it is copied to a 16K FMP and into one of five
least recently used queues to track how hot the data is
• A 16K CMP that needs to be moved from DRAM to AFC (16K FMP) is placed in the NORM LRU queue
• FMPs in AFC that are accessed by a host can be promoted to hotter/higher priority LRU queues
• FMPs in AFC can be placed in a lower priority LRU queue as a result of queue demotion
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DRAM Read
Cache
Flash Cache 16k FMP 16k FMP 16k FMP 16k FMP
16k Page
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AFC data flow in the controllers: LRU Queue Demotion
Server
DRAM Read
Cache
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AFC data flow in the controllers: LRU Queue Demotion
Server
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16k CMP
DRAM Read
Cache 16k CMP
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AFC data flow in the controllers: LRU Queue Demotion
Server
DRAM Read
Cache 16k CMP
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31 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
AFC data flow in the controllers: LRU Queue Demotion
Server
DRAM Read
Cache 16k CMP
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AFC data flow in the controllers: LRU Queue Demotion
Server
DRAM Read
The AFC “Dormant” LRU queue Cache
has now run out of FMPs
Flash Cache 16k FMP 16k FMP 16k FMP 16k FMP
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Flash Cache 16k FMP 16k FMP 16k FMP 16k FMP
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AFC data flow in the controllers: LRU Queue Demotion
Server
DRAM Read
Cache
Flash Cache 16k FMP 16k FMP 16k FMP 16k FMP
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Node Dormant Cold Norm Warm Hot Destage Read Flush WrtBack
0 24056921 0 1107007 1484 412 0 0 0 0
Node Dormant Cold Norm Warm Hot Destage Read Flush WrtBack
0 0 0 25132171 7000 26653 0 0 0 0
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LRU movement examples (2 of 2)
Excerpts from statcache output showing LRU queues
----------------- FMP Queue Statistics ------------------
Node Dormant Cold Norm Warm Hot Destage Read Flush WrtBack
0 0 25132171 7000 26653 0 0 0 0 0
Node Dormant Cold Norm Warm Hot Destage Read Flush WrtBack
0 25132171 7000 26653 0 0 0 0 0 0
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AFC specifics
• No license required
• Must be running HP 3PAR OS 3.2.1 or higher
• Not supported on the HP 3PAR 7450 /7450c models
• Minimum amount of AFC configurable per controller node pair is 64 GB for all models
• Maximum amount of AFC configurable per controller node pair depends on the hardware model:
7200/7200c: 768 GB
7400/7400c: 768 GB (1500 GB max for 4-node models)
7440c: 1500 GB (3000 GB max for 4-node models)
V400 and V800: 2064 GB
• Minimum 4 SSDs per controller node pair for 7000 Series and 8 SSDs per controller node pair for
V400 and V800 required for AFC configuration
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Configuring and monitoring AFC
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showflashcache Display how much AFC has been allocated per controller node
srstatcache Displays historical performance data reports for flash cache and data cache
41 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
AFC CLI: createflashcache and showflashcache
• Create 128 GB of Flash Cache for each node pair in the array (must be added multiples of 16 GB):
cli% createflashcache 128g
• Display the status of Flash Cache for all nodes on the system (example output shown):
cli% showflashcache
-(MB)-
Node Mode State Size Used%
0 SSD normal 65536 0
1 SSD normal 65536 0
-------------------------------
2 total 131072
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• The “sys:all” target is used to enter System Level Flash Cache Mode and enables/disables
flash cache for all VVs and VVsets on a system globally
cli% setflashcache enable sys:all
cli% setflashcache disable sys:all
• The system level mode is global and overrides any settings applied to VVset targets while not in
system level mode
• To exit system level flash cache mode and get back into VVset mode you must use the “clear”
subcommand
cli% setflashcache clear sys:all
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AFC CLI: setflashcache System Level Mode (2 of 2)
• When flash cache system level mode is entered any flash cache setting for vvset:<Vvset>
targets is overridden
• While in system mode the showflashcache command with either the –vv or –vvset option will not
display information for either individual VVs or Vvsets: these options only display individual VV and
VVset data when not in system level mode
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45 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
AFC CLI command examples (1 of 2)
• Display the status of VVsets with Flash Cache enabled on the system (example output shown)
cli% showflashcache -vvset
Id VVSetName AFCPolicy
1 ESX5ii enabled
----------------------
1 total
• Display the status of VVs with Flash Cache enabled (example output shown)
cli% showflashcache -vv
VVid VVName AFCPolicy
50 ESX5ii.0 enabled
51 ESX5ii.1 enabled
52 ESX5ii.2 enabled
-------------------------
3 total
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• Display the status of Flash Cache for all nodes on the system (example output shown):
cli% showflashcache
statcache
When run with no
options reports CMP
and FMP statistics on
a per node basis
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49 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
Monitoring Cache: statcache (3 of 5)
Read Back and Destaged Write
• Read Back: Data reads from flash cache back into DRAM cache and represent flash cache read
hits
• Detsaged Write: Writes of CMPs from DRAM into flash cache and occur when a CMP is being
removed from DRAM read cache and written into flash cache -- these writes are mirrored in
flash cache (RAID1) even though AFC only holds read data
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51 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
Monitoring Cache: statcache (5 of 5)
CMP Queue Statistics
statcache –v
reports CMP and FMP
statistics by virtual volume
53 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
Monitoring Cache: statcache -v -metadata
statcache –v -metadata
reports CMP, FMP statistics and
metadata statistics by virtual
volume
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55 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
Monitoring Cache: srstatcache (2 of 2)
Display the internal flashcache activity including FMP queue statistics beginning 10 minutes ago
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© Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
Estimating Adaptive Flash Cache Warmup (1 of 3)
• Just like a normal DRAM based cache, flash cache requires time to warmup
before an application or benchmark may see a noticeable improvement in I/O
latency
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59 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
Estimating Adaptive Flash Cache Warmup (3 of 3)
Estimating Cache Hit Rate
• To do this, take the size of the arrays cache and divide by the Working Set Size
• Working Set Size: a measurement of the total amount of unique blocks being
accessed over a unit of time
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Time to Fill:
Maximum cache hit rate can be obtained in: Array Cache Size
288GB / (320 MB/sec) = 900 seconds Time to fill
15 minutes
Flash Cache Fill Rate
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AFC Impact Example (1 of 2)
Pre-configuration of AFC
Workload stats:
IOs/Sec: ~1000 Service time (ms) ~6 ms
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63 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
AFC tidbits
• Once the amount of AFC is specified using the createflashcache command the amount can not
be changed: the removeflashcache command must be used to remove the designated AFC then
recreated using createflashcache
• When adding new SSDs the tunesys operation can not be used to rebalance FMPs across all
SSDs used for AFC: to use all SSDs (including newly added) the removeflashcache command
must be used to remove the designated AFC then recreated using createflashcache
• AFC and Adaptive Optimization can co-exist on the same array but serve different purposes:
both improve performance and reduce cost
• The createflashcache –sim <size> can be used to track flash cache statistics even if the array
does not have SSDs to determine if AFC would be beneficial
• If the array contains both eMLC and cMLC SSDs flash cache will be created on the eMLC drives
• Flash Cache is not supported on the 480GB cMLC SSDs
• Administration and configuration of AFC can be done using SSMC 2.1 or higher
64 © Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.
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© Copyright 2015 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice.