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By: RAHIL SHARMA

Roll no. : 340/10

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TALK FLOW
 What is VLSI
 What is BiCMOS
 FEATURES
 CHARACTERSTICS OF CMOS, BIPOLAR and
BICMOS TECHNOLOGY
 BiCMOS fabrication process
 CMOS inverter
 BiCMOS inverter
 Comparison between CMOS and BiCMOS
 Pros and Cons
 Applications
 Conclusion

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What is VLSI ?
 VLSI stands for very large scale integration and is the
process of creating integrating circuits by combining
thousands of transistors into a single chip.
 Invention of VLSI is based on the achievements in the field
of semiconductor technology.
 Transistors were invented at Bell labs in 1947.
 Jack kilby at texas instruments in 1958 was first to make a
integrated circit ready.
 It elimnates the use of discrete components, wires and
manual assembly of components.
 Eg. Microprocessor,controllers etc.

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WHAT IS BiCMOS
 Bipolar compatible CMOS(BiCMOS) technology:
 Introduced in early 1980s
 Combines Bipolar and CMOS logic

BiCMOS

CMOS BIPOLAR
Low power dissipation High speed
High packing density High output drive

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Features:
 The objective of the BiCMOS is to combine bipolar and CMOS so as to
exploit the advantages of both the technlogies.
 Today BiCMOS has become one of the dominant technologies used for
high speed, low power and highly functional VLSI circuits.
 The process step required for both CMOS and bipolar are almost similar
 The primary approach to realize high performance BiCMOS devices is
the addition of bipolar process steps to a baseline CMOS process.
 The BiCMOS gates could be used as an effective way of speeding up the
VLSI circuits.
 The applications of BiCMOS are vast.
 Advantages of bipolar and CMOS circuits can be retained in BiCMOS
chips.
 BiCMOS technology enables high performance integrated circuits IC’s
but increases process complexity.
.

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Characterstics of Bipolar
Technology
 Higher switching speed
 Higher current drive per unit area, higher gain
 Generally better noise performance and better high frequency characteristics
 Improved I/O speed (particularly significant with the growing importance of
package limitations in high speed systems).
 high power dissipation
 lower input impedance (high drive current)
 low packing density
 low delay sensitivity to load
 It is essentially unidirectional.

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Charactestics of CMOS
 Lower static power dissipation
 Higher noise margins
 Higher packing density
 High yield with large integrated complex functions
 High input impedance (low drive current)
 Scaleable threshold voltage
 High delay load sensitivity
 Low output drive current (issue when driving large capacitive loads)
 Bi-directional capability (drain & source are interchangeable)
 A near ideal switching device
 Low gain

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Characterstics of Bicmos
Technology
 It follows that BiCMOS technology goes some way towards combining the
virtues of both CMOS and Bipolar technologies
 Improved speed over purely-CMOS technology
 Lower power dissipation than purely-bipolar technology(Lower power
consumption than bipolar)
 Flexible I/Os for high performance
 Improved current drive over CMOS
 Improved packing density over bipolar
 High input impedance
 Low output impedance
 High Gain and low noise

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Cmos fabrication

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BiCMOS FABRICATION PROCESS
CMOS process BIPOLAR process

1 . N well 1. n collector

2. P base doping(extra
step)
3. PMOS source and 3. p+ base contact
drain
4. NMOS source and 4. n+ emitter
drain
Adapted from A.R.Alvarage et al.,”An overview of BiCMOS Technology and
Applications”,IEEE International Symposium on Circuits and Systems,1-3
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May,1990
BiCMOS CROSS-SECTION

Adapted from J. M Rabaey, Digital Integrated Circuits: A Design


Prespective, NewJersey: Prentice-Hall, Inc., 1996.
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BiCMOS process flow steps:

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CMOS INVERTER
CIRCUIT DIAGRAM
VDD

IP
OP

GND

Adapted from www2.eng.cam.ac.uk/~dmh/3b2/invert.htm


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BASIC BiCMOS INVERTER

Adapted from J. M Rabaey, Digital Integrated Circuits: A Design


Prespective,New Jersey: Prentice-Hall, Inc., 1996. 20
CONVENTIONAL BiCMOS INVERTER

Adapted from J. M Rabaey, Digital Integrated Circuits: A Design


Prespective,New Jersey: Prentice-Hall, Inc., 1996.
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PULL UP EVENT

C load

Adapted from Sung-Mo Kang,Yusuf Leblebici,”CMOS Digital Integrated


Circuits:Analysis and Design”,Tata McGraw-Hill,Third edition,2003,p.547.
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PULL DOWN EVENT

C load

Adapted from Sung-Mo Kang,Yusuf Leblebici,”CMOS Digital Integrated


Circuits:Analysis and Design”,Tata McGraw-Hill,Third edition,2003,p.550.
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BiCMOS VS. CMOS
VTC comparison

CMOS

BiCMOS

Adapted from www2.eng.cam.ac.uk/~dmh/3b2/invert.htm 24


SPEED COMPARISON

Adapted from Larry Wissel and Elliot L. Gould,”Optimal Usage of CMOS


within a BiCMOS Technology”,IEEE J. of solid-state circuits, Vol. 27, No.
3, March1992 25
DELAY COMPARISON
scaling of the technological parameters leads to the scaling of the
device parameters

Adapted from Larry Wissel and Elliot L. Gould,”Optimal Usage of CMOS


within a BiCMOS Technology”,IEEE J. of solid-state circuits, Vol. 27, No. 3,
March 1992 26
AREA COMPARISON
A AREA

C COMPLEXITY

Adapted from H.Klose et al.,”Bicmos,a tehnology for High speed/High


density ICs”,IEEE international conference on Computer Design:VLSI in
computers and proessors,2-4 Oct.,1989 27
PROS OF BiCMOS
 Improved speed over CMOS
 Improved current drive over CMOS
 Improved packing density over bipolar
 Lower power consumption than bipolar
 High input impedance
 Latchup immunity

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CONS OF BiCMOS
 Increased manufacturing process complexity
 Speed degradation due to scaling
 The efficiency of BiCMOS device increased by 2 and cost increased by 1.3 to 1.5
as compared to CMOS.

Adapted from Paul G. Y. Tsui et al.,”Study of BiCMOS Logic Gate


Configurations for Improved Low-Voltage Performance”, IEEE J. of solid-
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state circuits, Vol. 28, No 3. March 1993.
APPLICATIONS
 Full custom ICs
 SRAM,DRAM
 Microproessor,controller
 Semi custom ICs
 Register,Flipflop
 Standard cells
 Adders,mixers,ADC,DAC
 Gate arrays

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BiCMOS PRODUCTS

GSM 900 POWER AMPLIFIER

SiGe BiCMOS GPS CIRCUIT

 W-CDMA DCR 31
CONCLUSION
 The extra process complexity requires chip
manufacturers to command a premium for BiCMOS
products. In the analog market the ability to integrate
large mixed systems provides the compelling cost
advantage of BiCMOS; this market is still emerging.
 BiCMOS is a complement to pure CMOS and Bipolar
technologies in important system application areas.
 One of the main challenges facing BiCMOS design is
to maintain its performance gain at lower voltage
levels.

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REFERENCES
[1]Kiat-Seng Yeo et al.,”CMOS/BiCMOS ULSI:Low voltage,Low power”,Pearson
Education,Inc., First edition,2002.
[2]Sung-Mo Kang,Yusuf Leblebici,”CMOS Digital Integrated Circuits:Analysis and
Design”,Tata McGraw-Hill,Third edition,2003.
[3]E.A.Gonzalez,”BiCMOS processes,trends and applications”,DLSU ECE,Technical
report,Nov.29,2004.
[4]A.R.Alvarez et al.,”An overview of BiCMOS technology and applications”,IEEE
International Symposium on Circuits and Systems,1-3 May,1990.
[5] T. Sakurai, “A review on low-voltage BiCMOS circuits and a BiCMOS vs. CMOS speed
comparison,” Proceedings of the 35th Midwest Symposium on Circuits and Systems, vol.
1, Aug. 9-12 1992.
[6] J. M Rabaey, Digital Integrated Circuits: A Design Prespective, NewJersey: Prentice-
Hall, Inc., 1996.
[7] J. P. Uremuya, Circuit Design for CMOS VLSI, Massachusetts: Kluwer Academic
Publishers, 1992.
[8] Adapted from H.Klose et al.,”Bicmos,a tehnology for High speed/High density ICs”,IEEE
international conference on Computer Design:VLSI in computers and proessors,2-4
Oct.,1989
[9] Larry Wissel and Elliot L. Gould,”Optimal Usage of CMOS within a BiCMOS
Technology”,IEEE J. of solid-state circuits, Vol. 27, No. 3, March 1992
[10] Paul G. Y. Tsui et al.,”Study of BiCMOS Logic Gate Configurations for Improved Low-
Voltage Performance”, IEEE J. of solid-state circuits, Vol. 28, No 3. March 1993.
[11] D.L.Harame,”Current Status and Future Trends of SiGe BiCMOS Technology” IEEE
transactions on electron devices, vol. 48, no. 11, november 2001
[12]Adapted from D.Harame et al.,”The Emerging Role of SiGe BiCMOS Technology
in Wired and Wireless Communications”, Fourth IEEE International Caracas Conference
on Devices, Circuits and Systems, Aruba, April 17-19, 2002.

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