You are on page 1of 14

UNIVERSITY OF THE EAST - MANILA

COLLEGE OF ENGINEERING
DEPARTMENT OF ELECTRONICS AND COMMUNICATIONS ENGINEERING

EXPERIMENT NO.2
THE BASIC LOGIC GATES

NEC 2209 – ECE 1

CORREOS, JOSHUA A.
MAGARRO, BRYANT DAVID C.
MANIPOL, MARKLYNN JAY REYES

FEBRUARY 13, 2021

ENGR. RONNIE M. YU
PROFESSOR
I. TITLE

THE BASIC LOGIC GATES

II. OBJECTIVE

III. INTRODUCTION

IV. MATERIALS
 7404 Hex Inverter Gate – 1pc.
 7408 AND Gate – 1pc.
 7432 OR Gate – 1pc.
 7411 Triple-Input AND Gate – 1pc.
 LED – 1pc.
 Resistor (1/4W) 360 Ohm – 1pc.
 Breadboard – 1pc.
 Long nose – 1pc.
 Flier – 1pc.
 Connecting Wires – 1pc.
 Power Supply (5V) – 1pc.

V. STEPS AND PROCEDURES


1. Prepare the materials needed for the experiment
2. Use safety goggles before starting the experiment
2. Assemble the materials and follow the diagram to construct the circuit
3. Run and test the Basic Logic Gates
4. Record the results

VI. PICTORIAL DIAGRAM


PART 1: SCHEMATIC DIAGRAM FOR NOT GATE

PART 1: NOT GATE

Terminal A is at Logic 1 and the Output is 0

Terminal A is at Logic 0 and the Output is 1

PART 2: SCHEMATIC DIAGRAM FOR OR GATE


PART 2: OR GATE
Terminals A and B are in Logic 0 and the Output is 0

Input Terminal A is @ 0 and Input Terminal B is @ 1 and the Output is 1


Input Terminal A is @ 1 and Input Terminal B is @ 0 and the Output is 1

Input Terminal A and B are @ 1 and the Output is 1

PART 3: SCHEMATIC DIAGRAM FOR AND GATE


PART 3: AND GATE

Both Terminals A and B are @ 0 and the Output is 0


Input Terminals A is @ 0 and Terminal B is @ 1 and the Output is 0
Input Terminals A is @ 1 and Terminal B is @ 0 and the Output is 0
Both Terminals A and B are @ 0 and the Output is 0

PART 4: SCHEMATIC DIAGRAM FOR MULTIPLE-INPUT AND GATE

PART 4: MULTIPLE-INPUT AND GATE


All Terminals are @ 0 and the Output is 0
Terminal C is @ 1 the rest Terminals are @ 0 and the Output is 0
Terminal B is @ 1 the rest Terminals are @ 0 and the Output is 0
Terminal A is @ 1 the rest Terminals are @ 0 and the Output is 0

All Terminals are @ 1 and the Output is 1

PART 5: SCHEMATIC DIAGRAM FOR AND-OR COMBINATION


CIRCUIT
PART 5: AND-OR COMBINATION CIRCUIT
Input Terminals A, B & C are 0 and the Output is 0

Input Terminals A & B are 0 & C is 1 and the Output is 0


Input Terminals A & C are 0 & B is 1 and the Output is 0
Input Terminals B & C are 1 and C is 0 and the Output is 1
Terminal A is 1 and the rest is 0 and the Output is 1

Terminals A & C are 1 and the Output is 1

Only Terminal C is 0 and the Output is 1


All Terminals are 1 and the Output is 1

PART 6: SCHEMATIC DIAGRAM FOR AND-OR NOT COMBINATION


CIRCUIT

PART 6: AND-OR NOT COMBINATION CIRCUIT

Constructing Terminals of Input and Output


VII. OBSERVATION

Table 1.1: NOT Gate

A (Input) Y (Output LED1)


0 1
1 0

Table 1.2: OR Gate

A (Input) B (Input) Y (Output LED1)


0 0 0
0 1 1
1 0 1
1 1 1

Table 1.3: AND Gate

A (Input) B (Input) Y (Output LED1)


0 0 0
0 1 0
1 0 0
1 1 1

Table 1.4: Triple-Input AND Gate

A (Input) B (Input) C (Input) Y (Output LED1)


0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1

Table 1.5: AND-OR Combination

A (Input) B (Input) C (Input) Y (Output LED1)


0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1

Table 1.6: AND-OR-NOT Combinational Circuit

A (Input) B (Input) C (Input) D (Input) Output LED


0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 1
1 0 0 0 0
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1

VIII. CONCLUSION
IN CONCLUSION, THE OUTPUT OF THE NOT GATE IS THE OPPOSITE
OF ITS INPUT. FOR THE OR GATE, IF THE OUTPUT HAS ONE OR
MORE “1“, THEN THE OUTPUT WOULD BE “1“. LASTLY FOR THE AND
GATE, IF THE INPUT HAS “0“, THEN, THE OUTPUT IS “0”.

IX. RECOMMENDATIONS
ALWAYS REMEMBER THE FUNCTION OF EACH GATES, ESPECIALLY
WHEN NOT GATE (INVERTER) IS INVOLVED.

X. QUESTION

XI. REFERENCES

https://www.youtube.com/watch?v=hNOYp86LGmk
https://www.allaboutcircuits.com/textbook/digital/chpt-3/not-gate/

You might also like