COURSE OUTLINE

DEPARTMENT : ELECTRICAL ENGINEERING

PROGRAMME : DIPLOMA IN ELECTRONIC ENGINEERING (COMPUTER)
COURSE CODE : DEC50143
COURSE NAME : CMOS INTEGRATED CIRCUIT DESIGN AND FABRICATION
SEMESTER :5
CREDIT VALUES :3
CONTACT HOURS : 56
PRE-REQUISITE(S) : DEE20023 & DEE20033

VISSION & MISSION :

VISSION:
To be the Leading-Edge TVET Institution

MISSION:
a. To provide wide access to quality and recognized TVET programmes
b. To empower communities through lifelong learning
c. To develop holistic, entrepreneurial and balanced graduates
d. To capitalise on smart partnership with stakeholders

PROGRAMME AIMS [PAI]:

This programme believes that all individuals have potential to be a resourceful and adaptable technician to support the nation
aspiration in providing engineering talent.

PROGRAMME EDUCATIONAL OBJECTIVES (PEO):

The engineering programme should produce balanced TVET graduates who are:
PEO1: practicing technician in electrical engineering related field
PEO2: contributing to society with professional ethic and responsibilities
PEO3: engaging in enterprising activities that apply engineering knowledge and technical skills
PEO4: engaging in activities to enhance knowledge for successful career advancement

PROGRAMME LEARNING OUTCOMES (PLO)

Upon completion of this programme, graduates will be able to:
1. apply knowledge of applied mathematics, applied science, engineering fundamentals and an engineering
specialisation as specified in DK1 to DK4 respectively to wide practical procedures and practices
2. identify and analyse well-defined engineering problems reaching substantiated conclusions using codified
methods of analysis specific to their field of activity (DK1 to DK4)
3. design solutions for well-defined technical problems and assist with the design of systems, components or
processes to meet specified needs with appropriate consideration for public health and safety, cultural, societal,
and environmental considerations (DK5)
4. conduct investigations of well-defined problems; locate and search relevant codes and catalogues, conduct
standard tests and measurements
5. apply appropriate techniques, resources, and modern engineering and IT tools to well-defined engineering
problems, with an awareness of the limitations (DK6)
6. demonstrate knowledge of the societal, health, safety, legal and cultural issues and the consequent
responsibilities relevant to engineering technician practice and solutions to well-defined engineering problems
(DK7)
7. understand and evaluate the sustainability and impact of engineering technician work in the solution of well-
defined engineering problems in societal and environmental contexts (DK7)
8. understand and commit to professional ethics and responsibilities and norms of technician practice
9. function effectively as an individual, and as a member in diverse technical teams
10. communicate effectively on well-defined engineering activities with the engineering community and with society
at large, by being able to comprehend the work of others, document their own work, and give and receive clear
instructions
11. demonstrate knowledge and understanding of engineering management principles and apply these to one’s
own work, as a member or leader in a technical team and to manage projects in multidisciplinary environments
12. recognise the need for, and have the ability to engage in independent updating in the context of specialised
technical knowledge

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COURSE SYNOPSIS

CMOS INTEGRATED CIRCUIT DESIGN AND FABRICATION course exposes the students to the basic integrated
circuit (IC) and CMOS IC fabrication processes which include oxidation, doping, photolithography, metallization
and etching. This course also covers IC testing, reliability and failure analysis. The students will be equipped with
the knowledge of inverter design and simple to complex CMOS logic gates. The students will experience
developing the physical layout of integrated circuit based on specific transistor feature size and using CAD tools
while adhering to specific design rules. Finally, this course also covers the topic on design methodology used in
designing integrated circuits.

LEARNING OUTCOMES

LEARNING
NO COURSE LEARNING OUTCOMES [CLO] PLO
DOMAINS
design the basic logic gates, digital circuits from Boolean function and
1 integrated circuit layout based on the knowledge of integrated circuit PLO 3 C6
design methodology
construct the layout design of CMOS circuits using layout design
2 PLO 5 P4
software based on specific CMOS layout design rules
demonstrate elements of environmental sustainability in implementing
3 reduce and reuse techniques in design parameters and design PLO 7 A3
consideration through practical work

Legend:
Cognitive Domain Psychomotor Domain Affective
C1: Remembering P1: Perception A1: Receiving Phenomena
C2: Understanding P2: Set A2: Responding to Phenomena
C3: Applying P3: Guided response A3: Valuing
C4: Analyzing P4: Mechanism A4:: Organizing Values
C5: Evaluating P5: Complex/Overt Response A5: Internalizing Values
C6: Creating P6: Adaptation

STUDENT LEARNING TIME [SLT]

Teaching and Learning Activities
Guided Learning (F2F) Guided
Independent
Learning
Learning SLT
Course Content Outline CLO* L P T O (NF2F) eg:e-
(NF2F)
learning
TOPIC 1 : Introduction to
CLO1 3 0 0 0 0 3 6
Integrated Circuit
TOPIC 2 : Integrated Circuit
CLO1 3 0 0 0 0 3 6
Fabrication Process
TOPIC 3 : Introduction to IC
Testing, Reliability and Failure CLO1 2 0 0 0 0 2 4
Analysis
CLO1 7 0 0 0 0 7 14
TOPIC 4 : Designing
CLO2 0 12 0 0 0 6 18
Combinational Logic Circuits
CLO3 0 1 0 0 0 0.5 1.5
CLO1 7 0 0 0 0 7 14
TOPIC 5 : Layout Design CLO2 0 10.5 0 0 0 5.25 15.75
CLO3 0 1 0 0 0 0.5 1.5
TOPIC 6 : Design Methodology CLO1 3 0 0 0 0 3 6
TOTAL 86.75

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 CONTINUOUS ASSESSMENT PERCENTAGE (%) F2F NF2F SLT
Quiz 10 1 2 3
Test 10 2 4 6
Practical Work 25 1.5 0.75 2.3
Practical Work (Generic Skills) 5 1 2 3
End of Chapter 10 1 10 11
TOTAL 25.25

FINAL ASSESSMENT PERCENTAGE (%) F2F NF2F SLT

Final Examination 40 2 6 8
TOTAL 8

**Please tick (√) if this course is Latihan Industri/ Clinical Placement/

Practicum/ WBL using 2-weeks, 1 credit formula
GRAND TOTAL SLT 120
L = Lecture, T = Tutorial, P= Practical, O= Others, F2F=Face to Face,
NF2F=Non Face to Face
*Indicate the CLO based on the CLO’s numbering in Item 8.

WEEKLY SCHEDULE
WEEK TOPIC & SUBTOPICS ASSESSMENTS

1.0 Introduction to Integrated Circuit

1.1 Remember Integrated Circuit
1-2 Practical Work 1 (T4-T5)
1.2 The Evolution of integrated circuits
1.3 The classification of integrated circuit
2.0 Integrated Circuit Fabrication Process
2.1 Remember how single crystal silicon is formed
2.2 Understand the basic process steps for wafer preparation
2-3 2.3 Understand the integrated circuit basic fabrication process Practical Work 2 (T4-T5)
2.4 Understand the fabrication process for CMOS integrated circuit
2.5 Remember the concept of MEMS
2.6 Understand contamination control in wafer and IC fabrication
3.0 Introduction to IC Testing, Reliability and Failure Analysis
Test 1 (T1-T3)
3.1 Understand IC testing
4 PW (Generic Skills) 1 (T4)
3.2 Understand reliability and degradation of IC
3.3 Understand failure analysis in microelectronic industry
4.0 Designing Combinational Logic Circuits
4.1 Remember NMOS and PMOS transistor
4.2 Understand static CMOS inverter
4.3 Remember static CMOS logic circuits Quiz 1 (T1-T4)
5-8 4.4 Understand complementary CMOS circuit Practical Work 3 (T4-T5)
4.5 Apply the knowledge of complementary CMOS circuit in logic gates Practical Work 4 (T4-T5)
4.6 Design complementary CMOS circuit
4.7 Remember the basic principles of dynamic CMOS logic
4.8 Apply the knowledge of dynamic CMOS in designing logic gates
5.0 Layout Design
5.1 Understand integrated circuit layout
5.2 Apply the knowledge of integrated circuit layout in drawing stick
diagram Quiz 2 (T4-T6)
8-11 5.3 Design stick diagram for basic logic gates and complex Boolean Practical Work 5 (T4-T5)
function Practical Work 6 (T4-T5)
5.4 Understand the integrated circuit design rules in designing the
integrated circuit layout
5.5 Design the integrated circuit layout

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 6.0 Design Methodology
6.1 Remember hierarchy design Practical Work 6 (T4-T5)
6.2 Understand the design methodology PW (Generic Skills) 2 (T5)
12-14
6.3 Understand Programmable Logic Devices (PLD) End of Chapter (T1-T6)
6.4 Apply the knowledge of PLD architecture in constructing PLD array Test 2 (T4-T6)
structure

ASSESSMENT

CLO TYPES OF ASSESSMENT ASSESSMENTS

Continuous Assessment (CA) 60

CLO1 Quiz [2] 10

CLO1 Test [1] 10

CLO2 Practical Work [6] 25

CLO1 End of Chapter [1] 10

CLO3 Practical Work (Generic Skill) [2] 5

CLO1 Final Examination (FE) 40

Total 100

REFERENCES:

MAIN:
1. Neil H. E Weste & David Harris (2011). CMOS VLSI Design: A Circuits and Systems Perspective .4th
Edition. Addison-Wesley

ADDITIONAL:
1. Adel S. Sedra and Kenneth Carless. Smith (2003). Microelectronic Circuits. Oxford University Press
2. Michael Quirk & Julian Serda. (2001). Semiconductor Manufacturing Technology, Prentice Hall, Inc.
3. R. Jacob Baker (2011) CMOS Circuit Design, Layout and Simulation, 3rd Edition. New Jersey Wiley – IEEE
Press. Inc
4. Rabaey, J. M, Anantha Chandrakasan, Borivoje Nikolic (2003). Digital Integrated Circuit, Prentice Hall, Inc

RULES:
1. Attendance is compulsory for every student. Students are required to have at least 80% attendance.
2. Punctuality is essential. Every student is required to be in the lecture hall/lecture room/ workshop 5 minutes
before class starts.
3. Student should submit all quizzes and assignments on time.
4. All students must take part in every exercise/task in class. Plagiarism and cheating will be severely dealt with.
5. Students should conduct themselves in an appropriate manner following the policies and guidelines of the
polytechnic.

Notes:
DK 1: A descriptive, formula-based understanding of the natural sciences applicable in a sub-discipline
DK 2: Procedural mathematics, numerical analysis, statistics applicable in a subdiscipline
DK 3: A coherent procedural formulation of engineering fundamentals required in an accepted sub-discipline
DK 4: Engineering specialist knowledge that provides the body of knowledge for an accepted sub-discipline
DK 5: Knowledge that supports engineering design based on the techniques and procedures of a practice
area
DK 6: Codified practical engineering knowledge in recognised practice area
DK 7: Knowledge of issues and approaches in engineering technician practice: ethics, financial, cultural,
environmental and sustainability impacts

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