EE 3113

INTRODUCTION INTO RF
CIRCUIT DESIGN
Lecture Notes for A-term 1999
LECTURE 7
Prof. R. Ludwig
Department of Electrical and Computer Engineering
Worcester Polytechnic Institute
Worcester, MA 01609
copyright © 1999, R. Ludwig
EE3113_L7 1
Copyright, 1998 © R. Ludwig
Sourced and Loaded Transmission Lines
• Lossless transmission line with source

Z − Z0 Z L − Z0
= G =
ZG + Z0 ZL + Z0

+ Z in
Vin = V (1 + Γin ) = VG ( )
Z in + Z G
in

Voltage at the beginning of the transmission line is

composed of an incident and reflected component!
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 Power considerations
+ Vin+
Vin = V (1 + Γin )
in I in = (1 − Γin )
Z0

1
Pin = Re{Vin I in* }
2

1 | Vin+ |2
Pin = (1− | Γin |2 )
2 Z0

1 | VG |2 | 1 − ΓS |2
Pin = (1− | Γin )
| 2

8 Z 0 | 1 − ΓS Γin | 2

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Two special cases:

Load and source 1 | VG |2

matched line
Γ0 = ΓS = 0 Pin =
8 Z0

2
Mismatch at source, 1 | VG |
but match at load Γ0 = 0 Pin = | 1 − ΓS |2
8 Z0

P[W ]
How to measure power? P[ dBm ] = 10 log
1mW

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 Return and insertion losses

Pr
Return loss: RL = −10 log( ) = −10 log | Γin |2 = −20 log | Γin | [dB]
Pi

P P −P
Insertion loss: IL = −10 log( t ) = −10 log( i r ) = −10 log(1− | Γin |2 ) [dB]
Pi Pi

No reflection Full reflection

0
à 1
∞ dB RL
0 dB
1
SWR
∞
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