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Linear Integrated Circuits
Subject Code: 15EC46
MODULE 1
OPERATIONAL AMPLIFIER FUNDAMENTALS
Guruprasad K N
Assistant Professor
Dept. of E&C, ATME
Syllabus:
1. Basic op-amp circuit
2. Op-amp parameters
3. CMRR
4. PSRR
5. OFFSET voltages and currents
6. I/O impedances
7. Slew rate and frequency limitations
8. Op-Amps as DC amplifiers
9. Biasing Op-Amps
10. Direct coupled voltage followers
11. Non-Inverting and Inverting amplifiers
12. Summing Amplifiers
13. Difference amplifiers
Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Symbolic representations of OPAMP

MODULE 2
Op-Amps as AC Amplifiers
Guruprasad K N
Assistant Professor
Dept. of E&C, ATME
Syllabus:

The signal voltage is divided across Xc1 and Zin
The output voltage is divided across Xc2 and RL
Non Inverting amplifier with feedback capacitor Cf, to set the upper cutoff frequency

Syllabus:

Reference voltage derived from a potential divider

Reference voltage derived from a zener diode

Potentiometer R4 provides output voltage adjustment

Current Sources

Constant current sink using bipolar transistor.
Current-to-voltage converter
circuit which behaves like an
inverting amplifier without an
input resistor.

Current Amplifiers

Instrumentation amplifier

Full wave precision Rectifier

MODULE 3
More applications
Guruprasad K N
Assistant Professor
Dept. of E&C, ATME
Syllabus:
•Clamping circuits
•Peak detectors
•Sample and hold circuits
•V to I and I to V converters
•Log and antilog amplifiers
•Multiplier and divider
•Triangular / rectangular wave generators
•Wave form generator design
•Phase shift oscillator
•Wein bridge oscillator.

Clamping circuits

Sample and hold circuits

V to I and I to V converters

Log and antilog amplifiers

Multiplier and divider

Wein bridge oscillator:

Phase shift (Quadrature phase ) oscillator:

MODULE 4
Voltage Regulators
Guruprasad K N
Assistant Professor
Dept. of E&C, ATME
Syllabus:

Advantages of Voltage Regulators:
1. Easy to use
2. It greatly simplifies power supply design
3. Due to mass production it is low in cost
4. Conveniently used for local regulation
5. IC voltage regulators are versatile

7.2. SERIES OPAMP REGULATOR:
•Def:Voltage regulator is a circuit which keeps its output voltage constant in

spite of change in input voltage or load current.
•Input to the voltage regulator is unregulated or pulsating dc voltage obtained

from filter and rectifier
•Its output is constant dc voltage which is almost ripple free

7.3 IC 723 Regulators

•The functional block diagram of IC 723 has two separate sections.
•The Zener diode, a constant current source produces a fixed voltage of about
7 V at the terminal Vref.
•The constant current source forces the Zener to operate at a fixed point so
that the Zener outputs a fixed voltage.
•The other section of the IC consists of an error amplifier; a series pass

transistor ‘Q1’ and a current limit transistor ‘Q2’.
•The error amplifier compares a sample of the output voltage applied at the
inverting input terminal.
•The reference voltage Vref applied at the non-inverting input terminal.
•The error signals controls the conduction of Q1. These two sections are not
internally connected but the various points are brought out on the IC
package.
•IC 723 is available in a 14 pin dual in line package or 10 pin metals can.

Internal blocks of IC 723

Operation of low voltage regulator using IC 723

Operation of HIGH voltage regulator using IC 723

Switching Regulator

•The bridge rectifier and capacitor filter are connected directly to the ac line to
give unregulated dc input.
•The Thermistor limits the high initial capacitor charge current
•The reference regulator is a series pass regulator.
•Its output is a regulated reference voltage Vref which serves as supply voltage
for all other circuits.
•Transistor Q1 and Q2 are alternatively switched off and on.
•These transistors are either fully on or cutoff so that they dissipate little power.
•These transistors drive the primary of main transformer.
•The secondary center tapped and full wave rectification is achieved by diodes.
•This unidirectional square wave is next filtered through a two stage LC filters to
•produce output voltage Vo.
•The regulation is achieved by a feedback circuit consisting of PWM.

MODULE 5
Other Linear IC applications
Guruprasad K N
Assistant Professor
Dept. of E&C, ATME
Syllabus:
 555 timer
 Basic timer circuit
 555 timer used as astable multivibrator
 555 timer used as monostable multivibrator
 Schmitt trigger
 Phase Locked Loop (PLL)
 Operating principles
 Phase detector/ comparator
 Voltage controlled oscillators (VCO)
 D/A and A/ D converters
 Basic DAC Techniques
 AD converters

Suggested Reading
“Linear Integrated Circuits”, D. Roy Choudhury and Shail B. Jain, 2nd
edition, Reprint 2006, New Age International
Text 2:
Chapter 8 – 8.1, 8.2, 8.3, 8.4, 8.5
Chapter 9 – 9.1, 9.2, 9.3, 9.4
Chapter 10 – 10. 1, 10.2, 10.3
Except 8.3.1, 8.4.1, 10.2.5, 10.4

555 Timer:
The 555 timer is a highly stable and versatile linear IC used for generating
time delay or oscillation.
It was first introduced by Signetics Corporation in 1971
IC 555 timer is available in two packages

1. 8 pin circular type
2. 8 pin DIP type
Features of IC 555 Timer

• Supply voltage ranges from + 5V to + 18 V
• It has adjustable duty cycle
• High temperature stability
• It can drive load current up-to 200 mA
• Low cost
• It can be operated in two modes
1. Monostable multivibrator mode
2. Astable or free running mode
Applications of 555 Timer
• Monostable and Astable multivibrators

• Oscillators
• Ramp and square wave generators
• Pulse generators
• Burglar alarms
• Traffic light controllers
• Voltage monitors

Functional diagram of 555 Timer
Q: Draw and explain functional diagram of 555 timer.
June 2010, 6 Marks
Q: Explain the functional diagram of IC 555 with neat sketch.
January 2010, 10 Marks
Fig: Functional diagram of 555 Timer

555 Timer consists of
• Two op-amp voltage comparators:
- Upper comparator (UC) and Lower comparator (LC)
• Voltage divider network consisting of three 5 kΩ internal resistors
• SR flip flop
• A discharging transistor
Pin 1: Ground
All the voltages are measured with respect to this terminal
Pin 2: Trigger
Due to the voltage divider network, the voltage of non-inverting
terminal of comparator 2 is fixed at Vcc/3.
The inverting input of comparator 2 is compared with Vcc/3. When the
trigger input is slightly less than Vcc/3, the comparator 2 output goes
high.
This input is given to reset input of R-S flip-flop.
Thus Q = 0 and =1. Since is connected to output, output of the
timer is high
Pin 3: Output
The of the flip-flop goes to pin 3 which is the output.
The load can be connected in two ways:
1. Off - load: If the load is connected between pin 3 and ground
2. On - load: If the load is connected between pin 3 and Vcc
Pin 4: Reset
The 555 timer can be reset by applying a negative pulse to this pin.
When pin 4 is grounded, it stops the working of device and makes it off.
Thus, pin 4 provides on/off feature to the IC 555.
Pin 5: Control voltage

By applying a voltage on this pin, the pulse width (duty cycle) of the
waveform can be varied.
In most of the applications control voltage input is not used.

Pin 6: Threshold
This is the non inverting input terminal of comparator 1. The voltage at
this pin is compared with the 2/3 Vcc at the inverting terminal of
comparator 1.
When the voltage at this pin is greater than 2/3 Vcc, the comparator 1
output goes high.
This input is given to set input of R-S flip-flop.
Thus Q = 1 and = 0. Since is connected to output, output of the
timer is low.
Pin 7: Discharge
This pin is connected to the collector terminal of discharge transistor
Q1.
When the output is high (i.e., = 1 & Q = 0), transistor Q1 is OFF and
acts as open circuit to the external capacitor.
Similarly, when the output is low (i.e., = 0 & Q = 1), Q1 is ON and
acts as a short circuit to the external capacitor.
Pin 8: + Vcc
The IC 555 timer can work with any supply voltage between + 5V to
+18 V
Summary:
For threshold (Pin 6) > 2/3 Vcc:

Flip-flop is set, Q is high, Output at pin 3 is low
For trigger (Pin 2) < 1/3 Vcc:

Flip-flop is reset, Q is low, Output at pin 3 is high

Fig: Functional diagram of 555 timer in monostable operation
Fig: Monostable multivibrator
Fig: Input and output pulses

Assume that the output of 555 timer is initially low, i.e., transistor Q1 is
ON and capacitor ‘C’ is shorted to ground.
When the negative trigger pulse is applied at pin 2, the comparator 2

output goes high.
Thus Q = 0 and =1. Since is connected to output, output of the
timer is high.
Since Q is connected to transistor Q1, the transistor Q1 turns OFF,
which releases the short circuit across the capacitor ‘C’.
Now the capacitor ‘C’ starts charging towards Vcc through ‘R’. When the
voltage across the capacitor ‘C’ equals 2/3 Vcc, the comparator 1 output
goes to high which in turn drives the output to low state,
i.e, Q = 1 and = 0.
Since Q = 1, now the transistor Q1 is ON and hence capacitor ‘C’

discharges through the transistor Q1.
The output of the monostable multivibrator remains low until a trigger

pulse is again applied. Then The cycle repeats.

So a rectangular wave is produced at the output. The pulse width of
this rectangular pulse is controlled by the charging time of capacitor
and resistor.
Thus RC controls the pulse width.

Astable multivibrator using IC 555
Q: Draw the internal schematic of 555 IC, configuring it for astable operation.
Explain the working. July 2013, 8 Marks
Q:With a neat block diagram, explain the operation of a astable multivibrator

using 555 timer. June 2012, 8 Marks
Q: Explain the following with neat diagrams and waveforms

a. 555 timer as a stable multivibrator July 2009, 5 Marks

Fig: Functional diagram of 555 timer in astable operation
Fig: Astable Multivibrator
Fig: Input and output pulses

An astable multivibrator is a rectangular wave generating circuit. This
circuit does not require an external trigger to change the state of the
output. Hence it is called free running multivibrator.
Operation:
Let us assume that initially the 555 output is high, the discharge transistor
Q1 is OFF and the capacitor ‘C’ starts towards Vcc through RA and RB.
When capacitor charging voltage equals to 2/3 Vcc, it causes the

comparator 1 output to go high.
Hence the flip-flop output Q = 1 and = 0. Thus the output of timer
goes low.
Now capacitor ‘C’ starts discharging through RB and transistor Q1.
When the discharging voltage across the capacitor ‘C’ equals Vcc/3,
comparator 2 output goes high and it resets the flip-flop. Then the cycle
repeats.
Thus capacitor is periodically charged and discharged between 2/3 Vcc to
Vcc/3 respectively.
Summary:
The time during which the capacitor charges from Vcc/3 to 2/3 Vcc is
equal to the time the output is high – Charging Time (TC)
Similarly,
The time during which the capacitor discharges from 2/3 Vcc to Vcc/3 is
equal to the time the output is low – Discharging Time (TD)

The charging time for the capacitor is given by,
Tc = 0.69 (RA + RB) C
The discharging time for the capacitor is given by,

Td = 0.69RBC

Astable Multivibrator to generate Square Wave (Duty cycle = 50%)
Fig: Square wave
Fig: Square wave generator

To get exactly 50% duty cycle i.e., square wave output, it is necessary to
modify the astable timer circuit.
In modified astable circuit, the capacitor ‘C’ charges through RA and

diode D, and discharges through RB.
Charging time: Tc = 0.69 RAC
Discharging time: Td = 0.69 RBC

Summary:
To get duty cycle > 50%
Tc = 0.69 (RA + RB) C
Td = 0.69RBC
To get duty cycle = 50%
Tc = 0.69 RAC
Td = 0.69 RBC

Schmitt Trigger
Fig: Timer in Schmitt Trigger operation

Fig: Input and output waveforms of Schmitt Trigger

Operation:
In Schmitt Trigger circuit using 555 timer, the two internal comparators
are tied together (Pin 2 & 6) and externally biased at Vcc/2 through R1
and R2.
The upper comparator will set, when the voltage at point A goes above
the bias value of Vcc/2 to 2/3 Vcc.
The lower comparator will set, when the voltage at point B goes down
too Vcc/3 from the bias value of Vcc/2.
If a sine wave of amplitude greater than Vcc/6 (Vcc/6 = 2/3 Vcc – Vcc/2)
is applied, then the internal flip-flop will be alternatively set and reset,
providing square wave output at pin 3.
In Schmitt Trigger circuit

Input signal frequency = Output signal frequency

Analog to Digital Converters (ADC)
Fig: Functional diagram of ADC

The binary output is given by
Where d1 is MSB and dn is LSB.
The ADC has two additional control lines

a) START: This input tells the ADC when to start the conversion
b) EOC: End of conversion – It indicates conversion is complete
Types of ADC:
1. Direct type ADC
2. Integrating type ADC

Direct type ADC:
It compares a given analog signal with the internally generated
equivalent signal.
Classification:
1. Flash type converter or Parallel comparator ADC
2. Counter type converter
3. Tracking or Servo converter
4. Successive approximation type converter

Flash type converter or Parallel comparator ADC

The maximum frequency for a sinusoidal input voltage to be digitized is
given by
F max = 1/ 2πTc2n
Where Tc is conversion time
N is number of bits
Advantages:
1. Conversion is very fast
Disadvantages:
1. It requires a large numbers of comparators i.e., number of
comparators required almost doubles for each added bit.
2. Expensive

Design of 2 bit flash ADC
No. of comparators required = 2n = 22 = 4

The Counter type A to D converter

Tracking or Servo converter

Successive Approximation ADC
A successive approximation ADC is based on a very efficient code

searching strategy called binary search.
The searching process is very fast. A n-bit conversion being completed
in only n – clock periods.

Control lines
a) START: This input tells the ADC when to start the conversion
b) EOC: End of conversion – It indicates conversion is complete
Time required for one conversion from analog to digital is given by,
Tc = T (n + 1)
Where, T = Clock period
n = No. of bits
Integrating type ADCs
In integrating type ADC, if the input changes during the conversion, the
ADC output code will be proportional to the value of input averaged
over the integration period.
Types:
1. Charge balancing ADC
2. Dual – slope ADC

Charge balancing ADC:
The principle of charge balancing ADC is to first convert the input signal
to a frequency using voltage to frequency (V/F) converter.
This frequency is then converted to an output code proportional to the

analog input.
Advantage:
It is possible to transmit frequency even in noisy environment.
Limitation:
The output of V/F converter depends upon an RC product whose value
cannot be easily maintained with temperature and time.
This drawback of charge balancing ADC is eliminated by the dual slope

conversion.

Dual – Slope ADC

The integrator is a ramp generator.
The integrator input can be switched between the analog input voltage
Vi and a negative reference voltage –Vref using the switch ‘S’.
The switch is controlled by the MSB of the binary counter.
When the MSB is at logic ‘0’, the switch closes on terminal 1 at which
the input voltage is applied.
When the MSB is at logic ‘I’, the switch closes on terminal 2 at which
the input voltage is applied.
Operation:
At t=0, let the switch close on terminal 1. The analog input Vi gets
applied at the inverting terminal of the integrator.

The integrator output voltage is given by,
When the integrator output is applied to the comparator, the

comparator output goes high. It enables the AND gate and the clock
pulses reach the counter.
At the end of 2n clock pulses, the MSB of the counter goes high. This
causes the output of the flip-flop to go high. Now, the switch ‘S’ switches
from position 1 to position 2 and connects the reference voltage to the
integrator inverting terminal.
Now, the binary counter gets reset. The negative reference voltage
-Vref enters the integrator and the output increases as a positive linear
ramp.
When it reaches zero level, the comparator output goes low, and it
disables the AND gate. As a result clock pulses will not reach the counter.
The counter stops at a count corresponding to a time interval t2.
In the above equation VR and t1 are fixed. Hence

Thus, t2 is proportional to the analog input voltage and hence it is
measure of it.
The output of the counter is proportional to the analog input.
Advantages:
1. High degree of accuracy
2. It is inexpensive
3. Its performance is not adversely affected by change of temperature.

Thank You

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Linear Integrated Circuits

Subject Code: 15EC46

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Subject Code: 15EC46

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Subject Code: 15EC46

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Subject Code: 15EC46

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

•Def:Voltage regulator is a circuit which keeps its output voltage constant in

•Input to the voltage regulator is unregulated or pulsating dc voltage obtained

•Its output is constant dc voltage which is almost ripple free

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

•The other section of the IC consists of an error amplifier; a series pass

•The reference voltage Vref applied at the non-inverting input terminal.

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

•The Thermistor limits the high initial capacitor charge current

•The reference regulator is a series pass regulator.

•Transistor Q1 and Q2 are alternatively switched off and on.

•These transistors drive the primary of main transformer.

•The regulation is achieved by a feedback circuit consisting of PWM.

Subject Code: 15EC46

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

It was first introduced by Signetics Corporation in 1971

IC 555 timer is available in two packages

Features of IC 555 Timer

• Monostable and Astable multivibrators

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Fig: Functional diagram of 555 Timer

Pin 5: Control voltage

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

For threshold (Pin 6) > 2/3 Vcc:

For trigger (Pin 2) < 1/3 Vcc:

Guruprasad KN, Assistant Professor, Dept. of E&C, ATME

Fig: Input and output pulses

When the negative trigger pulse is applied at pin 2, the comparator 2

Since Q = 1, now the transistor Q1 is ON and hence capacitor ‘C’