DELTA MODULATION

Lab no. 10

Group Members:
Masood Salik
Maryam Asad
Rabia Khalid
Ramesha Murtaza
Hira Majeed
Objective:
The objective of this lab is to study basic delta modulation and to observe effects of step size and sampling
clock rate change and to observe slope overload and granular noise

Introduction:
Delta modulation is simplified form of pulse code modulation (PCM).The output of a delta
modulator is a bit stream of samples, at a relatively high rate (eg, 100 kbit/s or more for a speech
bandwidth of 4 kHz) the value of each bit being determined according as to whether the input message
sample amplitude has increased or decreased relative to the previous sample.

Operation principal:
The operation of a delta modulator is to periodically sample the input message, to make a
comparison of the current sample with that preceding it, and to output a single bit which indicates the
sign of the difference between the two samples.

Figure 1 integrator output superimposed on the message with the delta modulated signal below

We get message and predicted message subtracted in summer. Then this is sent to limiter which
converts this difference to some quantized level and then sampler gives us ±V volts depending on input.
This signal then again feedbacked, passing from gain filter and integrator to predicted new value.

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 Figure 2 delta modulation input and outputs

Step size calculation:

In the delta modulator of Figure 2 the output of the integrator is a saw tooth-like approximation to the
input message. The teeth of the saw must be able to rise (or fall) fast enough to follow the message. Thus
the integrator time constant is an important parameter. For a given sampling (clock) rate the step slope
(volt/s) determines the size (volts) of the step within the sampling interval.

Suppose the amplitude of the rectangular wave from the sampler is ±V volt. For a change of input sample
to the integrator from (say) negative to positive, the change of integrator output will be, after a clock
period T:

output = 2kVT/RC volts

where k is the gain of the amplifier preceding the integrator.

Slope overload:
This occurs when the saw-tooth approximation cannot keep up with the rate-of change of the
input signal in the regions of greatest slope. The step size is reasonable for those sections of the sampled
waveform of small slope, but the approximation is poor elsewhere. This is ‘slope overload’, due to too
small a step.

Figure 3 Slope overload

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To reduce the possibility of slope overload, the step size can be increased (for the same sampling rate).
This is illustrated in Figure 4. The saw-tooth is better able to match the message in the regions of steep
slope.

Figure 4 reducing the slope overload

An alternative method of slope overload reduction is to increase the sampling rate. This is illustrated in
Figure 5, where the rate has been increased by a factor of 2.4 times, but the step is the same size as in
Figure 3.

Figure 5 reduction in slope overload by increasing sampling rate

Granular noise:
Refer back to Figure 3. The saw-tooth follows the message being sampled quite well in the regions of small
slope. To reduce the slope overload the step size is increased, and now (Figure 4) the match over the
regions of small slope has been degraded. The degradation shows up, at the demodulator is called as
increased quantizing noise, or ‘granularity’.

So, we have to trade of between granular noise and slope overload.

noise and distortion minimization

There is a conflict between the requirements for minimization of slope overload and the granular noise. The one
requires an increased step size, the other a reduced step size. An optimum step can be determined by minimizing the
quantizing error at thesummer output, or the distortion at the demodulator output.

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Experiment:

Figure 6 circuit diagram

Setting the unity gain of adder and buffer amplifiers:

Figure 7 setting up unity gain

Individually set the gain of g and G to unity. Then buffer gain by setting same input, output amplitudes.

Triangular output for low clk:

Figure 8 Triangular output for low clk (25kHz)

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Triangular output for medium clk:

Figure 9 Triangular output for medium clk (50 kHz)

Triangular output for high clk:

Figure 2 Triangular output for high clk (100kHz)

We can see that by increasing clk we are getting better approximation as no of samples per cycle has been
increased.

If we reduce the gain k then minimum saw-tooth we can get is

Figure 12 minimum step size

We can easily see that there is slope overload when input signal changes rapidly.

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PWM for minimum step size:

Figure 13 PWM for minimum step size

If we increased sample clk and reduce step size then maximum achievable PWM and saw-tooth signal is

Figure 14 Maximum achievable PWM

the larger steps occur over more than one clock period and that small steps occur when the rate
of change of the input is small (near the extrema of the sinewave message)..

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 Figure 3 best’ match Delta Modulation

TUTORIAL QUESTIONS:
Q1 why is it useful to set up the experiment using the 2-kHz signal from the MASTER SIGNALS module,
as opposed to a signal from an AUDIO OSCILLATOR?

The ‘2 kHz MESSAGE’ from MASTER SIGNALS is 1/48 of 100 kHz. This results in more text-book-
like displays than is otherwise possible.
If you have the optional AUDIO OSCILLATOR module you should try looking at the waveforms
for the case of a non-synchronous message.

Q2 what are the system parameters which control the step size (quantization amplitude) for a given
sampling rate?

You may prefer to insert a separate, non-inverting amplifier between the INTEGRATOR and the
ADDER, rather than use the ADDER gain g to change the loop gain. A change of ADDER gain g
alters the step size, but one cannot see this as the change occurs inside the ADDER.

Q3 knowledge of the step size alone is insufficient to make a statement about the possibility of slope
overload. What else needs to be known?

Highest message frequency determines the maximum message slope.

Q4 calculate the peak-to-rms ratio of a constant peak-to-peak amplitude saw-tooth waveform.
√3
Q5 show that delta modulation is a special case of differential pulse code modulation (DPCM).
What is the number of bits per word?
one bit per word.