Digital Electronics

Digital Electronics
Digital electronics deals with the generation, processing and storage of digital signals.

Number systems
There are 4 number systems

1) Decimal number system

2) Binary number system
3) Octal number system
4) Hexa decimal number system

Our syllabus limits us to the first two systems.

Decimal number system :- In this system ten digits (symbols) are used to represent a
number. The digits are 0, 1, 2, 3, 4, 5, 6, 7, 8 and 9. So, the base of this system is 10.

The number 265 in decimal system should be written as (265)10

In this system each digit in the number has a place value.

The place value of the right digit is one unit i.e. (10 )

The place value of the next left digit is 10 units i.e. (10 )

The place value of the next left digit is 100 units i.e. (10 ) ……. so on.

So, the value of a number in this system is the sum of the products of the digits with
its respective powers of 10.

Ex 1:- The value of (2547)10 is 2

10 + 5
10 + 4
10 + 7
10

The left digit or bit is called most significant bit (MSB) and the right digit or bit is
called least significant bit (LSB) in a given number.
We will go through the next example in detail.

Ex 2:- The value of (125.36)10 is 1

10 + 2
10 + 5
10 + 3
10 + 6
10

100
+ 20
This means + 5
+ 0.3
+ 0.06
125.36
1
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

This decimal number system is used in our daily life.

Binary number system :- In this system only two digits (symbols) are used to represent
a number. The digits are 0 and 1. So, the base of this system is 2.

This system is useful to utilize in computers, machines and in electronic circuits because they
can recognize only two states i.e. ON and OFF states. On means 1 and off means 0.

The number 101 in binary system should be written as (101)2

In this system also each digit in the number has a place value.

The place value of the right digit is one unit i.e. (2 )

The place value of the next left digit is 2 units i.e. (2 )

The place value of the next left digit is 4 units i.e. (2 ) ……. so on.

The following table is useful for conversion between decimal and binary systems.

Decimal Binary Decimal Binary

0 0 11 1011
1 1 12 1100
2 10 13 1101
3 11 14 1110
4 100 15 1111
5 101 16 10000
6 110 17 10001
7 111 18 10010
8 1000 19 10011
9 1001 20 10100
10 1010 21 10101

The value of a number in this system is the sum of the products of the digits with its
respective powers of 2.

Ex 1:- The value of (1101)2 is 1

2 + 1
2 + 0
2 + 1
2

In this system also the left digit or bit is called most significant bit (MSB) and the
right digit or bit is called least significant bit (LSB).
The next example in detail is

Ex 2:- The value of (101.01)2 is 1

2 + 0
2 + 1
2 + 0
2 + 1
2
2
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Binary addition
The rules of binary addition are

1) 0+0=0
2) 1+0=1
3) 0+1=1
4) 1 + 1 = 10 (it is two in binary system)
The 4th rule can be written as 1 + 1 = 0 with a carry 1

The above rules can be written as the following truth table.

Truth table
Input Out put
A B Carry Sum
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0

3
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Binary subtraction
The rules of subtraction are

1) 0-0=0
2) 1-0=1
3) 1-1=0
4) 0 - 1 = 1 (i.e. with a borrow
b from the next higher digit or left digit)
digit
th
The 4 rule can be explained as 10 - 1 = 1. It means that when 1 is borrowed
b from
0
the next higher digit it becomes 10 (two) in units (2 ) place.

Binary multiplication
The rules of binary multiplication are

1) 0x0=0
2) 1x0=0
3) 0x1=0
4) 1x1=1

Conversion of integer decimal number into binary

(Successive divisions method)
The decimal number is converted in to binary number by using successive divisions
division method.

1. The decimal number (i.e.

i.e. dividend) is divided by 2 (i.e. divisor).
2. If ‘1’ or “0” occurs as remainder, transfer that ‘1’ or “0” to the binary record.
3. Now take quotient as dividend and divide it by 2 and transfer the remainder to the
binary record.
4. The same procedure is continued until the quotient becomes zero
5. This is called successive divisions method.
6. The last remainder is taken as most significant bit (MSB).
7. The first remainder is taken as least significant bit (LSB).
4

8. The equivalent binary number comprises with all all the remainders in successive
Page

divisions method in the order from MSB (bottom) to LSB (top).

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Conversion of fractional - decimal number into binary

(Double – dabble method)
The fractional decimal number is converted in to binary number by using successive fraction
multiplications method or double-dabble
double method.

1. The fractional decimal number is multiplied with 2 by successive fraction

multiplications method.
2. If ‘1’ or ‘0’ occurs in units place in the product,
pro transfer that ‘1’ or ‘0’ to the binary
record.
3. The multiplication is continued with the remaining fraction.
4. The same procedure is followed in each multiplication.
mu
5. The first transferred number (1 or 0) to binary record is taken as most significant bit
(MSB).
6. The last transferred number (1 or 0) to binary record is taken as least significant bit
(LSB).
7. The equivalent binary number comprises with all the transferred numbers to binary
record in double - dabble method in the order from MSB (top) to LSB (bottom).
8. If the multiplication does not end, it can be stopped at any of our desired level.
5
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Ex : - Convert the fractional decimal number (0.638)10 in to fractional binary number.

Sol :-

So, (0.638)10 = (0.1010001101)

( 2

Note :- If the decimal number includes both integer and fraction parts.
parts Then, split the
number in to integer and fraction, convert them in to binary numbers separately and combine
the binary equivalents.

Ex : - Convert the decimal number (23.6)10 in to binary number.

Sol:-

6
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Conversion of binary to decimal

Conversion of integer binary number in to decimal number
Conversion of integer binary number into decimal number is easy.

Take each digit in the binary number and multiply it with its place value.

The sum of all the above products will give the equivalent decimal number.

Ex :- Convert the binary number (1011)2 into decimal number.

Sol :- (1011)2 = (1
2 ) + ( 0
2 ) + (1
2 ) + (1
2 )
= (1
8) + ( 0
4) + (1
2) + (1
1 )
= 8 + 0 +2 + 1 = 11
So, (1011)2 = (11)10

Conversion of fractional binary number in to decimal number

The same procedure is followed in this case also.
But in this case, for the fraction (after the decimal point) the place value starts with negative
power of 2. This negative power value increases from left to right.
The place value of the first left digit in fraction is (2 )
The place value of the next right digit in fraction is (2 )
The place value of the next right digit in fraction is (2 ) ……. so on.

Ex :- Convert the binary number (0.1101)2 into decimal number.

Sol :- (0.1101)2 = (1
2 ) + ( 1
2 ) + (0
2 ) + (1
2 )
   
= 1
 +  1
 + 0
 + (1
 )

= 1 x 0.5 + 1 x 0.25 + 0 x 0.125 +1 x 0.0625

= 0.5 +0.25 + 0 + 0.0625 = 0.8125
So, (0.1101)2 = (0.8125)10

Note :- If the binary number includes both integer and fraction parts. Then, split the number
in to integer and fraction, convert them in to decimal numbers separately and combine the
decimal equivalents.
7
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Ex :- Convert the binary number (1010.0101)2 into decimal number.

Sol :- Integer part (1010)2 = (1

2 ) + ( 0
2 ) + (1
2 ) + (0
2 )
= (1
8) + ( 0
4) + (1
2) + (0
1 )
= 8 + 0 +2 + 0 = 10
So, (1010)2 = (10)10

Fractional part (0.0101)2 = (0

2 ) + ( 1
2 ) + (0
2 ) + (1
2 )
   
= 0
 +  1
 + 0
 + (1
 )

= 0 x 0.5 + 1 x 0.25 + 0 x 0.125 +1 x 0.0625

= 0 + 0.25 + 0 + 0.0625 = 0.3125
So, (0.0101)2 = (0.3125)10
Combining the Integer and fractional parts
∴ (1010.0101)2 = (10.3125)10

Compliment of binary number

The usual practice in computers is to change the subtraction in to an addition process.
So, the circuits are simplified such that only adder circuits are used for both addition and
subtraction. Compliments are useful for this purpose.
Two types of compliments are there in binary numbers.

1’s compliment :- The 1’s compliment of a binary number is the number obtained after
changing each 0 into 1 and each 1 into 0 in that binary number.

The following table gives the 1’compliments to the binary numbers given against.

Binary 1’s compliment

1100 0011
1010 0101
1110 0001
1001 0110
8
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Subtraction using 1’s compliment method

For doing subtraction by using 1’s compliment method, the following rules are to
be followed.

1) First find the 1’s compliment to the subtrahend ( number to be subtracted).

2) Add this 1’s compliment to the minuend (number ( from which subtraction is to be
done).
3) If there is 1 carry in the last (Left) position (called end around carry or EAC) in the
result,, the carry is removed and it is added to the result. It is the final answer.
4) If there is no carry or EAC in the result after the addition of minuend and 1’s
compliment of subtrahend,
subtrahend then the 1’s compliment of the result with a negative sign
is the final answer.

Ex. 1 :- Subtract (01110)2 from (10011)2 using 1’s compliment method.

Sol:-

Ex. 2 :- Subtract (1110)2 from (1011)

( 2 using 1’s compliment method.

9
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

2’s compliment :- The 2’s compliment of a binary number is the number obtained by
adding 1 to its 1’s compliment.

The following table gives the 2’compliments to the binary numbers given against.

Binary 1’s compliment 2’s compliment

1100 0011 0100
1010 0101 0110
1110 0001 0010
1001 0110 0111

Subtraction using 2’s

’s compliment

For doing subtraction by using 2’s

’s compliment method, the following rules are to
be followed.

1) First find the 2’s compliment to the subtrahend ( number to be subtracted).

2) Add this 2’s compliment to the minuend (number
( from which subtraction is to be
done).
3) Drop the carry 1 in the last (Left) position (called end around carry or EAC) in the
sum.
4) This is the answer and is positive.
5) If there is no carry or EAC in the sum, then find the 2’s compliment to the sum and
put a (-)) sign before it to get the answer.

Ex. 1 :- Subtract (10011)2 from (11010)

( 2 using 2’s compliment method.

10
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Ex.2 :- Subtract (11011)2 from (10010)

( 2 using 2’s compliment method.

Boolean algebra

Boolean algebra differs from both ordinary algebra and binary number system.
system

Boolean algebra also uses the same symbols 0 and 1 as in binary number system.

But Boolean algebra is an algebra of ideas not of numbers.
Boolean algebra uses only three operations.
operations
1) The OR addition operation,
operation represented by + (plus) sign.
2) The AND multiplication operation,
operation represented by . (dot) or x (cross) sign.
3) The NOT operation, represented
repr by a bar over the variable.
The following table gives the truth table for the three operations.

Truth table
OR operation AND operation NOT operation

0+0=0 0.0=0

0+1=1 0.1=0 0 = 1

1+0=1 1.0=0 1 = 0

1+1=1 1 . 1 .= 1
11
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

The general postulates in Boolean algebra can be written as follows.

1) OR laws :-

i. A + 0 = A
ii. A + 1 = 1
iii. A + A = A
iv. A + ̅ = 1

2) AND laws :-

i. A . 0 = 0
ii. A . 1 = A
iii. A . A = A
iv. A . ̅ = 0

3) NOT or complementation laws :

i. 0 = 1
ii. 1 = 0
iii.  =A


De Morgan’s theorems

De Morgan’s theorems are very useful in simplifying complicated logical expressions.

There are two De Morgan’s theorems.

Theorem 1 :-
Statement :- The compliment of the sum of two or more variables is equal to the product of
the compliments of the variables.

i.e.  +  = ̅ .  (1)
Here A & B are the variables.
The theorem can be proved by substituting the permitted values 0 & 1 in place of
variables, A & B in equation (1).

Case 1 :- Substituting A = 0 & B = 0 in eqn. (1)

LHS 
 +  = 
0 + 0 = 0 = 1
RHS ̅ .  = 0 . 0 = 1 . 1 = 1
12

∴ !"# = $"#
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Case 2 :- Substituting A = 0 & B = 1 in eqn. (1)

LHS 
 +  = 
0 + 1 = 1 = 0
RHS ̅ .  = 0 . 1 = 1 . 0 = 0
∴ !"# = $"#
Case 3 :- Substituting A = 1 & B = 0 in eqn. (1)
LHS 
 +  = 
1 + 0 = 1 = 0
RHS ̅ .  = 1 . 0 = 0 . 1 = 0
∴ !"# = $"#
Case 4 :- Substituting A = 1 & B = 1 in eqn. (1)
LHS 
 +  = 
1 + 1 = 1 = 0
RHS ̅ .  = 1 . 1 = 0 . 0 = 0
∴ !"# = $"#
In all the above 4 cases the LHSs are equal to their respective RHSs.
Hence, the theorem is proved.
Theorem 2 :-
Statement :- The compliment of the product of two or more variables is equal to the sum of
the compliments of the variables.

i.e. .  = ̅ +  (2)
Here A & B are the variables.
The theorem can be proved by substituting the permitted values 0 & 1 in place of
variables A & B in equation (2).
Case 1 :- Substituting A = 0 & B = 0 in eqn. (2)
LHS   = 0 = 1
.  = 0.0
RHS ̅ +  = 0 + 0 = 1 . 1 = 1
∴ !"# = $"#
Case 2 :- Substituting A = 0 & B = 1 in eqn. (2)
LHS   = 0 = 1
.  = 0.1
RHS ̅ +  = 0 + 1 = 1 + 0 = 1
∴ !"# = $"#
Case 3 :- Substituting A = 1 & B = 0 in eqn. (2)
LHS   = 0 = 1
.  = 1.0
RHS ̅ +  = 1 + 0 = 0 + 1 = 1
∴ !"# = $"#
Case 4 :- Substituting A = 1 & B = 1 in eqn. (2)
LHS   = 1 = 0
.  = 1.1
RHS ̅ +  = 1 + 1 = 0 + 0 = 0
∴ !"# = $"#
In all the above 4 cases the LHSs are equal to their respective RHSs.
Hence, the theorem is proved.
13
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Digital logic gates

 A logic gate is an electronic circuit and it can make logical
logic decisions.
 The circuit has two or more inputs and has one out put.
 The out put depends on the in puts and it is according to Boolean algebra.
 The general (or) primary logic gates are three.
 They are 1) OR gate 2) AND gate 3) NOT gate

OR gate

The OR gate circuit has
has two or more inputs and has one out put.

The circuit has high out put (1) if any one or more in puts are high (1).

(+) plus Sign is used to show the OR operation.
a. The circuit in Figure -11 is called Voltage mode circuit. This shows a two in put OR
gate, using two diodes D1 & D2.
b. A & B are two in puts given to D1 &
D2 in and Y is the out put voltage
measured across the out put load RL.
c. If the in put given to a diode is high,
its in put is ‘1’ that diode is forward
biased. If the input
put given to the diode
is low, its input
put is ‘0’ that diode is
reverse biased.
d. Similarly, if the out put ‘Y’ is high it is ‘1’& if the out put ‘Y’ is low it is ‘0’

The circuit in Figure - 2 is called current

mode circuit.

In Figure – 2 the in puts A & B are
switches. If the switch
witch is ON the in put is
‘1’ and if the switch is OFF the in put is ‘0’.

The out put ‘Y’ is the bulb. bulb If the bulb
glows the out put is ‘1’. If the bulb does not
glow, the out put is ‘0’.
The circuit symbol used for OR gate is as
shown in Figure – 3.
The in puts given to OR gate and the
corresponding out puts are as per the below
given truth table i.e. as per OR operation.
Truth table
In puts Out put
A B Y=A+B
0 0 0
0 1 1
14

1 0 1
Page

1 1 1

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

AND gate

The AND gate circuit has two or more inputs and has one out put.

The circuit has high out put (1) if all the in puts are high (1).

The circuit has low out put (0) if any one or more of the in puts are low(0).

(.) dot Sign is used to show the AND operation.
a. The circuit in Figure -1 is called Voltage mode
circuit. This shows a two in put AND gate, using two
diodes D1 & D2. The P – terminals of the two diodes
are connected to + ve voltage source through a
resistor.
b. A & B are two in puts given to D1 & D2 in reverse
bias and Y is the out put voltage measured across the
P - terminals of the diodes and the ground terminal..
c. If the in put given to a diode is high, its in put is ‘1’
and that diode is reverse biased, its resistance is high.
If the in put given to the diode is low, its in put is ‘0’
that diode is forward biased,
biased it conducts current and
that diode short circuited and out put is zero.
d. Similarly, if the out put ‘Y’ is high it is ‘1’& if the out put ‘Y’
‘Y’ is low it is ‘0’
Note :- If both (i.e. all) diodes are given high, then only, all the diodes won’t conduct, the
resistance across the out put terminal is high and the voltage is also high.

The circuit in Figure - 2 is called current
mode circuit.

In this figure - 2 the in puts A & B are
switches. If the switch is ON the in put is
‘1’ and if the switch is OFF the in put is
‘0’.

The out put ‘Y’ is the bulb. If the bulb
glows the out put is ‘1’. If the bulb does
not glow, the out put is ‘0’.
The circuit symbol used for AND gate is as
shown in Figure – 3.
The in puts given to AND gate and the
corresponding out puts are as per the below given
truth table i.e. as per AND operation.
Truth table .
In puts Out put
A B Y=A.B
0 0 0
0 1 0
1 0 0
15

1 1 1
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

NOT gate

The NOT gate circuit has one input
and has one out put.

The main purpose of this gate is to
compliment or invert the in put given.

If ‘1’ is given as in put the out put is
‘0’. If ‘0’ is given as the in put the out
put is ‘1’.

Figure – 1 is the voltage mode circuit
of NOT gate.

In this circuit a PNP transistor is
connected in CE mode.
mode The in put is
given to the base. The out put is taken
at the collector terminal.

If the input A is high (1) the transistor short circuited and the out put is low (0).

If the input A is low (0) the transistor has high resistance and the out put is high (1).

 Figure – 2 is the current mode

circuit of NOT gate.
 In this figure - 2 the in put A
is a switch.. If the switch is ON
the in put is ‘1’,, then the
current passes through the
switch and no current through
the bulb. The bulb won’t glow
and the out put is ‘0’.
 If the switch is OFF the in put
is ‘0’,, then the current won’t pass through the switch and the current passes through
the bulb. The bulb glows
glow and the out put is ‘1’..
The circuit symbol used for NOT gate is as shown in Figure – 3.

The in puts given to NOT gate and the

corresponding out puts are as per the below
given truth table i.e. as per NOT operation.
Truth table
In put Out put
A Y = ̅
0 1
1 0
16
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

NOR gate

The series combination of an OR gate and a NOT gate is called NOT-OR
NOT gate (or)
NOR gate.

The Boolean expression for NOR gate is ' = 
 +  . This means that the OR sum
of the in puts is inverted or complimented.

The following figure is the series combination of OR gate & NOT gate. The resultant
gives NOR gate.

The truth table for the NOR gate is as given below

Truth table
In put Out put
OR gate out put NOR gate out put
A B
X=A+B ' = 
 + 
0 0 0 1
0 1 1 0
1 0 1 0
1 1 1 0

NOR gate is a universal gate

NOR gate is a universal gate because NOR gate can create any of the three basic
functions of OR, AND & NOT gates.

As NOT gate

If the two in puts of NOR gate is tied together , the out put becomes   , as per the De
Morgan’s theorem. %. &. ' 
' =   Then it works as NOT gate.
+  = 
17
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

As OR gate

If two NOR gates are connected in series as shown below, the out put becomes ( + )

((((((((
%. &. ' =  +  =  +  Then it works as OR gate.

As AND gate

If three NOR gates are connected as shown below, the out put becomes (. ) as
per De Morgan’s theorems.


%. &. ' =  ̅ + 
 = ̿ . ( = .  . Then it works as AND gate.

NAND gate

The series combination of an AND gate and a NOT gate is called NOT- NOT AND gate
(or) NAND gate.

The Boolean expression for NAND gate is ' = .  . This means that the AND
product of the in puts is inverted or complimented.

The following are the circuit symbols of AND gate, NOT gate. Their series
combination gives NAND gate.
18
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

The truth table for the NAND gate is as given below

Truth table
In put Out put
AND gate out put NAND gate out put
A B
X=A.B ' = 
.  
0 0 0 1
0 1 0 1
1 0 0 1
1 1 1 0

NAND gate is a universal gate

NAND gate is a universal gate because NAND gate can create any of the three basic
functions of OR, AND & NOT gates.

As NOT gate

If the two in puts of NAND gate is tied together then as per the De Morgan’s
theorem, the out put becomes  
 %. &. ' = .  . Then it works as NOT gate.
 = 

As AND gate
series as shown below, the out put becomes (. )
If two NAND gates are connected in series

(((((
%. &. ' = .  = .  Then it works as AND gate.

19
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

As OR gate
If three NAND gates are connected as shown below, the out put becomes ( + )
as per De Morgan’s theorem..

 . 
%. &. ' =   = ̿ + ( =  +  Then it works as OR gate.

Exclusive OR gate (or) XOR gate

The exclusive OR gate is a specially special designed OR gate. It has only two in puts and
one out put.

This gate has high (1) out put when the in puts are high (1) and low (0) i.e. when the
in puts are different.

This gate has low (0)) out put when the two in puts are equal. i.e. either the two in puts
are 0s or 1s.

Exclusive OR gate is also called as XOR gate.

XOR gate is useful in binary addition not in Boolean addition.

The XOR addition is also called mod -2 addition.

The symbol used for this addition is ⊕ .
The Boolean expression for XOR addition is [ Y = A ⊕ B ]
' = ( + ). ( . 
)
 (1)

' = ( + ). (  +  )  (2) as per De Morgan’s theorem.

%. &. ' = (.  + .  
  + .  + .  ) 
 
' = .  + .  (3)  = .. 
∵ .   =0
All the above three equations (1), (2) & (3) represent the Boolean expressions for
XOR gate. The equivalent gate circuits give the XOR operation.

The figure - 1 is XOR gate circuit to the eqn. (3).

20
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

The circuit symbol for XOR gate is shown in figure – 2.

The truth table for the XOR gate is as given below

Truth table
In put Out put
A B 
.   . B
 ' = .   . B
 + 
0 0 0 0 0
0 1 0 1 1
1 0 1 0 1
1 1 0 0 0

Half – adder
 The half – adder adds two binary digits at a time and produces a 2-
2 bit out put data
1) Sum 2) carry.
 This addition is binary addition.
 This adder is called half – adder because it can not accept carry from the previous
addition.

The truth table below shows the operation of half – adder (Binary addition).

As per the given in puts the out put,

put carry (C) Truth table – half-adder
half
column, satisfies AND operation. In put Out put

For the same in puts the out put, put sum (S) A B Carry Sum
column, satisfies XOR operation. (C) (S)
The Boolean expressions for half-adder
half are 0 0 0 0
Carry (C) = A.B 0 1 0 1
Sum (S) = A⊕B 1 0 0 1
1 1 1 0
So, the half adder is made with a AND gate & a XOR gate. Such that the out put of
AND gate is carry (C) & the out put of XOR gate is sum (S).

Figure – a is the circuit diagram of half – adder and Figure – b is its circuit symbol.
21
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250

 Digital Electronics

Full-adder
 The full – adder adds three
t binary digits at a time and produces a 2-
2 bit out put data
1) Sum 2) carry.
 This adder can accept a carry from the previous addition.
 The full-adder
adder can be made by connecting two half adders and an OR gate as shown
in Figure – A and Figure – B. Figure – C is the circuit symbol of full – adder.
 1st two digits are given to 1st half adder (HA-1)
(HA as in puts.
st
 The out put of the 1 halfha – adder (HA-1) consists of a sum and a carry. This sum and
the 3 digit are given to the 2nd half – adder (HA-2) as in puts.
rd

 The 2nd half – adder has also two out puts,

puts, a carry and a sum. This sum is the final
sum (S) of the full – adder.
 The two carry’s of 1st & 2nd half adders are given to an OR gate as in puts. The out put
of this OR gate is the final carry (Co) of the full – adder.

The truth table shown below, gives the operation of full – adder

Truth table – full-adder

In put Out put
A B C Carry (Co) Sum (S)
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
1 0 0 0 1
0 1 1 1 0
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

22
Page

P. S. Brahmachary M.Sc., M.Phil. Ph. No. 9492512250