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RXD
REF_SCH TOP LEVEL RF IQ
RxD FEM
micro SD MSDC 4-bit
MSDC1 BSI ctrl
+ hot-plug
MT6169 RX
GPIOs
MSDC2 ABB (LWG+LTG) Main 1 ANT
TX FEM
26M_BB
Side key VTCXO
Keypad CLK Ctrl 26M
JTAG
26M_AUD
Debug JTAG / 26M_NFC
UART
port UART0 & 3
+-LED
KTD3116 LCD LCD IF LCD
BackLight Driver module (MIPI DSI)
KTD2151 +-5V
Camera IF
Bias Driver Camera
I2C Camera I2C_0
Modules I2C
(MIPI CSI) 4-Phase buck
I2C
VDVFS1 MT6312 I2C-1
VGPU/
LDOs RTC
Vibrator
32K
VIB
VCORE1-2/
FIGURE PRINT Module
SIM1(Mirco)
SIM1
SPI
SIM1
(POP) VIO18
Bucks
Headset
(HPL, HPR, AU_VIN1)
AU_VIN0
SD/PCM IF
MSDC3/PCM
BC 1.1 BC1.1
MT6332
VDVFS2/ VPA /
MT6630 CONN ctrl VDRAM
Buck Buck
VRF18
TCXO GPIO / UARTs
VSYS
I2S3 VSYS
Charger /
DPI PP Battery
USB
USB 2.0
6 5 4 3 2 1
REVISION RECORD
D D
U1001-E
C C
MT6795-MWFPOP-852P
VCCK DVFS1
[6] VCORE1_PMU VCORE1_PMU J18 DVDD_CORE1 DVDD_DVFS1 U8 DVDD_DVFS1
DVDD_DVFS1 [2,9]
J19 DVDD_CORE1 DVDD_DVFS1 U9
J20 DVDD_CORE1 DVDD_DVFS1 U10
J21 U11 C1001 47uF
DVDD_CORE1 DVDD_DVFS1 C1002
J22 DVDD_CORE1 DVDD_DVFS1 U12 47uF
K18 U13 C1003 47uF
DVDD_CORE1 DVDD_DVFS1
K26 V10 C1026 47uF
C1004 DVDD_CORE1 DVDD_DVFS1
22uF K27 V11
22uF DVDD_CORE1 DVDD_DVFS1 C1006
C1005 L18 V12 22uF
22uF DVDD_CORE1 DVDD_DVFS1
C1007 L27 DVDD_CORE1 DVDD_DVFS1 V13
22uF
M18 W9
C1027
DVDD_CORE1 DVDD_DVFS1 C1028
M27 W10 2.2uF
DVDD_CORE1 DVDD_DVFS1 C1009
N27 W11 2.2uF
DVDD_CORE1 DVDD_DVFS1
P27 DVDD_CORE1 DVDD_DVFS1 W12
C1010 2.2uF R27 W13
C1011 DVDD_CORE1 DVDD_DVFS1
2.2uF T10 W14
C1012 DVDD_CORE1 DVDD_DVFS1 [9]
2.2uF T11 Y10 DVDD_DVFS_1_PMIC_FB
T22
DVDD_CORE1 DVDD_DVFS1
Y13
Note: 10-2
DVDD_CORE1 DVDD_DVFS1 DVDD_DVFS1_GND [9]
T23 DVDD_CORE1 DVDD_DVFS1 Y14
C1013
100nF100nF100nF100nF100nF
100nF100nF100nF100nF100nF
C1016
100nF100nF100nF100nF100nF100nF100nF100nF100nF100nF
U22 AA13 SH1001 NC SH1002 NC
DVDD_CORE1 DVDD_DVFS1 0201 0201
C1017
C1018
100nF100nF100nF100nF100nF100nF100nF100nF100nF100nF
U23 DVDD_CORE1 DVDD_DVFS1 AA17
C1019
C1020
U24 DVDD_CORE1 DVDD_DVFS1 AA19
C1021
C1022
V23 DVDD_CORE1 DVDD_DVFS1 AB10
C1030
C1031
V24 DVDD_CORE1 DVDD_DVFS1 AB11
C1023
C1032
W23 DVDD_CORE1 DVDD_DVFS1 AB13
C1024
C1033
W24 DVDD_CORE1 DVDD_DVFS1 AB14
C1025
C1034
Y23 DVDD_CORE1 DVDD_DVFS1 AB17
C1035
Y24 DVDD_CORE1 DVDD_DVFS1 AB18
C1036
Y25 DVDD_CORE1 DVDD_DVFS1 AB19
C1038
Y26 DVDD_CORE1 DVDD_DVFS1 AB20
C1040
AA23 DVDD_CORE1 DVDD_DVFS1 AB21
C1042
AA24 DVDD_CORE1 DVDD_DVFS1 AC9
C1044
AB23 DVDD_CORE1 DVDD_DVFS1 AC10
C1046
AB24 DVDD_CORE1 DVDD_DVFS1 AC11
C1048
AB25 DVDD_CORE1 DVDD_DVFS1 AC12
C1050
AB26 DVDD_CORE1 DVDD_DVFS1 AC13
C1052
AC23 DVDD_CORE1 DVDD_DVFS1 AC14
C1054
AC24 DVDD_CORE1 DVDD_DVFS1 AC17
C1056
AD23 DVDD_CORE1 DVDD_DVFS1 AC19
AD24 DVDD_CORE1 DVDD_DVFS1 AC20
AD25 DVDD_CORE1 DVDD_DVFS1 AC21
AD26 DVDD_CORE1 DVDD_DVFS1 AD11
AD27 DVDD_CORE1 DVDD_DVFS1 AD12
AE8 DVDD_CORE1 DVDD_DVFS1 AD15
AE9 AD16 GND
DVDD_CORE1 DVDD_DVFS1
AE10 DVDD_CORE1 DVDD_DVFS1 AD17 DVDD_DVFS1
AE11 DVDD_CORE1 DVDD_DVFS1 AD19
AE22 DVDD_CORE1 DVDD_DVFS1 AD20 DVDD_DVFS1 [2,9]
AE23 DVDD_CORE1
AE24 DVDD_CORE1 DVDD_MD [7]
AF11 DVDD_CORE1
AF12 DVDD_CORE1
AF13 DVDD_CORE1 DVDD_MD_PMIC_FB [7]
AF14 DVDD_CORE1 Note: 10-3
GND AF15 [7]
DVDD_CORE1 DVDD_MD_GND
AF16 DVDD_CORE1 MD
AF17 DVDD_CORE1
AF18 DVDD_CORE1 DVDD_MD K21
AF19 K22 SH1003 NC SH1004 NC
DVDD_CORE1 DVDD_MD 0201 0201
AF20 DVDD_CORE1 DVDD_MD L22
AF21 DVDD_CORE1 DVDD_MD L23
AF22 DVDD_CORE1 DVDD_MD M21
AF23 M22 C1065 22uF
Note: 10-1 AF24
DVDD_CORE1 DVDD_MD
M23 C1066 10uF
DVDD_CORE1 DVDD_MD
AF25 DVDD_CORE1 DVDD_MD N22
AG11 DVDD_CORE1 DVDD_MD N23
C1069
100nF100nF
100nF100nF
0R
VDD1 SRAM DVDD_SRAM1 R1002
0402 VSRAM_VDVFS2_PMU [7]
C1080 C1076
C1081 C1078
100nF 100nF
GND
VDDQ GPU
A7 VDDQ DVDD_GPU J8
VDRAM_PMIC_FB A10 VDDQ DVDD_GPU J9
[7] A13 J10
A16
VDDQ DVDD_GPU
J11
Note: 10-5
[7] DVDD_DRAM_GND Note: 10-4 A19
VDDQ DVDD_GPU
J13
VDDQ DVDD_GPU DVDD_GPU_PMIC_FB [6]
A23 VDDQ DVDD_GPU J15
A26 VDDQ DVDD_GPU K11 DVDD_GPU_GND [6]
SH1006 NC SH1007 NC A32 K13
0201 0201 VDDQ DVDD_GPU
B3 VDDQ DVDD_GPU K15
C1082
C1 VDDQ DVDD_GPU L8
C1084
C1083 22uF
J1 VDDQ DVDD_GPU L10
C1088
100nF100nF100nF100nF100nF100nF
C1096
100nF100nF100nF
C1098
100nF100nF100nF
C1150
C1152
C1154
C1156
AP17 VDDQ
C1160
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 2OF 23
6 5 4 3 2 1
REVISION RECORD
D D
U1001-G U1001-F
MT6795-MWFPOP-852P MT6795-MWFPOP-852P
6mil [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
GND GND [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU PERI_D AVDD & MD_A
A14 DVSS DVSS V8 D32 VCC28IO_BPI AVDD18_PLLGP U32 6mil VIO18_PMU
A28 DVSS DVSS V9
A31 DVSS DVSS V14 G1 VCC28_EMD
B2 DVSS DVSS V17
B10 DVSS DVSS V18 AVDD18_MD R31 6mil
B33 DVSS DVSS V19 AVDD18_MD R32
C7 DVSS DVSS V20 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 6mil F32 VCC18IO_BPI
C12 V21 C1101 C1102
DVSS DVSS
C17 V22 AM33
C C20
D11
DVSS
DVSS
DVSS
DVSS V25
V26 N32
VCC18IO_MD1
AVDD18_AP V32
100nF 2.2uF
Note: 11-1 C
DVSS DVSS VCC18IO_BPI_1 [6,10]
D25 DVSS DVSS V27 R33, W31,W32PIN connect to C1101 GND first, Then Connect to MAIN GND
E15 DVSS DVSS W17 AM34 VCC18IO_BPI_2
E30 W18 Y33 GND 6mil GND VTCXO_0_PMU
DVSS DVSS AVDD28_DAC
F26 DVSS DVSS W19
G3 DVSS DVSS W20
G32 W21 C1103
DVSS DVSS
H6 DVSS DVSS W22 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 6mil AC7 VCC18IO_1
J12 DVSS DVSS W25
J14 DVSS DVSS W26 100nF
J16 DVSS DVSS W27 K1 VCC18IO AVSS18_PLLGP P33
J17 DVSS DVSS Y3 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 6mil N6 VCC18IO AVSS18_MD R33
J23 Y9 W31 GND
DVSS DVSS AVSS18_MD
J34 DVSS DVSS Y11 H3 VCC18IO_EINT AVSS18_MD W32
K8 Y12 C1104
DVSS DVSS
K9 DVSS DVSS Y16
K10 DVSS DVSS Y17 F13 VCC18IO_CONN
K12 DVSS DVSS Y18 100nF
K14 DVSS DVSS Y19
K16 DVSS DVSS Y20
K17 Y21 GND
DVSS DVSS [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
K19 DVSS DVSS Y22 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 12mil W5 VCC18IO_MC0 PLL
K20 DVSS DVSS Y27
K23 DVSS DVSS AA11 Note: 11-5 AVDD18_ARMPLL W15 6mil VIO18_PMU
K24 DVSS DVSS AA12 R3 VCC18IO_MC1
M4 DVSS DVSS AA14
L5 DVSS DVSS AA16 [6] VMC_PMU 12mil N1 VCC33IO_MC1 AVDD18_MEMPLLPOP AG26 6mil
L17 DVSS DVSS AA18
L19 DVSS DVSS AA20 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] AVDD18_MEMPLL_A D34 6mil
L20 DVSS DVSS AA21 VIO18_PMU 12mil AP25 VCC18IO_MC2
L21 DVSS DVSS AA22 AVDD18_MEMPLL_B AK1 6mil
L24 DVSS DVSS AA25 AM26 VCC33IO_MC2
L25 AA26 C1108 C1109 C1110
DVSS DVSS
L26 DVSS DVSS AA27
M8 AA33 C11 C1105 C1106 C1107
DVSS DVSS VCC18IO_MC3
M9 DVSS DVSS AB9 100nF 1.0uF 100nF AVSS18_ARMPLL W16
M10 DVSS DVSS AB12 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] AVSS18_MEMPLLPOP AG27
M17 DVSS DVSS AB16 AVSS18_MEMPLL_A C33 100nF 100nF 1.0uF
M19 AB22 VIO18_PMU GND GND GND 12mil AC5 AL2
DVSS DVSS VCC18IO_DPI AVSS18_MEMPLL_B
M20 DVSS DVSS AB27
M24 DVSS DVSS AC6 AF5 VCC18IO_I2S
M25 AC15 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] GND GND GND
DVSS DVSS
M26 DVSS DVSS AC16 VIO18_PMU 6mil AM10 VCC18IO_UART
N8 DVSS DVSS AC18
N9 AC22 GND
DVSS DVSS
N10 DVSS DVSS AC25
N13 DVSS DVSS AC26 Note: 11-4
N14 DVSS DVSS AC27 AM5 VCC18IO_SIM
N15 DVSS DVSS AD1 AM6 VCC18IO_SIM
N16 AD9 GND
DVSS DVSS
N17 DVSS DVSS AD10
N18 AD13 [6,23] VSIM1_PMU AK8
DVSS DVSS VCC33IO_SIM1
N19 DVSS DVSS AD14
N20 DVSS DVSS AD18 VSIM2_PMU AK5 VCC33IO_SIM2
N21 AD21 [6,23]
DVSS DVSS
N26 DVSS DVSS AD22
N33 DVSS DVSS AE12
N34 DVSS DVSS AE13
P6 DVSS DVSS AE14
P8 DVSS DVSS AE15 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
P9 DVSS DVSS AE16
P10 DVSS DVSS AE17
P11 DVSS DVSS AE18 VIO18_PMU 6mil E26 VCC18IO_CMR
P12 DVSS DVSS AE21
P13 DVSS DVSS AE25
P14 DVSS DVSS AE26
P15 DVSS DVSS AE27 Note: 11-2
P16 DVSS DVSS AF26
P17 DVSS DVSS AF27
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
PERI_A / MIPI
P18 DVSS DVSS AF33
P19 DVSS DVSS AG5 VIO18_PMU AN23 AVDD18_MIPITX1
P20 DVSS DVSS AG10 6mil AN19 AVDD18_MIPITX2
P24 DVSS DVSS AG14
P25 DVSS DVSS AG16 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
P26 AG17 VIO18_PMU 6mil C16
DVSS DVSS AVDD18_MIPIRX0
R8 DVSS DVSS AG19 E20 AVDD18_MIPIRX1
R9 DVSS DVSS AG20 E25 AVDD18_MIPIRX2
R10 AG21 C1111 C1112
DVSS DVSS
R11 DVSS DVSS AG22
R12 DVSS DVSS AG23 PIN C23,F19,F24 connect to C1111 GND first,Then connect to MGND
R13 AG24 1.0uF 1.0uF AK23
B R14
R15
DVSS
DVSS
DVSS
DVSS AH10
AH12
AP18
AVSS18_MIPITX
AVSS18_MIPITX B
DVSS DVSS GND
R16 DVSS DVSS AH14 [6] VUSB10_PMU C23 AVSS18_MIPIRX
R17 DVSS DVSS AH16 E19 AVSS18_MIPIRX
R18 AH17 GND E24
DVSS DVSS C1113 AVSS18_MIPIRX
R19 DVSS DVSS AH24
R20 DVSS DVSS AJ24
R21 DVSS DVSS AK6
1.0uF
PERI_A / USB
R26 DVSS DVSS AK29
T8 DVSS DVSS AK30 6mil B9 AVDD10_SSUSB
T9 DVSS DVSS AL3 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
T12 AL7 GND 6mil A8
DVSS DVSS VIO18_PMU AVDD18_SSUSB
T13 DVSS DVSS AL34
T14 DVSS DVSS AM7
T15 DVSS DVSS AM9 F7 AVDD18_USB_P0
T16 DVSS DVSS AM14
T17 DVSS DVSS AM17 [7] VUSB33_PMU 6mil C6 AVDD33_USB_P0
T18 DVSS DVSS AM20
T19 DVSS DVSS AM23
T20 DVSS DVSS AM27 C5 AVDD18_USB_P1
T21 DVSS DVSS AM30
T25 DVSS DVSS AN2 6mil B4 AVDD33_USB_P1
T26 DVSS DVSS AN9
U6 DVSS DVSS AP5
U14 DVSS
U15 DVSS Note: 11-3
U16 C1114 C1115
DVSS
U17 DVSS
U18 DVSS E9 AVSS10_SSUSB
U19 DVSS 1.0uF 1.0uF E10 AVSS10_SSUSB
U20 GND B7
DVSS AVSS33_USB_P0
U21 DVSS C4 AVSS33_USB_P1
U25 DVSS
U26 GND GND
DVSS
U27 DVSS
GND
GND
Schematic design notice of "11_BB_POWER" page.
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 3OF 23
6 5 4 3 2 1
REVISION RECORD
D D
U1001-A U1001-B
TP18
MT6795-MWFPOP-852P MT6795-MWFPOP-852P
PMU_IF DRAM_IF SIM ABB_IF
[6] H2 AN14 R1201 240R 1% [23] SIM1_SCLK_6795 AN7 W28
SYSRSTB SYSRSTB ZQ0_A 0201 SIM1_SCLK TDX26M_IN
AN13 R1202 240R 1% [23] SIM1_SIO_6795 AN8
ZQ1_A 0201 SIM1_SIO
[6,7,9] WATCHDOG G4 WATCHDOG [23] SIM1_SRST_6795 AP8 SIM1_SRST
AG33 R1203 240R 1% AH4 V34
ZQ0_B 0201 INT_SIM1 INT_SIM1 TD_TX_BBIP
AH33 R1204 240R 1% [23] SIM2_SCLK_6795
[23] AL6 W33
ZQ1_B 0201 SIM2_SCLK TD_TX_BBIN
[6,7,9,10] ENBB_6169 H5 SRCLKENA0 [23] SIM2_SIO_6795 AN6 SIM2_SIO
[23] SIM2_SRST_6795 AL5 SIM2_SRST TD_TX_BBQP V33
C [6,7] SRCLKENA1 J2 SRCLKENA1 EXTDN_A J29 R1205
0201
240R 1%
INT_SIM2
[23]
AH3 INT_SIM2 TD_TX_BBQN U33
C
Note: 12-4 J5 SRCLKENAI GND
BPI - W/G TD_RX_BBIP R30
TD_RX_BBIN P30
[9] R1207 0R H4 H31
EXT_4P_PMU_EN 0201 SRCLKENAI2 BPI_OUT14
TD_RX_BBQP M30
VDRAM_PMU G31 BPI_OUT13 TD_RX_BBQN N30
[6,7] RTC32K1V8 K5 RTC32K_CK
H33 BPI_OUT12
C1202
100nF
L3 AH27 C1201 10uF [19] LCM_ID0 G33
[6,7] PWRAP_SPI0_CSN PWRAP_SPI0_CSN DDRVPOP BPI_OUT11
[6,7] PWRAP_SPI0_CK M5 PWRAP_SPI0_CK DDRVPOP AH28 Note: 12-2 [19] LCM_ID1
[6,7] PWRAP_SPI0_MO N5 PWRAP_SPI0_MO DDRVPOP AH29 G34 BPI_OUT10
[6,7] PWRAP_SPI0_MI M6 PWRAP_SPI0_MI C1204
10uF
100nF100nF
H24 C1203 F34 Y31
DDRV_A BPI_BUS9 APC APC1 [12]
[6] AUD_CLK_MOSI M3 AUD_CLK_MOSI DDRV_A H26
C1205
[6] AUD_DAT_MOSI_1 L2 AUD_DAT_MOSI DDRV_A H28 [12] BPI_BUS8 F33 BPI_BUS8 APC2 Y32
[6] AUD_DAT_MISO_1 M2 AUD_DAT_MISO DDRV_A J24
DDRV_A J26 [13] BPI_BUS7 E33 BPI_BUS7
[6] AUD_DAT_MOSI_2 K4 ANC_DAT_OUT DDRV_A J28
L4 ANC_DAT_IN D33 BPI_BUS6
C1207
AUD_DAT_MISO_2
100nF100nF100nF
DDRV_B AJ9
DDRV_B AJ10 D31 BPI_BUS3
PLLs Test Pin DDRV_B AJ11 LTEX26M_IN AA28 LTE_LTEX26M_IN [10]
C32 BPI_BUS2
GND C31 AE30 RF_TX_BBIP [10]
BPI_BUS1 LTE_TX_BBIP
V15 TP_ARMPLL LTE_TX_BBIN AD30 RF_TX_BBIN [10]
V16 TN_ARMPLL B31 BPI_BUS0
LTE_TX_BBQP AB30 RF_TX_BBQP [10]
LTE_TX_BBQN AC30 RF_TX_BBQN [10]
RFI_C
AP33 TP_MEMPLLPOP [10] LTE_RFIC0_BSI_EN M33 RFIC0_BSI_EN
AN34 TN_MEMPLLPOP LTE_RX1_BBIP AD34 RF_RX1_BBIP [10]
[10] LTE_RFIC0_BSI_CK L32 RFIC0_BSI_CK LTE_RX1_BBIN AD33 RF_RX1_BBIN [10]
K32 RFIC1_BSI_EN
ET_P AG31
J33 RFIC1_BSI_CK ET_N AG32
A A
Schematic design notice of "11_BB_11" page.
Note 12-1: Apply 1.8V to DVDD18_EFUSE (AK24) for eFuse programming.
COMPANY:
Note 12-3: The de-coupling cap. of DRAM VREF have to be placed as close to <Company Name>
BB as possible.
TITLE:
Note 12-4: SRCLKENAI2 features watch dog reset output to reset 4-phase buck. DRAWN: DATED:
<Title>
R1207 BOM option: R1207 = 0R when BOM option of U2401 is DA9210. <Drawn By> <Drawn Date>
R1207 = NC when BOM option of U2401 is 2nd source. CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 4OF 23
6 5 4 3 2 1
REVISION RECORD
D D
U1001-C U1001-D
MT6795-MWFPOP-852P MT6795-MWFPOP-852P
CSI DSI USB MSDCs
C [20] RCP C19
C18
RCP TCP AL21
AL20
TCP [19]
[22]
[22]
USB_DP_P0 B6
B5
USB_DP_P0 MSDC0_RST_ T2 MSDC0_RST_ [14]
C
[20] RCN RCN TCN TCN [19] USB_DM_P0 USB_DM_P0
MSDC0_CMD U5 MSDC0_CMD [14]
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
B17 AM22 TDP0 [19] VIO18_PMU G10 W3 [14]
[20] RDP0 RDP0 TDP0 SSUSB_TXP MSDC0_CLK MSDC0_CLK
4.7K
A17 AM21 TDN0 [19] F10 U2
[20] RDN0 RDN0 TDN0 SSUSB_TXN MSDC0_DSL MSDC0_DSL [14]
0201
[20] RDP1 B18 RDP1 TDP1 AN22 TDP1 D9 SSUSB_RXP MSDC0_DAT6 Y2 MSDC0_DAT6
B19 AP22 TDN1 [19] D10 V1 MSDC0_DAT5
[20] RDN1 RDN1 TDN1 SSUSB_RXN MSDC0_DAT5
R1316
MSDC0_DAT4 V4 MSDC0_DAT4
MSDC0_DAT3 V5 MSDC0_DAT3
D16 AN21 TDP2 [19] W2 MSDC0_DAT2
[20] RDP2 RDP2 TDP2 MSDC0_DAT2
RDN2 D17 RDN2 TDN2 AN20 TDN2 [22] USB_ID A4 USB_DP_P1 MSDC0_DAT1 V2 MSDC0_DAT1
[20] [19] A5 USB_DM_P1 MSDC0_DAT0 W4 MSDC0_DAT0
MSDC1_CLK P5
SSUSB_VRT MSDC1_CLK
B21 RCP_A TCP_A AL16 B8 SSUSB_VRT
B22 RCN_A TCN_A AL15 MSDC1_DAT3 N2 MSDC1_DAT3
R1301
USB_VRT_P1 D5 USB_VRT_P1 MSDC1_DAT2 P4 MSDC1_DAT2
MSDC1_DAT1 P2 MSDC1_DAT1
R1302
C21 RDP0_A TDP0_A AL19 D4 IDDIG MSDC1_DAT0 R4 MSDC1_DAT0
0201
C22 RDN0_A TDN0_A AL18
GND Note: 13-2
0201
BC AL23
5.1K
MSDC2_CMD ACCL_INT1_N_GPIO105 [21]
D21 RDP1_A TDP1_A AN16
D20 AN17 D6 AN24 GYRO_INT2_N_GPIO104 [21]
5.1K
RDN1_A TDN1_A CHD_DP_P0 MSDC2_CLK
GND D7 AL24 GPIO103
CHD_DM_P0 MSDC2_DAT3 GPIO103 [9]
A20 RDP2_A TDP2_A AM16 MSDC2_DAT2 AN25 GPIO102_RST [19]
GND GPIO101 GPIO102_RST
B20 RDN2_A TDN2_A AM15 [7] CHD_DP_P0 MSDC2_DAT1 AK25 [16]
GPIO100 GPIO101
MSDC2_DAT0 AK26 [16]
[7] CHD_DM_P0 GPIO100
E22 RDP3_A TDP3_A AN15
D23 RDN3_A TDN3_A AP15 KEYPAD CONN_IF
[7] DRV_VBUS AN3 KPROW2 MSDC3_CMD B12 MSDC3_CMD [16]
LCM_RST AL14 LCM_RST [19] AL4 KPROW1
[20] RCP_B B25 RCP_B AM4 KPROW0 MSDC3_CLK E12
[23] KPROW0 MSDC3_CLK [16]
[20] RCN_B A25 RCN_B DSI_TE AK14 DSI_TE [19]
AJ5 KPCOL2 MSDC3_DAT3 D12 MSDC3_DAT3
[16] GPIO123 AK4 A11 MSDC3_DAT2
KPCOL1 MSDC3_DAT2
[20] RDP0_B B24 RDP0_B [23] KPCOL0 AM2 KPCOL0 MSDC3_DAT1 B11 MSDC3_DAT1
B23 AK22 MIPI_VRT F12 MSDC3_DAT0
[20] RDN0_B RDN0_B VRT MSDC3_DAT0
[5,6,20]
AL17 MIPI_VRT_A VCAM_IO_1P8V R1321 NC C15 [16]
VRT_A 0201 DAISYNC DAISYNC
4.7K
R1304
R1306
[20] RDP1_B C24 RDP1_B VIO18_PMU R1303 DAICLK D15 DAICLK [16]
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] 0201 4.7K
[20] RDN1_B C25 RDN1_B R1305 DAIPCMOUT B15 DAIPCMOUT [16]
0201
[5,6,20] VCAM_IO_1P8V R1322
0201
NC I2C DAIPCMIN D14 DAIPCMIN [16]
0201
0201
1.5K
DPI_D10 AB4
[8,15,20,21] SENS_SDA3
AE5
SCL3
SDA3
(For Misc.) EINT15
EINT14
B28
B27
GPIO15_SCAM_PWDN
EINT14_INT [15]
[20]
EINT2 F2 [7]
FUEL_SCL4
AN5 URXD3 EINT1 G2 [7]
FUEL_SDA4
AN4 UTXD3 EINT0 G5
BAT_AP_ID
4.7K_NC R1318
0201 VIO18_PMU [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
A A
COMPANY:
<Company Name>
Schematic design notice of "12_BB_2" page.
TITLE:
Note 13-1: Connect USB_VBUS_P0 (C8 ball) pin to GND since USB OTG <Title>
"B-Valid" detection has implemented by MT6332's ADC. DRAWN: DATED:
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
Note 13-2: GPIO103 is dedicated for DA9210 4-phase buck control. <Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 5OF 23
6 5 4 3 2 1
REVISION RECORD
D D
U2001-A
LESD11LH5.0CT5G
MT6331P/A
ESD2001
4 mil GND trace with
VDVFS11 R10 good shielding.
[23] HOME_KEY A8 HOMEKEY
VDVFS11_FB K8 VCORE1_PMU_FB
VCORE1_PMU_FB [2]
[4] SYSRSTB D5 RESETB
WATCHDOG C9 WDTRSTB_IN
[4,7,9]
VDVFS12 P8
[4,7,9,10] D8 R8 PL2002 0.47uH 1.05 2A (0.7-1.31/6.25mV)
ENBB_6169 SRCLKEN_IN1 VDVFS12
[4,7] SRCLKENA1 F8 SRCLKEN_IN2
VDVFS12_FB K7 VSYS [6,7,8,9,15,18,19,20,21,22]
C2003
25mil N13 VBAT_VCORE2 VIO18 P1
20mil VIO18 P2
M3 VBAT_SMPS
VIO18_FB M5
4.7uF
20mil M1 VBAT_VIO18
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 20mil M2 VBAT_VIO18
6mil N2 VBAT_VIO18
A4 VBAT_LDO1
FBB VDD_VFBB L1
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU A1 GND
VBAT_LDO2
B1 VBAT_LDO2 VFBB L3
C1 VBAT_LDO3 VDD_VFBB_SNS K3 VTCXO_2 reserved for SGLTE RF.
E2 VBAT_LDO4
F1 VBAT_LDO4
F2 VBAT_LDO4
LDO OUTPUT VTCXO_2_PMU L/W = 2800/6
2.8V 40mA
C2011
C2012
C2017
C2010
C2013
C2008
C2014
4.7uF
E1 1.2/1.3/1.5.1.8/2.0/2.8/3.0/3.3
1.0uF
1.0uF
1.0uF
L/W = 2800/8
1.0uF
2.2uF
A2 L/W = 2800/10
[10]
Audio
MT6169_XO4_CLK H10
MT6331P/A
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 6OF 23
6 5 4 3 2 1
REVISION RECORD
D D
U2101
MT6332P/B C2140
GND_SBST B3
PWRAP_SPI0_MO F3 SPI_MOSI GND_SBST B4
A3 C2102 [4,6]
VIN
A4 VIN PWRAP_SPI0_MI G4 SPI_MISO
[4,6] R2102 0R
4.7uF
GND G5 FSOURCE
VDVFS2_FB
GND_VDVFS2_FB E9 DVDD_MD_GND
DVDD_MD_GND
[2]
[2]
LESD11LH5.0CT5G
PMU_FSOURCE high(DVDD18_DIG)-> EFUSE program
VBAT INPUT VPA E12
20mil C10 E13 VPA_SW PL2105 2.2uH 40mil VPA_PMU [11]
VBAT_VDRAM VPA
C11 VBAT_VDRAM
[6,7,8,9,15,18,19,20,21,22]
VPA_FB H10
VSYS 75mil 30mil C8 VBAT_VDVFS2
C9 VBAT_VDVFS2
B12 VRF18_1_SW PL2106 2.2uH 15mil VRF18_0_PMU [10]
C2105 VRF18_1
20mil D12 VBAT_VPA
C2107
VRF18_1_FB G10
15mil A12 C2106
22uF VBAT_VRF18
A13 VBAT_VRF18
B13
GND 10mil H11
VRF18_2 VRF18_2 reserved
4.7uF
VBAT_ALDO
[6,7,8,16] 10mil
VRF18_2_FB E11 for SGLTE RF.
VBAT_BUCK G12 VBAT_DLDO
GND
10mil F13 LDO F12 L/W = 1500/18 1.0125 600mA GND VSRAM_VDVFS2_PMU [2]
VDD_SLDO VSRAM_DVFS2
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU 6mil G13 L/W = 2800/6 3.3 50mA VUSB33_PMU [3]
VUSB33
IO Power VBIF28 G11 L/W = 800/4 2.8 20mA [7]
VBIF28_PMU
E1 DVDD18_IO
R2122 0R SBST_VOUT_PMU [7]
[6,7,8,9,15,18,19,20,21,22] WLED BST SPEAKER 0402
VSYS C5 VBAT_SMPS VBAT_SPK C3
C2115
C2116
C2117
C2113
B6 WBST_LX
BL Driver
C2112
NC
4.7uF
4.7uF
4.7uF
B7
4.7uF
2.2uF
IWLED1 [18]100nF
1.0uF 1.0uF C7 C2 CODEC_SPKP
2.2uF
SW CHG
K7 CHR_LX
VDIG DVDD18_DIG F1
[6,7,8,9,15,18,19,20,21,22] 16mil L7 GND
CHR_LX
M6 CHR_LX
C2124
100nF
GND GND GND GND GND 75mil PL2109 1.0uH 60mil CHR_LX M7
VSYS CHR_LX
VREF C2125
Close to MT6332
10K / 1%
NC
NC
NC
NC
J4 J13
BATTERY CONNECTOR VIO18_PMU 4.5V AVDD120_BOOT VREF
C2123
1.0uF
TP2106
TP2102 TP2104
TP2107 C2126 K9 1.0uF
[6,11,12,15] AVDD45_CS
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] L9 H13
Battery Connector
0201
AVDD45_CS GND_VREF
VBAT 10uF 75mil M8 AVDD45_CS
14
13
GND M9 AVDD45_CS
R2150
B 7 6
B
VSYS
GND
GND B
K10 AVDD45_BAT
DDR VREF
8 90mil 90mil L10 AVDD45_BAT AVDD_DDR F5 8mil [2,4,7]
5 R2103 1K VDRAM_PMU
0201 BAT_THERM [7] M10 AVDD45_BAT
C2127
D2106
15
GND_SPK C1
GND J5 D1
PVDD120_CHRIN GND_SPK
PVDD120_CHRIN J6 PVDD120_CHRIN GND_IBST C6
D2103 K5 PVDD120_CHRIN GNDA_SMPS D7
0201
0201
K6 PVDD120_CHRIN GNDA_SMPS D8
C2134
L4 E6
CHANGE FOR NEW TYPE
0603
PVDD120_CHRIN GNDA_SMPS
L5 E7
NC
NC
PVDD120_CHRIN GNDA_SMPS
L6 PVDD120_CHRIN GNDA_SMPS F7
CS_P [7] M4 PVDD120_CHRIN
M5 F8
25V rating PVDD120_CHRIN GND_LDO
F9
CS_N [7] GND_LDO
FLASH GND_LDO F10
GND L12 F11
VDD50_FLASH GND_LDO
L13 VDD50_FLASH GND_LDO G9
DVSS18_IO G6
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] [7] SBST_VOUT_PMU L11 VDD55_TORCH DVSS18_IO G7
GNDA_SWCHR H7
M11 FLASH1 GNDA_SWCHR H8
VIO18_PMU [20] FLASH1
M13 FLASH1
PVSS120_CHRIN J7
[20] FLASH2 M12 FLASH2 PVSS120_CHRIN J8
Read Address 0xC5 K8
100K PVSS120_CHRIN
WriteAddress 0xC4 R2106 J11 L8
10K / 1%
U2103 CW2015CSAD
0201
R2121 1 2 100R 3
VDD SCL
7
0201 FUEL_SCL4 [5]
1 5 INT_FUEL_GAUGE [5]
CTG ALRT
QSTRT
GND
EP
4
C2139 C2138
100nF 100nF
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 7OF 23
6 5 4 3 2 1
REVISION RECORD
D D
[6,7,16] VBAT_BUCK
BlinkLED Driver
4
+
I2C Address: 45H
G
LED2301
B
1
3
RGB LED 19-237/R6GHBHW-C01/2T
19-237/R6GHBHW-C01/2T
C2409
100nF
[6,21] VIO28_PMU
CHARGE_LED_R R2323 0R
[6] 0201
CHARGE_LED_G R2324 0R
[6] 0201
CHARGE_LED_B R2325 0R
[6] 0201
[5,15,20,21] SENS_SCL3 10 1
SCL LED0
[5,15,20,21] SENS_SDA3 9 2
SDA LED1
8 3
NC LED2
7 4
NC INTN
6 5
NC VCC
GND
AW2013DNR C2301
11
100nF GND
C C
WILL 3.3v
U2302
VSYS 4 1 VDD_3.0_HAPTIC
IN OUT 2.2uF [8]
[6,7,9,15,18,19,20,21,22]
C2310
3 C2317
GND
GND
EN
2.2uF
R2301
[5]
2
GPIO98_HAPTIC_EN
0201
100K
B B
1.0uF
J2301 J2302
0R
U2001-A
C2315
100nF
R2314
0201
DSD-XM-TP-007/XM-217-XC-056-SP
DSD-XM-TP-007/XM-217-XC-056-SP TO MTK MT6331
B2301 VIBR_PMU
NC VIBR
VIBR_PMU [6]
[8] DRV_DD B2301
6
D2301
NC
VDD
VIH=1.0V VIL=0.4V 1
[5] GPIO99_HAPTICS_EN EN
8
VDP
R2309 0R
[5] 0201 GP_CLK_1B PWM 2 PWM U2303 VDN
5
GPIO131_MOTOR_PWM
ISA1000
R2307 R2302 Rf FV2302 FV2301
0R 3 4 NC
[8] DRV_DD 0201 MODE GAIN 0201
FV2301 change to 0OHM when NOT USE IC
GND
GND
GND
GND
ERM=GNDR2308 0201 NC
C2313
4.7nF
NC NC
ISA1000
GND GND
GND GND
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 8OF 23
6 5 4 3 2 1
REVISION RECORD
D D
C 4-Phase Buck C
4-Phase Buck I2C address: 0X68 (Write:0xD0, Read:0xD1)
[2,9] DVDD_DVFS1
U2401
[6,7,8,9,15,18,19,20,21,22] VSYS DA9210-21UK2
100mil
DVDD_DVFS1 [2,9]
LX1 A1
C2401 10uF PL2401 0.47uH
25mil A3 VDD1 LX1 B2 0.72V--1.155V For Core 1.0V
A5 VDD1 LX1 B4
C2402 10uF
25mil J3 VDD2 LX2 J1
J5 H2 PL2402 0.47uH
VDD2 LX2 C2405
LX2 H4
C2403 10uF
25mil A9 VDD3
A11 VDD3 LX3 A13 10uF
B10 PL2403 0.47uH
C2404 10uF LX3
25mil J9 VDD4 LX3 B12 GND
J11 VDD4
LX4 J13
H10 PL2404 0.47uH
GND C2406 1.0uF LX4
6mil H6 VSYS LX4 H12
0201
GND G7 VSS_QUIET
R2403
VERROR/GPIO1 C2407
E13 IPHASE/GPIO2 220nF
GPIO103
0201
[5] GPIO103 G1 BUCK_CLK/GPIO3 VSS_NOISY C3
VSS_NOISY C5
[4,6,7] R2404 NC B8 G3 GND
0R
WATCHDOG 0201 AC_OK/GPIO4 VSS_NOISY
VSS_NOISY G5
EINT7_4PHASE_BUCK C1 OC_PG/NIRQ VSS_NOISY C9
[5] EINT7_4PHASE_BUCK C11
VSS_NOISY GND
VSS_NOISY G9
H8 NCS/SYNC/GPIO5 VSS_NOISY G11
J7 SO/INPUT/GPIO6
[5,7] A7 GND
SCL1 SK/CLK
NC E3
[5,7] B6 SI/DATA NC E11
SDA1
B B
4mil R2406 NC 4P_PMU_VFBP
VSYS 0201
Note: 24-2
Note 24-2: BOM option to select which 4-pahse buck be applied? DA9210 or second source.
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 9OF 23
R3101 62¦¸
R3102
1 2
R3103
RF_TXDET_MT6169 0201 RF_TXDET [12]
1
0201
0201
100R
2
100R
2
GND GND
RF_TX_BBIP [4]
RF_TX_BBIN [4]
RF_TX_BBQN [4]
RF_TX_BBQP [4]
[11] RF_HB2_TX_MT6169 RF_RX1_BBIP [4]
[11] RF_HB1_TX_MT6169 RF_RX1_BBIN [4]
RF_RX1_BBQN [4]
[11] RF_MB2_TX_MT6169 RF_RX1_BBQP [4]
[12] RF_MB1_TX_MT6169
RF_RX2_BBIP [4]
[11] RF_LB4_TX_MT6169 RF_RX2_BBIN [4]
[12] RF_LB3_TX_MT6169 RF_RX2_BBQN [4]
[12] RF_900_PRX_MT6169_RFIP1_LB1 RF_RX2_BBQP [4]
[12] RF_900_PRX_MT6169_RFIN1_LB1
[12] RF_B40B41_PRX_MT6169_RFIP1_HB1
GND
[12] RF_B40B41_PRX_MT6169_RFIN1_HB1
M13
M15
C15
C14
D14
H15
G14
H14
N15
N14
N13
H13
G13
B15
K14
K13
E13
E14
E15
F15
F14
F13
L13
L14
J14
J15
J13
M7
M6
M5
M4
N8
N7
N5
N4
U3101
H12
RFIN1_HB1
RFIP1_HB1
RFIN1_LB1
RFIP1_LB1
TX_LB1
TX_LB2
TX_LB3
TX_LB4
TX_MB1
TX_MB2
TX_HB1
TX_HB2
TXDET
TX_BBIP
TX_BBIN
TX_BBQN
TX_BBQP
RX1_BBIP
RX1_BBIN
RX1_BBQN
RX1_BBQP
RX2_BBIP
RX2_BBIN
RX2_BBQN
RX2_BBQP
DET_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TXO_GND
TST4
TST3 M12
TXBPI K10 LTE_TXBPI [4]
VRT N10 VRT
TST2 M10
only 5% resistor
1
TMEAS M9
RF_B34B39_PRX_MT6169_RFIP1_MB1 B14 RFIP1_MB1 BSI_CK K6 LTE_RFIC0_BSI_CK [4]
[12]
0201
BSI_EN J7 LTE_RFIC0_BSI_EN [4] R3105
[12] B13 RFIN1_MB1 BSI_D0 J6
RF_B34B39_PRX_MT6169_RFIN1_MB1 LTE_RFIC0_BSI_D0 [4] 2K,1%
BSI_D1 J5
LTE_RFIC0_BSI_D1 [4]
2
A15 RFIP1_LB2 BSI_D2 K4
LTE_RFIC0_BSI_D2 [4]
A14 RFIN1_LB2 GND
[12] RF_B7_PRX_MT6169_RFIP1_HB2 B12 RFIP1_HB2
GND L12
A12 RFIN1_HB2 GND L11
[12] RF_B7_PRX_MT6169_RFIN1_HB2
GND L10
A11 RFIP1_LB3 GND L9
[12] RF_B5_PRX_MT6169_RFIP1_LB3
GND L8
[12] RF_B5_PRX_MT6169_RFIN1_LB3
B11 RFIN1_LB3 GND L7
GND L6
[12] RF_B2B3_PRX_MT6169_RFIP1_MB2 B10 RFIP1_MB2 GND L3
GND K12
[12] RF_B2B3_PRX_MT6169_RFIN1_MB2 B9 RFIN1_MB2 GND K9
GND K8
A9 RFIP1_HB3 GND K7
[12] RF_B1_PRX_MT6169_RFIP1_HB3
MT6169 GND K3
A8 RFIN1_HB3 GND J12
[12] RF_B1_PRX_MT6169_RFIN1_HB3 J11
GND
B8 RFIP2_LB1 GND J10
GND J9
B7 RFIN2_LB1 GND J8
GND J4
[13] RF_B41_DRX_MT6169_RFIP2_HB1 B6 RFIP2_HB1 GND J3
VDCXO_DIG
EN_26M_BB
GND
RFIN2_MB2
RFIP2_MB2
RFIN2_HB3
RFIP2_HB3
V28_ESD1
GND G4
OUT_32K
CLK_SEL
VRXHF2
VRXHF1
32K_EN
XMODE
G3
VTCXO
VTXHF
VRXLF
GND
VTXLF
XTAL2
XTAL1
TST1
G2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XO3
XO4
XO2
XO1
VIO
GND
C1
C2
D2
E2
F1
32K_EN J2
F3
G1
H2
H1
M1
K1
K2
L2
N1
N2
C8
D13
M11
N11
K11
M8
L4
M3
J1
C3
C4
C5
C6
C7
C9
C10
C11
C12
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
E1
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
F2
F4
F5
F6
F7
F8
F9
F10
F11
F12
XMODE
1 0201
R3107
GND
[13] RF_B39_DRX_MT6169_RFIP2_MB2 1 1K
0201 R3108 VTCXO_0_PMU [3,6,10]
2
[13] RF_B39_DRX_MT6169_RFIN2_MB2
1K C3112 C3104
GND VIO18_PMU
[7] VRF18_0_PMU
2
MT6169_XO3_CLK GND
[6] MT6169_XO4_CLK
Far end Cap. For PMIC stability
CLK_WCN
[4] LTE_LTEX26M_IN
ENBB_6169 [4,6,7,9,10]
ENBB_6169 [4,6,7,9,10]
XTAL2
XTAL1 GND
C3108
GND
100nF
1
VTCXO_0_PMU [3,6,10]
GND
NC
VCC VCON
OUT
NC
U3102 For power VTCXO2 star connection
6
KT2520K26000DCW28QAS R3380
1 2 VTCXO2 [12,13]
0402
1 1 0R
C3109 C3383
NC C3110
C3383 is power
2 1.0uF2 capacitor of PMU.
100nF
GND GND GND
5 4 3 2 1
L3217 1.8nH
1
1 C3257
C3260
9.1nH 1.8pF
2
2
GND
GND
L3216
1 2
1
1 C3266
D
C3267 D
9.1nH 1.8pF
2
2
GND
GND
C3207
56pF
B3 TRX RF_B3_PA_PA
2
[12] RF_B3_PA_DPX
1
C3211
1
C3210 2 0201 1pF
3.9nH
2
GND
GND
5.6nH
2
1
RF_B2_PA_PA RFMD and Murata
have pin to pin products. 4G PA input need LPF for harmonic rejection
NC C3223 Please check latest
C3222 9.1nH
20201
QVL and matching R3214
2 2
0.5pF
1 2
C3225
3/4G_PAIN_LB
1
accordingly RF_LB4_TX_PA
RF_LB4_TX_MT6169 [10]
RF_LB4_TX_1
33pF
GND GND 2
0201 3.3pF
R3226 1
L3206
B1 TRX
C3226
1 1 2
[12] RF_B1_PA_DPX RF_B1_PA_PA
1 3.3pF 20201
3.0nH 1
NC C3216
GND GND
C3215
NC
2 2
3/4G_PAIN_MB
20201
GND GND L3215
21
20
19
18
17
16
1 2
1
RF_MB2_TX_PA
2 RF_MB2_TX_MT6169 [10]
RF_MB2_TX_1
MB1/B3
LB5/B12/B17B28A
LB1/B8
LB2/B5
LB3/B20
LB4/B13/B28B
4.7nH C3217
0201
[7,11] VPA_PMU 1 C3254
22 15 C3228 33pF
1 1 GND GND 1pF
C3233 C3243 23 MB2/B2 GND 14 02012
24 13 1 1pF
100pF 20201 GND RFIN_L
25 12 GND GND GND
470nF MB3/B1 RFIN_M 60mil VBAT [6,7,12,15]
2 26 MB4/B4 NC 11 2
GND GND 27 10 0201
GND NC
28 9 22pF 1C3249
L/M/H PA
VCC2_2 NC C3202 C3248
[11] VPA_VCC1 29 VCC1 VBAT 8
30 7 20201
1 VCC2 VIO 1
42 RX2/B41RX/BYPASS/B7
C3244 1 1 0201 2 [4] 100pF
C3245 31 GND SCLK 6 MIPI0_SCLK
C
100pF 32 5 R3202 100R 100nF C
39 HB4/B41/AXGP
0201 VMIPI_PMU [6] For power LTE_VMIPI star connection
GND2 GND 35
GND
HB2/B7
RFIN_H
2 0R
38 HB3/B40/B30
GND
41 RX1/B40RX
1C3241
RF_B34B39_PA_PA
36 1 LTE_VMIPI [12]
20201
[7,11] VPA_PMU GND GND L3238
1 1nF
1 20201 1 2 RF_HB2_TX_1
TDS_PAIN_HB
1
GND
GND
40 GND
GND
GND
GND
GND
GND
GND
GND
GND
C3242 C3205 RF_HB2_TX_MT6169 [10]
100pF 20201 4.7nH
470nF C3252 33pF
GND 2 2
2 GND 0201
37
43
44
45
46
47
48
49
50
GND GND 0201
SKY77643
U3203
2.0*1.2
U3216
C3250 C3251
C3276 LF2012-L1R4NAA GND
1pF 1 1
0201
B34&B39 TRX 3 1
RF_B34B39_PA_LPF_IN
GND
2
1
[12] RF_B34B39_PA_TXM RF_B34B39_PA_LPF_OUT
OUT IN GND
1
0201
GND
1
1
39pF
1
L3214
C3256
0201
L3234 L3223 R3230
NC
3/4G_PAIN_HB
2
NC 2 1
1
NC RF_HB1_TX_1 RF_HB1_TX_MT6169 [10]
2
2
2
3.3nH
IF B34/B39 reuse TXM, 8.2pF
GND GND GND GND R3201 R3231
this path can be deleted 1 1
0201 0201
GND U3215 2 2
SAFEA2G35MF0F0A This path is no use for Sky77643
5
1.2pF 1.2pF
L3210 GND GND This path is reserved for 3M Co-PCB
GND 3
G
0201
C3286 C3288 G
1 RF_B40_TRX_BAW_IN 2 1 RF_B40_TRX_PA
[12]
2.7nH
LPF for more
1
C3258 support B34/B39 TXM reuse)
2
12pF 5.1nH
2
0.5pF
L3221 C3259
NC
margin on Tx
GND
L3222 NC spurious
2
1
1.4*1.1 GND
2
GND
GND GND C3261
RF_B40B41_PRX_PA 1 2
0201 RF_B40B41_PRX_PA_1 [12]
0R
0201
L3209
B7 TX
2
NC
B 2 2 NC B
GND
GND 1.6*0.8
GND
6 1
GND
GND GND
C3262 L3211
0201
0201
GND
B41 TRX
GND
GND
L3213
3
G
C3285 G RF_B41_TRX_PA
IN 1 RF_B41_TRX_FBAR_IN2 1
2 1 RF_B41_TRX_FBAR_OUT 4
[12] RF_B41_TRX_TXM OUT
G
1.5nH 1
1.8nH
1
2
2
C3272
U3220 C3273
2
0.5pF NC
L3219 GND
SAFEA2G60MA0F0A NC
2
NC L3218 [2,3,5,6,7,9,10,14,15,16,18,19,20,21,23]
2
1.4*1.1
1
1 GND VIO18_PMU
GND
GND GND
1
0201
R3232
390K 1%
B9081 port4 is ANT (Pin to Pin DGAH74S03 partial 41 Band)
2
ACPF-8240 port1 is ANT
NTC3201
[4] AUX_IN1_NTC
1
0201
2
GND
50mil
[7,11] VPA_PMU VPA_PMU [7,11]
1
C3234
470nF Title
2
32_RF_MT6169_RF_TX
Size
GND
Far end Cap. For PMIC stability
A0 MTK Confidential
5 4 3 2
Date: 1
Friday, November 07, 2014 Sheet 11 of 23
5 4 3 2 1
B7 TRX 1.8*1.4
[11] RF_B7_PA_DPX
C3315
20201
[10] RF_TXDET
VBAT [6,7,11,15] RF_B7_PRX_DPX_RFIP1
1
1 RF_B7_PRX_MT6169_RFIP1_HB2 [10]
U3308
SAYEY2G53CA0F0 2.7pF
C33481 C3317
22uF 1 1 2
1
RF_B7_TRX_DPX 6 3
1
C3339 C3324 [12] RF_B7_TRX_TXM ANT TX
02012 1 L3312
1
SKY77916 18nH
ASM_Main
1
G
G
G
G
2
2
2 L3315
GND GND GND L3318
2.4nH
7
5
4
2
19
18
17
16
15
14
13
12
20201
0.5pF
2
C3321
D
D
NC
GND
CPL_O
GND
GND
GND
GND
GND
2 GND
10K / 1%
2 1
1
R3301 RF_B7_PRX_MT6169_RFIN1_HB2 [10]
APC1_TXM 0201 APC1 [4] GND GND RF_B7_PRX_DPX_RFIN1
GND 2.7pF
1
R3305 close to GND GND
1
CON3303 20 11
0201
CON3303 C3310 C3304
R3302
24K/1%
20201
0201
C3318 21 GND VBAT 10
2 5 6 NC
GND 3 4
3 1
1
RF_ANT_TRX_CARKIT RF_ANT_TRX_TXM
2
GND RF 22 ANT VCC 9 0201
4 2 1 2
L3322
GND
B1 TRX
33pF CON3301 33pF GND GND
NC NC 23 GND VRAMP 8
1
0201 0201 ECT818000163 GND
TRX14 VIO LTE_VMIPI [11]
GND C87P101-00003-H 24 7
L3317 L3346
2
47nH
1
R3303 100R
2
2.0*2.0*0.6mm GND GND
GND
[12] RF_B1_TRX_TXM 26 TRX12 SCLK 5 0201 MIPI1_SCLK [4] [11] RF_B1_PA_DPX
20201
[12] RF_B2_TRX_TXM 27 TRX11 GND 4 2 1 C3323
C3301 RF_B1_PRX_DPX_RFIP1
1
TRX10 RFIN_H 22pF U3306 RF_B1_PRX_MT6169_RFIP1_HB3 [10]
[12] RF_B3_TRX_TXM 28 3 10nF 02012 SAYEY1G95HA0F0A
GND L3309 2.4pF
[12] RF_B5_TRX_TXM TRX9 RFIN_L
1
29 2 C3340 1 2
1
[12] RF_B1_TRX_TXM RF_B1_TRX_DPX 6 ANT TX 3 L3310 L3308
[12] RF_B7_TRX_TXM 30 TRX8 GND 1 1 1.5nH RX 1 NC NC
GND
1
1 RX 8
TRX7
TRX6
TRX5
TRX4
TRX3
TRX2
TRX1
2
GND
GND 39
G
G
G
G
2
L3311
20201
L3319 C3325
7
5
4
2
NC 0201 3.0nH RF_B1_PRX_DPX_RFIN1
1
RF_B1_PRX_MT6169_RFIN1_HB3 [10]
31
32
33
34
35
36
37
38
2
GND 2.4pF
GND GND GND
[12] RF_B34_PRX_TXM
[12] RF_B39_PRX_TXM 2G_PAIN_HB
B5 TRX
[11] RF_B40_TRX_TXM
MT6169 TX Ouput need a DC block(MUST).
[11] RF_B41_TRX_TXM
20201
[11] RF_B40B41_TRX_TXM_BYPASS R3333
1 2
RF_MB1_TX_1 C3314
1
[12] RF_900_PRX_TXM 0201 RF_MB1_TX_MT6169 [10] [11] RF_B5_PA_DPX
33pF
0R
1
[11] RF_B34B39_PA_TXM
C3327
0201
R3306 U3313 RF_B5_PRX_DPX_RFIP1 1 2 RF_B5_PRX_MT6169_RFIP1_LB3 [10]
NC SAYEY836MCA0F0A 6.2nH
C3330
1
2
1
1 2 RF_B5_TRX_DPX 6 3 L3328
C
GND [12] RF_B5_TRX_TXM ANT TX L3329 C
4.3nH RX 1
15nH NC
8
1
RX
2
20201
2
G
G
G
G
C3335
1
R3334 212R C3334 L3330
1
0201 RF_LB3_TX_1 RF_LB3_TX_MT6169 [10] 1 2
7
5
4
2
RF_B5_PRX_DPX_RFIN1 RF_B5_PRX_MT6169_RFIN1_LB3 [10]
1
8.2nH
2
33pF
1
6.2nH
0201
R3327
0201
R3328 GND
430R 1% GND
1.8*1.4
430R 1%
2G_PAIN_LB
2
2
GND GND
1C3349
20201
RF_B40B41_PRX_BALUN_RFIP1 RF_B40B41_PRX_MT6169_RFIP1_HB1 [10]
2
[11] RF_B40B41_PRX_PA_1 1 2 RF_B40B41_PRX_BALUN
2 UNBAL BAL 4 L3343 L3341
3.0nH NC
1C3353
3.0nH
20201
L3344 U3323
1
L3350
NC 1pF TFSZ06052460-3310A2
RF_B40B41_PRX_MT6169_RFIN1_HB1 [10]
0201 RF_B40B41_PRX_BALUN_RFIN1
[11] RF_B3_PA_DPX
B8 TRX
B B3 TRX C3361
U3309
SAYEY1G74BC0B0A
[11] RF_B8_PA_DPX B
20201
1 2
[12] RF_B3_TRX_TXM RF_B3_TRX_DPX 6 ANT TX 3
RF_B3_PRX_DPX
C3316
SKY13489
1
4.3nH RX 1 C3328
RX 8 U3322 1 2
GND
SAYEY897MCA0B0A
G
G
G
G
1 C3331 6.2nH
1
1pF 6 3
1
[12] RF_900_PRX_TXM ANT TX
1
20201 6.2nH 5.6nH NC L3333
1
2
1.8*1.4 15nH
20201
2
RX 8
2
B2 C3307 NC
1
GND RF_B2B3_PRX_BALUN_RFIN1
G
G
G
G
1
[10]
2
RF_B2B3_PRX_MT6169_RFIN1_MB2
2
GND GND GND U3317 L3331
18pF C3336
7
5
4
2
GND 8.2nH
1
1 2
GND
1
GND BAL
2
A1 RF1 L3305 L3335
NC GND
6.2nH
2 UNBAL BAL 4 NC
ANT A2 GND
2
1.8*1.4
2
20201
TFSZ06051897-3317A1
A3 RF2 C3311
1
RF_B2_PRX_SWITCH
B2 TRX U3301
SAYEY1G88BA0B0A BPI_BUS8 [4]
20201
U3302
C3302
5.0pF
C3303
RF_B2_TRX_DPX 1
1
B34&B39 PRX
RF_B2_PRX_DPX
1
RX 1
GND
G
G
G
G
1
1
18pF
7
5
4
2
1
1
GND L3340
3.3nH 20201 L3332
SAWFD1G90BK0F0A
1UF NC 8.2nH
GND [10]
3.6nH
RF_B34B39_PRX_MT6169_RFIP1_MB1
7
8
5
02012
GND GND
0201
2
2
GND C3342
GND
GND
GND
1
20201 2
1 LCH
RF_B39_PRX_SAW BAL_PORT1 6 L3336
[12] RF_B39_PRX_TXM 18pF
3.3nH
20201
L3337
1
[12] 4 HCH
RF_B34_PRX_SAW BAL_PORT2 9
RF_B34_PRX_TXM
[10]
1
RF_B34B39_PRX_MT6169_RFIN1_MB1
GND
GND
GND
C3343
1
C3344
1
L3342 18pF 2.7pF
2
3
10
NC L3338
6.8nH
1.5*1.1
A A
2
GND
GND GND
Title
33_RF_MT6169_RF_PRX
Size
A0 MTK Confidential
Date: Friday, November 07, 2014 Sheet 12 of 23
5 4 3 2 1
5 4 1
3 2
B3 DRX 1.1*0.9
1C3412
5.6pF
20201
U3406 GND
SAFFB1G84FL0F0A RF_B3_DRX_SAW_RFIP2 RF_B3_DRX_MT6169_RFIP2_MB1 [10]
2
C3414 4
G
OUT
[13] RF_B3_DRX_SWITCH 1 2 RF_B3_DRX_SAW 1 IN L3410 L3409
G 3
G
2.2nH 3.0nH NC
1C3416
5.6pF
D
D
20201
5
0201
L3414 GND RF_B3_DRX_SAW_RFIN2 RF_B3_DRX_MT6169_RFIN2_MB1 [10]
1.2pF
1
U3402
RF_B39_DRX_SWITCH[13]
RF_B3_DRX_SWITCH[13]
B7 DRX 1.1*0.9
20201
RF1636
GND C3420
U3408 GND
10
11
12
1
GND RF_B7_DRX_SAW_RFIP2 RF_B7_DRX_MT6169_RFIP2_HB2 [10]
SAFFB2G65FB0F0A
2
GND
GND
RF1
RF2
L3423
0201
4.7pF
1
4
G
OUT L3417
0R
13
1
1
RF3 0201 [13] RF_B7_DRX_SAW 1 IN L3416
RF_B7_DRX_SWITCH NC
20201
R3401 R3400 C3438 OUT 3 2.0nH
G
1
0R 0R 3 4 GND 14 C3418
1
100pF
20201
2
0201 0201 RF_ANT_DRX_CARKIT C3419
0402
5
2 1
L3499
[4]
47nH2
15 18pF L3415
EPAD LTE_RF_BPI_OUT21
1
C3522 CON3401 RF_B7_DRX_SAW_RFIN2 RF_B7_DRX_MT6169_RFIN2_HB2 [10]
C3499 33pF 9 ANT GND NC
1
GND
L3404
2
C3424 C90P106-00004-H CTL3 1 4.7pF
0201 0201
NC C3423 LTE_RF_BPI_BUS20
NC 2
NC CTL2 0201 GND
2.0*2.0*0.9mm C3439 [4]
47nH2
GND GND
GND GND 3
CTL1 100pF
GND
VDD
RF4
RF5
RF6
GND
GND
LTE_RF_BPI_BUS19 [4]
4
C RF_B41B_DRX_SWITCH
[13]
GND
0201
C3447
GND
100pF
B39 DRX 1.1*0.9 C
C3413
GND
5.0pF
[13]
RF_B41A_DRX_SWITCH VTCXO2 U3407
RF_B39_DRX_SAW_RFIP2
??????????????? 1C3435 SAFFB1G90FB0F0A
2
RF_B7_DRX_SWITCH[13] [10,12,13] RF_B39_DRX_MT6169_RFIP2_MB2 [10]
2
20201 C3415 4
G
OUT
10NF 1 2 RF_B39_DRX_SAW
1 IN L3412
[13] RF_B39_DRX_SWITCH L3413
1.5nH 3
C3417
G
5.0pF
3.3nH NC
GND
2
L3411 RF_B39_DRX_MT6169_RFIN2_MB2 [10]
GND RF_B39_DRX_SAW_RFIN2
NC
GND
B1 DRX U3404
GND
1.1*0.9
RF_B40_DRX_BALUN_RFIN2
C3405 4.3pF
RF_B40_DRX_MT6169_RFIN2_HB3 [10]
2
SAFFB2G14FA0F0A
5
C3432 3
G
OUT L3401
1 2 RF_B40_DRX_SAW
1 IN
[13] RF_B40_DRX_SWITCH 2.7nH L3403
OUT 4
G
1.0nH NC
C3401
2
L3402
2
RF_B40_DRX_BALUN_RFIP2 RF_B40_DRX_MT6169_RFIP2_HB3 [10]
NC GND
4.3pF
??????????????? GND
B
??????????????? B
2.7nH
C3421 1 2
4
G
OUT
RF_B41B_DRX_SAW_IN1
1
6.8pF
1
L3418 0.5pF
5
L3431
3.3nH GND SKY13489
NC
L3441
1C3454
GND
2
20201
U3410
GND B2 GND
GND TFSZ06052460-3310A2 RF_B41_DRX_BALUN_RFIN2 RF_B41_DRX_MT6169_RFIN2_HB1 [10]
NC
GND
1C3453
2.7nH
B40 DRX
2 4
20201
A2 UNBAL BAL
L3440
ANT
GND
U3411
1.1*0.9 A3 RF2
RF_B41_DRX_BALUN_RFIP2 RF_B41_DRX_MT6169_RFIP2_HB1 [10]
SAFFB2G35AA0F0A
20201
C3434
C3433
2
3.0pF
BPI_BUS7 [4]
1
4RF_B41A_DRX_SAW_OUT
G
3.6nH
OUT B3 B1
RF_B41A_DRX_SAW_IN 1 VDD V1
1
[13] RF_B41A_DRX_SWITCH IN
G 3 18pF
G
A
0201 1 A
L3437 C3408
5
VTCXO2
[10,12,13] U3401 20201 33PF
L3429 1C3407
NC
L3430
GND NC GND
20201
GND 1UF
GND
GND
GND
Title
34_RF_MT6169_RF_DRX
Size
A0 MTK Confidential
Date: Friday, November 07, 2014 Sheet 13 of 23
5 4 3 2 1
6 5 4 3 2 1
REVISION RECORD
D D
C C
4.7uF
100nF 100nF
U4001
MSDC0_DAT0 H3 DAT0 VCC M6
MSDC0_DAT1 H4 DAT1 VCC N5
MSDC0_DAT2 H5 T10 GND GND GND
DAT2 VCC
MSDC0_DAT3 J2 DAT3 VCC U9
MSDC0_DAT4 J3 DAT4
MSDC0_DAT5 J4 K6 R4002 0R
DAT5 VCCQ 0402 VIO18_PMU
MSDC0_DAT6 J5 DAT6 VCCQ W4
MSDC0_DAT7 J6 DAT7 VCCQ Y4
VCCQ AA3
K2 VDDI VCCQ AA5
C4004 C4005
K4 VSSQ CMD W5 eMMC_CLK
Y2 VSSQ CLK W6
Y5 R5 100nF should star
VSSQ RCLK connect from
AA4 VSSQ RST#_/_NC U5
AA6 L4 MC0CLK
VSSQ A1_INDEX_/_NC
C4006 M7 K7 GND GND
VSS NC
P5 VSS NC K8
R10 VSS NC K9
1.0uF U8 VSS NC K10 [5]
H6 K11 MSDC0_CMD
VSS NC
T5 VSS NC K12 [5]
GND K13 MSDC0_CLK
NC
NC K14
Close to A4
A6
NC
NC
NC
NC
L1
L2
MSDC0_DSL [5]
GND A9 L3
NC NC
Memory A11 NC NC L12 MSDC0_RST_ [5]
B2 NC NC L13
B13 NC NC L14
D1 NC NC M1
D14 NC NC M2
H1 NC NC M3
H2 NC NC M12
H8 NC NC M13
H9 NC NC M14
H10 NC NC N1
H11 NC NC N2
H12 NC NC N3
GND H13 N12
NC NC
Note: 40-1 H14 NC NC N13
J1 NC NC N14
J7 NC NC P1
J8 NC NC P2
J9 NC NC P12
J10 NC NC P13
J11 NC NC P14
Schematic design notice of "40_MEMORY_eMMC" page. J12
J13
NC NC T1
T2
NC NC
J14 NC NC T3
K1 NC NC T12
Note 40-1: For eMMC 5.0, connect eMMC's H6 & T5 pin to GND. K3 NC NC T13
R1 NC NC T14
R2 NC NC V1
R3 NC NC V2
For eMMC 4.5, check eMMC's H6 & T5 is real no connection (NC). R12 NC NC V3
R13 NC NC V12
R14 NC NC V13
U1 NC NC V14
U2 NC NC Y1
U3 NC NC Y3
U12 NC NC Y6
U13 NC NC Y7
U14 NC NC Y8
W1 Y9
B W2
W3
NC
NC
NC
NC Y10
Y11
B
NC NC
W7 NC NC Y12
W8 NC NC Y13
W9 NC NC Y14
W10 NC NC AE1
W11 NC NC AG2
W12 NC NC AH4
W13 NC NC AH6
W14 NC NC AH9
AA1 NC NC AH11
AA2 NC NC AG13
AA8 NC NC AE14
AA9 NC
AA11 NC
AA12 NC
AA13 NC
AA14 NC RFU H7
RFU K5
AA7 RFU RFU M5
AA10 RFU RFU M8
U10 RFU RFU M9
U7 RFU RFU M10
U6 RFU RFU N10
P10 RFU RFU P3
H26M52104FMR/THGBMFG7C2LBAIL
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 14
OF 23
6 5 4 3 2 1
REVISION RECORD
D D
仪和重力加速
U802 BQ2425X-QFN
L802
VBUS_USB_IN 1uH VSYS
[7,22] VBUS_USB_IN 1 19
VBUS SW VSYS [6,7,8,9,18,19,20,21,22]
24 20
VBUS SW 47nF C804 L/2520H1MM/0.68/UH/3.2A
C801 C802 C803
16V 0201 C806
C 0201 0402 C
C820
1uF 50V
0603
21 10uF
BTST 0402
[2,3,5,6,7,9,10,11,14,16,18,19,20,21,23] 23 10uF
PMID
VIO18_PMU
22 [15]
REGN REGN
3
/PG C807
4
STAT
17 0402
PGND
18 4.7uF
0201
PGND
10K
R805
6 15
[5,8,20,21] SENS_SDA3 SDA SYS
16
SYS
5
[5,8,20,21] SENS_SCL3 SCL
7
[5] EINT14_INT INT
R808 BAT
14 VBTT VBAT [6,7,11,12,15]
8 13
[6,7,11,12,15] VBAT 0201 OTG BAT
10K 9
[4] GPIO90_EN /CE
R811 R813 NC PMU_CHGIN C805
ILIM
10 0201
0201 [6,7]
0201
10K 0R 0402
R804 10uF
R806 R809 TS1
11
2 12 0201 REGN [15]
[15] REGN 0201 PSEL TS2 10K
GND
10K
0201
10K
25
R822
Note 41-2: Depends on system design to add ESD protection componemt or not.
B B
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 15
OF 23
MT6630 WiFi_2.4G_5G (11ac) & BT PALDO_OUTPUT [16]
C5001
GND
1.4*1.2 4.7uF
GND
GND
Placement close to IC
0201
C5002
U5002 NC
885033
L5001 0R L5002 0R U5001-A
4 1
7.5nH
0201 OUT IN 0201 C5003
G
G
G
Share Pad0R
L5003
NC NC 0201 RF_ION_WBT
3
5
3
2
NC A1 WBT_EXT_G
C5015
I/O
GND DC
BP
0201 VCO_MONITOR D2
8.2nH GND C5012
C5014 U5003 C5004
C5013
Share Pad
NC
C5006
BP
BL1608-05K2450 2.2pF A2 WB_RFION_G
GND GND DVDDIO_ANTSEL G10 PALDO_OUTPUT [16]
GND GND 0R
4
L5004 RF_IOP_WBT RFPD2G F8
NC 0201
ANTSEL0 F7
FBAR/BAW Filter Matching network. The values has to be adjusted by PCB. GND
ANTSEL1 F6
A3 WB_RFIOP_G ANTSEL2 G6
ANT5006
ANT5005 ANT5004
FBAR/BAW Filter Matching network. The values has to be adjusted by PCB.
1.6*0.8 C5005
GND
R5002
0201
0R L5005
0201
0R A5 AC_RFIO_A
ANTSEL3
ANTSEL4
ANTSEL5
ANTSEL6
ANTSEL7
G7
G8
H7
H8
H9
NC
NC
1
C5008 B5
1
AC_EXT_A
C5007
GND GND
GND
MT6630 PMU
5.0pF G4 RFPD5G
4
GND 5 GND
2.0*1.2 [16] PALDO_OUTPUT
C5009
D3
C2
AVDD33_AC_PA
A4
[16] VSYS_6630
GND
AVDD33_WBT_PA AVSS_BALUN_PA
L5021
L5022
0201 AVSS15_WBT_SX_LF B1
U5001-D
B2
0201
AVSS15_WBT_TRX
0201
L5008 C5011
1
47nH2
NC
NC
NC
GND J11
1_5G
AVSS28_ADC
GND GND C5018 C5019 via to Main GND L10
B6
C6
D5
AVSS45_SMPS
GND GND 1.0uF 10nF MT6630QP/B J12
8
GND AUXIN
U5008 C5029
K9 AVDD25_V2P5NA
GND
TP2012-A1255BA GND GND K12
C5024
100nF
VREF
[16] SMPS1V5 [16] ALDO Imax_30mA 1.0uF
L12 AVDD28_ALDO
GND
LX1 M10
0201 C5025 1.0uF
C5020 C5021 L9
[16] SMPS1V5 Imax_280mA VOUT_VRF
1.0uF 100pF LX2 M9
M8 PL5006 2.2uH
[16] VCORE Imax_420mA VOUT_VCORE
GND GND
GND
C5027 M12 PALDO
C5026
NC
NC
10uF
10uF C5028 Placement close to IC
Imax_450mA
4.7uF
F9
F10
MT6630QP/B
GND
GND
1.1*0.9
U5007 WIFI_PA
[16] PALDO_OUTPUT
1 4 L5010 9.1nH
IN OUT
GND
2 5
GND GND
GND
GND
GND C5032 C5033
NC
SAFFB1G56KB0F0A-MI NC
1
GND
RFIN
GND
GND
RDALN16-MI
5
U5006
C5048
4 6
TSENS
OUT VCC ALDO [16]
0201
RFOUT
1nF 100nF
C5040
VDD
EN
3 GND VREF 1
C5041
EN
4
6
1.0uF
GND
2
U5001-C GND
[5,16] GPIO100 U5005
50 Ohm KT2520K26000ZAW18TAS
[16] ALDO 0201 L5011 6.2nH A12 GPS_RF_INP
R5004 100nF XO C12
0R NC NC
GND
D12 AVDD28_XO
C5037 C5036 E7 GND
C5035 OSC_EN 0201
R5005 10K / 1%
GND
B12 AVSS_GPS
GND
AGPS_SYNC E6
GPS_SYNC [5,16]
C11 AVSS_XO
R5009 0R
NC
NC
NC
ALDO 0402 GND
[16]
10pF
F3
F4
F5
C5039 0201 MT6630QP/B
C5038
1.0uF
GND
GND
U5001-E VIO18_PMU
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
MT6630 Host Interface I2S_DATA_IN K3
K2
0201
I2S_WS R5006
I2S_CLK J2
E8 H3 NC
C5042 K1
PCM_SYNC DAISYNC [5,16]
F12 RTCCLK_O PCM_CLK L2
DAICLK [5,16]
PCM_IN L1
100nF DAIPCMOUT [5,16]
PCM_OUT M1 GND
DAIPCMIN [5,16]
GND
[6,16] RTC32K2V8 F11 RTCCLK C5046
URXD2
M2 100nF
DVDDIO_SDIO VIO18_PMU [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
[16] VCORE G9 DVDD SDIO_CMD K4
K5 MSDC3_CMD [5]
SDIO_CLK MSDC3_CLK [5]
J3 DVDD SDIO_DAT0 M6
C5043 L6 MSDC3_DAT0 [5]
C5044 SDIO_DAT1 MSDC3_DAT1 [5]
J4 DVSS SDIO_DAT2 M4
L4 MSDC3_DAT2 [5]
SDIO_DAT3 MSDC3_DAT3 [5]
1.0uF H10 DVSS
1.0uF
K6 DVSS
GND DVDDIO J1 VIO18_PMU
GND
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
NC
NC
NC
NC
NC
NC
NC
GND
U5001-B 100nF
FM_RIN C8
H4
H5
G5
D6
D7
D8
D9
GND
FM_LOUT A8
R5011
0201
10K / 1%
GND
OFF-PAGE_MT6630 Host Interface
AVDD33_FM B10 PALDO_OUTPUT [16]
100nF
L5007 82nH A9
MT6630 EINT MT6630 Power
[18] FM_ANT FM_LANT_P
C5047
GND
NC
NC
NC
E5
E9
E10
MT6630QP/B
R5007
0201
VIO18_PMU VIO18_PMU
NC
CONN_RST CONN_RST[5,16]
[13]
GPS_SYNC GPS_SYNC[5,16][13]
GND GND
D D
nokia,L-R-MIC-GND
default Iphone,L-R-GND-MIC
SPEAKER OPTION2
[6,7,8,9,15,19,20,21,22]
[2,3,5,6,7,9,10,11,14,15,16,19,20,21,23] VIO18_PMU VSYS
R6001
4.7uF
ESD6001
C6049 100nF
0201
GND
CON6001 2.2uF
470K
close to IC
Route the GND between L/R chanel AJ010-20342A01D
close to connector
Note: 60-1 Note: 60-3 R6002 47K
AJ01356326-R C6003
[5] EINT13_HS_DET 0201
100K
GND 2
B6007
[6] EARPHONE_GND VSYS
SBJ100505T-182Y-N
R6005 0R B6005 HPH_R 3
D2
C1
B3
A3
[6] CODEC_HPH_R 0201
0201
SBJ100505T-182Y-N
B6013 5
VDD
VDD
C1P
C1N
GPIO93_SPK_EN 6 HS_DET
R6015
PBY160808T-181Y-N
0201
R6031 1K D1
[6] R6003 0R B6003 HPH_L 4 C2P
C6005
CODEC_HPH_L
2.2uF
0201 A4
[18] HFJ100505T-102Y-N
HP_MIC
B6001 MIC_IN 1 [5] GPIO93_SPK_EN SHDN
B1
GPIO93_SPK_EN
R6006
R6004
C2N
HFJ100505T-102Y-N B2
Note: 60-2
33nF
B6014
0201
C2N
ESD6005
C6004 R6025 3K
C6009 C6010 ESD6003 PBY160808T-181Y-N [6] AU_LORP_EXPA 0201 U6001
0201
0201
B4 L6022 0R [22]
C6001
ESD6004 C <= 1pF A2 AW8738 VOP 0603 SPKR_OUT_P
0201 0201 C6002 AU_LORP_EXPA INN SPKR_OUT_P
33pF 33pF
470R
470R
C6030
ESD6006
0201 L6023 0R SPKR_OUT_M [22]
470nF
D4 0603
1nF VON
0201
A1 SPKR_OUT_M
Single via to
33nF
0201
INP
GND C6008 R6026 3K D3 C6039
GND plane
C6038
[6] AU_LORN_EXPA 0201 PVDD
C <= 1pF GND C6040
C GND
C
GND
GND
GND
AU_LORN_EXPA 0201
1nF 0201
GND GND 1nF
4.7uF
C4
C3
C2
Schematic design notice of "60_PERI_AUDIO_IO" page. 0R
L6001
0201
PBY100505T-102Y-N
Note 60-1: Part # of BEAD6002, BEAD6003, BEAD6004 and BEAD6005
FM_ANT [16]
needs changed to "BLM18BD102SN1" for high THD
B6012
performance (-90dB) but this BOM change will results in FM
FM_RX_N_6630 [16]
RSSI 10dB degraded .
R6007 0R
0201
Note 60-2: optimize headphone pop noise. The recommended value of this resistor is 33R.
To reserve a resistor in HPL and HPR in series connection both in order to
GND
Note 60-3: TO Reduce cross talk, Please route the Earhpone_GND between L/R chanel
C836£ºwhen use AW8145 please use 1uF CAP;when use AW8155 or AW8155A please use 0 ohm res
Note 60-3: To eliminate Plug in and out Recognize issue C6049 should be 100nF
Earphone MICPHONE
Main microphone
[6] MICBIAS1
Analog MIC
R6008
Close to BB
C6015
100nF
1K
MAIN_MIC_P AU_VIN0_P
C6016 [22] [6]
C6023
1.0uF
[6] AU_VIN1_N 4.7uF GND
AU_VIN1_N1 GND of C6018(10uF) and C6024
U2001
C6019 headset should tie J1809 0201
100pF
together and single via to
R6009
[6]
1.0uF
33pF
GND plane
0201
GND
0201
100pF C6028 C6029
C6021
tie together and single via to
1.5K
0201 0201
C6022
100nF
0201
33pF
GND plane 33pF 33pF
R6011 1K GND
[6] ACCDET 0201
B B
REC
Secondary MIC CE ÈÏ֤ʱ,Èç¹ûÓöµ½¹¤Æµ¸ÉÈÅÍƼö0B4015R-423G-XD9RAC-BD-0MIC
D101
4
MICBIAS2 [6]
OUTPUT
VDD
SPH0642HT5H-1
SILICON MIC
Route as differential pair
Close to MIC
Close to BB B6008
GND
GND
GND
GND
AU_HSN [6]
B6011 C6033 PBY160808T-181Y-N
AU_VIN2_P [6] 2
N B6009
HFJ100505T-102Y-N 1
C6011
1.0uF
P 0201
5
3
2
1
0201
GND_MIC B6006 100pF
AU_VIN2_N [6]
HFJ100505T-102Y-N
C6014
1.0uF
ESD6013 ESD6007
0R
ESD6012 ESD6011
2
N
0201
1 C6034 C6032
C6017 C6018 P
R6027
GND
GND GND GND GND
GND GND GND
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 18
OF 23
6 5 4 3 2 1
REVISION RECORD
[6,7,8,9,15,18,19,20,21,22] VSYS
D PL6103 10uH
D
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
VIO18_PMU
R6131
Back Light Driver for 12LEDs In 2Series 6 P
41
100K R6111 Diode Schottky
0201 1 1 [19]
LCM_LED_P
GND
R6114 1K GND
LCM_ID0 ID0 2 2
0201
[4]
D6101
R6106 0201 1K LCM_ID
[4] LCM_ID1 ID1 3
0201 LANSEL
[5] 4
LCM_RST RST
5
10R
[5] DSI_TE TE
6
C2
C3
NC U6102
7
GND
[19] 8
VIN
SW
FV6102 FV6101 FV6103
D0P_A
9
D3+ 背光IC使能信号
NC [5] GPIO135_BL_EN A3
C6116 C6117 C6118 [19] D0N_A 10 C1 IFB1 LED_S1 [19]
C6115 D3- EN
11
GND R6103 B1 A2 [19]
0201 0201 0201 12 0R PWM IFB2 LED_S2
0603
[19] D1P_A D2+ 0201
100K
33pF 33pF 33pF 0201 13 [19] LCD_PWM
NC
1uF/50V
33pF 14 B2 A1 C6123
[19] D1N_A D2- COMP ISET
GND
15 [4] R6101 NC
GND DISP_PWM0 0201 C6124 C6125 C6130
0201
[19] 16 0201
C6122
MIPI_DSI0_CLK_P_LCD CLK+
0201
17 33pF
change for better layout
B3
NC R6132
18
R6115
[19] MIPI_DSI0_CLK_N_LCD CLK- 10uF 0201 0201
19 1.0uF 330NF 62K
GND
20
[19] D2P_A D1+
21
NC
22
[19] D2N_A D1-
23 GND
GND
[19] 24
D3P_A D0+
25
[19] NC
D3N_A 26
D0-
27
[19] GND
LCM_AVDD +5.5V AVDD 28
[19] NC
LCM_AVEE -5.5V AVEE 29
1.8V VCI
30
IOVCC
VIO18_PMU 31
GND
[19] 32
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] LCM_LED_P LED1+
33
LED2+
[19] LED_S1 34
LED-
35
C6121 C6112 C6111 C6120 [19] LED_S2 LED2-
36
GND
37
[19] LCD_PWM PWM
0201 0201 0201 0201 NC 38 GND
33pF 33pF 1.0uF 33pF NC 39 NC
GND
C6119 C6113 C6114
J6103
40
GND 0201 0201 0201
33pF 33pF 33pF
GND
HTCA5
4 1 D0P_A
[5] TDP0 [19]
[5] TDN0 3 2
D0N_A [19]
EMI6101
[6,7,8,9,15,18,19,20,21,22] VSYS
C6104
R6133 0R SCL OUTN 40ma LCM_AVEE [19]
[5,20] MCAM_SCL0 0201 C2
[5,20] R6134 0R SDA
MCAM_SDA0 0201
B3 C3
R6104
R6102
PGND CFLY1
E1 PGND
A3 C6102 C6103
[5] TDP3 4 1 [19] C6106 D2 AGND CFLY2
D3P_A
3 2
0201
0201
[5] TDN3 D3N_A [19]
0201 KTD2151 4.7uF 10V 10uF 10V
EMI6103 1.0uF
100K
100K
NOVTEK/KTD2151EUO-TR
C2313/C2314 and C2317 are
GND GND
GND GND GNDGND suggested to use 10uF for
component de-rating
[5] TCP 4 1 [19]
MIPI_DSI0_CLK_P_LCD consideration.
[5] TCN 3 2 [19]
MIPI_DSI0_CLK_N_LCD
EMI6106
B
CTP(COF) B
T6101
T6102
T6103
T6104
T6105
T6100
T6106
NC
NC
NC
NC
NC
NC
NC
NC
0201
R6116
100K
0201
R6113
1 12
GND
[6] 2
VGP1_PMU VDD 3.3V
3
FT[WAKE]
[5] SDA2 4
SDA
[5] SCL2 5
SCL
[5] 6
EINT6_TP INT
[5] GPIO102_RST 7
RESET
8
1.8V ID
VIO18_PMU 9
ATMEL[IOVCC]
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] 10 11
GND
D6107 J6101
D6103 D6104 D6105 D6106 D6102
1.0uF
0201
10PIN CONN
GND
1.0uF
C6107
C6108
GND
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 19
OF 23
6 5 4 3 2 1
REVISION RECORD
D
Main Camera D
J6201 4 1 [20]
[5] RCP CAM_CLKP_A
DF37NC-30DS-0.4V(51) 3 2
[5] RCN CAM_CLKN_A [20]
C6208
[5] RDN3
1
DNI DF37NC-30DS-0.4V(51) EMI6202
1.0uF C6213
GND C6211 C6209
2
NC
1.0uF 1.0uF
C6207
GND
C6210
1.0uF
22uF
R6204 0402 0R
[5] RDP1 4 1 CAM_D1P_A [20]
3 2 CAM_D1N_A [20]
[5] RDN1
EMI6203
[7]
FLASH2
FLASH1
[5]
[5]
RDN0
RDP0
4
3
1
2
CAM_D0N_A
CAM_D0P_A
[20]
[20]
EMI6204
[6,7,8,9,15,18,19,21,22] VSYS
C2316
C2318
R6214
R6215
PL2302 0.47uH 3.7A
0603
0603
B1
100nF
10uF
SW
GND GND
A2
IN
0R
0R
U6202
C2320
C1 10uF GND
OUT
[5] GPIO95_TORCH_EN C3
TORCH/TEMP
B2
[5] GPIO96_FLASH_EN STROBE
C2 D3
[5] GPIO116_FLASH_CE HWEN LED1
R6221 0R D2
[4] GPIO80_FLASH_TX 0201 TX
[5] RDN2 4 1 CAM_D2N_A [20]
[5,8,15,21] SENS_SDA3 A3 D1 3 2
SDA LED2 [5] RDP2 CAM_D2P_A [20]
[5,8,15,21] B3
SCL
GND
SENS_SCL3
C EMI6205
C
2
1
1
A1
HL1 HL2
D6201 D6202
0201
0201
0201
R6210
R6211
R6212
100K
100K
100K
EMI6206
[5] RCP_B 3 2 [20]
CAM_CLKP_B
4 1 [20]
[5] RCN_B CAM_CLKN_B
C6221
DGND SGM2578
22
1
[20] CAM_D0P_B MDP1
23 EMI6208
[20] CAM_D0N_B MDN1
24 3 2
DGND
GND
GND
2
[5] RDN1_B CAM_D1N_B
NC
B GND
B
26
27
C6215
C6216
C6202 C6214
C6203
0201 0201
1.0uF 1.0uF
2
10uF
NC
1.0uF
0R
R6202 0402
Note 62-2: I2C control interface of front camera (with AF) must be assigned to I2C-2
bus when PIP/VIV feature be supported.
Note 62-3: Reserve a capacitor (27pF) on camera's MCLK and shunt it to GND to prevent GPS de-sense.
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 20
OF 23
6 5 4 3 2 1
REVISION RECORD
R6302
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
VIO18_PMU
R6301
0402
CAD
C6315
100K
0201
4.7uF
[6,7,8,9,15,18,19,20,21,22]
0R
[6,8,21] VIO28_PMU VSYS
39K 1%
0 0X0C
0201
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU
1 0X0D
R6306
8
U6303
VDD
2 3 AUX_IN0_NTC
[5,8,15,20,21] SENS_SDA3 C3 SDA VDD A1 [5] ALSP_INT_N INT LDR [4]
B3 C1
NTC6301
[5,8,15,20,21] SENS_SCL3 SCL VID
7 4
D A2 CAD TST A3
C6309 C6308
[5,8,15,20,21] SENS_SCL3
1
SCL LED_K
5
R6305
C6306
D
[5,8,15,20,21] SENS_SDA3 SDA LED_A 0402
0201
C2 B1 0R
NC
[5] MAG_RST RSTN VSS GND
1
100nF 100nF FV6303 1.0uF
10k 1%
YAMAHA/AK09911C C6316
U6302
GND GND
LTR-559ALS_C34 4.7uF
2
C6318
change for H3.4mm PAD 9
1
IR [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU
C6317
2
BMI160 I2C address : 0x68
LSM6DS3 I2C address : 0x6A 4.7uF
LED6301
IRLED3012/VSMY14940
BMI160: R6314, R6315 = NC
LSM6DS3: R6314, R6315 = 0R [5,8,15,20,21]
SENS_SDA3
[5,8,15,20,21]
SENS_SCL3
10K / 1%
10K
VIO18_PMU
10K / 1%
R6308
0201
0402
C
1
FV6301
PWM 38KHZ
1
FV6302
R6313
[5] B Q6301
R6315
VIO18_PMU GPIO129_IR_PWM0
14
13
12
U6305 0201
SDX
SCX
CSB
GND 1 11 R6311 0R [4]
R6319
GPIO91_BOARD_ID0
E
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] SDO OSDO(GND) 0201 [2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23]
2
[4] ADC2_BOARD_ID1
2
R6309 NC 2 10 R6312 0R GND VIO18_PMU
10K / 1%
0201 ASDX OSCB(GND) 0201
0201
10K
R6310 NC 3 9 GYRO_INT2_N_GPIO104 [5]
0201 ASCX INT2
VDDIO
100K
[5] 4 8 VIO28_PMU
0201
0402
ACCL_INT1_N_GPIO105 INT1 VDD [6,8,21]
GND
GND
VCC 6
U6304 B
1 A
R6314
GND
PWM 38KHZ
R6316
BMI120 Y 4
5
3 GND
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] 2 B
5 NC
VIO18_PMU [5] GPIO130_IR_PWM1
C6302
100nF
C6304 GND
NC
GND
100nF
GND
C C
FingerPrint-Sensor LESD8L5.0T5G
LESD8L5.0T5G
LESD8L5.0T5G
LESD8L5.0T5G
LESD9D5.0T5G
100nF
CON6301
SPI input output becare
FV6304 C6311
[5] EINT3_FP_INT 1 10 [5] WILL 2.8v
IRQ RST_N GPIO115_FP_RST
2 9 FP_SPI_MOSI [5]
GND_HOST MOSI U6306
3 8 FP_SPI_MISO [5]
GND_HOST MISO
[21] VFP_2.8V R6322 NC 4 7 FP_SPI_CS_N
0201 GND_HOST CS_N [5]
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU R6321 0R 5 6
0201 VDD1.8V SCLK FP_SPI_CLK [5] 4 1
[6,7,8,9,15,18,19,20,21,22] VSYS IN OUT VFP_2.8V [21]
[21] VFP_2.8V R6333 NC
0201
NC
GND
GND
[5] GPIO94_FP_LDO_EN EN
0201
C2502
R2505
5
C2501 0402
0201
R6334
FV6310 2.2uF
0402
2.2uF
FV6309
100K
LESD9D5.0T5G
C6313
LESD9D5.0T5G
100nF
B B
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21,23] VIO18_PMU
100nF
0201 4 1
VDD OUTPUT EINT10_HALL1 [5]
C117
AH1903-FA-7
5
NC
[5] EINT11_HALL2
3
SEL
do not connect anything
GND
U6301
2
USE AS gpio EN
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 21
OF 23
6 5 4 3 2 1
REVISION RECORD
SHIELDING
POPDDR
D SH6401 SH6405
D
SH6403 SH6407
1 SH6410
1
1 1
1
CX861_RF_PA_BASE
U1001-POP
CX861_BB_BUCK_BASE CX861_RF_WIFI_SHIELDING
CX861_BB_CPU_BASE CX861_RF_MAIN_BASE
POPDDR
SH6409
1
SH6406
SH6404
CX861_RF_WIFI_SHIELDING
1 SH6408
1
1
PCB
CX861_RF_PA_COVER
CX861_RF_MAIN_COVER
CX861_RF_MAIN_COVER
PCB1
PCB1
Test Point
[7,15,22]
TP6411 URXD0 [5]
VBUS_USB_IN
TP6401
TP6412
GND
UTXD0 [5]
TP6402
[5,22] USB_DM_P0 TP6413
[5,22] USB_DP_P0
TP6414
C FV6416 C
[6,7,8,9,15,18,19,20,21]
VSYS
[6] MICBIAS0
26
25
13 12
13 12 25
14 11 SPKR_OUT_M [18]
14 11 25
15 10
15 10 SPKR_OUT_P [18]
[18] MAIN_MIC_P 16 9
16 9
[18] MAIN_MIC_N 17 8
17 8
18 7 R6401 0201 0R GPIO132_KEYPAD [5]
18 7
19 6
[5,22] USB_DM_P0 19 6
20 5
[5,22] USB_DP_P0 20 5
21 4
21 4
[5,22] USB_ID 22 3
22 3
23 2
23 2
24 1
24 1
C6401
28
27
FV6411 FV6412 J1809 C6411
0201
1.0uF 33pF
VBUS_USB_IN
1
FV6410
[7,15,22] ESD5661D07-2/TR
2
C6414
VBUS_USB_IN
0201
33pF
B B
A A
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 22
OF 23
6 5 4 3 2 1
REVISION RECORD
D D
[2,3,5,6,7,9,10,11,14,15,16,18,19,20,21]
VIO18_PMU
SIM1 OUTSIDE
100K
R6501 NC
0201
0201
1
[3,6] VSIM1_PMU VCC1
R6511
3
[4] SIM1_SRST_6795 RST1
5 21 6512 1K
[4] SIM1_SCLK_6795 CLK1 DETECT 0201 INT_SIM1 [4]
4 20
VPP1 GND R6514 1K
J6502 0201 INT_SIM2 [4]
6
[4] SIM1_SIO_6795 IO1
2 ESD6521
GND
7
USB11
R6516 NC 8
0201 USB12
[3,6] VSIM2_PMU 9
ESD6504 VCC2
ESD6501 ESD6505 ESD6503 ESD6502 [4] SIM2_SRST_6795
11
RST2
[4] SIM2_SCLK_6795 13 17
C6501 CLK2 GND
18
GND
12 19
VPP2 GND
0201 22
GND
1.0uF [4] SIM2_SIO_6795 14 23
IO2 GND
24
GND
10 25
GND GND
26
GND
15 27
SIM2 INSIDE 16
USB21
USB22
GND
GND
28
C6507
0201
1.0uF
C C
B B
Power Key
TP6501
NC
TP6502
NC
TP6503
NC
TP6504
NC
FH34SRJ-6S-0.5SH(50)
1
R6510 1K 2 7
[6] PWRKEY R6507 0201 N21078821
GND
1K 3
N21078897
C6506
0201
33pF DNI
GND
A A
Schematic design notice of "65_PERI_Dual_SIM_ICUSB_KEYPAD" page.
Note 65-1: DO NOT put pull-up resistor on PWRKEY
COMPANY:
<Company Name>
TITLE:
DRAWN: DATED:
<Title>
<Drawn By> <Drawn Date>
CHECKED: DATED:
CODE: SIZE: DRAWING NO: REV:
<Checked By> <Checked Date>
QUALITY CONTROL: DATED:
<QC By> <QC Date> <Code> A0 <Drawing Number><Revision>
RELEASED: DATED:
<Released By> <Release Date> SCALE: <Scale> SHEET: 23
OF 23