I/O Cards: /conversion/tmp/scratch/515789649.doc February 2000 - Rev. 01

I/O CARDS
/conversion/tmp/scratch/515789649.doc
February 2000 - Rev. 01
TABLE OF CONTENTS I/O CARDS SDP TECHNICAL COURSE
TRAINING MANUAL
TABLE OF CONTENTS:
GENERAL.....................................................................................................................................................3
PBUS2 (process bus) interface.............................................................................................................5
Addressing.............................................................................................................................................5
P1 pin allocation...................................................................................................................................7
INSTALLATION............................................................................................................................... 8
OFF-LINE REPLACEMENT............................................................................................................. 8
ON-LINE REPLACEMENT.............................................................................................................. 9
AI 400..........................................................................................................................................................11
OVERVIEW.................................................................................................................................... 12
FUNCTION..................................................................................................................................... 12
Basic functions....................................................................................................................................12
Input range and filtering.....................................................................................................................13
Self diagnostics....................................................................................................................................13
Card type and revision........................................................................................................................14
OK/error indication............................................................................................................................14
PLD programming..............................................................................................................................14
TECHNICAL SPECIFICATION...................................................................................................... 15
CONFIGURATION......................................................................................................................... 16
P1 signal description..........................................................................................................................17
P2 connector.......................................................................................................................................17
DI 400..........................................................................................................................................................19
OVERVIEW.................................................................................................................................... 20
FUNCTION..................................................................................................................................... 20
Basic functions....................................................................................................................................20
Input isolation, current limiting and filtering....................................................................................21
PLD programming..............................................................................................................................22
CONFIGURATION......................................................................................................................... 24
P2 connector.......................................................................................................................................25
AOV 406......................................................................................................................................................27
OVERVIEW.................................................................................................................................... 28
FUNCTION..................................................................................................................................... 29
Basic functions....................................................................................................................................29
Input range and filtering.....................................................................................................................30
Output range and drive capability......................................................................................................30
Fail-safe outputs..................................................................................................................................31
PLD and micro-controller programming...........................................................................................33
CONFIGURATION......................................................................................................................... 34
DIP-switch S1 bit 1, 2 and 3 settings.................................................................................................35
P2 and P3 connector...........................................................................................................................36
Page 2  Kongsberg Simrad AS Feb. 2000

Training
GENERAL
This document contains information that applies to all

the Hardware Module Descriptions in this document.
GENERAL I/O CARDS SDP TECHNICAL COURSE
TRAINING MANUAL
Terms and acronyms
ADC Analog to Digital Converter.

AI 400 Analog Input card series 400
ESD Electrostatic Discharge
GND Ground. 0 volt reference for all logic and signals
of the AI 400.
I/O Input/Output
KS Kongsberg Simrad
LED Light Emitting Diode
MUX Multiplexer (here: analogue multiplexer)
n.c. not connected
NU Not Used
PBUS Process Bus (I/O bus from the SBC)
PBUS2 Updated version of PBUS
PCB Printed Circuit Board
PLD Programmable Logic Device
SBC Single Board Computer
WD Watch Dog

Training
SDP TECHNICAL COURSE I/O CARDS GENERAL
TRAINING MANUAL
PBUS2 (process bus) interface

The PBUS2 interface on the card tolerate live insertion:
• All output buffers to the PBUS2 are of live-insertion type
that provide high output impedance until supply voltage is
normal.
• Ground and power have leading pins being 1.5 mm longer
than the other pins. This provide stable supply voltage on
the card when the signal pins are entered.
• All bus buffers are switched off by an on-board reset
generator which means that the output to bus is disabled as
long as the reset is active.
• Parity bits (one for each byte) are generated for all data
words enabled on the PBUS2. This means that if noise
should corrupt data at insertion, the data would be rejected.
• Only one load from each bus line on the card provide low
capasitive noise when the card is inserted.
Addressing
Each I/O card position on the backplane has a unique device
number. This device number is represented by the fixed wired
connector pins (X0 - X3) and the DIP-switch set bit (X4).
The PBUS2 address bits A6 to A10 (Module position and Rack)
are compared with X0 to X4 in the following way:
Figure 1 Principles of the address comparator
The address bits A0 to A5 are used for addressing devices

located on the I/O card.
Feb. 2000  Kongsberg Simrad AS Page 5

Training
TRAINING MANUAL
The PBUS2 address bits (A6 to A11) are split into the following
parts:
A11 A10 A9 A8 A7 A6
I/O Rack Module position
(0) Base device number
Table 1 Meaning of the address bits A6 to A11
If two card racks are linked and controlled by one SBC, this
linking must be specified by setting a DIP-switch bit controlling
X4 differently on the two backplanes. This DIP-switch setting
matches the address bit A10 (named Rack). (The setting of X3
and X4 are always wired as 0 on single and small type
backplanes such as BP406S, BP407S and MP406)
The address bit A11 specifies input or output operation (seen
from the SBC side). For AI 400 it will always be zero (read
data).
The maximum number of modules with two racks is 32 (16
modules placed in two racks) represented by the 5 bits A6 to
A10.
The following table defines the available card addresses seen
from the SBC software.
I/O slot Addresses of rack 1 Addresses of rack 2

no. (A10 = X4 = 0) (A10 = X4 = 1)
1 000 400
2 040 440
3 080 480
4 0c0 4c0
5 100 500
6 140 540
7 180 580
8 1c0 5c0
9 200 600
10 240 640
11 280 680
12 2c0 6c0
13 300 700
14 340 740
15 380 780
16 3c0 7c0

Training
TRAINING MANUAL
Table 2 Software card addresses for the two card racks

Training
TRAINING MANUAL
P1 pin allocation
A 160 pin male har-bus (VITA 1, 199 X) connector is provided
for connection to backplane. It is fully mateable with standard
DIN 41 612 C Europe-connector types.
Pin z a b c d
1 TMS DB 0 +5 V +5 V +5 V 1)
2 TCK DB 1 GND GND GND 1)
3 TDI DB 2 GND GND CH 17
4 TDO DB 3 n.c. n.c. GND
5 GND DB 4 GND GND CH 18
6 n.c. DB 5 +15 V +15 V GND
7 GND DB 6 GND GND CH 19
8 n.c. DB 7 -15 V -15 V GND
9 GND DB 8 n.c. n.c. CH 20
10 n.c. DB 9 PARITY1 X4 GND
11 GND DB 10 X3 X2 CH 21
12 n.c. DB 11 X1 X0 GND
13 GND DB 12 CH 1 GND CH 22
14 n.c. DB 13 CH 2 GND GND
15 GND DB 14 CH 3 GND CH 23
16 n.c. DB 15 CH 4 GND GND
17 GND AB 0 CH 5 GND CH 24
18 n.c. AB 1 CH 6 GND GND
25 CH 31 AB 8 CH 13 GND CH 28
26 GND AB 9 CH 14 GND GND
27 CH 32 AB 10 CH 15 GND CH 29
28 GND AB 11 CH 16 GND GND
29 n.c. MASTCL n.c. n.c. CH 30
30 n.c. STARTIO GND PARITY2 GND
31 n.c. PBUSINT GND GND GND 1)
32 n.c. READY +5 V +5 V +5 V 1)
Table 3 P1 pin allocation

Training
TRAINING MANUAL
1) Leading pin length of 1.5 mm for live insertion of

I/O card.
INSTALLATION
Caution ! Electrostatic charges can damage components on the card.
Notice the following precautions:
Always wear a properly connected earthing strap when
handling unpacked cards. Place unpacked cards only on a
properly connected earthing mat or a shielding bag. Keep
cards in their shielding bags when not installed. Never store
near electromagnetic or electrostatic devices.
1 Unpack the card,
2 Pull the eject lever and insert the card in its actual
position/slot in the I/O rack. Make sure that the top and
bottom card edges enter the card guides in the rack.
Caution ! Ensure to put the correct I/O card in the correct I/O card slot
on the backplane. In cases where TBAO or TBBA termination
boards are used, only PAO 122 and AOC 400 cards must be
connected to these. Other I/O cards in these positions will
destroy the tracks of the printed circuits backplane.
3 Push the lever to mate the connectors properly.
4 Turn on the power.
5 Verify the LED on the front is lit red.
6 Start the actual PCU.
7 Verify on the operator station screen that the card is
configured in the I/O system for the actual PCU.
8 Verify the LED on the front is lit green.
OFF-LINE REPLACEMENT
Note ! This procedure requires that the actual PCU is stopped. Local process
control is required. The power can be on.

Training
TRAINING MANUAL
1 Unpack the spare card and lay it down on a static-free

surface.
2 Pull the eject lever to remove the old card from the slot.
3 Pull the eject lever of the spare card and insert it in the
same slot as above. Make sure that the top and bottom
card edges enter the card guides in the rack.
6 Start the PCU.
ON-LINE REPLACEMENT
Note ! The following procedure applies to non-redundant systems and to
fully redundant systems. Do not use this procedure in systems where
redundant PCU’s share I/O.
Caution ! Electrostatic charges can damage integrated circuits on the
card. Notice the following precautions:
properly connected earthing pad. Keep cards in their shielding
bags when not installed. Never store near electromagnetic or
electrostatic devices.
1 Unpack the spare card and lay it down on a static-free
surface.
2 Pull the eject lever to remove the old card from the slot.
3 Pull the eject lever of the spare card and insert it in the
same slot as above. Make sure that the top and bottom
card edges enter the card guides in the rack.

Training
TRAINING MANUAL


Training
AI 400
Part no. 37970092
This document contains the Hardware Module

Description of the AI 400.
Important notice:
The information contained in this document shall remain

the sole exclusive property of Kongsberg Simrad AS, and
shall not be disclosed by the recipient to any third party
without the written consent of the company.
SDP TECHNICAL COURSE I/O CARDS AI400
TRAINING MANUAL
OVERVIEW
The AI 400 card is an interface between the Processor Bus
(PBUS2) and 32 analogue input channels.
The input voltage range is +/-10 Vdc. The ADC conversion
accuracy is +/-0.1% of full scale.
Built-in logic circuitry allows on-line self-diagnostics.
A LED on the front of the card is lit green whenever the card
is OK and red if an error is detected.
FUNCTION
Basic functions
Figure 2 AI 400 block diagram
The AI 400 can receive up to 32 voltage signals from the field.

It low-pass filters the signals and then guides them one at the
time through the Analogue Multiplexers for A/D conversion.
When the SBC performs a read-channel-x instruction and the
card address comparator in the PLD respond with ’match’,
the channel x value is multiplexed through the Analogue
Multiplexers, A/D converted and enabled to the bus as a 16
bit word through the Output data buffer to the PBUS2.

Training
AI 400 I/O CARDS SDP TECHNICAL COURSE
TRAINING MANUAL
The SBC reads one value at the time from AI 400 by

addressing the card and one specific card device. The card
device can either be one of the 32 channels or one of several
registers in the Register and Control Logic PLD.
Input range and filtering

There are 32 single-ended input channels. All are referred to
GND and have +/-10 Vdc as maximum measurement range.
The signals are fed through first order low-pass filters (R/C).
The low-pass filters will protect against over-voltage spikes.
However, over-voltage protection must be provided on the
termination boards.
Self diagnostics
A self diagnostic system is built into the AI 400 card that
verify most functionality.
Testing MUXs and ADC

Four different test voltages are provided on eight specific
MUX inputs to verify the correctness of MUX addressing and
conversion in the ADC. The voltages are:
• +5 Vref.
This voltage is made from the +15 Vdc supplied to the
card.
• Ca. 0 V
This voltage is made by splitting the +/-15 Vdc supplied to
the card.
• VCC (ca. +5 Vdc)
• GND (0V)
Parity tests on data

SBC checking on data word parity, secures all data
transmission from AI 400. Wrong data will not be used by the
SBC.
PLD tests
By reading fixed test-patterns, internal registers and all data
lines can be tested and give a status of correctness.

Training
TRAINING MANUAL
Note ! Redundant SBCs sharing I/O, can both perform self testing on
same I/O cards without having conflicts.
Card type and revision

Each card contains a type specific identification code (ID-
code). This ID-code identifies the type of card (DI400, DO400,
AI400, ..) installed in that position. Thus, the system can
verify that the correct card type is installed in each required
slot. The PLD-ID and release can also be supervised in this
manner.
OK/error indication
A bi-colour (red/green) LED on the front of the card indicates
the status of the AI 400 card. A watch dog, controlled from
the SBC, drives the LED.
• Green light indicates that the SBC sends module-alive
messages to the card. This means that the SBC can see no
error with this card.
In a system with no errors all the I/O card LEDs light
green.
• Red light indicates that the card is not running in the
system.
The reason for the red light can be:
- the SBC has stopped.
- the watch dog on the card has timed out.
- the SBC has discovered a self diagnostics error on the
I/O card and sends a module error messages to it that
turns on the red LED.
Note ! When a new card is inserted, the LED is red until the SBC starts
sending module-alive messages to the card.
PLD programming
The card has a socket named P2 to which equipment for programming the PLD on the card can be
connected.

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TRAINING MANUAL
TECHNICAL SPECIFICATION
Power supply requirements

Voltage 5 V ±5%, ±15V ±10%
Max power consumption 1.5 W
(Typical 65 mA current
consumption at the 24 Vdc power
supply)
Attributes specification
Watch Dog out-time 6.7 sec.
Voltage reference for test (+5 Vref.) +5.000 Vdc, +/-0.15%, +/-12ppm/C
temp. stability
Channel specification
Number of channels 32 single ended
Input impedance >10 M
Input filter Low pass, ca. 500 Hz
Measurement ranges +/-10 Vdc
Maximum input voltage 35 Vdc
Converter specification
Resolution 16 bits
Conversion time max. 15 usec.
Measurement accuracy +/-0.1% of full scale +/-10 Vdc,
typical 0.05%
Mechanical specification
Size (Single Euro PCB) 160 x 100 mm
Minimum board spacing 20.5 mm
Environmental requirements
Refer to Simrad Environmental Specification, reg. no.: 848-161011
Live cycle specification
(2)
MTBF calculated 93,548 h
(2) MTBF calculated according to MIL-HDBK-217E (T=35°C,

env=NS)
Table 4 Technical specification

Training
TRAINING MANUAL
CONFIGURATION
Figure 3 AI 400 component location
There are no configurable parts on the AI 400 card.

The LED (D1), giving status information, is located on the
front of the card.
A lever is supplied on the card front to easily mate the
connectors when inserting the card and to eject the card. The
lever can also be used to put labels on.

Training
TRAINING MANUAL
P1 signal description
AB 0 to 11 PBUS address lines. AB11 specify input or
output instruction. AB11 active is output
instruction from SBC.
CH 1 to 32 Forward signal of I/O channel (to the
termination board).
DB 0 to 15 PBUS bi-directional data lines.
GND Ground reference.
MASTCL Master clear signal of PBUS2.
n.c. not connected
PBUSINT PBUS interrupt.
PARITY1 and 2 PBUS data lines parity bit. ODD parity. Parity1
for low byte (0 - 7) and Parity2 for high byte (8 -
15).
READY PBUS ready signal. To be terminated with 4.7
kohm to +5 Vdc on the SBC.
STARTIO PBUS address strobe.
TDI, TDO JTAG signals for PLD programming.
TMS, TCK JTAG signals for PLD programming.
X0 to X4 X 0 - 3 are slot address bit for I/O card
identification. X4 identifies one of two racks.
+5 V 5 Vdc power supply.
+15 V +15 Vdc power supply for analogue use.
-15 V -15 Vdc power supply for analogue use.
P2 connector
A 6 pin socket is provided for PLD programming and should
not be used for any other reason.

Training
TRAINING MANUAL

Training
DI 400
Part no. 37960035

Description of the DI 400.
Important notice:

SDP TECHNICAL COURSE I/O CARDS DI400
TRAINING MANUAL
OVERVIEW
The DI 400 is an interface between the Process Bus and 32
isolated digital inputs.
An optocoupler is included for each channel to isolate the
field and the SBC side from each other.
Power to the field loops must be supplied via an adjacent
termination board.
A LED on the front of the card is lit green whenever the card
is OK and red if an error is detected.
FUNCTION
Basic functions
Figure 4 DI 400 block diagram
The DI 400 receives up to 32 digital signals from the field. It

low-pass filters the signals and saves them in two 16 bit
registers on the card.

Training
DI 400 I/O CARDS SDP TECHNICAL COURSE
TRAINING MANUAL
The SBC reads the 32 channel values from the DI 400 by

addressing the specific registers on the card. If the card
address comparator in the PLD respond with ’match’, the
channel values, represented as 16 bit words, and the two
corresponding parity bits are enabled to the Process Bus
(PBUS2) through the output data buffer.
Input isolation, current limiting and filtering
Figure 5 Circuit diagram of channel input
The channels are galvanic isolated from each other and from
the PBUS side by optocouplers.
The low-pass filters protect against over-voltage spikes
through the current limiting resistor. However, over-voltage
protection must be provided on the termination boards.
The channels are fed through first order low-pass filters (R/C)
that limits the influence from high frquency noise.
A reverse diode on each channel protects against reverse
voltage that can violate the optocoupler input.
Self diagnostics
A self diagnostic system is built into the DI 400 card that
Testing input optocouplers

Bit patterns are set on the basis of the input optocouplers and
read into the PLD to verify these components and their
connection to the PLD.

Training
TRAINING MANUAL

SBC checking on data word parity, secures all data
transmission from DI 400. Wrong data will not be used by the
SBC.
PLD tests

code). This ID-code identifies the type of card (DI 400, DO
400, AI 400, ..) installed in that position. Thus, the system can
slot. The PLD-ID and release can also be supervised in this
manner.
OK/error indication
the status of the DI 400 card. A watch dog, controlled from
green.
system.
- the watch dog on the card has timed out.

Training
TRAINING MANUAL
PLD programming
The card has a socket named P2 to which equipment for
programming the PLD on the card can be connected.

Training
TRAINING MANUAL

Voltage 5 V +5% / -5%
Power consumption min. 0.3 A, max. 0.4 A
Channel specification
Number of channels 32
Isolation Optocoupler
(3)
Isolation voltage 50 Vdc
Max input voltage 50 Vdc
Loop voltage 24 Vdc ”25%
Input current (typical) 5 mA at 24 V
Channel ’OFF’ current < 0.1 mA
Channel ’ON’ current > 3 mA
Max input frequency 4 kHz, 50% duty cycle
Watch Dog time-out 6.7 sec.
Size (Single Euroboard) 160 x 100 x 20.3 mm
(4)
(3) The indicated isolation voltage is not the component value but the
true potential difference which may be applied between channel
terminals without damaging any part of the I/O card.
env=NS)

Training
TRAINING MANUAL
CONFIGURATION
Figure 6 DI 400 component location
There are no configurable parts on the DI 400 card.

front of the card.
connectors when inserting the card and to eject the card. The
lever can also be used to put labels on.

Training
TRAINING MANUAL
CH 1 to 32 Forward signal of I/O channel (to the
termination board).
CH 1G to 32G Return signal of I/O channel (from the
termination board).
GND Ground reference.
MASTCL Master clear signal of PBUS2.
n.c. not connected
15).
READY PBUS ready signal.
X0 to X4 X 0 - 3 are slot address bit for I/O card
reservedX Forward signal of channels reserved for I/O
special functions.
reservedXG Return signal of channels reserved for I/O
special functions.
P2 connector
A 6 pin socket is provided for PLD programming and should
not be connected to for any other reason.

Training
TRAINING MANUAL

Training
AOV 406
Part no. 37982675

Description of the AOV 406.
Important notice:

AOV 406 I/O CARDS SDP TECHNICAL COURSE
TRAINING MANUAL
OVERVIEW
The AOV 406 card is an interface between the Process Bus
(PBUS2), and 26 single-ended analogue input and six single-
ended analogue output channels.
Figure 7 Simplified block diagram
The maximum input signal range is ±10 Vdc (referred to the

card’s GND).
The output channels provide voltage signal in the range ±10
Vdc (referred to the card’s GND).
When the self-diagnostic software is running, a LED on the
front of the card is lit green whenever the card is OK and red
if an error is detected.
Suitable barriers and termination boards must be used to
condition the signals from other field formats than ±10 Vdc
and to provide galvanic isolation between the field signals
and the PBUS2.

Training
SDP TECHNICAL COURSE I/O CARDS AOV 406
TRAINING MANUAL
FUNCTION
Basic functions
Analogue inputs
Figure 8 AOV 406 input part block diagram
The AOV 406 receive 26 voltage signals (Ch. 1 - 10 and 17 -

32) from the field. It low-pass filters the signals and then
guides them one at the time through the Analogue
Multiplexers for A/D conversion.
When the SBC performs a read-channel-x instruction and the
card address comparator in the PLD respond with ’match’,
the channel-x value is multiplexed through the Analogue
Multiplexers. The channel-x value is further A/D converted
and enabled to the bus as a 16 bit word through the Output
data buffer to the PBUS2.
The SBC reads one value at the time from AOV 406 by
addressing the card and one specific card device. The card
device can either be one of the input channels or one of
several registers in the Register and Control Logic PLD .

Training
TRAINING MANUAL
Analogue output
Figure 9 AOV 406 output part block diagram
A micro-controller is used as “Refresh logic and registers”.

The twelve bit data words (D4-D15) for each output channel
are stored in the registers of the micro-controller. The data
words are one by one converted in the serial DAC to a
voltage signal and routed via the output multiplexer to the
appropriate sample&hold circuitry. The voltage output (±10
Vdc) from the sample&hold amplifier is fed through a switch
via a PTC resistor to the output terminal Vout. The switch is
used both to set fail-safe level to output and to select output
channels.
The voltage signals held by the 16 sample&hold circuits are
refreshed by the micro-controller.
Input range and filtering

There are 26 single-ended input channels available. All are
referred to GND and have +/-10 Vdc as maximum
measurement range.
The signals are fed through first order low-pass filters (R/C).
The low-pass filters will protect against over-voltage spikes.
However, over-voltage protection must be provided on the
termination boards.
Output range and drive capability

The six output channels (Ch. 11 - 16) have equal
characteristics.
The voltage output has the range: ±10 Vdc.

Training
TRAINING MANUAL
Fail-safe outputs
The fail-safe mechanism has two levels for this card. They
are:
• If contact with the SBC is lost, but the card itself functions
OK, the PLD watch dog is triggered and forces the fail-safe
values initially programmed to be set out by the micro-
controller.
The fail-safe values may be programmed for each channel
and can be:
- the last received and accepted values from the SBC.
- 0 Vdc.
• If the refresh mechanism on the card is defect, the refresh
watch dog opens the analogue switches and set all outputs
to 0 Vdc.
Self diagnostics
A self diagnostic system is built into the AOV 406 card that
Testing input MUXs and ADC

Four different test voltages are provided on eight specific
MUX inputs to verify the correctness of MUX addressing and
conversion in the ADC. The voltages are:
• +5 Vref.
This voltage is made from the +15 Vdc supplied to the
card.
• Ca. 0 Vdc
This voltage is made by splitting the ±15 Vdc supplied to
the card.
• VCC (ca. +5 Vdc)
• GND (0Vdc)
Testing the output components

The output circuitry comprises the serial DAC, the analogue
multiplexers, and 16 groups of sample&hold and analogue
switch.
These components are verified for each output channel by the
SBC that reads back and compares the voltage signals with
the values originally set out (see Figure 7).

Training
TRAINING MANUAL

The SBC checks parity on data words from the card. Data
words with parity error will not be used by the SBC.
Parity error on data from the SBC implies that the data word
is not used by the I/O card and the PLD watch dog is not
updated. Dependent of the watch dog time setting, repeated
errors will trigger the watch dog and put the card into an
error state.
PLD and micro-controller tests


code). This ID-code identifies the type of card (DI400, DO400,
AI400, ..) installed in that position. Thus, the system can
slot. The PLD and micro-controller ID-code and release can
also be supervised in this manner.
OK/error indication
the status of the AOV 406 card. A watch dog, controlled from
green.
system.
- the PLD watch dog or the refresh watch dog on the
card has timed out.

Training
TRAINING MANUAL

PLD and micro-controller programming

The card has two sockets (P2 and P3) to which equipment for
programming the PLD and the micro-controller on the card
can be connected.
Voltage +5 Vdc ±5%, ±15 Vdc ±10%
Max power consumption 4.5 W
(Typical 170 mA current
consumption at 24 Vdc input of the
SBC 400 power supply)
Voltage reference for input test (+5 Vref.) +5.000 Vdc, +/-0.15%, +/-12ppm/C
temp. stability
Output channel specification
Number of channels 6 (analogue, voltage type, single
ended )
Output voltage range ±10 Vdc ±0.1%
Typical internal output resistance 70 Ohm
Maximum input voltage tolerated on 24 Vdc (protected by PTC and
voltage output ch. 1 - 16 tranzorbers)
Output converter specification
DAC resolution 12 bits
Output failsafe
At POWER ON All outputs to zero
PLD watchdog activated Zero (default)
Failsafe output modes (programmable) Zero or ’keep last value’
PLD watch dog time out 6.7 sec. default (0.42 - 13.44 s.)
Refresh watch dog activated All to zero (Voltage outputs
100kOhm to GND)
Refresh watch dog time out 0.1 sec.
Input channel specification
Number of channels 26 single ended (32 internal)
(not ch. 11 - 16)
Input impedance Ch. 1 - 10: 330k
Ch. 17 - 32: >10 M
Input filter Low pass, ca. 500 Hz

Training
TRAINING MANUAL
Measurement ranges +/-10 Vdc

Maximum input voltage 35 Vdc
Input converter specification
Resolution 16 bits
Conversion time max. 15 usec.
Measurement accuracy ±0.1% of full scale ±10 Vdc, typical
0.05%
Size (Single Euro PCB) 160 x 100 x 20.3 mm
(2)

env=NS)
CONFIGURATION
Figure 10 AOV 406 component location

front of the card.

Training
TRAINING MANUAL

connectors when inserting and to eject the card. The lever can
also be used to put labels on.
DIP-switch S1 bit 1, 2 and 3 settings

The DIP-switch S1 bit 1, 2 and 3 are used to set the
operational mode of the card. Bit 4 of the DIP-switch is not
used.
Selection S1 bit 3 S1 bit 2 S1 bit 1 Function

1 Closed Closed Closed Inputs: Ch. 1 - 10 and 17 - 32, Outputs: Ch. 11 - 16
2 Closed Closed Open Illegal combination
2 Closed Open Closed Illegal combination
4 Closed Open Open Illegal combination
5 Open Don’t Don’t Test mode, Inputs: Ch. 1 - 32, Outputs: none
care care
Table 7 Configuring the number of output channels
CH 1 to 16 Input or output channels (to/from the
termination board).
CH 17 to 32 Input channels (from the termination board).
FSOUT Fail-safe TTL output.
GND Ground reference for all signals.
MASTCL Master clear signal of PBUS2, not connected
here.
n.c. not connected
15).
READY PBUS ready signal. To be terminated with 4.7
kohm to +5 Vdc on the SBC.

Training
TRAINING MANUAL
X0 to X4 X 0 - 3 are slot address bits for I/O card

+15 V +15 Vdc power supply for analogue use.
-15 V -15 Vdc power supply for analogue use.
P2 and P3 connector
Two 6 pin sockets are provided for PLD (P2) and micro
controller (P3) programming and should not be connected to
for any

Training

I/O Cards: /conversion/tmp/scratch/515789649.doc February 2000 - Rev. 01

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I/O CARDS

Page 2  Kongsberg Simrad AS Feb. 2000

This document contains information that applies to all

Terms and acronyms

ADC Analog to Digital Converter.

Page 4  Kongsberg Simrad AS Feb. 2000

PBUS2 (process bus) interface

Figure 1 Principles of the address comparator

The address bits A0 to A5 are used for addressing devices

Feb. 2000  Kongsberg Simrad AS Page 5

Table 1 Meaning of the address bits A6 to A11

I/O slot Addresses of rack 1 Addresses of rack 2

Page 6  Kongsberg Simrad AS Feb. 2000

Table 2 Software card addresses for the two card racks

Feb. 2000  Kongsberg Simrad AS Page 7

Table 3 P1 pin allocation

Page 8  Kongsberg Simrad AS Feb. 2000

1) Leading pin length of 1.5 mm for live insertion of

Feb. 2000  Kongsberg Simrad AS Page 9

1 Unpack the spare card and lay it down on a static-free

Page 10  Kongsberg Simrad AS Feb. 2000

5 Verify the LED on the front is lit red.

Feb. 2000  Kongsberg Simrad AS Page 11

Part no. 37970092

This document contains the Hardware Module

The information contained in this document shall remain

Figure 2 AI 400 block diagram

The AI 400 can receive up to 32 voltage signals from the field.

Feb. 2000  Kongsberg Simrad AS Page 13

The SBC reads one value at the time from AI 400 by

Input range and filtering

Testing MUXs and ADC

Parity tests on data

Page 14  Kongsberg Simrad AS Feb. 2000

Card type and revision

Feb. 2000  Kongsberg Simrad AS Page 15

Power supply requirements

(2) MTBF calculated according to MIL-HDBK-217E (T=35°C,

Table 4 Technical specification

Page 16  Kongsberg Simrad AS Feb. 2000

Figure 3 AI 400 component location

There are no configurable parts on the AI 400 card.

Feb. 2000  Kongsberg Simrad AS Page 17

Page 18  Kongsberg Simrad AS Feb. 2000

Feb. 2000  Kongsberg Simrad AS Page 19

Part no. 37960035

This document contains the Hardware Module

The information contained in this document shall remain

Figure 4 DI 400 block diagram

The DI 400 receives up to 32 digital signals from the field. It

Feb. 2000  Kongsberg Simrad AS Page 21

The SBC reads the 32 channel values from the DI 400 by

Input isolation, current limiting and filtering

Figure 5 Circuit diagram of channel input

Testing input optocouplers

Page 22  Kongsberg Simrad AS Feb. 2000

Parity tests on data

Card type and revision

Feb. 2000  Kongsberg Simrad AS Page 23

Page 24  Kongsberg Simrad AS Feb. 2000

Power supply requirements

Feb. 2000  Kongsberg Simrad AS Page 25