II8051/8032 ASSENIBLER COURSE - 7

and the extension board (Part 3) are
shown in Fig. 46. The diagram shows how
the various jumpers enable the 8051 serial
interface to be connected to a PC (via the
9 -way sub -D connector) or a MIDI com-
patible instrument.
EMON51 communication
Studying a worked out example is pro-
bably the best way to familiarize oneself
with the programming of the serial inter-
face. Let us look at the listing in Fig. 47.
This program is a series of subroutines
contained in EMON51 relevant to com-
munication via the
'stitched together' to show how you can
make use of them for your own program-
ming work. Each of the points to be ob-
served in programming the serial interface
will be discussed below, with reference to
certain parts of the listing. Note that this
program is not contained on your course
disk.
Baudrate generator
We wish to use mode 1 of the serial inter-
face. In this mode, the baudrate is deter-
mined either by Timerl or Timer2.
Remember. Timer2 is not available if you
INS 1.55 CB:
-f EASKEI
T
0707 : taken fr,in EMSI-A51
V24.152
;?SW
use a 8031 or 8051 (i.e., TCLK=0 and
RCLCK=0 in Fig. 45). In the interest of
software compatibility we will. therefore,
set the baudrate with the aid of Timerl.
The 'counter overflow' pulses produced
by this timer are fed to the transmit and
receive controls. To ensure a continuous
supply of pulses, the timer is operated in
mode 2. i.e., as an 8 -bit clock generator
with automatic reload. In this way, the
timer is capable of producing an overflow
every n microseconds on the basis of the
1 -MHz internal clock (quartz oscillator
frequency 12 MHz). where n is a whole
number between 2 and 256. Additionally,
serial interface, we can switch on the divide -by -two scaler
by setting the SMOD bit (SFR PCON
bit 7). The final baudrate clock is anived
at by dividing the clock signal by 16. If
SMOD=1, we get:
Baudrate = (overflow rate Timerl )/16
alternatively, if SMOD=0,
Baudrate = (overflow rate Timerl )/32
In the system monitor software,
EMON51. the following is done to obtain
a baudrate of about 4.800. First. Timerl is
set to auto -preload mode with internal
(V.74XAM.71.)
SCUP
214-13
177- 4,tinitiinr:
E-,:0106
:
clock (here: 1MHz). See line 22 in
Fig. 47. The preload value is 243 dines 4,
24 and 25). which causes Timerl to divide
by (256-243) = 13. SMOD is set to ' l' in
line 21 to disable the ÷2 scaler. Thus, the
baudrate becomes
1 MHz/13/16 = 4,807.6923 bits/s
That is not exactly 4,800 baud, but suffi-
ciently accurate for our application.
After being preloaded and set to the de-
sired mode. Timerl is switched on by set-
ting TCON bit 6 (line 26). The baudrate
generator is now running.
As an aside. Timer2 contained in the
8052 and 8032 may. of course. also be
used as the baudrate generator. This can
be achieved by setting bits TCLK and
RCLK in the Timer2 control register,
T2CON. Since T2CON contains the value
OOH after a reset. the 8052 always starts
with Timerl as the baudrate generator
(which ensures that programs written for
the 8051 run on a 8052 too!).
The standardized baudrates (1200,
2400. 4800. etc.) can be achieved exactly
by using a crystal clock of 11.0592 MHz
rather than 12 MHz. However, a processor
cycle then takes 0.9044225 us rather than
1 us exactly. Obviously, the deviation
from 1µs may be annoying in calculating
loop times, since all the internal timing of
the 8051 is derived from the quartz crystal
clock oscillator. This dilemma, by the
way, has resulted in the integration of on -
chip baudrate generators in follow-up
controllers such as the 80535 and 80537.

whose serial interfaces are capable of op-

E212' 4239
erating at 4,800 baud and 9,600 baud ex-
7.201:
12:5 2576
_110596 actly. while a 12 MHz quartz crystal is
Ect) 097E
EGA 0.211
used. More about these interesting proces-
5011
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sors in future issues of Elektor
471,JE ECFC 0996 Electronics.
0'1:1 SO: OSOB 71M: counter tnr CR/LF tine

51
213 0
121 v243.27 85v 9ZCN.#809 : EVZ,5
Transmitting
Zt52 I'S 59 2: 121 MCV TIOM,41211 : tatb countezo a: I.L.me.
7:06
.:04 75 EL 13 (21 2457 711..V241ED
actK-2. am --2 in 70.0U atoo
preload value 7. _=_ (boudrato gene:a...1 Transmitting a byte is very simple: write
'lll '1 ER 13
7: 9E
121 '221' 71.1,9V24E75
3E2B it05.1 :tart counter
it to the SBUF register. The write opera-
(2!
etc.
125V SC0.1400521 : k517E 1, :1=1, 9-1.0 tion causes the transmitter control to start
:,0 99 ED (2! SlZ1 Ma 200N-1.013 : Walt until ca:. finally gone
the shift -out operation. The transmit reg-
7: 77 111 Cill SC5M.1
ESUF,A
: 71-C ister has a ninth bit position, which is
i. ,7 145V start trancoi
1: 'A CD
111
(21 2:7179:
:
A,*::,0M2 : 51' rent: loaded with a I' at the start of the trans-
F: 121 WA:MR MOI: 0::::.*:10 if or vait tar sliv tirilltng ternin&lo
111 1011 100V 4-$:99
:
mit operation. Next, the start bit (0=1ow)
F7 [21 E412 DMZ is transmitted (Fig. 46).
Ft 121 .:1Z CNV:,:.
121
121 21:7
1'5V
A.E7
A.17: Next, the eight databits are shifted out,
r Fir,
starting with bit 0. The SBUF transmit
..J
43
::7
002C C2 93 111
0T7,:11, "=
90 78 FD 121 0E771 :NB
C1.1
sz.:N... rn, ,..__able register is filled with zeroes_ When the
44
41
002E ES 99
0034 22
(1)
Fl.:7
A.S1U1' ninth bit (i.e.. the stop bit with value '1'
121
44 0031 has been sent. the TI hit in the SCON reg-
47 mal 20 15 03 121 7S7C :9
41 0024 74 00 111 A,*0 :
test it rnarai-=. 7nere return 1
no ister is made I' (Fig. 44) to mark the end
47 3034 22
t1 0037 74 01
121
111 iiiner
AE:
M:v A,51 of the transmission. This allows an inter-
51
12
0027 22
0023
121
.
7E7 rupt to be generated (by setting the rele-
12 0423,
316101.730_1 12. ayet,lt./
S.51 vant bit in the interrupt enable register). It
._ :0913rEW :002-.:
:0098 71033 :0097
ACZ :00E0
TO :001/
F7,77: :0711
711 :071
is also possible to interrogate this bit by
:0098 SEur :00911 CNII :0050 V7.44E7 :0000 software (polling), to check for the end of
:0011 639176 :0019 1411 :COM 1,5E2 :0020
Cr2 :0028 sgrcim :0029 22.721 :7027 7512 :0031 the transmission.
iother. :0027
910109.7 EMON51 contains a subroutine called
SND (lines 30 to 39 in Fig. 47) that en-
ables a character held in the accumulator
Fig. 47. Serial interface subroutines contained in EMON51. to be transmitted via the serial interface.
ELEKTOR ELECTRONICS OCTOBER 1992