5 4 3 2 1

REV Description Date

V1.0 First Release 2018-3-06

D D

FPGA 核心板
AC7100 Schematics
C C

B B

Page Number Description

Page01 Cover Page

Page02 Block Diagram
Page03 FPGA BANK0
Page04 FPGA BANK13/14
Page05 FPGA BANK15/16
Page06 FPGA BANK34/35
Page07 FPGA BAN216
Page08 FPGA Power
A A

Page09 DDR3
Page10 CLOCK&FLASH
Page11 POWER Title
Cover Page
Page12 Connector Size Document Number Rev
1.0
AC7100核心板 Schematics
Date: Thursday, December 06, 2018 Sheet 1 of 12
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Http://www.heijin.org
Title
AC7100 BLOCK DIAGRAM

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 2 of 12
Rev
1.0

5 4 3 2 1
 5 4 3 2 1

J1

FPGA_TMS 1
FPGA_TDI 2
FPGA_TDO 3
FPGA_TCK 4
5
+3.3V 6
D D

U1-1 CON6
BANK0
N10
DXP_0 N9
DXN_0 L10 XADC_VP
VP_0 XADC_VP 11
M9 XADC_VN 11
VN_0 XADC_VN
V12 FPGA_TCK 11
TCK_0 T13 FPGA_TMS FPGA_TCK
TMS_0 FPGA_TMS 11
U13 FPGA_TDO 11 +3.3V +3.3V +1.8V AVCC +1.8V
TDO_0 R13 FPGA_TDI FPGA_TDO
TDI_0 FPGA_TDI 11
U12 R1 4.7K
INIT_B_0 N12 R2 4.7K
PROGRAM_B_0 U8
CFGBVS_0 G11 FPGA_DONE
DONE_0
M10
VREFP_0 L9
VREFN_0
E12 600Ohm@100MHz L1
VCCBATT_0 K10
VCCADC_0
U11 FPGA_M0 R5 1K
M0_0 U10 FPGA_M1
M1_0 U9 FPGA_M2
M2_0
C L12 QSPI_CLK 9 C4 C5 C
CCLK_0 QSPI_CLK 0.1uF 470nf
K9
GNDADC_0

MASTER SPI x4
xc7a100tfgg484 AGND AGND M[2:0] = 001

L2 600Ohm@100MHz

AGND

B B

+3.3V FPGA DONE LED +3.3V

POWER LEDD1
D2
R8 220
R9 220 FPGA_DONE R10 330
LED
LED

A A

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Title
AC7100 Bank0

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 3 of 12
Rev
1.0

5 4 3 2 1
 5 4 3 2 1

D D
U1-2

BANK13
11 B13_IO0 Y17
B13_IO0 B13_L1_P Y16 IO_0_13 AA10 B13_L9_P
11 B13_L1_P IO_L1P_T0_13 IO_L9P_T1_DQS_13 B13_L9_P 11
11 B13_L1_N AA16 AA11 B13_L9_N 11
B13_L1_N B13_L2_P AB16 IO_L1N_T0_13 IO_L9N_T1_DQS_13 V10 B13_L10_P B13_L9_N
11 B13_L2_P IO_L2P_T0_13 IO_L10P_T1_13 B13_L10_P 11
11 B13_L2_N AB17 W10 B13_L10_N 11
B13_L2_N B13_L3_P AA13 IO_L2N_T0_13 IO_L10N_T1_13 Y11 B13_L11_P B13_L10_N
11 B13_L3_P IO_L3P_T0_DQS_13 IO_L11P_T1_SRCC_13 B13_L11_P 11
11 B13_L3_N AB13 Y12 B13_L11_N 11
B13_L3_N IO_L3N_T0_DQS_13 IO_L11N_T1_SRCC_13 B13_L11_N
11 B13_L4_P AA15 W11 B13_L12_P 11
B13_L4_P IO_L4P_T0_13 IO_L12P_T1_MRCC_13 B13_L12_P
11 B13_L4_N AB15 W12 B13_L12_N 11
B13_L4_N IO_L4N_T0_13 IO_L12N_T1_MRCC_13 B13_L12_N
11 B13_L5_P Y13 V13 B13_L13_P 11
B13_L5_P IO_L5P_T0_13 IO_L13P_T2_MRCC_13 B13_L13_P
11 B13_L5_N AA14 V14 B13_L13_N 11
B13_L5_N IO_L5N_T0_13 IO_L13N_T2_MRCC_13 B13_L13_N
11 B13_L6_P W14 U15 B13_L14_P 11
B13_L6_P IO_L6P_T0_13 IO_L14P_T2_SRCC_13 B13_L14_P
11 B13_L6_N Y14 V15 B13_L14_N 11
B13_L6_N IO_L6N_T0_VREF_13 IO_L14N_T2_SRCC_13 B13_L14_N
11 B13_L7_P AB11 T14 B13_L15_P 11
B13_L7_P IO_L7P_T1_13 IO_L15P_T2_DQS_13 B13_L15_P
11 B13_L7_N AB12 T15 B13_L15_N 11
B13_L7_N IO_L7N_T1_13 IO_L15N_T2_DQS_13 B13_L15_N
11 B13_L8_P AA9 W15 B13_L16_P 11
B13_L8_P IO_L8P_T1_13 IO_L16P_T2_13 B13_L16_P
11 B13_L8_N AB10 W16 B13_L16_N 11
B13_L8_N IO_L8N_T1_13 IO_L16N_T2_13 B13_L16_N
T16 B13_L17_P 11
IO_L17P_T2_13 B13_L17_P
U16 B13_L17_N 11
IO_L17N_T2_13 B13_L17_N

xc7a100tfgg484

C C

U1-3
PUDC_B=1: Deactive internal Pull up Resister
BANK14

11 B14_IO0 P20 Y18 B14_L13_P 11

B14_IO0 IO_0_14 IO_L13P_T2_MRCC_14 B14_L13_P
+3.3V 9 QSPI_DQ0 P22 Y19 B14_L13_N 11
QSPI_DQ0 IO_L1P_T0_D00_MOSI_14 IO_L13N_T2_MRCC_14 B14_L13_N
9 QSPI_DQ1 R22 V18 B14_L14_P 11
QSPI_DQ1 IO_L1N_T0_D01_DIN_14 IO_L14P_T2_SRCC_14 B14_L14_P
9 QSPI_DQ2 P21 V19 B14_L14_N 11
QSPI_DQ2 IO_L2P_T0_D02_14 IO_L14N_T2_SRCC_14 B14_L14_N
9 QSPI_DQ3 R21 AA19 B14_L15_P 11
QSPI_DQ3 IO_L2N_T0_D03_14 IO_L15P_T2_DQS_RDWR_B_14 B14_L15_P
11 B14_L3_P U22 AB20 B14_L15_N 11
B14_L3_P IO_L3P_T0_DQS_PUDC_B_14 IO_L15N_T2_DQS_DOUT_CSO_B_14 B14_L15_N
R17 1K B14_L3_P 11 B14_L3_N V22 V17 B14_L16_P 11
B14_L3_N IO_L3N_T0_DQS_EMCCLK_14 IO_L16P_T2_CSI_B_14 B14_L16_P
11 B14_L4_P T21 W17 B14_L16_N 11
B14_L4_P IO_L4P_T0_D04_14 IO_L16N_T2_A15_D31_14 B14_L16_N
11 B14_L4_N U21 AA18 B14_L17_P 11
B14_L4_N IO_L4N_T0_D05_14 IO_L17P_T2_A14_D30_14 B14_L17_P
11 B14_L5_P P19 AB18 B14_L17_N 11
B14_L5_P IO_L5P_T0_D06_14 IO_L17N_T2_A13_D29_14 B14_L17_N
11 B14_L5_N R19 U17 B14_L18_P 11
B14_L5_N IO_L5N_T0_D07_14 IO_L18P_T2_A12_D28_14 B14_L18_P
9 QSPI_CS T19 U18 B14_L18_N 11
B QSPI_CS IO_L6P_T0_FCS_B_14 IO_L18N_T2_A11_D27_14 B14_L18_N B
11 B14_L6_N T20 P14 B14_L19_P 11
B14_L6_N IO_L6N_T0_D08_VREF_14 IO_L19P_T3_A10_D26_14 B14_L19_P
11 B14_L7_P W21 R14 B14_L19_N 11
B14_L7_P IO_L7P_T1_D09_14 IO_L19N_T3_A09_D25_VREF_14 B14_L19_N
11 B14_L7_N W22 R18 B14_L20_P 11
B14_L7_N IO_L7N_T1_D10_14 IO_L20P_T3_A08_D24_14 B14_L20_P
11 B14_L8_P AA20 T18 B14_L20_N 11
B14_L8_P IO_L8P_T1_D11_14 IO_L20N_T3_A07_D23_14 B14_L20_N
11 B14_L8_N AA21 N17 B14_L21_P 11
B14_L8_N IO_L8N_T1_D12_14 IO_L21P_T3_DQS_14 B14_L21_P
11 B14_L9_P Y21 P17 B14_L21_N 11
B14_L9_P IO_L9P_T1_DQS_14 IO_L21N_T3_DQS_A06_D22_14 B14_L21_N
11 B14_L9_N Y22 P15 B14_L22_P 11
B14_L9_N IO_L9N_T1_DQS_D13_14 IO_L22P_T3_A05_D21_14 B14_L22_P
11 B14_L10_P AB21 R16 B14_L22_N 11
B14_L10_P IO_L10P_T1_D14_14 IO_L22N_T3_A04_D20_14 B14_L22_N
11 B14_L10_N AB22 N13 B14_L23_P 11
B14_L10_N IO_L10N_T1_D15_14 IO_L23P_T3_A03_D19_14 B14_L23_P
11 B14_L11_P U20 N14 B14_L23_N 11
B14_L11_P IO_L11P_T1_SRCC_14 IO_L23N_T3_A02_D18_14 B14_L23_N
11 B14_L11_N V20 P16 B14_L24_P 11
B14_L11_N IO_L11N_T1_SRCC_14 IO_L24P_T3_A01_D17_14 B14_L24_P
11 B14_L12_P W19 R17 B14_L24_N 11
B14_L12_P IO_L12P_T1_MRCC_14 IO_L24N_T3_A00_D16_14 B14_L24_N
11 B14_L12_N W20 N15 B14_IO25 11
B14_L12_N IO_L12N_T1_MRCC_14 IO_25_14 B14_IO25

xc7a100tfgg484

A A

Http://www.heijin.org
Title
AC7100 Bank13/14

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 4 of 12
Rev
1.0

5 4 3 2 1
 5 4 3 2 1

D D

U1-4
BANK15
11 B15_IO0 J16 K18 B15_L13_P 11
B15_IO0 IO_0_15 IO_L13P_T2_MRCC_15 B15_L13_P
11 B15_L1_P H13 K19 B15_L13_N 11
B15_L1_P IO_L1P_T0_AD0P_15 IO_L13N_T2_MRCC_15 B15_L13_N
11 B15_L1_N G13 L19 B15_L14_P 11
B15_L1_N IO_L1N_T0_AD0N_15 IO_L14P_T2_SRCC_15 B15_L14_P
11 B15_L2_P G15 L20 B15_L14_N 11
B15_L2_P IO_L2P_T0_AD8P_15 IO_L14N_T2_SRCC_15 B15_L14_N
11 B15_L2_N G16 N22 B15_L15_P 11
B15_L2_N IO_L2N_T0_AD8N_15 IO_L15P_T2_DQS_15 B15_L15_P
11 B15_L3_P J14 M22 B15_L15_N 11
B15_L3_P IO_L3P_T0_DQS_AD1P_15 IO_L15N_T2_DQS_ADV_B_15 B15_L15_N
11 B15_L3_N H14 M18 B15_L16_P 11
B15_L3_N IO_L3N_T0_DQS_AD1N_15 IO_L16P_T2_A28_15 B15_L16_P
11 B15_L4_P G17 L18 B15_L16_N 11
B15_L4_P IO_L4P_T0_15 IO_L16N_T2_A27_15 B15_L16_N
11 B15_L4_N G18 N18 B15_L17_P 11
B15_L4_N IO_L4N_T0_15 IO_L17P_T2_A26_15 B15_L17_P
11 B15_L5_P J15 N19 B15_L17_N 11
B15_L5_P IO_L5P_T0_AD9P_15 IO_L17N_T2_A25_15 B15_L17_N
11 B15_L5_N H15 N20 B15_L18_P 11
B15_L5_N IO_L5N_T0_AD9N_15 IO_L18P_T2_A24_15 B15_L18_P
11 B15_L6_P H17 M20 B15_L18_N 11
B15_L6_P IO_L6P_T0_15 IO_L18N_T2_A23_15 B15_L18_N
11 B15_L6_N H18 K13 B15_L19_P 11
B15_L6_N IO_L6N_T0_VREF_15 IO_L19P_T3_A22_15 B15_L19_P
11 B15_L7_P J22 K14 B15_L19_N 11
B15_L7_P IO_L7P_T1_AD2P_15 IO_L19N_T3_A21_VREF_15 B15_L19_N
11 B15_L7_N H22 M13 B15_L20_P 11
B15_L7_N IO_L7N_T1_AD2N_15 IO_L20P_T3_A20_15 B15_L20_P
11 B15_L8_P H20 L13 B15_L20_N 11
B15_L8_P IO_L8P_T1_AD10P_15 IO_L20N_T3_A19_15 B15_L20_N
11 B15_L8_N G20 K17 B15_L21_P 11
B15_L8_N IO_L8N_T1_AD10N_15 IO_L21P_T3_DQS_15 B15_L21_P
11 B15_L9_P K21 J17 B15_L21_N 11
B15_L9_P IO_L9P_T1_DQS_AD3P_15 IO_L21N_T3_DQS_A18_15 B15_L21_N
11 B15_L9_N K22 L14 B15_L22_P 11
B15_L9_N IO_L9N_T1_DQS_AD3N_15 IO_L22P_T3_A17_15 B15_L22_P
11 B15_L10_P M21 L15 B15_L22_N 11
B15_L10_P IO_L10P_T1_AD11P_15 IO_L22N_T3_A16_15 B15_L22_N
11 B15_L10_N L21 L16 B15_L23_P 11
B15_L10_N IO_L10N_T1_AD11N_15 IO_L23P_T3_FOE_B_15 B15_L23_P
11 B15_L11_P J20 K16 B15_L23_N 11
B15_L11_P IO_L11P_T1_SRCC_15 IO_L23N_T3_FWE_B_15 B15_L23_N
11 B15_L11_N J21 M15 B15_L24_P 11
B15_L11_N IO_L11N_T1_SRCC_15 IO_L24P_T3_RS1_15 B15_L24_P
C 11 B15_L12_P J19 M16 B15_L24_N 11 C
B15_L12_P IO_L12P_T1_MRCC_15 IO_L24N_T3_RS0_15 B15_L24_N
11 B15_L12_N H19 M17 B15_IO25 11
B15_L12_N IO_L12N_T1_MRCC_15 IO_25_15 B15_IO25

xc7a100tfgg484

U1-5
BANK16
11 B16_IO0 F15 C18 B16_L13_P 11
B16_IO0 IO_0_16 IO_L13P_T2_MRCC_16 B16_L13_P
11 B16_L1_P F13 C19 B16_L13_N 11
B16_L1_P IO_L1P_T0_16 IO_L13N_T2_MRCC_16 B16_L13_N
11 B16_L1_N F14 E19 B16_L14_P 11
B16_L1_N IO_L1N_T0_16 IO_L14P_T2_SRCC_16 B16_L14_P
11 B16_L2_P F16 D19 B16_L14_N 11
B16_L2_P IO_L2P_T0_16 IO_L14N_T2_SRCC_16 B16_L14_N
11 B16_L2_N E17 F18 B16_L15_P 11
B16_L2_N IO_L2N_T0_16 IO_L15P_T2_DQS_16 B16_L15_P
11 B16_L3_P C14 E18 B16_L15_N 11
B16_L3_P IO_L3P_T0_DQS_16 IO_L15N_T2_DQS_16 B16_L15_N
11 B16_L3_N C15 B20 B16_L16_P 11
B16_L3_N IO_L3N_T0_DQS_16 IO_L16P_T2_16 B16_L16_P
11 B16_L4_P E13 A20 B16_L16_N 11
B B16_L4_P IO_L4P_T0_16 IO_L16N_T2_16 B16_L16_N B
11 B16_L4_N E14 A18 B16_L17_P 11
B16_L4_N IO_L4N_T0_16 IO_L17P_T2_16 B16_L17_P
11 B16_L5_P E16 A19 B16_L17_N 11
B16_L5_P IO_L5P_T0_16 IO_L17N_T2_16 B16_L17_N
11 B16_L5_N D16 F19 B16_L18_P 11
B16_L5_N IO_L5N_T0_16 IO_L18P_T2_16 B16_L18_P
11 B16_L6_P D14 F20 B16_L18_N 11
B16_L6_P IO_L6P_T0_16 IO_L18N_T2_16 B16_L18_N
11 B16_L6_N D15 D20 B16_L19_P 11
B16_L6_N IO_L6N_T0_VREF_16 IO_L19P_T3_16 B16_L19_P
11 B16_L7_P B15 C20 B16_L19_N 11
B16_L7_P IO_L7P_T1_16 IO_L19N_T3_VREF_16 B16_L19_N
11 B16_L7_N B16 C22 B16_L20_P 11
B16_L7_N IO_L7N_T1_16 IO_L20P_T3_16 B16_L20_P
11 B16_L8_P C13 B22 B16_L20_N 11
B16_L8_P IO_L8P_T1_16 IO_L20N_T3_16 B16_L20_N
11 B16_L8_N B13 B21 B16_L21_P 11
B16_L8_N IO_L8N_T1_16 IO_L21P_T3_DQS_16 B16_L21_P
11 B16_L9_P A15 A21 B16_L21_N 11
B16_L9_P IO_L9P_T1_DQS_16 IO_L21N_T3_DQS_16 B16_L21_N
11 B16_L9_N A16 E22 B16_L22_P 11
B16_L9_N IO_L9N_T1_DQS_16 IO_L22P_T3_16 B16_L22_P
11 B16_L10_P A13 D22 B16_L22_N 11
B16_L10_P IO_L10P_T1_16 IO_L22N_T3_16 B16_L22_N
11 B16_L10_N A14 E21 B16_L23_P 11
B16_L10_N IO_L10N_T1_16 IO_L23P_T3_16 B16_L23_P
11 B16_L11_P B17 D21 B16_L23_N 11
B16_L11_P IO_L11P_T1_SRCC_16 IO_L23N_T3_16 B16_L23_N
11 B16_L11_N B18 G21 B16_L24_P 11
B16_L11_N IO_L11N_T1_SRCC_16 IO_L24P_T3_16 B16_L24_P
11 B16_L12_P D17 G22 B16_L24_N 11
B16_L12_P IO_L12P_T1_MRCC_16 IO_L24N_T3_16 B16_L24_N
11 B16_L12_N C17 F21 B16_IO25 11
B16_L12_N IO_L12N_T1_MRCC_16 IO_25_16 B16_IO25

xc7a100tfgg484

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Http://www.heijin.org
Title
AC7100 Bank15/16

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 5 of 12
Rev
1.0

5 4 3 2 1
 5 4 3 2 1

+1.5V +1.5V

R18 R19
U1-6 10K 10K
BANK34 R14
100 1%
T3 R4 SYS_CLK_P 9
IO_0_34 IO_L13P_T2_MRCC_34 SYS_CLK_P
8 DDR3_A7 T1 T4 SYS_CLK_N 9
DDR3_A7 IO_L1P_T0_34 IO_L13N_T2_MRCC_34 SYS_CLK_N
8 DDR3_A13 U1 T5 DDR3_CKE0 8
D DDR3_A13 DDR3_A9 U2 IO_L1N_T0_34 IO_L14P_T2_SRCC_34 U5 DDR3_ODT DDR3_CKE0 D
8
8
DDR3_A9
DDR3_A8
DDR3_A8 V2
R3
IO_L2P_T0_34
IO_L2N_T0_34
IO_L14N_T2_SRCC_34
IO_L15P_T2_DQS_34
W6
W5
DDR3_RESET
DDR3_ODT
DDR3_RESET
8
8
USER LED
8 DDR3_CLK0_P LED1 R20 R21
DDR3_CLK0_P DDR3_CLK0_N R2 IO_L3P_T0_DQS_34 IO_L15N_T2_DQS_34 U6 10K 10K
8 DDR3_CLK0_N IO_L3N_T0_DQS_34 IO_L16P_T2_34
8 DDR3_A11 W2 V5
DDR3_A11 DDR3_A12 Y2 IO_L4P_T0_34 IO_L16N_T2_34 R6
8 DDR3_A12 IO_L4N_T0_34 IO_L17P_T2_34 +3.3V
8 DDR3_A6 W1 T6 RESET_N
DDR3_A6 DDR3_A10 Y1 IO_L5P_T0_34 IO_L17N_T2_34 Y6 B34_L18_P
8 DDR3_A10 IO_L5N_T0_34 IO_L18P_T2_34 B34_L18_P 11
8 DDR3_A5 U3 AA6 B34_L18_N 11
DDR3_A5 DDR3_A14 V3 IO_L6P_T0_34 IO_L18N_T2_34 V7 B34_L19_P B34_L18_N D3
8 DDR3_A14 IO_L6N_T0_VREF_34 IO_L19P_T3_34 B34_L19_P 11
8 DDR3_WE AA1 W7 B34_L19_N 11 LED
DDR3_WE DDR3_A4 AB1 IO_L7P_T1_34 IO_L19N_T3_VREF_34 AB7 B34_L20_P B34_L19_N
8 DDR3_A4 IO_L7N_T1_34 IO_L20P_T3_34 B34_L20_P 11
8 DDR3_S0 AB3 AB6 B34_L20_N 11
DDR3_S0 DDR3_A1 AB2 IO_L8P_T1_34 IO_L20N_T3_34 V9 B34_L21_P B34_L20_N
8 DDR3_A1 IO_L8N_T1_34 IO_L21P_T3_DQS_34 B34_L21_P 11
8 DDR3_BA1 Y3 V8 B34_L21_N 11
DDR3_BA1 DDR3_BA0 AA3 IO_L9P_T1_DQS_34 IO_L21N_T3_DQS_34 AA8 B34_L22_P B34_L21_N R11
8 DDR3_BA0 IO_L9N_T1_DQS_34 IO_L22P_T3_34 B34_L22_P 11
8 DDR3_A2 AA5 AB8 B34_L22_N 11 220
DDR3_A2 DDR3_A3 AB5 IO_L10P_T1_34 IO_L22N_T3_34 Y8 B34_L23_P B34_L22_N
8 DDR3_A3 IO_L10N_T1_34 IO_L23P_T3_34 B34_L23_P 11
8 DDR3_BA2 Y4 Y7 B34_L23_N 11
DDR3_BA2 IO_L11P_T1_SRCC_34 IO_L23N_T3_34 B34_L23_N
8 DDR3_A0 AA4 W9 B34_L24_P 11
DDR3_A0 IO_L11N_T1_SRCC_34 IO_L24P_T3_34 B34_L24_P
8 DDR3_RAS V4 Y9 B34_L24_N 11
DDR3_RAS DDR3_CAS W4 IO_L12P_T1_MRCC_34 IO_L24N_T3_34 U7 B34_L25 B34_L24_N
8 DDR3_CAS IO_L12N_T1_MRCC_34 IO_25_34 B34_L25 11

3
LED1 R23 1K 1 Q11
xc7a100tfgg484 MMBT3904LT1G

2
C C

U1-7

VTTREF
BANK35 VTTREF
F4 K4
DDR3_D6 B1 IO_0_35 IO_L13P_T2_MRCC_35 J4 DDR3_D22
8 DDR3_D6 IO_L1P_T0_AD4P_35 IO_L13N_T2_MRCC_35 DDR3_D22 8
8 DDR3_D2 A1 L3 DDR3_D18 8
DDR3_D2 DDR3_D0 C2 IO_L1N_T0_AD4N_35 IO_L14P_T2_SRCC_35 K3 DDR3_D20 DDR3_D18
8 DDR3_D0 IO_L2P_T0_AD12P_35 IO_L14N_T2_SRCC_35 DDR3_D20 8
8 DDR3_D4 B2 M1 DDR3_DQS2_P 8
DDR3_D4 DDR3_DQS0_P E1 IO_L2N_T0_AD12N_35 IO_L15P_T2_DQS_35 L1 DDR3_DQS2_N DDR3_DQS2_P
8 DDR3_DQS0_P IO_L3P_T0_DQS_AD5P_35 IO_L15N_T2_DQS_35 DDR3_DQS2_N 8
8 DDR3_DQS0_N D1 M3 DDR3_D17 8
DDR3_DQS0_N IO_L3N_T0_DQS_AD5N_35 IO_L16P_T2_35 DDR3_D17
C6 8 DDR3_D7 E2 M2 DDR3_DM2 8
DDR3_D7 IO_L4P_T0_35 IO_L16N_T2_35 DDR3_DM2
0.1uF 8 DDR3_DM0 D2 K6 DDR3_D21 8
DDR3_DM0 DDR3_D1 G1 IO_L4N_T0_35 IO_L17P_T2_35 J6 DDR3_D19 DDR3_D21 C7
8 DDR3_D1 IO_L5P_T0_AD13P_35 IO_L17N_T2_35 DDR3_D19 8
8 DDR3_D5 F1 L5 DDR3_D23 8 0.1uF
DDR3_D5 IO_L5N_T0_AD13N_35 IO_L18P_T2_35 DDR3_D23
8 DDR3_D3 F3 L4 DDR3_D16 8
DDR3_D3 E3 IO_L6P_T0_35 IO_L18N_T2_35 N4 DDR3_D25 DDR3_D16
IO_L6N_T0_VREF_35 IO_L19P_T3_35 DDR3_D25 8
8 DDR3_D14 K1 N3
DDR3_D14 IO_L7P_T1_AD6P_35 IO_L19N_T3_VREF_35
8 DDR3_D12 J1 R1 DDR3_D26 8
DDR3_D12 IO_L7N_T1_AD6N_35 IO_L20P_T3_35 DDR3_D26
8 DDR3_D10 H2 P1 DDR3_D24 8
DDR3_D10 IO_L8P_T1_AD14P_35 IO_L20N_T3_35 DDR3_D24
8 DDR3_DM1 G2 P5 DDR3_DQS3_P 8
B DDR3_DM1 IO_L8N_T1_AD14N_35 IO_L21P_T3_DQS_35 DDR3_DQS3_P B
8 DDR3_DQS1_P K2 P4 DDR3_DQS3_N 8
DDR3_DQS1_P IO_L9P_T1_DQS_AD7P_35 IO_L21N_T3_DQS_35 DDR3_DQS3_N
8 DDR3_DQS1_N J2 P2 DDR3_D31 8
DDR3_DQS1_N IO_L9N_T1_DQS_AD7N_35 IO_L22P_T3_35 DDR3_D31
8 DDR3_D13 J5 N2 DDR3_D27 8
DDR3_D13 IO_L10P_T1_AD15P_35 IO_L22N_T3_35 DDR3_D27
8 DDR3_D11 H5 M6 DDR3_D28 8
DDR3_D11 IO_L10N_T1_AD15N_35 IO_L23P_T3_35 DDR3_D28
DDR3_D8 H3 M5 DDR3_DM3
8
8
DDR3_D8
DDR3_D9
DDR3_D9 G3 IO_L11P_T1_SRCC_35
IO_L11N_T1_SRCC_35
IO_L23N_T3_35
IO_L24P_T3_35
P6 DDR3_D30
DDR3_DM3
DDR3_D30
8
8
RESET KEY
8 DDR3_D15 H4 N5 DDR3_D29 8
DDR3_D15 IO_L12P_T1_MRCC_35 IO_L24N_T3_35 DDR3_D29
G4 L6
IO_L12N_T1_MRCC_35 IO_25_35 +1.5V

xc7a100tfgg484

R15
1K
KEY1

RESET_N 1 2
P1 P2

Button

A A

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Title
AC7100 Bank34/35

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 6 of 12
Rev
1.0

5 4 3 2 1
 5 4 3 2 1

D D

MGTAVTT 4.7uF(1) 0.1uF(2)

MGTAVTT MGTAVCC
MGTAVTT U1-8
BANK216 B8 MGT_RX0_P
MGTPRXP0_216 MGT_RX0_P 11
A8 MGT_RX0_N 11
MGTPRXN0_216 MGT_RX0_N
D11 MGT_RX1_P 11
MGTPRXP1_216 MGT_RX1_P
D6 C11 MGT_RX1_N 11
MGTAVCC MGTPRXN1_216 MGT_RX1_N
C8 C11 C9 C10 D10 B10 MGT_RX2_P 11
MGTAVCC MGTPRXP2_216 MGT_RX2_P
4.7uF 0.1uF 0.1uF 0.1uF F7 A10 MGT_RX2_N 11
MGTAVCC MGTPRXN2_216 MGT_RX2_N
C F9 D9 MGT_RX3_P 11 C
MGTAVCC MGTPRXP3_216 MGT_RX3_P
E8 C9 MGT_RX3_N 11
MGTAVCC MGTPRXN3_216 MGT_RX3_N
B4 MGT_TX0_P 11
MGTPTXP0_216 MGT_TX0_P
A4 MGT_TX0_N 11
MGTPTXN0_216 MGT_TX0_N
B5 D5 MGT_TX1_P 11
MGTAVTT MGTPTXP1_216 MGT_TX1_P
B7 C5 MGT_TX1_N 11
MGTAVTT MGTPTXN1_216 MGT_TX1_N
B9 B6 MGT_TX2_P 11
MGTAVTT MGTPTXP2_216 MGT_TX2_P
B11 A6 MGT_TX2_N 11
MGTAVTT MGTPTXN2_216 MGT_TX2_N
C4 D7 MGT_TX3_P 11
MGTAVTT MGTPTXP3_216 MGT_TX3_P
C8 C7 MGT_TX3_N
MGTAVCC 4.7uF(1) 0.1uF(2) MGTAVTT MGTPTXN3_216 MGT_TX3_N 11
R22 100 1%
R16 F8 F6 MGT_CLK0_P 9
MGTRREF_216 MGTREFCLK0P_216 MGT_CLK0_P
100 1% E6 MGT_CLK0_N 9
MGTREFCLK0N_216 MGT_CLK0_N
F10 MGT_CLK1_P 11
MGTREFCLK1P_216 MGT_CLK1_P
MGTAVCC E10 MGT_CLK1_N 11
MGTREFCLK1N_216 MGT_CLK1_N

xc7a100tfgg484

C12 C13 C14 C15

4.7uF 0.1uF 0.1uF 0.1uF

B B

A A

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Title
AC7100 Bank216

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 7 of 12
Rev
1.0

5 4 3 2 1
 5 4 3 2 1

+3.3V VCCIO
U1-10
+1.0V POWER U1-9
F12 D8 H1
H8 VCCO_0 T12 A2 GND GND H7
H10 VCCINT VCCO_0 A3 GND GND GND H9
J7 VCCINT AA17 A5 GND GND H11
J9 VCCINT VCCO_13 AB14 A7 GND GND H21
K8 VCCINT VCCO_13 V16 A9 GND GND J8
L7 VCCINT VCCO_13 W13 A11 GND GND J10
M8 VCCINT VCCO_13 Y10 A12 GND GND J12
N7 VCCINT VCCO_13 A22 GND GND J18
P8 VCCINT M14 AA2 GND GND K5
D
P10 VCCINT VCCO_14 P18 AA12 GND GND K7 D
R7 VCCINT VCCO_14 R15 AA22 GND GND K11
R9 VCCINT VCCO_14 T22 AB9 GND GND K15
T8 VCCINT VCCO_14 U19 AB19 GND GND L2
+1.8V T10 VCCINT VCCO_14 Y20 B3 GND GND L8
VCCINT VCCO_14 B12 GND GND L22
H12 G19 B19 GND GND M7
K12 VCCAUX VCCO_15 H16 C3 GND GND M11
M12 VCCAUX VCCO_15 J13 C6 GND GND M19
+1.0V P12 VCCAUX VCCO_15 K20 C10 GND GND N6
R11 VCCAUX VCCO_15 L17 C12 GND GND N8
VCCAUX VCCO_15 N21 C16 GND GND N16
N11 VCCO_15 D3 GND GND P3
L11 VCCBRAM A17 D4 GND GND P7
J11 VCCBRAM VCCO_16 B14 D12 GND GND P9
VCCBRAM VCCO_16 C21 D13 GND GND P11
VCCO_16 D18 E4 GND GND P13
VCCO_16 E15 E5 GND GND R8
VCCO_16 F22 +1.5V E7 GND GND R10
VCCO_16 E9 GND GND R12
AA7 E11 GND GND R20
VCCO_34 AB4 E20 GND GND T7
VCCO_34 R5 F5 GND GND T9
VCCO_34 T2 F11 GND GND T11
VCCO_34 V6 F17 GND GND T17
VCCO_34 W3 G5 GND GND U4
VCCO_34 G6 GND GND U14
C1 G7 GND GND V1
VCCO_35 F2 G8 GND GND V11
VCCO_35 H6 G9 GND GND V21
C C
VCCO_35 J3 G10 GND GND W8
VCCO_35 M4 G12 GND GND W18
VCCO_35 N1 G14 GND GND Y5
VCCO_35 GND GND Y15
GND
xc7a100tfgg484
xc7a100tfgg484

For VCCINT
+3.3V +3.3V +1.5V +1.0V
For VCCO_13 For VCCO_34

C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33
4.7uF 470nF 47uF 4.7uF 4.7uF 470nF 470nF 470nF 4.7uF 4.7uF 470nF 470nF 470nF 470nF 100uF 100uF 100uF 100uF

+1.0V
+3.3V +1.5V
For VCCO_14 For VCCO_35
B B
C40 C41 C42 C43 C44 C52
C34 C35 C36 C37 C38 C39 C45 C46 C47 C48 C49 C50 C51 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF
47uF 4.7uF 4.7uF 470nF 470nF 470nF 470nF 4.7uF 4.7uF 470nF 470nF 470nF 470nF

+1.0V
VCCIO
For VCCO_15
C55 C56 C57 C58 C59 C60 C61 C62
C53 C54 C63 C64 C65 C66 C67 470nF 470nF 470nF 470nF 470nF 470nF 470nF 470nF
47uF 4.7uF 4.7uF 470nF 470nF 470nF 470nF

VCCIO +1.0V
For VCCO_16 +1.8V For VCCAUX For VCCBRAM

C74 C75 C76 C77 C78 C79 C80 C81 C82 C83
47uF 4.7uF 4.7uF 470nF 470nF 470nF 470nF C68 C69 C70 C71 C72 C73 C84 C85 C86 100uF 470nF 470nF
47uF 4.7uF 4.7uF 4.7uF 470nF 470nF 470nF 470nF 470nF

A A

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Title
AC7100 FPGA POWER

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 8 of 12
Rev
1.0

5 4 3 2 1
 5 4 3 2 1

VTTREF
VTTREF

DDRVTT

C272 C271 C270 C268 C273 C274 C275 C89 C90

4.7uF 4.7uF 4.7uF 0.1uF 0.1uF 0.01uF 0.01uF 4.7uF 47nF C87 C88
4.7uF 47nF

+1.5V VTTREF +1.5V +1.5V VTTREF +1.5V

D D

C91 C92
0.01uF 0.01uF

DDRVTT
C93 C94
R212 49.9 0.01uF 0.01uF

M8

M8
G7

G7
H1

C1
C9
D2

H2
H9

D9

N1
N9
R1
R9

H1

C1
C9
D2

H2
H9

D9

N1
N9
R1
R9
DDR3_A0

A1
A8

E9

B2

K2
K8

A1
A8

E9

B2

K2
K8
F1

F1
R189 49.9 U6 U5
DDR3_A1

VREFDQ

VREFDQ
VREFCA

VREFCA
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
R190 49.9
DDR3_A2 5 DDR3_A0 N3 E3 DDR3_D0 5 DDR3_A0 N3 E3 DDR3_D16 5
DDR3_A0 A0 DQ0 DDR3_D0 A0 DQ0 DDR3_D16
R193 49.9 5 DDR3_A1 P7 F7 DDR3_D1 5 DDR3_A1 P7 F7 DDR3_D17 5
DDR3_A1 A1 DQ1 DDR3_D1 A1 DQ1 DDR3_D17
DDR3_A3 5 DDR3_A2 P3 F2 DDR3_D2 5 DDR3_A2 P3 F2 DDR3_D18 5
DDR3_A2 A2 DQ2 DDR3_D2 A2 DQ2 DDR3_D18
R191 49.9 5 DDR3_A3 N2 F8 DDR3_D3 5 DDR3_A3 N2 F8 DDR3_D19 5
DDR3_A3 A3 DQ3 DDR3_D3 A3 DQ3 DDR3_D19
DDR3_A4 5 DDR3_A4 P8 H3 DDR3_D4 5 DDR3_A4 P8 H3 DDR3_D20 5
DDR3_A4 A4 DQ4 DDR3_D4 A4 DQ4 DDR3_D20
R192 49.9 5 DDR3_A5 P2 H8 DDR3_D5 5 DDR3_A5 P2 H8 DDR3_D21 5
DDR3_A5 A5 DQ5 DDR3_D5 A5 DQ5 DDR3_D21
DDR3_A5 5 DDR3_A6 R8 G2 DDR3_D6 5 DDR3_A6 R8 G2 DDR3_D22 5
DDR3_A6 A6 DQ6 DDR3_D6 A6 DQ6 DDR3_D22
R199 49.9 5 DDR3_A7 R2 H7 DDR3_D7 5 DDR3_A7 R2 H7 DDR3_D23 5
DDR3_A7 A7 DQ7 DDR3_D7 A7 DQ7 DDR3_D23
DDR3_A6 5 DDR3_A8 T8 D7 DDR3_D8 5 DDR3_A8 T8 D7 DDR3_D24 5
DDR3_A8 A8 DQ8 DDR3_D8 A8 DQ8 DDR3_D24
R194 49.9 5 DDR3_A9 R3 C3 DDR3_D9 5 DDR3_A9 R3 C3 DDR3_D25 5
DDR3_A9 A9 DQ9 DDR3_D9 A9 DQ9 DDR3_D25
DDR3_A7 5 DDR3_A10 L7 C8 DDR3_D10 5 DDR3_A10 L7 C8 DDR3_D26 5
DDR3_A10 A10/AP DQ10 DDR3_D10 A10/AP DQ10 DDR3_D26
R195 49.9 5 DDR3_A11 R7 C2 DDR3_D11 5 DDR3_A11 R7 C2 DDR3_D27 5
DDR3_A11 A11 DQ11 DDR3_D11 A11 DQ11 DDR3_D27
DDR3_A8 5 DDR3_A12 N7 A7 DDR3_D12 5 DDR3_A12 N7 A7 DDR3_D28 5
DDR3_A12 A12/BC# DQ12 DDR3_D12 A12/BC# DQ12 DDR3_D28
R198 49.9 5 DDR3_A13 T3 A2 DDR3_D13 5 DDR3_A13 T3 A2 DDR3_D29 5
DDR3_A13 A13 DQ13 DDR3_D13 A13 DQ13 DDR3_D29
DDR3_A9 5 DDR3_A14 T7 B8 DDR3_D14 5 DDR3_A14 T7 B8 DDR3_D30 5
DDR3_A14 A14 DQ14 DDR3_D14 A14 DQ14 DDR3_D30
R196 49.9 A3 DDR3_D15 5 A3 DDR3_D31 5
DQ15 DDR3_D15 DQ15 DDR3_D31
DDR3_A10 5 DDR3_BA0 M2 DDR3_BA0 M2
DDR3_BA0 BA0 BA0
R197 49.9 5 DDR3_BA1 N8 F3 DDR3_DQS0_P 5 DDR3_BA1 N8 F3 DDR3_DQS2_P 5
DDR3_BA1 BA1 LDQS DDR3_DQS0_P BA1 LDQS DDR3_DQS2_P
C DDR3_A11 5 DDR3_BA2 M3 G3 DDR3_DQS0_N 5 DDR3_BA2 M3 G3 DDR3_DQS2_N 5 C
DDR3_BA2 BA2 LDQS DDR3_DQS0_N BA2 LDQS DDR3_DQS2_N
R205 49.9
DDR3_A12 C7 DDR3_DQS1_P 5 C7 DDR3_DQS3_P 5
UDQS DDR3_DQS1_P UDQS DDR3_DQS3_P
R200 49.9 DDR3_CLK0_P J7 B7 DDR3_DQS1_N 5 DDR3_CLK0_P J7 B7 DDR3_DQS3_N 5
CLK_P UDQS DDR3_DQS1_N CLK_P UDQS DDR3_DQS3_N
DDR3_A13 DDR3_CLK0_N K7 DDR3_CLK0_N K7
R211 49.9 DDR3_CKE0 K9 CLK_N E7 DDR3_DM0 DDR3_CKE0 K9 CLK_N E7 DDR3_DM2
5 DDR3_CKE0 CKE LDM DDR3_DM0 5 CKE LDM DDR3_DM2 5
DDR3_A14 D3 DDR3_DM1 5 D3 DDR3_DM3 5
UDM DDR3_DM1 UDM DDR3_DM3
R201 49.9 5 DDR3_S0 L2 DDR3_S0 L2
DDR3_S0 CS CS
DDR3_BA0 5 DDR3_RAS J3 L8 DDR3_RAS J3 L8
DDR3_RAS RAS ZQ RAS ZQ
R204 49.9 5 DDR3_CAS K3 DDR3_CAS K3
DDR3_CAS CAS CAS
DDR3_BA1 5 DDR3_WE L3 J1 DDR3_WE L3 J1
DDR3_WE WE NC1 WE NC1
R202 49.9 J9 J9
DDR3_BA2 DDR3_ODT K1 NC2 L1 DDR3_ODT K1 NC2 L1
5 DDR3_ODT ODT NC3 ODT NC3
R203 49.9 L9 L9
DDR3_S0 T2 NC4 M7 DDR3_RESET T2 NC4 M7
5 DDR3_RESET RESET# NC5 RESET# NC5
R208 49.9 R44 R45
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSS10
VSS11
VSS12

VSS10
VSS11
VSS12
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
DDR3_RAS R43 240 1% 240 1%
R206 49.9 4.7K R0402
DDR3_CAS
R207 49.9
B1
B9
D1
D8
E2
E8
F9
G1
G9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DDR3_WE MT41J256M16HA-125 MT41J256M16HA-125
R209 49.9
DDR3_ODT
R210 49.9
DDR3_CKE0

DDR3_CLK0_P 5
DDR3_CLK0_P
B B
R46
100 1%
DDR POWER For VTT/VREF
+3.3V VTTREF
DDR3_CLK0_N 5 DDRVTT +1.5V
DDR3_CLK0_N
R213 10K 1% C227
C263 U32 4.7uF
0.01uF
R214 10K 1% 1 10
2 REFIN VIN 9 R216 100K
3 VLDOIN PGOOD 8
4 VO GND 7
PWRGND

C267 C269 5 PGND EN 6

C264 C203 10uF 10uF VOSNS REFOUT C262 C200
10uF 100uF C229 0.1uF 4.7uF
4.7uF
11

TPS51200DRCR

+1.5V +1.5V

A C95 C96 C97 C98 C99 C100 C101 C102 C103 C104 C105 C106 C107 C108 C109 C110 C111 C112 C113 C114 C115 C116 C117 C118 C119 C120 C121 C122 C123 C124 C125 C126 A
47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF 47nF

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Title
AC7100 DDR3

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 9 of 12
Rev
1.0

5 4 3 2 1
 5 4 3 2 1

D FPGA CONFIG SPI +3.3V

D

C127
R47 R48
4.7K 4.7K 0.1uF R49
4.7K
U4

3 QSPI_CS 1 8
QSPI_CS QSPI_DQ1 2 /CS VCC 7 QSPI_DQ3
3 QSPI_DQ1 DO(IO1) /HOLD(IO3) QSPI_DQ3 3
3 QSPI_DQ2 3 6 QSPI_CLK 2
QSPI_DQ2 /WP(IO2) CLK QSPI_CLK

EPAD
4 5 QSPI_DQ0 3
GND DI(IO0) QSPI_DQ0

N25Q128

9
C C

SYSTEM CLOCK
GTP CLOCK
200MHz 125MHz +3.3V
+3.3V

L3
L4 600Ohm@100MHz
600Ohm@100MHz
B B
R55 C131 C132 C133
R54 C128 C129 C130 4.7K 0.1uF 0.1uF 4.7uF
4.7K 0.1uF 0.1uF 4.7uF
G2
G1 1 6
1 6 OE VDD
OE VDD

2 PLL 5
CLKn
2 PLL 5 NC C134 6
CLKn MGT_CLK0_N
NC C135 5 0.1uF
SYS_CLK_N
0.1uF C136 6
MGT_CLK0_P
C137 5 3 4 0.1uF
SYS_CLK_P GND CLKp
3 GND CLKp
4 0.1uF
SiT9102-125MHz
SiT9102-200.00MHz

A A

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Title
AC7100 FLASH&CLOCK

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 10 of 12
Rev
1.0

5 4 3 2 1
 5 4 3 2 1

VCCIN
J2

1
VCC 2
D- 3
D+ 4
ID 5

SH1
SH2
SH3
SH4
GND
POWER ON: VCCINT(1.0V)->VCCBRAM(1.0V)->VCCAUX-(1.8V)>VCCO(1.5V and 3.3V)
MINI_USB

6
7
8
9
D D

+1.0V

VCCIN
1.0V POWER
U9
R69 +1.0V VCCIN 1.8V POWER +1.8V
10K U8
4 14 1V0_PG L6 2.2uH 5000mA
5 PVIN1 PWRGD 10 1
R241 6 PVIN2 13 C265 0.1uF 11 AVIN1 SW1 2
VIN BOOT L5 2.2uH 5000mA 12 PVIN2 SW2 3
C266 20K 1% 12 PVIN3 SW3
C140 10 PH1 11 14
10uF 4.7uF EN PH2 1V0_PG 13 VOS
R242 9 R58 EN 4 1V8_PG R59 10K R60
1 SS/TR 7 4.99K 1% 9 PG C138 C139
300K 1%

PWPD
RT/CLK V_SNS SS/TR

GND1
GND2
15K 1% 8 C144 7 22uF 0.1uF
COMP VREF=0.8V C143 C145 C142 3.3nF FSW

PGND1
PGND2
AGND3
TPAD
10uF 8 5
TPS54620 22uF 0.1uF DEF FB

15

2
3
R217
C280 R215 R61 TLV62130RGT R62

20
16
15
6
4.02K C281 20K 1% 240K 1%
0.01uF 80.6K
C282 NC

0.01uF
C C

VCCIN
1.5V POWER +1.5V VCCIN
3.3V POWER +3.3V

U10 U11
L7 2.2uH 5000mA L8 2.2uH 5000mA
10 1 10 1
11 AVIN1 SW1 2 11 AVIN1 SW1 2
12 PVIN2 SW2 3 12 PVIN2 SW2 3
PVIN3 SW3 PVIN3 SW3
14 14
1V8_PG 13 VOS 1V8_PG 13 VOS
EN 4 1V5_PG R63 10K R64 EN 4 PW_GOOD R65 10K R66
9 PG C146 C147 9 PG C148 C149
SS/TR 130K 1% SS/TR 750K 1%
C151 7 22uF 0.1uF C153 7 22uF 0.1uF
C150 3.3nF FSW C152 3.3nF FSW
PGND1
PGND2
AGND3

PGND1
PGND2
AGND3
TPAD

TPAD
10uF 8 5 10uF 8 5
DEF FB DEF FB

TLV62130RGT R67 TLV62130RGT R68

20
16
15
6

20
16
15
6
150K 1% 240K 1%
B B

POWER ON: VCCINT(1.0V)->VMGTAVCC(1.0V)->VMGTAVTT(1.2V)

VCCIN +3.3V VCCIO

+3.3V +1.8V
1.2V +3.3V +1.8V
1.0V
U12 U33 MGTAVTT U34 MGTAVCC
1 5 1 3 1 3
VIN VOUT 2 VIN1 PG 2 VIN1 PG
4 VIN2 9 VIN2 9
C166 ADJ 4 OUT1 10 4 OUT1 10
0.1uF 3 C168 C167 BIAS OUT2 BIAS OUT2
EN 10uF 0.1uF 5 5
2 EN 8 R72 2.49K 1% EN 8 R73 4.99K 1%
GND FB FB
GND1
GND2

GND1
GND2
7 7
SPX3819M5-3-3 SS SS
R74
TPS74801DRCR R71 C161 TPS74801DRCR 20K 1% C165
6
11

6
11
A C158 C160 C159 4.99K 1% 10uF C162 C164 C163 10uF A
0.1uF 10uF 1nF 0.1uF 10uF 1nF

Http://www.heijin.org
Title
AC7100 POWER

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 11 of 12
Rev
1.0

5 4 3 2 1
 5 4 3 2 1

These IOs are on BANK34, Voltage is 1.5V!!!

83

84
VCCIN VCCIN CON2

83

84
CON1

83

84
B13_L16_P 1 2 B14_L16_P

83

84
3 B13_L16_P 1 2 B14_L16_P 3
1 2 3 B13_L16_N 3 4 B14_L16_N 3
1 2 B13_L16_N 3 4 B14_L16_N
3 4 3 B13_L15_P 5 6 B13_L14_P 3
3 4 B13_L15_P 5 6 B13_L14_P
5 6 3 B13_L15_N 7 8 B13_L14_N 3
5 6 B13_L15_N 7 8 B13_L14_N
7 8 9 10
9 7 8 10 B13_L13_P 11 9 10 12 B14_L10_P
9 10 3 B13_L13_P 11 12 B14_L10_P 3
11 12 3 B13_L13_N 13 14 B14_L10_N 3
11 12 B13_L13_N 13 14 B14_L10_N
13 14 3 B13_L12_P 15 16 B14_L8_N 3
D 13 14 B13_L12_P 15 16 B14_L8_N D
15 16 B13_L4_P 3 B13_L12_N 17 18 B14_L8_P 3
15 16 B13_L4_P 3 B13_L12_N 17 18 B14_L8_P
17 18 B13_L4_N 19 20
19 17 18 20 B13_L4_N 3 B13_L11_P 21 19 20 22 B14_L15_N
19 20 3 B13_L11_P 21 22 B14_L15_N 3
3 B13_L5_P 21 22 B13_L1_P 3 B13_L11_N 23 24 B14_L15_P 3
B13_L5_P 21 22 B13_L1_P 3 B13_L11_N 23 24 B14_L15_P
3 B13_L5_N 23 24 B13_L1_N 3 B13_L10_P 25 26 B14_L17_P 3
B13_L5_N 23 24 B13_L1_N 3 B13_L10_P 25 26 B14_L17_P
3 B13_L7_P 25 26 B13_L2_P 3 B13_L10_N 27 28 B14_L17_N 3
B13_L7_P 25 26 B13_L2_P 3 B13_L10_N 27 28 B14_L17_N
3 B13_L7_N 27 28 B13_L2_N 29 30
B13_L7_N 29 27 28 30 B13_L2_N 3 B13_L9_N 31 29 30 32 B14_L6_N
29 30 3 B13_L9_N 31 32 B14_L6_N 3
3 B13_L3_P 31 32 B13_L6_P 3 B13_L9_P 33 34 B13_IO0 3
B13_L3_P B13_L3_N 33 31 32 34 B13_L6_N B13_L6_P 3 B13_L9_P B13_L8_N 35 33 34 36 B14_L7_N B13_IO0
3 B13_L3_N 33 34 B13_L6_N 3 3 B13_L8_N 35 36 B14_L7_N 3
11 B34_L23_P 35 36 B34_L20_P 3 B13_L8_P 37 38 B14_L7_P 3
B34_L23_P B34_L23_N 37 35 36 38 B34_L20_N B34_L20_P 11 B13_L8_P 39 37 38 40 B14_L7_P
11 B34_L23_N 37 38 B34_L20_N 11 39 40
39 40 3 B14_L11_N 41 42 B14_L4_P 3
39 40 B14_L11_N 41 42 B14_L4_P
11 B34_L18_N 41 42 B34_L21_N 3 B14_L11_P 43 44 B14_L4_N 3
B34_L18_N 41 42 B34_L21_N 11 B14_L11_P 43 44 B14_L4_N
11 B34_L18_P 43 44 B34_L21_P 3 B14_L14_N 45 46 B14_L9_P 3
B34_L18_P 43 44 B34_L21_P 11 B14_L14_N 45 46 B14_L9_P
11 B34_L19_P 45 46 B34_L22_P 3 B14_L14_P 47 48 B14_L9_N 3
B34_L19_P 45 46 B34_L22_P 11 B14_L14_P 47 48 B14_L9_N
11 B34_L19_N 47 48 B34_L22_N 49 50
B34_L19_N 49 47 48 50 B34_L22_N 11 B14_L5_N 51 49 50 52 B14_L12_N
49 50 3 B14_L5_N 51 52 B14_L12_N 3
2 XADC_VN 51 52 3 B14_L5_P 53 54 B14_L12_P 3
XADC_VN 51 52 B14_L5_P 53 54 B14_L12_P
2 XADC_VP 53 54 B34_L25 3 B14_L18_N 55 56 B14_L13_N 3
XADC_VP 53 54 B34_L25 11 B14_L18_N 55 56 B14_L13_N
55 56 B34_L24_P 3 B14_L18_P 57 58 B14_L13_P 3
55 56 B34_L24_P 11 B14_L18_P 57 58 B14_L13_P
57 58 B34_L24_N 59 60
59 57 58 60 B34_L24_N 11 B13_L17_P 61 59 60 62 B14_L3_N
59 60 3 B13_L17_P 61 62 B14_L3_N 3
4 B16_L1_N 61 62 3 B13_L17_N 63 64 B14_L3_P 3
B16_L1_N 61 62 B13_L17_N 63 64 B14_L3_P
4 B16_L1_P 63 64 3 B14_L21_N 65 66 B14_L20_N 3
B16_L1_P 63 64 B14_L21_N 65 66 B14_L20_N
4 B16_L4_N 65 66 3 B14_L21_P 67 68 B14_L20_P 3
B16_L4_N 65 66 B14_L21_P 67 68 B14_L20_P
4 B16_L4_P 67 68 69 70
B16_L4_P 69 67 68 70 B14_L22_P 71 69 70 72 B14_L19_N
69 70 3 B14_L22_P 71 72 B14_L19_N 3
4 B16_L6_N 71 72 3 B14_L22_N 73 74 B14_L19_P 3
B16_L6_N 71 72 B14_L22_N 73 74 B14_L19_P
C 4 B16_L6_P 73 74 3 B14_L24_N 75 76 B14_L23_P 3 C
B16_L6_P 73 74 B14_L24_N 75 76 B14_L23_P
4 B16_L8_P 75 76 3 B14_L24_P 77 78 B14_L23_N 3
B16_L8_P 75 76 B14_L24_P 77 78 B14_L23_N
4 B16_L8_N 77 78 3 B14_IO0 79 80 B14_IO25 3
B16_L8_N 79 77 78 80 B14_IO0 79 80 B14_IO25

81

82
79 80
81

82

81

82
81

82

CON40X2_0_8MM
CON40X2_0_8MM
83

84

CON3

83

84
CON4
83

84

B15_IO0 1 2 B15_IO25

83

84
4 B15_IO0 1 2 B15_IO25 4
4 B16_IO0 3 4 B16_IO25 4 1 2
B16_IO0 B15_L4_P 5 3 4 6 B16_L21_N B16_IO25 3 1 2 4
4 B15_L4_P 5 6 B16_L21_N 4 3 4
4 B15_L4_N 7 8 B16_L21_P 4 5 6
B15_L4_N 7 8 B16_L21_P 5 6
9 10 7 8
B15_L2_P 11 9 10 12 B16_L23_P 9 7 8 10
4 B15_L2_P 11 12 B16_L23_P 4 9 10
4 B15_L2_N 13 14 B16_L23_N 4 11 12 MGT_TX2_P 6
B15_L2_N 13 14 B16_L23_N 11 12 MGT_TX2_P
4 B15_L12_P 15 16 B16_L22_P 4 13 14 MGT_TX2_N 6
B15_L12_P 15 16 B16_L22_P 13 14 MGT_TX2_N
4 B15_L12_N 17 18 B16_L22_N 4 15 16
B15_L12_N 17 18 B16_L22_N 15 16
19 20 6 MGT_TX3_P 17 18 MGT_RX2_P 6
19 20 MGT_TX3_P 17 18 MGT_RX2_P
4 B15_L11_P 21 22 B16_L24_P 4 6 MGT_TX3_N 19 20 MGT_RX2_N 6
B15_L11_P 21 22 B16_L24_P MGT_TX3_N 19 20 MGT_RX2_N
4 B15_L11_N 23 24 B16_L24_N 4 21 22
B15_L11_N 23 24 B16_L24_N 21 22
4 B15_L1_N 25 26 B15_L8_N 4 6 MGT_RX3_P 23 24 MGT_TX0_P 6
B15_L1_N 25 26 B15_L8_N MGT_RX3_P 23 24 MGT_TX0_P
4 B15_L1_P 27 28 B15_L8_P 4 6 MGT_RX3_N 25 26 MGT_TX0_N 6
B15_L1_P 27 28 B15_L8_P MGT_RX3_N 25 26 MGT_TX0_N
29 30 27 28
B
B15_L5_P 31 29 30 32 B15_L7_N MGT_TX1_P 29 27 28 30 MGT_RX0_P B
4 B15_L5_P 31 32 B15_L7_N 4 6 MGT_TX1_P 29 30 MGT_RX0_P 6
4 B15_L5_N 33 34 B15_L7_P 4 6 MGT_TX1_N 31 32 MGT_RX0_N 6
B15_L5_N 33 34 B15_L7_P MGT_TX1_N 31 32 MGT_RX0_N
4 B15_L3_N 35 36 B15_L9_P 4 33 34
B15_L3_N B15_L3_P 37 35 36 38 B15_L9_N B15_L9_P MGT_RX1_P 35 33 34 36 MGT_CLK1_P
4 B15_L3_P 37 38 B15_L9_N 4 6 MGT_RX1_P 35 36 MGT_CLK1_P 6
39 40 6 MGT_RX1_N 37 38 MGT_CLK1_N 6
39 40 MGT_RX1_N 37 38 MGT_CLK1_N
4 B15_L19_P 41 42 B15_L15_N 4 39 40
B15_L19_P 41 42 B15_L15_N 39 40
4 B15_L19_N 43 44 B15_L15_P 4 4 B16_L5_P 41 42 B16_L2_P 4
B15_L19_N 43 44 B15_L15_P B16_L5_P 41 42 B16_L2_P
4 B15_L20_P 45 46 B15_L6_N 4 4 B16_L5_N 43 44 B16_L2_N 4
B15_L20_P 45 46 B15_L6_N B16_L5_N 43 44 B16_L2_N
4 B15_L20_N 47 48 B15_L6_P 4 4 B16_L7_P 45 46 B16_L3_P 4
B15_L20_N 47 48 B15_L6_P B16_L7_P 45 46 B16_L3_P
49 50 4 B16_L7_N 47 48 B16_L3_N 4
B15_L14_P 51 49 50 52 B15_L13_N B16_L7_N 49 47 48 50 B16_L3_N
4 B15_L14_P 51 52 B15_L13_N 4 49 50
4 B15_L14_N 53 54 B15_L13_P 4 4 B16_L9_P 51 52 B16_L10_P 4
B15_L14_N 53 54 B15_L13_P B16_L9_P 51 52 B16_L10_P
4 B15_L21_P 55 56 B15_L10_P 4 4 B16_L9_N 53 54 B16_L10_N 4
B15_L21_P 55 56 B15_L10_P B16_L9_N 53 54 B16_L10_N
4 B15_L21_N 57 58 B15_L10_N 4 4 B16_L11_P 55 56 B16_L12_P 4
B15_L21_N 57 58 B15_L10_N B16_L11_P 55 56 B16_L12_P
59 60 4 B16_L11_N 57 58 B16_L12_N B16_L12_N 4
59 60 B16_L11_N 57 58
4 B15_L23_P 61 62 B15_L18_P 4 59 60
B15_L23_P 61 62 B15_L18_P 59 60
4 B15_L23_N 63 64 B15_L18_N 4 4 B16_L13_P 61 62 B16_L14_P 4
B15_L23_N 63 64 B15_L18_N B16_L13_P 61 62 B16_L14_P
4 B15_L22_P 65 66 B15_L17_N 4 4 B16_L13_N 63 64 B16_L14_N 4
B15_L22_P 65 66 B15_L17_N B16_L13_N 63 64 B16_L14_N
4 B15_L22_N 67 68 B15_L17_P 4 4 B16_L15_P 65 66 B16_L16_P 4
B15_L22_N 67 68 B15_L17_P B16_L15_P 65 66 B16_L16_P
69 70 4 B16_L15_N 67 68 B16_L16_N 4
69 70 B16_L15_N 67 68 B16_L16_N
4 B15_L24_P 71 72 B15_L16_P 4 69 70
B15_L24_P 71 72 B15_L16_P 69 70
4 B15_L24_N 73 74 B15_L16_N 4 4 B16_L17_P 71 72 B16_L18_P 4
B15_L24_N 73 74 B15_L16_N B16_L17_P 71 72 B16_L18_P
75 76 4 B16_L17_N 73 74 B16_L18_N 4
75 76 B16_L17_N 73 74 B16_L18_N
2 FPGA_TCK 77 78 FPGA_TDI 2 4 B16_L19_P 75 76 B16_L20_P 4
FPGA_TCK 77 78 FPGA_TDI B16_L19_P 75 76 B16_L20_P
2 FPGA_TDO 79 80 FPGA_TMS 2 4 B16_L19_N 77 78 B16_L20_N 4
FPGA_TDO 79 80 FPGA_TMS B16_L19_N 77 78 B16_L20_N
79 80
81

82

79 80

81

82
81

82

81

82
A CON40X2_0_8MM A
CON40X2_0_8MM

HOLE1 HOLE2 HOLE3 HOLE4

Http://www.heijin.org
1

Title
AC7100 CONNECTOR

ALINX Confidential Size

Date:
Document Number
AC7100核心板 Schematics
Thursday, December 06, 2018 Sheet 12 of 12
Rev
1.0

5 4 3 2 1