Intel Pinetrail Platform F10T: Version: A Drawing By:wain

5 4 3 2 1
01 Cover sheet
D 02 BLOCK_DIAGRAM D
03 SMBUS_&_IRQ_ROUTING
04 POWER_ON_SEQUENCE
05 POWER_Block
06 POWER_BUDGET
07 POWER_SEQUENCE
08 CLOCK_GEN
09
10
CPU1
CPU2
INTEL PINETRAIL Platform
11 NB1
12 NB2
13 NB3
C
14
15
NB4
NB5 F10T C
16 NB6
17 DDR2_SODIMMO
18 DDR2_TEMINATION
19 LCD_CON
20 CRT
21 ICH7M1
22 ICH7N2 Version : A
23 ICH7M3
24 ICH7M4
25 USB_PORT Drawing by :Wain
26 HDD
B 27 MINICARD B
28 MODEM CON
29 LAN
30 RICHO 1394
31 RICHO CARDBUS
32
33
ALC260 CODEC
AUDIO PA@JACK Notes:
34 RTC POWER
35 KBC_1 Part Value Prefix : "POP=NA" means nopop
36 CPU FAN Net Value postfix : "#" means Low Active
A A
Lengda Technology Ltd.

5th floor,Block K,
Xiamen Exprot Processing Zone,
Haicang District,Xiamen,China,361026
Title <Title>
Size Sheet Rev
Cover sheet
C Name A
ENGINEER: Wain Date: Wednesday, November 04, 2009 Sheet 1 of 36
5 4 3 2 1
10 9 8 7 6 5 4 3 2 1
J J
DCOUT
DFB1 120
FB0805N
DCN1
MAX 3.5A
1 DFB2 120
FB0805N
I 3 I
2
N
DC1
DD1 0.1uF DC2 DC3 DC4
CC0603N 0.1uF 0.1uF 4.7uF DR1
sod5225n CC0603N CC0603N CC1210N 2K
TH-CN-DCIN-3N
P
D_GND
H H
D_GND
G G
D_V5
DF1
WB1251UR-10T4 1 2 D_V5_USB
DCOUT 10 f1206n DC6

10 DC5 100NF DR2
9
F 8
9
8
CC0402N 562 F
D_GND 7 10uF RC0603N
7 CC1206N
6 6 E2 E2
D_USB_PN0 5 E1 D_GND D_USB_OC0#
D_USB_PP0 5 E1
4 4
D_USB_OC0# 3 3 D_GND DR3 DC7
2 2
D_V5 1 1k 100NF
1 RC0603N CC0402N
DCN2
D_GND
E E
D_GND
USB Port1
CLOSE D_V5_USB
1
D DR4 0 RC0603N USB_SINGLE_VERT + DCP1
100uF
DC8 D
DCN3 CCP7343N-PS 1NF
2
USB_D0P 1 VBUS
4 3 3 D_GND D_GND
D_USB_PP0
GND B3 D_PLUS
GND2 E1
D_USB_PN0 DFIL1 POP = NA E2
GND3
1 UNB 2
B2 USB_D0N GND4 E3
2 D_MINUS
FIL_175P200X120-4L 4 E4
330mA GND1 GND5
1
DR5 0 RC0603N DD2 DD3

USB0005DP USB0005DP
CC0402N CC0402N
C POP = NA POP = NA 020133MR004S51MZR-C
C
2
TH-USB-200X250P-4N
DMH1
D_GND
DMH2
CLOSE USB_SINGLE_VERT
D_GND
D_GND
B B
Title
A <Title> A
Size Document Number Rev
C <Doc>
Date: Wednesday, November 04, 2009 Sheet 1 of 1
10 9 8 7 6 5 4 3 2 1
5 4 3 2 1
BLOCK DIAGRAM System Power

O2 815
CLK_CPU_BCLK#,CLK_CPU_BCLK
CLK_MCH_BCLK#,CLK_MCH_BCLK
D DREFCLK#,DREFCLK 14.318MHz D
DREFSSCLK#,DREFSSCLK
CPU Power
CLK_MCH_3GPLL#,CLK_MCH_3GPLL
CLK_PCIE
ISL6266
Clock Gen
CLK_AC97
CLK_TPMPCI
/ISL6261
FAN KBC THERMAL IC CLK_KBCPCI
Intel Chipset Power

APW7138
R.G.B
CRT DDR2-533 SO DIMM1
Pineview-M
DDR2 Power
LVDS LVDS APW7138
C C
CLK_LAN
Charger
ISL6253
DMI X4 400MB/S
32.768KHz @ CLK_ICH14
200MHz CLK_ICHPCI
CLK_USB48
S3/S4 Control
CLK_PCIE_SATA#,CLK_PCIE_SATA
CLK_PCIE_ICH#,CLK_PCIE_ICH
PCIE
and Discharge
Hard Disk SATA
B
USB2.0 RTS5156 B
Tiger point
USB2.0
USB0
USB1 24.576MHz
32.768KHz LPC BUS USB7

LAN
PCI-E
CLK_KBCPCI
KBC TCM Azalia
MINI CARD
A A
25MHz
BIOS&EC KB TOUCH Audio Modem Lengda Technology Ltd.

PAD Codec Codec 5th floor,Block K,
Title <Title>
CLK_Azalia Size Sheet
Glock Diagram
Rev
C Name A
5 4 3 2 1
5 4 3 2 1
ACIN 03
POWER ON SEQUENCE Circuit
+V_DC_IN
PG:40
5AC 1BAT
1AC +V_ADP_IN POWSW#
D D
1 Startup
Circuit
+V_ADP_OUT
+VBAT
Batt Charger PG:40
PG:34 Circuit
PG:34
5AC
3 2 +V_DC SMCONOFF#
+V3.3A +V5A
7
+V3.3 S4 +V3.3A
+V5 shutdown +V5A

System VR
Power Monitors KBC
+V3.3A,+V5A, 4
C
control +V2.5A,+V1.5A RSMRST#_PWRGD
PG:31 C
PG:35
PG:39
Delay 99ms
PM_PWRBTN#
PMRSMRST#
+V3.3A +V5A 10 11
+V1.05S(For Core,CPU I/O)
ALL_SYS_VRPWRGD
+V3.3A(Sus)
S3 shutdown +V3.3S(For PCI,IDE)
IMVP_VR_ON
Power control 5a 5b +V1.5S(For Core,SATA,PLL,)
PG:39 SLP_S3#
+V3.3S +V5S +V2.5S
7 8
ICH7M
H_PWRGD
S4# AND
06
VRMPWRGD
SLP_S4#
S3#
PWROK
+V1.8 7 +V0.9S +V1.8S
PG:17,18 16
B
10 B
+V1.5S(For PLL)
DDR2 SLP_S3# +VCC_Core
VR PG:36 17 +V1.05S
DDR_VR_PWRGD
AND 15 14
PLT_RST#
7 +V1.05S +V1.5S 8
9 +V1.5S(For PLL)
+V2.5S(For LVDS,CRT)
SLP_S3#
1.05V 1.5V +V1.8(For DDR) H_CPURST#
CPU
VR VR AND AND +1.05S(VCCP,GMCH_Core)
PG:07
PG:37 PG:37 18
8
IMVP_VR_ON
12 +VCC_CORE
11
DELAY_VR_PWRGOOD
945GM
IMVP PWROK PG:09,10
A
VR 14 A
PG:38
CLK_EN# Lengda Technology Ltd.

System 5th floor,Block K,
13 Clock Haicang District,Xiamen,China,361026

PG:06
Title <Title>
Size Sheet Rev
Power_On_sequence
C Name A
5 4 3 2 1
5 4 3 2 1
BC BC
BB BB
BA BA
AZ AZ
AY AY
AX AX
AW AW
AV
POWER Delivery Architectural Block Diagram AV
AU AU
AT AT
AS AS
G3 shut down power S4,S5 shut down power S3 shut down power +V1.8
AR AR
+Vcore
Dothan-LV +V0.9S
DDR2
AQ AQ
+VCCP
Vcore:0.726-1.116V /?A /S0
AP
ADAPTOR VCCP:1.05V /3.0A /S0 AP
+VCC_PROC
+V_DC
VPLL:1.50V /0.3A /S0
AO
DDR2 POWER Module +V1.8 +V0.9S +V3.3A_KBC
AO
AN
KBC AN
AM AM
+V1.8S +VCCP
GMCH
AL VCCP:1.05V /S0 +V3.3S AL
Charger +VCC_GMCH FMH
+V1.5S
Vcore:1.05-1.50V /S0
AK
CPU VCORE POWER Module VPLLs:1.50V /S0
AK
+VCC_CORE +V5
AJ
VccPCIE:1.5V /S0 USB AJ
AI
+V1.8
VccDLVDS:1.5V /S0 +V3.3 AI
+V2.5S
VccSM:1.8V /S0,S3 BlueTooth
AH AH
VccALVDS:2.5V /S0 +V5S
+V1.05S VCRTDAC:2.5V /S0
AG
BATTERY +V3.3S PATA
AG
AF 1.05/1.5V POWER Module VTVDAC:3.3V /S0 AF
+V1.5S +V3.3S
AE AE
+V5S
Azalia/Ac97
AD SATA AD
AC +V3.3S AC
2.5V POWER Module +VCCP

ICH6-M +V3.3
AB +V2.5S VccpCPU:1.05V /S0 MiniPCI
AB
+V1.5S +V5S
AA Vcore:1.50V /S0 AA
Z
VPLLs:1.50V /S0 Z
+V2.5S
VccPCIE:1.5V /S0 +V3.3
Y +V3.3A +V3.3 V2.5REF:2.5V /S0 Y
+V3.3S +V3.3S CardBus

X VccPCI:3.3V /S0 +V5S X
VccIDE:3.3V /S0
W +V5A Vccp:3.3V /S0
W
V
+V5S VccpAUX(LAN):3.3V /S0 V
+V3.3A +V3.3S
U SYSTEM POWER Module +V5S
VccSUS:3.3V /S0,S3 LCD U
V5REF:5V /S0 +V_DC

T +V5A T
V5REFSUS:5V /S0,S3
S S
R R
Q Q
P P
O O
N N
M M
L L
K K
J J
I I
H H
G G
F F
E
Lengda Technology Ltd. E
5th floor,Block K,
D Xiamen Exprot Processing Zone, D
C C
Title <Title>
B B
Size Sheet Rev
Power_Block
C Name A
A ENGINEER: Wain Date: Wednesday, November 04, 2009 Sheet 4 of 36
A
5 4 3 2 1
5 4 3 2 1
POWER RAIL DESTINATION VOLTAGE S0 CURRENT

VCORE_CPU Banias 0.7-1.708V 32A
VCCP Banias 0.9-1.105V 2.5A
ICH4M MontaraGM 0.72A
D 1.8VDDM Banias (PLL) 1.8V 0.3A D
MontaraGM(PLL) 0.099A
1.2VDDM 1.2V 1.89A
(CORE, HUB, DDRDDL) (1.4A, 0.09A, 0.4A)
1.5VDDM MontaraGM 1.5V 0.23A
(LVDS, DAC, DVO) (0.07A, 0.07A, 0.09A)
ICH4M (CORE) 0.5A
2.5VDDS MontaraGM 2.5V 2.12A
(DDR, LVDSIO) (2.07A, 0.05A)
(Run
DDR RAM 1.046A(Idle) 1.692A
3DMark)
R5C551 0.13A
1.8VDDS 82541EI 0.22A
1.25VDDM DDR RAM 1.25V 0.0769A
1.5VDDS ICH4M (LAN) 1.5V 0.0155A
1.2VDDS 82541EI 1.2V 0.47A
1.5VDDA ICH4M (SUS) 1.5V 0.0675A
3VDDM ICH4M (IO) 3.3V 0.528A
R5C551 0.13A
MiniPCI
C
FWH BIOS C
LPC KBC 0.0308A (Idle)

AC97 CODEC 0.0461A (Idle)
CLK GEN 0.36A
LVDS 0.246A
3VDDS ICH4M (LAN) 3.3V 0.0092A
R5C551
MiniPCI
82540EM 0.15A
PCMCIA VCCA
3VDDA ICH4M (SUS) 3.3V 0.165A
5VDDM AMP2020 0.0615A (Idle) 0.338A (Run)
CDROM 0.0461A (Idle) 0.677~0.8A(Run)
HDD 0.0461A (Idle) 0.492A (Run)
INT KB/ INT MS
INVERTER 0.0615A (Idle) 0.569A (Run)
5VDDS PCMCIA VCCA
B B
5VDDA ICH4M 10UA
USB
PMU3V PMU08 0.0615A

PMU5V ASIC_B0 0.0615A
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
Power_Budget
C Name A
5 4 3 2 1
5 4 3 2 1
+V3.3S
R1 R2 R3
10k 10k 10k
RC0402N RC0402N RC0402N C1 20PF XIN
POP = NA
2
TME/PCI-2 SRC5_EN/PCI-4 ITP_EN/PCIF-5 R4 22 RC0402N CLK_ICH14 17
D D
X1 X5
R6 R7 R8 X8A01431AFK1H
OSC-2-14.318MHZ
10k 10k 10k
1
RC0402N RC0402N RC0402N
POP = NA POP = NA C2 20PF XOUT
Dualay 2009－10－15
R9 10k RC0402N
MCH_BSEL2 8
1 64 R10 0 RC0402N
**CR#_A/PCI-0 SCLK SMB_CLK_S2 11,17,21,22
R13 33 RC0402N VDD_CLK3.3 2 63 R14 0 RC0402N
25 CLK_KBCPCI VDD_PCI SDATA SMB_DATA_S2 11,17,21,22
3 62 C4
R16 33 RC0402N TME/PCI-2 **CR#_B/PCI-1 **FSC/TEST_SEL/REF VDD_CLK3.3 C3
25 CLK_FWHPCI 4 **TME/PCI-2 VDD_REF 61 20PF change
PCI-3 5 60 XIN POP = NA 20PF
SRC5_EN/PCI-4 PCI-3 Xin XOUT POP = NA
6 **SRC5_EN/PCI-4 Xout 59
R17 33 RC0402N ITP_EN/PCIF-5 7 58
16 CLK_PCIF_ICH **ITP_EN/PCIF-5 GND_REF R18 10k RC0402N MCH_BSEL1
8 GND_PCI **FSB/TEST_MODE 57 MCH_BSEL1 8
R62 22 RC0402N VDD_48 9 56 R19 1kRC0402N
33 CLK_CD48 VDD_48 **CK_PWRGD/PD# VR_PWRGD_CLKEN 31
R20 22 RC0402N FSA/USB48 10 55 VDD_CLK3.3
16 CLK_USB48 R21 2.2K RC0402N **FSA/USB48 VDD_CPU CPU0 R22 0 RC0402N
8 MCH_BSEL0 11 GND_48 CPU-0 54 CLK_CPU_BCLK 8
VDD_CLK3.3 12 53 CPU0# R23 0 RC0402N CLK_CPU_BCLK# 8 C5
VDD_IO1 CPU-0#
8
8
DREFCLK
DREFCLK#
R24
R25
0 RC0402N
0 RC0402N
SRC-0/DOT96
SRC0#/DOT96#
13
14
SRC-0/DOT96 RTM875T-606 GND_CPU 52
51 CPU1 R26 0 RC0402N CLK_MCH_BCLK 8 1uF
CC0402N
SRC-0#/DOT96# CPU-1 CPU1# R27 0 RC0402N
15 GND_IO1 CPU-1# 50 CLK_MCH_BCLK# 8
VDD_PLL3 16 49 VDD_CLK3.3 POP = NA
R28 0 RC0402N SRC-1/SE1 VDD_PLL3 VDD_CPU_IO R29 0 RC0402N POP = NA
8 DREFSSCLK 17 SRC-1/SE1 RESET# 48
8 DREFSSCLK# R30 0 RC0402N SRC-1#/SE2 18 TSSOP64 47 SRC8/CPU2-ITP R31 0 RC0402N
SRC-1#/SE2 SRC-8/CPU_ITP SRC8#/CPU2-ITP R32 0 RC0402N
19 GND_PLL3 SRC-8#/CPU_ITP# 46
VDD_CLK3.3 20 45 VDD_CLK3.3
R33 0 RC0402N SRC2/SATA VDD_PLL3_IO VDD_SRC_IO3 CR#_F/SRC7 R34 0 RC0402N
17 CLK_PCIE_SATA 21 SRC-2/SATA **CR#_F/SRC-7 44 CLK_PCIE_LAN 23
R35 0 RC0402N SRC2#/SATA# 22 43 CR#_E/SRC7# R36 0 RC0402N CLK_PCIE_LAN# 23
17 CLK_PCIE_SATA# SRC-2#/SATA# **CR#_E/SRC-7#
23 GND_SRC1 GND_SRC3 42
7 CLK_PE_XDP R37 0 RC0402N 24 41 SRC6 R38 0 RC0402N CLK_PCIE_ICH 16
R39 0 RC0402N **CR#_C/SRC-3 SRC-6 SRC6# R40 0 RC0402N
C
7 CLK_PE_XDP# 25 **CR#_D/SRC-3# SRC-6# 40 CLK_PCIE_ICH# 16 C
VDD_CLK3.3 26 39 VDD_CLK3.3
R41 0 RC0402N SRC4 VDD_SRC_IO1 VDD_SRC1 SRC5 R42 0 RC0402N
27 SRC-4 **PCI_STOP#/SRC-5 38 PM_STPPCI# 17
R43 0 RC0402N SRC4# 28 37 SRC5# R44 0 RC0402N
SRC-4# **CPU_STOP#/SRC-5# PM_STPCPU# 17
29 36 VDD_CLK3.3
R45 0 RC0402N SRC9 GND_SRC2 VDD_SRC_IO2 SRC10# R46 0 RC0402N
21 CLK_PCIE_MINICARD1 30 SRC-9 SRC-10# 35
21 CLK_PCIE_MINICARD1# R47 0 RC0402N SRC9# 31 34 SRC10 R48 0 RC0402N
R49 0 RC0402N CR#_G/SRC11# SRC-9# SRC-10 CR#_H/RC11 R50 0 RC0402N
21 CLK_MINICARD1_OE# 32 **CR#_G/SRC-11# **CR#_H/SRC-11 33
+V1.05S
+V3.3S You Can use pin 24/25 either as SRC1T/SRC1C BSEL BIASING RES
or as SE1/SE2. Details please reference the

datasheet R51
1k R52 R53
LAYOUT NOTE PLACE (1) PER PIN RC0402N 10k 10k
POP = NA RC0402N RC0402N
POP = NA POP = NA
VDD_CLK3.3 MCH_BSEL0 MCH_BSEL2 MCH_BSEL1
C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16
100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF 100NF
C17 C18 CC0402N CC0402N CC0402N CC0402N CC0402N CC0402N CC0402N CC0402N CC0402N CC0402N CC0402N
10uF 1uF POP = NA POP = NA POP = NA POP = NA POP = NA R54 R55 R56
CC1206N CC0402N 10k 1k 1k
RC0402N RC0402N RC0402N
POP = NA POP = NA POP = NA
R57 2.2 RC0603N VDD_48
C19 C20
10uF 100NF
CC1206N CC0402N
POP = NA
B B
R58 2.2 RC0603N VDD_PLL3
C21 C22
10uF 100NF
CC1206N CC0402N
POP = NA
STRAP MODE STUFF UNSTUFF

CLK_PCIF_ICH C23 10pF CC0402N POP = NA
NO OVERCLOCKING R2 PULL UP R4 PULLDOWN CLK_KBCPCI C24 10pF CC0402N POP = NA
TME CLK_FWHPCI C25 10pF CC0402N POP = NA
NORMAL R4 PULLDOWN R2 PULL UP CLK_USB48 C26 10pF CC0402N POP = NA
CLK_ICH14 C27 10pF CC0402N POP = NA
SRC5 ENABLED R1 PULL UP R5 PULLDOWN
SRC5_EN
SRC5 DISABLED R5 PULLDOWN R1 PULL UP
ITP ENABLED R3 PULL UP R6 PULLDOWN
ITP_EN CLOCK EMI CAPS: DEFAULT EMPTY
SRC8 ENABLED R6 PULLDOWN R3 PULL UP
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
Clock Generator
C Name A
5 4 3 2 1
1
?
PINEVIEW_M
REV = 1.1 M_A_DQ[63..0] 11

U2B
M_A_DQ0
11,13 M_A_A[14..0] M_A_DQ1
M_A_A0 AH19 AD3 M_A_DQS0 M_A_DQ2
M_A_A1 DDR_A_MA_0 DDR_A_DQS_0
AJ18 DDR_A_MA_1 DDR_A_DQSB_0 AD2 M_A_DQS#0 M_A_DQ3
M_A_A2 AK18 AD4 M_A_DM0 M_A_DQ4
M_A_A3 DDR_A_MA_2 DDR_A_DM_0 M_A_DQ5
PINEVIEW_M
AK16 DDR_A_MA_3
M_A_A4 AJ14 AC4 M_A_DQ0 M_A_DQ6
U2A M_A_A5 DDR_A_MA_4 DDR_A_DQ_0
? AH14 DDR_A_MA_5 DDR_A_DQ_1 AC1 M_A_DQ1 M_A_DQ7
M_A_A6 AK14 AF4 M_A_DQ2 M_A_DQ8
REV = 1.1 M_A_A7 DDR_A_MA_6 DDR_A_DQ_2
AJ12 DDR_A_MA_7 DDR_A_DQ_3 AG2 M_A_DQ3 M_A_DQ9
C349 100NF CC0402N F3 G2 R510 0 RC0402N M_A_A8 AH13 AB2 M_A_DQ4 M_A_DQ10
16 DMI_RXP0 DMI_RXP_0 DMI_TXP_0 DMI_TXP0 16 DDR_A_MA_8 DDR_A_DQ_4
C350 100NF CC0402N F2 G1 R511 0 RC0402N M_A_A9 AK12 AB3 M_A_DQ5 M_A_DQ11
16 DMI_RXN0 DMI_RXN_0 DMI_TXN_0 DMI_TXN0 16 DDR_A_MA_9 DDR_A_DQ_5
C351 100NF CC0402N H4 H3 R512 0 RC0402N M_A_A10 AK20 AE2 M_A_DQ6 M_A_DQ12
16 DMI_RXP1 DMI_RXP_1 DMI_TXP_1 DMI_TXP1 16 DDR_A_MA_10 DDR_A_DQ_6
C357 100NF CC0402N G3 J2 R514 0 RC0402N M_A_A11 AH12 AE3 M_A_DQ7 M_A_DQ13
16 DMI_RXN1 DMI_RXN_1 DMI_TXN_1 DMI_TXN1 16 DDR_A_MA_11 DDR_A_DQ_7
M_A_A12 AJ11 M_A_DQ14
DMI
M_A_A13 DDR_A_MA_12
AJ24 DDR_A_MA_13 DDR_A_DQS_1 AB8 M_A_DQS1 M_A_DQ15
M_A_A14 AJ10 AD7 M_A_DQS#1 M_A_DQ16
TP14 DDR_A_MA_14 DDR_A_DQSB_1
DDR_A_DM_1 AA9 M_A_DM1 M_A_DQ17
M_A_DQ18
6 CLK_PE_XDP# N7 L10 11,13 M_A_WE# AK22 AB6 M_A_DQ8 M_A_DQ19
EXP_CLKINN EXP_RCOMPO DDR_A_WEB DDR_A_DQ_8 M_A_DQ9 M_A_DQ20
N6 EXP_CLKINP EXP_ICOMPI L9 11,13 M_A_CAS# AJ22 DDR_A_CASB DDR_A_DQ_9 AB7
6 CLK_PE_XDP L8 11,13 M_A_RAS# AK21 AE5 M_A_DQ10 M_A_DQ21
EXP_RBIAS DDR_A_RASB DDR_A_DQ_10 M_A_DQ11 M_A_DQ22
R10 RSVDA1 DDR_A_DQ_11 AG5
R9 N11 R60 11,13 M_A_BS#0 AJ20 AA5 M_A_DQ12 M_A_DQ23
TP13 RSVDA2 RSVD_TPA2 DDR_A_BS_0 DDR_A_DQ_12
N10 P11 R59 750 11,13 M_A_BS#1 AH20 AB5 M_A_DQ13 M_A_DQ24
RSVDA3 RSVD_TPA1 DDR_A_BS_1 DDR_A_DQ_13 M_A_DQ14 M_A_DQ25
N9 RSVDA4 49.9 11,13 M_A_BS#2 AK11 DDR_A_BS_2 DDR_A_DQ_14 AB9
AD6 M_A_DQ15 M_A_DQ26
DDR_A_DQ_15 M_A_DQ27
RSVD_K3 K3 DDR_A_DQS_2 AD8 M_A_DQS2 M_A_DQ28
K2 RSVD_K2 11,13 M_CS#0 AH22 DDR_A_CSB_0 DDR_A_DQSB_2 AD10 M_A_DQS#2 M_A_DQ29
J1 L2
RSVD_J1 RSVD_L2 11,13 M_CS#1 AK25 DDR_A_CSB_1 DDR_A_DM_2 AE8 M_A_DM2 M_A_DQ30
M4 RSVD_M4 RSVD_M2 M2 M_A_DQ31
AJ21 DDR_A_CSB_2
L3 RSVD_L3
RSVD_N2 N2 AJ25 DDR_A_CSB_3 DDR_A_DQ_16 AG8 M_A_DQ16 M_A_DQ32
DDR_A_DQ_17 AG7 M_A_DQ17 M_A_DQ33
11,13 M_CKE0 AH10 DDR_A_CKE_0 DDR_A_DQ_18 AF10 M_A_DQ18 M_A_DQ34
1 OF 6 AH9 AG11M_A_DQ19 M_A_DQ35
403526 11,13 M_CKE1 DDR_A_CKE_1 DDR_A_DQ_19
? AK10 AF7 M_A_DQ20 M_A_DQ36
DDR_A_CKE_2 DDR_A_DQ_20
AJ8 DDR_A_CKE_3 DDR_A_DQ_21 AF8 M_A_DQ21 M_A_DQ37
DDR_A_DQ_22 AD11M_A_DQ22 M_A_DQ38
11,13 M_ODT0 AK24 DDR_A_ODT_0 DDR_A_DQ_23 AE10M_A_DQ23 M_A_DQ39
11,13 M_ODT1 AH26 M_A_DQ40
DDR_A_ODT_1
AH24 DDR_A_ODT_2 DDR_A_DQS_3 AK5 M_A_DQS3 M_A_DQ41
AK27 DDR_A_ODT_3 DDR_A_DQSB_3 AK3 M_A_DQS#3 M_A_DQ42
DDR_A_DM_3 AJ3 M_A_DM3 M_A_DQ43
M_A_DQ44
DDR_A_DQ_24 AH1 M_A_DQ24 M_A_DQ45
11 M_CLK_DDR0 AG15 DDR_A_CK_0 DDR_A_DQ_25 AJ2 M_A_DQ25 M_A_DQ46
11 M_CLK_DDR#0 AF15 DDR_A_CKB_0 DDR_A_DQ_26 AK6 M_A_DQ26 M_A_DQ47
11 M_CLK_DDR1 AD13 DDR_A_CK_1 DDR_A_DQ_27 AJ7 M_A_DQ27 M_A_DQ48
11 M_CLK_DDR#1 AC13 DDR_A_CKB_1 DDR_A_DQ_28 AF3 M_A_DQ28 M_A_DQ49
DDR_A_DQ_29 AH2 M_A_DQ29 M_A_DQ50
DDR_A_DQ_30 AL5 M_A_DQ30 M_A_DQ51
AC15 DDR_A_CK_3 DDR_A_DQ_31 AJ6 M_A_DQ31 M_A_DQ52
AD15 M_A_DQ53
DDR_A_CKB_3
+V1.8 AF13 DDR_A_CK_4 DDR_A_DQS_4 AG22 M_A_DQS4 M_A_DQ54
AG13 DDR_A_CKB_4 DDR_A_DQSB_4 AG21M_A_DQS#4 M_A_DQ55
DDR_A_DM_4 AD19 M_A_DM4 M_A_DQ56
R616 M_A_DQ57
10k DDR_A_DQ_32 AE19M_A_DQ32 M_A_DQ58
RC0402N AD17 RSVD_AD17 DDR_A_DQ_33 AG19M_A_DQ33 M_A_DQ59
AC17 RSVD_AC17 DDR_A_DQ_34 AF22 M_A_DQ34 M_A_DQ60
AB15 RSVD_AB15 DDR_A_DQ_35 AD22M_A_DQ35 M_A_DQ61
AB17 RSVD_AB17 DDR_A_DQ_36 AG17M_A_DQ36 M_A_DQ62
A DDR_A_DQ_37 AF19 M_A_DQ37 M_A_DQ63 A
DDR_A_DQ_38 AE21M_A_DQ38
DDR_A_DQ_39 AD21M_A_DQ39
DDR_A_DQS_5 AE26 M_A_DQS5

R61 0 RC0402N AB4 AG27M_A_DQS#5
VSS DDR_A_DQSB_5
POP = NA AK8 RSVDB1 DDR_A_DM_5 AJ27 M_A_DM5
DDR_A_DQ_40 AE24M_A_DQ40
DDR_A_DQ_41 AG25M_A_DQ41 M_A_DM[7..0] 11
AB11 RSVD_TPB1 DDR_A_DQ_42 AD25M_A_DQ42 M_A_DM0
AB13 RSVD_TPB2 DDR_A_DQ_43 AD24M_A_DQ43 M_A_DM1
DDR_A_DQ_44 AC22M_A_DQ44 M_A_DM2
AL28 DDR_VREF DDR_A_DQ_45 AG24M_A_DQ45 M_A_DM3
DDR_PRD AK28 AD27M_A_DQ46 M_A_DM4
DDR_PRU DDR_RPD DDR_A_DQ_46
AJ26 DDR_RPU DDR_A_DQ_47 AE27M_A_DQ47 M_A_DM5
M_A_DM6
MCH_VREF AK29 AE30 M_A_DQS6 M_A_DM7
11,29 M_VREF RSVDB2 DDR_A_DQS_6
DDR_A_DQSB_6 AF29M_A_DQS#6 M_A_DQS[7..0] 11
DDR_A_DM_6 AF30 M_A_DM6 M_A_DQS0
C28 C29 C30 M_A_DQS1
2.2uF 100NF 100NF DDR_A
DDR_A_DQ_48 AG31M_A_DQ48 M_A_DQS2
CC0603N CC0402N CC0402N AG30M_A_DQ49 M_A_DQS3
POP = NA DDR_A_DQ_49
DDR_A_DQ_50 AD30M_A_DQ50 M_A_DQS4
DDR_A_DQ_51 AD29M_A_DQ51 M_A_DQS5
DDR_A_DQ_52 AJ30 M_A_DQ52 M_A_DQS6
DDR_A_DQ_53 AJ29 M_A_DQ53 M_A_DQS7
DDR_A_DQ_54 AE29M_A_DQ54 M_A_DQS#[7..0] 11
DDR_A_DQ_55 AD28M_A_DQ55 M_A_DQS#0
M_A_DQS#1
DDR_A_DQS_7 AB27 M_A_DQS7 M_A_DQS#2
DDR_A_DQSB_7 AA27 M_A_DQS#7 M_A_DQS#3
DDR_A_DM_7 AB26 M_A_DM7 M_A_DQS#4
M_A_DQS#5
DDR_A_DQ_56 AA24M_A_DQ56 M_A_DQS#6
DDR_A_DQ_57 AB25M_A_DQ57 M_A_DQS#7
+V1.8 DDR_A_DQ_58 W24 M_A_DQ58
DDR_A_DQ_59 W22 M_A_DQ59
DDR_A_DQ_60 AB24M_A_DQ60
DDR_A_DQ_61 AB23M_A_DQ61
DDR_A_DQ_62 AA23M_A_DQ62
R64 80.6 ±1% RC0402N DDR_PRU DDR_A_DQ_63 W27 M_A_DQ63
C31
0.01uF
403526 2 OF 6 ?
CC0402N
R65 80.6 ±1% RC0402N DDR_PRD

5th floor,Block K,
Title <Title>
Size Sheet Rev
PNV1
C Name A
1
5 4 3 2 1
D D
?
? PINEVIEW_M
PINEVIEW_M U2D
U2C
REV = 1.1
REV = 1.1 XDP_RSVD_00 D12 14 LA_CLKN U25 LVD_A_CLKM SMI_B E7 H_SMI# 17
15 CRT_HSYNC R69 10 RC0402N M30 A7 14 LA_CLKP U26 H7
CRT_HSYNC XDP_RSVD_01 LVD_A_CLKP A20M_B H_A20M# 17
15 CRT_VSYNC R70 10 RC0402N M29 D6 14 LA_DATAN0 R23 H6
CRT_VSYNC XDP_RSVD_02 LVD_A_DATAM_0 FERR_B H_FERR# 17
XDP_RSVD_03 C5 14 LA_DATAP0 R24 LVD_A_DATAP_0 LINT00 F10 H_INTR 17
XDP_RSVD_04 C7 14 LA_DATAN1 N26 LVD_A_DATAM_1 LINT10 F11 H_NMI 17
15 CRT_R CRT_R N31 C6 R104 1k POP = NA 14 LA_DATAP1 N27 E5
CRT_RED XDP_RSVD_05 LVD_A_DATAP_1 IGNNE_B H_IGNNE# 17
ICH
15 CRT_G CRT_G P30 D8 14 LA_DATAN2 R26 F8
CRT_GREEN XDP_RSVD_06 RC0402N LVD_A_DATAM_2 STPCLK_B H_STPCLK# 17
15 CRT_B CRT_B P29 B7 14 LA_DATAP2 R27
CRT_BLUE XDP_RSVD_07 LVD_A_DATAP_2
VGA
N30 CRT_IRTN XDP_RSVD_08 A9
XDP_RSVD_09 D9 R101 1k RC0402N
DPRSTP_B G6 R625 0 RC0402N
H_DPRSTP# 17,31
C8 R66 2.37K RC0603N R22 G10 R618 0 RC0402N
XDP_RSVD_10 LVD_IBG DPSLP_B H_DPSLP# 17
XDP_RSVD_11 B8 R600 1k POP = NA J28 LVD_VBG INIT_B G8 H_INIT# 17
+V1.05S
15 CRT_DDC_DATA L31 C10 R67 0 RC0402N N22 E11
CRT_DDC_DATA XDP_RSVD_12 RC0402N LVD_VREFH PRDY_B
15 CRT_DDC_CLK L30 D10 R68 0 RC0402N N23 F15
CRT_DDC_CLK XDP_RSVD_13 LVD_VREFL PREQ_B
B11 14 L_BKLTEN L27
<500MILS XDP_RSVD_14 LBKLT_EN
LVDS
R71 665 RC0402N P28 B10 +V3.3S L26 R73
DAC_IREF XDP_RSVD_15 R72 14
2.2K RC0402N LBKLT_CTL LBKLT_CTL
B12 L23 E13 68
TP2 TP1 XDP_RSVD_16 R74 2.2K RC0402N LCTLA_CLK THERMTRIP_B PM_THRMTRIP# 17
C 6 DREFCLK Y30 DPL_REFCLKINP XDP_RSVD_17 C11R601 1k POP = NA K25 LCTLB_CLK
RC0402N C
TP3 6 DREFCLK# Y29 R76 2.2K RC0402N K23
DPL_REFCLKINN RC0402N R75 2.2K RC0402N LDDC_CLK
6 DREFSSCLK AA30 DPL_REFSSCLKINP K24 LDDC_DATA
6 DREFSSCLK# AA31 DPL_REFSSCLKINN 14 L_VDDEN H26 LVDD_EN
C18 R77 0 RC0402N
PROCHOT_B H_PROCHOT# 31
TP4 L11 W1 R565 0 RC0402N
RSVDC1 CPUPWRGOOD H_PWRGD 17
+V1.05S
RC0402N 0 R78 EXT_TS1 K29 A13 H_GTLREF

17,31 PM_DPRSLPVR PM_EXTTS#_1/DPRSLPVR GTLREF
RC0402N 0 R79 EXT_TS0 J30
11 PM_EXTTS#0
L5
PM_EXTTS#_0
VSS H27 Place near "GTLREF"
17,25,32 DELAY_VR_PWRGOOD PWROK
16,17 PLT_RST# RC0402N 100 R80 AA3 TP24
RSTINB R81
L6 ±1%1k
TP5 RSVDD7 TP25
6 CLK_MCH_BCLK# W8 E17 RC0603N
HPL_CLKINN RSVDD6
6 CLK_MCH_BCLK W9 HPL_CLKINP G11 BPM_1B_0
TP6 E15 BPM_1B_1 BCLKN H10 CLK_CPU_BCLK# 6
AA7 G13 J10 H_GTLREF
MISC
RSVD_TPC1 BPM_1B_2 BCLKP CLK_CPU_BCLK 6

AA6 F13 C32 C33
RSVD_TPC2 BPM_1B_3 BSE0 RC0402N 0 R82
RSVD_TPC3 R5 BSEL_0 K5 MCH_BSEL0 6
R6 B18 H5 BSE1 RC0402N 0 R83 220pF 1uF
RSVD_TPC4 BPM_2_0#/RSVD BSEL_1 MCH_BSEL1 6
B20 K6 BSE2 RC0402N 0 R84 R85
BPM_2_1#/RSVD BSEL_2 MCH_BSEL2 6
+V1.05S ±1%2K
CPU
RSVD_TPC5 AA21 C20 BPM_2_2#/RSVD
W21 B21 H30 H_VID0 RC0402N
RSVD_TPC6 BPM_2_3#/RSVD VID_0 H_VID1 H_VID0 H_VID[6..0] 31
RSVD_TPC7 T21 VID_1 H29
V21 H28 H_VID2 H_VID1
RSVD_TPC8 VID_2 H_VID3 H_VID2
VID_3 G30
R566 51
RC0402N G5 G29 H_VID4 H_VID3
R576 51
RC0402N D14 RSVDD1 VID_4 H_VID5 H_VID4 +V1.05S
TDI VID_5 F29
D13 E29 H_VID6 H_VID5
CRT_R R583 51 RC0402N B14 TDO VID_6 H_VID6
R584 51 RC0402N C14 TCK R86 1k RC0402N
TMS RSVDD5 L7
R551 51 RC0402N C16 D20 R87 1k RC0402N
CRT_B TRST_B RSVDD4
H13 R89 1k RC0402N R613 R614 R615
RSVDD3 R88 1k RC0402N 470 470 470
RSVDD2 D18
CRT_G D30 BSE0 RC0402N RC0402N RC0402N
10 H_THERMDP THRMDA_1
B 10 H_THERMDN E30 THRMDC_1 RSVD_TPD2 K9 B
D19 BSE1
RSVD_TPD1 EXTBGREF
EXTBGREF K7 BSE2
R90 R91
R92
150 150
150
RC0402N RC0402N
RC0402N +V1.05S
C30 RSVD_C30
D31 RSVD_D31 R93
4 OF 6
±1%976
3 OF 6 RC0402N
403526
EXTBGREF
+V3.3S 403526
?
?
C34 R95
R94 10k RC0402N ±1% 3.32K
EXT_TS0
1uF RC0603N
R96 10k RC0402N POP = NA EXT_TS1
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
PNV2
C Name A
5 4 3 2 1
5 4 3 2 1
? +VCC_CORE
U2E
PINEVIEW_M
VCCE43 A23
A25 C376 C377 C378 C379 C380
+V0.89S_GFX +V0.89S_GFX VCCE42
REV = 1.1 A27 1uF 1uF 1uF 1uF 1uF
VCCE41 CC0402N CC0402N CC0402N CC0402N CC0402N ?
VCCE40 B23 PINEVIEW_M
T13 B24 U2F
C36 C37 C38 VCCGFXE1 VCCE39
1uF 1uF T14 VCCGFXE2 VCCE38 B25
T16 B26 A11 REV = 1.1 F24
2.2uF CC0402N CC0402N VCCGFXE3 VCCE37 VSSF1 VSSF154
T18 VCCGFXE4 VCCE36 B27 A16 VSSF2 VSSF153 F28
T19 VCCGFXE5 VCCE35 C24 A19 VSSF3 VSSF152 F4
V13 VCCGFXE6 VCCE34 C26 A29 RSVD_NCTFF1 VSSF151 G15
V19 VCCGFXE7 VCCE33 D23 A3 RSVD_NCTFF2 VSSF150 G17
W14 VCCGFXE8 VCCE32 D24 A30 RSVD_NCTFF3 VSSF149 G22
D
W16 VCCGFXE9 VCCE31 D26 A4 RSVD_NCTFF4 VSSF148 G27 D
C39 C35 C40 C41 C42 W18 D28 AA13 G31
VCCGFXE10 VCCE30 VSSF4 VSSF147
GFX/MCH
1uF 1uF 1uF 1uF 1uF W19 E22 AA14 H11
CC0402N CC0402N CC0402N CC0402N CC0402N VCCGFXE11 VCCE29 VSSF5 VSSF146
VCCE28 E24 AA16 VSSF6 VSSF145 H15
E27 AA18 H2
CPU
VCCE27 VSSF7 VSSF144
VCCE26 F21 AA2 VSSF8 VSSF143 H21
VCCE25 F22 AA22 VSSF9 VSSF142 H25
100NF改为1uF，参考checklist F25 AA25 H8
VCCE23 G19 AA26 VSSF12 VSSF140 J11
VCCE20 H17 AB19 VSSF15 VSSF137 J4
+V1.8 H19 AB21 K11
VCCE18 H22 AB28 VSSF17 VSSF135 K13
VCCE17 H24 AB29 VSSF18 VSSF134 K19
VCCE16 J17 AB30 VSSF19 VSSF133 K26
AK13 VCCSME1 VCCE15 J19 AC10 VSSF20 VSSF132 K27
C366 C365 C364 C363 C362 AK19 J21 AC11 K28
VCCSME2 VCCE14 VSSF21 VSSF131
AK9 VCCSME3 VCCE13 J22 AC19 VSSF22 VSSF130 K30
GND
2.2uF 2.2uF 2.2uF 2.2uF 2.2uF AL11 K15 AC2 K4
VCCSME4 VCCE12 VSSF23 VSSF129
AL16 VCCSME5 VCCE11 K17 AC21 VSSF24 VSSF128 K8
AL21 VCCSME6 VCCE10 K21 AC28 VSSF25 VSSF127 L1
AL25 VCCSME7 VCCE9 L14 AC30 VSSF26 VSSF126 L13
VCCE8 L16 AD26 VSSF27 VSSF125 L18
VCCE7 L19 AD5 VSSF28 VSSF124 L22
VCCE6 L21 AE1 VSSF29 VSSF123 L24
VCCE5 N14 AE11 VSSF30 VSSF122 L25
+V1.8 N16 AE13 L29
AK7 VCCCK_DDRE1 VCCE3 N19 AE15 VSSF32 VSSF120 M28
C397 AL7 VCCCK_DDRE2 VCCE2 N21 AE17 VSSF33 VSSF119 M3
C367 C368 AE22 N1
10uF VSSF34 VSSF118
10uF 100NF AE31 N13
CC1206N VSSF35 VSSF117
DDR
CC1206N CC0402N U10 AF11 N18
VCCA_DDRE1 VSSF36 VSSF116
U5 VCCA_DDRE2 AF17 VSSF37 VSSF115 N24
POWER
U8 +VCC_CORE AF28 N4
VCCA_DDRE5 VSSF40 VSSF112
U9 VCCA_DDRE6 AG10 VSSF41 VSSF111 N5
C +V1.05S V2 AG3 N8 C
FB13 180 VCCA_DDRE7 R97 VSSF42 VSSF110
V3 VCCA_DDRE8 AH18 VSSF43 VSSF109 P13
FB0603N V4 100 AH23 P14
VCCA_DDRE9 RC0402N VSSF44 VSSF108
W10 VCCA_DDRE10 AH28 VSSF45 VSSF107 P16
C369 C370 W11 AH4 P18
10uF 100NF VCCA_DDRE11 VSSF46 VSSF106
VCCSENSE C29 VCCSENSE 31 AH6 VSSF47 VSSF105 P19
CC1206N CC0402N AA10 B29 AH8 P21
VCCACK_DDRE1 VSSSENSE VSSSENSE 31 VSSF48 VSSF104
TP7 AA11 VCCACK_DDRE2 VCCA Y2 +V1.5S AJ1 RSVD_NCTFF5 VSSF103 P3
R98 AJ16 P4
+V1.05S 100 VSSF49 VSSF102
AJ31 VSSF50 VSSF101 R25
C381 RC0402N AK1 R7
10NF RSVD_NCTFF6 VSSF100
VCCE1 D4 AK2 RSVD_NCTFF7 VSSF99 R8
CC0402N AK23 T11
VSSF51 VSSF98
C372 C371 VCCPE2 B4 AK30 RSVD_NCTFF8 VSSF97 U22
1uF 100NF VCCPE1 B3 AK31 RSVD_NCTFF9 VSSF96 U23
C382 AL13 U24
CC0402N CC0402N VSSF52 VSSF95
AA19 100NF AL19 U27
VCCD_AB_DPL CC0402N VSSF53 VSSF94
AL2 RSVD_NCTFF10 VSSF93 V14
AL23 VSSF54 VSSF92 V16
V11 +V1.8S AL3 V28
+V1.8S VCCD_HMPLL RSVD_NCTFF12 VSSF90
AL9 VSSF55 VSSF88 W13
AC31 VCCSFR_AB_DPL B13 VSSF56 VSSF87 W2
C373 V30 FB10 120 B16 W23
1uF VCCALVDE2 FB0805N VSSF57 VSSF86
VCCDLVDE1 W31 B19 VSSF58 VSSF85 W25
CC0402N B22 W26
C384 C383 VSSF59 VSSF84
C385 B30 W28
LVDS
10uF 10uF RSVD_NCTFF14 VSSF83
FB12 180 T30 100NF B31 W30
VCCACRTDAC CC1206N CC1206N +V1.5S RSVD_NCTFF15 VSSF82
EXP\CRT\PLL
FB0603N CC0402N B5 W4
+V3.3S VSSF60 VSSF81
C374 B9 W5
1uF +V1.05S VSSF61 VSSF80
C1 RSVD_NCTFF16 VSSF79 W6
CC0402N T31 T1 C12 W7
VCC_GIO VCCA_DMIE3 C387 C386 VSSF62 VSSF78
J31 VCCRING_EAST VCCA_DMIE2 T2 C21 VSSF63 VSSF77 Y28
C3 T3 1uF 1uF C22 Y3
VCCRING_WESTE1 VCCA_DMIE1 +V1.8S VSSF64 VSSF76
DMI
B2 CC0402N CC0402N C25 Y4
VCCRING_WESTE2 VSSF65 VSSF75
C2 VCCRING_WESTE3 RSVDE1 P2 C31 RSVD_NCTFF17
B
A21 VCC_LGI_VID VCCSFR_DMIHMPLL AA1 D22 VSSF66 B
C375 +V1.05S E1
1uF RSVD_NCTFF18
VCCP E2 C389 E10 VSSF67
CC0402N E19
1uF VSSF68
CC0402N E21 VSSF69
E25 VSSF70 VSSF74 T29
E8 VSSF71
403526 5 OF 6 F17 VSSF72
F19 VSSF73
?
403526 6 OF 6
?
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
PNV3
C Name A
5 4 3 2 1
5 4 3 2 1
+V3.3S
+V3.3S
C43
0.1u R604
CC0402N 8.2K
RC0402N
R131 0 RC0402N U3 EMC1402
D 8 H_THERMDP D
1 8 I2C1B_CLK
VDD SMCLK I2C_CLK 25 R100 0 RC0402N
C406 2 7 I2C1B_DATA PM_THERM 17
DP SMDATA I2C_DATA 25
2.2NF 3 6 EMC_ALERT#
R146 0 RC0402N CC0402N DN ALERT
8 H_THERMDN 4 THERM GND 5
+V3.3S
TSOP65P490-8N
R99 4.7K EMC_THERM#
RC0402N
+V5S
+V_DC
C C
C332
FAN R529
2K Q57
100NF
CC0402N
5
6
7
8
POP = NA AO4422
3
POP = NA
4
FAN_ON 1 Q56
25 FAN_ON
sc-70
POP = NA
3
2
1
1
2
1
2 2 E1 E1
R530 D23 3 E2
N
10k 3 E2
4 4
RC0402N
POP = NA C333 C334 CN13
100NF 10uF
CC0402N CC1206N
P
POP = NAsod2514n POP = NA POP = NA
R531 0 RC0603N
+V3.3S
+V5S
R544
10K
RC0402N
R543
25 KBC_FAN_SPEED 10K
RC0402N
3
D21 1SS355TE17
Q32
C409 1 N P
DTC144EUAsod2514n
B 0.1u B
CC0402N R545
2
100
RC0402N
C410
1NF
CC0402N
R542 33 R541 1M POP = NA

RC0402N POP = NA RC0402N
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
Thermal&Fan
C Name A
5 4 3 2 1
5 4 3 2 1
D
DDR2 SODIMM0 D
CN23A
M_CKE0 79 5 M_A_DQ0
7,13 M_CKE0 CKE0 DQ0 M_A_DQ[63..0] 7
M_CKE1 80 7 M_A_DQ1
7,13 M_CKE1 CKE1 DQ1
M_CLK_DDR0 17M_A_DQ2
M_CLK_DDR0 DQ2
7 M_CLK_DDR0 30 CK0 DQ3 19M_A_DQ3
M_CLK_DDR#0 32 4 M_A_DQ4
7 M_CLK_DDR#0 CK0# DQ4
DQ5 6 M_A_DQ5
C44 Layout Note: M_CLK_DDR1 164 14M_A_DQ6
7 M_CLK_DDR1 CK1 DQ6 +V1.8 +V1.8
M_CLK_DDR#1 166 16M_A_DQ7
Place near SO-DIMM 7 M_CLK_DDR#1 CK1# DQ7
10pF 23M_A_DQ16
CC0402N M_A_BS#0 DQ8
7,13 M_A_BS#[2..0] 107 BA0 DQ9 25M_A_DQ17
M_A_BS#1 106 M_A_DQ18
35 CN23B
M_CLK_DDR#0 BA1 DQ10 M_A_DQ19
DQ11 37
M_A_A0 102 M_A_DQ20
20 C45 C46 C47 C48 C49
7,13 M_A_A[14..0] A0 DQ12
M_A_A1 101 M_A_DQ21
22 112 18
M_A_A2 A1 DQ13 M_A_DQ22 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF VDD_01 VSS16
100 A2 DQ14 36 111 VDD_02 VSS17 24
M_A_A3 99 M_A_DQ23
38 CC0603N CC0603N CC0603N CC0603N CC0603N 117 41
M_A_A4 A3 DQ15 M_A_DQ8 POP = NA POP = NA VDD_03 VSS18
98 A4 DQ16 43 96 VDD_04 VSS19 53
M_CLK_DDR1 M_A_A5 97 M_A_DQ9
45 95 42
M_A_A6 A5 DQ17 M_A_DQ10 VDD_05 VSS20
94 A6 DQ18 55 118 VDD_06 VSS21 54
M_A_A7 92 M_A_DQ11
57 81 59
93 A8 DQ20 44 82 VDD_08 VSS23 65
C50 Layout Note: M_A_A9 91 M_A_DQ13
46 87 60
105 56 103 66
10pF Place near SO-DIMM M_A_A11 90
A10/AP DQ22 M_A_DQ15
58 +V1.8 88
VDD_10 VSS25
127
CC0402N M_A_A12 A11 DQ23 M_A_DQ24 +V3.3S VDD_11 VSS26
89 A12 DQ24 61 104 VDD_12 VSS27 139
M_A_A13 116 M_A_DQ25
63 128
M_CLK_DDR#1 M_A_A14 A13 DQ25 M_A_DQ26 C51 C52 C53 C56 VSS28
86 A14 DQ26 73 199 VDDSPD VSS29 145
C 84 M_A_DQ27
75 100NF 100NF 100NF 100NF C54 C55 165 C
M_A_BS#2 A15 DQ27 M_A_DQ28 CC0402N CC0402N CC0402N CC0402N 2.2uF 100NF VSS30
85 A16_BA2 DQ28 62 83 NC1 VSS31 171
M_A_DQ29
64 POP = NA POP = NA CC0603N CC0402N 120 172
M_CS#0 DQ29 M_A_DQ30 NC2 VSS32
7,13 M_CS#0 110 S0# DQ30 74 50 NC3 VSS33 177
M_CS#1 115 M_A_DQ31
76 69 187
7,13 M_CS#1 S1# DQ31 NC4 VSS34
M_A_DQ32
123 163 178
DQ32 +V1.8 8 PM_EXTTS#0 NCTEST VSS35
7,13 M_A_RAS# M_A_RAS# 108 M_A_DQ33
125 190
M_A_CAS# RAS# DQ33 M_A_DQ34 VSS36
7,13 M_A_CAS# 113 CAS# DQ34 135 7,29 M_VREF 1 VREF VSS37 9
7,13 M_A_WE# M_A_WE# 109 M_A_DQ35
137 21
WE# DQ35 M_A_DQ36 C57 C58 C59 C60 C61 C62 VSS38
DQ36 124 VSS39 33
R103 10k RC0402N SA0_DIM1 198 M_A_DQ37
126 100NF 100NF 100NF 100NF 100NF 155
R102 10k RC0402N SA1_DIM1 SA0 DQ37 M_A_DQ38 CC0402N CC0402N CC0402N CC0402N 2.2uF CC0402N VSS40
200 SA1 DQ38 134 VSS41 34
M_A_DQ39
136 POP = NA POP = NA CC0603N 132
M_A_DM0 DQ39 M_A_DQ40 POP = NA VSS42
10 DM0 DQ40 141 47 VSS1 VSS43 144
M_A_DM2 26 M_A_DQ41
143 133 156
7 M_A_DM[7..0] DM1 DQ41 VSS2 VSS44
M_A_DM1 52 M_A_DQ42
151 183 168
M_A_DM3 DM2 DQ42 M_A_DQ43 VSS3 VSS45
67 DM3 DQ43 153 77 VSS4 VSS46 2
M_A_DM4 130 M_A_DQ44
140 12 3
147 DM5 DQ45 142 48 VSS6 VSS48 15
M_A_DM6 170 M_A_DQ46
152 184 27
185 DM7 DQ47 154 78 VSS8 VSS50 39
M_A_DQ48
157 71 149
M_A_DQS0 DQ48 M_A_DQ49 VSS9 VSS51
13 DQS_0 DQ49 159 72 VSS10 VSS52 161
M_A_DQS2 31 M_A_DQ50
173 121 28
7 M_A_DQS[7..0] DQS_1 DQ50 VSS11 VSS53
175 122 40
M_A_DQS3 DQS_2 DQ51 M_A_DQ52 VSS12 VSS54
70 DQS_3 DQ52 158 196 VSS13 VSS55 138
160 193 150
M_A_DQS5 DQS_4 DQ53 M_A_DQ54 VSS14 VSS56
148 DQS_5 DQ54 174 8 VSS15 VSS57 162
176
M_A_DQS7 DQS_6 DQ55 M_A_DQ56
188 DQS_7 DQ56 179
M_A_DQ57
181
M_A_DQS#0 DQ57 M_A_DQ58 DDR200-F521SB
11 DQS_#0 DQ58 189
M_A_DQS#2 29 M_A_DQ59
191 SMD-DDR-60X760P-200N-R
7 M_A_DQS#[7..0] DQS_#1 DQ59
180
M_A_DQS#3 DQS_#2 DQ60 M_A_DQ61
68 DQS_#3 DQ61 182 TP20
192
M_A_DQS#5 DQS_#4 DQ62 M_A_DQ63 DDR200-F521SB
146 DQS_#5 DQ63 194
M_A_DQS#6 167 SMD-DDR-60X760P-200N-R
B
M_A_DQS#7 DQS_#6 SMB_CLK_S2 B
186 DQS_#7 SCL 197 SMB_CLK_S2 6,17,21,22
195 SMB_DATA_S2
SDA SMB_DATA_S2 6,17,21,22
M_ODT0 114
7,13 M_ODT0 ODT0
M_ODT1 119
7,13 M_ODT1 ODT1
E1
E2
TP21
E1
E2
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
DDR2_SODIMM1
C Name A
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
DDR2_SODIMM2
C Name A
5 4 3 2 1
5 4 3 2 1
D D
DDR2 Termination
+V0.9S
R105 47 RC0402N
M_CS#0 7,11
R106 47 RC0402N
M_CS#1 7,11
C63 100NF CC0402N
Layout note: R107 47 RC0402N

M_CKE0 7,11
R108 47 RC0402N
Place one cap M_CKE1 7,11
C64 100NF CC0402N
close to every 2
pullup resistors C65 100NF CC0402N R109 47 RC0402N
M_ODT0 7,11
teminated to +0.9S R110 47 RC0402N
M_ODT1 7,11
M_A_BS#[2..0] 7,11
C66 100NF CC0402N R111 47 RC0402N M_A_BS#0
R112 47 RC0402N M_A_BS#1
C67 100NF CC0402N R113 47 RC0402N M_A_BS#2
R114 47 RC0402N
M_A_WE# 7,11
C R115 47 RC0402N C
M_A_CAS# 7,11
R116 47 RC0402N
M_A_RAS# 7,11
C68 100NF CC0402N R117 47 RC0402N M_A_A0 M_A_A[14..0]

M_A_A[14..0] 7,11
R118 47 RC0402N M_A_A1
C69 100NF CC0402N R119 47 RC0402N M_A_A2
R120 47 RC0402N M_A_A3
C70 100NF CC0402N R121 47 RC0402N M_A_A4
R122 47 RC0402N M_A_A5
C71 100NF CC0402N R123 47 RC0402N M_A_A6
R124 47 RC0402N M_A_A7
C72 100NF CC0402N R125 47 RC0402N M_A_A8
R126 47 RC0402N M_A_A9
C73 100NF CC0402N R127 47 RC0402N M_A_A10
R128 47 RC0402N M_A_A11
C74 100NF CC0402N R129 47 RC0402N M_A_A12
R130 47 RC0402N M_A_A13
R547 47 RC0402N M_A_A14
B B
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
DDR2_Temination
C Name A
5 4 3 2 1
5 4 3 2 1
IPEX 30PIN CON"

cable 1 VCC
LCD CON"
2 VCC
3 VCC
4
5
6
GND
GND
GND
LVDS Connector
1 VCC 7 GND
D 2 VCC 8 Rin0- D
3 VCC 9 Rin0+
4 GND 10 GND
5 ClkIN- 11 Rin1- +V3.3S FB22 120
FB0805N POP = NA LCD_VCC
6 ClkIN+ 12 Rin1+ U53
7 GND 13 GND 5 VIN
VOUT 1
R140 0 POP = NA
8 Rin2- 14 Rin2- 4 SS
Tss=0.2*Css*Vin C75 C85
9 Rin2+ 15 Rin2+ 10uF 0.1uF C78
3 EN/ENBGND 2
C76 C77
10 GND 16 GND CC1206N CC0603N 10uF 100NF
0.01uF SOT95P280-5N CC1206N CC0402N
11 Rin1- 17 ClkIN- CC0402N APL3512A/B
12 Rin1+ 18 ClkIN+
13 GND 19 GND
14 Rin0- 20 NC
15 Rin0+ 21 NC R141 0
USE APL3512A High Enable
8 L_VDDEN
16 GND 22 GND
17 Vled 23 Vled R132
100k
18 Vled 24 Vled RC0402N
19 GND 25 GND
20 ADJ 26 GND
C 27 NC C
28 NC
29 ADJ
30 NC
LCD_VCC
C79
100NF
CC0402N
+V_LED
+V5S +V_DC
CN2
1 1
2 2
3 3 R133 R134
R142 0 POP = NA FB21 120
4 4 0
5 0 FB0805N POP = NA
5 LA_CLKN 8 RC0603N
E1 E1 6 6 LA_CLKP 8 RC0603N POP = NA
B R144 0 L_VDDEN POP = NA Q3 AO4419 B
7 7
E2 8 +V_LED 1 8
E2 8 LA_DATAN2 8
9 9 LA_DATAP2 8 2 7
10 10 3 6
11 11 LA_DATAN1 8 5
12 SOIC127P600-8N
LA_DATAP1 8 C81
4
12 R135
13 13 100NF
C80
14 14
15
LA_DATAN0 8 ledon 10k
10uF
CC0402N
15 LA_DATAP0 8 RC0402N
16 +V3.3S CC1206N
16 R137
17 R629 10k RC0402N
17
18 18
19 19 ledon
R136 0 C82
20 20 BL_ADJ 25 1k
100NF
R11 0 CC0402N
POP = NA LBKLT_CTL 8 R645 Q6
U4
3
C83
5
0
Arvin modify 2009-08-27 sc-70 0.01uF
RC0402N 1 R138 1k
25 BLCTL 1 CC0402N
3
POP = NA 4
8 L_BKLTEN 2 Q4
S D
C84 2N7002LT1
2
100NF
3
R139 1 G
CC0402N
2
100k POP = NA
RC0402N
POP = NA
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
LCD_CON
C Name A
5 4 3 2 1
5 4 3 2 1
D D
CN7
F2T30U-XXT3-E
+V3.3S
1 1
2 2
23 MDI0+ 3 3 E1 E1
23 MDI0- 4 4 E2 E2
23 MDI1+ 5 5
23 MDI1- 6 6
23 MDI2+ 7 7
23 MDI2- 8 8
C 23 MDI3+ 9 9
C
23 MDI3- 10 10
11 11
8 CRT_R CRT_R 12
CRT_G 12
8 CRT_G 13 13
8 CRT_B CRT_B 14 14
15 15
8 CRT_HSYNC CRT_HSYNC 16
CRT_VSYNC 16
8 CRT_VSYNC 17 17
8 CRT_DDC_CLK CRT_DDC_CLK 18
CRT_DDC_DATA 18
8 CRT_DDC_DATA 19 19
20 20
21 21
25 NUMLOCK_LED 22 22
23 23
25 CAPLOCK_LED 24 24
25 LID 25 25
+V3.3A 26
POWSW# 26
26,34 POWSW# 27 27
+V5S 28 28
29 29
30 30
B B
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
CRT
C Name A
5 4 3 2 1
5 4 3 2 1
USN PORT USED FOR

D D
U7B USB0 Outside USB PORT
DMI_TXN0 R23 H7 USB_PN0 34
USB1 MAINBOARD USB PORT
DMI_TXP0 DMI0RXN USBP0N
R24 H6 USB_PP0 34
DMI_RXN0 P21
DMI0RXP USBP0P
H3 USB_PN1 19
USB2 Card Reader
DMI_RXP0 DMI0TXN USBP1N
7 DMI_TXN[1:0] P20 H2 USB_PP1 19
DMI_TXN1 T21
DMI0TXP USBP1P
J2 USB_PN2 33
USB3 CDMA
DMI_TXP1 DMI1RXN USBP2N
7 DMI_TXP[1:0] T20 J3 USB_PP2 33
DMI_RXN1 T24
DMI1RXP USBP2P
K6 USB4 WLAN OR TOUCH SCREEN
DMI
DMI1TXN USBP3N USB_PN3 22
7 DMI_RXN[1:0] DMI_RXP1 T25 K5
DMI1TXP USBP3P USB_PP3 22 USB5 Bluetooth
T19 DMI2RXN USBP4N K1 USB_PN4 21
7 DMI_RXP[1:0] T18 K2 USB_PP4 21
U23
DMI2RXP USBP4P
L2 USB_PN5 35
USB6 DMB
DMI2TXN USBP5N
U24 L3 USB_PP5 35
V21
DMI2TXP USBP5P
M6 USB_PN6 21
USB7 Camera
DMI3RXN USBP6N
V20 DMI3RXP USBP6P M5 USB_PP6 21 +V3.3A
V24 DMI3TXN USBP7N N1 USB_PN7 35
V23 DMI3TXP USBP7P N2 USB_PP7 35
USB_OC0# 34 RC0402N 10k R150
OC0# D4
K21 C5
USB
21 PCIE_RXN1_WLAN PERN1 OC1# USB_OC1# 19 RC0402N 10k R202
21 PCIE_RXP1_WLAN K22 PERP1 OC2# D3
C94 100NF CC0402N J23 D2 RC0402N 10k R152
21 PCIE_TXN1_WLAN C95 100NF CC0402N PETN1 OC3# RC0402N 10k R154
21 PCIE_TXP1_WLAN J24 PETP1 OC4# E5
M18 E6 RC0402N 10k R153
PERN2 OC5#/GPIO29 RC0402N 10k R156
M19 PERP2 OC6#/GPIO30 C2
K24 C3 RC0402N 10k R155
PETN2 OC7#/GPIO31
K25 PETP2
23 PCIE_RXN3_LAN L23 PERN3
23 PCIE_RXP3_LAN L24 PERP3
C98 100NF CC0402N L22 G2
23 PCIE_TXN3_LAN PETN3 USBRBIAS
PCI-E
C99 100NF CC0402N M21 G3 USB_RBIAS_PN USB_RBIAS_PN
23 PCIE_TXP3_LAN PETP3 USBRBIAS#
P17 PERN4
P18 PERP4
N25 R157
PETN4 22.6 ±1%
C
N24 PETP4 C
F4 RC0402N
+V1.5S CLK48 CLK_USB48 6
TP10
Place within 500mils Place within 500mils
R158
24.9
of ICH ball, of ICH ball,
RC0402N And avoid routing next to
clock/high speed signals
DMI_IRCOMP_R H24 DMI_ZCOMP
J22 DMI_IRCOMP
TP28
6 CLK_PCIE_ICH# W23 DMI_CLKN
W24 DMI_CLKP
6 CLK_PCIE_ICH
TP29
413547
+V3.3S
U7A
TP9
A5 U1LB B22
R159 8.2K RC0402N PAR AD0
B15 DEVSEL# AD1 D18
6 CLK_PCIF_ICH J12 PCICLK AD2 C17
R550 0 RC0402N POP = NA A23 C18
8,17 PLT_RST# R160 8.2K RC0402N PCIRST# AD3
B
B7 IRDY# AD4 B17 B
C22 PME# AD5 C19
R162 8.2K RC0402N B11 B18
R163 8.2K RC0402N SERR# AD6
F14 STOP# AD7 B19
R164 8.2K RC0402N A8 D16
R165 8.2K RC0402N PLOCK# PCI
AD8
A10 TRDY# AD9 D15
R166 8.2K RC0402N D10 A13
R167 8.2K RC0402N PERR# AD10
A16 FRAME# AD11 E14
AD12 H14
AD13 L14
AD14 J14
A18 GNT1# AD15 E10
E16 GNT2# AD16 C11
AD17 E12
R169 8.2K RC0402N G16 B9
R170 8.2K RC0402N REQ1# AD18
A20 REQ2# AD19 B13
AD20 L12
AD21 B8
R640 8.2K RC0402N POP = NAG14 A3
GPIO48/ STRAP1# AD22
A2 GPIO17/ STRAP2# AD23 B5
R636 8.2K RC0402N TP18
C15 GPIO22 AD24 A6
R596 8.2K RC0402N C9 G12
GPIO1 AD25
AD26 H12
AD27 C8
AD28 D9
R171 8.2K RC0402N B2 C7
R172 8.2K RC0402N PIRQA# AD29
D7 PIRQB# AD30 C1
R173 8.2K RC0402N B3 B1
R174 8.2K RC0402N PIRQC# AD31
H10 PIRQD#
R175 8.2K RC0402N E8
R176 8.2K RC0402N PIRQE#/GPIO2
D6 PIRQF#/GPIO3
R177 8.2K RC0402N H8 H16
R178 8.2K RC0402N PIRQG#/GPIO4 C/BE0#
F8 PIRQH#/GPIO5 C/BE1# M15
C/BE2# C13
D11 STRAP0# C/BE3# L16
R605 8.2k
RC0402N K9
R179 +V3.3S R606 8.2k
RC0402N M13 RSVD01
1k RSVD02
A RC0402N A
413547
POP = NA ?

5th floor,Block K,
Title <Title>
Size Sheet Rev
TPT1
C Name A
5 4 3 2 1
5 4 3 2 1
U1LB
U7C
R12 RSVD03 SATA0RXN AE6 SATA_RXN0 20

AE20 RSVD04 SATA0RXP AD6 SATA_RXP0 20
AD17 AC7 CC0402N 0.01uF C101
RSVD05 SATA0TXN CC0402N 0.01uF C102 SATA_TXN0 20
D AC15 RSVD06 SATA0TXP AD7 SATA_TXP0 20
D
AD18 RSVD07 SATA1RXN AE8
Y12 RSVD08 SATA1RXP AD8
AA10 RSVD09 SATA1TXN AD9
AA12 RSVD10 SATA1TXP AC9
SATA
Y10 RSVD11 TP11
AD15 RSVD12
W10 RSVD13
V12 RSVD14 TP12
AE21 RSVD15
+V3.3A AE18 RSVD16
D29 +V3.3A_RTC AD19 RSVD17
U12 CLK_PCIE_SATA# 6
RSVD18 CLK_PCIE_SATA 6
SATA_CLKN AD4
P N
AC17 RSVD19 SATA_CLKP AC4
AB13 RSVD20
AC13 AD11 R180 24.9 RC0402N Placed within 500-mils of ICH9MSFF pin.
RSVD21 SATARBIAS#
sod2514n AB15 RSVD22 SATARBIAS AC11 +V3.3S
Y14 RSVD23 SATALED# AD25
+V3.3S
R181
CN18 AB16 RSVD24 10k
D28 AE24 RSVD25 RC0402N
AE23 RSVD26
R611 1k RC0402N P HDD_LED# 34 R617 8.2K RC0402N
E1 E1 1 1 N
AA14 U16 +V1.05S
RSVD27 A20GATE H_A20GATE 25
V14 RSVD28 A20M# Y20 H_A20M# 8
E2 E2 2 2
sod2514n +V3.3S CPUSLP# Y21 H_DPSLP# 8
IGNNE# Y18 H_IGNNE# 8
INIT3_3V# AD21
R602 AD16 RSVD29
INIT# AC25 H_INIT# 8 +V1.05S PLACE NEAR TO TPT
10k AB11 RSVD30 AB24
HOST
AB10 INTR H_INTR 8 R598 56 RC0402N
RC0402N RSVD31 Y22 H_FERR#
FERR# H_FERR# 8
AD23 GPIO36 NMI T17 H_NMI 8 +V3.3S
AC21 R182
RCIN# H_RCIN# 25
AA16 56
SERIRQ INT_SERIRQ 25
AA21 RC0402N
SMI# H_SMI# 8
C STPCLK# V18 H_STPCLK# 8 C
THERMTRIP# AA20 R183 54.9 RC0402N
PM_THRMTRIP# 8
H_RCIN# R599 10k RC0402N
+V3.3S
INT_SERIRQ R619 10k RC0402N

413547
? R634 R555
10k 10k
RC0402N RC0402N
+V3.3S
STPPCI# RC0402N 0 R633
STPCPU# RC0402N 0 R554 PM_STPPCI# 6
PM_STPCPU# 6
R185 +V3.3S +V3.3A
R184 10k
U1LB
10k RC0402N U7D
RC0402N
ICH_DRQ#1 AA5 T15 R548 10k RC0402N
25 LPC_AD[3..0] LDRQ1#/GPIO23 BM_BUSY#/GPIO0
LPC_AD0 V6 W16 R597 8.2K RC0402N
LAD0/FWH0 GPIO6
LPC
LPC_AD1 AA6 W14
LAD1/FWH1 GPIO7 SMC_RUNTIME_SCI# 25
LPC_AD2 Y5 K18 R627 8.2K RC0402N
LPC_AD3 LAD2/FWH2 GPIO8 R631 8.2K RC0402N
W8 LAD3/FWH3 GPIO9 H19
ICH_DRQ#0 Y8 M17
LDRQ0# GPIO10 SMC_EXTSMI# 25
Y4 A24 R635 8.2K RC0402N
25 LPC_FRAME# LFRAME# GPIO12
GPIO13 C23 SMC_WAKE_SCI# 25
R186 33 RC0402N P6 P5 R552 8.2K RC0402N
24 HDA_BITCLK R187 33 RC0402N HDA_BIT_CLK GPIO14 R553 4.7k PM_DPRSLPVR
U2 E24
AUDIO
24 HDA_RST# HDA_RST# GPIO15 R632 100
24 HDA_SDATAIN0 W2 HDA_SDI0 DPRSLPVR AB20 PM_DPRSLPVR 8,31
V2 Y16 STPPCI#
HDA_SDIN1 STP_PCI# STPCPU#
P8 HDA_SDIN2 STP_CPU# AB19
R188 33 RC0402N AA1 R3 +V3.3S R580
12pF C103 RTC_X2 24 HDA_SDATAOUT HDA_SDOUT GPIO24 TP17 R637
R189 33 RC0402N Y1 C24 1k RC0402N 10k +V3.3S
CC0402N 24 HDA_SYNC HDA_SYNC GPIO25
AA3 D19 R603 8.2K RC0402N RC0402N
6 CLK_ICH14 CLK14 GPIO26
GPIO27 D20
1
U3 F22
EPROM
B EE_CS GPIO28 B
R190 AE2 EE_DIN CLKRUN# AC19 PM_CLKRUN# 25 +V3.3A +V3.3A
2 3
10M T6 EE_DOUT GPIO33 U14
V3 AC1 R630
X2 RC0402N EE_SHCLK GPIO34 GPIO38 R638 8.2K RC0402N 1k
4
32.768KHz GPIO38 AC23

T4 AC24 GPIO39 R639 8.2K RC0402N PM_THERM RC0402N
OSC120P150X670-4L LAN_CLK GPIO39 R581 R586
P7 POP = NA
LANR_STSYNC 1k 10k R587 R588
12pF C104 RTC_X1 B23 LAN_RST# CPUPWRGD/GPIO49 AB22 H_PWRGD 8 MCH_SYNC# RC0402N RC0402N 8.2K 1k
AA2
LAN
CC0402N LAN_RXD0 RC0402N RC0402N

AD1 AB17 RI# POP = NA
LAN_RXD1 THRM# PM_THERM 10
AC2 V16 R577 0 RC0402N R595
LAN_RXD2 VRMPWRGD DELAY_VR_PWRGOOD 8,25,32
MISC
W3 AC18 MCH_SYNC# PM_SYSRST# 8.2K

LAN_TXD0 MCH_SYNC# RC0402N
T7 LAN_TXD1 PWRBTN# E21 PM_PWRBTN# 25
U4 H23 RI# R578 PCIE_WAKE#
LAN_TXD2 RI# 10k
+V3.3A_RTC SUS_STAT#/LPCPD# G22 PM_SUS_STAT 25
RTC_X1 W4 D22 RC0402N PM_BATLOW#_R
RTC
R191 20K RC0402N RTC_X2 RTCX1 SUSCLK

V5 RTCX2 SYS_RESET# G18 PM_SYSRST# 25 +V3.3A_RTC
RTC_RST# T5 G23
RTCRST# PLTRSTB PLT_RST# 8,16
C25 R589 0 RC0402N
C105 WAKE# PCIE_WAKE# 21..23
R192 10k RC0402N E20 T8 SM_INTRUDER# RC0402N 1M R590
1uF C106 +V3.3A SMBALERT#/GPIO11 INTRUDER#
SMB_CLK H18 U10 R579 0 RC0402N
CC0603N 1uF SMBCLK PWROK PM_ICH_PWROK 32
SMB
SMB_DATA E23 AC3 R585 100 RC0402N

CC0603N SMBDATA RSMRST# PM_RSMRST# 25
R193 10k RC0402N H21 AD3 R592 332K RC0603N +V3.3A_RTC
R195 10k RC0402N SMLALERT# INTVRMEN R582
F25 SMLINK0 SPKR J16 R522
R194 10k RC0402N F24 10k
SMLINK1 10k
H20 R594 100 RC0402N RC0402N
SLP_S3# PM_SLP_S3# 25,29,32 RC0402N
R2 E25 R593 100 RC0402N
SPI_MISO SLP_S4# PM_SLP_S5# PM_SLP_S4# 25,29,32
T1 SPI_MOSI SLP_S5# F21
TP16
SPI
M8 SPI_CS#
P9 B25 PM_BATLOW#_R +V1.05S
SPI_CLK BATLOW#
R4 SPI_ARB DPRSTP# AB23
DPSLP# AA18
RSVD31 F20
R626
R624
56
56
RC0402N
RC0402N
POP = NA H_DPRSTP# 8,31
413547 POP = NA
H_DPSLP# 8
A A
+V3.3S +V3.3S
+V3.3A
C100
100NF
R198 R199
CC0402N
5
R196 R197
2.2K 2.2K
1
10k 10k Q7 1
RC0402N RC0402N 5th floor,Block K,
RC0402N RC0402N 4
G
2N7002LT1 21..23,25 BUF_PLT_RST# Xiamen Exprot Processing Zone,

2 S D 3 SMB_CLK 2 PLT_RST#
6,11,21,22 SMB_CLK_S2 Haicang District,Xiamen,China,361026
SOT95P237-3N R168
1
Q8 100k U8
3
2N7002LT1 RC0402N SN74LVC1G08DCKR

G
2 S D 3 SMB_DATA sot65p190-5n Title <Title>

6,11,21,22 SMB_DATA_S2
SOT95P237-3N Size Rev
Sheet
TPT2
C Name A
5 4 3 2 1
5 4 3 2 1
+V5S
+V3.3S
U7F
R200
100 VSS01 A1
D8 A25
RC0402N VSS02
VCC5REF VSS03 B6
D 3 1 D
VSS04 B10
C107 C108 VSS05 B16
2 +V5A
100NF 1uF VSS06 B20
CC0402N CC0402N VSS07 B24
U1LB E18
VSS08
VSS09 F16
U7E +V3.3A G4
R201 VSS10
VSS11 G8
VCC5REF F12 10
VSS12 H1
RC0603N H4
D9 VSS13
VSS14 H5
F5 VCC5REF_SUS 3 1 K4
VCC5REF_SUS +V1.5S VSS15
VSS16 K8
VCCSATAPLL Y6 2 VSS17 K11
+V3.3A_RTC C110 C111 K19
C109 C114 100NF 1uF VSS18
VCCRTC AE3 VSS19 K20
C112 C113 100NF 10uF CC0402N CC0402N L4
0.01uF 100NF CC0402N CC1206N VSS20
VCCDMIPLL Y25 VSS21 M7
CC0402N CC0402N C115 C116 M11
100NF 10uF VSS22
VCCUSBPLL F6 VSS23 N3
CC0402N CC1206N N12
VSS24
C117 C118 C119 C120 C121 VSS25 N13
100NF 100NF 100NF 100NF 10uF VSS26 N14
CC0402N CC0402N CC0402N CC0402N CC1206N VSS27 N23
V_CPU_IO W18
VSS28 P11
VSS29 P13
VSS30 P19
+V1.05S VSS31 R14
VCC1_5_1 AA8
VSS32 R22
VCC1_5_2 M9
VSS33 T2
VCC1_5_3 M20
C122 C123 C124 VSS34 T22
VCC1_5_4 N22
100NF 100NF 10uF VSS35 V1
CC0402N CC0402N CC1206N VSS36 V7
VSS37 V8
V19
POWER
VSS38
VSS39 V22
VSS40 V25
VCC1_05_1 J10
C
VSS41 W12 C
VCC1_05_2 K17
VSS42 W22
VCC1_05_3 P15
VSS43 Y2
VCC1_05_4 V10
VSS44 Y24
VSS45 AB4
+V3.3S AB6
VSS46
VSS47 AB7
VCC3_3_1 H25 VSS48 AB8
AD13 C125 C126 C127 C128 C129 C130 AC8
VCC3_3_2 1uF 1uF 1uF 100NF 100NF 100NF VSS49
VCC3_3_3 F10 VSS50 AD2
G10 CC0402N CC0402N CC0402N CC0402N CC0402N CC0402N AD10
VCC3_3_4 VSS51
VCC3_3_5 R10 VSS52 AD20
VCC3_3_6 T9 VSS53 AD24
+V3.3A VSS54 AE1
VSS55 AE10
VSS56 AE25
VCCSUS3_3_1 F18
N4 C131 C132 C133 C134
VCCSUS3_3_2 100NF 100NF 100NF 10uF
VCCSUS3_3_3 K7
F1 CC0402N CC0402N CC0402N CC1206N
VCCSUS3_3_4
VSS57 G24
VSS58 AE13
VSS59 F2
RSVD32 AE16
413547
?
413547
B B
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
TPT3
C Name A
5 4 3 2 1
5 4 3 2 1
USB D
USB Port3
+V5_USB1
1
+ CP22 C400
100uF
CCP7343N 1NF
2
+V5S F3
f1206n R620 0 RC0603N CN34

1 2 +V5_USB1 330mA
FIL_175P200X120-4L 1
B22 VBUS
16 USB_PP1 1 UNB 3 D_PLUS
C317 R333 FIL6 E1
100NF 562 POP = NA GND2
C
GND3 E2 C
CC0402N RC0603N GND
4 B33 E3
GND4
16 USB_PN1 2 D_MINUS
USB_OC1# 16 4 GND1 GND5 E4
1
D32 D31
R621 0 RC0603N USB0005DP USB0005DP
R653 C533 CC0402N CC0402N
1k 100NF POP = NA POP = NA
2
RC0603N CC0402N 020173MR004S52MZL-C
TH-USB-250PX200P-4N
B B
MH6
MH1 MH3
MH7
MH2 MH4
MH8
MH5
MH9
MARK1 MARK2 MARK3 MARK4
MARK5 MARK6 MARK7 MARK8
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
USB_PORT&LED
C Name A
5 4 3 2 1
5 4 3 2 1
D D
+V3.3S
CN4
1 1
17 SATA_TXP0 2 2
17 SATA_TXN0 3 3
C138 4
100NF C139 10nF CC0402N 4
17 SATA_RXN0 5 5
CC0402N C140 10nF CC0402N 6
17 SATA_RXP0 6
7 7
C 8 8
C
9 9
10 10
11 11
12 12
13 13
R214 1 14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
+V5S
C141 C142 C143 C144

10uF 10uF 100NF 100NF
CC1206N CC1206N CC0402N CC0402N
POP = NA POP = NA
B B
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
HDD
C Name A
5 4 3 2 1
5 4 3 2 1
Minicard
D D
+V3.3S
C147 C148 C149

10uF 100NF 100NF
CC1206N CC0402N CC0402N
POP = NA
+V1.5S
C150 C151 C152

10uF 100NF 100NF +V3.3S
CN5 CC1206N CC0402N CC0402N
1 2 POP = NA
17,22,23 PCIE_WAKE# WAKE# +3.3V_1
3 RSVD1 GND7 4
5 RSVD2 +1.5V_1 6
6 CLK_MINICARD1_OE# 7 CLKREQ# UIM_PWR1 8
9 GND1 UIM_DATA 10
6 CLK_PCIE_MINICARD1# 11 REFCLK- UIM_CLK 12
13 14 R216 +V3.3A +V3.3S
6 CLK_PCIE_MINICARD1 REFCLK+ UIM_RESET 10k
15 GND2 UIM_Vpp 16
RC0402N
TP15 KEY
17 18 R406 R348
TP19 RSVD3 GND8
19 RSVD4 W_DISABLE# 20 0 0 WIRELESS_ON 25
21 GND3 PERST# 22 BUF_PLT_RST# 17,22,23,25 RC0402N RC0402N
16 PCIE_RXN1_WLAN 23 PER_N0 +3.3V_AUX 24
25 26 POP = NA C154
16 PCIE_RXP1_WLAN PER_P0 GND9 TP22
27 28 100NF
GND4 +1.5V_2 CC0402N
29 GND5 SMB_CLK 30 SMB_CLK_S2 6,11,17,22
16 PCIE_TXN1_WLAN 31 PET_N0 SMB_DATA 32 SMB_DATA_S2 6,11,17,22
16 PCIE_TXP1_WLAN 33 PET_P0 GND10 34 TP23
35 36 WIFI_USB_PN
GND6 USB_D- WIFI_USB_PP
C 37 RSVD5 USB_D+ 38 C
39 RSVD6 GND11 40
41 RSVD7 LED_WWAN# 42
43 RSVD8 LED_WLAN# 44
45 C_CLK LED_WPAN# 46
47 C_DAT +1.5V_3 48
49 C_RST GND12 50
51 RSVD12 +3.3V_2 52
E1
E2
E3
E1
E2
E3
0710A0BA40B
+V5A
+V5A
CN38
CN40
B
1 1 1 1 B
1 TS_USB_PN 2 E1 DMB_USB_PN 2 E1
1 2 E1 16 USB_PN6 2 E1
2 TS_USB_PP 3 E2 DMB_USB_PP 3 E2
2 USB_PN4 16 3 E2 16 USB_PP6 3 E2
3 3 USB_PP4 16 4 4 4 4
4 4
5 WIFI_USB_PP C155 C153 CN14
5 WIFI_USB_PN 100NF 100NF
6 6
7 CC0402N CC0402N
7 TS_USB_PP
8 8
TS_USB_PN
Add Touchscreen connector (use an usb port with wifi) & dmb connector 2009-10-15
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
Minicard-1
C Name A
5 4 3 2 1
10 9 8 7 6 5 4 3 2 1
J J
I I
H H
CDMA
G G
CN1
BUF_PLT_RST# 1
17,21,23,25 BUF_PLT_RST# 1
PCIE_WAKE# 2
F 17,21,23 PCIE_WAKE#
25 CDMA_ON CDMA_ON 3
2
3
F
4 4 E1 E1
6,11,17,21 SMB_CLK_S2 SMB_CLK_S2 5 E2
SMB_DATA_S2 5 E2
6,11,17,21 SMB_DATA_S2 6 6
7 7
USB_PN7 8
16 USB_PN3 8
USB_PP7 9
+V3.3S 16 USB_PP3
10
9
10
11 11
+V1.5S 12 12
13 13
14 14
E E
D D
C C
B B

5th floor,Block K,
A A
Title <Title>
Size Sheet Rev
Minicard-2 A
C Name
10 9 8 7 6 5 4 3 2 1
5 4 3 2 1
+V3.3S
R644 0 RC0805N VDD33
C427 C415 C418 C429

C341 C353 C381 C376 are for 8111DL VDD33 pins-- 1, 29, 37, 40.
C431 C432 100NF 100NF 100NF 100NF
10uF 10uF CC0402N CC0402N CC0402N CC0402N C341 C353 C381 are for 8102EL VDD33 pins-- 1, 29, 37.
For RTL8111DL, use this block
CC1206N CC1206N POP = NA
POP = NA VDD33 R623 0 RC0603N CTRL12/VDD
D D
POP = NA
Use 0 ohm for 8102EL application

R643 0 RC0805N * C387 and C389 are for U38 EVDD12 pin 19.
L1 R564 0
CTRL12A 1 2 RC0603N EVDD12
POP = NA
4.7uH LC5757N
POP = NA C414 C413
C91 C137 C86
10uF 10uF 100NF 1uF 1uF
CC1206N CC1206N CC0402N
POP = NA POP = NA For RTL8102EL, use this block.

Note 1: The Trace length DVDD12 R503 0 RC0603N CTRL12/VDD
between L1 and 8111DL's Pin Remove R468&R469 in 8102EL application
1 must be within 0.5 cm. C29 C29 C32 are only for RTL8111DL.
and C54 to L8 must be within
R546
0.5cm. Refer to Layout guide 0
for more detail. RC0603N * C372 C379 C388 C392 C393 are for 8111DL DVDD12 pins-- 10, 13, 30, 36, 39.
POP = NA
* C372 C379 C388 C392 are for 8102EL DVDD12 pins-- 10, 13, 30, 36.
DVDD12
C C
C419 C424 C430 C423 C417
100NF 100NF 100NF 100NF 100NF
CC0402N CC0402N CC0402N CC0402N CC0402N
POP = NA
XTAL2 C416 20PF CC0402N
2
X7 X3
25MHz X8A01431AFK1H
OSC890P1154X456_2L
1
XTAL1 C426 20PF CC0402N
C344 C346 are only for 8111DL Dualay 2009－10－15

Remove R423 and R426 for RTL8102EL application.
C434 C425 C421
R423 and R426 are used in the RTL8111DL application.
10uF 10uF
100NF
CC0402N
Remove R426 if switching regulator is enabled. Remove R423 if
external power 1.2V is used.
VDD33
POP = NAPOP = NA
R650 0
RC0603N
POP = NA
R433 value should be 2.49K R649
(1%) for all application. 2.49K
R648 0
B B
RC0603N POP = NA
R461 is only required by RTL8102EL

CTRL15/VDD33
DVDD12
CTRL12/VDD
CTRL12/VDD
CTRL12A
VDD33
VDD33
XTAL2
XTAL1
RSET
GND
R652 1K
RC0603N
U26 U25
48
47
46
45
44
43
42
41
40
39
38
37
48_RTL8102EL/11DL EECS 1 8 VDD33

EESK CS VCC C428
2 7
VCTRL12A/SROUT12
GND4
REFCLK_N03EL/11DL NC/ENSWREG
CKTAL2
CKTAL1
NC/AVDD332
NC/LV_PLL
LED0
VDD33
RSET
VCTR12DVDDSR
REFCLK_PRTL8102EL/ NC/VDDSR
EEDI SK DC 100NF
3 DI ORG 6
EEDO 4 5 CC0402N
VDD33 DVDD12 DO GND
1 AVDD331 DVDD123 36
VDD33
MDI0+ 2 35 EESK
15 MDI0+ MDI0- MDIP0 LED1/EESK EEDI
15 MDI0- 3 MDIN0 LED2/EEDI 34 POP = NA
DVDD12 4 33 EEDO
MDI1+ NC/FB12 LED3/EEDO EECS R450 3.6K +V3.3A
15 MDI1+ 5 MDIP1 EECS 32
MDI1- 6 31 GND R628
15 MDI1- GND MDIN1 GND3 DVDD12 1k
7 GND1 DVDD122 30
MDI2+ 8 29 VDD33 RC0402N RC0603N
POP = NA
15 MDI2+ MDI2- NC/MDIP2 VDD331 ISOLATEB
9 28
VDDTX/EVDD12
15 MDI2- DVDD12 NC/MDIN2 ISOLATEB PERSTB R363 0 RC0402N

10 DVDD12/AVDD12 PERSTB 27 BUF_PLT_RST# 17,21,22,25
MDI3+ 11 26 LANWAKEB PCIE_WAKE#
C43317,21,22
15 MDI3+ MDI3- NC/MDIP3 LANWAKEB 100NF R622 15K
12 25
DVDD121
15 MDI3- NC/MDIN3 CLKREQB

NC/GPO
CC0402N
NC/NC
HSON
EGND
HSOP
GND2
HSIN
HSIP
13
14
15
16
17
18
19
20
21
22
23
24
Pin 23 is GPO pin for

EVDD12
REFCLK+
DVDD12
REFCLK-
8111DL. It is used for

HSON
HSOP
GND
HSIP
GND
HSIN
A A
DSM function.
C422 100NF CC0402N
PCIE_RXN3_LAN 16
16 PCIE_TXP3_LAN
HSIP C420 100NF CC0402N
PCIE_RXP3_LAN 16
HSIN CLK_PCIE_LAN# 6 5th floor,Block K,
16 PCIE_TXN3_LAN Xiamen Exprot Processing Zone,
CLK_PCIE_LAN 6 Haicang District,Xiamen,China,361026
TP26 Title <Title>

TP27 Size Sheet Rev
LAN
C Name A
ENGINEER: Arvin Date: Wednesday, November 04, 2009 Sheet 23 of 42
5 4 3 2 1
5 4 3 2 1
<<Attention>>
Surges of PVDD >7V duration 0.1ms when
class D amplifier is working may damage
HP_OUT_L R251 75 RC0402N MICR-VREFO
the amplifier, 10uF tantalum capacitors +V5S +V5_PVDD
D
are required at PVDD1 and PVDD2 to HP_OUT_R R252 75 RC0402N MIC2-VREFO FB5 120
D
FB0805N
suppress the surge. MICL-VREFO
C197 10uF
AC_VREF CC1206N
AGND Place next to pin 27
AGND C198 100NF CC0402N
+V5_AVDD +V5S +V5_AVDD
C200 +V5_AVDD FB6 120
C199 2.2UF 10V FB0805N
2.2UF 10V
C201 C202 CC0603N CC0603N
100NF 10uF Place next to pin 38
CC0402N CC1206N C203 C204 Place next to pin 25
AGND U11 100NF 10uF
36
35
34
33
32
31
30
29
28
27
26
25
ALC269 CC0402N CC1206N
CBP
CPVEE
HPOUT-L
MIC2-VREFO
MIC1-VREFO-L
AVSS1
AVDD1
CBN
HPOUT-R
CPVREF
MIC1-VREFO-R
VREF
AGND
MIC2-VREFO R253 4.7K
+V5_PVDD 37 24 AGND
AVSS2 LINE1-R CN36
38 AVDD2 LINE1-L 23
39 22 C205 4.7uF R254 1K RC0603N AUD_MIC_IN_R R255 4.7K MICR-VREFO
C206 C208 C209 SPK_L+ PVDD1 MIC1-R C207 4.7uF R256 1K RC0603N AUD_MIC_IN_L R257 4.7K MICL-VREFO
Place next to pin 39,and 40 SPK-OUT-L+ MIC1-L 21
Tantalum capacitor is 100NF 4.7uF 4.7uF SPK_L- 41 20 1 E1
CC0402N CC0805N CC0805N SPK-OUT-L- MONO-OUT R258 20K RC0402N R356 Placement near Audio Codec 1 E1
required for C303 42 PVSS1 JDREF 19 AGND B1
43 PVSS2 Sense B 18
+V5_PVDD SPK_R- 44 17 C210 2.2uF AUD_MIC2_IN_R 1 2 E2
SPK_R+ SPK-OUT-R- MIC2-R C211 2.2uF AUD_MIC2_IN_L D 2 E2
45 SPK-OUT-R+ MIC2-L 16 2 S
46 PVDD2 LINE2-R 15
47
SDATA-OUT
EAPD/SPDIFO2 LINE2-L 14
C212 C213 C214
SDATA-IN
48 13
GP0/DMD
GP1/DMC
Place next to pin 46,and
DVDD-IO
SPDIFO Sense-A
PCBEEP
RESET#
100NF 4.7uF 4.7uF R259 39.2K RC0603N EARPHONE_SEL AGND
Tantalum capacitor is R260 20K
DVDD
SYNC
DVSS
CC0402N CC0805N CC0805N MUTE_MIC
BCLK
PD#
required for C237 AGND
ANALOG Add mic connector 2009-10-15
E1
Placement near Audio Codec
E1
1
2
3
4
5
6
7
8
9
10
11
12
+V3.3S
R261 0 RC0603N
C +V3.3S C
DIGITAL R262 0 RC0603N
C215 C216 (Include Thermal pad) R263 0 RC0603N

10uF 100NF
C217 CC0805N CC0402N
R264 100NF AGND
10K CC0402N Digital_ground
U12
5
+V3.3S
HDA_RST# 17
25 EC_MUTE# 1 HDA_SYNC 17 Tied at one point only under the
4 PD#
2
ALC269 or near the ALC269
17 HDA_RST# R265 22 RC0402N C218 C219
HDA_SDATAIN0 17
R267 22 RC0402N 10uF 100NF
HDA_BITCLK 17
3
R266 HDA_SDATAOUT 17 CC0805N CC0402N

10K
POP = NA C220
22pF
<<Attention>>
For power_on/off de-pop circuit and system booting warning
signal: Please System BIOS Engineer Note :
1. If you want the system make warning signal after power on
, please let EC_MUTE# High first.
2.When you want to exit your Bios Programming Code, please let
the EC_MUTE# Low.(The programming is different from before . )
PD#=0V : Power down Class D SPK amplifer

PD#=3.3V : Power up Class D SPK amplifer
B B
J8
010030FR006G100ZL
SPK_L+ 6
AGND FB17 0 RC0603N 1
HP_OUT_L R711 75 RC0402N FB11 0 2
RC0603N
HP_OUT_R R712 75 RC0402N FB16 0 3
RC0603N EARPHONE_SEL 4
L_OUT+ 1 C540 5
L_OUT- 1 C538 100pF
2 2 E1 E1
SPK_L- R_OUT- 3 E2 100pF CC0402N
R_OUT+ 3 E2 CC0402N
4 4
SPK_R-
CN20
AGND
AGND AGND
SPK_R+
<<Attention>>
If mount the LC filter((L9~L12;C295/C299;C300/C293/C294/C296),Please let them
together and close to codec. If the PCB trace and Speaker wire length is
J9
less than 20cm, don't need the LC filter(L9~L12;C295/C299) to eliminate the 010030FR006G100ZL
EMI,If L9,L0,L11,L12 are replaced by 0 ohm/1.6A resistetor(please don't use MUTE_MIC 5
general bead, because it may influence the THD+N quality) ,and C295,C299 4
AUD_MIC_IN_R FB18 0 3
should be NC.And,please make the trace length/ Speaker wire length of RC0603N
A AUD_MIC_IN_L FB19 0 2 A
SPKL+/L-/R+/R- be the same as possible as you can. RC0603N 1
C300/C293/C294/C296 are reserved for EMI fine-tune ; For EMI issue, please 6
C542 C543
also refer our ALC269 Layout guide document 100pF 100pF FB20
CC0402N CC0402N 0
RC0603N Lengda Technology Ltd.
5th floor,Block K,
AGND AGND conect to claw Xiamen Exprot Processing Zone,
AGND
Title <Title>
Size Sheet Rev
ALC888 Codec
C Name A
5 4 3 2 1
5 4 3 2 1
Layout Note:
L80LLAT R273 0 RC0402N POP = NA
Recommended net "+V3.3A" and L80HLAT R274 0 RC0402N POP = NA
"+V3.3A_RTC" minimum trace R275 0 RC0402N POP = NA
width 12mils.
R336 0 RC0402N
CAPLOCK_LED 15
R281 0 RC0402N
26 ADP_IN#
R279 0 RC0402N
+V3.3A +V3.3S 15 NUMLOCK_LED R278 0 RC0402N
21 WIRELESS_ON R337 0 RC0402N +V3.3A
22 CDMA_ON R340 0 RC0402N
FB7
D +V3.3A D
180 FB0603N +V3.3AVCC +V3.3A RC0402N 0 R282 I2C_CLK R284 10k RC0402N
WIFI_LED 34
RC0402N 0 R285
FB14 PWR_LED 34
RC0402N 0 R286 I2C_DATA R288 10k RC0402N
+V3.3A_RTC 180
+V3.3AVCC
R289 0 RC0402N VBAT C268 RC0402N 0 R290
10uF C227 FB0603N +V3.3A RC0402N 0 R291
PM_RSMRST# 17
R292 0 RC0402N CC0805N 100NF RC0402N 0 R293
VBAT
POP = NA CC0402N RC0402N 0 R294 PM_PWRBTN# 17
CHG_LED_ORG 34 +V3.3A
U13
R295 RC0402N 0 R296
IT8502E/F/G(JX) PM_CLKRUN# 17
0 +V5S
114
121
127
107
RC0402N R297 10k RC0402N
11
26
50
92
74
84
83
82
56
57
33
19
20
99
98
97
96
95
94
93
3
POP = NA R299 10k RC0402N
17 LPC_AD[3..0]
LPC_AD0 10 110 TBCLK R298 10k RC0402N
L80LLAT/WUI7/GPE7
VSTBY6
VSTBY5
VSTBY4
VSTBY3
VSTBY2
VSTBY1
EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1
KSO16/GPC3
KSO17/GPC5
GINT/GPD5
GPG1/ID7
CRX1/WUI17/GPH1/ID1
L80HLAT/GPE0
GPH6/ID6
GPH5/ID5
GPH4/ID4
WUI19/GPH3/ID3
CTX1/WUI18/GPH2/ID2
CLKRUN#/WUI16/GPH0/ID0
VCC
VBAT
AVCC
LAD0 SMCLK0/GPB3 SMB_CLK_BT 27
LPC_AD1 9 111
LAD1 SMDAT0/GPB4 SMB_DATA_BT 27
LPC_AD2 8 I2C_CLK TBDATA R300 10k RC0402N
SM BUS
LAD2 SMCLK1/GPC1 115 I2C_CLK 10
LPC_AD3 7 116 I2C_DATA
LAD3 SMDAT1/GPC2 I2C_DATA 10
R301 100 RC0402N LPCRST# 22 117 RC0402N 0 R302 LID
17,21..23 BUF_PLT_RST# LPCRST#/WUI4/GPD2 SMCLK2/WUI22/GPF6 CHG# 27
R303 0 RC0402N 13 118 RC0402N 100 R304
+V3.3A 6 CLK_KBCPCI LPCCLK SMDAT2/WUI23/GPF7 LID 15
R305 0 RC0402N LFRAME# 6 R306
17 LPC_FRAME# LFRAME#
85 TBCLK 10k
PS2CLK0/GPF0 TBCLK 34
R307 0 RC0402N POP = NA LPCPD# 17 86 TBDATA RC0402N
17 PM_SUS_STAT LPCPD#/WUI6/GPE6 PS2DAT0/GPF1 TBDATA 34
87 RC0402N 0 R308
PS2CLK1/GPF2 IMVP_VR_ON 31
R309 R310 0 RC0402N POP = NA RC0402N 0 R311
PS/2
17 H_A20GATE 126 GA20/GPB5 PS2DAT1/GPF3 88 ALL_SYS_VRPWRGD 31,32
100k R312 0 RC0402N 5 89 RC0402N 0 R313 VR_PWRGOOD 31
17 INT_SERIRQ SERIRQ PS2CLK2/WUI20/GPF4
RC0402N R314 0 RC0402N ECSMI# 15 90 RC0402N 0 R315
17 SMC_EXTSMI# ECSMI#/GPD4 PS2DAT2/WUI21/GPF5 DELAY_VR_PWRGOOD 8,17,32
R316 0 RC0402N ECSCI# 23 LPC GPIO
17 SMC_RUNTIME_SCI# ECSCI#/GPD3
R317 0 RC0402N WRST# 14
R318 0 RC0402N WRST#
17 H_RCIN# 4 KBRST#/GPB6
C228 PWUREQ#_R 16
1uF PWUREQ#/GPC7
CC0402N 24 RC0402N 0 R320
PWM0/GPA0 FAN_ON 10
25 RC0402N 0 R321
PWM1/GPA1 BL_ADJ 14
28 RC0402N 0 R322
PWM2/GPA2 CHG1 27 R331
R323 100 RC0402N 119 29 RC0402N 0 R409 R327
17 PM_SYSRST# GPC0 PWM3/GPA3 LINUX_ONOFF# 34 10k
R325 100 RC0402N 123 30 RC0402N 0 R326 10k
GPB2 PWM4/GPA4 BT_ON 35 RC0402N
POP = NA 31 RC0402N 0 R329 RC0402N
+V3.3S PWM5/GPA5 SMC_SHUTDOWN# 26 POP = NA
32 RC0402N 0 R330 POP = NA
PWM6/GPA6 POP = NARC0402N 0 R332 CAM_ON 35
C PWM PWM7/GPA7 34 EC_MUTE# 24
C
47 RC0402N 0 R334
TACH0/GPD6 KBC_FAN_SPEED 10
R335 10k RC0402N LPCRST# 48 RC0402N 0 R324
TACH1/GPD7 BLCTL 14
POP = NA R328
R341 10k RC0402N PWUREQ#_R
POP = NA
IT8502E/F/G(JX) TMR0/WUI2/GPC4
TMR1/WUI3/GPC6
120
124
RC0402N 0
0
R338
R339 CHG_LED_WHT 34
3G_LED 34
10k
RC0402N
POP = NA
POP = NA R272 10k RC0402N SMC_WAKE_SCI#
R549 10k RC0402N SMC_EXTSMI# 125 RC0402N 0 R342 +V3.3A

PWRSW/GPE4 RC0402N 0 R343 SMC_ONOFF# 26
RI1#/WUI0/GPD0 18 PM_SLP_S4# 17,29,32
R287 10k RC0402N
SMC_RUNTIME_SCI# WAKE UP 21 RC0402N 0 R344
RI2#/WUI1/GPD1 PM_SLP_S3# 17,29,32
35 RC0402N 0 R345 POP = NA
WUI5/GPE5 SMC_WAKE_SCI# 17
112 R346 10k RC0402N BT_ON
RING#/PWRFAIL#/LPCRST#/GPB7 R361 10k RC0402N +V3.3A
+V3.3A POP = NA
109 8051TX
R280 10k RC0402N SMC_ONOFF# TXD/GPB1
UART 108 8051RX
RXD/GPB0
R283 10k RC0402N ADP_IN#

66 R349 0 RC0402N +V3.3A
ADC0/GPI0 Vbattery_ec 27
106 67 R351 0 RC0402N POP = NA
GPG0 ADC1/GPI1 AD_EC 27
R407 10k RC0402N LINUX_ONOFF# FSCK 105 68 R354 100 RC0402N
FSCK ADC2/GPI2 BAT-DEK# 27
104 69 R353 0 RC0402N
GPG6 ADC3/GPI3 DOSRECOVERY_SW# 34
FMISO 103 FLASH 70 R356 10k RC0402N R347
R515 10k RC0402N DOSRECOVERY_SW# FMOSI FMISO ADC4/GPI4 R355 10k RC0402N 100k
102 FMOSI ADC5/GPI5 71
FSCE# 101 72 R358 10k RC0402N RC0402N
FSCE# ADC6/GPI6 R357 10k RC0402N BAT-DEK#
+V3.3A
100 GPG2 A/D D/A ADC7/GPI7 73
Add LINUX POWER SWITCH 2009-10-15 X0 36 KSO0/PD0
X1 37
C233 X2 KSO1/PD1
38 KSO2/PD2
100NF X3 39 76 R362 0 RC0402N
U14 R350 KSO3/PD3 DAC0/GPJ0 P_CHG 27
CC0402N X4 40 KBMX 77
4.7K X5 KSO4/PD4 DAC1/GPJ1
R352 AT26DF161 41 KSO5/PD5 DAC2/GPJ2 78
X6 42 79
B 4.7K FSCE# 1 8 KSO6/PD6 DAC3/GPJ3 B
CS VCC X7 43 80
FMISO 2 7 KSO7/PD7 DAC4/GPJ4
SO NC X8 44 81
3 6 FSCK KSO8/ACK# DAC5/GPJ5
WP SCK X9 45
4 5 FMOSI KSO9/BUSY
GND SI X10 46
X11 KSO10/PE kbc_XTAL2
51 KSO11/ERR# CK32KE 2
KSI3/SLIN#
KSI1/AFD#
KSI0/STB#
KSI2/INIT#
X12 52 CLOCK 128 kbc_XTAL1

X13 KSO12/SLCT CK32K
Layout Note:
VCORE
53 KSO13
AVSS
X14
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
54
KSI4
KSI5
KSI6
KSI7
X15 55
KSO14 10pF 32.768kHz clock lines:
X[15..0] KSO15 C229 CC0402N a. If possible, please avoid using any
Please do not place any pull-up 34 X[15..0]
through-hole.
58
59
60
61
62
63
64
65
27
49
91
113
122
75
12
resistor on GPG0, GPG2, and GPG6 ITE Modify b. Please make the trace length short, and
X4
(Reserved hardware strapping).
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
1
the trace width wide enough.
C230 3 2 R360 c. The spacing to the closest neighbor
Y[7..0] 100NF 10M
34 Y[7..0] should be wide enough.
CC0402N POP = NA
4
LPC debug Port C231
10pF
CC0402N
+V3.3S
E1
C232 100NF
CC0402N 1
KBC Debug Port
E1
+V3.3A 1
2 2
3 3
BUF_PLT_RST#
E1
4 4
17 LPC_AD3 5 5
1 17 LPC_AD2 6 6
8051TX 2 J2 7
17 LPC_AD1 7
8051RX 3 5pin 8
17 LPC_AD0 8
4 SMD-CN-100P-5L 9 CN10
17 LPC_FRAME# 9
A 5 10 87151-2007 A
6 CLK_FWHPCI 10
11 smd-fpc-50p-20n-JS
11
17 INT_SERIRQ 12
E2
L80HLAT 12
13 13
14 14
15
16
15
16
Serial Debug Port 17
18
17 5th floor,Block K,
18 Xiamen Exprot Processing Zone,
19 19
L80LLAT 20 Haicang District,Xiamen,China,361026
E2
20
E2
Title <Title>
Size Sheet Rev
KBC
C Name A
5 4 3 2 1
10 9 8 7 6 5 4 3 2 1
J J
I I
Power Sequence
Power Button Detect & Latch 05

+V_DC
+V_DC_IN
Q16 AO4419
H C237 C238 C239
1
2
8
7
H
0.1uF 10uF 10uF C240 3 6 C241 C242
CC0603N CC1210N CC1210N 0.1uFR364 390K 5 10uF 0.1uF R365 100
POP = NA CC0603N SOIC127P600-8N CC1210N CC0603N
4
POP = NA
PWRONLATCHG
R366
100k
3
RC0402N
Q17
S D
2N7002LT1
PS_LATCH# 1 SOT95P240-3N
G
G G
2
R368
1M
RC0402N
F F
D14
27 DC_GATE N P sod2514n R369 0 RC0402N
3
D15 Q18
S D
2N7002LT1
15,34 POWSW# N P sod2514n 25 SMC_SHUTDOWN# 1 SOT95P240-3N
P
2
D24 D16
sod2514n R370
E N P sod2514n SMC_ONOFF# 25
100k E
N
D19
34 LINUX_POWSW# N P sod2514n LINUX_ONOFF# 25
Add LINUX POWER SWITCH 2009-10-15
D D13 D
27 ACOK# N P sod2514n ADP_IN# 25
C C
B B

5th floor,Block K,
A A
Title <Title>
Size Sheet Rev
ACIN A
C Name
10 9 8 7 6 5 4 3 2 1
5 4 3 2 1
+V_DC_IN +V_DC_IN
C243 C244
4.7uF 0.1uF
CC1210N CC0603N
D +VBAT D
+V_ADP_IN GND
C245 R372
R371 33NF 100k
R373 100k RC0402N
Power Sequence Layout NOTE: CC0603N
3
2
1
100k RC0402N
RC0402N
The AGND_CHG connect to POP = NA 4 Q19
AO4419
Vbattery_ec 25
1AC GND through E1 pin; C246

0.1uF
SOIC127P600-8N R375
10k
5
6
7
8
RC0402N
by via only! CC0603N
POP = NA
R374
51K
RC0402N
GND
+V_ADP_IN PVCC TI Tony Modify!
N
AC current limit: 3.64A Q20 GND
S D
Q21 Q22 2N7002LT1 D17
8 1 1 8 R376 0.011_1%RC2512N ACOK# R377 1K 1 G sod5227n
7 2 2 7
2
6 3 3 6
P
C247 5 AO4419 5
0.1uF SOIC127P600-8N AO4419 C248 C249
4
CC0603N SOIC127P600-8N 10uF 10uF

CC1210N CC1210N
RC0402N 150k R378 R379 150k RC0402N C250 0.1uF CC0603N
GND CC0402N 0.01uF C251 C252 0.01uF CC0402N C254

GND GND C253 0.1uF
+VBAT +VBAT CC0603N
1
2
0.1uF
R380 R381 TI Tony Modify! CC0603N D 5 Charge current:2.02A
100k 100k PVCC 6 L2
RC0402N RC0402N 8 7 1 2 R382 0.011_1%RC2512N
N
F2
22uH
C
REGN Q23 C255 C256 1 2 5 5
C
26 DC_GATE f6125n 4 E2
D18 R384 3 APM4906 C258 10uF 0.1uF 25 SMB_CLK_BT 4 E2
TI Tony Modify! R383 sod2514n 0 S SOIC127P600-8N 10uF CC1210N 25 SMB_DATA_BT 3 3
CC0603N 2 E1
R385 C257 2.2 RC0603N CC1210N 25 BAT-DEK#
REGN
2 E1
4
100k RC0603N REGN 1 1
0.01uF
RC0402N POP = NA
3
C259 VREF_CHG CN12

Q24 CC0402N 1uF AGND_CHG GND GND
E1
24
23
22
21
20
19
S D
U15
2N7002LT1 C260 CC0603N GND ?????长pin电源有无问题
1 0.1uF R386 C261 AGND_CHG
E1
HIDRV
LODRV
BTST
PH
REGN
PGND
G CC0603N 10k C262 0.1uF CC0603N
2
GND RC0402N 0.1uF

3
CC0603N
Q25 GND 1 18 DPMDET#
Battery Connector
S D
PVCC 2N7002LT1 R387 0 RC0402N PVCC DPMDET# CELLS

25 CHG# 2 CHGEN# CELLS 17
1k 1 R389 3 16
ACOK# R388 G ACN BQ24705 SRP
51K 4 15
2
RC0402N ACDET ACP SRN

R516 5 ACDET BAT 14
C263 6 13 SRSET C264 根据飞毛腿要求，更改次序。
470k ACSET SRSET R390 86.6k ±1%
VREF_CHG
ACGOOD#
RC0402N 0.1uF RC0603N 0.1uF
ISYNSET
IADAPT
CC0603N CC0603N
AGND
VREF
VADJ
后续增加 09-10-28 R392 R393
VREF_CHG
R391 13k_1% 536 ±1%
AGND_CHG
124K_1% CC0603N R404 RC0603N
AGND_CHG
3
4.22k_1% Q37
7
8
9
10
11
12
RC0603N Please near to the IC CC0603N 2N7002LT1
S D
R394 AGND_CHG Close to IC
AGND_CHG
30K ±1% AGND_CHG C265 100pF CC0402N 1K R395
RC0603N G 1 P_CHG 25
ACOK#
2
ACDET ACSET VREF_CHG VADJ
Ichg=((VCH/VREF)*(0.1/Rsr)=1.18A
AGND_CHG Set charge current about 1.18A
Set Vacdet must be 2.4V C266
R396 1uF R398 Set prechg current about 111.349MA
3
Place near to the IC Q28
和M11A保持一致，采用19V~20V适配器 10k ±1% CC0603N 75K ±1%
S D
R397 RC0603N RC0402N
2N7002LT1
20K ±1% 1K R408
B RC0603N G 1 CHG1 25 B
AGND_CHG
2
AGND_CHG
AGND_CHG
AGND_CHG Iac=(VAC/VREF)*(0.1/Rac)=2.5A
AGND_CHG
t<0度或t>45度，Ichg=0
0<t<15度，Ichg= 0.325A
Isyn set 303MA？ 15度<t<45度，Ichg=1.18A
VREF_CHG REGN VREF_CHG

VREF_CHG
R402
10k R399
R400 R401
RC0402N 0
100k 0 RC0402N
RC0402N RC0402N
+V_ADP_IN POP = NA CELLS
POP = NA
VADJ ACOK# ACOK# 26 Set the 2 Cells
R403
0
R405 C267
R651 RC0402N
1M 68K 0.1uF POP = NA
RC0402N CC0603N
RC0402N
POP = NA
POP = NA
GND
AD_EC 25
GND GND
R591
150k Set the default 4.2V per cell
RC0402N
POP = NA
GND
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
Power_charger&Battery CONN
C Name A
5 4 3 2 1
5 4 3 2 1
D D
+V_DC
R410
0 +V_DC
RC0402N
POP = NA
C269 C270 C271 VREF
10uF 10uF 0.1uF
CC1210N CC1210N CC0603N CC0603N TONSEL R411 0 RC0402N VREG3
0.22uF POP = NA R412 0 RC0402N VREG5
C272 POP = NA R413 0 RC0402N VREF C273 C274
10uF 10uF
CC1210N CC1210N
POP = NA
R414 R415
±1% 20K 20K ±1%
RC0603N RC0603N
R416 30k ±1% VFB1 VFB2 R417 13k_1%

RC0603N CC0603N
R418 150k ±1% R419 160K ±1%
Arvin modify 090915
RC0402N RC0402N Arvin modify 090915
1
2
3
4
5
6
Vtrip=Rtrip*Itrip/9-24
ENTRIP1
VFB1
TONSEL
VFB2
ENTRIP2
VREF
100k
+V5A +V3.3A
VREG5 R421 E1 E1
1
2
+5VA/6.6A RC0402N C275 10uF CC0805N +3.3VA/7A
2
1
24 7 D 5
D RC0603N 0 R420 V01 VO2 VREG3
OCP=8A 5 23 8 6 L4 OCP=8.7A
100NF C276 PGOOD VREG3 C277 100NF CC0402N
L3 6 22 9 8 7 1 2
DRVH1 R422 2.2 CC0402N VBST1 TPS51125RGE VBST2 R423 2.2 DRVH2
C 1 2 7 8 21 10 3.3uH C
RC0603N DRVH1 DRVH2 RC0603N Q30
3.3uH 20 11
Q39 LL1 LL2 R424 0 DRVL2 3 APM4906
19 DRVL1 DRVL2 12
SKIPSEL
1
APM4906 3 DRVL1 R425 0 RC0603N RC0603N S SOIC127P600-8N CP4 CP5
VREG5
1
CP2 CP3 SOIC127P600-8N S C280 C281
VCLK
+ +
GND
4
EN0
VIN
C279 C278 + + 100NF
4
100NF 150uF 150uF 2.2uF CC0402N
2
CC0402N 2.2uF 150uF 150uF Arvin modify 2009-10-15 CCP7343N CCP7343N CC0603N
2
18
17
16
15
14
13
CC0603N CCP7343N CCP7343N U16 POP = NA
R426 620K POP = NA

VREG5
C282
10uF POP = NA R428 0 RC0402N POP = NA VREG5
CC0805N +V_DC RC0402N R429 0 RC0402N VREF
0
R427
C402 C316 C283

100NF 100NF 0.1uF
CC0402N CC0402N CC0603N
3
3
+V15A
VREG5 1 2 1 2
SOT95P280-3N SOT95P280-3N
C403 D4 C404 D5 C405
100NF R145 0 RC0603N
100NF 1uF
CC0402N CC0402N CC0805N
B Arvin modify drive +V3.3S & +V5S 2009-10-15 B
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
Power_+V5A&+V3.3A
C Name A
5 4 3 2 1
5 4 3 2 1
+V_DC
D D
C284 C285 C286

0.1uF 10uF 10uF
CC0603N CC1210N CC1210N
POP = NA
+V1.8
C287
100NF C288
1
2
CC0402N 0.1uF +V1.8 +1.8V/8A
CC0603N D 5
+V0.9s 6 L5 OCP=9.6A
R430 0 8 7 1 2
R431 1.5uH
0 Q31
1
RC0603N R432 0 3 APM4906 CP6 CP7 C289 C290
N
S D20 + 330uF + 330uF 100NF
SOIC127P600-8N 10MQ040N CCP7343N CCP7343N 10uF CC0402N
4
C291 C292 sod5225n POP = NA CC1206N
E1
24
23
22
21
20
19
U17
2
10uF 10uF POP = NA
CC0805N CC0805N
E1
LL
DRVL
VTT
VLDOIN
VBST
DRVH
P
MODE DISCHARGE MODE
V5IN No discharge 1 18
VTTGND PGND +V5A
VDDQ Tracking discharge 2
3
VTTSNS CS_GND 17
16 R433 16k RC00402N
GND TPS51116RGE CS
S4/GND Non-tracking discharge 4
5
MODE V5IN 15
14 R435 2.2 RC0603N
C +V1.8 R434 VTTREF V5FILT C
6 COMP PGOOD 13
VDDQSNS
0
VDDQSET
R436 0 RC0402N POP = NA RC0402N C293 C294
1uF 1uF
NC1
NC2
R438 CC0603N CC0603N
S3
S5
100k
7,11 M_VREF R437 0 RC0603N RC0402N
7
8
9
10
11
12
+V1.8
C295 +V5A
0.033uF
CC0603N +V1.8 PWRGD R439 0 RC0603N
DDRVR_PWRGD 32
R440 C296
15K 470pF R441
RC0603N CC0603N 0
POP = NA POP = NA RC0402N
17,25,32 PM_SLP_S3# R443 0 RC0603N Vtrip(mV)=Rtrip(kohm) *10uA

R442
10k
17,25,32 PM_SLP_S4# R444 0 RC0603N Iocp=Vtrip/Rds(on)+Iripple/2
RC0603N
POP = NA
B B
S3 & S5 Control
STATE S3 S5 VDDQ VTTREF VTT
S0 HI HI ON ON ON
S3 LO HI ON ON OFF(HI-Z)
S4/S5 LO LO OFF(Discharge) OFF(Discharge) OFF(Discharge)
VDDQSET VDDQ (V) VTTREF & VTT NOTE

GND 2.5 VDDQSNS/2 DDR
V5IN 1.8 VDDQSNS/2 DDR2
FB Resistors Adjustable VDDQSNS/2 1.5V< VDDQ<3V
(100*VDDQ-75)kohm
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
Power_+v1.8
C Name A
5 4 3 2 1
5 4 3 2 1
+V5S
FB15 120
FB0805N
D C299 C300 C301 D

V1.5_POWGD
100NF 10uF 10uF
CC0402N +V5S CC1210N CC1210N
R642
2.2
+V5S RC0603N C298
1uF +V1.05S
R447 CC0402N
220K +V1.05S/5,1A
14
1
RC0402N U23
1
2
R641 R161 OCP=6.5A
EN_PSV
VBST
100k 300 D 5 L6
RC0402N RC0603N 2 13 1.05_UGATE R359 0 6 1 2
±1% TON DRVH
3 12 8 7 1.5uH
VOUT LL R12 13K
4 V5FILTTPS51117RGY
TRIP 11
5 10 Q44
R15 0 RC0402N VFB V5DRV 1.05_LGATE R446 0 APM4906
1
32 V1.05S_PWRGD 6 PGOOD DRVL 9 3 CP8
S SOIC127P600-8N C398 C297
+
PGND
10uF 0.1uF
GND
4
C388 CC1206N CC0603N
E1
330uF
1uF
2
CCP7343N
CC0402N Rtrip=Vtrip/10
E1
Iocp=Vtrip/Rdson+Iripple/2
R448
12k
RC0603N
±1%
Vout=0.75*(1+R1/R2)
R455
C
30k C
RC0603N
±1%
V1.05S_PWRGD
+V0.89S_GFX
+V1.05S
+V3.3S U27 +V0.89S/2.0A
+V5S APL5916 Vout=0.8*(1+R1/R2)
SOP127P600-9N
R451 R452
10k 8 1 2.2K ±1%
RC0402N EN GND RC0402N
R456 0 RC0603N 7 2
32 V0.89S_POWGD POK FB
6 VCNTL VOUT1 3
VIN2
5 VIN1 VOUT2 4
1
C303 C390 CP9
C302
100NF 10uF + 0.1uF
E1
CC0402N R453 CC1206N

CC0603N
20K ±1% 330uF
2
C304 C392 RC0402N CCP7343N
C393
100NF 10uF
10uF
CC0402N CC1206N
CC1206N
B B
+V1.5S +V1.5S/1.6A
+V5S +V1.8
+V3.3S U19
APL5930 Vout=0.8*(1+R1/R2)
SOP127P600-9N
R457 R458
10k R459 10k RC0402N 8 1 27K ±1%
RC0402N EN GND RC0402N
V1.5_POWGD R460 0 RC0603N 7 2
POK FB
6 VCNTL VOUT1 3
VIN2
5 VIN1 VOUT2 4
C305 C306 C307
100NF 10uF 10uF
E1
CC0402N R461 CC1206N CC1206N

30k ±1%
C308 C309 C310 RC0603N
100NF 10uF 10uF
CC0402N CC1206N CC1206N
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
Power_+V1.5S&+V2.5S
C Name A
5 4 3 2 1
5 4 3 2 1
D D
+V_DC
C311 C312 C313 C314

10uF 10uF 1uF 0.1uF
CC1210N CC1210N CC0805N CC0603N
TI Tony Modify!
C315 5.1NF CC0402N
R462 0 RC0402N H_VID6 H_VID[6..0] 8

R463 0 RC0402N H_VID5 R464 42.2k ±1% RC0603N
R465 0 RC0402N H_VID4
R466 0 RC0402N H_VID3
R467 0 RC0402N H_VID2 R471 10K_NTC R468 43.2K
R469 0 RC0402N H_VID1
+VCC_CORE R470 0 RC0402N H_VID0 RC0402N
R472
220K ±1% L7 +VCC_CORE +VCC_CORE/4A
R473 RC0402N 0.36uH POP = NA
100 OCP=7A
1
2
L940P-1150X1000-2N
RC0402N D
8,17 H_DPRSTP# 5 1 2
+V1.05S 6 L8
C C
1
VSNS 8 7 1 2
1.5uH C394 C395 C396
GNDSNS + CP10 + CP11
Q34
GND_51610 330uF 330uF
E1
10
11
12
13
14
15
16
APM4906 22uF 22uF 22uF
9
R474 3 CCP7343N CCP7343N
S SOIC127P600-8N CC0805N CC0805N CC0805N
2
R475 68
DPRSTP#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
E1
Arvin modify 2009-10-15
100
4
RC0402N
RC0402N
R476 0 RC0402N 8 17 R478 0 RC0402N DRVH
8 H_PROCHOT# R479 1.78k R477 15k 1% VR_TT# DRVH R480 0 RC0402N
C318 1uF CC0603N
GND_51610 7 THERM VBST 18
RC0402N VSNS 6 19
9 VCCSENSE VSNS LL
Close to the IC GNDSNS 5 20 R481 0 RC0402N DRVL
9 VSSSENSE GNDSNS DRVL
R482 470 RC0603N CSP 4 21
R483 470 RC0603N CSN CSP V5IN +V5S
3 CSN PGOOD 22
2 GND DPRSLPVR 23
CSP C319 1uF CC0603N VREF_VCORE
PWRMON
1 VREF CLKEN# 24
TRIPSEL
OSRSEL
TONSEL
CSN C320
DROOP
VR_ON
V5FILT
ISLEW
R484 0 RC0402N VR_PWRGOOD 25 10uF

C323 CC0805N +V3.3S
C321 C322 GND_51610 R485 180pF R486 4.7K RC0402N +V3.3S
2.74k CC0402N TPS51610RHB
0.1uF C325
32
31
30
29
28
27
26
25
33pF 33pF RC0603N U20

CC0603N
CC0402N CC0402N DPRSLPVR R487 499 ±1% RC0603N
Rdroop=(Rcseff*Acs)/(GM*Rimvp) PM_DPRSLPVR 8,17
DROOP R319
TI Tony Modify! R488 +V3.3S 10k
+V5S
0 RC0402N
R489 C324 R490 POP = NA VR_PWRGD_CLKEN 6
0 1uF 124K ±1% RC0402N
3
TRIPSEL
GND_51610 POP = NA CC0603N RC0603N R491
D
RC0402N 1.9K ±1% Q27
TI Tony Modify! RC0402N
GND_51610 CLK_EN# 1
S
GND_51610 G
2
+V3.3S R492 0 RC0402N
+V5S R493 0 RC0402N VREF_VCORE R494 0 RC0402N

POP = NA R495 100 RC0603N POP = NA
ALL_SYS_VRPWRGD 25,32
+V3.3S R496 0 RC0402N
R497 POP = NA R498 1k RC0402N
IMVP_VR_ON 25
B 0 +V5S R499 0 RC0402N B
RC0402N POP = NA C326 0.1uF CC0603N
POP = NA
R500
0
GND_51610 RC0402N RC0402N 0 R501 VREF_VCORE
POP = NA
Rslew=(Kslew*Vslew)/SRc4_fast RC0402N 0 R502 +V3.3S
POP = NA
RC0402N 0 R504 +V5S TI Tony Modify!
R505 POP = NA
The OCP=10A
0
RC0402N
POP = NA
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
Power_V_CPU_CORE A
C Name
5 4 3 2 1
5 4 3 2 1
S3 /S4 Power control
D D
+V3.3A AO4430
+V3.3S
+V1.8
AO4430
+V1.8S Power Good
Q41 +V5A +V5S Q51
8 1 AO4430 8 1
7 2 C346 Q43 7 2
6 3 8 1 6 3 +V3.3S
C345 5 7 2 +V5A 5
10uF
CC1206N C331 6 3
4
4
10uF 5 C391 C399
C344 C327
CC1206N 1uF 100NF R612
10uF 100NF
4
R449 CC0603N CC0402N 1k
CC1206N 10uF U22 CC0402N
R63 POP = NA R608 30K RC0603N
5
1k POP = NA CC1206N
1k
3
+V15A R508 51K RC0402N +V15A R506 27k RC0402N R607 29 DDRVR_PWRGD 1
10k Q59 C348 4 ALL_SYS_VRPWRGD 25,31
S D
RC0402N 2N7002LT1 1uF 30 V0.89S_POWGD 2
1 CC0603N +V3.3S
G
3
3
R654
3
C328
2
R646 Q35 C329 51k Q33 Q58 R609
S D
S D
S D
0.1uF 1M
51k 2N7002LT1 0.1uF RC0402N 2N7002LT1 2N7002LT1
CC0603N R610 1k 1 R513
RC0402N 1 CC0603N 1 RC0402N
G G 30 V1.05S_PWRGD G 10k
3
C347
RC0402N C330
2
2
Q42 100NF
S D
100NF
3
2N7002LT1 CC0402N
R507 1K CC0402N
Q40 1 POP = NA
S D
17,25,29 PM_SLP_S3# G
2N7002LT1 R655
2
R509 1K C356 1M
17,25,29 PM_SLP_S3# 1 G U24
R647 100NF RC0402N
5
2
C361 1M CC0402N
100NF RC0402N POP = NA 1
CC0402N 4 PM_ICH_PWROK 17
POP = NA 8,17,25 DELAY_VR_PWRGOOD 2
3
C C
Power Discharge Circuit
B B
+V3.3A +V5S +V3.3S +V1.5S +V0.9S +V0.89S_GFX +V1.05S +VCC_CORE
R517 R518 R519 R520 R521 R567 R523 R524

100k 220 470 68 68 68 330 47
RC0402N RC0402N RC0402N RC0402N RC0402N RC0402N RC0402N RC0402N
3
3
Q46 R525 Q47 Q48 Q49 Q50 Q60 Q52 Q53
S D
S D
S D
S D
S D
S D
S D
S D
2N7002LT1 1M 2N7002LT1 2N7002LT1 2N7002LT1 2N7002LT1 2N7002LT1 2N7002LT1 2N7002LT1
1 RC0402N 1 1 1 G 1 G 1 1 1
17,25,29 PM_SLP_S3# G G G G G G
2
2
+V3.3A +V1.8
R526 R527
100k 68
RC0402N RC0402N
3
Q54 R528 Q55

S D
S D
A 2N7002LT1 1M 2N7002LT1 A
1 RC0402N 1
17,25,29 PM_SLP_S4# G G
2

5th floor,Block K,
Title <Title>
Size Sheet Rev
Power_S3_S4/Power Good
C Name A
5 4 3 2 1
10 9 8 7 6 5 4 3 2 1
J J
I I
D3V3
R535
100k
RC0402N
RST#
C337
1uF R701
CC0402N 500K
H
Cardreader RC0402N
POP = NA
H
MODE_SEL
R536 C339
0 680pF
RC0402N CC0402N RST#
POP = NA
MODE_SEL
XD_RDY
E1
E2
E3
XD_CLE
XD_CE#
XD_ALE
CN15
SP16
SP15
SP13
SD_CD# R700 0 RC0402N 1 XO
E1
E2
E3
SD_WP 1
2 2
SD_DAT1 3 R454 0 RC0402N XI
3 6 CLK_CD48
SD_DAT0 4 4
G 5 5 G
6 6
48
47
46
45
44
43
42
41
40
39
38
37
7 7
MS_BS 8 8 C341
XTL1
XTL0
GND4
MODE_SEL
RST#
SP19
SP18
SP17
SP16
SP15
SP14
SP13
SD_CLK 9 9 100NF
MS_D1 10 10 CC0402N
MS_D0 11
CARD_3V3 11
12 12 VREG R538 0 RC0402N SD_CMD_1
C523 MS_D2 1 AV_PLL SD_CMD 36
13 13 R532 6.2K RC0603N SP12
100NF 2 RREF SP12 35
14 14 XD_D1 R539 0 RC0402N SD_CLK
CC0402N MS_INS# 3 NC1 SP11 34
15 15 R534 0 RC0402N D3V3 R540 0 RC0402N MS_CLK
MS_D3 16 USB_PN2 4 DM D3V3_2 33
16 16 +V3.3S R533 0 RC0402N U33 C343
SD_CMD 16 USB_PP2 5 DP GND3 32
17 17 RTS5159 SP10 100NF
MS_CLK 6 GND1 SP10 31
18 18 qfp50p900X900-48Na CC0402N
7 NC2 NC3 30
19 19 MS_INS#
8 29
F C522
SD_DAT3 20
21
20 C519 C335 CARD_3V3 9
3V3_IN
CARD_3V3
SP9
SP8 28 SP8 F
21 10uF 100NF C342 VREG 10 27 SP7
100NF SD_DAT2 22 VREG SP7
22 CC1206N CC0402N 100NF D3V3 11 26 SP6
CC0402N D3V3_1 SP6
E4
XTAL_CTR
CC0402N C336 12 25 SP5
100NF GND2 SP5
MS_D4
MS_D5
GPIO0
EEDO
EECS
EESK
CC0402N
E4
EEDI
SP1
SP2
SP3
SP4
13
14
15
16
17
18
19
20
21
22
23
24
+V3.3S
MS_D4_1
MS_D5_1
D3V3 R445 0 RC0402N
XD_CD#
SD_CD#
SD_WP
SP4
E E
C340 20PF CC0402N XO

POP = NA
2
R537
X6
270K
MS_D4_1 MS_D4 OSC-2 RC0603N
POP = NA POP = NA
1
SP4 XD_D4 SD_DAT1
C338 20PF CC0402N XI
MS_D5_1 MS_D5 POP = NA
SP5 XD_D5 MS_BS
SP6 XD_D3 MS_D1
D SP7 XD_D6 SD_DAT0 MS_D0
D
SP8 XD_D2 SD_DAT7 MS_D2
SD_CMD_1 SD_CMD
SP13 XD_WP# SD_DAT4 MS_D7
SP15 XD_WE# SD_DAT3
SP16 XD_RE# SD_DAT2
C C
B B

5th floor,Block K,
A A
Title <Title>
Size Sheet Rev
Card reader A
C Name
10 9 8 7 6 5 4 3 2 1
5 4 3 2 1
+V5S
X[15..0]
Keyboard Connector
25 X[15..0]
C352 C353 X15 28

X2 28
27 27
10uF 100NF X0 26 +V3.3A
X3 26
25 25
X11 24
X8 24
CN17 23 23
GND X9 Y0 R556 10k
22 22
X7 Y1 R557 10k
1 1 21 21
D
X12 Y2 R558 10k D
2 2 20 20
X1 Y3 R559 10k
3 3 16 16
X6 Y4 R560 10k
4 4 18 18
X5 Y5 R561 10k
5 5 17 17
X13 Y6 R562 10k
E1 E1 6 6 19 19
X14 Y7 R563 10k
E2 E2 7 7 15 15
8 TBCLK Y[7..0] X10 14
8 TBDATA TBCLK 25 25 Y[7..0] Y5 14
9 9 TBDATA 25 13 13 E2 E2
10 Y4 12 E1
10 Y7 12 E1
11 11 11 11
12 X4 10
12 Y6 10
9 9
Y0 8
Y2 8
7 7
C354 C355 Y3 6
Y1 6
5 5
47pF 47pF 4 4
3 3
2 2
1 1
GND
Connect to Touch PAD GND CN16
TO KEY_BOARD
CN21
1 1
E1 E1 2 2
E2 E2 3 3
4 4
C
modify 1.0mm pitch 2009-10-15 TO DCIN_BOARD C
TO TP_BOARD
+V_ADP_IN WB1251UR-10T4
TO LED_BOARD 10
9
10
9
8 8
7 7
6 6 E2 E2
USB_PN0 5 E1
16 USB_PN0 5 E1
+V3.3A USB_PP0 4
+V5S 16 USB_PP0 4
USB_OC0# 3
16 USB_OC0# 3
CN3 2 2
1 1
1 1
2 2 CHG_LED_ORG 25
E1 3 +V3.3S CN6
E1 3 CHG_LED_WHT 25
E2 E2 4 4 PWR_LED 25
5 HDD_LED#
5 HDD_LED# 17
6 WIFI_LED
6 WIFI_LED 25
7 7
8 3G_LED
8 3G_LED 25
9 9
B B
GND
TO princeton sw_BOARD
+V3.3A
CN37
1 1
2 2 CHG_LED_ORG 25
3 +V3.3S
3 CHG_LED_WHT 25
4 4 PWR_LED 25
5 HDD_LED#
5 HDD_LED# 17
E1 6 WLAN_LED
E1 6 WIFI_LED 25
E2 E2 7 7
8 3G_LED
8 3G_LED 25
9 9 POWSW# 15,26
A
10 10 LINUX_POWSW# 26 A
11 11 DOSRECOVERY_SW# 25
12 12

5th floor,Block K,
GND Haicang District,Xiamen,China,361026
Title <Title>
Size
Add power switch connector 2009-10-15 C
Sheet
Name
Main_Board CONNECTOR
Rev
A
5 4 3 2 1
10 9 8 7 6 5 4 3 2 1
J J
I I
H H
Camera CONN +V5S
U54
+V5S_CAM
5 VIN
VOUT 1
R143 0 POP = NA 4 SS
C401 C358 C359
+V5S +V3.3S Bluetooth CONN 10uF

C360
0.1uF
CC1206N CC0603N
C167
0.01uF
CC0402N
3 EN/ENBGND 2 10uF
CC1206N
100NF
CC0402N
POP = NA SOT95P280-5N
APL3512A/B
R569 R570
G 0 0 G
POP = NA
RC0402N RC0402N CN22
1 1
16 USB_PP5 2 2
16 USB_PN5 3 3 E1 E1
R573 0
4 4 E2 E2 25 CAM_ON
R574 0 RC0402N 5
25 BT_ON 5
6 6
R575
10k
RC0402N
GND
F GND F
GND
E E
+V5S_CAM
E1
1
2 J3
16 USB_PN7
3 5pin
16 USB_PP7
4 SMD-CN-100P-5L
5
E2
D D
GND
C C
B B

5th floor,Block K,
A A
Title <Title>
Size Sheet Rev
Option decice:BT/Camera A
C Name
10 9 8 7 6 5 4 3 2 1
5 4 3 2 1
1.H_PROCHOT# 上拉改到电阻前，靠近CPU PIN

2.CN15:RTC 电池插座，PIN1和PIN2对换
3.Add X5,with X1 dualay,;X7,with X3 dualay 2009-10-15
4.Add touchscreen conector dmb conector mic connector 2009-10-15
5 Add 12pin connector & startup on system function 2009-10-15
D
6 Add L8,with L7 dualay 2009-10-15 D
7 modify +V3.3S & +V5S CIRCUIT 2009-10-15
C C
B B
A A

5th floor,Block K,
Title <Title>
Size Sheet Rev
Changelist
C Name A
5 4 3 2 1

Intel Pinetrail Platform F10T: Version: A Drawing By:wain

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Intel Pinetrail Platform F10T: Version: A Drawing By:wain

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Copyright:

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5 4 3 2 1

Lengda Technology Ltd.

DCOUT 10 f1206n DC6

DR5 0 RC0603N DD2 DD3

Date: Wednesday, November 04, 2009 Sheet 1 of 1

BLOCK DIAGRAM System Power

Intel Chipset Power

32.768KHz LPC BUS USB7

BIOS&EC KB TOUCH Audio Modem Lengda Technology Ltd.

+V5 shutdown +V5A

CLK_EN# Lengda Technology Ltd.

13 Clock Haicang District,Xiamen,China,361026

AF 1.05/1.5V POWER Module VTVDAC:3.3V /S0 AF

2.5V POWER Module +VCCP

+V3.3S +V3.3S CardBus

V5REF:5V /S0 +V_DC

POWER RAIL DESTINATION VOLTAGE S0 CURRENT

LPC KBC 0.0308A (Idle)

PMU3V PMU08 0.0615A

Lengda Technology Ltd.

or as SE1/SE2. Details please reference the

R57 2.2 RC0603N VDD_48

R58 2.2 RC0603N VDD_PLL3

STRAP MODE STUFF UNSTUFF

Lengda Technology Ltd.

REV = 1.1 M_A_DQ[63..0] 11

DDR_A_DQS_5 AE26 M_A_DQS5

R65 80.6 ±1% RC0402N DDR_PRD

Lengda Technology Ltd.

RC0402N 0 R78 EXT_TS1 K29 A13 H_GTLREF

RSVD_TPC1 BPM_1B_2 BCLKP CLK_CPU_BCLK 6

R96 10k RC0402N POP = NA EXT_TS1

Lengda Technology Ltd.

Lengda Technology Ltd.

R542 33 R541 1M POP = NA

Lengda Technology Ltd.

Lengda Technology Ltd.

Lengda Technology Ltd.

Layout note: R107 47 RC0402N

C68 100NF CC0402N R117 47 RC0402N M_A_A0 M_A_A[14..0]

Lengda Technology Ltd.

IPEX 30PIN CON"

Lengda Technology Ltd.

Lengda Technology Ltd.

USN PORT USED FOR

Lengda Technology Ltd.

R12 RSVD03 SATA0RXN AE6 SATA_RXN0 20

INT_SERIRQ R619 10k RC0402N

32.768KHz GPIO38 AC23

CC0402N LAN_RXD0 RC0402N RC0402N

W3 AC18 MCH_SYNC# PM_SYSRST# 8.2K

R191 20K RC0402N RTC_X2 RTCX1 SUSCLK

SMB_DATA E23 AC3 R585 100 RC0402N

2N7002LT1 21..23,25 BUF_PLT_RST# Xiamen Exprot Processing Zone,

2N7002LT1 RC0402N SN74LVC1G08DCKR

2 S D 3 SMB_DATA sot65p190-5n Title <Title>

Lengda Technology Ltd.

f1206n R620 0 RC0603N CN34

MARK1 MARK2 MARK3 MARK4

MARK5 MARK6 MARK7 MARK8

Lengda Technology Ltd.

C141 C142 C143 C144

Lengda Technology Ltd.