This document contains an assignment for a microprocessor-based systems course. It includes 5 questions asking students to calculate: 1) the maximum memory size connectable to a 16-bit data/20-bit address microprocessor, 2) the maximum memory size of a 32-bit addressable memory, 3) the data and instruction memory cell sizes for a 16-bit instruction/8-bit register processor, 4) the clock rates and cycles for programs running on computers with different clock rates, and 5) the value to be added to the program counter after each 32-bit instruction fetch from byte addressable memory. Students are instructed to show their work.
This document contains an assignment for a microprocessor-based systems course. It includes 5 questions asking students to calculate: 1) the maximum memory size connectable to a 16-bit data/20-bit address microprocessor, 2) the maximum memory size of a 32-bit addressable memory, 3) the data and instruction memory cell sizes for a 16-bit instruction/8-bit register processor, 4) the clock rates and cycles for programs running on computers with different clock rates, and 5) the value to be added to the program counter after each 32-bit instruction fetch from byte addressable memory. Students are instructed to show their work.
This document contains an assignment for a microprocessor-based systems course. It includes 5 questions asking students to calculate: 1) the maximum memory size connectable to a 16-bit data/20-bit address microprocessor, 2) the maximum memory size of a 32-bit addressable memory, 3) the data and instruction memory cell sizes for a 16-bit instruction/8-bit register processor, 4) the clock rates and cycles for programs running on computers with different clock rates, and 5) the value to be added to the program counter after each 32-bit instruction fetch from byte addressable memory. Students are instructed to show their work.
Please demonstrate your calculations for all questions.
1- Consider a microprocessor system where the processor has 16-bit
data bus and 20-bit address bus. What is the maximum size of the byte addressable memory that can be connected with this processor? (15 points)
2- In continuation to the previous exercise, now consider a bit
addressable memory with 32-bit bus. What is the maximum memory size in (bytes) that can be accessed? (15 points)
3- A processor has been designed based on Harvard architecture. The
instruction size of this processor is fixed, and each one is 16 bits. On the other hand, the register sizes are 8 bits. If you are to design the memory and bus system for this processor what would be the size of each cell of the data memory and instruction memory? (30 points)
- If the data memory is 1 Kbyte, what will be the size of the address- bus to point at data-memory locations?
- If the instruction memory is 1 Mbyte, what will be the size of the
instruction address-bus?
4- A program runs in 10 milliseconds on computer A, and it needs 20*
10 ^ 6 clock cycles to complete the program. What would be the clock rate of this processor? If the clock rate of computer B is 1.5 times of computer A, and the program runs in 5 ms, what would be the number of clock cycles in computer B? (30 points)
5- Assume that the instructions of a processor are 32 bits and the
instruction memory is byte addressable, which value must be added to the program counter (PC) after each instruction fetch to point at the next instruction? (10 points)
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