PROCEEDINGS OF THE 2008 IEEE INTERNATIONAL CONFERENCE ON ULTRA-WIDEBAND (ICUWB2008), VOL.
Power Consumption and Chip Area Reduction
Techniques for MB-OFDM UWB RFICs
Zisan Zhang, Koen Mertens, Marc Tiebout, Member, IEEE, Stefano Marsili, Denis Matveev,
Christoph Sandner Member, IEEE
Abstract—For MB-OFDM UWB systems with worldwide
interoperability the band group 1, 3 and 6 should be included.
Multiple bands, high frequency and wideband operation pushes
the classical implementation to physically big chip area and high
power consumption. Using the latest deep submicron CMOS
technology can solve this problem in digital circuits, however it is
not in favor of RF and analog performance; furthermore the time
spent on characterizing the latest process can significantly
increase the development cost and delay the time to market. In
this paper, power consumption and chip area reduction
techniques in both system concept and transistor level design are
proposed; and they are verified by some low-power high
performance MB-OFDM UWB RF ICs in a digital 90nm CMOS
technology. The results demonstrate that with the proposed
techniques, power consumption and chip area can be reduced
significantly.
Index Terms—Ultra wideband, MB-OFDM, CMOS, RF
transceiver, direct-conversion, fast-hopping frequency
generation, sub-harmonic injection locking, active inductor,
stacked inductor, IQ modulator, power amplifier, low-power,
chip area reduction.
I. INTRODUCTION
H IGH data rate Wireless Personal Area Network (WPAN)
and wireless USB, based on Multi-Band Orthogonal
Frequency Division Multiplexing (MB-OFDM) UWB, have
very promising market due to the fast-growing high speed
multi-media data transfer. According to WiMedia Alliance
power consumption is one of the most important requirements
for MB-OFDM UWB products, because they are intended for
use with portable devices. Even though the WiMedia UWB
systems have been designed for low power consumption from
the beginning, taking advantage of the low transmit power
allowed by the regulatory rules for this technology, the actual
solutions available (3-5GHz UWB transceivers) have power
consumption at 1.5 to 2mW/Mbps; and the roadmap is to
reduce the power consumption to well below 1mW/Mbps [16].
To be successful in the marketplace, next-generation UWB
chips must be optimized for low power consumption in order
to satisfy consumer expectations. For UWB systems with
Zisan Zhang, Koen Mertens, Marc Tiebout, Stefano Marsili, Denis
Matveev, Christoph Sandner are with Infineon Technologies AG,
Development Center Villach, Siemensstr. 2, A-9500, Villach, Austria. (e-mail:
zisan.zhang@infineon.com, phone: +43-(5)1777-6850; fax: +43-(5)177-
6260).
978-1-4244-1827-5/08/$25.00 ©2008 IEEE
worldwide interoperability, a dual-band solution covering 3-
5GHz and 6-9GHz is required. Simple migration from 3-5GHz
circuits to 6-9GHz results in physically big chip area and high
power consumption, due to multiple bands, higher frequencies
and wideband operation. Using the latest deep submicron (for
instance 45nm) CMOS technology can reduce chip area and
power consumption in digital part, however it is not in favor
of RF and analog performance [12]; furthermore the time
spent on characterizing the latest process can significantly
increase the development cost and delay the time to market.
With some low-power high performance MB-OFDM UWB
RF ICs in a digital 90nm CMOS technology, in this paper, we
demonstrate that significant Power Consumption and Chip
Area Reduction (PCCAR) can be achieved by using
innovative system concept and transistor level design
techniques.
II. PCCAR IN SYSTEM CONCEPT
A. Proposals for PCCAR in System Concept
System concept level innovation is the most efficient
PCCAR technique. Based on the practices, we have the
following proposals:
1) Select system concept with less number of devices; for
instance, direct-conversion transceiver;
2) Use digital block to replace analog block if feasible; for
instance, use ring oscillator instead of LC VCO, if phase
noise is less critical for the system;
3) Use digital circuit to compensate the mismatch (that is,
area) related analog artifacts; for instance, DC offset, IQ
mismatch and LO leakage calibration;
4) Use switched (or tunable) sub-band circuitry.
Based on above proposals, a Digitally-controlled Injection
Locked Oscillator (DILO) is adopted in generating fast-
hopping frequencies for MB-OFDM UWB system [10]. The
detailed implementation of this concept is presented in the
following subsection.
B. PCCAR in UWB LO Generation
The WiMedia Alliance proposed to channelize the UWB
available spectrum from 3.1GHz to 10.6GHz into 14 sub-
bands and to exploit OFDM modulation. Within each group
fast frequency hopping is employed to allow for time-
frequency coding. The generation of the carriers entails
several issues. A wide span of frequencies is to be synthesized
while ensuring a fast hopping capability. TX EVM
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PROCEEDINGS OF THE 2008 IEEE INTERNATIONAL CONFERENCE ON ULTRA-WIDEBAND (ICUWB2008), VOL. 2

specifications call for a moderate (-106dBc/Hz at 1MHz the tank frequency. At power-up for each sub-band a control
offset) phase noise performance, while the transmit PSD mask word is searched and stored such that the oscillation frequency
requires the spur level to be less than -20dBc in adjacent sub- matches the sub-band. This makes the system a DILO. The
bands [6]. divide-by-2 circuit is a conventional CML divider. Output
The required ability of hopping from one channel frequency buffers are included for measurement purposes. Prototypes of
to the other within 9ns prevents the use of a conventional the designed circuit are implemented in a digital 90nm CMOS
approach based on a single wideband PLL. Single-sideband technology and assembled in chip-on-board fashion for
(SSB) mixers can be used to offset a fixed frequency to testing. A micrograph of the chip is shown in Fig.2. Within the
simultaneously generate the required carriers which are same pad ring two versions of the circuit are laid out. Wider
dynamically selected by a multiplexer [2, 3]. This approach, injection devices, namely W=120μm, are used in DILO-L,
however, in CMOS requires a huge power consumption to while 80μm wide transistors are employed in DILO-S. In any
achieve low spurious [3]. Another possibility is to use an array case, the active area is only 0.074 mm2.
of PLLs [1, 4], leading to a large area.
For PCCAR, we have selected the system concept based on
sub-harmonic injection locking [5]. A simplified schematic of
the implemented circuit is shown in Fig.1. An LC oscillator,
operated at twice the desired frequency to avoid TX frequency
pulling, is injection locked to the k-th harmonic of a 528MHz
reference. This basically allows generating all 14 LO
frequencies required by WiMedia. The oscillator is followed
by a divide-by-2 circuit to generate the desired frequency as
well as quadrature phases. The locking range is narrower than
the reference frequency to guarantee a unique locking
condition. Changing the natural frequency of the LC tank, the
oscillator locks to another harmonic, corresponding to a
different UWB channel frequency, thus all band groups can be
covered with only one oscillator.

Fig.2. Chip micrograph of the UWB LO generation systems.

The measurement was done for each frequency of band

Fig.1 Simplified schematic of the implemented system.
In order to prove this system concept, we focused on the
generation of carriers for band group #6. In fact, that portion
of the spectrum shows the most stringent challenges, as the
highest harmonic indexes are involved. The frequency
reference drives a pulser that controls the injection devices M3
and M4. There are two possible modes of operation. In
“single” mode, only one device (M3) is activated by pulses at
528MHz rate. In “toggle” mode, pulses at 1056MHz rate
activate M3 and M4 alternately. As a consequence, a 528MHz
odd-symmetry current wave with a rich harmonic content is
injected into the tank. The amplitude of each odd harmonic is
effectively doubled, while even harmonics are theoretically
suppressed. The oscillator core is made of an LC tank and a
cross-coupled nMOS differential pair. A single-turn 140pH
inductor is employed. A 5-bit capacitor bank is used to tune
group #6, normalized to the carrier amplitude. Operated in
“toggle” mode, the worst case spur is lower than -19dBc, -
30dBc, and -38dBc in sub-bands #9, #10, and #11,
respectively. Notice the worst spurs are those at 528MHz
offset from the carrier, which are supposed to be canceled by
the “toggle” operation. Mismatches in the buffers driving M3
and M4 cause their limited suppression.
TABLE I
SUMMARY OF MEASURED PERFORMANCE AND COMPARISON WITH OTHER
UWB LO GENERATION SYSTEMS
The performance of the proposed UWB LO generation
system is summarized and compared to other designs in table
I. Though power consumption in [4] is comparable to this
work, its area is 25.7 times of this work; furthermore this work
is done for high band group. Clearly this concept has big
advantages over other published solutions in PCCAR.

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PROCEEDINGS OF THE 2008 IEEE INTERNATIONAL CONFERENCE ON ULTRA-WIDEBAND (ICUWB2008), VOL. 2

III. PCCAR ON TRANSISTOR LEVEL which is not for the bandgroup1 PHY implementations,
because the LO buffer should have small input capacitance
A. Proposals for PCCAR on Transistor Level (small transistor), on the other hand it should have 6dB
Innovations on transistor level can also have significant voltage gain to provide sufficient LO swing to drive the IQ
contributions in PCCAR. For MB-OFDM UWB RFICs, the modulator.
main causes for high power consumption and big chip area are
the following: CTRL
a) High operating frequency; circuits with resistive load 3-WIRE BUS REG
operated at higher frequency draw considerably more DC
current; BBI

b) Passive inductors; in low-voltage design, to save power 18GHz IMIX

and boost the gain in high frequency, passive inductors LO IN RFP RF
ILO
are sometimes unavoidable;
c) Voltage mode analog baseband signal processing; in IQ

PA
DIV
voltage mode signal processing, many redundant V-to-I
and I-to-V conversions are used. QLO
RFN
To tackle with these problems, we have the following QMIX
proposals:
BBQ RF TX
1) Use active inductor load to replace resistive load, if
feasible; Fig. 3. UWB RF transmitter block diagram.
2) Use stacked inductor to replace single-layer inductor;
3) Use low-voltage low-power V-to-I converter and current- In this design, a wide band LO buffer using differential pair
mode circuits for analog baseband signal processing; with active inductor load is used for the first LO buffer to
Based on these proposals, a low-power UWB RF transmitter is provide 6dB gain while having relatively small input
designed and fabricated in a 90nm digital CMOS technology transistors (40um/90nm in this design). The active inductor
[11]. The detailed implementation is presented in the boosts signal at high frequency by more than 4dB compared to
following subsection. the resistive load and it saves chip area significantly compared
B. PCCAR in UWB RF Transmitter to the passive inductor. In addition to this, the LO buffer with
active inductor load is robust in gain and frequency behavior
The block diagram of the UWB RF transmitter is shown in
because both its input and load FETs are the same type of
Fig.3. It consists of IQ divider, LO buffers, IQ modulator and
transistors. By using this type of LO buffer, power
RF power amplifier and 3-wire bus control logic. The IQ
consumption and chip area is reduced significantly in this
divider divides the input clock (12-18GHz) by 2 and generates
UWB transmitter.
In-phase (I) and Quadrature (Q) LO signals, then the IQ LO
For low-voltage operation and to get relatively high
signal is amplified and buffered to the IQ modulator. The IQ
conversion gain at high frequencies, passive inductor load has
modulator consists of I and Q path Gilbert-type up-conversion
to be used in this mixer. In order to save chip area, stacked
mixers which get IQ analog baseband signal from external
inductors are used. The 0.8nH stacked inductor has a
signal source. Outputs of the mixers are combined to a
dimension of 50um*30um, which is only 15% percent of a
differential RF signal and fed to the RF power amplifier,
non-stacked inductor with the same inductance. To get 3GHz
whose differential outputs are connected to RF measurement
bandwidth, Q of the inductor is further reduced by a parallel
equipments via an external BALUN. A 3-wire bus control
resistor R1. For calibration of LO leakage, artificial DC offset
logic is implemented to control gain settings in the power
current is added to the converted baseband current by using 6
amplifier, power down and sleep mode in all of the blocks.
bits programmable current sources.
The IQ divider is a CML latch with resistive load. Main
In the up-conversion mixer a low-power low-voltage V-to-I
design challenge is to meet stringent IQ phase matching
converter is used. This mixer is very robust in linearity
requirement of less than 1°, which is derived from the system
because of the feedback loop used in the V-to-I converter; and
requirement on the image rejection ratio. The matching
it is also very robust in conversion gain which is mainly
requirement leads to relatively large devices in the divider,
determined by the dimension ratio of the same type NMOS
consequently big parasitics; furthermore the high operating
transistors (assuming LO swing is fixed).
frequency makes the IQ divider sensitive to the capacitive load
The fabricated transmitter chip is bonded to a PCB for RF
and parasitic capacitances at internal nodes. So special
measurements. The differential LO inputs are connected to an
attentions are paid in both design and layout to get good
RF signal generator via a BALUN. The differential RF outputs
matching and minimize parasitics. The low-pass poles at the
are combined to RF measurement equipments via another
IQ divider output nodes are designed to above 12GHz to avoid
BALUN. After de-embedding, the measurement results show
sharp roll-off at 9GHz, thus the resistor value is rather small
a maximum output power of -5.7dBm, which is sufficient for
(100 Ohms), and this leads to small LO swing. With these
short-range applications. At the maximum output power, this
constraints, design of the LO buffers becomes a challenge
RF transmitter has -33.8dBc sideband rejection; without

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PROCEEDINGS OF THE 2008 IEEE INTERNATIONAL CONFERENCE ON ULTRA-WIDEBAND (ICUWB2008), VOL. 2

calibration, it has -35.2dBc LO leakage, after calibration, the
LO leakage is suppressed to -47.07dBc. Two-tone test was
done at 7.5GHz LO signal, with 33MHz and 30MHz two-tone
baseband signals, the measured OIP3 value is -1.41dBm. The
in-band ripple at maximum output power is less than 1dB
from 6GHz to 8GHz, however it drops by another 2dB from
8GHz to 9GHz. The main reason for the roll-off at high
frequency is the parasitics from the bonding wires and PCB.
1mm
in 90nm CMOS technology, we demonstrate that significant
power consumption and chip area reduction can be achieved
by using innovative system concept and transistor level design
techniques.
ACKNOWLEDGMENT
The authors would like to thank Michael Wassermann,
Sylvia Michaelis, Dietrich Michaelis, Sven Derksen and
Florian Michl for their assistances and supports.

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*PDC =1.2V·(60mA[TX]+30mA[DILO])

IV. CONCLUSION
To be successful in the marketplace, next-generation MB-
OFDM UWB chips with world-wide interoperability must be
optimized for low power consumption and small chip area.
Using the latest deep submicron CMOS technology can reduce
power consumption and chip area in digital circuits, but it is
not in favor of RF and analog performance. In this paper, with
some low-power high performance MB-OFDM UWB RF ICs
Zisan Zhang received the B.Sc., M.Sc., and Ph.D degrees in electrical
engineering from Jilin University China, Changchun, China, in 1995, 1998,
and 2001, respectively. In 2005, he received his second Ph.D. degree in
electrical engineering from the University of Duisburg-Essen, Duisburg,
Germany.
From 2001 to 2004, he worked in Fraunhofer Institute of Microelectronic
Circuits and Systems in Duisburg, Germany. Since September 2004, he has
been with Infineon Technologies Austria AG in Villach, Austria
Dr. Zhang holds 2 US patents, 2 outstanding awards in "Science &
Technology advances" in 2002 and 2004 respectively in China, and 18 Journal
and conference papers. His research interests include Analog and RF circuit
design, RF wireless transceiver design, CAD for analog and RF circuits.

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