UNIVERSITY OF ZIMBABWE

POWER ELECTRONICS AND MOTION CONTROL: EE420

Lecturer Dr. T. Marisa

Tutorial 2

.
Question 1

(a) Explain why a Darlington pair has a high current gain. (Hint draw diagram and derive current the [4]
gain equation.)
(b) Give two drawbacks of using a Darlington pair transistor? [4]
(c) Suggest one solution to the drawbacks and show that your solution maintains the gain (Give equa- [5]
tions for current gain).
(d) Compare the Darlington pair to the Sziklai pair giving advantages and disadvantages. [4]
(e) Derive the current gain equation of the Sziklai pair. [3]
Total for Q.1: 20 marks

Question 2

(a) With reference to power BJTs, explain the importance of the following manufacturer’s specifications
i. FBSOA, [3]
ii. β vs ic characteristics, [3]
iii. iB vs VBE characteristics [3]
(b) Describe the following phenomenon in power BJTs, state how they affect the operation of the devices
and state how to reduce their effect:
i. Emitter crowding. [5]
ii. Conduction modulation. [5]
Total for Q.2: 19 marks

Question 3

(a) How does the introduction of the drift region affect the i-v characteristics of a power BJT transistor? [4]
(b) You are part of a design team, your job is to evaluate the use of Darlington or Sziklai transistor
pairs
i. Draw the circuits for Darlington and Sziklai pairs. [4]
ii. Derive the gain equations for Darlington and Sziklai pairs. [6]
iii. Give a detailed comparison of the two transistor pairs. [4]
(c) What are the main constructional differences between a MOSFET and a BJT? What effect do they [5]
have on the current conduction mechanism of a MOSFET?

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 Total for Q.3: 23 marks

Question 4

(a) Draw the switching waveforms plot of a MOSFET during turn-off and explain the the plot with [6]
reference to MOSFET parasitic capacitors. Hint: Your plot and explanation must include the times
tdOF F , trv2 , trvi , tf i
Total for Q.4: 6 marks

Question 5

(a) Give three common non-destructive semiconductor junction breakdown mechanisms. Include break- [5]
down method and descriptive term of the method.
(b) Draw the equivalent circuit model of a thyristor and use the model to explain its operation. [5]
(c) You have designed a circuit with a number of p-n junction diodes with identical i-v characteristics [4]
are connected in parallel will they share current equally? Justify your answer.
(d) i. What are the main differences in the steady state output characteristics of a GTO and a [2]
thyristor?
ii. What effect do they have on the gate drive requirement of a GTO? [3]
iii. Draw the equivalent circuit for a GTO and derive the equation for the anode cathode to current. [4]
iv. What are the desirable characteristics of the gate drive circuit of a GTO? [3]
v. How do they influence the switching performance of a GTO? [3]
vi. What is the significance of the specifications IFAVM and IFRMS in relation to a GTO? [3]
vii. Is the specification IFgqm the same as IFAVM /IFRMS ? If not, then which current should one use [3]
in a particular application?
viii. Which parameters of the gate current waveform reduces the turn on energy loss (EON ) of a [3]
GTO?
ix. How does one reduce the turn off energy loss of a GTO? [2]
Total for Q.5: 40 marks

Question 6

(a) In a system design with bipolar junction transistors (BJT), what precaution must be taken regarding [3]
the forward recovery voltage of the free wheeling diodes in a PWM voltage source inverter employing
BJTs of the n-p-n type?
(b) Why is it necessary to maximize the peripheral contact area of the gate and the cathode regions? [3]
(c) What do you under stand by “dynamic latch up” of an IGBT? [2]
(d) What effects do the width and doping level of the drain drift region of an IGBT have on its [3]
performance?
(e) What steps are taken in the cell structure design of an IGBT to minimize the “tail current” during [3]
turn off operation.
Total for Q.6: 14 marks

Question 7

(a) In the transistor switching circuit in Figure (1), VBE |sat = 0.75V , VCE |sat = 0.2V with β given as [4]
10 ≤ β ≤ 40. Find out the value of RB and Power requirement of the base source.

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 +VCC = 200 V

RL

VB = +12 V
RB
Q1

Figure 1: Power BJT circuit.

(b) The transistor of part (a) has the following switching time specifications. td = 1µs, tri = tf v = 2.5µs,
ts = 5µs, tf i = trv = 2.5µs. The transistor is switched at a frequency of 10 kHz with duty ratio D
= 0.5. Find out,
i. conduction power loss, [3]
ii. switching power loss. [3]
Total for Q.7: 10 marks

Question 8

(a) In the gate drive circuit of an IGBT shown in Figure 4.

+VCC

Q1
RB RG
IGBT

Q2

−VCC

Figure 2: IGBT drive circuit.

The following data is available from the components datasheets Vgg = 15 V, Vcc = 20 V, β1 for
Q1 = 50, β2 for Q2 = 50. RB = 2.2 kΩ, RG = 30 Ω, VgE (th) of IGBT = 4V, gfs = 40 CgE = 4 nF,
CgD = 500 pF, The IGBT is used to switch a clamped inductive load of 50 Amps from a 400 volts
supply.
i. Find out maximum values of |diC /dt| and dvCE /dt during Turn on and Turn off of the IGBT. [8]
ii. How can you protect the IGBT from overshooting the maximum values of |diC /dt| and dvCE /dt [3]
during Turn on and Turn off.
Question 9

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 (a) Consider an IGBT and a MOSFET with the same BV rating and the same on-state current rating. [3]
Which device has the smaller values of input capacitance and reverse transfer capacitance and why?
(b) An IGBT module complete with its own drive circuit has the following specifications: [8]
VDSM = 800 V; IDM = 150 A; dvDS /dt < 800 V/µs;
PDiss < 250 W tri + tf v = 300 ns; tf i + trv = 750 ns
The module is to be used in a step--down converter with a diode--clamped inductive load. The
diode is ideal, the dc supply voltage is 700 V, the load current is 100 A, and the switching frequency
is 25 kHz with a 50% duty cycle. Determine if the module is overstressed.
(c) In an IGBT a major portion of the collector current flow through the driver MOSFET section which [3]
has a voltage rating almost same as the device. Then how does the on state voltage drop of an
IGBT remain low compared to an equivalent MOSFET?
(d) Show why in a high voltage MOSFET switching circuit the voltage rise and fall time is always [4]
greater than current fall and rise times.
(e) How do you expect the gate source capacitance of a power MOSFET to vary with gate source [4]
voltage. Explain your answer.
Total for Q.9: 22 marks

Question 10

(a) The MOSFET-driven step-down converter circuit shown in Fig. 3 produces the turn-on waveforms
which are shown with the circuit diagram.

+ D I o = 100 A
f

Vd = 125 V
D = ideal diode
f
+ 10 !
- -

15 V
10 V
5V
V 0V
GS
-5 V t
-10 V 21ns
-15 V

33ns
I 100 A
D 250ns

t
125 V

V 3V
DS

0V
t

Figure 3: Partial converter circuit showing the MOSFET and switching waveforms.

i. What is the threshold voltage VGSth of the MOSFET? [2]

ii. What is the MOSFET transconductance gm ? [3]
iii. What is the on-state resistance rDS(on) ? [2]

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 iv. What is the gate-drain capacitance Cgd1 ? [4]
v. What is the gate-source capacitance Cgs ? [3]
Total for Q.10: 14 marks

Question 11

(a) You are designing a system which uses an IGBT to switch a resistive load of 5 Ω from a DC supply
of VDC = 350 V as shown in Figure 4.

VDC

+VCC

RLOAD = 5 Ω

Q1
RB RG
Vgg IGBT

Q2

−VCC

Figure 4: IGBT circuit with base drive and load.

The ON state gate voltage is vgE = 15 V. For the IGBT, vgE (th) = 4 V and gts = 25.
i. Find out the maximum current flowing through the IGBT in the event of a short circuit fault [2]
across the load.
ii. Also find out the power dissipation inside the device in the event of a short circuit fault across [2]
the load.
iii. How can we protect the IGBT from this type of fault. [1]
(b) Show why in a high voltage MOSFET switching circuit the voltage rise and fall time is always [4]
greater than current fall and rise times.
Total for Q.11: 9 marks

Question 12

(a) In the step-down converter circuit shown below, Vd = 250V and Io = 50A.

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 Figure 5: A section of a step-down converter circuit

The MOSFET parameters are: BVDSS = 400V , ID,max = 80A, VGS,th = 5V , rDS(on) = 0.05 Ω ,
Tj,max = 175 ◦C, Rθj−a = 0.5 ◦C/W, td(on) = td(on) = 10 ns, tri = tf i = 25 ns, trv = tf v = 175 ns
i. What is the power dissipation in the MOSFET assuming a switching frequency fs = 10 kHz [4]
and a duty cycle D = 50%?
ii. The duty cycle D will vary from 20% to 90%. What is the maximum permissible switching [6]
frequency fs ? Assume that the period 1/fs is large compared to the switching times of the
MOSFET. The maximum allowable power dissipation in the MOSFET is 300 watts.
Total for Q.12: 10 marks

Question 13

(a) Draw the equivalent circuit of an IGBT showing the parasitic thyristor and explain how it affects [5]
the use of an IGBT during design.
(b) In an IGBT a major portion of the collector current flow through the driver MOSFET section which [5]
has a voltage rating almost same as the device. Then how does the on state voltage drop of an
IGBT remain low compared to an equivalent MOSFET?
Total for Q.13: 10 marks

Question 14

The step--down converter circuit shown below is switched at a 25 kHz rate.

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 Figure 6: Step--down converter circuit

100 watts of power are dissipated in the MOSFET including switching losses. The MOSFET parameters
are listed below. The drain current and drain--source voltage vary linearly in time during the switching
transient. The rest of the circuit components are ideal.

BVDSS = 250V Vt = 3V ID,max = 130A

tri = tf v = 110 ns trv = tf i = 200 ns td,on = 100 ns
td,of f = 100 ns PD,max = 50 W

(a) In what way or ways is the MOSFET possibly being overstressed in this application. Justify your [4]
answer quantitatively.
(b) Specify the type or types of snubber circuits needed in this circuit for reducing the stresses on the [4]
transistor to a safe level. The number of snubber circuits used should be minimized. Justify your
choices.
(c) Assume that the circuit of the previous requires a turn--off snubber.
i. Determine the values of Rs and Cs used in the snubber circuit. [4]
ii. How much power is dissipated in the snubber resistance Rs ? [4]
iii. Estimate the reduction in the transistor turn--off losses afforded by the turn--off snubber. [6]
Total for Q.14: 22 marks

Question 15

(a) When designing with thyristors, explain the effect of increasing the magnitude of the gate current
and junction temperature on :
i. forward and reverse break down voltages, and [3]
ii. forward and reverse leakage currents. [2]
(b) You are designing the gate drive circuit of the thyristor. You are triggering the thyristor Ty using
the pulse transformer shown in Figure 7.

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 15V

T1 Ty
R
N1 : N2 i
+ vR −

Figure 7: Thyristor drive circuit.

The pulse transformer T1 operates at 10 kHz with a duty cycle of 40%. The thyristor has maximum
average gate power dissipation limit of 0.5 W and a maximum allow able gate voltage limit of 10 V.
i. Why did you decide to use the transformer? [2]
ii. Assuming an ideal pulse transformer, find out the turns ratio N1/N2 and the value of R. [5]
Total for Q.15: 12 marks

Question 16

(a) A thyristor used to control the voltage applied to a load resistance from a 220 V, 50 Hz single phase [3]
ac supply has a maximum dIA /dt rating of 50 A/µs. Find out the value of the dIA /dt limiting
inductor to be connected in series with the load resistance.
(b) i. What are the constructional features of a GTO that bestows it with a gate turn off capability? [3]
ii. How do they affect the turn on performance of the GTO? [2]
Total for Q.16: 8 marks

Question 17

(a) Your switched power supply uses a MOSFET that has the following parameters: [5]

VGS (th) = 3V, gfs = 3, CGS = 800PF, CGD = 250PF. The MOSFET is used to switch an in-
ductive load of 15 Amps from 150V supply. The switching frequency is 50 kHz. The gate drive
circuit has a driving voltage of 15V and output resistance of 50 Ω. Find out the switching loss in
the MOSFET.
(b) Another Power MOSFET in your design has the following data CGS = 800pF ; CGD = 150pF ; [5]
gf = 4; vGS (th) = 3V ;

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 VD

DF IO
if
+
iD
CGD VDS

Rg
ig -
Vgg +-
CGS

•
Figure 8: Power MOSFET : Clamped inductive switching circuit using a MOSFET.
•
•
It is used to switch a clamped inductive load of 20 Amps with a supply voltage VD = 200V.
τ  The
gate drive voltage is vgg = 15V, and gate resistance Rg = 50 Ω. Find out maximum  dt  and  dvDS
 did   
dt 
value of• and during turn ON.
• Total for Q.17: 10 marks
•
Question 18

In the gate drive circuit of an IGBT shown in Figure 9.

RC +Vcc
+Vgg

Ri
Q1
- RB R G IGBT
Vi
+ Q2
(Logic level)
E
Opto isolator
Level Totem pole
Shifting -Vgg -Vcc gate drive
amplifier
Comparator
(a)
Figure 9: IGBT drive circuit.
β β
The following data is available from the components datasheets Vgg = 15 V, Vcc = 20 V, β1 for Q1 = 50,
β2 for Q2 = 50. RB = 2.2 kΩ, RG = 30 Ω, VgE (th) of IGBT = 4V, gfs = 40 CgE = 4 nF, CgD = 500 pF,
The IGBT is used to switch a clamped inductive load of 50 Amps from a 400 volts supply.
i. Find out maximum values of |diC /dt| and dvCE /dt during Turn on and Turn off of the IGBT. [8]
ii. How can you protect the IGBT from overshooting the maximum values of |diC /dt| and dvCE /dt [3]
during Turn on and Turn off.
Total for Q.18: 11 marks

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Question 19

Select any IGBT that can handle a current between 200 A to 1000 A, connect a 30 Ω load to it and then
design an optically isolated drive circuit for it. You are required to submit your full design, schematics,
datasheets, LT spice files and associated calculations. Total for Q.19: 20 marks

Question 20

(a) With reference to power BJTs, explain the importance of the following manufacturer’s specifications
(Hint: draw a typical plots)
i. FBSOA, [2]
ii. β vs Ic characteristics, [4]
iii. iB vs VBE characteristics [4]
Total for Q.20: 10 marks

End of Exam
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