2016 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)

Development of a Digital Phase Angle Meter

Saikat Dey1, Subham Agarwala2
Dept. of Electrical Engineering,
Indian Institute of Engineering Science and Technology, Shibpur,
Howrah- 711103, W.B., India
E-mail: 1saikat_ee19@students.iiests.ac.in, 2subhamiiest@gmail.com

Abstract—This paper presents a simple yet effective method

to determine the phase angle difference across any load
connected to the supply. The proposed idea works on
conditioning of the current and voltage signals in and across the
load line and displays the phase difference through a Digital
Panel Meter. It can indicate leading or lagging phase through a
lead-lag indicator circuit. The authors simulated the whole
electronic circuit in Proteus circuit simulation tool. The novelty
of the project lies in the simplicity of the technique to determine
the phase angle difference and the cost-effective implementation
of the electronic circuit.
Fig. 2. Basic idea to determine Phase Angle.
Keywords—Phase Angle Measurement; Phase Detection; Lead-
Lag Indication; Low pass filter.

I. INTRODUCTION
We are to measure the phase angle between two sine
waves. A sinusoidal voltage wave can be expressed as:
V = Vmaxsin ωt; where, Vmax = peak voltage in volts, ω=
angular frequency in rad/sec (ω=2πf, f=50Hz). We consider
another sinusoidal voltage wave, which is expressed as:
I=Imax (sin ωt+ Ø); where Imax = peak current in amperes.
ω = angular frequency in rad/sec (ω=2πf, f=50Hz). The angle
Ø is actually our phase angle difference between the two
waves.
Fig. 1. Voltage and Current waveform and Phase Angle (ø) between them.
There are few techniques available to determine the phase
angle of a load line [6]. The most popular one is by using a
microcontroller [2] [7], but here the authors have made it by
the use of operational amplifiers and a XOR gate. Kok, Tan
and Sulaiman developed an Op-amp based DPM in 2007 [1].
The presented idea is a different as well as efficient process to
reach the same goal. The basic idea is well demonstrated in
Fig. 1. To determine if the phase is leading or lagging, a +ve
edge triggered D Flip-Flop is used. This is demonstrated in Fig.
2. In Fig. 3, the basic idea of the lead-lag indicator circuit is
shown.
Fig. 3. Proposed Lead-Lag Detection algorithm.
As we shall see the input is given from a 230 V, AC power
supply. Then it is followed by the sampling of voltage and
current waveforms. The sampled outputs from the previous
two stages are then fed into an Exclusive OR GATE. This
gives us a pulsed dc output. This pulsating dc is then fed into a
Low Pass 2nd Order Butterworth filter. The Butterworth filter
gives an average value of the dc signal which was fed to it.
This average value is proportional to the phase angle to be
measured. The proportionality constant is determined by the
rheostat in the Display Panel Meter. The authors have used a
D- Flip-Flop to determine whether the input current is leading
or lagging the input voltage.
To demonstrate the functionality of the circuit so developed,
the authors have simulated the entire circuit in the Proteus
Simulation Software platform. For the ease of understanding
the simulation is discussed by dividing them into three distinct
parts. The screenshots of the outputs so received, are attached
for the proper understanding of the reader.
In the following sections, the authors shall discuss in elaborate
all that the reader has already been introduced to.

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 2016 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)

II. DEVELOPMENT OF DIGITAL PHASE ANGLE METER

Fig. 4. Overview of the complete Digital Phase Angle Meter Circuit.

A. DC Power Supply
Fig. 5. is a circuit for ±15 Volt DC Regulated Dual Power
Supply. The output of the circuit is +15 volt and -15 volt DC.
The 220V to 18-0-18V Center Tap Transformer is used to
stepdown the mains voltage. The diodes D1 to D4 form a Full
Wave Bridge Rectifier. The 1000μF capacitors are used to
filter the voltage coming from the diodes. The other capacitors,
used in the circuit are used for decoupling. The LM7815 &
LM7915 are voltage regulator ICs which step down the input
voltage to regulated Dual 15 Volt DC. This power supply is
used to power the electronic components of the circuit. Fig. 5. ±15 volts DC Regulated Power Supply.

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 2016 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)
B. Current Signal Conditioning Circuit
This part is used to sample the current flowing in the test
circuit.
Fig. 6. Current signal conditioning circuit.
1) Step 1: First the signal is passed through the diodes
(1N4007), to convert the current signal into a voltage
waveform, and then through the op-amp (lm741), to make it
an inverted square wave , saturated within +15V and -15V.
2) Step 2: A clipper circuit is used to clip the positive part
of the waveform. However, because of the clipping diode,
+0.7V is left unclipped.
3) Step 3: An optocoupler is then used which not only
clips the +0.7V part but also inverts the waveform making it a
square wave consisting of only the +ve part.
This converts the current signal into a dc pulsed waveform of
+15V amplitude. Now the circuit acts like a positive zero
crossing detector.
C. Voltage Signal Conditioning Circuit
This part is used to condition the voltage signal across the
load.
Fig. 7. Voltage signal conditioning circuit.
1) Step 1: The voltage signal is fed into the primary of a
230V/6-0-6V step down transformer. This reduces the
amplitude of the voltage waveform.
2) Step 2: Then the stepped down voltage signal is fed to
the non-inverting Op-amp to make it a non-inverted square
waveform, saturated within +15V and -15V.
3) Step 3: Then a clipper circuit consisting of diode
1N4148 is used to clip the negative part of the waveform.
This converts the voltage signal into a dc pulsed waveform of
+15V amplitude. Now the circuit acts like a positive zero
crossing detector.
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D. The XOR Operation
Fig. 8. XOR gate and its Truth Table.
In this part the outputs from the two previous stages are fed to
a XOR GATE. The XOR gate (sometimes EOR gate,
or EXOR gate, stands for the name Exclusive OR gate) is a
digital logic gate that implements an exclusive or operation,
that is, a true output (1/HIGH) results if one, and only one, of
the inputs to the gate is true. If both inputs are false (0/LOW)
and both are true, a false output results. XOR represents the
inequality function, i.e., the output is true if the inputs are not
alike otherwise the output is false. The conditioned voltage
and current signals (outputs of two ZCDs) are fed to the XOR
gate. Thus we will get such an output which will remain high
for a time which is equivalent to the phase difference between
the two waves [3].
E. Low pass 2nd Order Butterworth Filter
A low pass filter, with a very low cut off frequency, is being
used to generate the average DC value of the pulsed dc
waveform, received at the output end of the XOR gate.
The basic configuration for a Sallen-Key second order (two-
pole) low pass filter is given:
Fig. 9. General configuration of the low-pass filter.
This second order low pass filter circuit has two RC
networks, R1–C1 and R2–C2 which give the filter its
frequency response properties. The filter design is based
around a non-inverting op-amp configuration so the filter’s
gain, A, will always be greater than 1. The values of the
resistors and capacitors determine the cut-off frequency of the
low pass filter.
Here, R1 = R2 = 10kΩ; C1 = C2 = 47μF.
Cut off Frequency, fc = 1/[2π× (10×103) × (47×10-6)] Hz
= 0.33 Hz.
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F. Display Panel Meter
A 31/2 bit Display Panel Meter is used for the viewing purpose
[5]. The calibration of the panel is done with the help of the
zero adjuster and the full-scale adjuster of the DPM. 0º is set to
be the minimum displayed value and 180º is set as the full-
scale reading. The average dc output from the low pass filter is
fed into the DPM and we the desired phase angle is displayed.
G. Lead-Lag Detection
The D flip-flop is used to detect the input sequence [4]. The
sinusoidal input signals whose phase difference has to be
measured are converted into square wave using zero crossing
detectors. One of these square waves thus obtained is applied
to the D input lead of the D Flip-Flop, while the other one is
input as the CLOCK of the +ve edge triggered D flip-flop. The
circuit operation is as follows:
1) Q will go HIGH only if D input leads CLK input. This is
because D input must be HIGH in order for Q to go HIGH on
the +ve Edge of CLK input.
2) Q-Bar will go HIGH when CLK input leads D input.
This is because D input will be LOW by the time the +ve edge
of CLK input arrives.
Fig. 10. Lead-Lag Indicator Circuit using D Flip-Flop.
Fig. 11. Q remains high as D is high when Clock pulse hits its +ve edge.
Fig. 12. Q remains low as D is low when Clock pulse hits its +ve edge.
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III. SIMULATION RESULTS
The proposed Digital Phase Angle Meter is tested using
Proteus Design Suite in which the simulations have been
divided into 3 study cases, i.e.: (1) waveforms at different parts
of Current signal conditioning circuit, (2) waveforms at
different points of Voltage signal conditioning circuit, (3)
Output waveform of XOR gate and low pass filter.
A. Study Case (1)
The current conditioning circuit should produce a square wave
of approx. 15 volt amplitude with no negative portion in the
waveform. Waveforms are noticed at 4 points of the circuit
which are shown in yellow, blue, pink and green color
respectively (Fig. 13.).
x Yellow: Waveform across the diodes.
x Blue: Output waveform of Op-Amp (ZCD 1) which
is saturated between +15 to -15 volts.
x Pink: Waveform after passing through the Clipper
circuit with the negative part clipped off.
x Green: Output waveform of the opto-coupler where
the remaining -0.7 volt is clipped off.
Fig. 13. Waveforms for study case (1), obtained from simulation in Proteus.
B. Study Case (2)
The voltage conditioning circuit should produce a square wave
of approx. 15 volt amplitude with no negative portion in the
waveform. Waveforms are noticed at 4 points of the circuit
which are shown in yellow, blue, pink and green color
respectively (Fig. 14.).
x Yellow: Output waveform of the 230 V/ 6-0-6 V step
down transformer.
x Blue: Output waveform of Op-Amp (ZCD 2) which
is saturated between +15 to -15 volts.
x Pink: Waveform after passing through the Clipper
circuit with the negative part clipped off.
x Green: Output waveform of the opto-coupler where
the remaining -0.7 volt is clipped off.
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 2016 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)
Fig. 14. Waveforms for study case (2), obtained from simulation in Proteus.
C. Study Case (3)
The XOR circuit must give a pulsating dc output, whose high
time is proportional to the phase difference between the
voltage and current waveform. The low pass filter gives the
average value of the above mentioned pulsating wave as the
output. Waveforms are noticed at 4 points of the circuit which
are shown in yellow, blue, pink and green color respectively.
x Yellow: Square output waveform from the voltage
conditioning circuit
x Blue: Square output waveform from the current
conditioning circuit.
x Pink: Pulsating DC Output from the XOR gate.
x Green: Constant DC output from the 2nd order low
pass Butterworth Filter.
Fig. 15. Waveforms for study case (3), obtained from simulation in Proteus.
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Given below are the screenshots of the circuit simulated in the
Porteus Simulation software. Here the authors aim to
demonstrate the lead/lag detection capability of the test circuit.
A RC load, which is inherently leading in nature, is initially
taken as the test load. In the Fig. 15, we see that the RED LED
lights up, indicating the presence of a leading load as the Q
output of the flip-flop is high.
Fig. 16. Here the Red LED has lit up as the load is capacitive (Q=1).
Then a RL load, which is inherently lagging in nature, is taken
as the test load. In the Fig. 16, we see that the GREEN LED
lights up, indicating the presence of a lagging load as the Q
output of the flip-flop is low. Thus it can be seen that the
circuit is capable of performing lead/lag identification.
Fig. 17. Here the Green LED has lit up as the load is inductive (Q=0).
IV. CONCLUSIONS
A circuit for the measurement of the phase angle between
two sinusoidal waves has been presented. The circuit is also
capable of detecting the lead or lagging nature of the load. The
test circuit is simple, cost effective and can be easily made.
These qualities increase the scope of application of the circuit
in various fields.
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ACKNOWLEDGMENT
The authors wish to thank Dr. Suvarun Dalapati for his
guidance and support received in implementing the algorithm
of Phase Angle measurement. The authors also acknowledge
the support received from the research scholars, allowing the
authors to test the electronic circuit at Power Electronics
Laboratory, Dept. of EE, IIEST, Shibpur.
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Measurement using PIC Microcontroller with Higher Accuracy,”
International Journal of Emerging Technology and Advanced
Engineering, Volume 4, Special Issue 7, April 2014.
978-1-5090-5240-0/16/$31.00 ©2016 IEEE
[3] I. Adam, A. Mohamed, and H. Sanusi, . “Simple Phase Angle
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