IVIPMC QUIZ

sEM ELECTRICAL ENGG

NAME

SEC : 01/A2/111/87
REG.NO :
MODULE -1

1. Number of PIN, in 8085 I, a) 40 b) 60 C) 56

2. Width of Data bus In 8085 Is a)16bIt b)20bit c)8bit

3. RD/WR pins in 8085 are a) data bus pin b)address bus pin,c)control bus pin
4. SP in 8085 stands for a) serial port 104tach pointer c) set parity
S. TRAP interrupt In 8085 has a) lowest priority b)hIghest priority c) 3 . priority
6. Peripherals in 8085 can be written or read using a)1N/OUT b)MOV c)both
7. Program Status Register (PSW) Is same as FLAG register . a) FALSE(BUE
8. In 8085, B,C,D,E,H & L registers are a) special purpose*general purpose .
9. Total memory In 80851s a) 120611 b) 1 M113)84611.
10. Minimum Instruction word size Is 41 byte b)2 bytes c)3 bytes.
11. Maximum Instruction word size Is a) 1 byte b)2 bytes5)3 bytes.
12. Instruction cycle in 8085 is sum of Fetch Cycle f Execution CycleATRUE b)FALSE
13. NOP is one byte instruction in 8085 .TRUE b)FALSE
14. LXI H, 2400H --- is a) 1 byte instruction 5-3byte instruction c) S byte instruction
15. In 8085 , instructions are classified into 3).3groups b) 10 groups c) 7 groups
16. In 8085 , 1MP addr instruction belongs to a) data transfer group_bkontrol group
17. Maximum I/O address in 8085 is a) 10 b) 1205)255 .
18. In R5T1 instruction in 8085, value of n a) 0-12 b)0.-43)0-7 .
19. STC instruction In 8085 stands foraiset carry status b) clear carry c)none .
20. MVI A, 36H . Executing this instruction , value of A will be3..)-36H b)none .
21. After executing DI instruction in 8085 , interrupts are a) ENABLEDND1SABLED c) no
action-
22. Counter can be implemented using a) increment a register b) decrement a register

ciboth

23. CNZ addr . In this instruction procedure is called if ZERO flagis .310 b) 1 6) none
24. In 8085 , memory pointe r is used buTH,L b) D,E c ) none
25. Compare instruction aftects,WERO flag b) All flags c) none .

MODULE

1. ROM means read only memory TRUE b)FALSE

2. RAM means random access memory,311 -RUE b) FALSE
3. ADC means analog to digital conversion ./)TRUE b) FALSE
4. DAC means dig ital to analo g co nversio n . . , a) TRUE b) FALSE S. Address
decoder is used to interface RAM & ROM with processor,QTRUE b)FALSE
6. Memo ry size o f 2716 a) 4KB . b)2KB ) no ne
7. Memory size of 2764318196 bytes b) 10000 bytes c) 2KB
8. Memory size of 6116 a) 2KB b) 4KBA 8kB
9. Memory size o f 6264 a) 2KB5 8KB c) 16 KB
10. 8255 is programmable peripheral Interface has 413bIt ports b)16bit ports c) 32 bit pots
11. How many ports 8255 has a) 294c) 5
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Mode of operations of 8255 a) 5 modes b) 4 modes c) 3 modes
12.
13.Chip number of DMA controller is a)8255 b)8257 c)None

18. 6116 & 6264 are static RAM a)TRUE b) FALSE

19. Chip number OROS is aa) DAC b) ADC c) both

20. Chip number 0800Is a) ADCb)DAC c) none
21. Squa re wave can be generated using a) Decoder cj tounter c) multiplexer b) FALSE
22. 8259 in ter r u pt co ntr o ller can be cas caded t o g ive mor e tha n 8 In ter r up tsa,) , T R U E
23. S ample and hold cir cuit Is used In a) A DC0808 b) 8259 c) 8251
24. Only Read signal Is issued to ROM . a) TRUE b) FALSE c)none
25. Bo th Re ad a nd w r i te s ig nal ar e Iss ued t o RAM. )T R UE b) FA LS E c)no ne

MODU LE
1. How many address and data bits ar e r nultiplexect#16 bit b) 20 bit c) 32 bit
2. M IN /M AX pi n of 8 08 6 is u se d fo ul Ys t an d al one b) mu l ti p r oc ess in g c) bo th .
3. C lo ck s pee d o f 80 86 is aj 10 M Hz b ) 12 0M Hz c ) 64 M Hz.
4. NM I in 808 6 s tands f or n on mas k a ble in ter r u pt .3 } T R UE b)FA LS E
5. S i b of me mor y o f 80 86 i s a )6 41 01 h )1 .1 1 c) 4 0 K B.
6. R eg is ter s A , B,C , D ar e ) Ge ner a l p ur p ose r e gi st er s b ) spe ci al p ur pose r e g is ter
7. A L U o f 80 86 is a ) 32 bi t b )2 0b i t c) I6b it
8. MOV AX , 0 301 H - is a ) imme dia te ad dr essi ng §)t egis ter a ddr essi ng c) non e
I/O9. pr ogr ammi ng in 808 6 a) memor y mappe d b) I/O ma pper : 19 .0 th
1 0. IR ET i ns tr uc t io n o f 80 86 Is mea n t f or a) ge ner al p ur pos e f un ct io nj * IS R
1 1. M a t h c o- pr o ce ss or 80 8 7 c an be u se d w i t h 8 08 6 J. }T R U E b) FA LS E
1 2. E x amp le o f s tr i ng pr o cess i ng a va ila bl e in 8 08 6a ) N IOVS ,M OVS B , CM PS b) R EP , R E PE
1 3. In assemb ly lan gua ge pr ogr ammi ng of 808 6 DW is use d f or a). Defi ne w or d b ) Def ine 4
byte c)bo th.

1 4. P r oc e d ur e i n as se mb l y la n g ua ge pr o gr amm i n g c an be a) F AR b ) N E A R c )b o t h - -
1 5. 8 25 5 ca n be i n ter fa ced to 8 08 6 . a)T R U E b )FA LS E
1 6. In mul tiple fi les of assembly pr ogr amming of 8086 PU BL IC ,EX T ERN & GLO BAL ar e used
) ) T R U E b ) FA L S E
1 7. C S : D I i s c o d e p 0 ) 0 8 8 7 0 ) 8 0 0 6 . a ) F A L S E M T R U E
1 8. S t a tus / Ha g r e gis te r is a) 8 bi t b )1 6b i t c) 2 0b i t
1 9. S ta t u s / F la g r e gi s te r h as a) 9 f i el d bi t b ) 1 2 f i el d bi t c ) 4 fi e ld b i ts
2 0. 8 0 8 6 h as h ow ma n y s o f tw ar e i n te r r u p t p o i n ter s a ) 1 0 24 p )256
2 1. HO W s i g n a l i s n o t us e d t o c o n t r o l b us s i g n a l i n 8 0 8 6 . a )T R U E N F A LS E

2 2. CX register in 8086 is used as counter ,a1TRUE b)FALSE

2 3. 8086 can be interfaced to 8255 ,)?RUE b)FALSE
2 4. 8086 can be i nter faced t o 82 51, 14T RU E b) FA LS E
2 5. R ES ET p i n o f 8 0 86 is ac t i v e o n LO W a) T R U E j )* A LS E
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MODULE — IV

1. No of pins of 8051 is a) 60)40 c) none

2. Data bus width of 8051 lut) 8blt b) 16bIt c)10bit
3. 8051 Is a) RISC N cisc
4. Internal ROM of 80511s,a)4KB b) 808 c) 6KB
5. Internal RAM of 8051 Is a) 256 KB b)-128 bytes c) None
6. Serial communication facility is available In 8051 j)-TRUE b) FALSE
7. How many 8bit parallel ports are available in 80513)4 b) 3 of 2
8. Number of interrupts In 8051,3)5 b) 6 c) 7
9. Number of register banks In 8081 a) 3 b) 2 c)-4
10. Address but width of 8051 Is a) 8bit b1,1Erblt c) 20bit
11. Bit programming Is available in 8051,0 ,TRUE b) FALSE .
12. No of TIMERS in 8051 is a) 3y2 c) 1
13. 8051 operates at a) 6MHz b) 8MHz9,12MHz
14. On RESET in 8051 DPTR value is set to,0000H b)FFFFH
15. ALE In 8051 is LOW , provides 8bit Data DO to D7,30RuE b)FALSE
16. Total data memory in 8051 is , )64KB b) 128KB c) 256KB
17. Total program memory in 8051 is a) 64KB ,10.128KB c) 256KB
18. P S W o f 8 0 5 1 is a ) 8 b it b ) 1 6 b it 5 ) n o n e
19. R e g ist e r ba n k se le c t io n is d o ne us in g P SW in 8 0 51 . U E b) F A LS E
20. A D D in s t r u ct io n in 8 0 5 1 af fe c ts c a r ry f la g 3 ) -T R U E b ) FA L S E
21. Number of address ing modes in 80 51 is a) 5 b) 7 c ne
22. D P T R i n 8 0 5 1 i s a a ) m e m o r y p o i n t e r b i r r a t a p o i n t e r
23. 8051 has emory mapped I/O b) I/O mapped I/O
24. PUSH & POP inst ru ct io ns a re av a ila b le in 805 1 0 1 -T RU E b )FA L SE.
25. 8 0 5 1 in s t r u c t io n h as o p c od e h av in g s iz e, ) 8 b it b) 1 6b it
c ) 1 0 b it .