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NHD‐C12864GG‐RN‐GBW
COG (Chip‐On‐Glass) Liquid Crystal Display Module
NHD‐ Newhaven Display
C12864‐ 128 x 64 dots
GG‐ Model
R‐ Reflective
N‐ No backlight
G‐ STN‐ Gray
B‐ 6:00 view
W‐ Wide Temp (‐20°C ~ +70°C)
RoHS Compliant
Newhaven Display International, Inc.
2511 Technology Drive, Suite 101
Elgin IL, 60124
Ph: 847‐844‐8795 Fax: 847‐844‐8796
www.newhavendisplay.com
nhtech@newhavendisplay.com nhsales@newhavendisplay.com
Document Revision History
Revision Date Description Changed by
0 3/25/2008 Initial Release ‐
1 9/10/2009 User guide reformat BE
2 10/8/2009 Update pin description BE
3 10/13/2009 Updated Electrical Characteristic MC
Functions and Features
• 128 x 64 pixels
• Built‐in ST7565R (or equivalent) controller
• 1/65 duty, 1/9 bias
• 8080 MPU interfaces
• RoHS Compliant
Mechanical Drawing
Pin Description and Wiring Diagram
Pin No. Symbol External Function Description
Connection
1 ESD‐GND ‐
2 /CS1 MPU Active low chip select
3 /RES MPU Active low Reset signal
4 A0 MPU Register Select. 0: instruction; 1: data register
5 /WR MPU Active low Write signal
6 /RD MPU Active low Read signal
7‐14 D0‐D7 MPU This is an 8‐bit‐directional data bus
15 VDD Power Supply Power supply for logic (3.0V)
16 VSS Power Supply Ground
17 VOUT Power Supply 1.0uF‐2.2uF cap to VSS
18 C3+ Power Supply 1.0uF‐2.2uF cap to C1‐ (Pin‐19)
19 C1‐ Power Supply 1.0uF‐2.2uF cap to C3+ (Pin‐18) and C1+ (Pin‐20)
20 C1+ Power Supply 1.0uF‐2.2uF cap to C1‐ (Pin‐19)
21 C2+ Power Supply 1.0uF‐2.2uF cap to C2‐ (Pin‐22)
22 C2‐ Power Supply 1.0uF‐2.2uF cap to C2+(Pin‐21) and C4+ (Pin‐23)
23 C4+ Power Supply 1.0uF‐2.2uF cap to C2‐ (Pin‐22)
24 V4 Power Supply 0.1uF‐1.0uF cap to VSS
25 V3 Power Supply 0.1uF‐1.0uF cap to VSS
26 V2 Power Supply 0.1uF‐1.0uF cap to VSS
27 V1 Power Supply 0.1uF‐1.0uF cap to VSS
28 V0 Power Supply 0.1uF‐1.0uF cap to VSS
29 ESD‐GND ‐
30 NC ‐ No Connect
Recommended LCD connector: 0.5mm pitch, 30 conductor FFC. Molex p/n: 52892‐3095
Backlight connector: ‐‐‐ Mates with: ‐‐‐
Electrical Characteristics
Item Symbol Condition Min. Typ. Max. Unit
Operating Temperature Range Top Absolute Max ‐20 ‐ +70 ⁰C
Storage Temperature Range Tst Absolute Max ‐30 ‐ +80 ⁰C
Supply Voltage VDD ‐ 3.0 3.3 V
Supply Current IDD Ta=25Ԩ, ‐ 0.5 ‐ mA
VDD=3.0V
Supply for LCD (contrast) VDD‐V0 Ta =25℃ ‐ 8.9 ‐ V
“H” Level input Vih 0.8VDD ‐ VDD V
“L” Level input Vil Vss ‐ 0.2VDD V
“H” Level output Voh ‐ V
“L” Level output Vol Vss ‐ 0.2VDD V
Optical Characteristics
Item Symbol Condition Min. Typ. Max. Unit
Viewing Angle ‐ Vertical θ2‐ θ 1 CR=0 ‐45 ‐ +25 ⁰
Viewing Angle ‐ Horizontal Φ CR=2.0 ‐ ±30 ‐ ⁰
Contrast Ratio CR Φ=0, θ=25 3 4 ‐ ‐
Response Time (rise) Tr Φ=0, θ=25 ‐ 250 300 ms
Response Time (fall) Tf Φ=0, θ=25 ‐ 250 350 ms
Controller Information
Built‐in ST7565R. Download specification at http://www.newhavendisplay.com/app_notes/ST7565R.pdf
Table of Commands
Example Initialization Program
/************************************************************************/
void comm_out(unsigned int c)
{
CS1 = 0;
AO = 0; //Command LOW = instruction
delay(1);
WRT = 0;
P1 = c;
delay(1);
WRT = 0;
CS1 = 0;
delay(5);
}
/************************************************************************/
void data_out(unsigned int d)
{
CS1 = 0;
AO = 0; //Data High
delay(1);
WRT = 0;
P1 = d;
delay(1);
WRT = 0;
CS1 = 0;
}
/************************************************************************/
/*************** NHD‐C12864‐GG DISPLAY INITIATION *******************/
/************************************************************************/
void init()
{
RDD = 0;
WRT = 0;
CS1 = 0;
RST = 0;
RST = 0;
delay(2);
RST = 0;
delay(2);
comm_out(0xA2); //added 1/9 bias
comm_out(0xA0); //ADC segment driver direction (A0=Normal)
comm_out(0xC8); //added
delay(0);
comm_out(0xC0); //COM output scan direction (C0= Normal)
comm_out(0x40); //Operating Mode
comm_out(0x25); //resistor ratio
comm_out(0x81);
comm_out(0x15);
comm_out(0x2F);
comm_out(0xAF);
}
/************************************************************************/
Quality Information
Test Item Content of Test Test Condition Note
High Temperature storage Endurance test applying the high +80⁰C , 48hrs 2
storage temperature for a long time.
Low Temperature storage Endurance test applying the low storage ‐30⁰C , 48hrs 1,2
temperature for a long time.
High Temperature Endurance test applying the electric stress +70⁰C 48hrs 2
Operation (voltage & current) and the high thermal
stress for a long time.
Low Temperature Endurance test applying the electric stress ‐20⁰C , 48hrs 1,2
Operation (voltage & current) and the low thermal
stress for a long time.
High Temperature / Endurance test applying the electric stress +40⁰C , 90% RH , 48hrs 1,2
Humidity Operation (voltage & current) and the high thermal
with high humidity stress for a long time.
Thermal Shock resistance Endurance test applying the electric stress ‐0⁰C,30min ‐> 25⁰C,5min ‐>
(voltage & current) during a cycle of low 50⁰C,30min = 1 cycle
and high thermal stress. 10 cycles
Vibration test Endurance test applying vibration to 10‐55Hz , 15mm amplitude. 3
simulate transportation and use. 60 sec in each of 3 directions
X,Y,Z
For 15 minutes
Static electricity test Endurance test applying electric static VS=800V, RS=1.5kΩ, CS=100pF
discharge. One time
Note 1: No condensation to be observed.
Note 2: Conducted after 4 hours of storage at 25⁰C, 0%RH.
Note 3: Test performed on product itself, not inside a container.
Precautions for using LCDs/LCMs
See Precautions at www.newhavendisplay.com/specs/precautions.pdf
Warranty Information and Terms & Conditions
http://www.newhavendisplay.com/index.php?main_page=terms
ST
Sitronix 65 x 132 Dot Matrix LCD Controller/Driver
ST7565R
Features
Directly display RAM data through Display Data RAM. Independent input (VDD2) for boost reference voltage.
RAM capacity : 65 x 132 = 8580 bits High-accuracy Regulator circuit:
Display duty selectable by select pin Build-in Electronic volume function for the contrast
1/65 duty : 65 common x 132 segment control. Thermal gradient = –0.05%/°C.
1/49 duty : 49 common x 132 segment Embedded voltage Follower circuit for LCD driving.
1/33 duty : 33 common x 132 segment Embedded R-C oscillator circuit.
1/55 duty : 55 common x 132 segment The external clock is also supported.
1/53 duty : 53 common x 132 segment Extremely low power consumption: 60uA, bare dice
High-speed 8-bit MPU interface: (using the internal power). Settings:
ST7565R can be connected directly to both the 80x86 VDD – VSS = VDD2 – VSS =3.0 V, Booster Ratio=4,
series MPUs and the 6800 series MPUs. V0 – VSS = 11.0 V. Display OFF and the normal mode is
Serial interface (SPI-4) is also supported. selected.
Abundant command functions Logic power supply : VDD – VSS = 2.4V to 3.3 V
Display data Read/Write, display ON/OFF, Normal/ Analog Power (Boost reference voltage):
Reverse display mode, page address set, display start VDD2 – VSS = 2.4V to 3.3V
line set, column address set, status read, display all Booster maximum voltage limited
points ON/OFF, LCD bias set, electronic volume, VOUT= 13.5V
read/modify/write, segment driver direction selects, Liquid crystal drive power supply:
power saver, common output status select, V0 voltage V0 – VSS = 3.0V to 12.0 V
regulation internal resistor ratio set. Wide range of operating temperatures: –30 to 85°C
Embedded analog power supply circuits for Liquid Package type: COG only.
Crystal driving: Booster, Regulator and Follower. The chip is not designed to resist the light or to resist
Embedded Booster circuit: the radiation.
2X,3X,4X,5X and 6X boost ratios are supported. Support LCD Module Size up to 2"
General Description
The ST7565R is a single-chip dot matrix LCD driver that can 132 segment output circuits, so that a single chip can drive a
be connected directly to a microprocessor bus. 8-bit parallel 65x132 dot display (capable of displaying 8 columns x4 rows
or 4-line SPI display data sent from the microprocessor is of a 16x16 dot kanji font).
stored in the internal display data RAM and the chip The chips are able to minimize power consumption because
generates a LCD drive signal independent of the no external operating clock is necessary for the display data
microprocessor. Because the chips in the ST7565R contain RAM read/write operation. Furthermore, because each chip
65x132 bits of display data RAM and there is a 1-to-1 is equipped internally with a low-power LCD driver power
correspondence between the LCD panel pixels and the supply, resistors for LCD driver power voltage adjustment
internal RAM bits, these chips enable displays with a high and a display clock CR oscillator circuit, the ST7565R can be
degree of freedom. used to create the lowest power display system with the
The ST7565R chips contain 65 common output circuits and fewest components for high-performance portable devices.
SEG131
COM63
COMS
COM0
SEG0
VDD
V0
V1
COMS
V2 132 SEGMENT 64 COMMON
V3
V4 DRIVERS DRI VERS
VSS
V0 CL
I/O buffer
circuit
VR DOF
Voltage DISPLAY DATA RAM
VRS Regulator FR
circuit
IRS
65 X 132 = 8580 Bits
VOUT
CAP1N
Voltage Column address circuit
CAP1P
CAP2N booster
CAP2P circuit
Oscillator
CAP3N
circuit
CAP4P CLS
CAP5P Power Supply
Circuit
VDD2
Command
Status Bus holder
VSS decoder
A0
CS1
CS2
/RES
C86
P/S
D0
D1
D2
D3
D4
D5
D6(SCL)
D7(SI)
This is a multi-level power supply for the liquid crystal drive. The voltage Supply applied is
determined by the liquid crystal cell, and is changed through the use of a resistive voltage
divided or through changing the impedance using an op. amp. Voltage levels are
determined based on Vss, and must maintain the relative magnitudes shown below.
CS1B This is the chip select signal. When CS1B = “L” and CS2 = “H”, then the chip select
I becomes active, and data/command I/O is enabled.
2
CS2
• When connected to 8080 series MPU, this pin is treated as the “/RD” signal of the 8080
MPU and is LOW-active.
/RD The data bus is in an output status when this signal is “L”.
I • When connected to 6800 series MPU, this pin is treated as the “E” signal of the 6800
1
(E)
MPU and is HIGH-active.
This is the enable clock input terminal of the 6800 Series MPU.
• When connected to 8080 series MPU, this pin is treated as the “/WR” signal of the 8080
MPU and is LOW-active.
The signals on the data bus are latched at the rising edge of the /WR signal.
/WR
I • When connected to 6800 series MPU, this pin is treated as the “R/W” signal of the 6800 1
(R/W) MPU and decides the access type :
When R/W = “H”: Read.
When R/W = “L”: Write.
This is the MPU interface selection pin.
C86 I C86 = “H”: 6800 Series MPU interface. 1
C86 = “L”: 8080 Series MPU interface.
This pin configures the interface to be parallel mode or serial mode.
P/S = “H”: Parallel data input/output.
P/S = “L”: Serial data input.
The following applies depending on the P/S status:
These are the LCD segment drive outputs. Through a combination of the contents of the
display RAM and with the FR signal, a single level is selected from VSS, V3, V2, and V0.
Output Voltage
RAM DATA FR
Normal Display Reverse Display
SEG0
H H V0 V2
to O 132
SEG131 H L VSS V3
L H V2 V0
L L V3 Vss
Power save VSS
Through a combination of the contents of the scan data and with the FR signal, a single
level is selected from VSS, V4, V1, and V0.
Scan Data FR Output Voltage
COM0 H H VSS
to O H L V0 67
COMn
L H V1
L L V4
Power save VSS
These are the COM output terminals for the indicator. Both terminals output the same
COMS O signal. 2
Leave these open if they are not used.
Table 1
P/S /CS1 CS2 A0 /RD /WR C86 D7 D6 D5~D0
Table 2
C86 (P/S=H) /CS1 CS2 A0 E(/RD) R/W(/WR) D7~D0
Table 3
Shared 6800 Series 8080 Series
Function
A0 R/W /RD /WR
1 1 0 1 Reads the display data
0 1 0 1 Status read
CS1
CS2
SI D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2
SCL
1 2 3 4 5 6 7 8 9 10 11 12 13 14
A0
Figure 1
* When the chip is not active, the shift registers and the counter are reset to their initial states.
* Reading is not possible while in 4-line SPI interface mode.
* Caution is required on the SCL signal when it comes to line-end reflections and external noise. We recommend that operation
be rechecked on the actual equipment.
The Accessing the Display Data RAM and the Internal Registers
Data transfer at a higher speed is ensured since the MPU is the first data read cycle (dummy) stores the read data in the
required to satisfy the cycle time (tCYC) requirement alone in bus holder, and then the data is read from the bus holder to
accessing the ST7565R. Wait time may not be considered. the system bus at the next data read cycle.
And, in the ST7565R, each time data is sent from the MPU, a There is a certain restriction in the read sequence of the
type of pipeline process between LSIs is performed through display data RAM. Please be advised that data of the
the bus holder attached to the internal data bus. Internal specified address is not generated by the read instruction
data bus. issued immediately after the address setup. This data is
For example, when the MPU writes data to the display data generated in data read of the second time. Thus, a dummy
RAM, once the data is stored in the bus holder, then it is read is required whenever the address setup
written to the display data RAM before the next data write or write cycle operation is conducted.
cycle. Moreover, when the MPU reads the display data RAM, This relationship is shown in Figure 2.
WR
MPU
BUS
N N+1 N+2 N+3
Holder
Write
Signal
Reading
WR
MPU
RD
DATA N N n n+1
Address
Preset
Internal Timing
Read
Signal
Column
Address Preset N Increment N+1 N+2
D0 0 1 1 1 0 COM0
D1 1 0 0 0 0 COM1
D2 0 0 0 0 0 COM2
D3 0 1 1 1 0 COM3
D4 1 0 0 0 0 COM4
- -
Figure 3
The Page Address Circuit
Page address of the display data RAM is specified through Page address 8 (D3, D2, D1, D0 = 1, 0, 0, 0) is a special
the Page Address Set Command. The page address must RAM for icons, and only display data D0 is used.
be specified again when changing pages to perform access. (see Figure 4)
Table 4
SEG Output
ADC SEG0 SEG 131
(D0) “0” 0 (H) → Column Address → 83 (H)
(D0) “1” 83 (H) ← Column Address ← 0 (H)
The Line Address Circuit
The line address circuit, as shown in Table 4, specifies the for ST7565R, the detail is shown page.11 The display area
line address relating to the COM output when the contents of is a 65 line area for the ST7565R.
the display data RAM are displayed. Using the display start If the line addresses are changed dynamically using the
line address set command, what is normally the top line of display start line address set command, screen scrolling,
the display can be specified (this is the COM0 output when page swapping, etc. can be performed.
the common output mode is normal, and the COM63 output
D0 D0
7B
7E
7F
00
01
02
03
04
05
06
07
08
80
81
82
83
ADC
7B
7F
83
82
81
80
08
07
06
05
04
03
02
01
00
LCD
Figure 4
FR
V0
V1
COM0
V4
VSS
V0
V1
COM1
V4
Vss
RAM
Data
V0
V2
SEGn
V3
VSS
Figure 5
Table 6
COM Scan Direction
Status
1/65 DUTY 1/49 DUTY 1/33 DUTY 1/55 DUTY 1/53 DUTY
Normal COM0 → COM63 COM0 → COM47 COM0 → COM31 COM0 → COM53 COM0 → COM51
Reverse COM63 → COM0 COM47 → COM0 COM31 → COM0 COM53 → COM0 COM51 → COM0
VDD
COM0 M VSS
COM1 V0
V1
COM2 V2
COM0 V3
COM3 V4
VSS
COM4
V0
COM5 V1
V2
COM6 COM1 V3
V4
COM7 VSS
V0
COM8 V1
V2
COM9 COM2 V3
V4
COM10 VSS
COM11 V0
V1
COM12 V2
SEG0 V3
COM13 V4
VSS
COM14
V0
COM15 V1
V2
SEG1 V3
SEG 0 1 2 3 4 V4
VSS
V0
V1
V2
V3
COM0 V4
to VSS
-V4
SEG0 -V3
-V2
-V1
-V0
V0
V1
V2
V3
COM0 V4
to VSS
-V4
SEG1 -V3
-V2
-V1
-V0
Figure 6
Table 7
Status
bit function
“1” “0”
The Control Details of Each Bit of the Power Control Set Command
Table 8
External
Voltage Voltage Voltage Step-up
Use Settings D2 D1 D0 voltage
booster regulator follower voltage
input
Only the external power supply is used 0 0 0 OFF OFF OFF V0 to V4 Open
Reference Combinations
* The “step-up system terminals” refer CAP1N, CAP1P, CAP2N, CAP2P, and CAP3N.
* While other combinations, not shown above, are also possible, these combinations are not recommended
because they have no practical use.
VOUT<=5xVDD2 VOUT<=6xVDD2
Do NOT over voltage Do NOT over voltage
limitation limitation
VDD2 VDD2
VSS VSS
5x boost voltage relationship 6x boost voltage relationship
Figure 7
* The VDD2 voltage range must be set so that the VOUT terminal voltage does not exceed the absolute maximum rated value.
* The maximum voltage of the booster capacitor terminals are :
VMAX: CAP5P > CAP4P > CAP3P > CAP2P > CAP1P > CAP2N = CAP1N.
( Rb
V0 = 1 +
Ra )
V EV
Rb α
=( 1 + ) ( 162 )
1- V REG
Ra
α
[∵ V = ( 1 - 162
EV ) V ] REG
VSS
V0
Internal Rb
Figure 8
VREG is the IC-internal fixed voltage supply, and its voltage at Ta = 25°C is as shown in Table 9.
Table 9
Part no. Equipment Type Thermal Gradient VREG
ST7565R Internal Power Supply –0.05 %/°C 2.1V
α is set to 1 level of 64 possible levels by the electronic volume function depending on the data set in the 6-bit electronic
volume registers. Table 10 shows the value for α depending on the electronic volume register settings.
Rb/Ra is the V0 voltage regulator internal resistor ratio, and can be set to 8 different levels through the V0 voltage regulator
internal resistor ratio set command. The (1 + Rb/Ra) ratio assumes the values shown in Table 11 depending on the 3-bit data
settings in the V0 voltage regulator internal resistor ratio register.
V0 voltage regulator internal resistance ratio register value and (1 + Rb/Ra) ratio (Reference value)
Table 11
Register ST7565R
D2 D1 D0 (1) –0.05 %/°C
0 0 0 3.0
0 0 1 3.5
0 1 0 4.0
0 1 1 4.5
1 0 0 5.0
1 0 1 5.5
1 1 0 6.0
1 1 1 6.5
Figures 9, 10 show V0 voltage measured by values of the internal resistance ratio resistor for V0 voltage adjustment and electric
volume resister for each temperature grade model.
V0
UNIT:V Ta = 25 °C and booster off ,regulator,follower on
VDD=3V
15
14
13 111
12 110
11 101
10
100
9 011
8 010
7 001
6 000
V0 voltage regulator
5
internal resistor ratio
4
set D2,D1,D0
3
2 Electronic volume
1 registered
0 D5 ~ D0
00H 1FH 3FH
Figure 9 : (1) For ST7565R the Thermal Gradient = -0.05%/°C
The V0 voltage as a function of the V0 voltage regulator internal resistor ratio register and the electronic volume register.
Setup example: When selecting Ta = 25°C and V 0 = 7V for an ST7565R on which Temperature gradient = –0.05%/°C.
Using Figure 9 and the equation A-1, the following setup is enabled.
At this time, the variable range and the notch width of the V0 voltage is, as shown Table 13, as dependent on the electronic
volume.
Electronic Volume 1 0 0 1 0 1
Table 13
V0 Min Typ Max Units
Variable Range 5.1 (63 levels) 7.0 (central value) 8.4 (0 level) [V]
Notch width 51 [mV]
(B) When an External Resistance is Used (The V0 Voltage Regulator Internal Resistors Are Not Used) (1)
The liquid crystal power supply voltage V0 can also be set by controlling the liquid crystal power supply voltage V0
without using the V0 voltage regulator internal resistors (IRS through commands.
terminal = “L”) by adding resistors Ra’ and Rb’ between VDD In the range where | V0 | < | VOUT |, the V0 voltage can be
and VR, and between VR and V0, respectively. When this is calculated using equation B-1 based on the external
done, the use of the electronic volume function makes it resistances Ra’ and Rb’.
possible to adjust the brightness of the liquid crystal display
( Rb'
V0 = 1 +
Ra' )
V EV
Rb' α
=( 1 +
Ra' ) ( 162 )
1- V REG
α
[∵ V = ( 1 - 162
EV ) V ] REG
VSS
External
resistor Rb'
Figure 11
Setup example: When selecting Ta = 25°C and V 0 = 7 V for Moreover, when the value of the current running through
ST7565R the temperature gradient = –0.05%/°C. Ra’ and Rb’ is set to 5 uA,
When the central value of the electron volume register is Ra’ + Rb’ = 1.4MΩ (Equation B-3)
(D5, D4, D3, D2, D1, D0) = (1, 0, 0, 0, 0, 0), then α = 31 and Consequently, by equations B-2 and B-3,
VREG = 2.1V so, according to equation B-1, Rb'
= 3.12
Ra'
α
( Rb'
V0 = 1 +
Ra' ) (
1-
162 )
VREG Ra' = 340kΩ
Rb' 31
7V = ( 1 +
Ra' ) ( 162 )
1- (2.1) Rb' = 1060kΩ
Table 14
V0 Min Typ Max Units
Variable Range 5.3 (63 levels) 7.0 (central value) 8.6 (0 level) [V]
Notch width 52 [mV]
(C) When External Resistors are Used (The V0 Voltage Regulator Internal Resistors Are Not Used) (2)
W hen the external resistor described above are used, crystal display brightness.
adding a variable resistor as well makes it possible to In the range where | V0 | < | VOUT | the V0 voltage can be
perform fine adjustments on Ra’ and Rb’, to set the liquid calculated by equation C-1 below based on the R1 and R2
crystal drive voltage V0. In this case, the use of the electronic (vari a bl e re s is to r) and R 3 settings, where R 2 can
volume function makes it possible to control the liquid crystal be subjected to fine adjustments (Δ R2).
power supply voltage V0 by commands to adjust the liquid
ΔR2
( R3+R2-
V0 = 1 +
R1+ΔR2 )
V EV
R3+R2-ΔR2 α
=( 1 +
R1+ΔR2 ) ( 162 )
1- VREG
α
[∵ V = ( 1 - 162
EV ) V ] REG
VSS
Figure 12
* When the V0 voltage regulator internal resistors or the electronic volume function is used, it is necessary to at least set the
voltage regulator circuit and the voltage follower circuit to an operating mode using the power control set commands.
Moreover, it is necessary to provide a voltage from VOUT when the Booster circuit is OFF.
* The VR terminal is enabled only when the V0 voltage regulator internal resistors are not used (i.e. the IRS terminal = “L”).
When the V0 voltage regulator internal resistors are used (i.e. when the IRS terminal = “H”), then the VR terminal is left open.
* Because the input impedance of the VR terminal is high, it is necessary to take into consideration short leads, shield cables,
etc. to handle noise.
Figure 13
CAP2N CAP2N
C1 C1
CAP2P CAP2P
ST7565R
ST7565R
VSS VSS
R2
VR VR
R1
R3
C2 C2
V0 V0
C2 C2
V1 V1
C2 C2
V2 V2
C2 C2
V3 V3
C2 C2
V4 V4
2. When the voltage regulator circuit and V/F circuit alone are used
(1) W hen the V 0 voltage regulator internal resistor (2) W hen the V 0 voltage regulator internal resistor
is not used. is used.
VSS VDD VDD
CAP1P CAP1P
CAP2N CAP2N
CAP2P CAP2P
ST7565R
ST7565R
VSS VSS
R2
VR VR
R1
R3
C2 C2
V0 V0
C2 C2
V1 V1
C2 C2
V2 V2
C2 C2
V3 V3
C2 C2
V4 V4
VDD VDD
CAP3P CAP4P
CAP3P CAP4P
CAP1N CAP5P
CAP1N CAP5P
CAP1P
CAP1P
CAP2N
CAP2N
CAP2P
CAP2P
ST7565R
ST7565R
VSS VSS
External
power VR VR
supply
C2
V0 V0
C2
V1 V1
C2
V2 External power supply V2
C2
V3 V3
C2
V4 VDD2 or VSS V4
VDD2 or VSS
VDD2 or VSS
* 1. Because the VR terminal input impedance is high, use short leads and shielded lines.
* 2. C1 ~ C2 are determined by the LCD loading (size). Select a suitable value that matches the module.
Example of the Process by which to Determine the Settings:
• Turn the voltage regulator circuit and voltage follower circuit ON and supply a voltage to VOUT from the outside.
• Determine C2 by displaying an LCD pattern with a heavy load (such as horizontal stripes) and selecting the capacitor that
stabilizes the liquid crystal drive voltages (V0 to V4). Note that all C2 capacitors must have the same capacitance value.
• Next, remove external VOUT and turn all internal power supplies ON and then select C1.
E R/W
D7 D6 D5 D4 D3 D2 D1 D0 Page address
A0 /RD /WR
0 1 0 1 0 1 1 0 0 0 0 0
0 0 0 1 1
0 0 1 0 2
↓ ↓
0 1 1 1 7
1 0 0 0 8
Status Read
E R/W
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR
0 0 1 BUSY ADC ON/OFF RESET 0 0 0 0
BUSY = 1: it indicates that either processing is occurring internally or a reset condition is in process.
BUSY BUSY = 0: A new command can be accepted . if the cycle time can be satisfied, there is no need to check for
BUSY conditions.
This shows the relationship between the column address and the segment driver.
ADC 0: Reverse (column address 131-n ↔ SEG n)
1: Normal (column address n ↔ SEG n)
(The ADC command switches the polarity.)
ON/OFF: indicates the display ON/OFF state.
ON/OFF 0: Display ON
1: Display OFF
(This display ON/OFF command switches the polarity.)
This indicates that the chip is in the process of initialization either because of a /RES signal or because of a reset
command.
RESET 0: Operating state
1: Reset in progress
E R/W
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR
1 1 0 Write data
E R/W
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR
1 0 1 Read data
E R/W
D7 D6 D5 D4 D3 D2 D1 D0 Setting
A0 /RD /WR
1 0 1 0 0 0 0 0 Normal
0 1 0
1 Reverse
Display Normal/Reverse
This command can reverse the lit and unlit display without overwriting the contents of the display data RAM. When this is done
the display data RAM contents are maintained.
E R/W
D7 D6 D5 D4 D3 D2 D1 D0 Setting
A0 /RD /WR
0 1 0 1 0 1 0 0 1 1 0 RAM Data “H”
LCD ON voltage (normal)
1 RAM Data “L”
LCD ON voltage (reverse)
E R/W
D7 D6 D5 D4 D3 D2 D1 D0 Setting
A0 /RD /WR
1 0 1 0 0 1 0 0 Normal display mode
0 1 0
1 Display all points ON
When the display is in an OFF mode, executing the display all points ON command will place the display in sleep mode.
For details, see the Sleep Mode Set section.
Read-Modify-Write
This command is used paired with the “END” command. Once this command has been input, the display data read command
does not change the column address, but only the display data write command increments (+1) the column address. This
mode is maintained until the END command is input. When the END command is input, the column address returns to the
address it was at when the Read-Modify-Write command was entered. This function makes it possible to reduce the load on
the MPU when there are repeating data changes in a specified display region, such as when there is a blanking cursor.
E R/W
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR
0 1 0 1 1 1 0 0 0 0 0
* Even in read/modify/write mode, other commands aside from display data read/write commands can also be used.
Ver 1.7b 43/72 2009/02/23
ST7565R
Read-Modify-Write
Read-Modify-Write Cycle
Dummy Read
Data Read
No
Modify Data
Finished?
Yes
Done
Return
Column address N N+1 N+2 N+3 N+m N
End
This command releases the read/modify/write mode, and returns the column address to the address it was at when the mode
was entered.
E R/W
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR
0 1 0 1 1 1 0 1 1 1 0
Reset
This command initializes the display start line, the column address, the page address, the common output mode, the V0 voltage
regulator internal resistor ratio, the electronic volume, and the read/modify/write mode and test mode are released. There is no
impact on the display data RAM. See the function explanation in “Reset” for details.
The reset operation is performed after the reset command is entered.
E R/W
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR
0 1 0 1 1 1 0 0 0 1 0
The initialization when the power supply is applied must be done through applying a reset signal to the /RES terminal. The reset
command must not be used instead.
E R/W
D7 D6 D5 D4 D3 D2 D1 D0 Selected Mode
A0 /RD /WR
0 0 1 0 1 0 Booster circuit: OFF
1 Booster circuit: ON
0 Voltage regulator circuit: OFF
0 1 0
1 Voltage regulator circuit: ON
0 Voltage follower circuit: OFF
1 Voltage follower circuit: ON
E R/W
D7 D6 D5 D4 D3 D2 D1 D0 Rb/Ra Ratio
A0 /RD /WR
0 0 1 0 0 0 0 0 Small
0 0 1
0 1 0
0 1 0
↓ ↓
1 1 1
1 1 1 Large
E R/W
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR
0 1 0 1 0 0 0 0 0 0 1
E R/W
D7 D6 D5 D4 D3 D2 D1 D0 | V0 |
A0 /RD /WR
* * 0 0 0 0 0 1 Small
* * 0 0 0 0 1 0
* * 0 0 0 0 1 1
0 1 0
↓ ↓
* * 1 1 1 1 1 0
* * 1 1 1 1 1 1 Large
* Inactive bit (set “0”)
When the electronic volume function is not used, set this to (1, 0, 0, 0, 0, 0)
Figure 26
E R/W
A0 D7 D6 D5 D4 D3 D2 D1 D0 Status
/RD /WR
1 0 1 0 1 1 0 0 Sleep Mode
Preceding Command
0 1 0 1 Normal Mode
Following Command * * * * * * 0 0
* Disabled bit (set “0”)
Figure 27
In the sleep mode, the MPU is still able to access the display data RAM.
Refer to figure 28 for sleep mode sequence.
Normal Mode
Display OFF
Sleep Mode
Normal Mode
(Exit Sleep Mode)
Figure 28
E R/W
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR
0 1 0 1 1 1 1 1 0 0 0
E R/W Booster
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR ratio select
* * * * * * 0 0 2x,3x,4x
0 1 0 * * * * * * 0 1 5x
* * * * * * 1 1 6x
* Inactive bit (set “0”)
When the booster ratio select function is not used, set this to (0, 0) 2x,3x,4x step-up mode
No
Set Complete?
Yes
Done
Figure 29
E R/W
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR
0 1 0 1 1 1 0 0 0 1 1
Test
This is a command for IC chip testing. Please do not use it. If the test command is used by accident, it can be cleared by
applying a “L” signal to the /RES input by the reset command or by using an NOP.
E R/W
D7 D6 D5 D4 D3 D2 D1 D0
A0 /RD /WR
0 1 0 1 1 1 1 1 1 * *
* Inactive bit
Note: The ST7565R maintain their operating modes until something happens to change them. Consequently, excessive
external noise, etc., can change the internal modes of the ST7565R . Thus in the packaging and system design it is
necessary to suppress the noise or take measure to prevent the noise from influencing the chip. Moreover, it is
recommended that the operating modes be refreshed periodically to prevent the effects of unanticipated
noise.
1. When the built-in power is being used immediately after turning on the power:
* The target time of 5ms will result to vary depending on the panel characteristics and the capacitance of the smoothing
capacitor. Therefore, we suggest you to conduct an operation check using the actual equipment.
* The target time of 5ms will result to vary depending on the panel characteristics and the capacitance of the smoothing
capacitor. Therefore, we suggest you to conduct an operation check using the actual equipment.
VDD
1.8V
RES
COM
VSS
VOUT
V0
V1
Above Vth of the LCD Panel.
V2
V3
Under Vth of the LCD Panel.
V4
Depends on the LCD Module
characteristic (around 0.2~1V).
tH
tL
VDD 1.8V
RES
COM
VSS
VOUT
V0
V1
Above Vth of the LCD Panel.
V2
V3
Under Vth of the LCD Panel.
V4
Depends on the LCD Module
characteristic (around 0.2~1V).
tH
<Reference Data>
V0 voltage falling (discharge) time (tH) after the process of operation → power save → reset.
V0 voltage falling (discharge) time (tH) after the process of operation → reset.
100
VDD-VSS(V)
V0 voltage falling time (mSec)
1.8
2.4
50
3.0
4.0
5.0
0 0.5 1.0
C2 : V0 to V4 capacity (uF)
Figure 31
V0
V1 to V4
VDD VDD
Figure 30
Table 19
Rating Applicable
Item Symbol Condition Units
Min. Typ. Max. Pin
Input voltage VDD2 (Relative To VSS) 2.4 — 3.3 V VDD
Supply Step-up output
VOUT (Relative To VSS) — — 13.5 V VOUT
voltage Circuit
Internal Power
Voltage regulator
Circuit Operating VOUT (Relative To VSS) 6.0 — 13.5 V VOUT
Voltage
Voltage Follower
Circuit Operating V0 (Relative To VSS) 4.0 — 13.5 V V0 * 9
Voltage
Ta = 25°C, (Relative To V SS)
Base Voltage VRS 2.07 2.10 2.13 V *10
–0.05%/°C
• Dynamic Consumption Current : During Display, with the Internal Power Supply ON
Table 21
Rating
Test pattern Symbol Condition Units Notes
Min. Typ. Max.
VDD = 3.0 V, Normal Mode — 90 130
Display
Pattern OFF
IDD Quad step-up voltage. µA *12
V0 – VSS = 11.0 V High-Power Mode — 128 193
• The Relationship Between Oscillator Frequency fOSC, Display Clock Frequency fCL and the Liquid Crystal Frame Rate
Frequency fFR
Table 23
Item fCL fFR
A0
tAW8 tAH8
CS1
(CS2="1")
tCYC8
tCCLR,tCCLW
WR,RD
tCCHR,tCCHW
tDH8
tDS8
D0 to D7
(Write)
tACC8 tOH8
D0 to D7
(Read)
Figure 37
Table 24
(VDD = 3.3V, Ta = –30 to 85°C)
Rating
Item Signal Symbol Condition Units
Min. Max.
Address hold time tAH8 0 —
Address setup time A0 tAW8 0 —
System cycle time tCYC8 240 —
Enable L pulse width (WRITE) tCCLW 80 —
WR
Enable H pulse width (WRITE) tCCHW 80 —
Enable L pulse width (READ) tCCLR 140 — Ns
RD
Enable H pulse width (READ) tCCHR 80
WRITE Data setup time tDS8 40 —
WRITE Address hold time tDH8 0 —
D0 to D7
READ access time tACC8 CL = 100 pF — 70
READ Output disable time tOH8 CL = 100 pF 5 50
*1 The input signal rise time and fall time (tr, tf) is specified at 15 ns or less. When the system cycle time is extremely fast,
(tr +tf) ≦ (tCYC8 – tCCLW – tCCHW ) for (tr + tf) ≦ (tCYC8 – tCCLR – tCCHR) are specified.
*2 All timing is specified using 20% and 80% of VDD as the reference.
*3 tCCLW and tCCLR are specified as the overlap between /CS1 being “L” (CS2 = “H”) and /WR and /RD being at the “L” level.
A0
R/W
tAW6 tAH6
CS1
(CS2="1")
tCYC6
tewLR,tewLW
E
tewHR,tewHW
tDH6
tDS6
D0 to D7
(Write)
tACC6 tOH6
D0 to D7
(Read)
Figure 38
Table 26
(VDD = 3.3V,Ta = –30 to 85°C)
Rating
Item Signal Symbol Condition Units
Min. Max.
Address hold time tAH6 0 —
Address setup time A0 tAW6 0 —
System cycle time tCYC6 240 —
Enable L pulse width (WRITE) tEWLW 80 —
WR
Enable H pulse width (WRITE) tEWHW 80 —
Enable L pulse width (READ) tEWLR 80 — ns
RD
Enable H pulse width (READ) tEWHR 140
WRITE Data setup time tDS6 40 —
WRITE Address hold time tDH6 0 —
D0 to D7
READ access time tACC6 CL = 100 pF — 70
READ Output disable time tOH6 CL = 100 pF 5 50
*1 The input signal rise time and fall time (tr, tf) is specified at 15 ns or less. When the system cycle time is extremely fast,
(tr +tf) ≦ (tCYC6 – tEWLW – tEWHW ) for (tr + tf) ≦ (tCYC6 – tEWLR – tEWHR) are specified.
*2 All timing is specified using 20% and 80% of VDD as the reference.
*3 tEWLW and tEWLR are specified as the overlap between CS1 being “L” (CS2 = “H”) and E.
tCCSS tCSH
CS1
(CS2="1")
tSAS tSAH
A0
tSCYC
tSLW
SCL
tSHW
tf
tr
tSDS tSDH
SI
Figure 39
Table 28
(VDD = 3.3V,Ta = –30 to 85°C)
Rating
Item Signal Symbol Condition Units
Min. Max.
4-line SPI Clock Period Tscyc 50 —
SCL “H” pulse width SCL Tshw 25 —
SCL “L” pulse width TSLW 25 —
Address setup time TSAS 20 —
A0
Address hold time Tsah 10 — ns
Data setup time Tsds 20 —
SI
Data hold time TSDH 10 —
CS-SCL time Tcss 20 —
CS
CS-SCL time Tcsh 40 —
Table 29
(VDD = 2.7V,Ta = –30 to 85°C)
Rating
Item Signal Symbol Condition Units
Min. Max.
4-line SPI Clock Period Tscyc 100 —
SCL “H” pulse width SCL TSHW 50 —
SCL “L” pulse width TSLW 50 —
Address setup time TSAS 30 —
A0
Address hold time TSAH 20 — ns
Data setup time TSDS 30 —
SI
Data hold time TSDH 20 —
CS-SCL time TCSS 30 —
CS
CS-SCL time TCSH 60 —
Reset Timing
tRW
RES
tR
Internal
During reset Reset complete
status
Figure 41
Table 30
(VDD = 3.3V,Ta = –30 to 85°C)
Rating
Item Signal Symbol Condition Units
Min. Typ. Max.
Reset time tR — — 1.0 us
Reset “L” pulse width /RES tRW 1.0 — — us
Table 31
(VDD = 2.7V,Ta = –30 to 85°C)
Rating
Item Signal Symbol Condition Units
Min. Typ. Max.
Reset time tR — — 2.0 us
Reset “L” pulse width /RES tRW 2.0 — — us
*1 All timing is specified with 20% and 80% of VDD as the standard.
VCC VDD
A0 A0 C86
A1 to A7 CS1
Decoder
ST7565R
IORQ CS2
MPU
DO to D7 DO to D7
RD RD
WR WR
RES RES P/S
GND VSS
RESET
VSS
Figure 42-1
(2) 6800 Series MPUs
VDD
VCC VDD
A0 A0 C86
A1 to A15 CS1
ST7565R
Decoder
VMA CS2
MPU
DO to D7 DO to D7
E E
R/W R/W
RES RES P/S
GND VSS
RESET
VSS
Figure 42-2
(3) Using the 4-line SPI Interface
VDD or VSS
VCC VDD
A0 A0 C86
CS1
ST7565R
A1 to A7 Decoder
CS2
MPU
Port 1 SI
Port 2 SCL
RES RES P/S
GND RESET VSS
VSS
Figure 42-3
Figure 43
C2
C2
C2
C2
C2
C1
C1
C1
C1
70/72
V V R AR C
S D
DDDDDDDD
7 65 43 21 0 E / 0S
T
S
1
S D W B
COMS1
VS SS I H PCCT V T T T T T T VV V V V V V V CC CC C CCC CC C CCCC CV V V V V V V V V V / / V RVCCV D T COM53
SE EERPS8 LED E E E E E E D D V V V V V V V V V V V V D D R R S S A A A A A A A A A A A A A A A A O O S S S S D D D D D D D D D D D D R WS A S D S S S O C F E
SL L L SMB 6 S S D S S S S S S DD R R 0 0 1 1 2 2 3 3 4 4 DD S S S S PP PP P P P P P P P P P P P PU U S S S SD DD 7 6 5 4 3 2 1 0 DDR S 0 TD 2 1 S F L RS
COM26 3 21 B T T T T T T T 2 2 44 22 2 2 11 11 3 3115 5T T 2 B T
ST7565R
7 5 4 3 2 1 0 PP NN P P P P NN P PNNP P 6
S
C E C
Ver 1.7b
C CO S G O
O OM E 1 M
M MS G 3 2
8 02 0 1 7
COM9 COM32
(3)
ST7565R
Recommend LCD Setting
Recommend Setting 2:
VDD = VDD2 = 3.0V
Booster = X4
BIAS = 1/8
Vop = 7.0~8.5V
Duty = 1/55
User’s Guide
______________________________
For product support, contact
LIQUID CRYSTAL DISPLAY MODULES
LCD’s are composed of glass, liquid crystal fluid, and a polarizer. Please pay attention to the following items when
handling:
1. Keep the temperature within a specified range for use and storage. Polarization degradation, bubble
generation or polarizer peel‐off may occur with high temperatures and high humidity.
2. Do not touch, push or rub the exposed polarizer with anything harder than an HB lead pencil (glass,
tweezers, etc).
3. N‐hexane is recommended for cleaning the adhesives used to attach the front/rear polarizer.
Reflectors made of organic substances will be damaged by chemicals such as acetone, toluene,
ethanol and isopropyl alcohol.
4. If the display surface becomes contaminated, breathe on the surface and gently wipe it with a soft
dry cloth. If it is heavily contaminated, wipe it gently with absorbent cotton or another soft material
like a chamois soaked in Isopropyl alcohol or Ethyl alcohol. Scrub gently to avoid damaging the
display surface.
5. Wipe off saliva or water immediately! Contact with water over a long period of time may cause
deformation or color fading.
6. Avoid contact with oil or any greasy substances.
7. If there is condensation on the surface and contact with the terminals while cold, it will damage, stain
or dirty the polarizer. After the product is tested at a low temperature, they must be warmed up in a
container before being exposed to room temperature environments.
8. Do not put or attach anything on the display area in order to avoid leaving marks.
9. Do not touch the display with bare hands. This will stain the display area and degrade the insulation
between terminals. (Some cosmetics are detrimental to the polarizer).
10. Exercise care to minimize corrosion of the electrode. Corrosion of the electrodes is accelerated by
water droplets, moisture condensation or a current flow in a high‐humidity environment.
11. As glass is fragile, care should be taken to avoid chipping, while handling the edges especially.
PRECAUTIONS FOR HANDLING LCD MODULES
Since the LCD module has been assembled and adjusted with a high degree of precision, avoid applying excessive
shock or force to the module or making any alterations or modifications to it.
1. Do not alter, modify or change the shape of the tab on the metal frame.
2. Do not make extra holes on the printed circuit board, modify its shape or change the positions of
components to be attached.
3. Do not damage or modify the pattern wiring on the printed circuit board.
4. Absolutely do not modify the zebra rubber strip (conductive rubber) or heat the seal connector!
5. Except for soldering the interface, do not make any alterations or modifications with a soldering iron.
6. Do not drop, bend or twist the LCD module. In particular, don’t forcibly pull or bend the I/O cable or
backlight cable.
7. In order to avoid cracking the FPC, pay attention to the area where the FPC is bent, the edge of the
overlay, the area of the surface of Ni‐Au plating, the area of soldering land, and the area of the
through hole.
ELECTRO‐STATIC DISCHARGE CONTROL
Since this module uses a CMOS LSI, give the same careful attention to the electrostatic discharge as you would for
an ordinary CMOS IC.
1. Make sure you are grounded when handling LCD modules. To minimize the performance degradation
of the LCD modules resulting from destruction caused by static electricity, exercise care to avoid
holding the following sections when handling the modules: exposed area of the printed circuit board,
terminal electrode sections.
2. Before removing the LCD module from its packing case or incorporating it into a set, be sure the
module and your body have the same electric potential.
3. When soldering the terminal of the LCD module, make sure the AC power source for the soldering
iron does not leak.
4. When using an electric screwdriver to attach the LCD module, the screwdriver should be of ground
potentiality, to minimize any transmission of electromagnetic waves producing sparks coming from
the commutator of the motor.
5. As far as possible, make the electric potential of your work clothes and that of the work bench the
ground potential.
6. To reduce the generation of static electricity, be careful that the air in the working environment is not
too dry. (A relative humidity of 50‐60% is recommended).
PRECAUTIONS FOR OPERATION
1. Viewing angle varies with the change of liquid crystal driving voltage (VO). Adjust VO to show the
best contrast.
2. Driving the LCD in the voltage above the limit shortens its life.
3. If the LCD modules have been operating for a long time showing the same display patterns, the
display patterns may remain on the screen as ghost images and a slight contrast irregularity may also
appear. A normal operating status can be regained by suspending use for some time. It should be
noted that this phenomenon does not adversely affect performance reliability.
4. Response time is greatly delayed at temperatures below the operating temperature range, however
this does not mean the LCD will be out of order. It will recover when it returns to the specified
temperature range.
5. If the display area is pushed hard during operation, the display may become abnormal, however it
will return to normal if it is turned off and then turned back on.
6. Condensation on terminals can cause an electrochemical reaction disrupting the terminal circuit,
therefore it must be used under the relative condition of 40°C, 50% RH.
7. When turning the power on, input each signal after the positive/negative voltage becomes stable.
STORAGE
WHEN STORING LCD’S, THE FOLLOWING PRECAUTIONS ARE NECESSARY:
1. Store them in a sealed polyethylene bag. If properly sealed, there is no need for desiccant.
2. Store them in a dark place; do not expose them to sunlight or fluorescent light. Keep the
temperature between 0°C and 35°C.
3. The polarizer surface should not come in contact with any other objects. (We advise you to store
them in the container in which they were shipped).
4. Environmental conditions:
A). Do not leave them for more than 160 hours at 70°C
B). They should not be left for more than 48 hours at ‐20°C
SAFETY
1. It is recommended to crush damaged or unnecessary LCDs into pieces and wash them off with
solvents such as acetone and ethanol, which should later be burned.
2. If any liquid leaks out of a damaged glass cell and comes in contact with the hands, wash off
thoroughly with soap and water.
LIMITED WARRANTY
Newhaven Display MAKES NO WARRANTY RESPECTING THE MERCHANTABILITY OF THE PRODUCTS OR THEIR SUITABILITY OR
FITNESS FOR ANY PARTICULAR PURPOSE OR USE OR RESPECTING INFRINGEMENT. Newhaven Display’s liability arising out of
any sale of products to Customer is expressly limited to repair and/or replacement of such Products, at Newhaven Display’s
election, with such remedies exclusive and in lieu of all others. Newhaven Display will not be responsible for any subsequent or
consequential events or injury or damage to any personnel or user including third party personnel and/or user. This warranty is
in lieu of any and all other warranties, whether oral, written, expressed, implied or statutory. Implied warranties of fitness for a
particular purpose and merchantability are specifically excluded and shall not apply. Customer’s obligations and Newhaven
Display’s remedies with respect to defective or nonconforming products, are solely and exclusively as stated herein.
Furthermore, no warranty will apply if the Product has been subject to misuse, static discharge, neglect, accident, modification,
or has been soldered or altered in any way or if any of the LCD handling precautions have been disregarded. Broken glass,
scratches on polarizer, mechanical damages, as well as defects that are caused by accelerated environment tests are excluded
from warranty. In returning products, they must be returned in their original packaging. If the original packaging is not used, the
returned product must be properly packaged to prevent damage or warranty will be void. There must be a detailed description
of the failures or defect for each returned part.
RETURN LCD MODULES UNDER WARRANTY
The Customer must notify Newhaven Display within one year from date of shipment of any defective product. If Newhaven
Display agrees to accept a return, return freight charges may be paid by Newhaven Display. Newhaven Display will not accept
COD shipments. Contact a sales representative for a Return Materials Authorization Number and addressing instructions prior
to returning product.
Handling Precautions
1. Limitation of Application:
Newhaven products are designed for use in ordinary electronic devices such as business machines, telecommunications
equipment, measurement devices..etc. Please handle the products with care. (See below)
Newhaven products are not designed, intended or authorized for use in any application which the failure of the product could
result in a situation where personal injury or death may occur. These applications include, but are not limited to: life-sustaining
equipment, nuclear control devices, aerospace equipment, devices related to hazardous or �lammable materials...etc. (If Buyer
intends to purchase or use the Newhaven products for such unintended or unauthorized applications, Buyer must secure prior
written consent to such use by a responsible of�icer of Newhaven Display). Should Buyer purchase or use Newhaven products for
any such unintended or unauthorized application (without such consent), Buyer shall indemnify and hold Newhaven and its
of�icers, employees, subsidaries, af�iliates and distributors harmless against all claims, costs, damages and expenses, and
reasonable attorney’s fees, arising out of, directly or indirectly, any claim of personal injury or death associated with such
unintended or unauthorized use, even if such claim alleges that Newhaven was negligent regarding the design or manufacture of
the part.
2. Industrial Rights and Patents
Newhaven shall not be responsible for any infringement of industrial property rights of third parties in any country arising out of
the application or use of Newhaven products, except which directly concern the structure or production of such products.
DC
Keep Away From Extreme Heat and Humidity! Use Alcohol to Clean Terminals!
Alcohol
Long-term Storage
If it is necessary to store LCD modules for a period of time, please comply with the
following procedures.
If storage conditions are not satisfactory,the display(especially polarizer)
or soldering I/O terminals may become difficult(some oxide is generated at I/O
terminals plating).
1.Store as delivered by Newhaven.
2.If you store it unpacked, put it in an anti-static bag, seal its opening and store where it is
not subjected to direct sunlight or fluorescent light.
3.Store at temperature 0 to +35 and at low humidity.Please refer to our specification
sheets for storage temperature range and humidity conditions.
Long-term Storage
Please use power supply with built-in surge protection circuit.