1330 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 8, NO.

2, JUNE 2020

Novel Four-Port DC–DC Converter for Interfacing

Solar PV–Fuel Cell Hybrid Sources With
Low-Voltage Bipolar DC Microgrids
Prajof Prabhakaran , Student Member, IEEE, and Vivek Agarwal , Fellow, IEEE

Abstract— Bipolarity in dc microgrids is desirable as it

enhances the system reliability and efficiency. However, a bipolar
dc microgrid (BDCMG) demands multiple conventional dc–dc
converters to feed power to both the poles of the BDCMG.
To handle this requirement and to maintain high efficiency, a new
four-port, dual-input-dual-output dc–dc converter topology is
proposed for interfacing the solar photovoltaic (PV) and fuel cell
sources to a low-voltage BDCMG. The proposed topology is uni-
directional, efficient, and compact. It has fewer circuit elements
with only one inductor compared to the conventional nonisolated
dc–dc converters. The proposed converter regulates one of the
pole voltages of the dc bus and also ensures maximum power
point tracking of the PV source. Furthermore, the converter can
be operated as a single-input-dual-output converter. The control
complexity of the proposed converter is low as it can be operated
in various modes with only one set of controllers. To design
the control system for the proposed converter, a small-signal Fig. 1. Low-voltage (48-V) BDCMG system.
model is derived for each operating mode. Loss modeling and
efficiency analysis of the proposed converter are carried out, and
its efficacy and performance are validated by detailed simulation do not have issues related to synchronization, skin effect,
and experimental results under various operating conditions. reactive power, etc. Hence, the dc microgrid systems are
Index Terms— Bipolar dc microgrid (BDCMG), dc–dc con- gaining popularity and would serve as fundamental building
verter, fuel cell (FC), photovoltaic (PV), small-signal model- blocks in the future smart grid.
ing (SSM), state-space averaging (SSA). To further improve the reliability, power quality, and effi-
I. I NTRODUCTION ciency of the dc microgrid system, bipolarity in the dc micro-
grid is introduced [3]. A bipolar dc microgrid (BDCMG) is
I MMINENT exhaustion of fossil fuels and ever-growing
concern about environmental pollution have led to an exten-
sive search for alternate, clean energy sources. Renewable
a three wire dc distribution system where various distributed
energy resources (such as solar PV, FC, and battery) and loads
energy sources (RESs) such as solar photovoltaics (PV), wind, are interconnected to form a small dc network.
and fuel cells (FCs) are considered popular alternatives to Fig. 1 shows a 48-V (with ±24-V bipolar voltages)
conventional sources. A major factor that has clinched the deal dc microgrid system for a residential application. This system
in their favor is the relative ease in which these sources can be provides high flexibility and reliability. That is, even if one
efficiently interfaced with distributed generation networks such of the lines fails, the load can be catered via the other two
as the microgrids—the building blocks of the futuristic smart lines. Furthermore, the ultralow-voltage and ultralow-power
power grid. The RESs are more efficiently interfaced to a low- loads can be connected to the 24-V bus of the dc microgrid
voltage dc microgrid compared to an ac grid as they need only as the converter efficiency under this condition would be high
one level of power conversion to feed power to the grid [1], [2]. (as the voltage gain of this converter is comparatively closer
Also, Strunz et al. [1] and Madduri et al. [2] indicate that the to unity). However, from Fig. 1, it can be observed that a large
dc microgrid systems are a better alternative (compared to the number of conventional dc–dc converters would be required
conventional ac grid) to integrate modern electronic loads and to interface various energy sources to feed power to both
other dc loads efficiently. Furthermore, dc microgrid systems the poles of the BDCMG. This would result in high cost,
large volume, and poor efficiency. Some other challenges in
Manuscript received July 12, 2018; revised October 16, 2018; accepted interfacing RESs to BDCMG are handling intermittent nature
November 14, 2018. Date of publication December 7, 2018; date of current of RES and stable control with the maximum power point
version May 6, 2020. Recommended for publication by Associate Editor
Suryanarayana Doolla. (Corresponding author: Prajof Prabhakaran.) tracking (MPPT) operation.
The authors are with the Department of Electrical Engineering, IIT Bombay, As a solution to the aforementioned problems, multiport
Mumbai 400076, India (e-mail: prajof@gmail.com). dc–dc converters are proposed and researched [4]–[20]. These
Color versions of one or more of the figures in this article are available
online at http://ieeexplore.ieee.org. multiport dc–dc converters can be classified into two types:
Digital Object Identifier 10.1109/JESTPE.2018.2885613 1) isolated topology and 2) nonisolated topology. Isolated
2168-6777 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.

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 PRABHAKARAN AND AGARWAL: NOVEL FOUR-PORT DC–DC CONVERTER
topology-based multiport dc–dc converters are relevant when
the application demands large voltage gain ratios. However,
for a low-voltage dc microgrid application (especially 48-V
dc microgrid), isolated multiport dc–dc converters might not
be suitable as large voltage gain ratios are not necessary. Fur-
thermore, isolated topology-based multiport dc–dc converters
utilize high-frequency transformers which increase the size,
cost, and losses. Hence, nonisolated multiport dc–dc converters
seem to be more useful for low-voltage BDCMG applications.
The nonisolated multiport converters can be further catego-
rized into: 1) unidirectional converters and 2) bidirectional
converters. The second category is used if RESs and storage
units are interfaced to the BDCMG. But, to interface only
RESs, the first category is preferred due to low switch count
and high efficiency. In the following paragraphs, some of the
relevant nonisolated multiport dc–dc converters available in
the literature are discussed.
In [4]–[7], various multi-input-single-output topologies are
proposed. Compared to the conventional topologies, these con-
verters are compact and efficient. But unfortunately, these con-
verters cannot be employed for the BDCMG application as it
demands dual output, with three output terminals. In addition,
some of these converters find the output voltage regulation
quite challenging in the case of failure or nonoperation of one
of the input sources.
In [8]–[12], numerous single-input-multi-output convert-
ers are proposed. Some of these converters use fewer cir-
cuit elements, have high power density and efficiency, and
are also suitable for BDCMG application. However, these
converters cannot combine two or more energy sources.
Furthermore, some of these converters produce multiple inde-
pendent outputs and, hence, cannot be employed for the
BDCMG application, where it demands two series-connected
outputs.
The converters in [13] and [14] are compact, efficient, and
suited for BDCMG applications as they have series-connected
outputs. But, these are high-gain multi-output dc–dc converters
with auxiliary components or circuits, which are not really
required for low-voltage BDCMG applications.
In [15]–[20], various multi-input-multi-output dc–dc con-
verters are proposed. Except [15], all other converters have
series-connected outputs and use only one inductor. Therefore,
these converters are good for low-voltage BDCMG and are
relatively compact and efficient. However, the converter in [16]
is a bidirectional converter and, hence, not apt for interfacing
only RESs. The converters in [17]–[20] are unidirectional, but
they use a large number of switches to obtain multiple outputs,
thereby limiting the overall efficiency. The converter in [20]
has more inductors.
Clearly, there is a scope for improvement in the efficiency
and compactness of nonisolated unidirectional dc–dc convert-
ers by reducing the part count of the circuit. Accordingly,
in this paper, a novel dual-input-dual-output (DIDO) unidi-
rectional dc–dc converter is proposed to integrate PV and FC
sources to a low-voltage BDCMG. The proposed converter has
the following salient features.
1) It has less number of switches (two switches) compared
to the other DIDO converters researched in the literature.
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1331
2) It utilizes only one inductor, and hence this converter is
more economical, compact, and efficient.
3) It can regulate one of the pole voltages of the BDCMG
even with one energy source [i.e., it can be operated as
a single-input-dual-output (SIDO) converter].
4) It can operate in both continuous conduction mode
(CCM) and discontinuous conduction mode (DCM).
5) As there are two switches, the converter can work with
two degrees of freedom. That is, one of the pole voltages
of the dc microgrids and the inductor currents can be
controlled in this converter.
6) With the proposed converter, the MPPT operation of the
PV source is possible, and this can be accomplished by
sensing only the inductor current and PV voltage. That
is, additional PV current sensing is not required.
7) The dynamic model of the converter remains unchanged
irrespective of different operating conditions. Hence,
unlike other DIDO converters proposed in the literature,
the controller design for the proposed converter is rela-
tively straightforward.
From the above-mentioned features, it can be seen that by
utilizing the proposed topology, the overall efficiency of the
BDCMG system can be enhanced.
The remaining of this paper is organized as follows. The
proposed converter configuration and operating modes are
explained in Section II. The steady-state characteristics of the
converter are presented in Section III. The dynamic modeling
and controller design for the proposed converter are described
in Section IV. Loss modeling and efficiency analysis of the
converter are derived in Section V. Detailed simulations and
experimental results are presented in Section VI. Finally,
the conclusion of the entire work is given in Section VII.
II. C ONVERTER C ONFIGURATION AND O PERATING M ODES
The circuit diagram of the proposed converter is shown
in Fig. 2(a) [21]. It can be seen that the converter consists of
two switches (S1 and S2 ), one inductor (L 1 ), and four diodes
(Da –Dd ). However, for satisfactory operation of the converter
only three diodes are required (i.e., Db –Dd ). The diode Da is
introduced only for PV protection (against negative currents).
In Fig. 2(a), R1 and R2 are the load resistance seen by
the terminal “O–N” and “P–O,” respectively. Alternatively,
the loads connected to the output terminals of the converter can
also be represented as shown in Fig. 2(b). The relationships
between loads shown in Fig. 2(a) and (b) are derived in Section
III. From Fig. 2(a), it can be seen that the proposed topology is
a unidirectional converter, and it is well suited for hybridizing
any two combinations of RESs such as solar PV, FC, and wind.
In this paper, the converter is interfaced to the dc loads (or dc
microgrid) through PV and FC sources [as shown in Fig. 2(a)].
For proper functioning of the converter, the following con-
ditions must be satisfied.
1) Vin2 > VT (= V1 + V2 ) > Vin1 (to ensure volt–second
balance across inductor L 1 ).
2) R2 > R1 (the reason for this is explained in section III).
If the duty ratios of switches S1 and S2 are d1 and d2 ,
respectively, then for satisfactory operation of the converter,
 1332 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 8, NO. 2, JUNE 2020

Fig. 2. (a) Circuit configuration of the proposed converter. (b) Alternate representation of loads.

Fig. 3. Various operating modes of the proposed converter. (a) Both S1 and S2 are ON. (b) S1 is ON and S2 is OFF. (c) S1 is OFF and S2 is ON. (d) Both
S1 and S2 are OFF (in CCM). (e) Both S1 1 and S2 are OFF (in DCM). (f) S2 is ON (in SIDO mode).

Fig. 4. Switching pulses and steady-state inductor current and inductor Fig. 5. Switching pulses and steady-state inductor current and inductor
voltage waveforms (in CCM) when (a) D1 > D2 and (b) D1 < D2 . voltage waveforms (in DCM) when (a) D1 > D2 and (b) D1 < D2 .

these duty cycles must satisfy either of the following two
conditions: 1) d1 < d2 (i.e., the turn-on time of switch S2
is more than switch S1 ) or 2) d1 > d2 (i.e., the turn-on time
of switch S1 is more than switch S2 ). Fig. 3 depicts all the
possible operating modes of the proposed converter taking
into the account different conditions in the duty ratios and
the nature of inductor current (i.e., CCM and DCM). If the
converter operates in CCM, and if d1 > d2 , the operating
modes would be as shown in Fig. 3(a), (b), and (d). If d1 < d2
and if the converter is operating in CCM, the operating modes
would be as shown in Fig. 3(a), (c), and (d). In the DCM
operation, the converter operates in four operating modes in
one switching period. The first three modes are the same as
in CCM, with the fourth mode as shown in Fig. 3(e).
Fig. 4 shows the switching pulses along with the
steady-state inductor current and voltage waveforms under the
above-mentioned conditions. These waveforms are obtained
considering CCM operation. Fig. 5 portrays the same set of
waveforms under the DCM mode of operation.
Taking a closer look at Figs. 3–5, it can be seen that if
switch S1 is “ON ” for a longer duration, the average PV
current increases. It is the other way round if the “ON ” period
decreases. Hence, it can be concluded that by modulating S1 ,
the average PV current can be controlled. Similarly, it can
be seen that by modulating S2 , the average voltage across
capacitor C1 can be regulated.
A major advantage of the proposed converter is that it can
be operated as an SIDO converter, i.e., it can operate in the
absence of PV, or FC source provided the following condition
is satisfied: V1 ≤ (Vin1 or Vin2 ) ≤ VT . In the absence of
the FC source, switch S1 is continuously ON (i.e., d1 = 1)
and switch S2 is modulated to regulate V1 . In the absence of
the PV source, switch S1 is continuously OFF (i.e., d1 = 0)
and switch S2 is modulated to regulate V1 . However, it may

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 PRABHAKARAN AND AGARWAL: NOVEL FOUR-PORT DC–DC CONVERTER 1333

be noted that the regulation of V1 with PV source alone is 2) The average current through switch S2 or diode Dc is
possible only if there is enough power from the PV source. given by
The operating modes during this condition would be as shown
in Fig. 3(f) and (b) or (d). V1 V2
I S2 ,avg = − ≥ 0; R2 ≥ R1 (if V1 = V2 ). (9)
R1 R2
III. S TEADY-S TATE A NALYSIS
From (9), it can be inferred that R2 > R1 is one of the
This section analyses and presents various steady-steady necessary conditions required for proper functioning of the
equations and the design criteria for the proposed converter converter.
under different operating conditions. It may be noted that in
3) The voltages across all the devices (considering them to
the steady state, the average voltage across the inductor and
be ideal) in the proposed converter, when not conduct-
average current flowing through the capacitor are zero. The
ing, are given by
steady-state equations can be analyzed considering any one of
the loading representation [i.e., either Fig. 2(a) or (b)]. These ⎫
equations can be converted from one representation to another VDa = 0 V (when S1 is off), V D S1 = Vin2 −Vin1 ⎪
⎪
⎬
by expressing the load resistance of one representation in terms VDb = Vin1 −Vin2 (when S1 is on), V D S2 = V2
.
of the other, which is explained in the following. VDc = 0 V (when S2 is off), V Dd = −V2 ⎪
⎪
⎭
From Fig. 2(a), the average current through switch S2 is (when S2 is on)
obtained as follows: (10)
V1 V2
Is2 ,avg = − . (1) 4) Neglecting the losses, the total output power (PT ) of the
R1 R2 proposed converter (Fig. 2) is given by
Similarly, from Fig. 2(b), the average current through switch
S2 is obtained as
V12 V2 V2 V2
V1 PT = + 2 = Vx,avg × I L ,avg = 1 + T . (11)
Is2 ,avg = . (2) R1 R2 Ra Rb
Ra
Depending upon the operating mode of the converter (i.e.,
Therefore, equating (1) and (2), the load resistance Ra in
CCM or DCM or single-input mode), the steady-state equa-
terms of R1 and R2 can be derived as follows:
  tions for some of the converter parameters change. These
R1 × R2 R1 × R2 equations can be derived by analyzing the converter in the
Ra = × V1 = (if V1 = V2 ). (3)
V1 R2 − V2 R1 R2 − R1 three operating modes, which is discussed in detail below.
From Fig. 2(a), the average current through diode Dd is
given by A. Continuous Conduction Mode
V2 1) Duty Ratios of the Switches at Steady State (D1 and D2 ):
I Dd ,avg = . (4) In CCM, the inductor current is always greater than 0. Thus,
R2
from Figs. 2 and 4, it can be seen that the voltage v x is equal
Similarly, from Fig. 2(b), the average current through diode
to PV voltage during 0 ≤ t ≤ D1 T , and it is equal to FC
Dd is obtained as
voltage during 0 ≤ t ≤ (1 − D1 )T . Hence, the average value
V1 + V2 VT of voltage v x is given by
I Dd ,avg = = . (5)
Rb Rb
Vx,avg = Vin2 × D1 + Vin1 × (1 − D1 ). (12)
Therefore, equating (4) and (5), the load resistance Rb in
terms of R1 and R2 can be derived as follows: By substituting (12) in (11), the following equation is
VT R2 obtained:
Rb = ; Rb = 2R2 (if V1 = V2 ). (6) 
PT
V2
PT I L,avg − Vin1
At the steady state, depending upon the loading conditions, Vin2 D1 + Vin1(1 − D1 ) = ; D1 = .
I L ,avg (Vin2 − Vin1 )
duty ratio, inductance value, and source voltages, the proposed
(13)
converter can either operate in CCM or DCM. However, it can
be seen that irrespective of the operating mode of the converter, By substituting (7) in (13), we get
the steady-state equations for some of the converter parame-  
PT ×R1 PT ×Ra Rb
ters remain unaltered. The equations of these parameters are V1 − Vin1 VT Ra +V1 Rb − Vin1
obtained by applying Kirchhoff’s laws to the circuit shown in D1 = = . (14)
(Vin2 − Vin1 ) (Vin2 − Vin1 )
Fig. 2 and are as follows
To determine D2 , let us assume the condition D1 > D2 .
1) The average inductor current is given by Therefore, by applying the volt–second balance across the
inductor [Fig. 4(a)] and by writing VT in terms of V1 and V2 ,
V1 VT V1 the following formula is obtained:
I L ,avg = I S2 ,avg + I Dd ,avg = = + (7)
R1 Rb Ra (Vin2 − Vin1) × D1 + (Vin1 − VT )
I L ,avg = IPV,avg + IFC,avg . (8) D2 = . (15)
(V1 − VT )

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 1334 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 8, NO. 2, JUNE 2020

Equation (15) is derived assuming D1 > D2 . By applying B. Discontinuous Conduction Mode

the above analysis, it can be seen that the expression for D2
1) Output Voltage V1 : By referring to Fig. 5 and applying
remains the same as (15) even when D1 < D2 .
volt–second balance principle across inductor L 1 , the expres-
2) Output Voltage V1 : By applying volt–second balance
sion for output voltage V1 (irrespective of the duty ratio
principle across inductor L 1 , the expression for the output
condition) can be obtained as follows:
voltage V1 is obtained as
⎫
Vin2 D1 − VT (1 − D2 ) + Vin1(1 − D1 ) ⎬ Vin2 D1 − VT (β − D2 ) + Vin1 (β − D1 )
V1 = V1 = . (23)
D2 . (16) D2
(if D > D or D > D ) ⎭
1 2 2 1
2) Value of β: The value of β is determined by utilizing
3) Ripple in the Inductor Current: From Fig. 4, it can be (23) and the expression for average inductor current, which
seen that the inductor current reaches its peak at D1 T or at can be obtained on similar lines as (7). The value of β is
D2 T (depending upon the operating condition). Hence,
 ⎫
the peak-to-peak ripple in the inductor current is given by −b ± (b2 − 4ac) ⎪
(VT −Vin1)×(1− D1)T β= (if D1 > D2 or D1 < D2 ) ⎪
⎪
⎪
2a ⎪
⎪
i L 1 = (if D1 > D2 ) (17) D2 R 1 ⎪
⎪
L1 where a = × (VT − Vin1), ⎪
⎪
⎪
⎪
(VT −Vin1)×(1− D2)T 2L 1 f  ⎬
i L 1 = (if D2 > D1 and Vin1 > V1 ) 2
D2 R 1 . (24)
L1 b = (VT − Vin1) 1 − ⎪
⎪
⎪
(18) 2L 1 f ⎪
⎪
(Vin2 −V1 )× D1 T ⎪
⎪
and c =
D1 D2 R 1
(D2 − D1 )(Vin2 − Vin1) ⎪
⎪
i L 1 = (if D2 > D1 and Vin1 < V1 ). ⎪
⎪
L1 2L 1 f ⎪
⎭
(19) −D1 (Vin2 − Vin1 ) − VT D2
4) Minimum Inductance Required for CCM: At the bound- 3) Ripple in the Inductor Current and Capacitor Voltage:
ary of CCM and DCM, the minimum value of the inductor From Figs. 3 to 5, it can be seen that the expression for the
current is 0. Therefore, under such condition, the average value inductor current and output voltage ripple can be determined
of inductor current is given by on similar lines as in CCM.

⎫
T (Vin2 − V1 ) × D1 D2 + (VT − Vin1) ⎬
I L ,avg =
2L 1,min × (1 − D1 ) (1 − D2 ) .
⎭
(if D1 > D2 or D1 < D2 ) C. SingleInput Mode
(20) The steady-state equations with the FC source alone
By substituting (7) into (20), we get (in CCM) are the same as (15), (16), (18), (20), and (21)

⎫ with d1 = 0 and Vin2 = 0. This condition is more practical,
R1 1 (Vin2 −V1 ) × D1 D2 + (VT −Vin1) ⎬
L 1,min = × and frequently occurs as FC can be available in the night and
2 f V1 ×(1− D1)(1− D2 ) .
⎭ is a dispatchable source. Similar steady-state equations can be
(if D1 > D2 or D1 < D2 ) derived considering only the PV source. However, in this case,
(21) the conditions would be d1 = 1 and Vin1 = 0.
5) Ripple in the Capacitor Voltage: In the proposed con-
verter, the values of the output capacitors are selected such that
the voltage ripple across them is less than the desired maxi- IV. DYNAMIC M ODELING AND C ONTROLLER D ESIGN
mum value (v c,max ). From Fig. 3(a), it can be seen that when A. Dynamic Modeling
both the switches are ON, C2 delivers the complete power to
the load R2 . On the other hand, for capacitor C1 , it can be The dynamic modeling of a converter is necessary for
seen from Fig. 3 that it is the ac component of the inductor designing the closed-loop controller and for stability evalu-
current which is flowing through it. Hence, the voltage ripple ation. In [22], various dynamic modeling methods have been
in capacitor C2 is more than the voltage ripple in C1 . That proposed, among which state-space averaging (SSA) followed
is, if the same voltage ripple is to be maintained across the by small-signal modeling (SSM) is a well-known method
capacitors, the size requirement of capacitor C1 is less than applied to power electronic converters. In this section, the
capacitor C2 . However, in a BDCMG application with equal dynamic modeling of the proposed converter is carried out
pole voltages, it is desired to have equal capacitance values using SSA followed by SSM. Though SSA and SSM are well
for C1 and C2 . In such a case, the value of C1 is selected to known, they are still included here since the proposed con-
be the same as C2 . The design equation for determining the verter is a special third-order circuit with two control variables.
value of C2 is derived and is given by To obtain the dynamic model, first, the state equations are
determined by applying Kirchhoff’s laws for each operating
D2
C2 = v c2
. (22) mode of the converter. In the proposed converter, inductor
R2 × Vc2 × f current i L and voltages across the capacitors v 1 and v 2 are
From (22), it can be seen that the value of C2 is designed defined as the state variables. Assuming d1 > d2 , the state
for the condition when the ratio D2 /R2 is maximum. matrix equation for the operating mode 1 (0 ≤ t ≤ d2 T )

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 PRABHAKARAN AND AGARWAL: NOVEL FOUR-PORT DC–DC CONVERTER 1335

corresponding to Fig. 3(a) is given by

⎡ ⎤⎫
rL 1 ⎪
⎢ − L1 − L1 0 ⎥⎪
⎪
⎢ ⎥⎪
⎪
• ⎢ 1 −1 ⎥⎪
⎪
x = A1 x + B1 Vin ; where A1 = ⎢ 0 ⎥⎪
⎪
⎢ C 1 R1 C 1 ⎥⎪
⎪
⎣ −1 ⎦⎪
⎬
0 0
⎡ ⎤ R2 C 2 ⎪
⎪
⎡ ⎤ 1 ⎪
⎪
iL 0
 ⎪
⎪
⎢ ⎥ Vin1 ⎪
⎪
x = ⎣ v 1 ⎦, B1 = ⎣ L 1 ⎦, Vin = ⎪
⎪
0 0 Vin2 ⎪
⎪
v2 ⎭ Fig. 6. Control block diagram of the proposed converter to regulate
0 0 (a) inductor current i L and (b) output voltage v 1 .
(25)

where r L is the equivalent series resistance of inductor L 1 . by

Similarly, the states and state matrices for operating mode
x̂ (s)
2 (d2 T ≤ t ≤ d1 T ) [Fig. 3(b)] and operating mode 3 (d1 T ≤ TF (s) = = [s I − A]−1 B. (30)
t ≤ T ) [Fig. 3(d)] are derived and given by û (s)
⎡ ⎤ The converter transfer functions given in (30) are obtained
rL 1 1 for the operating condition d1 > d2 . By repeating the above
⎢ − L1 − L1 −
L1 ⎥
⎢ 1 ⎥ analysis for the other operating condition (i.e., d1 < d2 ),
⎢ −1 ⎥
A2 = A3 = ⎢ 0 ⎥, it is observed that the converter transfer functions remain
⎢ C1 R1 C 1 ⎥
⎣ 1 −1 ⎦ the same as (30). In other words, the dynamic model of the
0 converter remains unchanged irrespective of whether d1 > d2
C2 R2 C 2
⎡ 1 ⎤ or d1 < d2 .
0
⎢ ⎥
B2 = B1 , B3 = ⎣ L 1 ⎦ . (26) B. Controller Design
0 0
0 0 As there are two switches in the proposed converter, it can
work with two degrees of freedom. That is, the pole voltage v 1
Similar to the conventional dc–dc converters, the contin-
and the inductor current i L can be controlled in this converter.
uous averaged model for the proposed converter is obtained
Under this condition, the pole voltage v T is not controlled.
by applying SSA to (25) and (26). The averaged model is
Hence, the proposed converter is suitable for only BDCMG
linearized by SSM performed through small perturbations
tied application, where v T is regulated by some other source
around the dc operating point of the state variables and duty
in the microgrid.
ratios [22], i.e.,
In order to control and regulate i L and v 1 as per the


i = I L + î L designed performance, the appropriate closed-loop controller
x = X + x̂ L ;
v k = Vk + v̂ k (k = 1, 2) is designed based on the converter transfer functions obtained
in (30), which is a 3 × 2 matrix. The elements of this matrix
d y = D y + d̂ y (y = 1, 2). (27)
represent the transfer function between the state variables
Substituting (27) into SSA equation, and by separating the (i L ,v 1 , and v 2 ) and duty ratios (d1 and d2 ), and it can be
perturbation components and dc value components, the fol- seen that none of the terms in the matrix are zero. Hence,
lowing equations are obtained: both i L and v 1 are dependent on duty ratios d1 and d2 .
 Designing controllers considering the coupling relationships
•
x̂ = A x̂ + d̂1 [(A2 − A3 )X + (B2 − B3 )Vin ] of i L and v 1 on d1 and d2 would be very difficult and
(28) tedious. Therefore, to simplify the controller design in this
+ d̂2 [(A1 − A2 )X + (B1 − B2 ) Vin ]
multivariable system, we can use the relative gain array (RGA)
where X = −A−1 × B × Vin , A = A1 D2 + A2 (D1 − D2 ) + A3 analysis for establishing the best input–output pairings for the
(1 − D1 ), and B = B1 D2 + B2 (D1 − D2 ) + B3 (1 − D1 ). controller design [23].
Substituting (25) and (26) into (28), and by rearranging the Table I shows the designed values of various parameters
variables, the small-signal equation can be obtained in the of the proposed converter. Substituting the parameters shown
following form: in Table I into (30), the RGA matrix computed at zero
⎡ ⎤ ⎫ frequency [23] is
• î L
⎬ ⎡ ⎤
d̂ 0.16 0.04
x̂ = A x̂ + Bx û, where x̂ = ⎣ v̂ 1 ⎦ and û = 1
.
d̂2 ⎭ RGA(0) = TF (0) • TF (0)−T = ⎣ 0.07 0.8 ⎦. (31)
v̂ 2
0.77 0.16
(29)
From (31) and from the conclusions drawn in [23], it can be
The transfer function of the proposed converter is obtained seen that the best input for the control of i L is d1 , and the best
by applying the Laplace transformation to (29) and is given input for control of v 1 is d2 . This is also reflected in Fig. 2,

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 1336 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 8, NO. 2, JUNE 2020

Fig. 7. Open-loop Bode plots of the plant transfer function before and after the action of the compensator for (a) inductor current i L control and (b) output
voltage v 1 control.

Fig. 8. (a) V1 versus d1 for different values of d2 . (b) V1 versus d1 for different values of input voltages. (c) VT versus d1 for different values of d2 .
(d) VT versus d1 for different values of input voltages.

TABLE I gain of the inductor current control {i.e., plant × compensator

D ESIGNED C ONVERTER PARAMETERS
where it can be seen that i L and v 1 are more sensitive to d1
and d2 , respectively. Therefore, the relevant transfer functions
of the converter are given by
î L (s) v̂ 1 (s)
TF (1,1)(s) = and TF (2,2)(s) =
d̂1 (s) d̂2 (s)
The control block diagram of the proposed converter is
shown in Fig. 6. As seen, switches S1 and S2 of the proposed
converter are modulated to control i L and v 1 . The controllers
shown in Fig. 6 should be designed such that they provide
the desired phase margin (PM) with suitable bandwidth. Here,
the cutoff frequency of the low-pass filter is selected as
7 kHz. By substituting converter parameters shown in Table I
into (32), the converter transfer functions can be obtained.
The compensators shown in Fig. 6 are designed based on
the k-factor approach [24]. The controllers shown in both the
control loops [Fig. 6] are designed by selecting the desired PM
of 50°. The desired open-loop cutoff frequency of the loop
[Fig. 6(a)]} is selected as 4712.4 rad/s, while for the output
voltage control, it is selected as 3141.6 rad/s. The designed
compensators are given by
260.72 × (s + 1841)
Tci L (s) = ;
s(s + 12060)
1502.5 × (s + 960.3)2
TcV1 (s) = . (33)
s(s + 10280)2
From Fig. 6, (32), and (33), the open-loop Bode plots
of the plant transfer function (i.e., before the action of the
compensator) and loop gain (i.e., after the action of the
compensator) are plotted in Fig. 7. It can be seen that with the
action of the designed compensator, desired PM and crossover
frequency are obtained.
. (32)
The MPPT operation of the PV source is accomplished by
sensing inductor current and PV voltage. Since the inductor
current is proportional to PV current, additional PV current
sensing is not required for the MPPT operation.
V. VOLTAGE G AIN , L OSS M ODELING AND E FFICIENCY
A NALYSIS OF THE P ROPOSED C ONVERTER
Fig. 8 shows the voltage conversion gains of the proposed
converter obtained by varying the duty ratios and the input
voltages. These plots are obtained by using the parame-
ters listed in Table I and steady-state analysis presented in
Section III. The expression or value of output voltage VT
can be obtained from the dc value of state variables given

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 PRABHAKARAN AND AGARWAL: NOVEL FOUR-PORT DC–DC CONVERTER
Fig. 9. Efficiency versus output power for (a) varying load distribution, (b) varying PV voltage, and (c) varying FC voltage.
in (28) (i.e., X = −A−1 × B × Vin ). The load conditions
under which these plots are obtained are also shown in Fig. 8.
It may be noted that the steady-state expressions for V1 and VT
vary based on CCM and DCM operation (Section III). Hence,
while obtaining Fig. 8, the status of whether the converter is in
CCM or DCM operating mode is continuously monitored. This
is done by comparing the value of the converter inductance
[Table I] with the value of L min given in (21).
From Fig. 2, it can be seen that the dominant converter
losses are in inductor, switches, and diodes. The expres-
sions for the inductor loss (PL,loss), diode losses (Pd,losses),
and MOSFET conduction (PswC,losses) and switching losses
(PswS,losses) are available [22]. The diode and MOSFET losses
are computed by utilizing the parameters in datasheets of
IRFP460 and MUR15120. The diode, MOSFET, and inductor
current rms values (i.e., IL,rms , Id,i(rms) , and Isw,i(rms) ) can
be obtained with the help of (12)–(20). The average current
through various diodes (Id,i(avg)) in the circuit can be obtained
from (1)–(9) and (28). The OFF-state voltage across the
MOSFETs (Vsw,i(off)) is given by (10). The total converter
loss is given by
Ploss = PL,loss + Pd,losses + PswC,losses + PswS,losses. (34)
Also, the total output power of the converter is given
by (11). Therefore, the converter efficiency is given by
PT
η= . (35)
Ploss + PT
It can be seen that the efficiency of the converter mainly
depends on the total load and load distribution between
48- and 24-V dc bus [Fig. 2(b)]. A C-program was written in
MATLAB m-file to determine the theoretical efficiency curve
of the proposed converter under various load power conditions.
This curve is obtained by keeping the load distribution between
48- and 24-V dc bus to be constant. Different sets of efficiency
curves were obtained by varying the load distribution between
48- and 24-V dc bus. The obtained efficiency curves are shown
in Fig. 9(a). Fig. 9(b) and (c) shows the efficiency plots
obtained by varying the PV and FC voltages, respectively.
From these curves, it can be concluded that the converter
efficiency remains almost independent of PV and FC voltage
variations. Furthermore, it can be observed that for a given out-
put power, the converter efficiency increases with a decrease
in total load at 24-V dc bus terminal [i.e., at terminal “O–N”
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1337
Fig. 10. Photograph of the proposed converter prototype.
shown in Fig. 2(b)] as the current flowing through S2 and Dc
decreases.
VI. E XPERIMENTAL AND S IMULATION R ESULTS
To validate the efficacy of the proposed converter, a labo-
ratory prototype of the proposed converter has been built and
tested with the control strategy shown in Fig. 6. The converter
prototype is designed for a rated power of 200 W. The
designed inductor and capacitor values along with the selected
switching frequency are listed in Table I. The source and load
ratings are given in Table II. The part number and ratings of
various components used in the hardware prototype are given
in Table III. For experimental validation, a PV emulator of
specifications shown in Table II is utilized as the PV source.
A dc power supply, with voltage and a current rating shown
in Table II, is used to represent the FC source. The output
terminals of the converter prototype are connected to the 48-V
BDCMG. The voltage at the 48-V terminal is regulated by
another source (a battery source) in the dc microgrid. The
proposed converter injects appropriate current into the 48-V
dc bus terminal and sees an effective resistance Rb connected
across its terminal. At the 24-V dc terminal, the proposed
converter regulates the output voltage to 24 V and sees an
effective load resistance Ra .
The overall control strategy in the discrete domain
(with a sampling time of 10 μs) is implemented in
TMS320f28335 DSP microcontroller from Texas Instruments
Incorporated. It is observed that the entire control loop is
executed in less than 4 μs. This demonstrates that the proposed
control strategy is computationally less intensive.
 1338 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 8, NO. 2, JUNE 2020

Fig. 11. Open-loop simulation results. (a) Inductor current (0.5 A/div). (b) Drain-to-source switch voltages (10 V/div). (c) Output voltage V1 (10 V/div).

Fig. 12. Open-loop experimental results. (a) Inductor current (1 A/div). (b) Drain-to-source switch voltages (20 V/div). (c) Output voltage V1 (5 V/div).

TABLE II TABLE III

C ONVERTER P ROTOTYPE ’ S S OURCE AND L OAD PARAMETERS S PECIFICATION OF THE C OMPONENTS U SED IN
THE C ONVERTER P ROTOTYPE

The experimental setup is subjected to disturbances such

as a change in solar insolation, a change in load, and a
change in output voltage reference. The effectiveness of the
converter prototype with the control loop is examined under
the mentioned disturbances. Fig. 10 shows the photograph of
the built converter prototype. Before testing the performance
of the proposed converter in hardware, the effectiveness of the
converter is first verified using MATLAB simulations in the
Simulink platform. The power rating and various parameters
of the proposed converter used in the simulation are the same
as those utilized in the hardware.
To test the performance of the converter in the steady state
and to validate its analysis presented in Section III-A, the pro-
posed converter is tested in the open loop (in both simulation
and hardware). The output terminal “O–N” [Fig. 2(b)] of the
converter is connected to the 24-V side of the BDCMG with a
load resistance of Rb = 37.41 . The output terminal “P–N”
of the converter is connected to the 48-V side of the BDCMG
with a battery source regulating its output voltage. To obtain
the desired output voltage and inductor current, i.e., V1 = 24 V
and I L = 2.5 A, the duty cycles d1 and d2 are calculated
as 0.33 and 0.25, respectively. These values are calculated
from (7), (8), and (11)–(15). The pulses to switches with the
above-mentioned duty ratios are generated in the open loop
through the TMS320f28335 digital controller. Fig. 11 shows
the inductor current, drain–source switch voltages, and output
voltage V1 obtained through MATLAB simulations. Fig. 12
shows the corresponding results obtained through hardware
experiments. From Figs. 11(a) and 12(a), it can be seen that the
average inductor current is around 2.5 A, which is equivalent
to the desired value. A similar observation can be made for
the output voltage V1 , which is shown in Figs. 11(c) and
12(c). From Figs. 11(b) and 12(b), it can be seen that the
drain–source switch voltages across S1 and S2 correspond to
Vin2 − Vin1 and VT − V1 , respectively.
To test the controller and dynamic performance of the
proposed converter, the system is tested in the closed loop
in both simulation and hardware. The controller parameters
are listed in Section IV-B. The FC voltage is set at 32 V,
solar insolation is set at 1000 W/m2 at 65 °C (Vmpp =
63 V and Impp = 2.2 A), and the load at 24-V dc bus is

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 PRABHAKARAN AND AGARWAL: NOVEL FOUR-PORT DC–DC CONVERTER 1339

Fig. 13. Closed-loop results depicting output voltage V1 and inductor current i L . (a) Simulation results at 1000 W/m2 . (b) Experimental results at 1000 W/m2 .
(c) Simulation results with change in solar irradiation. (d) Experimental results with a change in solar irradiation.
TABLE IV
C OMPARISON OF P ROPOSED T OPOLOGY W ITH S OME S IMILAR T OPOLOGY

Fig. 14. (a) Experimental results at solar irradiation of 500 W/m2 .

(b) Converter efficiency versus output power.

Fig. 15. Closed-loop control results depicting output voltage v 1 , average

configured at 60 . The inductor current reference is obtained
through the incremental conductance MPPT algorithm, and the
output voltage reference V1r ef is set at 24 V. Fig. 13(a) and
(b) shows the simulation and experimental results obtained
under this condition. To validate the dynamic performance of
the proposed converter, the experimental setup is subjected to
disturbances such as a change in solar irradiation. Fig. 13(c)
and (d) shows the inductor current and output voltage V1 with
a change in solar irradiation. From Fig. 13, it can be observed
that the experimental results obtained are in accordance with
the simulation results. It can also be seen that the designed
voltage controller regulates the output voltage V1 to 24 V even
with the change in solar irradiation.
Fig. 14(a) presents the closed-loop experimental results at
solar irradiation of 500 W/m2 at 50 °C (Vmpp = 63 V and
Impp = 1.32 A). It was observed that the MPPT algorithm
tracks the maximum power point with a tracking efficiency
of 97%. The efficiency of the proposed converter prototype
is practically measured by varying the output power from
35 to 175 W. Fig. 14(b) shows the efficiency plot of the pro-
posed converter versus the total output power. Here, the load
distribution between 48- and 24-V dc bus terminals is not
PV current ipv,avg , and inductor current i L with PV source switched OFF.
(a) Simulation results. (b) Experimental results.
fixed and is randomly selected. From the efficiency mea-
surement, it can be seen that the proposed converter has
a peak efficiency of 93% at an output power of 75 W,
and efficiency of around 86.5% close to the rated power
output. It must be noted that the MOSFETs and diodes are
overrated in the converter prototype. This undermines the
efficiency of the proposed converter. Nevertheless, it can be
seen that the proposed converter exhibits higher efficiency
and has fewer components compared to the conventional
dc–dc converter with the same number of output and input
ports.
To demonstrate the SIDO capability of the proposed con-
verter, the output of the PV emulator is forced to 0, and
only the FC source is operated as the input source. Fig. 15(a)
and (b) presents the closed-loop experimental results for this
condition. These results are obtained considering Vin1 = 30 V
and Vin2 = 60 V. From Fig. 15, it can be seen that when PV
is turned off, the converter continues to regulate the voltage
V1 and supply power to the BDCMG.

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 1340 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 8, NO. 2, JUNE 2020
Table IV shows the comparison of the proposed dc–dc
converter with some of the similar dc–dc converters. As seen,
the proposed converter has a lower component count with
higher efficiency.
Overall from the simulation and experimental results, it can
be seen that the converter works effectively in the BDCMG
tied mode. However, for actual onsite implementation, start-up
strategies [25] must be incorporated for FC source as it needs
some time to startup before supplying power.
VII. C ONCLUSION
In this paper, a new DIDO dc–dc converter is proposed,
which is used for interfacing PV and FC sources to a low-
voltage BDCMG system. Compared to the conventional mul-
ticonverter counterparts, the proposed converter uses fewer
switches and only one inductor. Hence, the converter is com-
pact, efficient, and cost-effective. As there are two switches,
the proposed converter can work with two degrees of freedom.
Furthermore, the converter is also capable of operating as an
SIDO converter. It was analyzed and concluded that for a given
set of output voltages and based on the values of the input
voltages, the duty ratios d1 and d2 can take two conditions,
i.e., d1 < d2 or d1 > d2 . In-depth steady-state analysis of the
converter was presented for both CCM and DCM operation.
A detailed dynamic modeling of the proposed converter was
carried out considering the two possible duty ratio conditions.
It was observed that the dynamic model of the converter
remains unchanged irrespective of the duty ratio conditions.
Hence, only one set of controllers was designed and utilized to
control the converter. This proved that the control complexity
of the proposed converter is relatively low.
Both open-loop and closed-loop simulation and exper-
imental results are presented to validate the steady-state
and dynamic performance of the proposed converter. It was
observed that the MPPT operation of the PV was accom-
plished by sensing only the inductor current and PV voltage.
Therefore, the requirement for PV current sensor is eliminated.
It was seen that under various conditions such as sudden
change in solar irradiation and rapid change in load power
demand, the pole voltage on the 24-V dc side and the PV
power are regulated to the desired values. This validates
the performance of the designed controllers. Furthermore,
it was observed that the experimental results obtained are
in accordance with the theoretical analysis and simulation
results. The efficiency of the proposed converter was analyzed
theoretically and measured practically. It was observed that the
proposed converter exhibits a peak efficiency of around 93%
and an efficiency of around 87% close to the rated power
(200 W).
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