Matrusri Engineering College

#16-1-486, Saidabad, Hyderabad-500059.

Department of Electrical and Electronics Engineering

MID-II EXAMINATION SET-B

Class: BE EEE IV SEM (AICTE) Faculty: Mr. Praveen Reddy Maali

Sub: Digital electronics and logic design Total marks: 20

1. In a weighted resistor type Digital to analog converter calculate the output voltage if feedback
resistance is equal to load resistance (Rf=R) also constant K=1, reference voltage equal to non-
inverter mode operational amplifier voltage at the instant 3-bit binary output voltage 010?

a) ⅛  Vfs b) 2/8   Vfs c) 4/8 Vfs   d) 6/8 Vfs

2. In an R-2R ladder type DAC consider a 3-bit output whose switch position d1 d2 d3
corresponds to binary word 001, the typical value R ranges from 2.5 kilo ohms to 10 kilo ohms
calculate the output voltage with respect to Reference node?

a) ⅛  Vfs b) 2/8   Vfs c) 4/8 Vfs   d) 6/8 Vfs

3. How many flip-flops are required to construct a decade counter, how many different states
does a 3-bit asynchronous counter have?

a) 4, 8 b) 4, 16 c) 8, 4 d) 16, 4

4. What output voltage would be produced by a DAC whose output range is 0 to 10 volts and
whose output binary number is 0110 for a 4 bit DAC?

a) 5.37 b) 3.75 c) 2.85         d) 8.52

 5. The JK flip-flop is basically an SR flip flop with feedback which enables only one of its two
input terminals, either SET or RESET to be active at any one time thereby eliminating the ? 

a) Toggle state  b) Invalid state c) No change state d) set or Reset state

 Matrusri Engineering College
#16-1-486, Saidabad, Hyderabad-500059.
Department of Electrical and Electronics Engineering

6. A ring counter is a type of counter composed of flip-flops connected into a shift register, with
the output of the last flip-flop connected, also in a JK flip flop if J=K the resulting flip flop is
referred to as ?

a) clock, T flip flop 

b) Input , D flip flop
c) clock, D flip flop
d) Input , T flip flop

7. The chip by which both the operation of read and write is performed

a) RAM b) ROM c) PROM d) EPROM

8. The magnetic core memories have been replaced by semiconductor RAMs, why?

a) Semiconductor RAMs are highly flexible

b) Semiconductor RAMs have highest storing capacity
c) Semiconductor RAMs are smaller in size
d) All of the Mentioned

9. Assume that you are using JK flip flop to construct a positive edge triggered synchronous
counter. Now calculate how many flip flops are required to construct a  MOD - 6 synchronous
counter?

a) 1 b)  2 c)   3 d)  4

10. Which type of PLD should be used to program basic logic functions

a) PLA b) PAL c) CPLD d) SLD

11. Once a PAL has been programmed

a. It cannot be reprogrammed
b. Its outputs are only active highs 
c. Its outputs are only active lows 
d. Its logic capacity is lost
 Matrusri Engineering College
#16-1-486, Saidabad, Hyderabad-500059.
Department of Electrical and Electronics Engineering

12. When is the prohibited state/condition in SR latch and needs to be avoided due to
unpredictable nature of output?

a. S=R=0
b. S=0;R=1
c. S=1;R=0
d. S=R=1

13.The logic circuit whose outputs at any instant of time  depends not only present input but also
past outputs are called 

a. combinational circuits
b. sequential circuits
c. Latches
d. Multiplexers 

14. In an Asynchronous counter all the clock pulses or triggering for each flip flop is provided  

a. one after the other

b. only for first flip flop
c. only for end flip flop
d. simultaneously for all flip flops

15. The group of flip-flops, which are used to hold store the binary data is known as 

a. Decoder
b. Register
c. Counter
d. frequency divider

16. RAM memory is called volatile memory since cutting off power to the IC will result in the
loss of Data. Sometimes RAM is also referred to as RAWM (read and write memory), in contrast
to ROM which of the following comes under types of RAM. 

a. Dynamic RAM, Erasable RAM

b. Erasable RAM, Dynamic RAM
c. Dynamic RAM, Static RAM
d. Static RAM, Dynamic RAM

 
 Matrusri Engineering College
#16-1-486, Saidabad, Hyderabad-500059.
Department of Electrical and Electronics Engineering

17. When considering weighted resistor type Digital to Analog converter it uses a summing
amplifier with binary weighted resistor network, the disadvantage of this weighted resistor DAC
is?

a. It requires wide range of capacitors values to store data

b. It requires wide range of resistor values
c. The frequency matching is not possible
d. None of the above

18. When considering a Static RAM and Dynamic RAM in terms of size of memory an         
  8*4 RAM means it has got 8 locations and in each location it can store 4 bits of data, now
calculate how many address lines it has got?
 
a) 1 b) 2 c) 3 d) 4

19. Choose the applications of Shift Registers and counters respectively which are using flip
flops?

a) Parallel to serial converter, Analog clocks 

b) Analog clocks, Parallel to serial converter
c) Parallel to serial converter, Digital clocks
d) Digital clocks, Parallel to serial converter

20. The dual slope ADC integrates the input signal for a fixed time hence it provides --------------
noice rejection of AC signals.

a) Very weak noise rejection

b) Excellent noise rejection
c) Moderate noise rejection
d) None of the above
 Matrusri Engineering College
#16-1-486, Saidabad, Hyderabad-500059.
Department of Electrical and Electronics Engineering

Answers

1.   2/8 Vfs
2.    ⅛ Vfs
3.  4,8
4.  3.75
5.  Invalid state
6.  Input, T flip flop
7.  RAM
8.  All of the above
9.  3
10. PAL
11. It cannot be reprogrammed
12. S=R=1
13. Sequential circuits
14. One after the other
15. Register
16. Static RAM, Dynamic RAM
17. It requires wide range of resistor values
18. 3
19. Parallel to serial converter, Digital clocks
20. Excellent noise rejection