EECS 105 Spring 2004, Lecture 27

Lecture 27:
Frequency response

Prof J. S. Smith

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Context
Today, we will continue the discussion
of single transistor amplifiers by
looking at common source amplifiers
with source degeneration (also
common Emitter amplifiers with
emitter degeneration.
We will then start discussing the
frequency response of single stage
amplifier, the frequency response of
CE amps, and the Miller
approximation.

Department of EECS University of California, Berkeley

1
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Lecture Outline

z Emitter Degeneration
z Frequency response of the CE and
CS current amplifiers
z Unity-gain frequency ωT
z Frequency response of the CE as
voltage amp
z The Miller approximation

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Bias sensitivity
z When a transistor biasing circuit is designed, it is
important to realize that the characteristics of the
transistor can vary widely, and that passive
components vary significantly also.
z Biasing circuits, must therefore be designed to
produce a usable bias without counting on specific
values for these components.

z One example is a BJT base bias in a CE amp. A

slight change in the base-emitter voltage makes a
very large difference in the quiescent point. The
insertion of a resistor will improve sensitivity.

Department of EECS University of California, Berkeley

2
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Typical “Discrete” Biasing

VCC z In this scheme, the base bias
voltage is given by a voltage
RC divider: R1
VB = VCC
R1 + R2
R1
z The emitter will approximately
follow the base voltage, so the
R2 emitter current is:
RE
⎛ R1 ⎞
I E ≈ ⎜ VCC − VBE ,on ⎟ / RE
⎝ R1 + R2 ⎠

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Gain for “Discrete” Design

Rin ≈ rπ + ( β + 1) RE
Rin ≈ ( β + 1) RE RC
R1 ~ vs RC / RE

vs / RE
vs R2 ~ vs
RE

Rin 2 ≈ ( β + 1) RE || R1 || R2

Can be made large to couple

All of source to input (even with RS)

Department of EECS University of California, Berkeley

3
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Insensitivity to transistor parameters

z Most of the circuit parameters are independent of
variation of the transistor parameters, and depend
only on resistance ratios. That is often a design
goal, but in integrated circuits we will not want to
use so many resistors.

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Emitter Degeneration
z The addition of the resistor at the emitter will have
several additional effects:
– The transconductance will be reduced
– The output resistance will be increased
– The input resistance will be increased
z Each of these are a result of the negative feedback
from the presence of the emitter resistor.

Department of EECS University of California, Berkeley

4
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Source Degeneration
z Source degeneration for a FET is not as common as
emitter degeneration is for a BJT, because the gain
of a FET is already lower than for an BJT, and its
input impedance is already ∞.
z It is widely used, however, to raise the output
impedance of CS amplifiers

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Source degeneration in a CS amp

z The input impedance of
the amplifier is still ∞
z Assume that the body is
still connected to ground

Department of EECS University of California, Berkeley

5
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Small signal model

z CS amp with source degeneration:

i0

+ +

vin RD v0
+
vs RS
− − −

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Circuit gain calculation

z From KCL at the source,
vs v s
+ = g m ( vi − vs ) + g mb (0 − vs )
RS r0
z At the Drain:
v
i0 + s = g m ( vi − vs ) + g mb (0 − vs )
r0
z The circuit’s transconductance:
i0 gm
Gm = =
vi 1 + ( g + g ) R + RS
m mb S
r0
z Because of the body effect, the output is still
dependant on the transistor characteristics
Department of EECS University of California, Berkeley

6
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Output impedance
z To calculate the output impedance, we put in a test
current and calculate the voltage:
i0

+ +

vin it vt
+
vs RS
− − −

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Output impedance
z Since all of the test current must go through RS, if
we take i1 to be the current through ro, we have:
vt = vs + i1r0 = vs + r0 [1 + g m + g mb ) RS ]

z From which we get the output resistance:

vt
R0 = = RS + r0 [1 + ( g m + g mb ) RS ]
it

Department of EECS University of California, Berkeley

7
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Frequency response
z So far, we have modeled the small signal response
of the stages for low frequencies (but not so low
that we couldn’t neglect the DC blocking coupling
capacitors!)
z Now we will put in the parasitic capacitances, and
analyze the changes in the transfer functions of the
circuits at higher frequencies.

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Parasitic Capacitances
z If we look at the small signal model of the FET that
we developed a few weeks ago, we have
capacitances between the gate and the source, and
the gate and the drain

Department of EECS University of California, Berkeley

8
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

CS with parasitics
z When we take into account a finite source
impedance in a common source amplifier, the
capacitances will reduce the voltage swing at the
gate at high frequencies.

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Parasitic Capacitances
The transfer function will be a low pass filter, with a
pole at the frequency determined by the source
resistance and the capacitance.
rs

vs

Department of EECS University of California, Berkeley

9
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Miller approximation
z However, the capacitance from the gate to the drain
has a large effect, because the voltage on the drain
is amplified, with a negative gain coefficient.
z This means that the contribution of the capacitance
from the gate to the drain is comparable to the same
capacitance to ground, multiplied by the gain of the
transistor.
z This is called the Miller effect.
z We can approximate the effect, by simply putting
in a capacitance to ground, multiplied by the low
frequency gain. This is called the Miller
approximation

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

High frequency zero

At very high frequencies, the gain flattens out again,
because the capacitor couples from the gate to the
drain directly, as a passive circuit
rs

vs

Department of EECS University of California, Berkeley

10
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Magnitude Bode Plot

pole

Low frequency
gain βo

Unity current gain

0 dB

zero

ωp
ωT ωz
Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

CE Amplifier with Current Input

Find intrinsic current gain by driving with infinite source impedance and
Zero load impedance…

Department of EECS University of California, Berkeley

11
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Short-Circuit Current Gain

Small-signal
Pure input current short circuit
(RS = 0 Ω) (could be a DC
voltage source)

Substitute equivalent circuit model of transistor and do the “math”

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Small-Signal Model: Ai

Note that ro, Ccs play no role (shorted out)

Department of EECS University of California, Berkeley

12
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Phasor Analysis: Find Ai

KCL at the output node:

I out = g mVπ + (0 − Vπ ) / Z µ

KCL at the input node:

I in = Vπ / Zπ + (Vπ − 0 ) / Z µ

Solve for Vπ :

Vπ = (1/ Zπ + 1/ Z µ ) −1 I in
Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Phasor Analysis for Ai (cont.)

I out = ( g m − jωCµ )Vπ

Substituting for Vπ
( g m − j ωC µ )
Ai ( jω ) =
(1 / Zπ ) + jωCµ
rπ
Substituting for Zπ = rπ || (1/jωCπ) Zπ =
1 + jω rπ Cπ
β 0 (1 − jωCµ / g m )
Ai ( jω ) =
1 + jω rπ (Cπ + Cµ )
Department of EECS University of California, Berkeley

13
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Short-Circuit Current Gain Transfer Function

Transfer function has one pole and one zero:

β o (1 − jω [C µ / g m ])
Ai ( jω ) =
1 + jω [rπ (Cπ + C µ )]
β o (1 − jω / ω z )
Ai ( jω ) =
(1 + jω / ω p )

Note: Zero Frequency much larger than pole:

gm β 1 1
ωz = = >β = βω p
Cµ rπ Cµ rπ (Cµ + Cπ )
Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Magnitude Bode Plot

pole

βo 1
βo Ai ( jω ) ≈ =
jω / ω p jω / ωT
Unity current gain

0 dB

zero

ωp
ωT ωz
Department of EECS University of California, Berkeley

14
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Transition Frequency ωT

gm
ω T = β oω p =
Cπ + C µ

Dependence on DC collector current:

Base Region
Transit Time!
Cπ = C je + Cdiff
Cdiff = g mτ F = τ F qI / kT

Limiting case: f = ωT → 1
2π 2πτ F
T

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Common Source Amplifer: Ai(jω)

DC Bias is problematic: what sets VGS?

Department of EECS University of California, Berkeley

15
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

CS Short-Circuit Current Gain

g m (1 − jωC gd / g m )
Transfer function: Ai ( jω ) =
jω (C gs + C gd )

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

MOS Unity Gain Frequency

z Since the zero occurs at a higher frequency than
pole, assume it has negligible effect:

gm gm
Ai ≈ =1 ωT =
jω (C gs + C gd ) (C gs + Cgd )

W
g
µ Cox (VGS − VT )
3 µ (VGS − VT )
ωT ≈ m = L =
C gs 2
WLCox 2 L2
3
Performance improves like L^2 for long channel devices!
For short channel devices the dependence is like ~ L^1
VGS − VT Time to
3 µ (VGS − VT )
µ µ Eeff v cross
ωT ≈ ~ L = = =τL channel
2 L2 L L L
Department of EECS University of California, Berkeley

16
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Miller Impedance
z Consider the current flowing through an impedance
Z hooked up to a “black-box” where the voltage
gain from terminal to the other is fixed (as you can
see, it depends on Z)
v2
Av = I
v1 Z

v1 v2

v1 − v2 v1 − Av v1 1 − Av
I= = = v1
Z Z Z
Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Miller Impedance
z Notice that the current flowing into Z from terminal
1 looks like an equivalent current to ground where
Z is transformed down by the Miller factor:
1 − Av Z
I = v1 → Z M ,1 =
Z 1 − Av
z From terminal 2, the situation is reciprocal

v2 − v1 v2 − Av−1v2 1 − Av−1
−I = = = v2
Z Z Z
Z
Z M ,2 =
1 − Av−1

Department of EECS University of California, Berkeley

17
EECS 105 Spring 2004, Lecture 27 Prof. J. S. Smith

Miller Equivalent Circuit

Note: Z M ,1 + Z M ,2 = Z

Z Z
Z M ,1 = Z M ,1 =
1 − Av 1 − Av−1

z We can “de-couple” these terminals if we can

calculate the gain Av across the impedance Z
z Often the gain Av is weakly dependent on Z
z The approximation is to ignore Z, calculate A, and
then use the decoupled miller caps
Department of EECS University of California, Berkeley

18