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INVESTIGATION OF A DIODE-CAPACITOR

ASSISTED SINGLE-PHASE POWER FACTOR


CORRECTED BOOST-BUCK AC-DC CONVERTER
A Thesis

Presented to the

Department of Electrical and Electronic Engineering

In Partial Fulfillment of the Requirements for the Degree

Master of Science in Electrical and Electronic Engineering

By

Md. Jannatul Ferdous

Bangladesh University of Engineering and Technology (BUET)

Dhaka, Bangladesh

January, 2017
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ACKNOWLEDGEMENTS

All praise be to Allah and I thank Allah for enlightening my way and directing me
through each and every success I have or may reach.

I would like to express my sincere gratitude and deep appreciation to my supervisor,


Professor Dr. Mohammad Jahangir Alam for his guidance, encouragement and
assistance in the process of completing this work. I also pay deep reverence to him for his
research motivation and encouragement to me and for having faith on me with my work.

I would like to thank gratefully to Dr. Mohammad Ali Choudhury for his persistent
valuable guidance and suggestions in my thesis work. It is my great fortune to work
under his guidance. My heartfelt thanks to him for his support, belief and patience on me
and many opportunities he has given me over the years.

Finally, I would like to pay my profound gratitude and genuine thanks to my parents, my
wife Umme Salma and my friend Shahriar Kabir for their inspiration towards the
completion of this work.

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ABSTRACT
Single phase active input power factor corrected and input current improved rectifiers use
switching either between the rectifier and the load or between the supply and the rectifier.
Voltage and current feedback control produces the gate pulse necessary for the
improvement of input current total harmonic distortion, high input power factor and
regulated output voltage at acceptably high power conversion efficiency. Usually the
boost switching stage is popular due to its advantage of availability of input inductor
current tracking with input voltage. The ĈUK and SEPIC switching stage having input
boost switching topology may be used where boost-buck voltage/current gain is
necessary. In all the topologies, the ideal voltage gain and conversion efficiency deviates
significantly at very high or at very low duty cycle of the switching signal of the switch.
In DC-DC converter this problem is addressed by pre/post gain or attenuation by flyback
or feed forward high frequency transformer topologies. The same pre/post gain operation
can be achieved by transformerless diode-capacitor-inductor voltage/current
divider/multiplier circuit. In this research similar considerably high efficiency operation
of a boost-buck AC-DC converter is investigated. The input to AC-DC rectifier has boost
topology in the front followed by a capacitor diode voltage divider. AC-DC converters
have additional requirements of input current total harmonic reduction and high input
power factor. The proposed converter is therefore designed and studied for proper
voltage/current feedbacks. The feedbacks also maintain regulated dc output voltage of the
proposed converter. The open loop operation results of the proposed converter are
substantiated by prototype small scale experimental circuit.

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TABLE OF CONTENTS

ACKNOWLEDGEMENTS iv
ABSTRACT v
LIST OF TABLES ix
LIST OF FIGURES x
LIST OF ABBREVIATIONS OF TECHNICAL TERMS xxii

Chapter 1 : INTRODUCTION
1.1 AC -DC Conversion 1
1.2 Background and present status of the problem 1
1.3 Major Challenges of PFC Techniques 2
1.4 Goal of this Thesis 3
1.5 Thesis Organization 3

Chapter 2 : AC-DC CONVERTER AND ITS PROBLEM IN USE


2.1 Introduction 5
2.2 Single phase Half- Wave AC-DC Converter 6
2.3 Single Phase Full Wave AC-DC Converter 7
2.4 Three Phase AC-DC Converter 10
2.5 Problem associated with the single-phase AC-DC converter connected 13
in line

Chapter 3 : POWER FACTOR CORRECTION: DIFFERENT APPROACHES


3.1 Passive PFC Approach 20
3.2 Active PFC Approach 23
3.2.1 Buck Converter Based Active PFC 24
3.2.2 Boost Converter Based Active PFC 27
3.2.3 Buck-Boost Converter Based Active PFC 29
3.2.4 SEPIC Converter Based Active PFC 32

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Chapter 4 : DIODE-CAPACITOR ASSISTED BOOST-BUCK AC-DC CONVERTER
FOR PFC

4.1 Proposed Boost- Buck AC-DC Converter-Output Split Capacitor 35


4.2 Principle of Operation 36
4.2.1 Ideal Voltage Gain Expression of Proposed Boost-Buck single- 40
phase AC-DC converter
4.3 Proposed Boost-Buck AC-DC Converter, Output Bridge Rectifier 47
4.3.1 Principle of Operation of Output Bridge Type Proposed Boost 48
Buck Converter
4.3.2 Ideal Input/output Voltage Relationship of Proposed Boost-Buck 50
Output Bridge type AC-DC Converter
4.4 Circuit Parameters 53
4.5 Performance of Proposed Split Capacitor Output Circuit 53
4.5.1 Proposed converter performance at different switching 54
frequencies
4.6 Discussions 81

Chapter 5 : INPUT CURRENT AND POWER FACTOR IMPROVEMENT OF


PROPOSED SINGLE -PHASE AC-DC CONVERTER
5.1 Control Circuit of Proposed AC-DC Converter 82
5.2 Working Procedure 83
5.3 Tuning of PI Control Circuit: 86
5.4 Stable Dynamic Response of Proposed Converter using PI controller 89
5.5 Input Current Shaping by PI controller 92
5.6 Stablity of output voltage in case of source disturbances 98
5.7 Input Power Factor Improved by PI controller 103
5.8 Discussions 106

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Chapter 6 : EXPERIMENTAL RESULTS OF THE PROPOSED SINGLE PHASE
BOOST- BUCK CIRCUIT WITHOUT FEEDBACK CONTROL
6.1 Proposed PFC circuit practical prototype and its typical performance 108
6.2 Comparison between Experimental and Simulated Results 150
6.3 Discussion 153

Chapter 7 : CONCLUSION
7.1 Summary of the Thesis 154
7.2 Future Work 155

References 156

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LIST OF TABLES
Table 2.I : Calculation of Total Harmonic Distortion (THD%) in Pspice 16
Software
Table 4-I(a) : Simulated and theoretical output voltage comparison Table 46
Table 4-I(b) : Simulated and theoretical output voltage comparison Table 52
Table 4-II : Parameters of proposed circuit used for simulation 53
Table 4-III : Comparison Table in terms of THD, Input power factor, 62
Efficiency and Gain for fs = 2 KHz
Table 4-IV : Comparison Table in terms of THD, Input power factor, 66
Efficiency and Gain for fs = 3 KHz
Table 4-V : Comparison Table in terms of THD, Input power factor, 69
Efficiency and Gain for fs = 4 KHz
Table 4-VI : Comparison Table in terms of THD, Input power factor, 72
Efficiency and Gain for fs = 5 KHz
Table 4-VII : Comparison Table in terms of THD, Input power factor, 75
Efficiency and Gain for fs = 6 KHz
Table 4-VIII : Comparison Table in terms of THD, Input power factor, 78
Efficiency and Gain for fs = 7 KHz
Table 5-I : Effect of THD at different boost inductor values with and 97
without control
Table 5-II : Input power factor without control (Buck mode) 103
Table 5-III : Input power factor with PI controller (Buck mode) 104
Table 5-IV : Input power factor without control (Boost mode) 105
Table 5-V : Input power factor with PI controller (Boost mode) 105
Table 6-I : List of components and their corresponding values for 108
practical circuit
Table 6-II : List of figures and their names 109
Table 6-III : Comparison Table between experimental and simulated data 150

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LIST OF FIGURES
Fig. 2.1 : Classification of AC-DC converter 5
Fig. 2.2 : Single phase half wave AC-DC Converter 6
Fig, 2.3 : Single phase half wave AC-DC Converter input-output 6
Fig. 2.4 : Bridge Full-Wave AC-DC Converter 8
Fig. 2.5 : Single phase Full wave AC-DC Converter input-output 8
Fig. 2.6 : Center-tapped transformer AC-DC converter 9
Fig. 2.7 : Center tapped Full wave AC-DC Converter input-output. 10
Fig. 2.8 : Three-phase star AC-DC converter 10
Fig. 2.9 : Three phase full wave star AC-DC Converter input-output. 11
Fig. 2.10 : Three Phase full wave Bridge AC-DC converter 12
Fig. 2.11 : Three phase full wave bridge AC-DC Converter input-output. 12
Fig. 2.12 : Rectifier circuit used for simulation of single phase bridge 14
rectifier.
Fig. 2.13 : Input-Output Voltages of the AC-DC converter of Fig. 2.12 14
Fig. 2.14 : Input-Output Voltages of the AC-DC converter of Fig. 2.12 15
Fig. 2.15 : FFT of input pulse current drawn by the converter during 15
operation.
Fig. 3.1 : Inductor on the AC side of the diode bridge AC-DC 20
Converter
Fig. 3.2 : Input-Output Voltages of AC-DC Converter of Fig 3.1 20
Fig. 3.3 : Input current of AC-DC Converter of Fig 3.1 21
Fig. 3.4 : Inductor on the DC side of the diode bridge AC-DC 22
Converter
Fig. 3.5 : Input-Output Voltage of the AC-DC Converter of Fig 3.4 22
Fig. 3.6 : Input current of the AC-DC converter circuit of Fig 3.4 23
Fig. 3.7 : Buck converter based active PFC circuit (No feedback control 24
used)
Fig. 3.8 : Input-Output Voltage of Buck Converter Active PFC of the 25
circuit of Fig. 3.7 (No feedback control used)

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Fig. 3.9 : Input Current of Buck Converter Active PFC of the circuit of 26
Fig. 3.7 (No feedback control used)
Fig. 3.10 : FFT Analysis of Input Current of Fig 3.9 26
Fig. 3.11 : Input-Output Voltage of Buck Converter Active PFC (No 27
feedback control used)
Fig. 3.12 : Input-Output Voltage of Boost Converter Active PFC of the 28
circuit of Fig. 3.11(No feedback control used)
Fig. 3.13 : Input Current of Boost Converter Active PFC of the circuit of 28
Fig. 3.11(No feedback control used)
Fig. 3.14 : FFT Analysis of Input Current of Fig 3.13 29
Fig. 3.15 : Buck-Boost converter based active PFC circuit (No feedback 30
control used).
Fig. 3.16 : Input-Output Voltage of Buck-Boost Converter Active PFC 30
of the circuit of Fig 3.15 (No feedback control used)
Fig. 3.17 : Input Current of Buck-Boost Converter Active PFC of the 31
circuit of Fig 3.15 (No feedback control used)
Fig. 3.18 : FFT Analysis of Input Current of the Fig 3.17 31
Fig. 3.19 : SEPIC converter based active PFC circuit (No feedback 32
control used)
Fig. 3.20 : Input-Output Voltage of SEPIC Converter Active PFC of the 33
Fig 3.19 (No feedback control used)
Fig. 3.21 : Input Current of SEPIC Converter Active PFC of the Fig 3.19 33
(No feedback control used)
Fig. 3.22 : FFT Analysis of Input Current of the Fig 3.21 34
Fig. 4.1 : The Proposed Diode-Capacitor Assisted Boost-Buck AC-DC 35
Converter for PFC and low THD of the Input Current.
Fig. 4.2 : Current Flow diagram of State-A 36
Fig. 4.3 : Illustration of State-B with current flow direction. 38
Fig. 4.4 : Illustration of State-C 38
Fig. 4.5 : Illustration of State D 39
Fig. 4.6 : Voltage gain of proposed converter 40

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Fig. 4.7 : Proposed Boost-Buck AC-DC Converter, Output Bridge 47
Rectifier
Fig. 4.8 (a) : Proposed Boost-Buck AC-DC Converter circuit during state - 48
A and B of +ve supply sine wave when the switch is ON(state
A)
Fig. 4.8 (b) : Proposed Boost-Buck AC-DC Converter circuit during state - 49
A and B of +ve supply sine wave when the switch is OFF
(state B)
Fig. 4.9 :I Input current of Proposed Converter at fs = 2 KHz, D = 0.3 55
Fig. 4.10 : Input current FFT of Proposed Converter at fs = 2 KHz, D = 55
0.3
Fig. 4.11 : Output Voltage Waveform of Proposed Converter at fs = 2 55
KHz, D = 0.3
Fig. 4.12 : Input current of Proposed Converter at fs = 2 KHz, D = 0.4 56
Fig. 4.13 : Input current FFT of Proposed Converter at fs = 2 KHz, D = 56
0.4
Fig. 4.14 : Output Voltage Waveform of Proposed Converter at fs = 2 56
KHz, D = 0.4
Fig. 4.15 : Input current of Proposed Converter at fs = 2 KHz, D = 0.5 57
Fig. 4.16 : Input current FFT of Proposed Converter at fs = 2 KHz, D = 57
0.5
Fig. 4.17 : Output Voltage Waveform of Proposed Converter at fs = 57
2KHz, D = 0.5
Fig. 4.18 : Input current of Proposed Converter at fs = 2 KHz, D = 0.6 58
Fig. 4.19 : Input current FFT of Proposed Converter at fs = 2 KHz, D = 58
0.6
Fig. 4.20 : Output Voltage Waveform of Proposed Converter at fs = 58
2KHz, D = 0.6
Fig. 4.21 : Input current of Proposed Converter at fs = 2 KHz, D = 0.7 59
Fig. 4.22 : Input current FFT of Proposed Converter at fs = 2 KHz, D = 59
0.7

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Fig. 4.23 : Output Voltage Waveform of Proposed Converter at fs = 59
2KHz , D = 0.7
Fig. 4.24 :In Input current of Proposed Converter at fs = 2 KHz, D = 0.8 60
Fig. 4.25 : Input current FFT of Proposed Converter at fs = 2 KHz, D = 60
0.8
Fig. 4.26 : Output Voltage Waveform of Proposed Converter at fs = 60
2KHz , D = 0.8
Fig. 4.27 : Input current of Proposed Converter at fs = 2 KHz, D = 0.9 61
Fig. 4.28 : Input current FFT of Proposed Converter at fs = 2 KHz, D = 61
0.9
Fig. 4.29 : Output Voltage Waveform (Buck) of Proposed Converter at fs 61
= 2KHz, D = 0.9
Fig. 4.30(a) : Comparison curve of Diode-Capacitor assisted Buck- Boost 63
AC-DC Converter (at fs = 2KHz) input current THD
Fig. 4.30(b) : Comparison curve of Diode-Capacitor assisted Buck- Boost 63
AC-DC converter (at fs = 2KHz) power factor
Fig. 4.30(c) : Comparison curve of Diode-Capacitor assisted Buck- Boost 64
AC-DC converter (at fs = 2KHz) efficiency
Fig. 4.30(d) : Comparison curve of Diode-Capacitor assisted Buck- Boost 64
AC-DC Converter (at fs=2KHz) Gain
Fig. 4.31(a) : Comparison curve of Diode-Capacitor assisted Buck- Boost 67
AC-DC Converter (at fs = 3KHz) input current THD
Fig. 4.31(b) : Comparison curve of Diode-Capacitor assisted Buck- Boost 67
AC-DC converter (at fs = 3KHz) power factor
Fig. 4.31(c) : Comparison curve of Diode-Capacitor assisted Buck- Boost 68
AC-DC converter (at fs = 3KHz) efficiency
Fig. 4.31(d) : Comparison curve of Diode-Capacitor assisted Buck- Boost 68
AC-DC Converter (at fs = 3KHz) Gain
Fig. 4.32(a) : Comparison curve of Diode-Capacitor assisted Buck- Boost 70
AC-DC Converter (at fs = 4KHz) input current THD
Fig. 4.32(b) : Comparison curve of Diode-Capacitor assisted Buck- Boost 70

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AC-DC converter (at fs = 4KHz) power factor
Fig. 4.32(c) : Comparison curve of Diode-Capacitor assisted Buck- Boost 71
AC-DC converter (at fs = 4KHz) efficiency
Fig. 4.32(d) : Comparison curve of Diode-Capacitor assisted Buck- Boost 71
AC-DC Converter (at fs = 4KHz) Gain
Fig. 4.33(a) : Comparison curve of Diode-Capacitor assisted Buck- Boost 73
AC-DC Converter (at fs = 5KHz) input current THD
Fig. 4.33(b) : Comparison curve of Diode-Capacitor assisted Buck- Boost 73
AC-DC converter (at fs = 5KHz) power factor
Fig. 4.33(c) : Comparison curve of Diode-Capacitor assisted Buck- Boost 74
AC-DC converter (at fs = 5KHz) efficiency
Fig. 4.33(d) : Comparison curve of Diode-Capacitor assisted Buck- Boost 74
AC-DC Converter (at fs = 5KHz) Gain
Fig. 4.34(a) : Comparison curve of Diode-Capacitor assisted Buck- Boost 76
AC-DC Converter (at fs = 6KHz) input current THD
Fig. 4.34(b) : Comparison curve of Diode-Capacitor assisted Buck- Boost 76
AC-DC converter (at fs = 6KHz) power factor
Fig. 4.34(c) : Comparison curve of Diode-Capacitor assisted Buck- Boost 77
AC-DC converter (at fs = 6KHz) efficiency
Fig. 4.34(d) : Comparison curve of Diode-Capacitor assisted Buck- Boost 77
AC-DC Converter (at fs = 6KHz) Gain
Fig. 4.35(a) : Comparison curve of Diode-Capacitor assisted Buck- Boost 79
AC-DC Converter (at fs = 7KHz) input current THD
Fig. 4.35(b) : Comparison curve of Diode-Capacitor assisted Buck- Boost 79
AC-DC converter (at fs = 7KHz) power factor
Fig. 4.35(c) : Comparison curve of Diode-Capacitor assisted Buck- Boost 80
AC-DC converter (at fs = 7KHz) efficiency
Fig. 4.35(d) : Comparison curve of Diode-Capacitor assisted Buck- Boost 80
AC-DC Converter (at fs = 7KHz) Gain
Fig. 5.1 : Tuned PI control circuit of proposed AC-DC converter 83
Fig. 5.2 : Block diagram of the Control circuit 84

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Fig. 5.3 : Voltage Error Signal 85
Fig. 5.4 : Output of Voltage controller 85
Fig. 5.5 : Controller output (red) and 15 KHz carrier (green) signal 86
Fig. 5.6 : Generation of gate pulse at different scale 86
Fig. 5.7 : Input current of proposed converter at constant load having 88
without tuned controller
Fig. 5.8 : Input current of proposed converter at constant load having a 88
properly tuned controller
Fig. 5.9 : Proposed converter circuit with PI Controller having Dynamic 90
Load Change Unit
Fig. 5.10 : Voltage stabilization due to PI Controller during load change. 90
Fig. 5.11 : Voltage stabilization due to PI Controller during load change 91
Fig. 5.12 : Voltage stabilization due to PI Controller during load change 91
Fig. 5.13(a) : Converter without control 92
Fig. 5.13(b) : Converter with PI control 92
Fig. 5.14 : Input current without PI controller when L1 = 10mH, THD = 93
8.32%
Fig. 5.15 : Input current with PI controller when L1 = 10mH, THD = 93
7.93%
Fig. 5.16 : Input current without PI controller when L1 = 5mH, THD = 94
12.06%
Fig. 5.17 : Input current with PI controller when L1= 5mH, THD= 8.51% 94
Fig. 5.18 : Input current without PI controller when L1 = 1mH, THD = 95
35.85%
Fig. 5.19 : Input current with PI controller when L1 = 1mH, THD = 95
10.06%
Fig. 5.20 : Input current without PI controller when L1 = 0.5mH, THD = 96
38.10%
Fig. 5.21 : Input current with PI controller when L1 = 0.5mH, THD = 96
11.90%
Fig. 5.22 : Graphical representation of THD by varying inductance 97

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Fig. 5.23 : Input-Output Voltage of converter without control 98
Fig. 5.24 : Input-Output Voltage of converter with PI controller 98
Fig. 5.25 : Input-Output Voltage of converter without control 99
Fig. 5.26 : Input-Output Voltage of converter with PI controller 99
Fig. 5.27 : Input-Output Voltage of converter without control 100
Fig. 5.28 : Input-Output Voltage of converter with PI controller 100
Fig. 5.29 : Input-Output Voltage of converter without control 101
Fig. 5.30 : Input-Output Voltage of converter with PI controller 101
Fig. 5.31 : Input-Output Voltage of converter without control 102
Fig. 5.32 : Input-Output Voltage of converter with PI controller 102
Fig. 5.33 : Power factor Improvement by using PI controller at buck 104
mode
Fig. 5.34 : Power factor Improvement by using PI controller at boost 106
mode
Fig. 6.1 : Proposed PFC circuit without feedback control. A prototype 107
is made to analyze the performance.
Fig. 6.2 : Input Current (Yellow) and Input Voltage (Blue) Waveforms 110
of proposed Rectifier for D = 0.2 from Oscilloscope
Fig. 6.3 : Input Current FFT Analysis graph from oscilloscope 110
Fig. 6.4 : Output Voltage (Green), boosted voltage between AC 111
capacitor to DC capacitor midpoint (Pink), Voltage of
capacitor C1 (blue) and C2 (light blue) for D = 0.2
Fig. 6.5 : Input Voltage and Input Current waveforms for proposed 111
Rectifier for D = 0.2 from Power Quality Analyzer
Fig. 6.6 : Power factor, Real power, Reactive Power, Apparent Power 112
of Proposed Rectifier for D = 0.2 from Power Quality
Analyzer
Fig. 6.7 : Spectrum of Input Current of Proposed Rectifier for D = 0.3 112
from Power Quality Analyzer
Fig. 6.8 : Simulated Input Voltage Waveforms of proposed Rectifier for 113
D = 0.2

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Fig. 6.9 : Simulated Input Current Waveforms of proposed Rectifier for 113
D = 0.2
Fig. 6.10 : FFT analysis of corresponding Input Current Waveforms 114
Fig. 6.11 : Simulated Output Voltage of proposed Rectifier for D = 0.2 114
Fig. 6.12 : Input Current (Yellow) and Input Voltage (Blue) Waveforms 115
of proposed Rectifier for D = 0.3 from Oscilloscope
Fig. 6.13 : Input Current FFT Analysis graph from oscilloscope 115
Fig. 6.14 : Output Voltage (Green), boosted voltage between AC 116
capacitor to DC capacitor midpoint (Pink), Voltage of
capacitor C1 (blue) and C2 (light blue) for D=0.3
Fig. 6.15 : Input Voltage and Input Current waveforms for proposed 116
Rectifier for D = 0.3 from Power Quality Analyzer
Fig. 6.16 : Power factor, Real power, Reactive Power, Apparent Power 117
of Proposed Rectifier for D = 0.3 from Power Quality
Analyzer
Fig. 6.17 : Spectrum of Input Current of Proposed Rectifier for D = 0.3 117
from Power Quality Analyzer
Fig. 6.18 : Simulated Input Voltage Waveforms of proposed Rectifier for 118
D = 0.3
Fig. 6.19 : Simulated Input Current Waveforms of proposed Rectifier for 118
D = 0.3
Fig. 6.20 : FFT analysis of corresponding Input Current Waveforms 119
Fig. 6.21 : Output Voltage Waveform for Output Switched Single Phase 119
SEPIC Rectifier for D = 0.3 From Oscilloscope
Fig. 6.22 : Input Current (Yellow) and Input Voltage (Blue) Waveforms 120
of proposed Rectifier for D = 0.4 from Oscilloscope
Fig. 6.23 : Input Current FFT Analysis graph from oscilloscope 120
Fig. 6.24 : Output Voltage (Green), boosted voltage between AC 121
capacitor to DC capacitor midpoint (Pink), Voltage of
capacitor C1 (blue) and C2 (light blue) for D = 0.4
Fig. 6.25 : Input Voltage and Input Current waveforms for proposed 121

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Rectifier for D = 0.4 from Power Quality Analyzer
Fig. 6.26 : Power factor, Real power, Reactive Power, Apparent Power 122
of Proposed Rectifier for D = 0.4 from Power Quality
Analyzer
Fig. 6.27 : Spectrum of Input Current of Proposed Rectifier for D = 0.4 122
from Power Quality Analyzer
Fig. 6.28 : Simulated Input Voltage Waveforms of proposed Rectifier for 123
D = 0.4
Fig. 6.29 : Simulated Input Current Waveforms of proposed Rectifier for 123
D = 0.4
Fig. 6.30 : FFT analysis of corresponding Input Current Waveforms 124
Fig. 6.31 : Simulated Output Voltage of proposed Rectifier for D = 0.4 124
Fig. 6.32 : Input Current (Yellow) and Input Voltage (Blue) Waveforms 125
of proposed Rectifier for D = 0.5 from Oscilloscope
Fig. 6.33 : Input Current FFT Analysis graph from oscilloscope 125
Fig. 6.34 : Output Voltage (Green), boosted voltage between AC 126
capacitor to DC capacitor midpoint (Pink), Voltage of
capacitor C1 (blue) and C2 (light blue) for D = 0.5
Fig. 6.35 : Input Voltage and Input Current waveforms for proposed 126
Rectifier for D = 0.5 from Power Quality Analyzer
Fig. 6.36 : Power factor, Real power, Reactive Power, Apparent Power 127
of Proposed Rectifier for D = 0.5 from Power Quality
Analyzer
Fig. 6.37 : Spectrum of Input Current of Proposed Rectifier for D = 0.5 127
from Power Quality Analyzer
Fig. 6.38 : Simulated Input Voltage Waveforms of proposed Rectifier for 128
D = 0.5
Fig. 6.39 : Simulated Input Current Waveforms of proposed Rectifier for 128
D = 0.5
Fig. 6.40 : FFT analysis of corresponding Input Current Waveforms 129
Fig. 6.41 :Si Simulated Output Voltage of proposed Rectifier for D = 0.5 129

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Fig. 6.42 : Input Current (Yellow) and Input Voltage (Blue) Waveforms 130
of proposed Rectifier for D = 0.6 from Oscilloscope
Fig. 6.43 : Input Current FFT Analysis graph from oscilloscope 130
Fig. 6.44 : Output Voltage (Green), boosted voltage between AC 131
capacitor to DC capacitor midpoint (Pink), Voltage of
capacitor C1 (blue) and C2 (light blue) for D = 0.6
Fig. 6.45 : Input Voltage and Input Current waveforms for proposed 131
Rectifier for D = 0.6 from Power Quality Analyzer
Fig. 6.46 : Power factor, Real power, Reactive Power, Apparent Power 132
of Proposed Rectifier for D = 0.6 from Power Quality
Analyzer
Fig. 6.47 : Spectrum of Input Current of Proposed Rectifier for D = 0.6 132
from Power Quality Analyzer
Fig. 6.48 : Simulated Input Voltage Waveforms of proposed Rectifier for 133
D = 0.6
Fig. 6.49 : Simulated Input Current Waveforms of proposed Rectifier for 133
D = 0.6
Fig. 6.50 : FFT analysis of corresponding Input Current Waveforms 134
Fig. 6.51 : Simulated Output Voltage of proposed Rectifier for D = 0.6 134
Fig. 6.52 : Input Current (Yellow) and Input Voltage (Blue) Waveforms 135
of proposed Rectifier for D = 0.7 from Oscilloscope
Fig. 6.53 : Input Current FFT Analysis graph from oscilloscope 135
Fig. 6.54 : Output Voltage (Green), boosted voltage between AC 136
capacitor to DC capacitor midpoint (Pink), Voltage of
capacitor C1 (blue) and C2 (light blue) for D = 0.7
Fig. 6.55 : Input Voltage and Input Current waveforms for proposed 136
Rectifier for D = 0.7 from Power Quality Analyzer
Fig. 6.56 : Power factor, Real power, Reactive Power, Apparent Power 137
of Proposed Rectifier for D = 0.7 from Power Quality
Analyzer
Fig. 6.57 : Spectrum of Input Current of Proposed Rectifier for D = 0.7 137

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from Power Quality Analyzer
Fig. 6.58 : Simulated Input Voltage Waveforms of proposed Rectifier for 138
D = 0.7
Fig. 6.59 : Simulated Input Current Waveforms of proposed Rectifier for 138
D = 0.7
Fig. 6.60 FF
: FFT analysis of corresponding Input Current Waveforms 139
Fig. 6.61 : Simulated Output Voltage of proposed Rectifier for D = 0.7 139
Fig. 6.62 : Input Current (Yellow) and Input Voltage (Blue) Waveforms
of proposed Rectifier for D = 0.8 from Oscilloscope 140
Fig. 6.63 : Input Current FFT Analysis graph from oscilloscope 140
Fig. 6.64 : Output Voltage (Green), boosted voltage between AC 141
capacitor to DC capacitor midpoint (Pink), Voltage of
capacitor C1 (blue) and C2 (light blue) for D = 0.8
Fig. 6.65 : Input Voltage and Input Current waveforms for proposed 141
Rectifier for D = 0.8 from Power Quality Analyzer
Fig. 6.66 : Power factor, Real power, Reactive Power, Apparent Power 142
of Proposed Rectifier for D = 0.8 from Power Quality
Analyzer
Fig. 6.67 : Spectrum of Input Current of Proposed Rectifier for D = 0.8 142
from Power Quality Analyzer
Fig. 6.68 : Simulated Input Voltage Waveforms of proposed Rectifier for 143
D = 0.8
Fig. 6.69 : Simulated Input Current Waveforms of proposed Rectifier for 143
D = 0.8
Fig. 6.70 : FFT analysis of corresponding Input Current Waveforms 144
Fig. 6.71 : Simulated Output Voltage of proposed Rectifier for D = 0.8 144
Fig. 6.72 : Input Current (Yellow) and Input Voltage (Blue) Waveforms
of proposed Rectifier for D = 0.9 from Oscilloscope 145
Fig. 6.73 : Input Current FFT Analysis graph from oscilloscope 145
Fig. 6.74 : Output Voltage (Green), boosted voltage between AC 146
capacitor to DC capacitor midpoint (Pink), Voltage of
capacitor C1 (blue) and C2 (light blue) for D = 0.9

- xx -
Fig. 6.75 : Input Voltage and Input Current waveforms for proposed 146
Rectifier for D = 0.9 from Power Quality Analyzer
Fig. 6.76 : Power factor, Real power, Reactive Power, Apparent Power 147
of Proposed Rectifier for D = 0.9 from Power Quality
Analyzer
Fig. 6.77 : Spectrum of Input Current of Proposed Rectifier for D = 0.9 147
from Power Quality Analyzer
Fig. 6.78 : Simulated Input Voltage Waveforms of proposed Rectifier for 148
D = 0.9
Fig. 6.79 : Simulated Input Current Waveforms of proposed Rectifier for 148
D = 0.9
Fig. 6.80 : FFT analysis of corresponding Input Current Waveforms 149
Fig. 6.81 : Simulated Output Voltage of proposed Rectifier for D = 0.9 149
Fig. 6.82 : Comparison curves of Input Current THD at different duty 151
cycle
Fig. 6.83 : Comparison curves of Input Power Factor at different duty 152
cycle
Fig. 6.84 : Comparison curves of Output Voltage at different duty cycle 152

- xxi -
LIST OF ABBREVIATIONS OF TECHNICAL TERMS

PFC Power Factor Correction

BJT Bipolar Junction Transistor

IGBT Insulated Gate Bipolar Transistor

MOSFET Metal Oxide Semiconductor Field Effect Transistor

PWM Pulse Width Modulation

THD Total Harmonic Distortion

CCM Continuous Current Conduction Mode

DCM Discontinuous Current Conduction Mode

RMS Discontinuous Current Conduction Mode

- xxii -
CHAPTER 1

INTRODUCTION

1.1 AC-DC Conversion

Power electronic converters can be broadly classified as AC-DC, AC-AC, DC-AC and
DC-DC converters [1]. The focus of the work presented in this thesis is in the AC-DC
conversion area. Most AC-DC converter applications desire a constant DC output voltage
which will be further used for other purposes. Till very recently the attention of all
manufacturers and users of AC-DC converters was on the DC side of the same. In this
sense, the most popular AC-DC converter is the rectifier with C filter at lower power
levels and the phase-controlled rectifier with LC filter at higher power levels[2]-[7].

1.2 Background and present status of the problem

Currently, the concern in rectifiers includes power quality issues relating to the source
end. The reason for this is the undesirable AC line current harmonics drawn from the
utility by the standard rectifiers [5]-[13]. The presence of harmonics in the line current
results a detrimental effect on the power system. The detrimental effect causes by the
conventional rectifier-capacitor type interface has been briefly discussed below-

(a) Input current harmonics effect: Due to nonlinear property of rectifier, it generates
harmonic in the source end. Because of the non-zero source impedance in the utility
supply, the harmonic currents flowing through the conventional AC-DC utility interface
will cause a distortion in the voltage waveform at the point of common coupling
[5]. This may cause malfunction of power system protection, loads and metering
devices. Besides voltage waveform distortion, harmonic components may also cause the
problems of overheating of neutral line, distribution transformers and distribution lines,
interference with communication and control signals, over voltages due to resonance
conditions [4]-[21].

-1-
(b) Effect of Poor Power Factor: Poor power factor of operation implies ineffective
use of the volt-ampere ratings of the utility equipment such as transformers,
distribution lines and generators. Also, it places a restriction on the total
equipment load that can be connected to a typical home or office wall-plug with
specified maximum r.m.s current rating. These problems have resulted in the additional
concern relating to source current quality [18]-[26].

1.3 Major Challenges of PFC Techniques

To encounter the aforesaid problem associated with AC-DC converter (rectifier), several
techniques have been proposed in the literature so far. These techniques are broadly
categorized in to two types: 1) Passive Power Factor Correction (PFC) Technique 2)
Active PFC Technique. In passive PFC technique, filters consisting of large L and C at
the input were used to reduce current distortion (THD) at the cost of further power factor
and efficiency reduction. This technique was used in past. But at present, active filtering
techniques have been used to alleviate these problems. The active PFC technique
includes harmonic current injection method and use of DC-DC converter between
rectifier and load. The DC-DC converter between rectifier and load has many possible
configurations [13]-[19]. Recently some configurations and techniques are being
investigated for input current switching by providing switch between source and rectifier.
So far Boost, Buck, Buck-Boost, SEPIC and Ćuk converter configurations have been
investigated for single phase rectifier input current switching. Among Buck, Boost and
Buck-Boost converter topology, the boost converter topology offers lower input current
THD and improved power factor. On the other hand SEPIC, Ćuk, ZETA etc converter
topologies offer also lower THD and better power factor but the problem is that each of
these converters contains two inductors in their circuit configuration. This increased
number of components count increases the weight and size of the system.

-2-
1.4 Goal of this Thesis

Our major goal was to design a buck-boost AC-DC converter with less inductive
components (only one inductor) and attain the conspicuous features of-

1. Sinusoidal input current with close to unity PF operation,

2. Reduced Electro Magnetic Interference (EMI),

3. Insensitive to small signal perturbations in the load,

4. Low output voltage ripple,

5. Good line and load regulation,

6. Fast output dynamics and

7. High power conversion efficiency.

To acquire the above mentioned features, we had to design and tune a PI (Proportional-
Integral) control circuit also which has been discussed later.

1.5 Thesis Organization

This thesis consists of five chapters.

Chapter-1 is the introduction of the thesis work and provides a brief discussion about
back ground and objective of this research.

Chapter-2 illustrates the types of Diode Rectifier (AC-DC converter), their


construction, operation principle, wave shapes and the problem associated with them
during line operation.

Chapter-3 investigates the existing techniques to mitigate the problems of low power
factor and input current shaping of rectifier, finds out the existing problem at present and
selection of appropriate method of power factor correction.

-3-
Chapter-4 proposes and discuss the new idea of power factor correction circuit and
analyze its performance under different frequencies and load condition.

Chapter-5 presents the tuned PI control circuit for proposed AC-DC converter and its
application under various load change, input source disturbances, to improve the input
current shaping and input power factor.

Chapter-6 concludes the thesis with conclusion, summary and suggestion on future
works.

-4-
CHAPTER 2

AC-DC CONVERTER AND ITS PROBLEM IN USE

2.1 Introduction

AC-DC converters provide unidirectional voltage/current by the process of rectification.


It may be classified as controlled and uncontrolled AC-DC converter. Uncontrolled AC-
DC converter contains non linear diodes to operate where this non linear property of
diode introduces a major problem in ac mains [4]-[6]. The major classifications are-

Single Phase AC-DC Converter Three Phase AC-DC Converter

Half Wave Full Wave Half Wave Full Wave

Controlled Uncontrolled
Controlled Uncontrolled

Fig. 2.1 Classification of AC-DC converter

Converters those use SCR, IGBT or power semiconductor switch during switching period
can be controlled or uncontrolled. The aforementioned AC-DC converters’ construction,
operating principle and mathematical equations are outlined below. Along with this, the
problems associated with the AC-DC converters during current feeding period are also
highlighted. To avoid complexities, diodes are considered to be ideal and the load to be
purely resistive [24]-[26].

-5-
2.2 Single phase Half- Wave AC-DC Converter

A single phase half wave AC-DC converter allows the half cycle current at the output
load. The other half cycle of the source does not allow to propagate at the output. A basic
half-wave converter with a resistive load is shown in Fig.2.2.

Fig 2.2 Single phase half wave AC-DC Converter

During the positive half cycle, diode D conducts as it is in forward bias. But when the
source supplies power from negative half cycle, the diode D becomes reverse biased and
it stops to conduct. In that case, one half cycles cannot propagate at the load end and the
output is rectified. Typical input/output voltage waveforms of half wave rectification of
the circuit of Fig.2.2 are shown in Fig.2.3 Due to absence of conduction during negative
cycle, input current is also dc (non ac) which is undesirable.

Vs

VR

Fig. 2.3 Single phase half wave AC-DC Converter input-output

-6-
In the Fig.2.3, Vs is the source voltage and VL is the load voltage. The mathematical
relationship of a half wave AC-DC converter is,

Vdc  0.318Vm (2.1)

If VL is the average value of load voltage and T is time period then it can be defined-

1
T

T 0
Vdc  VL (t )dt (2.2)

The rms value of load voltage for half wave converter-

1 𝑇 2
𝑉𝑟𝑚𝑠 = 𝑉 𝑡 𝑑𝑡 (2.3)
𝑇 0

Or Vrms  0.5Vm (2.4)

2.3 Single Phase Full Wave AC-DC Converter

The full wave AC-DC converter provides both positive and negative half cycles at the
output load in one direction. The main objective of this converter is to produce a voltage
or current which is dc or has specified dc component. While the purpose of the full-
wave AC-DC converter is basically the same as that of the half-wave AC-DC
converter, full wave converter have some advantages. The output of the full-wave
converter has inherently less ripple than the half-wave converter and the input current of
the rectifier is ac.

Full wave AC-DC converter can be classified in to two categories-

(a) Bridge AC-DC converter

(b) Center-tapped transformer AC-DC converter

The circuit of Fig. 2.4 represents a single phase bridge AC-DC converter.

-7-
Fig. 2.4 Bridge Full-Wave AC-DC Converter

The source current for the full-wave converter with a resistive load is a sinusoid which is
in phase with the voltage and have unity power factor. The fundamental frequency of
the output voltage is 2ω, where ω is the frequency of the AC input, since two
periods of the output occur for every period of the input. The Fourier series of the
output consists of a DC term and the even harmonics of the source frequency. The
voltage wave shapes of above converter of Fig.2.4 are shown in Fig.2.5.

Vs

VL

Fig. 2.5 Single phase Full wave AC-DC Converter input-output [13]

In the Fig.2.5, Vs is the input voltage and VL is the output voltage. In the case of a full-
wave converter, VL (t )  Vm sin t for both the positive and negative half cycles. Hence,

-8-

1
Vdc 
 V
0
m sin td (t ) (2.5)

Therefore, for the full wave converter’s output voltage,

Vdc  0.636Vm (2.6)

In the case of a full-wave converter, V (t )  Vm sin t for both the positive and negative
half cycles. Hence, for full wave converter the rms value of the load voltage-

1 𝜋
𝑉𝑟𝑚𝑠 = [𝜋 0
(𝑉𝑚 𝑠𝑖𝑛𝜔𝑡)2 𝑡 𝑑(𝜔𝑡)] (2.7)

= 0.707 Vm

The construction of a center-tapped transformer AC-DC converter and its corresponding


wave shapes are shown in Fig.2.6 and Fig.2.7 respectively -

Fig. 2.6 Center-tapped transformer AC-DC converter

Each diode is associated with the half of the transformer and acts as a half-wave
converter. The outputs of the two half-wave rectifiers are combined to produce

-9-
full-wave rectification in the load. The input and output voltage wave forms are shown in
the Fig. 2.7-

Vac

VL

Fig. 2.7 Center tapped Full wave AC-DC Converter input-output [13].

2.4 Three Phase AC-DC Converter

In high power application, three phases AC-DC converters are used. HVDC or wind
turbine grid interfacing is the major field of application. Three phase AC-DC converter
can be classified primarily in two types. First one is three phase star converter and second
one is three phase bridge converter. They are briefly described as follows-

Va D1

+ Vo -
Vb D2

Vc D3

Fig. 2.8 Three-phase star AC-DC converter

The circuit of Fig.2.8 can be considered as three single-phase half-wave converters


combined together. For this reason, it is sometimes referred to as a three-phase half-wave
converter. The diode in a particular phase conducts during the period when the voltage

- 10 -
on that phase is higher than that on the other two phases. The wave shapes of the star
connected AC-DC converters are shown in Fig. 2.9. Input currents to the circuit are
unidirectional non-ac and also non sinusoidal. In Fig.2.9, Va, Vband Vc are the three
phase voltages and V0 is the output voltage.

Va Vb Vc

Vo

time(s)

Fig. 2.9 Three phase full wave star AC-DC Converter input-output [13].

The commonly used rectifiers for high-power applications are three-phase bridge
rectifiers because of their highest possible transformer utilization factor for a three-phase
system and ac input current (though non-sinusoidal). The circuit configuration of a three
phase full wave bridge AC-DC converter is shown in Fig. 2.10. In the converter, each
phase contains two diodes and there are total six diodes in operation. The diodes are
numbered in the order of conduction sequences and the conduction angle of each
diode is 2π = 3.The conduction sequence for diodes is 12, 23, 34, 45, 56 and 61.
The input/output voltages of the three-phase bridge rectifier are shown in Fig. 2.11. The

line voltage is 3 times the phase voltage of a three-phase star-connected source. There
is no problem to use any combination of star- or delta- connected primary and
secondary windings because the currents associated with the secondary windings are
symmetrical [5]-[13].The input currents to the rectifier are ac but non-sinusoidal.

- 11 -
D1 D3 D5
Va

+
Vb Vo
-
Vc

D4 D6 D2

Fig. 2.10 Three Phase full wave Bridge AC-DC converter

Va Vb Vc

Vo

time(s)

Fig. 2.11 Three phase full wave bridge AC-DC Converter input-output.

The average value of the output voltage of three phase full wave AC-DC converter is
expressed as,

2
3
6
Vdc 
2 
 3Vm sin d (2.8)
3

3 3
Vdc  Vm (2.9)

- 12 -
2.5 Problem associated with the single-phase AC-DC converter connected in line

The input stage of any single phase AC-DC converter (rectifier) consists of a
bridge. The input current of such rectifier has high input current harmonic distortion.
Diode rectifiers conduct only for a short period which causes high distortion of input
current. This period corresponds to the time when the input instantaneous voltage is
greater than the output capacitor voltage. Since the instantaneous voltage is greater than
the capacitor voltage only for very short periods of time, when the capacitor is fully
charged; large current pulses are drawn from the line during this short period of time.
This phenomenon leads the input power factor very low (less than 0.6) and also distorts
the shape of the input current which is totally undesirable. It has disadvantages like-

(a) It generates high harmonics in the source,

(b) It creates electromagnetic interferences (EMI),

(c) It lowers the input power factor which leads to draw more current from

source and make the system more lossy and

(d) It reduces maximum power capability from the line.

The whole phenomenon has been depicted through simulation waveforms as shown in
Figs 2.12-2.14. Fig. 2.12 is the single-phase rectifier circuit without capacitor filter and
resistive load. Fig. 2.13 shows the typical input/output voltages of the circuit of Fig. 2.12
when Fig. 2.14 shown the input current of the single-phase rectifier.

- 13 -
V+

D3
D1
MR2404F
MR2404F

V+
R1

C2 100
VOFF = 0 V1
100uF
VAMPL = 230V

FREQ = 50Hz
I

V-
D4
D2
MR2404F
MR2404F

0 V-

Fig.2.12 Rectifier circuit used for simulation of single phase bridge rectifier.

400V

Output Voltage

0V

Input Voltage

-400V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(V1:+,0) V(D1:2,D2:1)
Time

Fig. 2.13 Input-Output Voltages of the AC-DC converter of Fig. 2.12

- 14 -
20A

Input Pulse Current drawn by Diode Rectifier

0A

-20A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
I(V1)
Time

Fig. 2.14 Input Pulse Current drawn by the AC-DC converter from source during
connecting in the line of Fig. 2.12

Fig. 2.14 illustrates that the shape of the input current of AC-DC converter is pulsed in
nature and it generates the high total harmonic distortion (THD). The Fourier transform
of the input current waveform of Fig. 2.14 is shown in Fig.2.15 which highlights the
harmonic contents of the waveform.

4.0A

FFT of Input current

2.0A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz
-I(V1)
Frequency

Fig. 2.15 FFT of input pulse current drawn by the converter during operation.

- 15 -
The FFT analysis of the input current shows that the current contains large magnitude
harmonics of 3rd, 5th and so on odd values. The total THD calculation has been given
below which has been got after performing simulation. The result shows that the current
contain 93.09% harmonics (which is very high) and input power factor is less than
0.60, which lowers the quality of source power and makes it polluted. To encounter the
problem, there are several approaches practiced by the researcher. But they have also
some shortcomings. Theseare discussed in next chapter.

Table 2-I: Calculation of Total Harmonic Distortion (THD%) in Pspice Software

HARMOIC FREQUENCY FOURIER NORMALIZED PHASE NORMALIZED


NO (HZ) COMPONENT COMPONENT (DEG) PHASE (DEG)
1 5.000E+01 3.546E+00 1.000E+00 -1.453E+02 0.000E+00
2 1.000E+02 3.498E-01 9.864E-02 7.262E+01 3.633E+02
3 1.500E+02 2.660E+00 7.501E-01 9.216E+01 5.281E+02
4 2.000E+02 3.511E-01 9.900E-02 9.066E+01 6.720E+02
5 2.500E+02 1.237E+00 3.489E-01 2.126E+01 7.479E+02
6 3.000E+02 5.444E-01 1.535E-01 7.798E+01 9.499E+02
7 3.500E+02 6.764E-01 1.908E-01 -2.017E+01 9.971E+02
8 4.000E+02 6.083E-01 1.715E-01 4.084E+01 1.203E+03
9 4.500E+02 1.876E-01 5.291E-02 -1.424E+02 1.166E+03
10 5.000E+02 3.788E-01 1.068E-01 -1.597E-01 1.453E+03
11 5.500E+02 3.415E-01 9.632E-02 8.849E+01 1.687+03
12 6.000E+02 9.681E-02 2.730E-02 -8.461E+00 1.735E+03
13 6.500E+02 4.175E-01 1.177E-01 3.778E+01 1.927E+03
14 7.000E+02 1.726E-01 4.868E-02 6.974E+01 2.104E+03
15 7.500E+02 2.094E-01 5.906E-02 -1.311E+01 2.167E+03
16 8.000E+02 2.193E-01 6.186E-02 3.220E+01 2.357E+03
17 8.500E+02 6.793E-02 1.916E-02 6.980E+01 2.540E+03
18 9.000E+02 1.059E-01 2.987E-02 1.587E+01 2.632E+03
19 9.500E+02 1.986E-01 5.601E-02 5.518E+01 2.816E+03
20 1.000E+03 1.034E-01 2.915E-02 7.943E+01 2.986E+03

- 16 -
21 1.050E+03 1.425E-01 4.018E-02 1.031E+01 3.062E+03
22 1.100E+03 2.020E-01 5.696E-02 5.382E+01 3.251E+03
23 1.150E+03 4.405E-02 1.242E-02 7.066E+01 3.413E+03
24 1.200E+03 1.522E-01 4.292E-02 1.445E+01 3.502E+03
25 1.250E+03 1.499E-01 4.228E-02 7.734E+01 3.710E+03
26 1.300E+03 2.382E-02 6.718E-03 -1.355E+00 3.777E+03
27 1.350E+03 1.540E-01 4.343E-02 3.642E+01 3.960E+03
28 1.400E+03 1.217E-01 3.431E-02 9.583E+01 4.165E+03
29 1.450E+03 6.590E-02 1.859E-02 2.613E+01 4.241E+03
30 1.500E+03 1.533E-01 4.323E-02 5.345E+01 4.413E+03
31 1.550E+03 7.645E-02 2.156E-02 8.660E+01 4.592E+03
32 1.600E+03 8.228E-02 2.320E-02 2.440E+01 4.675E+03
33 1.650E+03 1.180E-01 3.327E-02 5.904E+01 4.855E+03
34 1.700E+03 6.086E-02 1.716E-02 9.792E+01 5.039E+03
35 1.750E+03 6.529E-02 1.841E-02 4.408E+01 5.130E+03
36 1.800E+03 1.239E-01 3.494E-02 7.332E+01 5.305E+03
37 1.850E+03 6.274E-02 1.769E-02 9.794E+01 5.475E+03
38 1.900E+03 9.116E-02 2.571E-02 3.974E+01 5.562E+03
39 1.950E+03 1.233E-01 3.476E-02 8.050E+01 5.748E+03
40 2.000E+03 2.997E-02 8.453E-03 9.166E+01 5.905E+03

TOTAL HARMONIC DISTORTION = 9.309078E+01 PERCENT

- 17 -
CHAPTER 3

POWER FACTOR CORRECTION: DIFFERENT APPROACHES

Problems of single phase rectifier with output voltage filter are undesirable. In order to
meet ever-increasing EMC (Electromagnetic capability) standards and power quality
recommendations on conducted harmonics for power supplies, numerous power factor
correction (PFC) topologies for AC-DC converter have been proposed in the literature.
The PFC topologies can be broadly categorized in to two parts-

a) Passive approach of PFC


b) Active approach of PFC

The output stage of any AC-DC converter consists of a bridge rectifier and a
large filter capacitor. In passive PFC, the output voltage is not regulated and changes
with line voltage variations. Only passive elements are used in addition to the diode
bridge rectifier for shaping of the line current. On the other hand, in active PFC, the
output voltage is normally regulated for line variations. Active elements like
semiconductor switches are used in conjunction with inductors. Each approach has been
described with their advantages and limitations. Power factor is defined as the ratio of the
average power to the apparent power drawn by a load from an AC source. If the input
voltage source is sinusoidal, then power factor can be expressed as the product of the
distortion power factor and displacement power factor. Distortion power factor Kd is
given by the following equation-

I rms(1)
Kd  (3.1)
I rms

Where, I rms(1) is the fundamental rms current and I rms is the total rms current. Moreover,

the displacement power factor can be expressed as –

- 18 -
K  cos  (3.2)

Here  is the angle between the fundamental input current and the input voltage. So
from definition we can write the total power factor-

PF  K d * K

I rms(1)
= * cos  (3.3)
I rms

The lower power factor increases the line rms current and makes the system lossier. The
importance of total harmonic distortion (THD) is also to be noted. When the THD of
input current increases, the shape of the current becomes distorted and it pollutes the
source power. In addition to that, the following equations can give some relations
between total harmonic distortion (THD) and power factor.

1 2
𝑇𝐻𝐷% = 100 × [ − 1] (3.4)
𝐾𝑑

The distortion power factor Kdcan be written as-

1
𝐾𝑑 = 𝑇𝐻𝐷 % 2
(3.5)
[1+( ) ]
100

The displacement power factor Kθ can be made unity with a capacitor or inductor but
making the distortion power factor Kd unity is more difficult. When the fundamental
component of the input current is in phase with the input voltage, displacement power
factor, Kθ = 1. So,

PF  K d * K   K d (3.6)

1
𝑃𝐹 = 𝑇𝐻𝐷 % 2
(3.7)
[1+( ) ]
100

- 19 -
3.1 Passive PFC Approach:

Adding an inductor on the AC side of the diode bridge in series with the line voltage is
one of the simplest methods to achieve PFC circuit. Popularly this is known as the
passive PFC approach. PFC circuit and simulated input current waveforms for a 100 Ω
load and inductor values of 20mH are shown in Fig.s 3.1 to 3.3.

V+

L3 D3
1 2 D1
MR2404F
20m MR2404F
C1
V+
470u R1
100
VOFF = 0 V1

VAMPL = 300V

FREQ = 50Hz
I

V-
D4
D2
MR2404F
MR2404F

0 V-

. Fig. 3.1 Inductor on the AC side of the diode bridge AC-DC Converter

The output / input Wave shapes-

400V

Output Voltage

0V

Input Voltage
-400V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(L1:1,0) V(D1:2,C1:1)
Time

Fig. 3.2 Input-Output Voltages of AC-DC Converter of Fig 3.1

- 20 -
10A

Input Current

0A

-10A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V1)
Time

Fig. 3.3 Input current of AC-DC Converter of Fig 3.1

The input current contains less THD by using the above input inductor. Although this
technique improves the power factor and reduces the input current harmonics, the
output voltage is not regulated and increases with load. One more problem is that the
passive components like inductor or capacitor needs to be of large size for low frequency
input. So the system becomes bulky and heavy.

One more approach is to add inductor in the DC side of the AC-DC converter. The
circuitry configuration of this type converter using passive PFC components and its
output wave shapes is given in Fig. 3.4. For this scheme an inductor is added in the DC
side. If the inductor current is continuous for a given load current, the power factor can be
high. This requires a relatively large inductance. When the inductor current becomes
discontinuous due to reduction in load or when a lower inductance value is used, the
input current wave shape becomes similar to that of passive PFC with inductor on the AC
side and the power factor also deteriorates.

- 21 -
L2
1 2
40m

V+

D3
D1
MR2404F
MR2404F
C1
V+
470u R1
100
VOFF = 0 V1

VAMPL = 300V

FREQ = 50Hz
I

V-
D4
D2
MR2404F
MR2404F

0 V-

Fig. 3.4 Inductor on the DC side of the diode bridge AC-DC Converter

400V

output Voltage

0V

Input Voltage

-400V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(L1:1,0) V(L2:2,C1:1)
Time

Fig. 3.5 Input-Output Voltage of the AC-DC Converter of Fig 3.4

- 22 -
10A

Input Current

0A

-10A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V1)
Time

Fig. 3.6 Input current of the AC-DC converter circuit of Fig 3.4

To reduce the size and weight of the filter inductor, the active PFC techniques have been
introduced. In active PFC techniques the filter inductor experiences the switching
frequency normally 3 KHz to thousand KHz range. Therefore the size and weight of the
power converter can be significantly reduced by using high frequency inductor.

3.2 Active PFC Approach:

Active PFC has advantages some of which have been already been mentioned. The
summary of the major advantages of active PFC circuit is,

(a) Active wave shaping of the input current,


(b) Filtering of the high frequency switching,
(c) Feedback sensing of the source current for waveform control and
(d) Feedback control to regulate output voltage.

The most popular implementation of active PFC is to insert a PFC power stage into
existing equipment to satisfy the regulation. There are several active converters from

- 23 -
which one of the converters is usually used to perform active PFC stage. The converter
topologies are Buck, Boost, Buck-Boost, SEPIC, ĈUK, ZETA etc. The high frequency
active PFC circuit consists of converter in between the filter capacitor and the bridge
rectifier. The PFC output voltage can be higher or lower than the maximum amplitude of
the input voltage based on the type of converter. However, the converter cost and
complexity increases with the increased component count. SEPIC, ĈUK and ZETA
converters have more components compared to Buck, Boost and Buck-Boost converter.
So their cost and complexities are more.

3.2.1 Buck Converter Based Active PFC

Buck converter can operate only when the instantaneous input voltage Vin is higher than
the output voltage Vout .Large voltage spikes occurs if additional filter inductor is used to
current sinusoidal. Additional input filter inductor does not have freewheeling path so
that the high voltage induced across inductor when switch is off can be reduced. As a
result, this current configuration is not popular for PFC and current THD reduction of
single-phase and three phase rectifiers.

M1
IRF840 L3
1 2
10mH
V+
D1 D3
L4
1 2 MR2404F

0.03mH gate ref D5


C1 R3
V+ MR2404F
V2
FREQ = 50Hz 470uF 100

VAMPL = 300V

VOFF = 0
I
D2 D4
MR2404F MR2404F
V-

V-
0

Fig. 3.7 Buck converter based active PFC circuit (No feedback control used)

- 24 -
Inspite of the inductor current being continuous, the input switching current of the
converter is discontinuous as the high frequency switch interrupts the input current
during every switching cycle. Thus, the input current has significant high-frequency
components that increase EMI and filtering requirements. Typical input/output voltage
waveform, input current and its spectrum are shown in Figs 3.8 to 3.10.These illustrations
are taken for the circuit in open loop condition without provision for tracking input
current to unity PFC and low THD.

400V

Output Voltage

0V

Input Voltage

-400V
100ms 150ms 200ms 250ms 300ms
V(L3:2,D2:1) V(L4:1,0)
Time
Fig. 3.8 Input-Output Voltage of Buck Converter Active PFC of the circuit of Fig. 3.7 (No
feedback control used)

- 25 -
20A

Input Current
10A

0A

-10A

-20A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V2)
Time

Fig. 3.9 Input Current of Buck Converter Active PFC of the circuit of Fig. 3.7 (No
feedback control used)

1.5A

1.0A

0.5A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V2)
Frequency

Fig. 3.10 FFT Analysis of Input Current of Fig 3.9

The topology offers 76.42% THD and the input power factor is about 0.583 without any
feedback circuit for PFC, reduction of THD and output voltage regulation.

- 26 -
3.2.2 Boost Converter Based Active PFC

Boost converter can operate only when the instantaneous input voltage Vin is lower than
the output voltage Vout. This converter based PFC circuit and its corresponding
waveforms are shown in the Figs 3.11 to 3.13.The spectrum of the input current is shown
in Fig3.14.The illustrations are taken from circuit simulation in open loop condition
without any feedback for PFC and low input current THD.

L1 D5
1 2
5m
MR2404F
V+

D1 D3

L4 MR2404F MR2404F
1 2 M1
VOFF = 0
V+ .05m
R2
V2 IRF840 C2
VAMPL = 300 100
I
470u

FREQ = 50Hz

gate ref
V-
D2 D4
MR2404F MR2404F V-

Fig. 3.11 Input-Output Voltage of Buck Converter Active PFC (No feedback control
used)

- 27 -
800V

Output Voltage

400V

Input Voltage

0V

-400V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(D5:2,REF) V(V2:+,0)
Time

Fig. 3.12 Input-Output Voltage of Boost Converter Active PFC of the circuit of Fig. 3.11
(No feedback control used)

100A

50A
Input Current

0A

-50A

-100A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
I(V2)
Time

Fig. 3.13 Input Current of Boost Converter Active PFC of the circuit of Fig. 3.11,
(No feedback control used)

- 28 -
20A

10A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
I(V2)
Frequency

Fig. 3.14 FFT Analysis of Input Current of Fig 3.13

The topology offers 50.77% THD and the input power factor is about 0.86without any
feedback arrangement to make input PF unity and input current THD less than 10% and
constant regulated output voltage. Boost PFC rectification is a popular topology adopted
for unity PFC operation and low input current THD. For obtaining such operation proper
feedback controller is necessary.

The input switching current of the boost converter is continuous as the boost inductor is
placed in series with the input and the high frequency switch does not interrupt the input
current. So the input current has lesser high-frequency components resulting in
lower EMI and reduced filtering requirements.

3.2.3 Buck-Boost Converter Based Active PFC

Buck-Boost converter can step up or step down the input voltage. This converter based
PFC circuit and its associated waveforms are shown in Figs 3.15-3.17. Although the
inductor current is continuous, the input switching current of the converter is
discontinuous because the high frequency switch interrupts the input current. Thus,

- 29 -
the input current has significant high-frequency components that increase EMI and
filtering requirements.

M1 D5
IRF840

MR2404F
V+
D1 D3
L4 R4
1 2 MR2404F
1
50
L3
V+
0.005mH C1 R3
V2
FREQ = 50Hz ref 10mH 470u 100

VAMPL = 300V 2

VOFF = 0 gate
I
D2 D4
V-
0 MR2404F MR2404F

V-

Fig. 3.15 Buck-Boost converter based active PFC circuit (No feedback control used).

400V

Input Voltage

0V

Output Voltage

-400V
100ms 150ms 200ms 250ms 300ms
V(L4:1,0) V(C1:1,R3:1)
Time

Fig. 3.16 Input-Output Voltage of Buck-Boost Converter Active PFC of the circuit of Fig
3.15(No feedback control used)

- 30 -
40A

Input Current

0A

-40A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V2)
Time

Fig. 3.17 Input Current of Buck-Boost Converter Active PFC of the circuit of Fig 3.15
(No feedback control used)

5.0A

2.5A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V2)
Frequency

Fig. 3.18 FFT Analysis of Input Current of the Fig 3.17

The topology offers 68.01% THD and the input power factor is about 0.66without any
feedback circuit for PFC, reduction of input current THD and output voltage regulation.

- 31 -
Besides the aforementioned converter based active PFC topologies, there are also SEPIC,
ĈUK and ZETA converter based active PFC circuit. But unlike the above converters,
these converters have two inductors each.

3.2.4 SEPIC Converter Based Active PFC

SEPIC converter based active PFC circuit and their corresponding simulation output as
well as data analysis are shown in Figs 3.19-3.21.The spectrum of the input current is
shown in Fig 3.22.The waveforms and results are provided for the circuit in open loop
condition without any feedback for obtaining PFC, low input current THD and output
voltage regulation. Since the circuit has a input inductor like boost PFC, input current
THD improvement and voltage regulation are possible with conventional feedback
circuit. At the same time the circuit may be used to regulate voltage at higher to lower
than input voltage.

L1 C1 D5
1 2
20mH 5uF
MR2404F
V+

D1 D3
L3 1
1 2 MR2404F MR2404F
M1 L2
.005m
VOFF = 0
V+ 10mH R2
V2 IRF840 C2
VAMPL = 300 100
I 2 470u

FREQ = 50Hz

gate ref
V-
D2 D4
MR2404F MR2404F V-

Fig. 3.19 SEPIC converter based active PFC circuit (No feedback control used)

- 32 -
400V
Output Voltage

0V

Input Voltage

-400V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(D5:2,REF) V(L3:1,0)
Time

Fig. 3.20 Input-Output Voltage of SEPIC Converter Active PFC of the Fig 3.19

(No feedback control used)

30A

20A

Input Current

0A

-20A

-30A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
I(V2)
Time

Fig. 3.21 Input Current of SEPIC Converter Active PFC of the Fig 3.19

(No feedback control circuit used)

- 33 -
5.0A

2.5A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
I(V2)
Frequency

Fig. 3.22 FFT Analysis of Input Current of the Fig 3.21

The topology offers 47.77% THD and the input power factor is about 0.89without any
feedback for PFC, reduction of input current THD and output voltage regulation.

Like SEPIC converter based active PFC topology, the ĈUK and ZETA converter based
active PFC circuit also offers better power factor and low THD with better input current
shape. But one thing is evidently illustrated in the above analysis through simulation that
unlike Buck, Boost and Buck-Boost converter, The SEPIC, ĈUK and ZETA converter
requires two inductors each in their circuit configurations. This increases component
count and increases the complexities in control system of converters. Boost converter
having only one inductor can provide good performance compared to Buck and Buck-
Boost converters in terms of input power factor and input current THD. Moreover, our
goal of this research is to design and develop a simple and low cost active buck-boost
PFC circuit to improve the power quality. So, we have designed an input switched diode-
capacitor assisted buck-boost PFC circuit which requires only one inductor and provides
desired features at the input as well as the output.

- 34 -
CHAPTER 4

DIODE-CAPACITOR ASSISTED BOOST-BUCK AC-DC CONVERTER FOR


PFC

4.1 Proposed Boost- Buck AC-DC Converter-Output Split Capacitor:

In order to shape the input current, minimize its total harmonic distortion and increase the
power factor of the input, a input switched diode-capacitor assisted boost- buck AC-DC
converter is proposed in this chapter. Fig.4.1 illustrates the proposed converter circuit.
Unlike ĈUK and SEPIC topologies, the proposed converter comprises of one inductor
but it can provide the benefit of continuous input switching current like the boost inductor
in series with the input source.

D5 C1
R1
L C
1 2
RL
R2
D4 D1 D6 C2

Vin S
gate pulse

D3 D2

Fig 4.1: The Proposed Diode-Capacitor Assisted Boost-Buck AC-DC Converter for PFC
and low THD of the Input Current.

- 35 -
The major advantages provided by the circuit are,

(a) AC-DC Converter’s input current has less distortion which lowers the source
current pollution, minimizes EMI and reduces filtering requirements.
(b) Proposed Converter improves the input power factor,
(c) One inductor is used in the circuit. Less use of inductor minimize the voltage
stresses on the switching devices and prolong their lifetime and
(d) Reduced inductor use provides smaller size and weight advantage.

A diode-capacitor arrangement is used in this circuit to perform the buck operation in a


limited but useful range. The circuit operation is described in the following sections.

4.2 Principle of Operation

During positive cycle as switch turns ON and OFF and switching frequency f s

(switching period Ts), the circuit has two states (A and B) which are shown in Figs 4.2
and 4.3 respectively.

Fig 4.2: Current Flow diagram of State-A

- 36 -
State-A

Switch is ON, inductor charges by a current supplied by input source and


capacitor voltage appear across lower output capacitor having voltage v 0

For time t  t i to t  t i  DTs

𝑣𝐿 = 𝑣𝑖𝑛 − 0 (4.1)

v c
 0 (midpoint of output capacitors are considered reference point) (4.2)

State-B

Switch OFF, input voltage plus inductor voltage charges intermediate capacitor
C and upper output capacitor to a total intermediate voltage vint max
sin t ,where,

From time t  t i  DTs to t  t i  Ts

𝑣𝐿 = 𝑉𝑖𝑛 − 𝑉𝑖𝑛𝑡𝑚𝑎𝑥 𝑆𝑖𝑛𝜔𝑡 and


(4.3)

vc  Vint max sin t  v0


(4.4)

- 37 -
Fig 4.3: Illustration of State-B with current flow direction.

The major path shown in Fig 4.3 is the shortest path of charges upper output capacitor at

v 0
where other minor paths exit.

State-C and D are the inductor and capacitor charging paths during the negative supply
cycle as the switch turns ON and OFF as shown in Fig 4.4 and 4.5

Fig 4.4: Illustration of State-C

- 38 -
In state C, inductor current flows in the negative direction as switch turns ON and the
intermediate capacitor voltage connects to upper output capacitor where,

v L  vin  0
(4.5)

and 𝑣𝑐 = 0 (4.6)

for 𝑡 = 𝑡𝑖 𝑡𝑜 𝑡 = 𝑡𝑖 + 𝐷𝑇𝑠

Fig 4.5: Illustration of State D

In state-D inductor and input voltage charges bottom output capacitor to v 0


and

intermediate capacitor to vint voltage in the period t  t i  DTs to t  t i  Ts

where, vL  Vin max sin t  Vint max sin t and

vc  Vint max sin t  v0

The intermediate capacitor differential voltage and the intermediate capacitor voltage vc

and vint
are sinusoidal boost voltages. The difference of the two voltages charge the

- 39 -
output capacitor voltage to v 0
rectified voltages and the output voltage is the

V 0 max
 V 0 max  2V 0 max (average voltage) which appear across the load.
  

The boost-buck characteristic of the proposed circuit can be explained from the ideal
voltage gain expression of the circuit as derived in the next section using volt-sec and
current sec balance of the inductor and intermediate capacitor.

4.2.1 Ideal Voltage Gain Expression of Proposed Boost-Buck single-phase AC-DC


converter

Fig 4.6 Voltage gain of proposed converter

Assuming no phase shift, taking phase shift into consideration the V AV value will be

same

v V sin t
in in max (4.7)

- 40 -
v V
0 0 max
sin t
(4.8)

v V sin t
int int max (4.9)

v  mod ulated (V AV   2V 0 max )


x
 (4.10)

Switch ON time ,

v L  vin  0

vc  0 ;(from t  t i to t  t i  DTs time)

Switch OFF time,

v  v v
L in int
(where , vint  vc  v0 )
(4.11)

v vc int
 v0 (from t  t i  DTs to Ts time) (4.12)

v vx int
 vc

 V 0 max (modulated) (4.13)

For one generalized switching cycle,

t i T sw t i  DT sw t i T sw
 v L
dt   vindt    (vin  v0 int)dt
ti ti t i DT s (4.14)

volt-sec balance are one supply frequency cycle(50Hz or 60Hz)=0

If Tsup  NTsw , where N is the switching per cycle,

1
 di (t )  L  v (t )  0 over a supply frequency cycle
L L
(4.15)

- 41 -
N t iT sw N t i DT sw N t iT sw
  v dt  o  
i 1
L
i 1
 vindt  
i 1 
 (vin  v0 int)dt
ti ti t i DT sw

N t iT sw t iT swN


i 1
V in max sin tdt  
i 1 
 (V in max sin t V 0 int max sin(t   ))dt  0
ti t i DT sw

whereV 0 int max sin(t   ) is phase shift considered

After Integration,

[ V in max cos t ]t i DT sw  [ V in max cos t  V 0 int max cos(t   )]t iT sw  0
N N


 

i 1  ti i 1   t i DT sw

which leads to,

{ V  cos  (ti  DTsw )  V in max cos ti  V in max cos  (ti  Tsw ) 
N
in max

i 1  
V in max
cos(ti  DTsw )  V 0 int max cos(ti  Tsw   ) 
 
V 0 int ac
cos(ti  DTsw   )}  0

Rearranging following can be obtained,

V {cos ti  cos  (ti  Tsw )}   V 0 int max {cos(ti  DTs   )  cos(ti  Ts   )}
N N
max

i 1  i 1 

(4.16)
Using following identity,

A B BA
cos A  cos B  2 sin sin
2 2

equation (4.16) can be written as,

- 42 -
N
ti  ti  Tsw ti  Tsw  ti
 V
i 1
in max
2 sin
2
sin
2

N
ti  DTsw    ti  Ts  
 V 0 int max
2 sin
2
= i 1
(4.17)
t  Tsw    ti  DTsw  
sin i
2

equation (4.17) can be written as,

N
Tsw Tsw N
(1  D)Tsw
V in max sin(ti 
i 1 2
) sin(
2
)  V 0 int max sin[(ti   ) 
i 1 2
]

(1  D)Tsw
sin[ ]
2

(4.18)
which can be written as,

Ts
sin
2
N
Tsw N
(1  D)Tsw

(1  D)Tsw i1 V in max
sin(t i 
2
)   V 0 int max
sin[(ti   ) 
2
]
sin i 1
2

(4.19)

Rearranging (4.19), equation(4.20) results

Tsw
T
sin sw *[ 2 ]
2 Tsw
N
(1  DTsw )Tsw 2
N
T
 V 0 int max
sin[(t i   ) 
2
] 
(1  D)Tsw  V in max
sin[(ti  s )
2
i 1
sin i 1
2 T
*[(1  D) sw ]
Tsw 2
[(1  D) ]
2

(4.20)

- 43 -
sin 
using


0

1 and as T sw
0 equation (4.20) reduces to ,

Ts
N
(1  DTsw )( * 0) 2
N
 *0

i 1
V 0 int max
sin[(ti   ) 
2
]
(1  D )Ts V
i 1
in max
sin(ti 
2
)

2 (4.21)

1
or V 0 int max
sin(ti   )  
1  D V in max
sin(ti ) (4.22)

which is an expression of boost voltage gain when maximum voltages of


input/output sine waves are related by ,

1
V 
0 int max
1  D V in max

vint divides between C and upper output capacitor during switch OFF time (in the positive

half cycle) equally due to switching and assumed equal small capacitors. Therefore v 0
of upper output capacitor during positive half cycle charges to maximum peak,

1 1
 Vin max
2 (1  D)

while lower output capacitor charges at,

11 1
 Vin max
2 2 (1  D)

1 1
 Vin ,
4 (1  D)

also during each OFF time q +ve supply half cycle. Similarly during negative half supply
cycle two output capacitors charges to

1 1 1 1
Vin max and Vin max
2 (1  D) 4 (1  D)

- 44 -
Ultimately combined capacitor voltage across load is therefore full wave rectified
waveform having maximum value of

1 1 1 1
 Vin max  Vin max
2 (1  D) 4 (1  D)

3 1
 Vin max ,
4 (1  D)

and the average output voltage is ,

3 1 2Vin max
V0 AV 
4 (1  D) 

3 1
V0 AV  Vin max
2 (1  D)
(4.23)

A comparison has been made between the simulated output voltage and theoretical output
voltage. Theoretical output voltage has been calculated from the above derived equation.
The parameters we have considered during the simulation and theoretical calculation is
given below.

Output DC Capacitor C1= C2= 220uF ,

AC Capacitor C = 4.4uF,

v in max
 30V and Switching frequency f  5000Hz
s

- 45 -
Table 4-I(a): Simulated and theoretical output voltage comparison Table

Duty cycle v ref 1 to v (V)


int max
v
0 (V) v 0

(D)
0/2 (V)
v int
 ch3 (V) (simulated) (theoretical)

0.1 40 7.5 17 15.91


0.2 48 10 20 17.91
0.3 54 12 23 20.46
0.4 62 15 28 23.80
0.5 71 18 35 28.64
0.6 88 20 40 35
0.7 108 25 50 47
0.8 125 35 68 71
0.9 132 35 70 143

Now if we consider that the a.c capacitor ―


C‖ and the upper output capacitor ―
C 1‖ is not
equal, then the voltage 𝑣0 of upper output capacitor C1 during positive halfcycle charges
to maximum peak-

C Vin max
C  C1 1  D

While lower output capacitor charges at-

1 C Vin max
2 C  C1 1  D

Similarly, during negative half cycle of supply, two output capacitor charges at-

C Vin max 1 C Vin max


C  C1 1  D and 2 C  C1 1  D

- 46 -
Ultimately combined capacitor voltage across load is therefore fullwave rectified
waveform having maximum value of-

C Vin max 1 C Vin max


 
C  C1 1  D 2 C  C1 1  D

C Vin max  1

C  C1 1  D 1  2 
 

3 C Vin max

2 C  C1 1  D

The average output voltage –

3 C Vin max 2
VOAV 
2 C  C1 1  D 

3 C Vin max
VOAV 
 C  C1 1  D

4.3 Proposed Boost-Buck AC-DC Converter, Output Bridge Rectifier:

The proposed boost -buck converter may have a variation with a bridge type output as
shown in Fig 4.7

- 47 -
Fig 4.7

The circuit has four states of operations, two during the positive half cycle of the supply
sine wave (A and B) and the other two are during the negative half cycle of the supply
sine wave. The principle of operation during positive supply sine wave (state A and B are
illustrated in Fig 4.8(a) and (b)).During the negative supply sine wave similar operation
will take place to charge the output capacitor C0.

4.3.1 Principle of Operation of Output Bridge Type Proposed Boost Buck


Converter:

In this section the operating principle of the circuit of Fig 4.7 is explained during positive
half cycle of the supply sine wave during switch ON and OFF period with help of Fig
4.8(a) and (b).

Fig (a)

- 48 -
Fig (b)

Fig 4.8 proposed Boost-Buck AC-DC Converter circuit during state -A and B of +ve
supply sine wave when the (a) switch is ON (state A) and (b) switch is OFF(state B)

In state A: when the switch is ON during positive supply sine wave, vin charges inductor

L through the path shown Fig 4.8(a) (Input side vin  L  D  switch  D  vin ) . The
capacitor C distributes charge to output capacitor C0 through path shown in Fig 4.8(a)
output side (vc  D  switch  D  D  C0  D  vc ) .

In state B: when the switch is OFF during positive supply sine wave, vin and inductor L

voltage charges C and C0 through the path shown in Fig 4.8(b)

(vin  vL  C  D  C0  D  vin ) .

During the negative supply sine wave two more states C and D exist like these of states
A and B.

- 49 -
4.3.2 Ideal Input/output Voltage Relationship of Proposed Boost-Buck Output
Bridge type AC-DC Converter:

Referencing to Fig 4.7, for a generalized switching cycle during the positive supply sine
wave following relationships hold assuming capacitors are of negligible values,

vL  vin  0 during ti to ti  DTs time

vL  vin  vint during ti  DTs to ti  Ts time

TON
where, D
Ts

(1  D)Ts  TOFF

TON  ON time

TOFF  OFF time

D  Duty cycle

For a generalized switching cycle the integration of volt-sec of the inductor is,

t i  DTs t i  Ts


ti
vin dt   (v
t i  DTs
in  vint )dt

1
Assuming these are N switching per a supply cycle (Ts  NT , where  fsup ply  supply
T
frequency) and vin , vint , v0 are sinusoidal,

vin  Vin max sin t

vint  Vint max sin t

v0  V0 max sin t

- 50 -
without any shift between them(the final result will be same even if we assume shift
between the waveforms).

 volt  sec balance over a full ac supply cycle = 0 leads to,


N t i  DTs N t i  Ts

 
i 1
vin dt    (v
i 1 t i  DTs
in  vout )dt  0
ti

N ti  DTs N ti Ts

or,   Vin max sin tdt    (V in max  Vint max ) sin tdt  0 (4.24)
i 1 ti i 1 ti  DTs

After integration and trigonometric manipulations using identities,

A B B A
sin A  sin B  2 cos cos ,
2 2

sin  Ts
lim  1 or, lim sin    and  0 as Ts leads to be small
 0   0 2

With the same rationale used as in equation 4.15 to 4.24,following is obtained from
equation (4.25)

N
1 N
Vint max  sin t  Vin max  sin t (4.25)
i 1 1 D i 1

1
or, Vint max  Vin max which divides equally (assuming C  C0 )
1 D

between C and C0 resulting

1 1
V0 max  Vint max  Vin max (4.26)
2 2(1  D)

- 51 -
1
The V0 AV for full wave rectified wave having V0 max  Vin max is therefore,
2(1  D)

2
V0 AV  Vin max
2(1  D)

Vin max
or, V0 AV  (4.27)
(1  D)

The comparison of calculated ideal V0 AV values of the circuit with these obtained for a
simulation circuit are shown in Table 4.1(b).The comparison shown ideal values deviate
significantly beyond certain duty cycles (higher than 0. 7 and lower than 0.2) as expected
due to no idealities of the circuit components. Here the parametric values are L=5mH,
C=22uF and C0 = 800uF.

Table 4-I(b) Simulated and theoretical output voltage comparison Table

Duty cycle Vin Vint v 0 (V) v 0


(V)
(D) (simulated) (theoretical)
Max RMS
0.1 30 23.34 12.58 33.33
0.2 30 24.84 14.33 37.50
0.3 30 26.93 16.62 42.86
0.4 30 28.75 19.62 50
0.5 30 31.32 23.49 60
0.6 30 35.09 29.13 75
0.7 30 39.16 38.49 100
0.8 30 45.52 56.09 150
0.9 30 28.12 71.62 300

- 52 -
4.4 Circuit Parameters

Circuit parameter during the simulation is a very important one. To get good efficiency
from the proposed converter, component values have been selected by using trial and
error method. Selected parameters are given in Table 4-II.

Table 4-II: Parameters of proposed circuit used for simulation

Parameters Value

Input, Vin 300V, 50Hz

Boost Inductor, L1 10mH

MOSFET (as a switch) IRF840

Diode MR2406F

AC Capacitor, C 22µF

O/P DC Capacitor C1,C2 1000µF

Load, RL 100Ω

The mentioned values in Tables 4-II have used in simulation and simulations have been
carried out in Orcad 9.2.

4.5 Performance of Proposed Split Capacitor Output Circuit:

The proposed converter can operate in buck and boost modes depending on the duty
cycle of gate pulse which drives the switch of the converter circuit. Lower value of gate
pulse duty cycle offers lower output voltage of the converter in the buck operation.
Similarly the higher value of gate pulse duty cycle provides larger output voltage
compared to the input voltage of the converter. Thus it performs the boost operation. On
the other hand switching frequency is also a determinant parameter of buck- boost mode
of the converter. The performance of the converter at different switching frequencies f s
(ranges from 2 KHz to 7 KHz) is studied. The performance has been studied in terms of

- 53 -
input current THD, input power factor, conversion efficiency, voltage gain of the
converter etc.

4.5.1 Proposed converter performance at different switching frequencies:

The proposed converter has been simulated at different switching frequencies (ranging
from 2 KHz to 7 KHz) for duty cycle (D) 0.1 to 0.9. The typical input current and their
corresponding FFT, output voltage wave shapes are illustrated from Figs.4.9 to 4.29. A
comparison table between proposed and conventional converter of THD, input power
factor, efficiency and output voltage has been shown. The relationships are also shown
graphically from Fig 4.30 to Fig. 4.35. These performance illustrations are recorded for
open loop operation of the circuit with resistive load.

- 54 -
20A

10A

0A

-10A

-20A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig 4.9 Input current of Proposed Converter at fs = 2 KHz, D = 0.3

10A

5A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V1)
Frequency

Fig 4.10 Input current FFT of Proposed Converter at fs = 2 KHz, D = 0.3

400V

300V

200V

100V
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R4:2,R4:1)
Time

Fig 4.11 Output Voltage Waveform of Proposed Converter at fs = 2 KHz, D = 0.3

- 55 -
20A

10A

0A

-10A

-20A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig 4.12 Input current of Proposed Converter at fs = 2 KHz, D = 0.4

12A

8A

4A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V1)
Frequency

Fig 4.13 Input current FFT of Proposed Converter at fs = 2 KHz, D = 0.4

450V

400V

300V

200V

125V
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R4:2,R4:1)
Time

Fig 4.14 Output Voltage Waveform of Proposed Converter at fs = 2 KHz, D = 0.4

- 56 -
20A

0A

-20A

-40A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig 4.15 Input current of Proposed Converter at fs = 2 KHz, D = 0.5

20A

15A

10A

5A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V1)
Frequency

Fig 4.16 Input current FFT of Proposed Converter at fs = 2 KHz, D = 0.5

500V

400V

300V

200V
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R4:2,R4:1)
Time

Fig 4.17 Output Voltage Waveform of Proposed Converter at fs = 2KHz, D = 0.5

- 57 -
40A

20A

0A

-20A

-40A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig 4.18 Input current of Proposed Converter at fs = 2 KHz, D = 0.6

30A

20A

10A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V1)
Frequency

Fig 4.19 Input current FFT of Proposed Converter at fs = 2 KHz, D = 0.6

600V

500V

400V

300V

200V
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R4:2,R4:1)
Time

Fig 4.20 Output Voltage Waveform of Proposed Converter at fs = 2KHz, D = 0.6

- 58 -
50A

0A

-50A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig 4.21 Input current of Proposed Converter at fs= 2 KHz, D = 0.7

40A

30A

20A

10A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V1)
Frequency

Fig 4.22 Input current FFT of Proposed Converter at fs= 2KHz , D = 0.7

800V

600V

400V

100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R4:2,R4:1)
Time

Fig 4.23 Output Voltage Waveform of Proposed Converter at fs= 2KHz , D = 0.7

- 59 -
100A

50A

0A

-50A

-100A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig 4.24 Input current of Proposed Converter at fs=2 KHz, D = 0.8

80A

60A

40A

20A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V1)
Frequency

Fig 4.25 Input current FFT of Proposed Converter at fs= 2 KHz, D = 0.8

900V

800V

700V

600V

500V
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R4:2,R4:1)
Time

Fig 4.26 Output Voltage Waveform of Proposed Converter at fs= 2KHz , D = 0.8

- 60 -
100A

50A

0A

-50A

-100A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig 4.27 Input current of Proposed Converter at fs = 2 KHz, D = 0.9

100A

50A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V1)
Frequency

Fig 4.28 Input current FFT of Proposed Converter at fs = 2 KHz, D = 0.9

700V

600V

500V

400V

100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R4:2,R4:1)
Time

Fig 4.29 Output Voltage Waveform (Buck) of Proposed Converter at fs = 2KHz, D = 0.9

- 61 -
Table 4-III: Comparison Table in terms of THD, Input power factor, Efficiency and Gain
for fs = 2 KHz

Input Power Factor


THD (%) Efficiency, ŋ (%) Gain & Mode
Duty (PF)
Cycle
Proposed Conventional Proposed Conventional Proposed Conventional Proposed
Mode of
(D) Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Converter
operation
Topology Topology Topology Topology Topology Topology gain

0.1 43.50 26.24 0.899 0.2739 85.4 83.1 0.85 Buck


0.2 35.80 173.577 0.940 0.394 87.6 85.2 0.96 Buck

0.3 28.73 176.809 0.953 0.489 92.5 85.7 1.11 Boost

0.4 22.36 102.667 0.950 0.564 92.8 86.1 1.28 Boost

0.5 17.94 102.120 0.981 0.629 93.5 86.8 1.53 Boost

0.6 13.94 68.83 0.987 0.659 93.8 89.88 1.87 Boost

0.7 9.36 73.70 0.966 0.679 91.2 88.17 2.30 Boost

0.8 5.07 64.99 0.856 0.785 90.7 87.70 2.60 Boost

0.9 1.18 63.18 0.84 0.83 77.7 51.59 1.69 Boost

- 62 -
THD(%) Vs Duty Cycle
200%
180%
160%
140%
120%
THD(%)

100%
80% Proposed
60% Conventional
40%
20%
0%
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Duty Cycle,D

(a)

Input Power Factor Vs Duty Cycle


1.5

Proposed
Conventional

1
Input Power Factor

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle, D

(b)

- 63 -
Efficiency Vs Duty Cycle
100

90

80

70 Proposed
Conventional
60
Efficiency (%)

50

40

30

20

10

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle, D

(c)

Gain Vs Duty Cycle


3

2.5
Gain of Proposed Converter

1.5

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(d)

Fig.4.30: Comparison curve of Diode-Capacitor assisted Boost-Buck AC-DC Converter


at fs = 2KHz of (a) THD, (b) power factor, (c) efficiency and (d) Gain

- 64 -
Same study of the proposed converter is made for switching frequencies of 2 to 7KHz
with the increment of switching frequency by 1 KHz. The tabular results of switching
frequencies 3 to 7 KHz are presented in tables 4-IV to 4-VIII. Graphically the tabular
results are shown in Figs 4.31 to 4.35 corresponding to results of tables 4-IV to 4-VIII
respectively. Though the results are shown for open loop circuit, yet the performance of
the circuit in terms of input current, THD, input power factor and efficiency within
certain voltage gain is significantly good (better than individual boost or buck AC-DC
converter operating in open loop configuration).

- 65 -
Table 4-IV: Comparison Table in terms of THD, Input power factor, Efficiency and Gain
for fs = 3 KHz

Input Power
THD (%) Efficiency, ŋ (%) Gain & Mode
Duty Factor(PF)
Cycle Proposed Conventional Proposed Conventional Proposed Conventional Gain of
(D) Mode of
Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Proposed
operation
Topology Topology Topology Topology Topology Topology converter

0.1 44.80 313.7472 0.911 0.285 87.9 83.3 0.88 Buck


0.2 37.52 222.3602 0.933 0.402 90.4 86.7 1.01 Boost

0.3 29.46 160.4881 0.954 0.489 91.2 87.8 1.16 Boost

0.4 22.15 128.7390 0.972 0.556 91.7 88.5 1.35 Boost

0.5 16.82 107.9941 0.993 0.608 92.3 90.3 1.60 Boost

0.6 12.45 84.07093 0.988 0.647 93.4 90.8 1.94 Boost

0.7 8.75 75.88462 0.977 0.669 90.2 86.7 2.36 Boost

0.8 4.35 66.87591 0.826 0.793 88.4 83.6 2.64 Boost

0.9 1.15 49.88305 0.821 0.778 76.8 67.3 1.64 Boost

- 66 -
THD(%) Vs Duty Cycle
350%

300%

250%

200%
THD(%)

150% Proposed
Conventional
100%

50%

0%
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Duty Cycle,D

(a)

Input Power Factor Vs Duty Cycle


1.5

Proposed
Conventional

1
Input Power Factor

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle, D

(b)

- 67 -
Efficiency Vs Duty Cycle
100

90

80

70

60
Efficiency (%)

Proposed
Conventional
50

40

30

20

10

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle, D

(c)

Gain Vs Duty Cycle


3

2.5
Gain of Proposed Converter

1.5

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(d)

Fig.4.31: Comparison curve of Diode-Capacitor assisted Boost-Buck AC-DC Converter


at fs = 3KHz of (a) THD, (b) power factor, (c) efficiency and (d) Gain

- 68 -
Table 4-V: Comparison Table in terms of THD, Input power factor, Efficiency and Gain
for fs = 4 KHz

Input Power
THD (%) Efficiency, ŋ (%) Gain & Mode
Duty Factor(PF)
Cycle Proposed Conventional Proposed Conventional Proposed Conventional Gain of
Mode of
(D) Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Proposed
operation
Topology Topology Topology Topology Topology Topology converter

0.1 44.79 58.85745 0.923 0.287 89.60 81.2 0.90 Buck


0.2 38.34 181.3701 0.943 0.402 92.40 88.1 1.04 Boost

0.3 29.74 189.1814 0.973 0.483 93.2 90.2 1.19 Boost

0.4 22.49 132.9273 0.983 0.549 93.5 91.2 1.38 Boost

0.5 17.12 135.0193 0.995 0.625 94.2 91.5 1.64 Boost

0.6 12.63 88.45551 0.988 0.6395 90.6 88.0 1.98 Boost

0.7 8.80 90.35899 0.969 0.667 87.6 85.7 2.40 Boost

0.8 4.23 64.40952 0.811 0.797 85.2 76.5 2.63 Boost

0.9 1.04 59.47495 0.716 0.69 76 63.8 1.59 Boost

- 69 -
THD(%) Vs Duty Cycle
200%
180%
160%
140%
120%
THD(%)

100%
80% Proposed
60% Conventional
40%
20%
0%
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Duty Cycle,D

(a)

Input Power Factor Vs Duty Cycle


1.5

Proposed
Conventional

1
Input Power Factor

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(b)

- 70 -
Efficiency Vs Duty Cycle
100

90 Proposed
Conventional
80

70

60
Efficiency(%)

50

40

30

20

10

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(c)

Gain Vs Duty Cycle


3

2.5
Gain of Proposed Converter

1.5

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(d)

Fig.4.32: Comparison curve of Diode-Capacitor assisted Boost-Buck AC-DC Converter


at fs = 4KHz of (a) THD, (b) power factor, (c) efficiency and (d) Gain

- 71 -
Table 4-VI: Comparison Table in terms of THD, Input power factor, Efficiency and Gain
for fs = 5 KHz

Input Power
THD (%) Efficiency, ŋ (%) Gain & Mode
Duty Factor(PF)
Cycle Proposed Conventional Proposed Conventional Proposed Conventional Gain of
(D) Mode of
Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Proposed
operation
Topology Topology Topology Topology Topology Topology converter

0.1 44.71 90.72428 0.919 0.283 90.6 90.9 0.91 Buck


0.2 38.23 91.41471 0.940 0.393 92.2 92.3 1.05 Boost

0.3 28.80 58.28686 0.958 0.476 94.3 92.5 1.21 Boost

0.4 21.71 67.1902 0.975 0.477 94.1 93.0 1.41 Boost

0.5 16.30 106.7869 0.996 0.597 93.3 91 1.67 Boost

0.6 12.39 76.71174 0.988 0.636 91.1 89.12 2.01 Boost

0.7 8.09 56.54158 0.968 0.700 87.1 84.3 2.43 Boost

0.8 3.79 36.26669 0.90 0.801 75.2 74.6 2.63 Boost

0.9 1.004 141.6932 0.890 0.879 70.1 62.0 1.57 Boost

- 72 -
THD(%) Vs Duty Cycle
160%
140%
120%
100%
THD(%)

80%
Proposed
60%
Conventional
40%
20%
0%
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Duty Cycle,D

(a)

Input Power Factor Vs Duty Cycle


1.5

Proposed
Conventional

1
Input Power Factor

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(b)

- 73 -
Efficiency Vs Duty Cycle
100

Proposed
90
Conventional

80

70

60
Efficiency(%)

50

40

30

20

10

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(c)

Gain Vs Duty Cycle


3

2.5
Gain of Proposed Converter

1.5

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(d)

Fig.4.33: Comparison curve of Diode-Capacitor assisted Boost-Buck AC-DC Converter


at fs = 5KHz of (a) THD, (b) power factor, (c) efficiency and (d) Gain

- 74 -
Table4-VII: Comparison Table in terms of THD, Input power factor, Efficiency and Gain
for fs = 6 KHz

Input Power
THD (%) Efficiency, ŋ (%) Gain & Mode
Duty Factor(PF)
Cycle Proposed Conventional Proposed Conventional Proposed Conventional Gain of
(D) Mode of
Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Proposed
operation
Topology Topology Topology Topology Topology Topology converter

0.1 44.25 274.6923 0.914 0.276 90.5 79.1 0.92 Buck


0.2 37.95 215.6353 0.928 0.392 91.2 82.4 1.07 Boost

0.3 29.50 154.5971 0.970 0.472 92.1 84.1 1.22 Boost

0.4 21.89 141.3575 0.976 0.539 91.5 83.1 1.42 Boost

0.5 16.55 112.1383 0.987 0.613 88.5 82.9 1.68 Boost

0.6 12.15 90.88342 0.987 0.633 88.3 81.3 2.03 Boost

0.7 8.27 79.49102 0.962 0.667 83.3 77.6 2.45 Boost

0.8 3.94 63.10770 0.793 0.805 78.8 74.6 2.62 Boost

0.9 0.91 46.11921 0.398 0.887 63.9 56.5 1.53 Boost

- 75 -
THD(%) Vs Duty Cycle
300%

250%

200%

150%
THD(%)

Proposed
100%
Conventional
50%

0%
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Duty Cycle,D

(a)

Input Power Factor Vs Duty Cycle


1.2

Proposed
Conventional
1

0.8
Input Power Factor

0.6

0.4

0.2

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Duty Cycle,D

(b)

- 76 -
Efficiency Vs Duty Cycle
100

90 Proposed
Conventional
80

70

60
Efficiency(%)

50

40

30

20

10

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(c)

Gain Vs Duty Cycle


3

2.5
Gain of Proposed Converter

1.5

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(d)

Fig.4.34: Comparison curve of Diode-Capacitor assisted Boost-Buck AC-DC Converter


at fs = 6KHz of (a) THD, (b) power factor, (c) efficiency and (d) Gain

- 77 -
Table 4-VIII: Comparison Table in terms of THD, Input power factor, Efficiency and
Gain for fs = 7 KHz

Input Power
THD (%) Efficiency, ŋ (%) Gain & Mode
Duty Factor(PF)
Cycle Proposed Conventional Proposed Conventional Proposed Conventional Gain of
Mode of
(D) Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Buck-Boost Proposed
operation
Topology Topology Topology Topology Topology Topology converter

0.1 43.50 318.5957 0.906 0.276 89.7 80 0.93 Buck


0.2 37.44 207.9902 0.930 0.387 91.5 82.1 1.08 Boost

0.3 29.11 148.9741 0.960 0.469 91.2 84.8 1.23 Boost

0.4 21.51 121.5166 0.977 0.534 90.8 84 1.44 Boost

0.5 16.28 96.98049 0.987 0.611 88.0 83.6 1.70 Boost

0.6 11.77 76.92060 0.987 0.635 87.3 81.7 2.05 Boost

0.7 8.19 74.02943 0.956 0.6699 82.1 77.3 2.46 Boost

0.8 3.84 58.23251 0.780 0.807 70.5 63.9 2.62 Boost

0.9 0.846 49.75716 0.39 0.879 62.8 58.5 1.49 Boost

- 78 -
THD(%) Vs Duty Cycle
350%

300%

250%

200%
THD(%)

150% Proposed
Conventional
100%

50%

0%
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Duty Cycle,D

(a)

Input Power Factor Vs Duty Cycle


1.5

Proposed
Conventional

1
Input Power Factor

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(b)

- 79 -
Efficiency Vs Duty Cycle
100

90 Proposed
Conventional
80

70

60
Efficiency(%)

50

40

30

20

10

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(c)

Gain Vs Duty Cycle


3

2.5
Gain of Proposed Converter

1.5

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle,D

(d)

Fig.4.35: Comparison curve of Diode-Capacitor assisted Boost-Buck AC-DC Converter


at fs = 7KHz of (a) THD, (b) power factor, (c) efficiency and (d) Gain

- 80 -
4.6 Discussions:

The comparison between proposed converter and conventional converter at different


switching frequencies has been presented by a series of comparison tables (from Table 4-
III to Table 4-VIII). Later it has also been shown graphically where we can see that the
proposed converter performs better in terms of input current THD, input power factor and
efficiency. A conspicuous result has been found when we observe the THD graphical
plots at different switching frequencies. The graphs show that the proposed converter
generates less input current THD compared to the conventional converter. Though only
the open loop configuration of the proposed converter is considered, the performance is
remarkable. The input power factor curves at different switching frequencies of both
converters follow the similar pattern of result. At low duty cycle the conventional
converter offers a very low power factor, whereas the proposed converter retains a high
power factor from 0.2 to 0.7 duty cycle at different switching frequencies. This improved
power factor enables the converter to draw less input current during the operation and
ensures low loss of the converter. But one thing should be noted that at high duty cycle
(greater than 0.7) the proposed converter power factor becomes lower. The efficiency
comparison curves manifest that the proposed converter is little bit more efficient than
the conventional converter. In addition to that, the graphical representation of gain versus
duty cycle ensures the converter dual mode (Boost and Buck) operation at limited range.

- 81 -
CHAPTER 5

INPUT CURRENT AND POWER FACTOR IMPROVEMENT OF PROPOSED


SINGLE -PHASE AC-DC CONVERTER

There are several control mechanisms to attain the stability of SMPS based converter
circuits. Among them the sliding mode control, PID control, Fuzzy logic control, PLL
control, Hysteresis control, SVM control etc are very popular [3],[11]-[14]. A tuned
Proportional Integral (PI) controller circuit has been designed to get several benefits from
proposed converter. The benefits that are obtained are described later. Design and tuning
of controller is mentioned. A Proportional-Integral is a control loop feedback mechanism
which calculates the error value as the difference between the desired set point and a
measured process variable. The controller attempts to minimize the error over time by the
adjustment of control variable. A simple PI controller has a control variable U(t) as a
weighted sum which can be defined as [8]-[21]-

t
U (t )  K p e(t )  K i  e(t )dt
0

Where Kp and Ki are the proportional and integral gain of the controller circuit
respectively. These gains depend upon the parameters (resistance, capacitance) of the
control circuit. During the control circuit tuning, these gains play a significant role.

5.1 Control Circuit of Proposed AC-DC Converter

To control the output voltage of proposed converter at any fluctuations of load or input
source voltage, to shape the input current nearly sinusoidal irrespective of input boost
inductor value and to improve the input power factor a tuned PI controller is designed.
The circuit configuration of the controller is shown in Fig 5.1.

- 82 -
Voltage Control Loop Current Control Loop

R2
Iin R14
33k Vin
330k
Vcc-
U10A
ABS
11

U12A

Comparator
R7 ABS Vcc-

11
TL084
2 R15
V-

- TL084
2

V-
10k -
1 -1
OUT 10k
1
3 OUT Vcc+ gate1
V+

+ 3

V+
+
Vcc+
4

-1

4
0 U2A
Gate Pulse

4
C1 Vcc+ 3
.55

V+
+
1 -1 1 E1
1 +
0.47u 0 OUT +
- R11
C7 2
-

V-
U11A - E 10k
R9 R10
11

Vcc- -1
R6 TL084 TL084
vout 3.3k 0

11
3.3k 2 .47u
V-

-
V4 22k U3A
Vref 1
11

V6
1.5V OUT R13 Vcc- V1 = 0 V2 = 20 Vcc-
TL084 ref1

Carrier
3 2 TD = 0
V+

V-

+ - TR = .001m
22k 1 TF = .148m Vcc+
0 Vcc+ OUT
4

0 3 PER = .15m 0
V+

+ V2
PW = .001m 25
Vcc+
4

Signal
0 V3
25
0

Vcc-

Fig. 5.1 Tuned PI control circuit of proposed AC-DC converter

5.2 Working Procedure:

The output voltage is fed back to the input of the controller circuit. The controller circuit
consists of a voltage control loop and a current control loop. Each loop contains a PI
controller. Output voltage is compared with the reference voltage and generates an error

- 83 -
voltage. Generated error voltage goes through the PI voltage controller and produces the
reference current signal which has been compared with the input current. It generates the
error current signal which has been sent to the input of the PI current controller circuit.
After being processed in current controller circuit, the message signal generated which
has been compared with the high frequency carrier signal V6. After this comparison in a
comparator, we get the gate pulse at the output. Block diagram of the control circuit is
shown in Fig 5.2 and typical waveforms of the controller obtained during simulation are
shown in Figs 5.3 to 5.6

Iin
Voltage Error
Current Error

Vout - Voltage Control Loop


- Current Control Loop Comparator
+ +
PI
Iref Gate Pulse
PI

Vref
High Frequency
Carrier

Fig. 5.2 Block diagram of the Control circuit

- 84 -
The voltage error signal of the converter has given below-

100mV

Voltage Error

0V

-100mV

-200mV
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(N138641)
Time
Fig. 5.3 Voltage Error Signal

Output of Voltage control loop has shown from simulation-

1.50V

Voltage Controller Output


1.25V

1.00V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(MULT1:IN2)
Time

Fig. 5.4 Output of Voltage controller

Gate pulse signal has been generated by comparing the current controller output to
the high frequency carrier signal. The controller output and high frequency carrier signal
has shown which are responsible to generate gate pulse.

- 85 -
20V
Carrier Signal

10V

Controller Output

0V
119.0ms 119.2ms 119.4ms 119.6ms 119.8ms 120.0ms 120.2ms 120.4ms 120.6ms 120.8ms 121.0ms
V(U2A:-) V(GAIN1:OUT)
Time

Fig. 5.5 Controller output (red) and 15 KHz carrier (green) signal

The generated Pulse Width Modulated (PWM) gate pulse-

40V

Gate pulse

0V

-40V
140.0ms 140.1ms 140.2ms 140.3ms 140.4ms 140.5ms 140.6ms 140.7ms 140.8ms 140.9ms 141.0ms
V(GATE1)
Time

Fig. 5.6 Generation of gate pulse at different scale

5.3 Tuning of PI Control Circuit:

To get the stable operation by PI control circuit the controller has been turned. There are
several techniques to tune the PI controller. These are manual tuning, Ziegler-Nichols
tuning, cohen-Coon tuning, Astrom-Hagglund methods etc. We have used the manual
tuning method to tune the controller. The steps that have been followed are,

- 86 -
1. At first the gain of the integrator keeps very small.

2. Then raise the proportional gain gradually and check the response of the circuit.

For a proportional block, the gain depends upon the feedback resistance and

input resistance. The relation is given by-

Rf
Kp   , where Rf is feedback Resistance and R is input side resistance of
R
Proportional block.
3. Now slowly increase the integral gain K i and observe its response. The
integral gain is related by the following equation-
1
Ki   , where C is the feedback capacitance and R is the input side
RC
resistance.

4. For different combinations of K p and K i the best response of controller

has

been found.

Aforementioned steps has been followed to find out the value of K p and K i . The values

thus obtained are,

For Voltage control loop,

K p = - 0.5 & K i = -56.465

For Current Control Loop,

K p = - 80 & K i = -263.50

The benefits of tuned PI controller can be perceived in case of input current shaping of
the converter. In the following, input current curves with tuned and without tuned
controller are presented.

- 87 -
20A

Distorted Input current

0A

-20A

100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V1)
Time

Fig. 5.7 Input current of proposed converter at constant load having without tuned
controller

30A

20A
Near About Sinusoidal Wave

0A

-20A

-30A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V1)
Time

Fig. 5.8 Input current of proposed converter at constant load having a properly tuned
controller

The output voltage of the proposed converter is controlled by a proportional Integral (PI)
controller which needs to be designed and tuned. The designed PI controller provides

- 88 -
several benefits when it is integrated with proposed converter. It is a robust control
system which can provide:

a. Stable output voltage of the converter during its output load change. It means
dynamic response is good.
b. Make the converter output voltage stable during voltage sag or voltage swell or
any disturbances occurs at the input source.
c. It helps to shape the input source current and reduces total harmonic distortion
(THD) irrespective of all values of input inductors.
d. The control system provides high Input power factor (above 95% all time) for
both buck and boost mode.

5.4 Stable Dynamic Response of Proposed Converter using PI controller:

A suitably designed and tuned PI control system has been integrated during the frequent
load change at the output of the converter. The dynamic response of the converter has
been observed. The output voltage remains stable during the variation of the load. To
evaluate the performance of the converter, a dynamic load change unit is connected
which has been shown in Fig.5.9. The load change unit is designed to operate at a certain
pattern. At first stage, only R21 (200 Ohm) is connected at the output of the converter.
After 250ms from simulation starts, the R17 (200 Ohm) load has been connected and
made the current carrying capacity higher at the output. This time due to increase the
current across the load, the output voltage decreases. But after a small time, a quick
recovery is seen at the output voltage and it remains stable. This quick recovery is
possible due to the integration of the PI controller unit. The total phenomenon has been
depicted in Fig.5.9 and Figs 5.10 to 5.12. Later, at 450ms the R17load has been cut-off
from the unit and once again the current falls down and voltage goes up. This time the
controller circuit operates to retain the converter voltage at a stable state. At last stage of
650 ms, R21 (200 Ohm) is disconnected and R18 (300 Ohm) is connected. This
phenomenon increases the load voltage slightly and decreases the current at the output.

- 89 -
Dynamic Load Change Unit

Vout
2 2

U13 U14
680u 10k
E2 250m 650m
1 1
+ +
R16 10m 100k -
- R17 R18 R21
E
200
.001 .001 200 300 200
22u
FREQ = 50 100k 0 2 2
VAMPL = 300
VOFF = 0 U16 U18
V1 680u
10k 450m 650m
E3 1 1
Vin

Extra Divide By 2 due


+
+ gate1
-
10k -
50

split C
E ref 1 .5u
H 0
0 0
H1 10k
-
+

50
Iin

Fig. 5.9 Proposed converter circuit with PI Controller having Dynamic Load Change Unit

800

Voltage Decrease
Stable Voltage

400

Current Increase

-400
100ms 200ms 300ms 400ms 500ms 600ms 700ms 800ms
V(R4:2,E2:2) -I(V1)
Time

- 90 -
Fig.5.10 Voltage stabilization due to PI Controller during load change.

800

Voltage Decrease
Stable Voltage

400

Current Increase

-400
100ms 200ms 300ms 400ms 500ms 600ms 700ms 800ms
V(R4:2,E2:2) -I(V1)
Time

Fig.5.11 Voltage stabilization due to PI Controller during load change at different


load pattern

800
Voltage Increase
Stable Voltage

400

Current Decrease

-400
100ms 200ms 300ms 400ms 500ms 600ms 700ms 800ms
V(R4:2,E2:2) -I(V1)
Time

Fig. 5.12 Voltage stabilization due to PI Controller during load change at different
load pattern

- 91 -
5.5 Input Current Shaping by PI controller

One of the conspicuous features of proposed converter is by using only one boost
inductor (L1), we can make the output voltage buck-boost having low harmonics in
input current. But the value of this input boost inductor plays a significant role in case
of input current of the converter. Without control circuit (Converter open loop state),
the inductor L1 determines the shape of the input current as well as the total harmonic
distortion. A series of input current curves show that the lower value of boost
inductor (L1) distorts the input current and increases its total harmonic distortion. It is
also obvious that the larger value of boost inductor shapes the input current near
about sinusoidal and reduces total harmonic distortion.

Vout

1000u 100k 1000u 10k


E2
100k + +
10m R16 10m -
-
E
.001 L1 .001 .001 22u
22u
FREQ = 50 100 L1 100k
0
FREQ = 50 100
VAMPL = 300 1000u 100k VAMPL = 300
VOFF = 0 VOFF = 0
V1 V1 1000u
10k
E3
gate1
Vin
+
+ gate1
-
50 10k -
ref 1 100
.05u ref 1
0 E .05u
H 0
0 0
H1 10k
-
50 +

50
Iin

(a) (b)

Fig. 5.13 (a) Converter without control (b) Converter with PI Control.

- 92 -
But larger inductance causes larger voltage drop across it and occurs large magnetic
loss which also reduce output voltage as well as efficiency of the converter. To
encounter the problem, PI controller has been designed and integrated with the
proposed converter. The controller determines the input current error and then
generates necessary gate pulse to shape the input current near about sinusoidal at any
value of input boost inductor. The simulation and evaluation has been made by the
circuits shown in Fig. 5.13 (a) Fig. 5.13 (b). In Fig. 5.13 (a) the switching frequency
and duty cycle is 8 KHz and 0.7 respectively. In Fig. 5.13 (b) the carrier switching
frequency and Vref is 15 KHz and 1.5V respectively. The simulated current wave
shapes at different values of L1 for both control and without control circuit has shown
in Figs 5.14 to 5.21.

150A

100A

0A

-100A

-150A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig. 5.14 Input current without PI controller when L1= 10mH, THD= 8.32%
300A

200A

0A

-200A

-300A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V1)
Time
Fig. 5.15 Input current with PI controller when L1= 10mH, THD= 7.93%

- 93 -
200A

100A

0A

-100A

-200A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig. 5.16 Input current without PI controller when L1= 5mH, THD= 12.06%

300A

200A

0A

-200A

-300A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V1)
Time

Fig. 5.17 Input current with PI controller when L1= 5mH, THD= 8.51%

It is evident from the figures that smaller value of L1 offers larger THD in case of
without control circuit. But the circuit with control can prevent from increasing THD
at lower value of L1.

- 94 -
400A

200A

0A

-200A

-400A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig. 5.18 Input current without PI controller when L1= 1mH, THD= 35.85%

300A

200A

0A

-200A

-300A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V1)
Time
Fig. 5.19 Input current with PI controller when L1= 1mH, THD= 10.06%

More degrading condition of input current at lower L1 value of without control


converter. Fig.5.20 depicts that the current has lost its sinusoidal shape and THD is
also large. On the other hand, converter with control has an input current of small
harmonics and its current shape is also near about sinusoidal.

- 95 -
300A

200A

0A

-200A

-300A
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
-I(V1)
Time

Fig. 5.20 Input current without PI controller when L1= 0.5mH, THD= 37.10%

300A

200A

0A

-200A

-300A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V1)
Time

Fig. 5.21 Input current with PI controller when L1= 0.5mH, THD= 11.90%

Several values of THD in percentage and their corresponding L1 values in converter


circuit have been collected from simulation for both with control and without control
converter. Here a graphical representation has been shown to perceive the benefits of
the PI controller. The integrated controller can reduce the THD value and improve the
input current shape of the converter irrespective of all values of input boost inductor.

- 96 -
Table 5-I Effect of THD at different boost inductor values with and without control
Input Current THD(%) for Input Current THD(%) for PI
Boost Inductor Value
without Control Converter Control Converter

10mH 8.32 7.93


5 mH 12.06 8.51
1 mH 35.85 10.06
0.5 mH 37.1 11.90
0.4 mH 38.5 13.70

Input Current THD(%) Vs Boost Inductor


50

45

40
Without Control
With PI Control
35
Input Current THD (%)

30

25

20

15

10

0
0 2 4 6 8 10 12
Boost Inductor (mH)

Fig. 5.22 Graphical representation of THD by varying inductance

It is obvious that control circuit makes the input current THD curve almost stable for all
values of inductances where without control circuit makes a large variation.

- 97 -
5.6 Stablity of output voltage in case of source disturbances:

Various types of input source disturbances may cause the fluctuations in input voltage.
This fluctuation impacts on the output voltage of the converter when it works without
feedback. But the integrated PI controller can resolve the problem. Simulations have been
carried out by changing the input voltage of the converter at both with and without
control circuit. Here the reference input voltage has been considered 300V. The
observations have been given below,

At first, when Vin= 300V we get the output voltage near about 400V for both control and
without control circuit.

500V
Output Voltage

Input Voltage

0V

-500V
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(V1:+,0) V(R4:2,R4:1)
Time

Fig. 5.23 Input-Output Voltage of converter without control


500V
Output Voltage

Input Voltage

0V

-500V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R4:2,E2:2) V(R16:2,0)
Time

Fig. 5.24 Input-Output Voltage of converter with PI controller

- 98 -
When voltage rise occurs at the input (Vin= 350 V), without feedback converter (Open
loop) could not retain the previous stable voltage at its output but the converter with PI
controller could do so. Input-Output Voltage curves Figs 5.25 and 5.26 respectively. .

500V
Output Voltage

Input Voltage
0V

-500V
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R12:1,0) V(R4:2,R4:1)
Time

Fig. 5.25 Input-Output Voltage of converter without control

500V
Output Voltage

Input Voltage

0V

-500V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R4:2,E2:2) V(R16:2,0)
Time

Fig. 5.26 Input-Output Voltage of converter with PI controller

- 99 -
The same phenomenon happens for input voltage 400V. Corresponding output have been
are shown in Figs 5.27 to 5.28.

800V

Output Voltage

400V

Input Voltage

0V

-400V
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R12:1,0) V(R4:2,R4:1)
Time

Fig. 5.27 Input-Output Voltage of converter without control

500V
Output Voltage

Input Voltage

0V

-500V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R4:2,E2:2) V(R16:2,0)
Time

Fig. 5.28 Input-Output Voltage of converter with PI controller

- 100 -
The observations have also been made for input voltage lower than 300V. In each case
input-output voltage shape has been taken and it exhibits the previous relationship.
Simulations have been carried out for 250 V input voltage as shown in Figs 5.29 and 5.30

400V
Output Voltage

Input Voltage
0V

-400V
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R12:1,0) V(R4:2,R4:1)
Time

Fig. 5.29 Input-Output Voltage of converter without control

500V
Output Voltage

Input Voltage

0V

-500V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R4:2,E2:2) V(R16:2,0)
Time

Fig. 5.30 Input-Output Voltage of converter with PI controller

- 101 -
The simulation results for operation of the converter with 200V are shown in Figs 5.31 to
5.32

400V

Output Voltage

200V

Input Voltage

0V

-200V
100ms 110ms 120ms 130ms 140ms 150ms 160ms 170ms 180ms 190ms 200ms
V(R12:1,0) V(R4:2,R4:1)
Time

Fig. 5.31 Input-Output Voltage of converter without control

500V
Output Voltage

Input Voltage

0V

-500V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R4:2,E2:2) V(R16:2,0)
Time

Fig. 5.32 Input-Output Voltage of converter with PI controller

- 102 -
5.7 Input Power Factor Improved by PI controller:

Close loop control or proposed converter provides improved input power factor
compared to the open loop converter. Through performing simulations, power factor for
both with and without controller has been studied. It is observed that for buck as well as
boost mode, the converter with control provides higher power factor compared to the
converter without control. The investigation shows that for close loop converter the
minimum power factor at buck mode is 0.96 where for boost mode it is 0.98. The
simulated values have been shown for both buck and boost mode in below-

Table. 5-II Input power factor without control (Buck mode)

Input Voltage Output Voltage Power Factor


300V 255V 0.890
300V 266V 0.911
300V 271V 0.923
300V 274V 0.919
300V 276V 0.914
300V 278V 0.906
300V 280V 0.917
300V 282V 0.920

300V 283V 0.915

- 103 -
Table 5-III Input power factor with PI controller (Buck mode)

Input Voltage Output Voltage Power Factor


300V 255V 0.961
300V 266V 0.964
300V 271V 0.967
300V 274V 0.971
300V 276V 0.973
300V 278V 0.976
300V 280V 0.980
300V 282V 0.983

A comparison curve has been plotted in MATLAB to illustrate the relationship more
vividly. It has been given below-

Input Power Factor Vs Buck Mode Voltage


1.2
Without Control
With PI controller

0.8
Input Power Factor

0.6

0.4

0.2

0
250 255 260 265 270 275 280 285
Buck Mode Voltage (V)

Fig. 5.33 Power factor Improvement by using PI controller at buck mode

- 104 -
Table 5-IV Input power factor without control (Boost mode)

Input Voltage Output Voltage Power Factor

300V 313V 0.933


300V 344V 0.954
300V 365V 0.971
300V 382V 0.977
300V 407V 0.983

300V 409V 0.987

300V 415V 0.990

300V 422V 0.988

Table 5-V Input power factor with PI controller (Boost mode)

Input Voltage Output Voltage Power Factor


300V 313V 0.983
300V 344V 0.987
300V 365V 0.988
300V 382V 0.988

300V 407V 0.990


300V 409V 0.993

300V 415V 0.995


300V 422V 0.997

- 105 -
Input Power Factor Vs Boost Mode Voltage
1.2
Without Control
With PI Control

0.8
Input Power Fcator

0.6

0.4

0.2

0
300 320 340 360 380 400 420
Boost Mode Voltage (V)

Fig. 5.34 Power factor Improvement by using PI controller at boost mode

5.8 Discussions:

The performance of the proposed converter with PI control circuit is analyzed in this
chapter. The tuned controller helps to provide stable output voltage of converter during
load variation. The stability phenomenon has been depicted in the curves during different
load variation pattern. Another purpose of the controller is to shape the input current by
reducing harmonics in it. It is shown that the properly tuned controller can reduce the
input current THD. During the source disturbances, the effect of fluctuating input voltage
at the output of converter can also be removed by incorporating a PI controller. The last
observation is associated with input power factor for both boost and buck mode of
operation. The comparison curves show that the converter with PI controller provides
better input power factor compared to that without PI controller at boost and buck mode.
So the necessity of the controller integration with the proposed converter can easily be
perceived.

- 106 -
CHAPTER 6

EXPERIMENTAL RESULTS OF THE PROPOSED SINGLE PHASE BOOST-


BUCK CIRCUIT WITHOUT FEEDBACK CONTROL

The proposed input switched single phase boost-buck ac-dc PFC converter without
feedback has been implemented practically for observing the performance of the circuit.
The experimental results shown in this chapter are input/output voltages, input current,
input current THD and power factor of the circuit for variation of duty cycle. The
waveforms of input/output voltages and input currents are observed and recorded by
digital oscilloscope and power factor and THD are observed and recorded using power
quality analyzer. The real power, reactive power and apparent power consumption of the
circuit at a particular duty cycle can also be seen from power quality analyzer. Moreover,
to compare the performance the circuit has been simulated with same parameters as that
of practical one. A comparison has been done between simulated and practical values.
The proposed circuit which have been implemented is shown in Fig 6.1

D5 C1
R1
L C
1 2
RL
R2
D4 D1 D6 C2

Vin S
gate pulse

D3 D2

Fig. 6.1 Proposed PFC circuit without feedback control. A prototype is made to analyze
the performance.

- 107 -
The parameters that have been considered during the practical circuit implementation are
given in the Table -6-I

Table 6-I List of components and their corresponding values for practical circuit

Components Value

Input Inductor, L1 3mH

AC Capacitor, C 4.5µF

Output DC Capacitor C1, C2 470µF

Resistance R1, R2 100KΩ

Load Resistance , RL 200Ω

Input Voltage Frequency, f 50Hz

Input Voltage, Vin (R.M.S) 12.16 V

Switching Frequency, fs 4 KHz

6.1 Proposed PFC circuit practical prototype and its typical performance

The experimental results of the proposed power factor corrected (PFC) rectifier without
feedback have been observed and recorded and their corresponding curves for duty cycle
(D) of 0.2 to 0.9 are presented in the illustrations Figs 6.1 to 6.6 (practical) and
corresponding simulated result in Figs 6.7 to 6.10 for duty cycle of 0.2. Table -6-II list in
tabular form the index of the practical and simulated result for duty cycle variation of 0.2
to 0.9

- 108 -
Table 6-II List of figures and their names
Duty Cycle Fig numbers Result
6.1 to 6.6 Practical Circuit
0.2
6.7 to 6.10 Simulated Result
6.11 to 6.16 Practical Circuit
0.3
6.17 to 6.20 Simulated Result
6.21 to 6.26 Practical Circuit
0.4
6.27 to 6.30 Simulated Result
6.31 to 6.36 Practical Circuit
0.5
6.37 to 6.40 Simulated Result
6.41 to 6.46 Practical Circuit
0.6
6.47 to 6.50 Simulated Result
6.51 to 6.56 Practical Circuit
0.7
6.57 to 6.60 Simulated Result
6.61 to 6.64 Practical Circuit
0.8
6.65 to 6.70 Simulated Result
6.71 to 6.76 Practical Circuit
0.9
6.77 to 6.80 Simulated Result

- 109 -
Performance for 0.2 Duty Cycle

Fig 6.2: Input Current (Yellow) and Input Voltage (Blue) Waveforms of proposed
Rectifier for D = 0.2 from Oscilloscope

Fig 6.3: Input Current FFT Analysis graph from oscilloscope

- 110 -
Fig 6.4: Output Voltage (Green), boosted voltage between AC capacitor to DC capacitor
midpoint (Pink), Voltage of capacitor C1 (blue) and C2 (light blue) for D=0.2

Fig 6.5: Input Voltage and Input Current waveforms for proposed Rectifier for D = 0.2
from Power Quality Analyzer

- 111 -
Fig 6.6: Power factor, Real power, Reactive Power, Apparent Power of Proposed
Rectifier for D = 0.2 from Power Quality Analyzer

Fig 6.7: Spectrum of Input Current of Proposed Rectifier for D = 0.3 from Power Quality
Analyzer

- 112 -
Simulated output curves have been given below for same circuit parametric condition-

20V

0V

-20V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R3:1,0)
Time

Fig 6.8: Simulated Input Voltage Waveforms of proposed Rectifier for D = 0.2

400mA

0A

-400mA
100ms 150ms 200ms 250ms 300ms
-I(V2)
Time
Fig 6.9: Simulated Input Current Waveforms of proposed Rectifier for D = 0.2

- 113 -
160mA

120mA

80mA

40mA

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V2)
Frequency

Fig 6.10: FFT analysis of corresponding Input Current Waveforms

20V

15V

10V

5V

0V
100ms 150ms 200ms 250ms 300ms
V(D4:2,D5:1)
Time

Fig 6.11: Simulated Output Voltage of proposed Rectifier for D = 0.2

The THD% of input current in our simulation is 28.61% and the power factor is 0.84

- 114 -
Performance for 0.3 Duty Cycle

Fig 6.12: Input Current (Yellow) and Input Voltage (Blue) Waveforms of proposed
Rectifier for D = 0.3 from Oscilloscope

Fig 6.13: Input Current FFT Analysis graph from oscilloscope

- 115 -
Fig 6.14: Output Voltage (Green), boosted voltage between AC capacitor to DC capacitor
midpoint (Pink), Voltage of capacitor C1 (blue) and C2 (light blue) for D=0.3

Fig 6.15: Input Voltage and Input Current waveforms for proposed Rectifier for

D = 0.3 from Power Quality Analyzer

- 116 -
Fig 6.16: Power factor, Real power, Reactive Power, Apparent Power of Proposed
Rectifier for D = 0.3 from Power Quality Analyzer

Fig 6.17: Spectrum of Input Current of Proposed Rectifier for D = 0.3 from Power
Quality Analyzer

- 117 -
Simulated output curves have been given below for same circuit parametric condition-

20V

10V

0V

-10V

-20V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R3:1,0)
Time

Fig 6.18: Simulated Input Voltage Waveforms of proposed Rectifier for D = 0.3

500mA

0A

-500mA
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V2)
Time

Fig 6.19: Simulated Input Current Waveforms of proposed Rectifier for D = 0.3

- 118 -
300mA

200mA

100mA

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V2)
Frequency

Fig 6.20: FFT analysis of corresponding Input Current Waveforms

20V

15V

10V

5V

0V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(D4:2,D5:1)
Time

Fig 6.21: Simulated Output Voltage of proposed Rectifier for D = 0.3

The THD% of input current in our simulation is 20.91% and the power factor is 0.84

- 119 -
Performance for 0.4 Duty Cycle

Fig 6.22: Input Current (Yellow) and Input Voltage (Blue) Waveforms of proposed
Rectifier for D = 0.4 from Oscilloscope

Fig 6.23: Input Current FFT Analysis graph from oscilloscope

- 120 -
Fig 6.24: Output Voltage (Green), boosted voltage between AC capacitor to DC capacitor
midpoint (Pink), Voltage of capacitor C1 (blue) and C2 (light blue) for D=0.4

Fig 6.25: Input Voltage and Input Current waveforms for proposed Rectifier for D = 0.4
from Power Quality Analyzer

- 121 -
Fig 6.26: Power factor, Real power, Reactive Power, Apparent Power of Proposed
Rectifier for D = 0.4 from Power Quality Analyzer

Fig 6.27: Spectrum of Input Current of Proposed Rectifier for D = 0.4 from Power
Quality Analyzer

- 122 -
Simulated output curves have been given below for same circuit parametric condition-

20V

10V

0V

-10V

-20V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R3:1,0)
Time

Fig 6.28: Simulated Input Voltage Waveforms of proposed Rectifier for D = 0.4

800mA

400mA

0A

-400mA

-800mA
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V2)
Time

Fig 6.29: Simulated Input Current Waveforms of proposed Rectifier for D = 0.4

- 123 -
300mA

200mA

100mA

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V2)
Frequency

Fig 6.30: FFT analysis of corresponding Input Current Waveforms

20V

15V

10V

5V

0V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(D4:2,D5:1)
Time

Fig 6.31: Simulated Output Voltage of proposed Rectifier for D = 0.4

The THD% of input current in our simulation is 19.62% and the power factor is 0.84

- 124 -
Performance for 0.5 Duty Cycle

Fig 6.32: Input Current (Yellow) and Input Voltage (Blue) Waveforms of proposed
Rectifier for D = 0.5 from Oscilloscope

Fig 6.33: Input Current FFT Analysis graph from oscilloscope

- 125 -
Fig 6.34: Output Voltage (Green), boosted voltage between AC capacitor to DC capacitor
midpoint (Pink), Voltage of capacitor C1 (blue) and C2 (light blue) for D=0.5

Fig 6.35: Input Voltage and Input Current waveforms for proposed Rectifier for D = 0.5
from Power Quality Analyzer

- 126 -
Fig 6.36: Power factor, Real power, Reactive Power, Apparent Power of Proposed
Rectifier for D = 0.5 from Power Quality Analyzer

Figure 6.37: Spectrum of Input Current of Proposed Rectifier for D = 0.5 from Power
Quality Analyzer

- 127 -
Simulated output curves have been given below for same circuit parametric condition-

20V

10V

0V

-10V

-20V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R3:1,0)
Time

Fig 6.38: Simulated Input Voltage Waveforms of proposed Rectifier for D = 0.5

1.0A

0.5A

0A

-0.5A

-1.0A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V2)
Time

Fig 6.39: Simulated Input Current Waveforms of proposed Rectifier for D = 0.5

- 128 -
400mA

300mA

200mA

100mA

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V2)
Frequency

Fig 6.40: FFT analysis of corresponding Input Current Waveforms

30V

20V

10V

0V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(D4:2,D5:1)
Time

Fig 6.41: Simulated Output Voltage of proposed Rectifier for D = 0.5

The THD% of input current in our simulation is 25.09% and the power factor is 0.87

- 129 -
Performance for 0.6 Duty Cycle

Fig 6.42: Input Current (Yellow) and Input Voltage (Blue) Waveforms of proposed
Rectifier for D = 0.6 from Oscilloscope

Fig 6.43: Input Current FFT Analysis graph from oscilloscope

- 130 -
Fig 6.44: Output Voltage (Green), boosted voltage between AC capacitor to DC capacitor
midpoint (Pink), Voltage of capacitor C1 (blue) and C2 (light blue) for D=0.6

Fig 6.45: Input Voltage and Input Current waveforms for proposed Rectifier for

D = 0.6 from Power Quality Analyzer

- 131 -
Fig 6.46: Power factor, Real power, Reactive Power, Apparent Power of Proposed
Rectifier for D = 0.6 from Power Quality Analyzer

Fig 6.47: Spectrum of Input Current of Proposed Rectifier for D = 0.6 from Power
Quality Analyzer

- 132 -
Simulated output curves have been given below for same circuit parametric condition-

20V

10V

0V

-10V

-20V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R3:1,0)
Time

Figure 6.48: Simulated Input Voltage Waveforms of proposed Rectifier for D = 0.6

2.0A

1.0A

0A

-1.0A

-2.0A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V2)
Time

Fig 6.49: Simulated Input Current Waveforms of proposed Rectifier for D = 0.6

- 133 -
800mA

600mA

400mA

200mA

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V2)
Frequency

Fig 6.50: FFT analysis of corresponding Input Current Waveforms

30V

20V

10V

0V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(D4:2,D5:1)
Time

Fig 6.51: Simulated Output Voltage of proposed Rectifier for D = 0.6

The THD% of input current in our simulation is 32.36% and the power factor is 0.90

- 134 -
Performance for 0.7 Duty Cycle

Fig 6.52: Input Current (Yellow) and Input Voltage (Blue) Waveforms of proposed
Rectifier for D = 0.7 from Oscilloscope

Fig 6.53: Input Current FFT Analysis graph from oscilloscope

- 135 -
Fig 6.54: Output Voltage (Green), boosted voltage between AC capacitor to DC
capacitor midpoint (Pink), Voltage of capacitor C1 (blue) and C2 (light blue) for
D=0.7

Fig 6.55: Input Voltage and Input Current waveforms for proposed Rectifier for

D = 0.7 from Power Quality Analyzer

- 136 -
Fig 6.56: Power factor, Real power, Reactive Power, Apparent Power of Proposed
Rectifier for D = 0.7 from Power Quality Analyzer

Fig 6.57: Spectrum of Input Current of Proposed Rectifier for D = 0.7 from Power
Quality Analyzer

- 137 -
Simulated output curves have been given below for same circuit parametric condition-

20V

10V

0V

-10V

-20V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R3:1,0)
Time

Fig 6.58: Simulated Input Voltage Waveforms of proposed Rectifier for D = 0.7

2.0A

1.0A

0A

-1.0A

-2.0A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V2)
Time

Fig 6.59: Simulated Input Current Waveforms of proposed Rectifier for D = 0.7

- 138 -
1.2A

0.8A

0.4A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V2)
Frequency

Fig 6.60: FFT analysis of corresponding Input Current Waveforms

40V

30V

20V

10V

0V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(D4:2,D5:1)
Time

Fig 6.61: Simulated Output Voltage of proposed Rectifier for D = 0.7

The THD% of input current in our simulation is 35.85% and the power factor is 0.92

- 139 -
Performance for 0.8 Duty Cycle

Fig 6.62: Input Current (Yellow) and Input Voltage (Blue) Waveforms of proposed
Rectifier for D = 0.8 from Oscilloscope

Fig 6.63: Input Current FFT Analysis graph from oscilloscope

- 140 -
Fig 6.64: Output Voltage (Green), boosted voltage between AC capacitor to DC
capacitor midpoint (Pink), Voltage of capacitor C1 (blue) and C2 (light blue) for D=0.8

Fig 6.65: Input Voltage and Input Current waveforms for proposed Rectifier for D = 0.8
from Power Quality Analyzer

- 141 -
Fig 6.66: Power factor, Real power, Reactive Power, Apparent Power of Proposed
Rectifier for D = 0.8 from Power Quality Analyzer

Fig 6.67: Spectrum of Input Current of Proposed Rectifier for D = 0.8 from Power
Quality Analyzer

- 142 -
Simulated output curves have been given below for same circuit parametric condition-

20V

10V

0V

-10V

-20V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R3:1,0)
Time

Fig 6.68: Simulated Input Voltage Waveforms of proposed Rectifier for D = 0.8

4.0A

2.0A

0A

-2.0A

-4.0A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V2)
Time

Fig 6.69: Simulated Input Current Waveforms of proposed Rectifier for D = 0.8

- 143 -
3.0A

2.0A

1.0A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V2)
Frequency

Fig 6.70: FFT analysis of corresponding Input Current Waveforms

60V

40V

20V

0V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(D4:2,D5:1)
Time

Fig 6.71: Simulated Output Voltage of proposed Rectifier for D = 0.8

The THD% of input current in our simulation is 25.58% and the power factor is 0.89

- 144 -
Performance for 0.9 Duty Cycle

Fig 6.72: Input Current (Yellow) and Input Voltage (Blue) Waveforms of proposed
Rectifier for D = 0.9 from Oscilloscope

Figure 6.73: Input Current FFT Analysis graph from oscilloscope

- 145 -
Fig 6.74: Output Voltage (Green), boosted voltage between AC capacitor to DC capacitor
midpoint (Pink), Voltage of capacitor C1 (blue) and C2 (light blue) for D=0.9

Fig 6.75: Input Voltage and Input Current waveforms for proposed Rectifier for

D = 0.9 from Power Quality Analyzer

- 146 -
Fig 6.76: Power factor, Real power, Reactive Power, Apparent Power of Proposed
Rectifier for D = 0.9 from Power Quality Analyzer

Fig 6.77: Spectrum of Input Current of Proposed Rectifier for D = 0.9 from Power
Quality Analyzer

- 147 -
Simulated output curves have been given below for same circuit parametric condition-

20V

10V

0V

-10V

-20V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(R3:1,0)
Time

Fig 6.78: Simulated Input Voltage Waveforms of proposed Rectifier for D = 0.9

8.0A

4.0A

0A

-4.0A

-8.0A
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
-I(V2)
Time

Fig 6.79: Simulated Input Current Waveforms of proposed Rectifier for D = 0.9

- 148 -
8.0A

6.0A

4.0A

2.0A

0A
1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
-I(V2)
Frequency

Fig 6.80: FFT analysis of corresponding Input Current Waveforms

80V

60V

40V

20V

0V
100ms 120ms 140ms 160ms 180ms 200ms 220ms 240ms 260ms 280ms 300ms
V(D4:2,D5:1)
Time

Fig 6.81: Simulated Output Voltage of proposed Rectifier for D = 0.9

The THD% of input current in our simulation is 11.35% and the power factor is 0.87

- 149 -
6.2 Comparison between Experimental and Simulated Results

All the data that have been collected from the experimental prototype of proposed
converter has been summarized in the Table 6-III. Simulated data for same parametric
values of the circuit is also given in the table for comparison purpose. Here, Input
Voltage is 12.16V (r.m.s) or 17.18V (max).

Table 6-III: Comparison table between experimental and simulated data

Input Current Vout Mode of


Duty THD(%) Power Factor
(r.m.s) in A (DC Max) in V Operation
Cycle
Expt. Simu. Expt. Simu. Expt. Simu. Expt. Simu.

0.2 32.40 28.61 1.00 0.84 0.07 0.126 10.40 10.80 Buck

0.3 27.00 20.91 1.00 0.84 0.09 0.168 11.20 11.35 Buck

0.4 26.50 19.62 1.00 0.84 0.11 0.225 13.50 18.50 Boost

0.5 23.60 25.09 0.98 0.87 0.13 0.314 14.20 22.00 Boost

0.6 23.00 30.36 0.92 0.90 0.18 0.473 15.00 27.00 Boost

0.7 24.30 28.85 0.86 0.92 0.33 0.807 18.00 35.00 Boost

0.8 27.40 25.58 0.82 0.89 0.42 1.640 18.70 50.00 Boost

0.9 25.10 21.35 0.64 0.87 1.01 4.570 17.50 70.00 Boost

It is seen that the input current Total Harmonics Distortion (THD %) decreases with the
increase of duty cycle. In addition to that, due to propagation of reactive power between
the source and load, there is a sudden fall of input power factor from 0.5 to 0.9 duty
cycle. This phenomenon is vividly exhibited in the figures collected from Power Quality
Analyzer tool. Moreover, the proposed converter prototype and its simulation model can
operate both in buck and boost mode. The table shows that it works in buck mode at 0.2
and 0.3 duty cycle where as, it works in boost mode at the rest of duty cycles.

- 150 -
Comparison curves between the experimental data and simulated data are plotted in
MATLAB. The curves show the comparison as well as relationship of both data in terms
of input current THD%, power factor and output voltage with duty cycle of the proposed
converter (Fig. 6.81 to Fig. 6.83).

Comparison Curves of Input Current THD


50

45 Experimental
Simulated
40

35
Input Current THD(%)

30

25

20

15

10

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle

Fig 6.82 Comparison curves of Input Current THD at different duty cycle

- 151 -
Comparison Curves of Input Power Factor
1.5
Experimental
Simulated

Input Power Factor


1

0.5

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle

Fig 6.83 Comparison curves of Input Power Factor at different duty cycle

Comparison Curves of Output Voltage


60

Experimental
50 Simulated
Output Voltage (V)

40

30

20

10

0
0 0.2 0.4 0.6 0.8 1 1.2
Duty Cycle

Fig 6.84 Comparison curves of Output Voltage at different duty cycle

- 152 -
6.3 Discussion:

The data that recorded from practical prototype circuit illustrate that the proposed diode-
capacitor assisted AC-DC converter can work suitably as PFC circuit. The prototype
circuit offers a very low input current THD irrespective of duty cycle (from 0.1 to 0.9).
The simulated output also follow the experimental result. This low input current THD
assists the proposed converter prototype to have a high power factor (near about 1.00).
The comparison table shows that the practical circuit offers 1.00 or near about 1.00 input
power factors from 0.1 to 0.6 duty cycle which is a most promising result of the proposed
converter. This result strongly proves the practical validation of the proposed circuit as a
PFC converter.

- 153 -
CHAPTER 7

CONCLUSION

7.1 Summary of the Thesis

The conventional single phase buck, boost, buck-boost, SEPIC AC-DC PFC converter
have been studied first to observe the associated existing problems. It is found that the
conventional buck and buck-boost PFC AC-DC converter has high input current THD
and non-sinusoidal shape which lowers input power factor as well as efficiency.
Meanwhile SEPIC, ĈUK, ZETA etc. PFC AC-DC converter offers better performance
but they are burdened with more components. So our research was set to design and
analyze an AC-DC converter which can reduce these problems and has less components.
The proposed diode-capacitor assisted AC-DC PFC converter fulfills mentioned
requirements. To get less input current THD, improved power factor and high efficiency
the converter is designed with an input switched boost converter and a capacitive divider.
The results are as expected from the design. But the input current THD are not in
acceptable range and input power factor deteriorates at high switching frequencies after
0.7 duty cycle. For further improved power factor, lower input current THD and to
regulate the output voltage of the AC-DC converter, proper PI controller is designed in
this thesis. The PI controller is able to keep the rectified output voltage stable during the
load variation at the output. It also helps the converter to maintain constant voltage level
at its output even when the input voltage is increased or decreased up to a certain limit.
The design of the controller gives it versatility for using it both at boost and buck mode
of operation. Designed PI controller is able to keep input current THD below 10% for any
value of the inductor greater than 5mH. The input power factor of the converter is above
0.9.

- 154 -
7.2 Future Work

The performed thesis has a great opportunity to extend some useful its important part.
Some of them are conclude here-

 During the implementation of practical prototype of converter, a low voltage and


low current has been applied. Doing so, we have to sacrifice some of its accuracy
in case of taking the output values. A prototype can be made for high power
application where we can get better performance practically of the proposed
converter.
 The prototype is made without PI controller due to non-availability of appropriate
ICs and sensors. In future work proposed circuits may be designed, fabricated and
tested at practical operating voltages and currents with proper feedback circuits.
 Investigation can be made to improve the quality of gating signals at different
duty cycle.
 Switching loss and EMI interferences were not considered here. These can be
investigated in future work.

- 155 -
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