Single Phase Viennna Rectifier

CLOSED LOOP PROPORTIONAL RESONANT
CONTROLLED SINGLE-PHASE VIENNA RECTIFIER

FED DC DRIVE
A PROJECT REPORT
Submitted by
AMARNATH V (211716105002)
NARMADHA T (211716105024)
RANJITH KUMAR S (211716105035)
VENKATA SRIKANTH P S (211716105047)
in partial fulfilment for the award of the degree
of
BACHELOR OF ENGINEERING
IN
ELECTRICAL AND ELECTRONICS ENGINEERING

RAJALAKSHMI INSTITUTE OF TECHNOLOGY, CHENNAI 600 124
ANNA UNIVERSITY: CHENNAI 600 025
APRIL-2020
ANNA UNIVERSITY: CHENNAI 600 025
BONAFIDE CERTIFICATE
Certified that this project report “CLOSED LOOP PROPORTIONAL
RESONANT CONTROLLED SINGLE-PHASE VIENNA RECTIFIER FED DC
DRIVE” is the bonafide work of “AMARNATH V (211716105002),
NARMADHA T (211716105024), RANJITH KUMAR S (211716105035),
VENKATA SRIKANTH P S (211716105047)” who carried out the project work
under my supervision.
SIGNATURE SIGNATURE
Mr. B MANIMARAN, M.E., (Ph.D)

Dr. C. KAMALAKANNAN, M.E., Ph.D.,
SUPERVISOR
HEAD OF THE DEPARTMENT
Assistant Professor
Electrical and Electronics Engineering, Electrical and Electronics Engineering,
Rajalakshmi Institute of Technology, Rajalakshmi Institute of Technology,
Kuthambakkam (PO) Chennai-600 124 Kuthambakkam (PO) Chennai-600 124
Certified that the candidate was examined in the viva-voce held on _______________
INTERNAL EXAMINER EXTERNAL EXAMINER
i
ACKNOWLEDGEMENT
We express our gratitude towards our chairperson Dr. (Mrs). THANGAM

MEGANATHAN, Ph.D., our chairman Mr. S. MEGANATHAN, B.E., F.I.E.,
and our vice chairman Dr. HAREE SHANKAR, M.B.B.S who have constantly
encouraged us in all aspects to become as a successful engineer.
We express our heartfelt thanks to our principal Dr. M. VELAN, M.E.,

Ph.D., for his kind co-operation and encouragement for the project.
We are grateful to Dr. C. KAMALAKANNAN, M.E., Ph.D., professor

and head, department of electrical and electronics engineering for giving valuable
guidance, constant support and encouragement to complete our project
successfully.
We would like to extend our sincere thanks to our project coordinator

Dr. K. SUNDARARAMAN, M.S., Ph.D., professor, department of electrical
and electronics engineering for giving encouragement and suggestion to complete
our project.
We are highly indebted to our project guide

Mr. B. MANIMARAN, M.E., (Ph.D)., Assistant professor, department of
electrical and electronics engineering for his valuable guidance and suggestions
in every stage of our project and to make our project a successful one.
Also we thank all the other teaching faculty and non-teaching faculty of
the department of electrical and electronics engineering for their constructive
comments and suggestions during review meetings and for their timely help
throughout the project.
Also we thank our parents for their full support towards our project and
timely help throughout the project.
ii
ABSTRACT
This work deals with the modelling, analysis, design & simulation
of PI and PR controlled closed loop Single-Phase Vienna Rectifier Fed DC Drive
system. Simulation is done for PI (Proportional integral) & PR (Proportional
resonant controller) controlled closed loop systems using veinna rectifier & the
outcomes are compared. The comparison is done in terms of time domain
parameters like settling time and steady state error. The outcomes represent the
superior performance of PR controlled closed loop veinna rectifier. Hardware is
fabricated and results are presented.
iii
TABLE OF CONTENTS
CHAPTER.NO. TITLE PAGE
ACKNOWLEDGEMENT II
ABSTRACT III
TABLE OF CONTENT IV
LIST OF FIGURES VII
LIST OF TABLES X
LIST OF ABBREVIATION XI
1. INTRODUCTION 1
1.1 Introduction 1
2. LITERATURE SURVEY 3
1.1 Vienna Rectifier Topologies 5
1.2 Modelling and Control of Vienna rectifier 10
3. VIENNA RECTIFIER 30
3.1 Introduction to Vienna Rectifier 30
3.1.1 PWM Vienna Rectifier with 30
Three-Phase Three loads
3.2 Circuit Schematic 33
3.3 Working Principle of Vienna Rectifier – 39
Single-Phase
3.4 Vienna Rectifier System 41
3.4.1 Operation of Vienna Rectifier 41
4. CONTROL TECHNIQUES 51
4.1 PI Controller 51
iv
4.2 Proportional Resonant Control 52
5. MATLAB AND SIMULINK REAULTS 54
5.1 Introduction to MATLAB 54
5.2 Simulation results 56
5.2.1 Open Loop Vienna Rectifier With 56
Source Disturbance
5.2.2 Closed Loop Vienna Rectifier With 58
PI Controller
5.2.3 Closed Loop Vienna Rectifier With 61
PR Controller
6. HARDWARE IMPLEMENTATION
6.1 General 66
6.2 Power Supply Circuit 66
6.3 PIC Controller 67
6.3.1 Features of PIC-Microcontroller 69
“PIC16F84A”
6.3.2 Oscillator Types 71
6.3.3 Reset 72
6.3.4 Power on Reset (POR) 72
6.3.5 Power-up-Timer (PWRT) 73
6.3.6 Interrupt 73
6.4 Driver Unit (Optocoupler) 75
6.4.1 IR 2110-High and Low Side Driver 77
6.4.2 Lead Definitions 78
6.4.3 Applications 79
6.5 MOSFET 81
6.5.1 Introduction 81
6.6 Experimental Results 82
v
7. CONCLUSION 85
7.1 Summary of the Findings 85
7.2 Scope of the Future Work 85
8. REFERENCE 86
vi
LIST OF FIGURES
FIG.NO. TITLE PAGE

3.1 Unidirectional AC-DC Converter 34
3.2 Inductors on AC Side 35
3.3 Applications of Synchronously 36
Controlled Transistors
3.4 Diodes in the Circuit Legs 37
3.5 (a) & (b) Vienna Rectifier having Unity Power 38
Factor PWM
3.6 Working principle of Vienna Rectifier – 40
Single-phase
3.7 Alternative Construction of Vienna 41
Rectifier
3.8 Current direction when input current is 43
positive & ‘Sa’ is OFF
positive & ‘Sa’ is ON
negative & ‘Sa’ is OFF
negative & ‘Sa’ is ON
vii
3.12 Current path in alternate construction 49
in all switches OFF
3.13 Current path in alternate construction 50
in all switches ON
3.14 Simulation Block Diagram 50
4.1 Structure of PI controller 51
4.2 Block Diagram of Current Controller 52
5.1 Circuit Diagram of open loop Vienna 56
Rectifier with Source Disturbance
5.2 Input Voltage 57
5.3 Voltage across Motor Load 57
5.4 Motor Speed 57
5.5 Current Through Motor Load 58
5.6 Motor Torque 58
5.7 Circuit Diagram of closed loop Vienna 59
Rectifier with PI Controller
5.10 Motor Speed 60
5.12 Motor Torque 61
viii
5.13 Circuit Diagram of closed loop Vienna 62
Rectifier with PR Controller
5.16 Motor Speed 63
5.18 Motor Torque 64
5.19 Bar chart of Time Domain parameter 65
using PIC and PRC
6.1 Power Circuit 66
6.2 Block Diagram of “PIC16F84A” 70
6.3 Pin Diagram of “PIC16F84A” 70
6.4 A popular op-amp relaxation oscillator 71
6.5 Optocouplers 75
6.6 Pin Diagram 78
6.7 Control Circuit 80
6.8 Hardware Snap Shot 82
6.10 Switching pulse of Vienna Rectifier S1 83
6.11 Output Voltage 84
ix
LIST OF TABLES
TABLE NO. TABLE PAGE
3.1 Possible Combinations of Switches State 46
at ia>0, ib, ic<0
at ib>0, ia, ic<0
at ic>0, ia, ib<0
at ia, ib>0, ic<0
at ib, ic>0, ia<0
at ia, ic>0, ib<0
5.1 Comparison of time domain parameter using 64
PIC and PRC
x
LIST OF ABBREVIATION
PI Proportional Integral Controller
PR Proportional Resonant Controller
PEC Power Electronic Converters
DSP Digital Signal Processing
DTC Direct Torque Control
PMSG Permanent Magnet Synchronous Generator
WECS Wind Energy Conversion System
IMD Induction Motor Drive
MIPT Multi Inter-Phase Frame Hybrid
DFHVC Dual Frame Hybrid Vector Control
OCC One Cycle Control
MOCC Modified One Cycle Control
NPP Neutral-point-Potential
NPC Neutral-point Clamped
CMC Current Mode Control_
MOSFET Metal Oxide Semiconductor Field Effect
Transistor
THD Total Harmonic Distortion
CISC Complex Instruction Set Computer
xi
RISC Register Instruction Set Register
POR Power on Reset
PWRT Power-up Timer
xii
CHAPTER 1
INTRODUCTION
This chapter emphasizes the significance of the harmonics and the poor
power factor created by the power electronic converters and the need for Active
Power Factor Correction (APFC). It also provides a brief introduction on the
VIENNA Rectifier for the APFC application. A review of the literature pertaining
to the current study is also briefed out.
1.1 INTRODUCTION
In the recent days, there is a growing awareness on the power factor and
the harmonics injected into the mains. This has led to the formulation of new
standards by the Electricity regulatory bodies. The major source of the harmonics
and the poor power factor is the Power Electronic Converters (PEC). These
converters act as non-linear loads to the mains. They pollute the mains by drawing
non-sinusoidal currents. The result is increased RMS current that heats up the
conductors and calls for increased conductor size. With the introduction of fast
switching devices and high throughput microcontrollers/ Digital Signal
Processors (DSP), PECs have become handy and are utilized in almost every
industrial equipment and consumer electronic appliances. This results in mains
pollution owing to the injected harmonics.
1
To mitigate this issue, earlier, bulky passive harmonic filters were used.
With the advancement in the power processing techniques, they are replaced by
active filters or APFC. These APFC circuits invariantly use the boost rectifiers
that draw continuous current from the mains. Good power factor and harmonics
are achieved by modulating the switching pattern. The output of these boost
rectifiers are naturally higher than the peak of the maximum input voltage. To
obtain necessary output voltage and galvanic isolation these rectifiers are
followed by a DC to DC converter with an intermediate high frequency
transformer. Hence, these rectifiers are also termed as pre-regulators.
There are many three-phase APFC converter topologies available in the
literature. Of these, the VIENNA Rectifier is one of the simplest converter with
least component count. It is a three-phase, three-level boost converter. The three-
level structure facilitates the use of low voltage switches. The advantage of using
the low voltage switches is reduced conduction and switching losses. The power
circuit is also available as a monolithic module with some semiconductor
manufacturers, making the realization simple.
VIENNA Rectifier has many challenges both in terms of modeling and
control. The power transfer function of the VIENNA Rectifier is highly complex,
as it is a fifth order system. This calls for high expertise in control design and
requires intricate controller design procedure. Implementation involves multiple
equations to be solved within a switching period to achieve real time realization.
2
For example, Youssef et al. developed a small signal model that has twenty
transfer functions. In the large signal model developed by Youssef et al., three
controllers are used in addition to one controller for voltage balancing, and
comprises of transformation from abc/dqo and inverse transformation from
dqo/abc frame. Both the controls involve enormous computation, necessitate the
use of high speed DSP, and, require a complex algorithm. Real time control
cannot be achieved if the computations take more than one switching period.
Switching frequency of only 2.04 kHz was used with d SPACE due to complex
calculations and algorithms involved in both the cases. These issues are addressed
in this study. A simplified model of the VIENNA Rectifier is developed and a
simple control is designed using k factor approach. Various configurations of the
VIENNA Rectifier is also presented, and is analytically compared for a 10 kW
power rating in terms of current rating of the device used, losses involved,
efficiency and the number of active and passive devices used. A complete
working model of a 10 kW VIENNA Rectifier is designed, built and tested for
the full range of input and output conditions. A Boundary Conduction Mode
(BCM) of the VIENNA Rectifier is also proposed and the circuit diagram for
realization of the control using analog controller is presented.
3
CHAPTER 2
LITERATURE SURVEY
This section highlights the various work so far carried out in the following
area.
❖ VIENNA Rectifier topologies
❖ Model ling and Control of VIENNA Rectifier
❖ Design and fabrication of VIENNA Rectifier
❖ Boundary Conduction Mode control of VIENNA Rectifier
Hao Chen et al. (2013) analysed a Wind Energy Conversion System
(WECS) with a combination of Permanent-Magnet synchronous generator
(PMSG) and a VIENNA Rectifier, and proposed a control strategy for maximum
efficiency. It was proved by the simulation results that this configuration is
efficient compared to a six-switch two-level converter and the viability of the
proposed system was demonstrated by the experimental results.
Amirhossein Rajaei et al. (2013) studied the effects of the VIENNA
Rectifier voltage vectors on the instantaneous PMSG torque of the WECS and 4
derived the stator flux. Direct Torque Control (DTC) of the PMSG by the
VIENNA Rectifier was implemented, taking into account the constraints of the
VIENNA Rectifier. DTC of the generator in the WECS has many advantages like
fast torque response, elimination of the rotor position sensor, insensitivity to the
PMSG model and the associated parameters, and reduced computations.
4
Sandeep Madishetti et al. (2012) implemented the VIENNA Rectifier for
improving the power quality in a DTC based Induction Motor Drive (IMD) at the
front end. The design, modeling, simulation were carried out and implemented
on a hardware using a DSP.
2.1 VIENNA RECTIFIER TOPOLOGIES
M´arcio Silveira Ortmann et al. (2015) presented a Multi-State Switching
Cells for the VIENNA Rectifier through Multi Inter-Phase Transformers (MIPT).
The operation and control strategies, the intrinsic benefits, the reduction of
passive components and the overall losses were presented. Design guidelines for
the magnetic components including the boost inductors, and the power
semiconductor devices were given. A 7.5 kW four legs per phase lab prototype
was demonstrated for an efficiency of 98% from 40% load and IEC61000-3-2
requirements.
Bachir Kedjar et al. (2014) used the VIENNA Rectifier for power quality
added function and demonstrated it for compensating reactive power and to
cancel the input current harmonics drawn by the nonlinear loads connected to the
same point of common coupling. The controller uses an augmented model that
was developed in the d–q frame and was experimentally validated from the results
obtained at a 20-kHz switching frequency with a DSP based DS1103 controller.
Friedli et al. (2014) evaluated comparatively four types of active three-
phase PFC rectifiers; the active six-switch buck-type PFC rectifier, the active six-
5
switch boost-type PFC rectifier, the SWISS Rectifier and the VIENNA Rectifier
(VR). Typical feed-back control strategies and the equations for current
calculations of the power semiconductors were provided. The rectifier systems
were assessed and evaluated based on the efficiency, semiconductor stresses and
the required semiconductor chip area, the DM and CM conducted EMI noise
levels and the volume of the main passive components. Two variants, one with
the SiC JFETs and SiC Schottky diodes and the other using Si IGBTs and SiC
Schottky diodes, were considered. VR systems were optimized for efficiency
and/or power density and were also compared, that helps to establish the trade-
off between the power density and efficiency. Roland Greul et al. (2007)
proposed and analyzed a Y rectifier formed by the star-connection of three single-
phase boost rectifier modules, for the power factor correction application, without
a neutral point connection. The main advantages of this rectifier over the
VIENNA are the low DC output voltage and have a high degree of modularity.
There is a large reduction in the input current ripple, when compared to the three
single-phase rectifiers connected to a three-phase supply with neutral. It was
shown that high quality input current with low ripple can be achieved similar to
that of the VIENNA Rectifier. Based on the analytical expression derived for the
coupling coefficients, a controller was designed with the reduced calculation
effort to provide symmetric loading of the phase modules and to maintain the
balance of the DC link voltages. A control concept for the two-phase operation,
which occurs during a mains phase failure, was also provided in the analysis. The
6
theoretical and simulated results were provided and validated by a digitally
controlled experimental 5.4-kW prototype.
Thomas Nussbaumer & Johann W Kolar (2007) proposed two new types
of converter and compared it for its performance and efficiency. The first one was
a buck + boost rectifier system formed by series connection of a three-switch
buck-type rectifier input stage and an integrated DC/DC boost converter output
stage, while the second was a three-phase boost + buck rectifier system consisting
of a boost-type VR input stage followed by a DC/DC buck converter output stage.
Both the rectifiers draw sinusoidal current from the input mains and provides
wide output voltage. Comparison was carried out on a 6 kW rectifier operating at
400 Vrms line-to-line input and for different output voltages from 200 to 600 V.
Based on the evaluation it was concluded that the buck + boost approach was
superior considering the overall system complexity, the volume and weight of the
system and the efficiency.
Dehong Xu & Bo Feng (2007) extended the concept of Compound Active-
Clamping (CAC) and Minimal Voltage Active Clamping (MVAC) to the three-
phase PFC including VR, to suppress the diode reverse recovery losses and
proposed a novel Zero Voltage Switching Space Vector Modulation (ZVS-SVM).
It uses two inductors in series with the freewheeling diodes with two auxiliary
switches and two capacitors to clamp the voltage. All the switches turn-on under
zero voltage condition thereby improving the efficiency.
7
Dan Carlton & William G Dunford (2001) studied the features and
analyzed the cost performance of the VR and showed that it belongs to a multi-
level converter family. Several features such as the current ripple, common-mode
voltage and controllability angle were investigated. While any phase angle
between the AC voltage and current can be achieved for bidirectional converters,
unidirectional converters have a limited adjustment range. But, significant
savings on the semiconductor make the unidirectional 7 converters attractive for
the power factor correction application. A cost performance analysis was done
and the VR was found to be the most cost effective for the low power applications.
Minibock & Kolar (2001) conducted theoretical and experimental analysis
on the power semiconductor voltage stress of VR. A turn-on snubber was
proposed which improved the efficiency by 0.3% and was verified by
experimental measurements. This snubber has a coupled inductor and a diode in
series, connected across the freewheeling diodes on both the sides. The coupled
inductor was chosen such a way that the freewheeling diode current dies within
the off-time of the power transistor and results in low reverse recovery current of
the auxiliary diodes. The switching behavior with and without the turn-on
snubber were analyzed through measurements. Power losses were also measured
and efficiency was calculated and compared with and without the snubber. It was
observed that the total efficiency of the converter operating at a switching
8
frequency of 25kHz improved by 0.3% in the presence of the proposed turn-on
snubber.
Kolar et al. (2000) proposed a technique to reduce the common mode noise
introduced between the mains neutral point and the centre point of the output
voltage in a Three-level Three-phase PWM rectifier systems due to the switching.
This noise creates disturbances in the control circuit. It can be suppressed by
simply connecting the neutral to the output centre point. But this leads to use of
the 4-wire system and results in high zero-sequence currents. The modulation
index range also gets limited to one. So to maintain the advantage of the three-
wire operation, the formation of common-mode noise was analysed and discussed
for the VR through digital simulation and a procedure for selection of the filter
components was given. Common-mode noise measurements were verified by
EMI measurements taken on an 8 experimental 10kW prototype. Advantages and
disadvantages of the proposed filtering concept were also compiled.
Johann W Kolar et al. (1999) proposed a new single-stage VR with
galvanic isolated output. It draws continuous sinusoidal input current from the
mains and provides high-frequency isolation of the output voltage. The structure
of this system was realized by removing the DC-link capacitor from the regular
VR and replacing it with a DC-DC converter that operates on the impressed
current rather than with the impressed voltage, thereby removing the requirement
of the inductor at the output of the DC-DC converter. The complexity of
9
realization is low compared to a conventional two stage system. The functionality
of the new rectifier and the conduction states occurring within a pulse period was
explained. A Space Vector based control was proposed which assures a
symmetric magnetization of the transformer, while drawing a sinusoidal phase
currents in phase with the phase voltages. The proposed rectifier was digitally
simulated to verify the operation. The stresses on the semiconductor devices were
studied and calculated. The operation of the rectifier was verified on an
experimental 2.5-kW prototype. The advantages and disadvantages of the
proposed converter are also provided.
2.2 MODELING AND CONTROL OF VIENNA RECTIFIER
Lijun Hang et al. (2015) proposed a natural-frame-based control for the VR
to reduce the output voltage ripple and the DC component of the reactive power
under the unbalanced input conditions. The positive and negative-sequence
voltage components were derived by direct de-coupled synchronization method.
From the model of the VR under unbalanced input conditions, a natural-frame-
based current control was designed that reduces the algorithm complexity. The
stationary region of operation was analysed, and found to work beyond the
operation region with large unbalance. The 9-dynamic response under the
unbalanced input and the comparison with the traditional controller were given.
June-Seok Lee & Kyo-Beum Lee (2015) proposed a Carrier Based
Discontinuous Pulse Width Modulation (CB-DPWM) method, which is simpler
10
than the Discontinuous PWM (DPWM) method for the VIENNA Rectifiers,
based on the space vectors. Just adding the offset voltage to the three sinusoidal
reference voltages as in the existing CB-DPWM method does not satisfy the
requirement of same sign of the current and the input voltage. Hence, a new CB-
DPWM method was considered for the VR, where the reference voltage that does
not satisfy the requirement was clamped to zero. This was achieved by adding a
modified offset voltage that is different from the offset of the CB-DPWM method,
to the reference voltages.
Lijun Hang et al. (2014) analysed the SVM of the VIENNA Rectifier and
the implementation of the equivalent carrier based PWM is deduced within each
separated sector. The voltage balancing ability of DC link on the uneven
distribution of short vectors was analysed and proposed an adaptive and robust
controller that can work for a wide range of unbalanced load. The maximum
unbalanced load versus the modulation index was deduced and tested on an
experimental prototype of 2.5 kW.
Thiago B Soeiro & Johann W Kolar (2013) presented hybrid rectifiers for
highly efficient three-phase power-factor correction. These were obtained by the
parallel connection of a two or three-level unidirectional PWM rectifier with a
series connected three-phase diode-bridge rectifier and a DC-DC boost converter.
Control schemes for preserving the high power factor operation, while sharing
power with the paralleled rectifier and to handle a phase loss, without changing
11
the controller structure were proposed. The efficiency of the hybrid systems
presented are high, while they require 10 less silicon area when compared to the
single PWM rectifiers, which were demonstrated through experimental results.
Lijun Hang et al. (2013) proposed a feed forward compensation method for
the VR to minimise the effect of the switching between the DCM and CCM that
occurs during a load or input variation. The theoretical analysis of the proposed
method and the control design were given and validated through the experimental
results.
Lijun Hang & Ming Zhang (2014) studied the constant power control
method for the VR under severe unbalanced load and analysed the theoretical
operation area. Control methods like Dual Frame Hybrid Vector Control
(DFHVC) are good at alleviating the input power ripple under the light
unbalanced grid. It generates a common current reference to maintain constant
input power and gets rid of ripples in the dc-link voltage. For large unbalances a
compromised control method was proposed that injects a small amount of input
power ripple to arrive at a trade-off between the output voltage ripples and the
working area. It has an expanded operation area under the unbalanced grid. Under
the light unbalanced condition, it eliminates the ripples of the output DC-link
voltage and input power, while it decreases the ripple under severe unbalanced
conditions. This leads to reduction of the DC link electrolytic capacitor.
12
Lijun Hang et al. (2013) proposed a robust controller for the output voltage
balancing under the unbalanced load for different modulation indices using the
space vector modulation. The maximum unbalance for different modulation
indices was theoretically calculated. The theoretical analysis was verified by the
results from the prototype. Ming Zhang et al. (2013) proposed a novel control
method for the unbalanced grid after analysing the theoretical operation area of
the constant 11 power control method that can work under the severe unbalanced
grid by injecting a small part of the input power ripple and balance the working
area performance and the output DC voltage ripple. Controls like the dual frame
hybrid vector control, can perform well under the light unbalanced grid, but fails
under the severe unbalanced grid. The proposed control method was validated by
experimental results.
Zheng Wei et al. (2013) proposed the saddle PWM obtained by injecting
third harmonics into the current feedback of the One Cycle Control (OCC) and
analysed the fluctuation in the Neutral-Point-Potential (NPP). This Modified
OCC (MOCC) scheme improves the utilisation of DC bus voltage and mitigates
the ripple in the DC-link, retaining the advantages of the conventional OCC
scheme, like fixed switching frequency and no phase locked loop. The theoretical
analysis was verified by the simulation and experimental results on a 5-kW
prototype. Zheng Wei et al. (2013) proposed a MOCC for the VIENNA Rectifier
fed by a high frequency power line such as the aircraft power systems, where the
13
switching frequency to the power line frequency ratio becomes low. Here the drop
across the input inductor is considerable and cannot be neglected. The
conventional OCC cannot be adopted without scarifying on the current shaping.
The control equation of the MOCC taking into account the voltage drop across
the inductor was derived and the theoretical analysis was verified by the
experiments on a 2.5 kW VIENNA Rectifier.
Sensen Liu et al. (2013) introduced a novel natural frame based control for
the Vienna type rectifier that works on the unbalanced input. The positive/
negative sequence voltage components were derived by the direct decoupled
synchronisation method. To simplify the algorithm and based on the model of the
VR under the unbalanced input, a natural abc frame-based 12 current control
loops was suggested. This also reduces the size of the reactive components and
loss. The static operation region of the rectifier was analysed and derived. The
proposed control scheme was verified and compared with the traditional
controller through the experimental results.
Freddy Flores-Bahamonde et al. (2013) proposed a sliding-mode controller
for the VIENNA Rectifier in a wind mill application. The rectifier was modelled
as a tetra port Loss Free Resistor (LFR), with three decoupled input ports and one
output port, assuming equal input conditions and the DC mid-point connected to
the neutral. The sliding dynamics were demonstrated to be globally stable and the
control was implemented through an analog multiplier, operational amplifiers and
14
digital logic circuits. The theoretical predictions were validated by the
experimental results obtained from a low power wind generator for different
powers and frequencies.
Ansari et al. (2011) presented an analytical approach to minimize the phase
in the closed loop systems for the VR by proper selection of the output functions
to be regulated. Two adaptive control methodologies were developed based on
the input output linearization. In the first methodology, three output functions
were imposed to zero by three feedback laws. Based on the states to be regulated,
four cases were considered and were shown that only one case has resulted in a
one-dimensional zero dynamics with an asymptotically stable equilibrium point.
In the second methodology, two output functions were imposed to zero and
solved with two control inputs. Of the eighteen different cases studied, only one
was feedback linearizable. Stability of the adaptive systems were analysed and
the proposed adaptive controllers are capable of regulating the output with input
current shaping in the presence of parametric and non-parametric uncertainties.
Burgos et al. (2008) presented a new mathematical model for
nonregenerative VR using the equivalence of this topology with three-level 13
Neutral-Point-Clamped (NPC) converters. The rectifier’s model was based on its
operation using a positive and one negative-rail switching function as normally
done for NPC converters. This equivalent modelling turns into structurally time
invariant state space model of Vienna-type rectifiers, facilitating it to translate
15
into the synchronous d-q frame, and averaging it over a switching cycle. This
model is valid for half of the switching frequency. A detailed small-signal
analysis was presented. Simulation and experimental results for a 20 kW motor
drive and a 2 kW experimental prototypes were used for validation. The full
frequency range was obtained by modelling the converter phase-leg operation as
an NPC converter and using the correct modulating signals to comply with the
topological constraints of the non-regenerative three-level converter. The
proposed model retains its time variant dynamics inherent to the pulsating power
transfer between its input and output, due to its DC bus mid-point clamping. The
converter input admittance is periodic over 180o and the converter output
impedance is time invariant, enabling its direct use for the DC stability studies.
Loop-gain transfer functions like the d-q frame current loop and, the dc bus and
midpoint voltage loops are periodic over 60o.
Rolando Burgos et al. (2008) proposed a fast space vector modulator built
on the principle of the equivalence between the two and three level converters for
the VR. It enables to improve the operating range by over modulation schemes.
The proposed algorithm was simplified by deriving its carrier-based equivalent
implementation and exploits it by the direct correspondence between the zero-
sequence vectors of the three-level rectifiers and the zero state vectors of two-
level converters. This has resulted in an algorithm that is also capable of
controlling the rectifier neutral point voltage. Experimental evaluation of a 2 kW
16
digital signal processor–field programmable gate array controlled VIENNA
Rectifier was presented and 14 verified the performance attained by the proposed
carrier-based space vector modulator.
Youssef et al. (2008) developed a large signal model of the VR using the
state space averaging technique. This has resulted in a fifth order system with
time varying inputs. The model was established in rotating abc frame and then
converted to the synchronous stationary dqo frame to eliminate the time
dependence. Multi-loop PI controller was used and the stability was verified for
a wide operating range. The system stability is proved by the convergence of the
phase trajectories for any initial conditions. It was also verified on a 1.5 kW
prototype. DS-1104 board of dSPACE was used to control the experimental
model. Switching frequency of only 2.04 kHz was used due to the limitations on
the processing speed and the quantum of calculations required. The controller
function includes the transformation of three phase voltage and current quantities
to the rotating frame, PLL calculation, and four numbers of PI controller
calculations, one inverse transformation and PWM generation.
Youssef et al. (2008) applied a multi loop nonlinear control scheme to the
1.5 kW VR controlled by DS-1104 board of dSPACE. It was based on the dq
nonlinear averaged model of the rectifier. The nonlinearity of the system was
linearized by applying the input to output transform to both the output voltage
and inner current control loop. The controller was tuned by linear pole placement
17
method and was evaluated by experiments. The results were also compared with
the PI controller based control.
Youssef et al. (2008) proposed a nonlinearity compensation control of the
VR. The output and input voltages and were numerically estimated by an
extended Kalman filter and the converter averaged model. Only two current
sensors were used unlike the traditional nonlinear control approach, thus
improving the reliability and reducing the cost. A multi-loop nonlinear 15 control
technique was applied to the rectifier. The estimated partial DC bus voltages and
the measured currents were controlled by the inner loops. The total output DC
bus voltage was regulated by an outer loop considering the power balance. The
proposed method was verified on a 1.5 kVA prototype of the rectifier and
established that the implemented nonlinear observer exhibits a high precision of
estimation and was carried out within an acceptable response time, ensuring
satisfactory operation of the converter in the steady state.
Youssef et al. (2008) suggested a multiple-input, multiple-output linear
control technique based on a small-signal model for the VR. Averaging and local
linearization techniques were applied to obtain the dynamic model in the dqo
reference frame. The resulted transfer functions were discretized for the digital
controller design. The control consists of inner current feedback loops that
discard the interactions between the dq components and currents. The outer
voltage loop was designed to ensure the output voltage regulation by modifying
18
the references for the inner current loops. Also the output voltage unbalance was
controlled by the inner loops. The model and control approaches were simulated
and validated on a 1.5kW prototype. The results obtained prove the accuracy of
the proposed model and its dependability for the control design and dynamic
analysis. The nominal static point was determined from the converter nonlinear
state-space averaged model and local linearization was performed. This dynamic
model obtained has 20 transfer functions between the supply voltages, duty cycles
and the output voltages. Simulation and the implementation with DSP using the
small-signal perturbation technique were presented. Bode plots of the transfer
functions were provided.
Youssef & Al-Haddad (2007) applied a model reference adaptive control
to the inner loops of the VR, to maintain a balanced output, while the 16 other
parameters like output voltage control and current shaping were achieved. The
control was applied to the over parameterized dqo nonlinear multi-input multi-
output state space model. The system was sufficiently linearized and controlled
based on the Lyapunov parameters adaptation scheme. Inner current control loop
shapes the input current through the dq control and maintains the output voltage
balance while the outer loop regulates the total output voltage and was evaluated
on a 1.5 kW prototype.
Bel Hadj-Youssef et al. (2007) has developed a new small-signal modeling
technique for the VIENNA Rectifier and validated it through simulation and
19
experiments. The physical variables obtained in the stationary frame were locally
linearized around the nominal operating point from the state space-averaged
model and the converter steady state and dynamic models were elaborated and
then transformed into dqo rotational frame. Twenty input to output transfer
functions were obtained. The model was numerically verified using the averaged
state space model and the converter model was built in SIMULINK/MATLAB.
Experimental validation of the transfer functions was carried out on a 1.5 kW
laboratory prototype that has utilized the DS 1104 controller board of dSPACE.
The results obtained were quantified and were compared through Bode plots. It
was concluded that the proposed small-signal model was accurate and can be
utilized further for dynamic characteristic analysis, numerical simulation and
controller design.
Bingsen Wang et al. (2007) proposed a new control scheme that eliminates
the current sensors. This aids in reduced cost and space. The proposed approach
controls both the amplitude of the synthesized voltage and the phase angle and
results in a high-quality input current. The output of the output voltage controller
becomes the phase angle difference between the source and pole voltages. The
modulation index space vector was calculated based on the phase angle
difference. The phase angle of the modulation index 17 space vector is typically
small and the amplitude of the modulation index vector varies marginally during
the steady state operation. The power flow is mainly controlled by the phase
20
angle, though the unity power factor and input current shaping is achieved
through proper amplitude. The control transfer function results for the VR
features a third-order angle control. This is in contrast with the classical control
approaches exhibiting a right-half plane zero. The control was simulated in
SABER and compared with the experimental results. The match between the two
validates the new approach. The main disadvantage of this approach is protection
against overload, for which current sensor is necessary. Also the elimination of
current sensor has led to too many calculations including transformations,
multiplication, division and inverse transformations.
Bel Hadj-Youssef et al. (2006) analysed and studied the influence of the
control saturation phenomenon on the steady state performance of the converter.
The aim was to arrive at an appropriate value of the inductor that has the minimal
value to limit the ripple current and capable of withstanding the current
modulation and limits the control saturation. The digital controller parameters
were tuned to reduce the control saturation, while maintaining satisfactory control
and input current shaping. A pre-established small signal model was adopted and
an asymptotically approximated discretized version was considered. A MIMO
linear control was adopted. Controller gains were computed by discrete poles
imposition method. The plot of variation of the control saturation angle for
various line inductor sizes and variation of the saturation angle, THD and PF with
21
respect to DC voltage unbalance were reported. It can be observed that the
saturation angle increases as line inductor increases.
Jarno Alahuhtala & Heikki Tuusa (2006) presented a four-wire VR and
proposed a control for balancing the partial DC link voltages in both the 18
balanced and unbalanced loads. The digital control system was realized with the
Motorola MPC555 microcontroller. The need for the DC link voltage balancing
is significantly higher for a four wire VR compared to that of the three-wire VR,
due to the asymmetry of the split load. If the load resistors are considerably
different in size, the rectifier input currents have to be uneven to obtain balanced
DC link voltages. The control was achieved by getting the initial amplitude
reference of the phase currents from the voltage PI controller. To balance the DC
link voltages, the balancing term was obtained from the balance PI-controller and
multiplied by the signs of the mains voltages obtained from phase-locked loop
and were added to the preliminary reference forming the peak current references
The measured currents were then subtracted from the references and the current
error signals were fed to a P-controller, giving an approximation for the filter
voltages. These were subtracted from measured phase voltages and the rectifier’s
voltage reference was obtained. Reference voltages were brought to the
modulator along with the information of the DC link capacitor voltages and the
signs of the measured phase currents to generate the required PWM signals. The
proposed control scheme was verified by simulations and experimental
22
measurements on a 10 kW prototype with a DC link voltage of 700 V. The
simulation results were found to be in accordance with the measured results and
the rectifier was able to maintain balanced DC link voltages in both load
conditions. In symmetrical load the rectifier draws balanced and sinusoidal
currents from the utility network. During a constant asymmetrical load the line
currents become unbalanced and the number of even harmonics of the phase
currents increases significantly.
Grzegorz RADOMSKI (2005) felt that the direct current control methods
were not proper, as it generates improper control sequence and have suggested
voltage space vector modulation technique and presented its limitations. He has
derived a mathematical model of the VR and has defined 19 the voltage space
vector and its dependence to the phase currents. The maximum voltage space
vector and the range of the phase displacement angle vs the phase displacement
angle was drawn for sinusoidal SVM. The mathematical model was verified by
simulation.
Dalessandro et al. (2005) proposed a novel hysteresis current control
technique by virtually decoupling the VIENNA Rectifier. This was achieved by
a virtual connection between the output centre point and the neutral connection,
and is established by adding a zero sequence current to the actual phase current,
which is generated by the integration of the measured zero sequence voltage. This
zero sequence voltage is obtained from the output voltage of a three phase diode
23
bridge. This results in retaining the advantages of the classical hysteresis control
in addition to a better switching pattern and stability of the canter point. It also
provides a full utilization of the modulation range. This strategy was compared
to the conventional control methods. Digital implementation and the
experimental results are presented.
Peter Ide et al. (2005) proposed an optimized modulation and control for
DCM operation of VIENNA Rectifier. DCM operation normally occurs at the
high input voltage and at low load currents. In PFC application, this occurs even
at the medium loads near the mains voltage zero crossings. Under the DCM
operation, the input current total harmonic distortion is poor and requires
additional measures for the improved behaviour. A detailed analysis of the
associated states in DCM was performed to determine the location of the error
voltages, from which the basic rules for the location of error voltages can be
formulated. This has led to an optimized modulation and control scheme that
facilitates designs without additional inductance. The simulation and the
measurement results provided prove the enhanced modulation technique.
Minibock & Kolar (2005); Minibock et al. (2001) in Part I proposed a
control technique that eliminates the necessity of multiplier that generates the
input current reference from the mains AC phase voltage and the output voltage
controller output. This has also featured a reduced input ripple current and third
harmonic current that flows into the output mid-point. The control was achieved
24
by modifying the amplitude of the carrier signal in accordance with the voltage
controller output and changing its polarity to that of the input voltage. Another
scheme, which does not rely on the input voltage polarity, was also presented.
Realization of the control circuit and the experimental verification on a 5 kW
prototype was also provided. In Part II, a conventional scheme that utilizes a
multiplier has been compared with the multiplier free scheme, for operation in
highly unbalanced phase voltages and in the phase loss conditions. Conventional
control concept was briefly discussed and compared with the size of the control
realization, power factor and harmonics. Below one-third of the rated power, the
proposed control exhibits a marginal advantage over the conventional one. But
considering the accuracy of the measuring instruments and the marginal variation
between the two, the performance can be considered almost similar.
Chongming Qiao & Keyue Ma Smedley (2003) proposed an Unified
Constant-Frequency Integration (UCI) controller for the VR. It is based on the
one-cycle control, which is simple and reliable. An integrator with reset control,
along with three flips-flops and comparators form the control circuit. It does not
require the multipliers or the input voltage sensing as in many other control
approaches. Additional advantage of this controller includes fixed switching
frequency operation. Current feedbacks can be obtained either from the inductor
or the switch current. The proposed control is supported by experimental results.
25
Franz Stogererjo et al. (2001) proposed a novel control concept for the
VIENNA Rectifier under heavily unbalanced mains voltage conditions. An
average current-mode controller with an inner input current control loop for each
phase and an outer output voltage loop was employed. The output voltage
difference was controlled by the input current reference zero sequence component
values. The current control loop uses a mains voltage pre-control signal that
contains a zero sequence quantity for extending the modulation limit. A P-type
controller is sufficient to achieve a high quality input current shape with this
mains voltage pre-control signal. The input current reference values were derived
from the input conductivity reference value considering the output voltage
controller output as output power demand. The input conductivity was limited to
maintain the limit on the peak value of the input currents. The input current
reference values were derived from the product of the input conductivity and the
measured input voltages. An economical solution was achieved by implementing
the control using a combination of a low cost micro-controller and an analog
circuit. All high frequency operations were carried out by the analog circuit while
the micro-controller performing the low frequency operations.
Johann W Kolar et al. (2000) proposed a novel concept of continuous
reconstruction of the input phase currents of the VIENNA Rectifier system,
utilizing the neutral point current information measured by a current transformer.
An observer utilizes the fact that the inductor voltage measured is proportional to
26
the rate of change of the respective input phase current, and the phase currents
can be built by the integration of the inductor voltage. The estimation error can
be corrected based on the measured values of the centre point current. The
observer circuit, in modified form could also detect an output voltage earth fault,
was discussed in detail. Results of a practical laboratory model of a 10kW
VIENNA Rectifier system were given. 22 Jay
Rajagopalan et al. (1999) presented a method to achieve high power factor
in average Current Mode Controlled (CMC) single-phase rectifiers, operating in
Continuous Conduction Mode (CCM), without input voltage sensing. The control
laws were derived considering the CCM large signal averaged Pulse Width
Modulation (PWM) switch model and the steady-state input-output voltage
relationships. This methodology was applied to other single-phase converters
such as boost, fly back, SEPIC, and buck + boost, thereby using a two-loop
controller in the place of conventional three loop controllers. Hardware results
were presented for a boost PFC that demonstrates improved performance and the
simulation results were provided for the SEPIC, flyback, and buck + boost
converters.
Uwe Drofenik & Johann W Kolar (1999) compared the switching losses
and the mains current ripple, on using an individual integrated control circuits for
each phases, with and without synchronization of the control ramps and also with
synchronized triangle instead of ramps. In a three-phase three-wire system, where
27
the star point is not connected to the neutral, all the three phases are coupled, and
hence individual current control results in increased amplitude of the harmonics
with increasing switching frequency. It was observed that synchronized control
ramp produces lower switching losses and lower input harmonics, while
synchronized triangle has medium switching losses and lowest input harmonics.
The size and weight of the EMI filter reduces significantly for the synchronized
triangular carrier.
Johann W Kolar et al. (1996) analysed the stationary operational behaviour
of the VIENNA Rectifier for the unbalanced loading of the output. Analytical
calculations revealed that the average value of the centre point current has a linear
dependence largely on the total relative switching state on-time. The maximum
admissible center point load was calculated and was dependent on the amplitude
of the input current and the modulation index of 23 the system. The calculations
were verified by the digital simulations. Input RMS ripple current was analyzed
as it directly influences the average value of the neutral point current. Current
stress on the devices and the output capacitors were also compiled, enabling direct
dimensioning of the system.
Johann W Kolar et al. (1995) presented a method for the control of center
point voltage of the VIENNA Rectifier. Independent hysteresis controllers were
used for the current shaping. The center point voltage stability was studied based
on the analysis of the center point current generated due to the switching state.
28
Transfer function of the dynamic system behavior was determined. The control
of the center point voltage was achieved by offsetting the phase current reference
values. Mains current shape is not affected due to the floating neutral, but
influence the distribution of switching states to control the center point voltage.
Control behavior for the stationary operation and the load step change of the
center point were examined. Dean Venable (1983) introduced a new simple, but
powerful mathematical concept called k factor approach. With this technique, the
feedback amplifiers for controlling any converter can be designed with the
required crossover frequency and necessary phase margin in a few algebraic
equations on the first try, without the need for the trial and error adjustments.
Three standard feedback amplifiers were presented, which caters for any known
loop. With these amplifiers and the k factor, the feedback circuit can be designed
for a particular loop cross-over frequency and phase margin. The necessary
component values can be determined from a few equations. The k factor value is
always one for the first amplifier, the square root of the ratio of the pole frequency
to the zero frequency for the second amplifier, and the ratio of the double pole
frequency to the double zero frequency for the third amplifier.
29
CHAPTER 3
VIENNA RECTIFIER
3.1 INTRODUCTION TO VIENNA RECTIFIER
The Vienna University of Technology has developed the Vienna Rectifier.
Three bidirectional switches (Sa, Sb, and Sc) with two capacitors which are
identical and series connected along with a three-phase diode rectifier, are used
to assemble AC-DC converter topology. To form a bidirectional switch four
diodes and a MOSFET are connected. Compared to two level converters Vienna
Rectifier offers the following benefits:
❖ Minimises the harmonic content of the mains current.
❖ The power semiconductor devices are subject to less blocking potential
across the device. This is only one half of the blocking potential across the
device in the conventional two level voltage source rectifier and
❖ Inherently Vienna Rectifier has a higher reliability than the other types of
rectifiers.
3.1.1 PWM VIENNA RECTIFIER WITH THREE PHASE THREE
LEVELS
Several operational and design challenges are to be met with Vienna
Rectifier. Vienna Rectifier forms a class of current dependent forced commutated
voltage-source rectifier. The status of the switches and the current direction
30
decides the generation of input voltages. Three switches are provided in the
Vienna Rectifier. Each switch is placed one per phase-leg and each phase is tied
to the neutral point of the DC-link when that particular phase is switched on. Or
else the current direction decides the voltage of that phase. The input current is
positive and the positive DC link rail will be tied to the phase14 leg if the upper
diode of that phase is on.
The input current is negative, when the bottom diode is on, and the negative
DC link will be tied to the phase leg. For nominal loads, Vienna Rectifier
improves the three phase rectifier’s input power factor. When the “critical input
inductor” is used, it is found that in the low output region degradation of both the
Power Factor as well as the THD occurs. Using the proposed controller, high-
quality sinusoidal supply currents are drawn by the converter. Also it maintains a
good DC link voltage regulation and wide load variations. The converter draws a
non-sinusoidal current which is responsible for maintaining a good regulation in
the DC link voltage and allowing wider load variations.
In three phase DC motor drives and switch mode power supplies using
diodes use capacitors to smoothen the voltage. This arrangement has the
disadvantage that large current harmonics are injected into the devices used by
public which consequently result in the reduction of power factor. International
standards on Unity Power Factor rectifiers impose certain harmonic restrictions
to modern rectifiers with respect to restrictions on harmonics that is presented in
31
IEC 1000-3-2 and EN61000-3-2. To achieve input waveforms of high quality
three levels power converters are proposed which fall under the series of newly
developed topologies.
To realize high quality input waveforms, a series of new topologies which
include those of power converters having three levels are proposed. VIENNA
rectifier has become an attractive choice for the star-connected three-phase
rectifier. Vienna Rectifier consists of three input inductors, three bidirectional
switches, and two series-connected capacitors. During the 30􀆕 of the input line
voltage cycle, the zero-volt point is crossed and the corresponding bidirectional
switch is turned on.
The above method is able to retain the well shaped current waveform and
keeps it nearly sinusoidal. In such cases, the THD in the input current goes down
to a low value of 6.6% and the PF goes up to 0.99. The switching losses are
negligible as the bidirectional switches are able to conduct at twice the line
frequency. Most of the current researchers have focused on the Vienna Rectifier
and its variants. Based on the discussions on various converter/control topologies,
the Vienna Rectifier with constant switching frequency is chosen as the suitable
rectifier for converting a generator type input because of the following reasons.
❖ The Vienna Rectifier offers the same or less input current harmonic
distortion as compared to other topologies.
32
❖ The Vienna Rectifier, with its three-level output, allows any DC-DC
converter to be used at the rectifier output (half-bridge, full-bridge or any
other topology) and, with constant switching frequency control, no
additional circuitry is required to balance the two output capacitors.
❖ The Vienna Rectifier has only three switches, which are significantly fewer
than switches used in other rectifiers with the same performance (in terms
of Harmonic Distortion) and
❖ The Vienna Rectifier requires simple control.
3.2 CIRCUIT SCHEMATIC
A unidirectional three phase AC-DC converter of three phase type design
with controlled output voltage, is shown in Figure 3.1. In this a low DC voltage
is converted to a high DC voltage in which uncontrolled diode bridges are
connected in series [37]. An inductor is placed on the AC side to remove the
harmonics and the converter is operated in Discontinuous Conduction Mode.
The mains phase current harmonics, which remain even after filtering the
input quantities that are discontinuous are filtered, decides the output voltage
level.
33
Figure 3.1 Unidirectional AC - DC Converter
The DC side converter part is split into two partial systems, which are
simultaneously pulsed, and is shown in Figure 3.2. This is to make each part to
sustain half of the DC link voltage for operating the system followed in Europe
because of the discontinuous input current shapes, the circuits described possess
current stress of high amplitude on the power semiconductor components. Also,
for limiting the conducted Electro Magnetic Interference (EMI) the filtering effort
required is more.
34
Figure 3.2 Inductors on AC Side
Along with the limitations mentioned already, the high voltage across the
power semiconductor devices of a converter is another major limitation. To
ensure sinusoidal shaped waveform which is independent of the output voltage
level [39-42], we need to go in for alternative types of converters. Continuous,
sinusoidal mains current shape can be created over the range of pulse periods,
only if rectifier input voltages have sinusoidal shape. Using output diodes and
transistors which are controlled synchronously in each of the bridge legs, help to
achieve control of the synthesis of each phase voltage and this is shown in Figure
3.3.
35
Figure 3.3 Applications of Synchronously Controlled Transistors
Since the output voltage centre point is included into the system, the final
circuit consisting of power semiconductors has to support only one half of output
voltage. Circuit legs control the converter’s conduction state. If the diodes are
connected to the circuit legs conduction losses can be reduced.
36
Figure 3.4 Diodes in the Circuit Legs
In each phase of the circuit, the control legs lying in anti-parallel realize a
bipolar switch. A power transistor combined with a single-phase diode bridge
circuit as shown in Figure 3.4 can be substituted in place of the bidirectional
bipolar switch. This is an added advantage in modifying the circuits.
37
3.5(a)
3.5(b)
Figures 3.5 (a) and (b) VIENNA Rectifier System having Unity Power
Factor PWM
38
Comparing the realizations shown in Figures 3.1 and 3.2, it is observed that
in Figures 3.5 (a) and (b) 50% reduction in turn-off power electronic devices can
be achieved. Also control effort minimization and increase in the utility of the
power transistors used are realized. With reference to Figure 3.5 (a), the diodes
must withstand the full output voltage in the blocking direction. This is a serious
disadvantage. Integrating the bipolar switches, this disadvantage can be
eliminated. On the input side, the diode bridge legs can be integrated with the
bipolar switches to obviate the disadvantage encountered. Incorporating this
arrangement, the converter topology is shown in Figure 3.5 (b) which is called as
“Three Phase Three Switch Three Level PWM based VIENNA RECTIFIER”.
3.3 WORKING PRINCIPLE OF VIENNA RECTIFIER - SINGLE PHASE
For instance, if the controlled switch Ta is off and the line current iA is
positive, Vdc/2 is the voltage between DC bus midpoint M and the converter pole
A. Figure 3.6 (a) illustrates this arrangement.
39
Figure 3.6 Working Principle of Vienna Rectifier - Single Phase
If the controlled switch Ta is on and the line current iA is positive, the
voltage VAM is 0, and the conduction path is as shown in Figure 3.6 (b). In a
similar way, we can establish that if the line current iA is negative, the voltage
VAM can be either -Vdc/2, if the switch Ta is off, or zero if the switch Ta is on,
and this situation is illustrated in Figure 3.6 (c). Again, if the line current iA is
negative, the voltage VAM can be either -Vdc/2 if the switch Ta is off, or zero if
the switch Ta is on, as illustrated in Figure 3.6 (d). For the phase legs B and C the
same operating principles can be applied.
40
3.4 VIENNA RECTIFIER SYSTEM
3.4.1 OPERATION OF VIENNA RECTIFIER
The alternative construction of this topology is shown in Figure 3.7.
Assume that the Vienna rectifier operates in continuous conduction mode. The
Vienna rectifier system contains three controlled bidirectional switches. The
bidirectional switch diagram is shown in Figure 3.7, right side. In each phase
bidirectional switches have controlled independently to ensure the unity power
factor.
Figure 3.7 Alternative construction of Vienna rectifier
41
The phase voltage VAN, VBN, VCN are determined by ON/OFF state of
the bidirectional switch and the direction of line current in the respective phase.
Hence the rectifier phase voltage depends on the state of switch position and
polarity of line current. The DC link consists of two equal values of capacitance,
connected in series. The common point of the capacitor N is reference point and
maintains zero voltage. The switching operation is similar to all three phases.
The phase voltage is defined thus:
Where,
Lj is input boost inductor,
ij is input current
Vj is input voltage
ViN is phase voltage (i= A, B, C)
Vdc1=Vdc2 are output capacitor voltage
Skis switch (k=a, b, c), Sk=0 represents OFF condition, Sk=1 represent
ON condition.
42
When the polarity of line current is positive and the switch state is OFF,
the DC link voltage +V0/2 will appear across the VAN and the polarity of current
remains the same and the switch state is ON. Then input current flows to common
of capacitor through the switch and VAN becomes zero. The current flow
directions are shown in Figures 3.8 & 3.9, when the input current is positive and
switch Sa is in OFF and ON conditions respectively.
Figure 3.8 Current direction when input current is positive and Sa is OFF
43
Figure 3.9 Current direction when input current is positive and Sa is ON
When the polarity of line current is negative and switch is OFF, the DC
link voltage –V0/2 will appear across the VAN and the polarity remains the same
and the switch state is ON; then VAN becomes zero. The current flow directions
are shown in Figures 3.10 & 3.11, when the input current is negative and switch
Sa is in OFF and ON conditions respectively.
44
Figure 3.10 Current direction when input current is negative and Sa is
OFF
Figure 3.11 Current direction when input current is negative and Sa is ON
The phase voltages VAN, VBN, VCN are determined by the polarity of
current and switch position. The following Tables 3.1, 3.2, 3.3, 3.4, 3.5 & 3.6
45
give the switching patent for the different possible combinations at different
conditions of input current.
Table 3.1 Possible combinations of switching state at ia>0, ib, ic<0
Table 3.2 Possible combinations of switching state at ib>0, ia, ic<0
46
Table 3.3 Possible combinations of switching state at ic>0, ia, ib<0
Table 3.4 Possible combinations of switching state at ia, ib>0, ic<0
47
Table 3.5 Possible combinations of switching state at ib, ic>0, ia<0
Table 3.6 Possible combinations of switching state at ia, ic>0, ib<0
48
The current paths for the Vienna rectifier are shown in Figures 3.12 & 3.13
for instant when all the switches are in OFF/ON condition respectively. The three-
phase current direction and output voltage directions are also mentioned.
Figure 3.12 Current path in alternate construction in all switches OFF
49
Figure 3.13 Current path in alternate construction in all switches ON
Figure 3.14 Simulation Block Diagram
50
CHAPTER 4
CONTROL TECHNIQUES
4.1 PI CONTROLLER
PI controller is a well-known controller which is used in the most
application. PI controller becomes a most popular industrial controller due to its
simplicity and the ability to tune a few parameters automatically. As an example,
for the application of PI controller in industry, slow industrial process can be
pointed; low percentage overshoot and small settling time can be obtained by
using this controller. Many theoretical and industrial studies have been done in
PI controller setting rules Zeigler and Nichol’s in 1942 proposed a method to set
the PI controller parameter Hagglund and Astrom in 1955 and cheng chingin
1999 introduced other technique.
Figure 4.1 Structure of PI controller
PI most widely-used type of controller for industrial applications and
exhibit robust performance over a wide range of operating conditions.
51
4.2 PROPORTIONAL RESONANT CONTROL
So as to direct the grid current a solitary stage input current loop is
utilized. The model of the present control and the plant are appeared in Figure
4.2. As space vector hypothesis can't be connected to the single phase VSI, the
controller structure and demonstrating of the system is impossible in dq outline.
Figure 4.2 Block diagram of Current Controller.
The transfer function of the LCL filter is symbolized by plant Gf(s) ,
which is delineates as:
sCf Rd + 1
Gf (s) = … … … … … … … … … … … … … …(4.1)
s3 LI Lg Cf +s2 Cf Rd (LI +Lg )+s(LI +Lg )
There is always steady state magnitude and phase error subsists while
tracking a sinusoidal signal utilizing ‘Proportional Integral (PI) control’. This
would eliminate SSE (steady state error) while following a sinusoidal signal. The
PR controller Gi(s) is:
52
Ki s
Gi (s) = K p + … … … … … … … … … … … … … … … …(4.2)
S +2δω0 s+ω20
2
Here Kp and Ki are the ‘proportional and integral gain’ respectively,
is the ‘damping factor’, ω0 is ‘power frequency of the grid voltage’. The ‘infinite
gain of PR control’ is diminished by damping factor ′δ to enhance the
‘bandwidth’ and thus dynamics of the system remains steady.
53
CHAPTER 5
MATLAB AND SIMULATION RESULTS
5.1 INTRODUCTION TO MATLAB
MATLAB is a high-performance language for technical computing. It
integrates computation, visualization, and programming in an easy-to-use
environment where problems and solutions are expressed in familiar
mathematical notation. Typical uses include
1. Math and computation
2. Algorithm development
3. Data acquisition
4. Modelling, simulation, and prototyping
5. Data analysis, exploration, and visualization
6. Scientific and engineering graphics
7. Application development, including graphical user interface building
MATLAB is an interactive system whose basic data element is an array
that does not require dimensioning. This allows you to solve many technical
computing problems, especially those with matrix and vector formulations, in a
fraction of the time it would take to write a program in a scalar non-interactive
language such as C or FORTRAN.
54
The name MATLAB stands for matrix laboratory. MATLAB was
originally written to provide easy access to matrix software developed by the
LINPACK and EISPACK projects. Today, MATLAB engines incorporate the
LAPACK and BLAS libraries, embedding the state of the art in software for
matrix computation.
MATLAB has evolved over a period of years with input from many users.
In university environments, it is the standard instructional tool for introductory
and advanced courses in mathematics, engineering, and science. In industry,
MATLAB is the tool of choice for high-productivity research, development, and
analysis.
MATLAB features a family of add-on application-specific solutions called
toolboxes. Very important to most users of MATLAB, toolboxes allow you to
learn and apply specialized technology. Toolboxes are comprehensive collections
of MATLAB functions (M-files) that extend the MATLAB environment to solve
particular classes of problems. Areas in which toolboxes are available to include
signal processing, control systems, neural networks, fuzzy logic, wavelets,
simulation, and many others.
55
5.2 SIMULATION RESULTS
5.2.1 OPEN LOOP VEINNA RECTIFIER WITH SOURCE
DISTURBANCE
Circuit diagram of open loop veinna rectifier with source disturbance is
delineated in Fig.5.1. Input voltage is delineated in Fig.5.2 &its value is 56V.
Voltage across motor load is delineated in Fig.5.3 &its value is 150V. Motor
speed is delineated in Fig.5.4 &its value is 1700 RPM. Current through motor
load is delineated in Fig.5.5 &its value is 12A. Motor torque is delineated in
Fig.5.6 &its value is 7N-m.
Figure 5.1 Circuit diagram of open loop veinna rectifier with source
disturbance
56
Figure 5.2 Input voltage
Figure 5.3 Voltage across motor load
Figure 5.4 Motor speed
57
Figure 5.5 Current through motor load
Figure 5.6. Motor torque
5.2.2 CLOSED LOOP VEINNA RECTIFIER WITH PI CONTROLLER
Circuit diagram of closed loop veinna rectifier with PI controller is
58
Figure 5.7. Circuit diagram of closed loop veinna rectifier with PI
controller
Figure 5.8. Input voltage
59
Figure 5.9 Voltage across motor load
Figure 5.10 Motor speed
Figure 5.11. Current through motor load
60
Figure 5.12 Motor torque
5.2.3 CLOSED LOOP VEINNA RECTIFIER WITH PR CONTROLLER
Circuit diagram of closed loop veinna rectifier with PR controller is
61
Figure 5.13. Circuit diagram of closed loop veinna rectifier with PR
controller
Figure 5.14. Input voltage
62
Figure 5.15. Voltage across motor load
Figure 5.16. Motor speed
Figure 5.17. Current through motor load
63
Figure .18 Motor torque
Barchart of Time domain parameter using PIC and PRC is delineated in
Fig.45.19. Comparison of Time domain parameter using PIC and PRC is given
in table-5.1. By using PR controller, the rise time is reduced from 1.45Sec to
0.26Sec; peak time is reduced from 1.46Sec to 0.37Sec; settling time is reduced
from 4.78Sec to 2.33Sec; steady state error is reduced from 1.8V to 1.1V. Hence,
the outcome represents that the closed loop veinna rectifier with PR controller is
superior to closed loop veinna rectifier with PI controller.
Table-5.1
COMPARISON OF TIME DOMAIN PARAMETER USING PIC AN PRC
Controller Tr (Sec) Ts (Sec) Tp (Sec) Ess (V)
PI 1.45 4.78 1.46 1.8
PR 0.26 2.33 0.37 1.1
64
Figure 5.19 Barchart of Time domain parameter using PIC and PRC
65
CHAPTER 6
HARDWARE IMPLEMENTATION
6.1 GENERAL
For the hardware implementation we use different components. They are
listed below as
1. PIC Microcontroller 16F84A.
2. Voltage Regulators
a. 7812 voltage regulator
b. 7805 voltage regulator
3. IC IR2110 for the amplification of the pulses given by
PIC16F84A
6.2 POWER SUPPLY CIRCUIT
1
1 3 3
2 2 7812 7805
D2 D4 2 2
560 Ω
1 1
230v C1 C2
1
ac 1mf 1mf To
50
Hz 12V 5V Driver
2
circuit
2 2
or mc
230/15V
500mA D3 D5
1 1
Fig.6.1. Power circuit
66
FEW SIGNIFICANT POINTS REGARDING THE POWER CIRCUIT:
❖ A step-down transformer (230/15) V is used to give input supply to the
power circuit.
❖ The 15V AC input is rectified into 15V pulsating DC with the help of full
bridge rectifier circuit.
❖ The ripples in the pulsating DC are removed and pure DC is obtained by
using a capacitor filter.
❖ The positive terminal of the capacitor is connected to the input pin of the
7812 regulator for voltage regulation.
❖ An output voltage of 12V obtained from the output pin of 7812 is fed as
the supply to the pulse amplifier.
❖ An output voltage of 5V obtained from the output pin of 7805 is fed as the
supply to the micro controller.
❖ From the same output pin of the 7805, a LED is connected in series with
the resistor to indicate that the power is ON.
5.3 PIC CONTROLLER
In this project the hardware is implemented using the Pic- Microcontroller
“Pic 16F84A”. The advantages of the Pic- microcontroller is that the instruction
set of this controller are fewer than the usual microcontroller. Unlike
67
Conventional processors, which are generally complex, instruction set computer
(CISC) type, Pic microcontroller is a RISC processor.
The advantages of RISC processor against CISC processor are:
1. RISC instructions are simpler and consequently operate
faster.
2. A RISC processor takes a single cycle for each instruction,
while CISC processor requires multiple clocks per instruction
( typically, at least three cycles of throughput execution time
for the simplest instruction and 12 to 24 clock cycles for more
complex instruction), which makes decoding a tough task.
3. The control unit in a CISC is always implemented by a micro-
code, which is much slower than the hardware implemented
in RISC.
The idea of using the Pic microcontroller is because:
1. To employ the frequently used instructions as the instruction
set while using a few instructions to achieve the same function
performed by a much more complex instruction in a CISC.
2. The RISC itself has a large number of general purpose
registers, largely reduced the frequency of the most time-
consuming memory access.
68
3. In terms of clock rate, the RISC with its much simpler circuits
can have a higher clock rate that again increases the
performance of a processor.
Overall the RISC processor can provide processing power more than three times
of a CISC processor in a particular field of application.
6.3.1 Features of PIC-microcontroller “Pic16F84A”
• Only 35 single word instructions to learn
• All instructions single-cycle except for program branches which are two-
cycle
• Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle
• 1024 words of program memory
• 68 bytes of Data RAM
• 64 bytes of Data EEPROM
• 14-bit wide instruction words
• 8-bit wide data bytes
• 15 Special Function Hardware registers
• Eight-level deep hardware stack
• Direct, indirect and relative addressing modes
• Four interrupt sources:
- External RB0/INT pin
- TMR0 timer overflow
69
- PORTB<7:4> interrupt-on-change
- Data EEPROM write complete
Fig 6.2. Block Diagram of “PIC16F84A”
Fig 6.3. Pin Diagram of PIC16F84A
70
The PIC16F84A belongs to the mid-range family of the PIC
microcontroller devices. A block diagram of the device is shown in Figure 6.9
The program memory contains 1K words, which translates to 1024
instructions, since each 14-bit program memory word is the same width as each
device instruction. The data memory (RAM) contains 68 bytes. Data EEPROM
is 64 bytes.
There are also 13 I/O pins that are user-configured on a pin-to-pin basis. Some
pins are multiplexed with other device functions. These functions include:
• External interrupt
• Change on PORTB interrupts
• Timer0 clock input
6.3.2 OSCILLATOR TYPES
Fig 6.4 A popular op-amp relaxation oscillator
71
The PIC16F84A can be operated in four different oscillator modes. The
user can program two configuration bits (FOSC1 and FOSC0) to select one of
these four modes:
• LP Low Power Crystal
• XT Crystal/Resonator
• HS High Speed Crystal/Resonator
• RC Resistor/Capacitor
6.3.3 RESET
The PIC16F84A differentiates between various kinds of RESET:
• Power-on Reset (POR)
• MCLR during normal operation
• MCLR during SLEEP
• WDT Reset (during normal operation)
• WDT Wake-up (during SLEEP)
6.3.4 POWER ON RESET (POR)
A Power-on Reset pulse is generated on-chip when VDD rise is detected
(in the range of 1.2V - 1.7V). To take advantage of the POR, just tie the MCLR
pin directly (or through a resistor) to VDD. This will eliminate external RC
72
components usually needed to create Power-on Reset. A minimum rise time for
VDD must be met for this to operate properly.
When the device starts normal operation (exits the RESET condition),
device operating parameters (voltage, frequency, temperature, etc.) must be met
to ensure operation. If these conditions are not met, the device must be held in
RESET until the operating conditions are met.
6.3.5 POWER-UP TIMER (PWRT)
The Power-up Timer (PWRT) provides a fixed 72 ms nominal time-out
(TPWRT) from POR. The Power-up Timer operates on an internal RC oscillator.
The chip is kept in RESET as long as the PWRT is active. The PWRT delay
allows the VDD to rise to an acceptable level.
A configuration bit, PWRTE, can enable/disable the PWRT. The operation of the
PWRTE bit for a particular device. The power-up time delay TPWRT will vary
from chip to chip due to VDD, temperature, and process variation.
6.3.6 INTERRUPTS
The PIC16F84A has 4 sources of interrupt:
• External interrupt RB0/INT pin
• TMR0 overflow interrupt
• PORTB change interrupts (pins RB7:RB4)
73
• Data EEPROM write complete interrupt
The interrupt control register (INTCON) records individual interrupt
requests in flag bits. It also contains the individual and global interrupt enable
bits. The global interrupt enable bit, GIE (INTCON<7>), enables (if set) all
unmasked interrupts or disables (if cleared) all interrupts. Individual interrupts
can be disabled through their corresponding enable bits in INTCON register. Bit
GIE is cleared on RESET. The “return from interrupt” instruction, RETFIE, exits
interrupt routine as well as sets the GIE bit, which re-enables interrupts. The
RB0/INT pin interrupt, the RB port change interrupt and the TMR0 overflow
interrupt flags are contained in the INTCON register.
When an interrupt is responded to, the GIE bit is cleared to disable any
further interrupt, the return address is pushed onto the stack and the PC is loaded
with 0004h. For external interrupt events, such as the RB0/INT pin or PORTB
change interrupt, the interrupt latency will be three to four instruction cycles. The
exact latency depends when the interrupt event occurs. The latency is the same
for both one and two cycle instructions. Once in the Interrupt Service Routine,
the source(s) of the interrupt can be determined by polling the interrupt flag bits.
The interrupt flag bit(s) must be cleared in software before re-enabling interrupts
to avoid infinite interrupt requests.
74
6.4 DRIVER UNIT (OPTOCOUPLERS)
There are many situations where signals and data need to be transferred
from one subsystem to another within a piece of electronics equipment, or from
one piece of equipment to another, without making a direct ëohmicí electrical
connection. Often this is because the source and destination are (or may be at
times) at very different voltage levels, like a microprocessor which is operating
from 5V DC but being used to control a triac which is switching 240V AC. In
such situations the link between the two must be an isolated one, to protect the
microprocessor from over voltage damage
Figure 6.5. Optocouplers
Relays can of course provide this kind of isolation, but even small
relays tend to be fairly bulky compared with ICs and many of today’s other
miniature circuit components. Because they’re electro-mechanical, relays are also
not as reliable ó and only capable of relatively low speed operation. Where small
size, higher speed and greater reliability are important, a much better alternative
75
is to use an optocoupler. These use a beam of light to transmit the signals or data
across an electrical barrier, and achieve excellent isolation.
Optocouplers typically come in a small 6-pin or 8-pin IC package, but are
essentially a combination of two distinct devices: an optical transmitter, typically
a gallium arsenide LED (light-emitting diode) and an optical receiver such as a
phototransistor or light-triggered diac. The two are separated by a transparent
barrier which blocks any electrical current flow between the two, but does allow
the passage of light. The basic idea is shown in Fig.1, along with the usual circuit
symbol for an optocoupler.
The most important parameter for most Optocouplers is their transfer
efficiency, usually measured in terms of their current transfer ratio or CTR. This
is simply the ratio between a current change in the output transistor and the
current change in the input LED which produced it. Typical values for CTR range
from 10% to 50% for devices with an output phototransistor and up to 2000% or
so for those with a Darlington transistor pair in the output. Note, however that in
most devices CTR tends to vary with absolute current level.
Typically it peaks at a LED current level of about 10mA, and falls away at
both higher and lower current levels. Other optocoupler parameters include the
output transistor’s maximum collector-emitter voltage rating VCE (max), which
limits the supply voltage in the output circuit; the input LED maximum current
rating IF (max), which is used to calculate the minimum value for its series
76
resistor; and the Optocouplers bandwidth, which determines the highest signal
frequency that can be transferred through it ó determined mainly by internal
device construction and the performance of the output Phototransistor.
6.4.1 IR 2110 – HIGH AND LOW SIDE DRIVER
❖ Some of the features of IR 2110 are:
❖ Floating channel designed for bootstrap operation
❖ Gate drive supply range from 10 to 20V
❖ Under voltage lockout for both channels
❖ 3.3V logic compatible
❖ Separate logic supply range from 3.3V power ground + 5V
❖ power ground + 5V offset
❖ CMOS Schmitt-triggered inputs with pull down
❖ Cycle by cycle edge-triggered shutdown logic
❖ Matched propagation delay for both channels
❖ Outputs in phase with inputs
The IR2110 is a high voltage, high speed power MOSFET driver with
independent high and low side referenced output channels. It is fully operational
to +500V or +600V and tolerant to negative transient voltage dV/dt immune.
Logic inputs are compatible with standard CMOS or LSTTL output, down to
3.3V logic. The output drivers feature a high pulse current buffer stage designed
for minimum driver cross-conduction.
77
Propagation delays are matched to simplify use in high frequency
applications. The floating channel can be used to drive an N-channel power
MOSFET or IGBT in the high side configuration which operates up to 500 or 600
volts.
Fig 6.6. Pin Diagram
6.4.2 LEAD DEFINITIONS
Symbol Description
VDD Logic Supply
HIN Logic input for high side gate drive output (HO), in phase
SD Logic input for shut down
LIN Logic input for low side gate driver output (LO), in phase
78
VSS Logic ground
VB High side floating supply
HO High side gate drive output
VCC Low side supply
LO Low side gate drive output
COM Low side return
6.4.3 APPLICATIONS
1) Power supply regulator
2) Digital logic inputs
3) Microprocessor inputs
79
1 3 1 3
7812 7805
D1 D2 2 2
230V/15V
560
230V
C1
AC Supply 1000
35V
LED
D4 D3
S1
14
1
RA2 10
1 1k
560
3
4
2
RA3 12
560 Driver IC 6 C5
IR2110 C2 10uF
47uF
9 5
C6
2
47uF 13 S2
15
33pF 7 1k
C8 PIC MICROCONTROLLER
0 PIC16F84A
S3
16
C9 18
RA1 10
1 1k
33pF 560
0 3
17
RA0 12
C4
10uF
560 6
Driver IC
5 IR2110 C3
0 5 47uF
9
C7 2
S4
47uF 13
7 1k
Fig.6.7 Control circuit
80
6.5 MOSFET
6.5.1 INTRODUCTION
The following sections describe the components used and their
properties affecting the design of multi level inverter. The MOSFET or Metal
Oxide Semiconductor Field Effect Transistors by the far most common field
effect transistor in both digital and analog circuits. The MOSFET is composed
of a channel of n-type or p-type semiconductor material ,and is accordingly
called as NMOSFET or a PMOSFET. Unfortunately, many semiconductors
with better electrical properties than silicon such as gallium arsenide do not
form good gate oxides and thus are not suitable for MOSFETS.
The gate terminal is a layer of poly silicon (polycrystalline silicon) or
aluminium placed over a channel, but separated from the channel by a thin layer
of insulating silicon dioxide.
A simplified diagram of the N-channel enhancement MOSFETS is
shown in figure. Drain and source connections are made to higher conduction
high doped regions. The metal gate is electrically isolated from the P-type
substrate by a layer of non-conducting silicon oxide (SiO2).
When a positive voltage is applied to the gate with respect to the source
an electric field will be created pointing away from the base and across the P-
region directly under the base. The electric field will cause positive charges in the
81
P-region to move away from the base inducing or enhancing an N-region in its
place.
6.6 EXPERIMENTAL RESULTS
Single-Phase Vienna Rectifier Fed DC Drive Hardware snap shot is
appeared in Fig 6.8. Input voltage is appeared in Fig 6.9. Switching pulse of
Vienna Rectifier S1 is delineated in Fig 6.10. Output voltage is appeared in Fig
6.11
Fig .68 Hardware snap shot
82
Fig 6.9 Input voltage
Fig 6.10 Switching pulse of Vienna Rectifier S1
83
Fig 6.11 Output voltage
84
CHAPTER 7
CONCLUSION
7.1 SUMMARY OF THE FINDINGS
Open loop VR and closed loop veinna rectifier with PI and PR controllers
are simulated and the outcomes are presented. The outcomes are compared in
terms of settling time and steady a=state error. By using PR controller, the rise
time is reduced from 1.45Sec to 0.26Sec; peak time is reduced from 1.46Sec to
0.37Sec; settling time is reduced from 4.78Sec to 2.33Sec; steady state error is
reduced from 1.8V to 1.1V. Hence, the outcome represents that the closed loop
veinna rectifier with PR controller is superior to closed loop veinna rectifier with
PI controller. Hard ware results are tested and fabricated.
7.2. SCOPE FOR THE FUTURE WORK
The present work deals with the simulation of closed loop veinna rectifier
with PR controller. FL controlled closed loop veinna rectifier system can be done
in Future.
85
CHAPTER 8
REFERENCES
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‘Vienna-Rectifier-Based Direct Torque Control of PMSG for Wind Energy
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IET Power Electron., vol. 7, issue 1, pp. 41-49.
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‘Equivalence of SVM and Carrier-Based PWM in Three-Phase / Wire / Level
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Transactions on Industrial Electronics, vol. 61, no. 1, pp. 20-28.
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90

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CLOSED LOOP PROPORTIONAL RESONANT

CONTROLLED SINGLE-PHASE VIENNA RECTIFIER

RANJITH KUMAR S (211716105035)

VENKATA SRIKANTH P S (211716105047)

in partial fulfilment for the award of the degree

ELECTRICAL AND ELECTRONICS ENGINEERING

ANNA UNIVERSITY: CHENNAI 600 025

Certified that this project report “CLOSED LOOP PROPORTIONAL

RESONANT CONTROLLED SINGLE-PHASE VIENNA RECTIFIER FED DC

DRIVE” is the bonafide work of “AMARNATH V (211716105002),

NARMADHA T (211716105024), RANJITH KUMAR S (211716105035),

VENKATA SRIKANTH P S (211716105047)” who carried out the project work

Mr. B MANIMARAN, M.E., (Ph.D)

Electrical and Electronics Engineering, Electrical and Electronics Engineering,

Rajalakshmi Institute of Technology, Rajalakshmi Institute of Technology,

Kuthambakkam (PO) Chennai-600 124 Kuthambakkam (PO) Chennai-600 124

INTERNAL EXAMINER EXTERNAL EXAMINER

We express our gratitude towards our chairperson Dr. (Mrs). THANGAM

We express our heartfelt thanks to our principal Dr. M. VELAN, M.E.,

We are grateful to Dr. C. KAMALAKANNAN, M.E., Ph.D., professor

We would like to extend our sincere thanks to our project coordinator

We are highly indebted to our project guide

of PI and PR controlled closed loop Single-Phase Vienna Rectifier Fed DC Drive

system. Simulation is done for PI (Proportional integral) & PR (Proportional

outcomes are compared. The comparison is done in terms of time domain

superior performance of PR controlled closed loop veinna rectifier. Hardware is

fabricated and results are presented.

CHAPTER.NO. TITLE PAGE

LIST OF FIGURES VII

FIG.NO. TITLE PAGE

3.2 Inductors on AC Side 35

3.3 Applications of Synchronously 36

3.4 Diodes in the Circuit Legs 37

3.5 (a) & (b) Vienna Rectifier having Unity Power 38

3.6 Working principle of Vienna Rectifier – 40

3.7 Alternative Construction of Vienna 41

3.8 Current direction when input current is 43

positive & ‘Sa’ is OFF

3.9 Current direction when input current is 44

positive & ‘Sa’ is ON

3.10 Current direction when input current is 45

negative & ‘Sa’ is OFF

3.11 Current direction when input current is 45

negative & ‘Sa’ is ON

in all switches OFF

3.13 Current path in alternate construction 50

3.14 Simulation Block Diagram 50

4.1 Structure of PI controller 51

4.2 Block Diagram of Current Controller 52

5.1 Circuit Diagram of open loop Vienna 56

Rectifier with Source Disturbance

5.2 Input Voltage 57

5.3 Voltage across Motor Load 57

5.4 Motor Speed 57

5.5 Current Through Motor Load 58

5.6 Motor Torque 58

5.7 Circuit Diagram of closed loop Vienna 59

Rectifier with PI Controller

5.8 Input Voltage 59

5.9 Voltage across Motor Load 60

5.10 Motor Speed 60

5.11 Current Through Motor Load 60

5.12 Motor Torque 61