Ferroelectrics

ISSN: 0015-0193 (Print) 1563-5112 (Online) Journal homepage: https://www.tandfonline.com/loi/gfer20

Architecture design and FPGA implementation of

full digital active sonar transmitters

Liu Da-li, Wang Wei & Deng Ji-Jie

To cite this article: Liu Da-li, Wang Wei & Deng Ji-Jie (2019) Architecture design and FPGA
implementation of full digital active sonar transmitters, Ferroelectrics, 548:1, 165-176, DOI:
10.1080/00150193.2019.1592523

To link to this article: https://doi.org/10.1080/00150193.2019.1592523

Published online: 25 Nov 2019.

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FERROELECTRICS
2019, VOL. 548, 165–176
https://doi.org/10.1080/00150193.2019.1592523

Architecture design and FPGA implementation of full

digital active sonar transmitters
Liu Da-lia,b, Wang Weia, and Deng Ji-Jiea
a
School of Electrical Engineering and Automation, Tianjin Polytechnic University, Tianjin, China; bState
Key Laboratory of Acoustics, Chinese Academy of Sciences, Beijing, China

ABSTRACT ARTICLE HISTORY

In order to solve the shortcomings of conventional active sonar Received 14 October 2018
transmitters, a new architecture of full digital transmitter was pro- Accepted 3 February 2019
posed. The proposed architecture focused on the reconfiguration of
KEYWORDS
the transmitter structure and the improvement on the control mode
Full digital transmitter;
of the power amplifier. Many devices of traditional transmitters were FPGA; beamforming; PWM;
removed, and the waveform generator, transmitting beamforming, dead-time
PWM signals generation and dead-time control were implemented in
the FPGA. The digital transmitter can reduce the complexity of active
sonar system, and improve the reliability of the transmitter. The sim-
ulations and experiments show that the proposed transmitter is reli-
able and meets the design requirements.

1. Introduction
Active sonar is an important device for detecting underwater targets and obtaining their
distance, bearing and velocity information. The transmitter is a necessary part of active
sonar system, which can amplify the transmitting waveform and convert the electrical
energy to sound energy. Generally, an active sonar transmitter is composed of a wave-
form generator, power amplifiers, impedance matching network and transducers. In
order to achieve the desired transmitting source level and directivity, phased transmis-
sion is usually applied, and the transmitting array is composed of dozens or even hun-
dreds of transducers. Multiple power amplifiers are the most important component in
the phased array, which affect the performance and reliability of the transmitter. The
power amplifiers in active sonar transmitter are usually class-D amplifiers, which are
applied in Hi-Fi (High-Fidelity) and industrial control due to the high efficiency and
small size.
The research on active sonar transmitters is focused on the design of power ampli-
fiers. In reference [1], the nonlinear behavior of a third-order class-D amplifier was ana-
lyzed, and the high effectiveness of ripple compensation technique in reducing the
distortion of the device was demonstrated. High-efficiency zero-voltage switching sin-
gle-stage switching amplifier was proposed by Zhong, and the amplifier was composed

CONTACT Liu Da-li liudalildl@139.com; 369060250@qq.com

First author: Da-li Liu, Ph.D., Lecturer, engaged in the research of underwater signal processing and the application of
FPGA. E-mail: liudalildl@139.com.
Color versions of one or more of the figures in the article can be found online at www.tandfonline.com/gfer.
ß 2019 Taylor & Francis Group, LLC
166/[630] L. DA-LI ET AL.

Figure 1. The structure of conventional active sonar transmitter.

of a bipolar phase shift-modulation high-frequency link single-stage inverter and a half-

bridge active clamp circuit [2]. Besides, the half-bridge class-D amplifier was applied in
Low-power design for DC current transformer [3].
Pulse width modulation (PWM) signal generation, which is the most important tech-
nology of class-D amplifiers, was also applied in many industrial control domains, and
various methods based on FPGA were proposed. A PWM signal generator for a DC-AC
converter was implemented in FPGA by Lupon [4]. Trapezoidal PWM was realization
in FPGA for generalized frequency converter [5]. Besides, a novel digital PWM control
scheme based on FPGA was proposed for brushless direct current motor drives [6].
In the paper, a new architecture of full digital transmitter was proposed, after the
conventional active sonar transmitter was analyzed. In order to solve the shortcomings
of the traditional transmitter, the control mode of class-D power amplifiers was
improved, and the D/A converters, the carrier generator circuit, the comparator and
dead-time control circuit were removed. The direct conversion from digital transmitting
waveforms to PWM signals and other functions were implemented in FPGA. The pro-
posed architecture can reduce the complexity and increase the reliability of the system.
Simulations and experiments proved the feasibility of the digital transmitter.

2. The analysis of conventional active sonar transmitter

In conventional active sonar systems, low power devices and high power devices are
separated. The waveform generator of the active sonar transmitter, which is usually far
from the power amplifier, is installed in the signal processing cubicle and is close to the
sonar receiver. The analog waveforms converted from the digital transmitting waveform
by D/A converters array, are transmitted to the power amplifier cubicle through a heavy
multi-conductor cable. In the cable, a variety of signals are mixed together, such as mul-
tiple transmitting waveforms, control signals and state monitor signals. The structure of
conventional active sonar transmitter is shown in Figure 1.
 FERROELECTRICS 167/[631]

Figure 2. The structure of conventional class-D amplifier module for sonar transmitters.

The waveform generator is installed in the signal processing cubicle, which is con-
venient for synchronization with the sonar receiver and communication with the con-
trol computer through the CPCI (Compact Peripheral Component Interconnect) bus. In
the waveform generator, the DSP (Digital Signal Processor) receives the instructions
and parameters from CPCI bus, reads a certain digital transmitting waveform from the
storage. The digital waveforms are transferred to the FPGA, after processed by beam-
forming. Multiple digital waveforms are converted to analog waveforms through D/A
converters array controlled by FPGA.
The analog waveforms are amplified in the power amplifier cubicle, which is filled
with multiple power amplifier modules (usually class-D amplifiers). The structure of
class-D amplifier module is shown in Figure 2.
There are several shortcomings in the traditional active sonar transmitter, which is
composed of the waveform generator, the power amplifiers and the transducer array.
Firstly, in order to achieve the desired transmitting power and beam pattern, there are
dozens or even hundreds of waveforms in the cable. The crosstalk among multiple ana-
log transmitting waveforms and digital control and monitor signals will affect the qual-
ity of signals seriously. Secondly, The PWM signal is generated after the carrier is
compared to the analog waveform, which is converted from a digital waveform through
the D/A converter. The conversion from the digital waveform to the digital PWM sig-
nals increases the complexity of the system, may introduce interference, and reduces the
performance and reliability of the system. Thirdly, in the crowed and noisy cabin, the
signals are easily disturbed by others signals and power lines. Besides, it is difficult to
install and maintain the devices, duo to the long and heavy cables between the signal
processing cubicle and the power amplifier cubicle.

3. The design of the proposed full digital active sonar transmitter

3.1. The architecture design of the transmitter
In order to solve the shortcomings of the conventional sonar transmitter, a new archi-
tecture of transmitter is proposed in the paper, which can realize the direct conversion
from the digital waveform to the PWM signals. The D/A converters, the carrier gener-
ator circuit, the comparator and dead-time control circuit are removed in the new
architecture, which is shown in Figure 3. The waveform generator, the PWM generation
and dead-time control are all integrated in one FPGA, which is shown in Figure 4.
168/[632] L. DA-LI ET AL.

Figure 3. The architecture of the proposed full digital transmitter.

Figure 4. The information processing in FPGA.

Control instructions and working state monitor information between the control com-
puter and the FPGA are achieved by Ethernet, and FPGA can be synchronized with the
sonar receiver. The new architecture can reduce the heave cable between the cubicles,
 FERROELECTRICS 169/[633]

Figure 5. The principle of transmitting beamforming.

eliminate the interferences between the signals, decrease the system complexity, and the
increase the reliability of the devices.
As shown in Figure 3, FPGA is control unit of the transmitter, and completes the
communication with the control computer, waveform generation, transmitting power
control, transmitting beamforming, PWM generation, dead-time control, and so on.
The detailed information processing in FPGA is shown in Figure 4.
The control instructions are distributed to the relevant modules after parsed, and the
selected digital transmitting waveform is read out from the storage, weighted in ampli-
tude, processed by beamforming, and then converted to PWM signals. The complemen-
tary PWM signals which can drive H-bridge are generated, after dead-time is inserted.

3.2. The design of transmitting beamforming

Beamforming is a signal processing technique applied in multi-sensor arrays, in order
to enhance the signals in desired directions and suppress interferences in others direc-
tions. As an important branch of array signal processing, beamforming is actually a spa-
tial filter, which has been widely applied in many fields, such as radar, sonar,
communication, geological survey and so on [7, 8].
In order to achieve the desired transmitting source level and directivity, beamforming is usu-
ally applied in the active sonar transmitter. Waveforms transmitted from each sensor of the
phased array are controlled, so that the waveforms can reach the targets at the same time [9].
For an arbitrary array shown in Figure 5, if the transmitting beam is pointed to the
direction of the unit vector a; there will be various distances between each sensor and
the wave front of the transmitting direction a: In order to ensure the transmitting wave-
forms from each sensor reach the wave front simultaneously, the waveforms need time
delays or phase shifts.
For an array with N regular sensors, such as linear array and circular array, the delay
time of each sensor can be calculated by the sensor locations. If the coordinate of each
sensor in the rectangular coordinate system is pi ¼ ½xi ; yi ; zi T and the direction of trans-
mitting beam is a ¼ ½sin h cos /; sin h sin /; cos hT ; the delay time si of each sensor can
be written as
170/[634] L. DA-LI ET AL.

aT pi
si ¼ ; (1)
c
Where i denotes the serial number of the sensors, and i ¼ 0; 1; :::; N1; h and / denote
azimuth angle and elevation angle of the transmitting direction; c denotes the sound
velocity in water. In order to make sure that the delay time si is positive and in a rea-
sonable interval, it should be normalized as follows:
si ¼ si  min fsj g: (2)
0jN1

For irregular arrays, when the accurate coordinates of the array sensors are difficult
to obtain, the delay time of each sensor can be indirectly calculated by measuring the
receiving array manifold vector. According to the method proposed in [10], when the
array is receiving signals, the array manifold vector t in a certain direction can be
obtained by experiments, which can be written as
2 3 2 3
ejxs0 eju0
6 ejxs1 7 6 eju1 7
6 7 6 7
t¼6 .. 7 ¼ 6 .. 7; (3)
4 . 5 4 . 5
ejxsN1 ejuN1
where x denotes the angular frequency of the transmitted test waveform, and ui is the
ithphase of the vector t: Then, the delay time of each sensor can be written
as si ¼ ui =x:
The delay time obtained from the array manifold vector can be applied in receiving
beamforming, and it also can be applied in transmitting beamforming, if the delay time
is normalized as follows:
si ¼ max fsj gsi : (4)
0jN1

Transmitting beamforming can be implemented by FPGA, considering that it’s easy

for FPGA to realize the controllable digital delay units. Due to the discreteness of digital
delay, the delay time is only the integer times of the sampling period, and there is a lit-
tle error Dsi between the actual digital delay time and the theoretical value, which is
written as
Dsi ¼ si kTs ; (5)
where Ts denotes the sampling period; k is an integer, and k ¼ roundðsi =Ts Þ: Then the
range of error Dsi is Ts =2<Dsi <Ts =2: The higher the sampling frequency is, the
smaller the delay time error is. When the sampling frequency is ten times larger than
the frequency of the transmitting waveform, the differences between the actual transmit-
ting beam pattern and the theoretical one can be ignored.

3.3 The generation of PWM signals

For digital class-D power amplifier controller, the digital driving signals can be gener-
ated by pulse density modulation (PDM) [11], click modulation (CM), uniform pulse
width modulation (UPWM) [12] and so on. Compared with traditional class-D power
 FERROELECTRICS 171/[635]

Figure 6. The process of generating PWM signals in FPGA.

Figure 7. The relationship of carrier, transmitting waveform and PWM signal.

amplifier controller, UPWM method is highly integrated, and has strong anti-interfer-
ence ability. Besides, D/A conversions can be avoided by UPWM method. In this paper,
UPWM method is proposed to generate PWM signals for active sonar transmitter.
The process of generating PWM signals in FPGA is shown in Figure 6. The sampled
transmitting waveform with amplitude of A=2A=2 is firstly moved upwards to
ðLAÞ=2ðL þ AÞ=2; by adding the number L=2: The moved waveform is compared to
an L-radix counter, and the output of the digital comparator is the PWM signal.
Figure 7 shows the relationship of the carrier (output of the counter), the transmit-
ting waveform and the PWM signal. Considering the amplitudes of the transmitting
waveform and the carrier are ðLAÞ=2ðL þ AÞ=2and 0L1 respectively, the min-
imum pulse width of the obtained PWM signal is LA 2 Tc ; where Tc is the clock period
of the counter, and the minimum duty cycle of the PWM signal is LA 2L :

3.4 Adjustable dead-time control

H-bridge of class-D power amplifiers is usually a half-bridge composed of 2 MOSFETs
or a full-bridge composed of 4 MOSFETs, and the driving signals of the 2 MOSFETs of
one bridge arm are complementary. In order to avoid the shoot-through issue, there
must be “dead-time” in the two complementary driving signals, which means there is a
period during a switching transition when both the 2 MOSFETs of one bridge arm are
driven into cutoff mode. There many methods to insert the dead-time into the PWM
signals [13, 14]. In the paper, two complementary driving signals are generated and the
adjustable dead-time control is implemented in FPGA.
172/[636] L. DA-LI ET AL.

Figure 8. The circuit structure of PWM signals and dead-time control.

Figure 9. The timing relationship of complementary PWM signals.

The circuit structure of generating two complementary PWM signals and implement-
ing adjustable dead- time control in FPGA is shown in Figure 8. In Figure 8, “CLK” is
the clock signal that is the same as the L-radix counter, “PWM” is the output signal of
the digital comparator, and “CTRL” is the control word that can change the dead-time.
“PQ1” and “PQ2” are two complementary PWM signals in which there is dead-
time inserted.
The timing relationship of all signals are shown in Figure 9. The delay time sD can
be adjusted online by changing the number of D flip-flop at any time, and the adjust-
ment precision is one clock period.

4. Simulations and experiments

4.1. The differences between digital delay time and ideal value
There is a litter delay time error when transmitting beamforming is implemented in
FPGA, because the delay time in FPGA is the integer times of the sampling period. The
below simulation can prove that the differences between the actual transmitting beam
pattern and the ideal one is small enough to be ignored. The transmitting array is a cir-
cle of the diameter of 1m, which is consisting of 24 transducers with uniform distribu-
tion. The frequency and sampling frequency of transmitting waveform is 5 kHz and
 FERROELECTRICS 173/[637]

Figure 10. The transmitting array and the transducers applied in beamforming.

Figure 11. The comparison of the ideal beamforming and the beamforming in FPGA (a) The compari-
son of delay time (b) The comparison of the directivity.

50 kHz respectively. When the transmitting beam is pointed to the direction as shown
in Figure 10, there is 8 symmetric transducers applied in beamforming.
The calculated ideal delay time and the delay time in FPGA is shown in Figure 11(a),
and there are a little differences between the ideal delay and the delay in FPGA.
However, the two beam patterns (the directivity) shown in Figure 11(b), are almost the
same. The performance of the transmitting beamforming in FPGA is not disturbed by
delay time error.

4.2. PWM waveform generation

The controller of full digital active sonar transmitter was implemented in SpartanV R -6

family FPGA of XilinxV R Company. The frequency and sampling frequency of transmit-

ting waveform is 5 kHz and 50 kHz respectively. The clock frequency of generating
PWM signals is 200 MHz, and then the maximum count value of the counter is 200M/
50K ¼ 4000. The amplitude of the transmitting waveform is set to be -1600  1600, and
then the duty cycle range of the PWM signals is 10%90%. As long as the amplitude of
the transmitting waveform is less than the half of the maximum value of the counter,
the greater the amplitude of the transmitting waveform, the greater the duty cycle range
of the PWM signals. When the controller of full digital active sonar transmitter was
working, the data in FPGA could be captured and exported by ChipscopeV R software,
174/[638] L. DA-LI ET AL.

Figure 12. The relationships of the transmitting waveform and PWM waveform in FPGA.

Figure 13. The measurement for the directivity of the proposed transmitter.

and then the data was analyzed off-line by MatlabV R software, which is shown in

Figure 12.
Figure 12 shows that the complementary PWM signals PQ1 and PQ2 are generated,
after the comparison of the digital transmitting waveform and the sawtooth carrier sig-
nal and processing of the dead-time control circuit.

4.3. The directivity of the proposed full digital transmitter

In order to verify the transmitting directivity of the proposed digital active sonar trans-
mitter, the experiment was carried out on the lake of Xin’An River Reservoir. The
transmitting array is a cylindrical array consisting of 24 transducer. The array was rotat-
ing slowly and uniformly, while the transmitting waveform was transmitted repeatedly.
A hydrophone was fixed at 15 meters away from the transmitting array, and the
received signal was sent to the computer to process and store, after amplified, filtered
and sampled. The experiment devices are shown in Figure 13.
In order to test the uniformity and directivity of the proposed transmitter, various
transmitting mode were executed. While the array rotated, the transducers of the array
was transmitting the same waveform simultaneously, and the hydrophone kept receiving
the signals in water. The normalized uniformity of the transmitter is shown in Figure
 FERROELECTRICS 175/[639]

Figure 14. The uniformity and directivity results of the proposed transmitter (a) The uniformity (b)
The directivity.

14(a), and the minimum value of the uniformity is 0.92, which means the uniformity of
the transmitter is 0.72dB. Then, the transmitted waveform was processed by beamform-
ing, and the beam direction was set at 0 degree. The above operation was repeated, and
the directivity of the transmitter was obtained, which is shown in Figure 14(b). The 3dB
beam width of the transmitting beam is 15.7 degree, and the value of the maximum
sidelobe is 0.224 (-13dB). The results proves that the uniformity and directivity of the
proposed transmitter can meet the requirements of the design.

5. Conclusions
In order to solve the problems of conventional active sonar transmitter, a full digital
transmitter was proposed. The new transmitter focused on the reconfiguration of the
transmitter structure and the improvement on the control mode of the power amplifier.
The waveform generator, transmitting beamforming, PWM signals generation and dead-
time control were integrated in the FPGA. The control instructions and working state
information between the transmitter and the control computer can be transferred
through Ethernet. The proposed digital sonar transmitter can decrease the heavy cables
between the waveform generator and the power amplifier, reduce the complexity of
sonar system, and improve the reliability of the equipment. The simulations and experi-
ments show that the proposed transmitter is reliable and meets the design requirements.

Funding
National Natural Science Foundation of China (grant No.: 61601322), Natural Science
Foundation of Tianjin City (grant No.: 16JCQNJC01400), State Key Laboratory of Acoustics,
Institute of Acoustics, Chinese Academy of Sciences (grant No.: SKLA201503), Scientific research
program of Tianjin Education Committee (grant No.: 2017ZD06) and Program for innovation
team of Tianjin institution of higher learning (grant No.: TD13-5035).
176/[640] L. DA-LI ET AL.

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